* [PATCH 2/3] arm64: hw_breakpoint: Handle inexact watchpoint addresses
From: Pratyush Anand @ 2016-10-08 5:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJt8pk9WOhebSXpbahbbLscqJcY1OOqHiA_9hHC0zmHruRPxWQ@mail.gmail.com>
Hi Pavel,
On Fri, Oct 7, 2016 at 10:54 PM, Pavel Labath <labath@google.com> wrote:
> On 7 October 2016 at 09:38, Pratyush Anand <panand@redhat.com> wrote:
>>
>>
>> IIUC, then you see an issue when an address watched is not the base
>> address accessed by the instruction. For example, if an address 'a+8'
>> is watched and an instruction accesses instruction from a to a +16. I
>> tried to reproduce the issue with mustang using your test-case in
>> patch3 (after couple of syntax modifcations for resolving compilation
>> issue with gcc). All the test case did pass with existing code in
>> v4.8. I noticed that, watchpoint exception is generated if any of the
>> sub-location accessed from a single instruction is watched, provided
>> watchdpoint watches either a byte, half word, word or double word
>> from the base.
>>
>>
>> So, either I must be missing something or the problem is not related
>> to all arm64 platform.
>
>
> Hello Pratyush,
>
> Thank you for looking into this.
>
> The thing is, I have observed different behavior here depending on the
> exact hardware used. I don't have the exact parameters with me now,
> but I can look it up next week.
>
> The thing is that the spec is imprecise about what exact address the
> hardware can report for the watchpoint hit. I presume that is
> deliberate to give some leeway to implementers. The spec says the
> address can be anywhere in the range from the lowest memory address
> accessed by the instruction to the highest address watched by the
> watchpoint,
I think, my patches should be able to take care of the above condition.
> but most hardware seems to be stricter than that and
> return an address that fits inside the watched range.
>
> On chip 1, I observed the behavior where the hardware would
> consistently report an address out of range of the watchpoint and we
> would just spin it in a loop.
>
> On chip 2, I observed the behavior where the hardware would report an
> out-of-range address for the first two dozen (~) iterations, after
> which it would "give up" and report an address that we were happy
> with. I don't really have an explanation for this - I can only assume
> that some external event like a reschedule to a different core caused
> some internal state of the hardware to be reset and cause it to report
> a different (better?) address instead. In the case where this was
> happening, it had no observable effects on userspace - it did not see
> the fact that we had re-executed the offending instruction a dozen
> times and as far as it was concerned, the watchpoint functionality
> worked perfectly. You can check whether this is happening in your case
> by instrumenting the code to print the reported address whenever it
> enters `watchpoint_handler`.
>
Yes, I had done that. In my case it was always starting memory address
accessed by the instruction. e.g. if a strb writes to 0x400023, I
would get addr=0x400023 in watchpoint_handler(), if a str writes to
0x400020-0x400027, I would get addr=0x400020.
> (I am sorry about the test errors. I was compiling the test case with
> an android gcc - I'll make sure to check it with a vanilla linux gcc
> also.)
>
your test cases are helpful. I think, I would use them to build
further test cases.
> >
>> However, I did notice that it does not work if we watch an address
>> which is at some offset from address programmed. For example, it works
>> when byte_mask is 0x3, but it does not work if byte_mask if 0x2 (which
>> is supported by hardware).
>>
>> I do have some patches to resolve that.
>>
>> https://github.com/pratyushanand/linux/commits/perf/upstream_arm64_devel
>>
>> I will send them for review comment after some testing.
>
> I am looking forward to these patches - they were the next on my list
> to look into after I got this resolved. :)
>
> However: Are sure about 0x2 not being a valid byte mask? According to
It is a valid mask indeed, and you should be able to use all those
mask after my patches.
> my reading of the armv8 spec (section D7.3.11, "DBGWCR<n>_EL1, Debug
> Watchpoint Control Registers, n = 0 - 15") it should be fine.
> ====
> The valid values for BAS are 0b0000000, or a binary number all of
> whose set bits are contiguous. All other values are reserved and must
> not be used by software.
> ====
> So, 0x2 (as well as 0x6, 0xC, 0xE) should be fine as it has a
> contiguous sequence of set bit(s). I haven't tried yet whether any
> hardware actually handles that correctly, but I was certainly hoping
> we would be able to watch more precise memory regions.
I have tested couple of them, and I think my patches should help with
using any contiguous bit mask acceptable by spec.
~Pratyush
^ permalink raw reply
* [PATCH 5/5] rpmsg: smd: Register rpmsg user space interface for edges
From: Bjorn Andersson @ 2016-10-08 4:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475900595-8375-1-git-send-email-bjorn.andersson@linaro.org>
Create and register a rpmsg device for use with the rpmsg user space
interface, allowing user space to access SMD channels.
Also provide the "rpmsg_name" device attribute to expose the edge name
in sysfs, allowing the user to write udev rules for specific rpmsg
devices and their children.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/rpmsg/qcom_smd.c | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/drivers/rpmsg/qcom_smd.c b/drivers/rpmsg/qcom_smd.c
index 92efa74a0024..86856b2b558a 100644
--- a/drivers/rpmsg/qcom_smd.c
+++ b/drivers/rpmsg/qcom_smd.c
@@ -983,6 +983,20 @@ static int qcom_smd_create_device(struct qcom_smd_channel *channel)
return rpmsg_register_device(rpdev);
}
+static int qcom_smd_create_chrdev(struct qcom_smd_edge *edge)
+{
+ struct qcom_smd_device *qsdev;
+
+ qsdev = kzalloc(sizeof(*qsdev), GFP_KERNEL);
+ if (!qsdev)
+ return -ENOMEM;
+
+ qsdev->edge = edge;
+ qsdev->rpdev.ops = &qcom_smd_device_ops;
+ qsdev->rpdev.dev.parent = &edge->dev;
+ return rpmsg_chrdev_register_device(&qsdev->rpdev);
+}
+
/*
* Allocate the qcom_smd_channel object for a newly found smd channel,
* retrieving and validating the smem items involved.
@@ -1284,6 +1298,21 @@ static void qcom_smd_edge_release(struct device *dev)
kfree(edge);
}
+static ssize_t rpmsg_name_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct qcom_smd_edge *edge = to_smd_edge(dev);
+
+ return sprintf(buf, "%s\n", edge->of_node->name);
+}
+static DEVICE_ATTR_RO(rpmsg_name);
+
+static struct attribute *qcom_smd_edge_attrs[] = {
+ &dev_attr_rpmsg_name.attr,
+ NULL
+};
+ATTRIBUTE_GROUPS(qcom_smd_edge);
+
/**
* qcom_smd_register_edge() - register an edge based on an device_node
* @parent: parent device for the edge
@@ -1305,6 +1334,7 @@ struct qcom_smd_edge *qcom_smd_register_edge(struct device *parent,
edge->dev.parent = parent;
edge->dev.release = qcom_smd_edge_release;
+ edge->dev.groups = qcom_smd_edge_groups;
dev_set_name(&edge->dev, "%s:%s", dev_name(parent), node->name);
ret = device_register(&edge->dev);
if (ret) {
@@ -1318,6 +1348,12 @@ struct qcom_smd_edge *qcom_smd_register_edge(struct device *parent,
goto unregister_dev;
}
+ ret = qcom_smd_create_chrdev(edge);
+ if (ret) {
+ dev_err(&edge->dev, "failed to register chrdev for edge\n");
+ goto unregister_dev;
+ }
+
schedule_work(&edge->scan_work);
return edge;
--
2.5.0
^ permalink raw reply related
* [PATCH 4/5] rpmsg: Driver for user space endpoint interface
From: Bjorn Andersson @ 2016-10-08 4:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475900595-8375-1-git-send-email-bjorn.andersson@linaro.org>
This driver allows rpmsg instances to expose access to rpmsg endpoints
to user space processes. It provides a control interface, allowing
userspace to export endpoints and an endpoint interface for each exposed
endpoint.
The implementation is based on prior art by Texas Instrument, Google,
PetaLogix and was derived from a FreeRTOS performance statistics driver
written by Michal Simek.
The control interface provides a "create endpoint" ioctl, which is fed a
name, source and destination address. The three values are used to
create the endpoint, in a backend-specific way, and a rpmsg endpoint
device is created - with the three parameters are available in sysfs for
udev usage.
E.g. to create an endpoint device for one of the Qualcomm SMD channel
related to DIAG one would issue:
struct rpmsg_endpoint_info info = { "DIAG_CNTL", 0, 0 };
int fd = open("/dev/rpmsg_ctrl0", O_RDWR);
ioctl(fd, RPMSG_CREATE_EPT_IOCTL, &info);
Each created endpoint device shows up as an individual character device
in /dev, allowing permission to be controlled on a per-endpoint basis.
The rpmsg endpoint will be created and destroyed following the opening
and closing of the endpoint device, allowing rpmsg backends to open and
close the physical channel, if supported by the wire protocol.
Cc: Marek Novak <marek.novak@nxp.com>
Cc: Matteo Sartori <matteo.sartori@t3lab.it>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Documentation/ioctl/ioctl-number.txt | 1 +
drivers/rpmsg/Makefile | 2 +-
drivers/rpmsg/rpmsg_char.c | 576 +++++++++++++++++++++++++++++++++++
drivers/rpmsg/rpmsg_internal.h | 2 +
include/uapi/linux/rpmsg.h | 35 +++
5 files changed, 615 insertions(+), 1 deletion(-)
create mode 100644 drivers/rpmsg/rpmsg_char.c
create mode 100644 include/uapi/linux/rpmsg.h
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 81c7f2bb7daf..08244bea5048 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -321,6 +321,7 @@ Code Seq#(hex) Include File Comments
0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
0xB3 00 linux/mmc/ioctl.h
0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org>
+0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org>
0xC0 00-0F linux/usb/iowarrior.h
0xCA 00-0F uapi/misc/cxl.h
0xCA 80-8F uapi/scsi/cxlflash_ioctl.h
diff --git a/drivers/rpmsg/Makefile b/drivers/rpmsg/Makefile
index ae9c9132cf76..5daf1209b77d 100644
--- a/drivers/rpmsg/Makefile
+++ b/drivers/rpmsg/Makefile
@@ -1,3 +1,3 @@
-obj-$(CONFIG_RPMSG) += rpmsg_core.o
+obj-$(CONFIG_RPMSG) += rpmsg_core.o rpmsg_char.o
obj-$(CONFIG_RPMSG_QCOM_SMD) += qcom_smd.o
obj-$(CONFIG_RPMSG_VIRTIO) += virtio_rpmsg_bus.o
diff --git a/drivers/rpmsg/rpmsg_char.c b/drivers/rpmsg/rpmsg_char.c
new file mode 100644
index 000000000000..a398a63e8d44
--- /dev/null
+++ b/drivers/rpmsg/rpmsg_char.c
@@ -0,0 +1,576 @@
+/*
+ * Copyright (c) 2016, Linaro Ltd.
+ * Copyright (c) 2012, Michal Simek <monstr@monstr.eu>
+ * Copyright (c) 2012, PetaLogix
+ * Copyright (c) 2011, Texas Instruments, Inc.
+ * Copyright (c) 2011, Google, Inc.
+ *
+ * Based on rpmsg performance statistics driver by Michal Simek, which in turn
+ * was based on TI & Google OMX rpmsg driver.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/fs.h>
+#include <linux/idr.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/rpmsg.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <uapi/linux/rpmsg.h>
+
+#include "rpmsg_internal.h"
+
+#define RPMSG_DEV_MAX 256
+
+static dev_t rpmsg_major;
+static struct class *rpmsg_class;
+
+static DEFINE_IDA(rpmsg_ctrl_ida);
+static DEFINE_IDA(rpmsg_ept_ida);
+static DEFINE_IDA(rpmsg_minor_ida);
+
+#define dev_to_eptdev(dev) container_of(dev, struct rpmsg_eptdev, dev)
+#define cdev_to_eptdev(i_cdev) container_of(i_cdev, struct rpmsg_eptdev, cdev)
+
+#define dev_to_ctrldev(dev) container_of(dev, struct rpmsg_ctrldev, dev)
+#define cdev_to_ctrldev(i_cdev) container_of(i_cdev, struct rpmsg_ctrldev, cdev)
+
+struct rpmsg_ctrldev {
+ struct rpmsg_device *rpdev;
+ struct cdev cdev;
+ struct device dev;
+};
+
+struct rpmsg_eptdev {
+ struct device dev;
+ struct cdev cdev;
+
+ struct rpmsg_device *rpdev;
+ struct rpmsg_channel_info chinfo;
+
+ struct mutex ept_lock;
+ struct rpmsg_endpoint *ept;
+
+ spinlock_t queue_lock;
+ struct sk_buff_head queue;
+ wait_queue_head_t readq;
+};
+
+static int rpmsg_eptdev_destroy(struct rpmsg_eptdev *eptdev);
+
+
+static int rpmsg_cdev_register(struct device *dev,
+ struct cdev *cdev,
+ const struct file_operations *fops,
+ dev_t *assigned_devt)
+{
+ dev_t devt;
+ int ret;
+
+ ret = ida_simple_get(&rpmsg_minor_ida, 0, 0, GFP_KERNEL);
+ if (ret < 0)
+ return ret;
+
+ devt = MKDEV(MAJOR(rpmsg_major), ret);
+
+ cdev_init(cdev, fops);
+ cdev->owner = THIS_MODULE;
+ ret = cdev_add(cdev, devt, 1);
+ if (ret < 0) {
+ dev_err(dev, "cdev_add failed: %d\n", ret);
+ ida_simple_remove(&rpmsg_minor_ida, MINOR(devt));
+ return ret;
+ }
+
+ *assigned_devt = devt;
+ return 0;
+}
+
+static int rpmsg_ept_cb(struct rpmsg_device *rpdev, void *buf, int len,
+ void *priv, u32 addr)
+{
+ struct rpmsg_eptdev *eptdev = priv;
+ struct sk_buff *skb;
+
+ skb = alloc_skb(len, GFP_ATOMIC);
+ if (!skb)
+ return -ENOMEM;
+
+ memcpy(skb_put(skb, len), buf, len);
+
+ spin_lock(&eptdev->queue_lock);
+ skb_queue_tail(&eptdev->queue, skb);
+ spin_unlock(&eptdev->queue_lock);
+
+ /* wake up any blocking processes, waiting for new data */
+ wake_up_interruptible(&eptdev->readq);
+
+ return 0;
+}
+
+static int rpmsg_eptdev_open(struct inode *inode, struct file *filp)
+{
+ struct rpmsg_eptdev *eptdev = cdev_to_eptdev(inode->i_cdev);
+ struct rpmsg_endpoint *ept;
+ struct rpmsg_device *rpdev = eptdev->rpdev;
+ struct device *dev = &eptdev->dev;
+
+ get_device(dev);
+
+ ept = rpmsg_create_ept(rpdev, rpmsg_ept_cb, eptdev, eptdev->chinfo);
+ if (!ept) {
+ dev_err(dev, "failed to open %s\n", eptdev->chinfo.name);
+ put_device(dev);
+ return -EINVAL;
+ }
+
+ eptdev->ept = ept;
+ filp->private_data = eptdev;
+
+ return 0;
+}
+
+static int rpmsg_eptdev_release(struct inode *inode, struct file *filp)
+{
+ struct rpmsg_eptdev *eptdev = cdev_to_eptdev(inode->i_cdev);
+ struct device *dev = &eptdev->dev;
+ struct sk_buff *skb;
+
+ /* Close the endpoint, if it's not already destroyed by the parent */
+ if (eptdev->ept)
+ rpmsg_destroy_ept(eptdev->ept);
+
+ /* Discard all SKBs */
+ while (!skb_queue_empty(&eptdev->queue)) {
+ skb = skb_dequeue(&eptdev->queue);
+ kfree_skb(skb);
+ }
+
+ put_device(dev);
+
+ return 0;
+}
+
+static long rpmsg_eptdev_ioctl(struct file *fp, unsigned int cmd,
+ unsigned long arg)
+{
+ struct rpmsg_eptdev *eptdev = fp->private_data;
+
+ if (cmd != RPMSG_DESTROY_EPT_IOCTL)
+ return -EINVAL;
+
+ return rpmsg_eptdev_destroy(eptdev);
+}
+
+static ssize_t rpmsg_eptdev_read(struct file *filp, char __user *buf,
+ size_t count, loff_t *f_pos)
+{
+ struct rpmsg_eptdev *eptdev = filp->private_data;
+ unsigned long flags;
+ struct sk_buff *skb;
+ int use;
+
+ spin_lock_irqsave(&eptdev->queue_lock, flags);
+
+ /* Wait for data in the queue */
+ if (skb_queue_empty(&eptdev->queue)) {
+ spin_unlock_irqrestore(&eptdev->queue_lock, flags);
+
+ if (filp->f_flags & O_NONBLOCK)
+ return -EAGAIN;
+
+ /* Wait until we get data or the endpoint goes away */
+ if (wait_event_interruptible(eptdev->readq,
+ !skb_queue_empty(&eptdev->queue) ||
+ !eptdev->ept))
+ return -ERESTARTSYS;
+
+ /* We lost the endpoint while waiting */
+ if (!eptdev->ept)
+ return -EPIPE;
+
+ spin_lock_irqsave(&eptdev->queue_lock, flags);
+ }
+
+ skb = skb_dequeue(&eptdev->queue);
+ if (!skb)
+ return -EFAULT;
+
+ spin_unlock_irqrestore(&eptdev->queue_lock, flags);
+
+ use = min_t(size_t, count, skb->len);
+ if (copy_to_user(buf, skb->data, use))
+ use = -EFAULT;
+
+ kfree_skb(skb);
+
+ return use;
+}
+
+static ssize_t rpmsg_eptdev_write(struct file *filp, const char __user *buf,
+ size_t count, loff_t *f_pos)
+{
+ struct rpmsg_eptdev *eptdev = filp->private_data;
+ void *kbuf;
+ int ret;
+
+ kbuf = kzalloc(count, GFP_KERNEL);
+ if (!kbuf)
+ return -ENOMEM;
+
+ if (copy_from_user(kbuf, buf, count)) {
+ ret = -EFAULT;
+ goto free_kbuf;
+ }
+
+ if (mutex_lock_interruptible(&eptdev->ept_lock)) {
+ ret = -ERESTARTSYS;
+ goto free_kbuf;
+ }
+
+ if (!eptdev->ept) {
+ ret = -EPIPE;
+ goto unlock_eptdev;
+ }
+
+ if (filp->f_flags & O_NONBLOCK)
+ ret = rpmsg_trysend(eptdev->ept, kbuf, count);
+ else
+ ret = rpmsg_send(eptdev->ept, kbuf, count);
+
+unlock_eptdev:
+ mutex_unlock(&eptdev->ept_lock);
+
+free_kbuf:
+ kfree(kbuf);
+ return ret;
+}
+
+static const struct file_operations rpmsg_eptdev_fops = {
+ .owner = THIS_MODULE,
+ .open = rpmsg_eptdev_open,
+ .release = rpmsg_eptdev_release,
+ .read = rpmsg_eptdev_read,
+ .write = rpmsg_eptdev_write,
+ .unlocked_ioctl = rpmsg_eptdev_ioctl,
+};
+
+static ssize_t name_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct rpmsg_eptdev *eptdev = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%s\n", eptdev->chinfo.name);
+}
+static DEVICE_ATTR_RO(name);
+
+static ssize_t src_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct rpmsg_eptdev *eptdev = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%d\n", eptdev->chinfo.src);
+}
+static DEVICE_ATTR_RO(src);
+
+static ssize_t dst_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct rpmsg_eptdev *eptdev = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%d\n", eptdev->chinfo.dst);
+}
+static DEVICE_ATTR_RO(dst);
+
+static struct attribute *rpmsg_eptdev_attrs[] = {
+ &dev_attr_name.attr,
+ &dev_attr_src.attr,
+ &dev_attr_dst.attr,
+ NULL
+};
+ATTRIBUTE_GROUPS(rpmsg_eptdev);
+
+static void rpmsg_eptdev_release_device(struct device *dev)
+{
+ struct rpmsg_eptdev *eptdev = dev_to_eptdev(dev);
+
+ ida_simple_remove(&rpmsg_minor_ida, MINOR(eptdev->dev.devt));
+ kfree(eptdev);
+}
+
+static int rpmsg_eptdev_create(struct rpmsg_ctrldev *ctrldev,
+ struct rpmsg_channel_info chinfo)
+{
+ struct rpmsg_device *rpdev = ctrldev->rpdev;
+ struct rpmsg_eptdev *eptdev;
+ struct device *dev;
+ int ret;
+ int id;
+
+ eptdev = kzalloc(sizeof(*eptdev), GFP_KERNEL);
+ if (!eptdev)
+ return -ENOMEM;
+
+ eptdev->rpdev = rpdev;
+ eptdev->chinfo = chinfo;
+
+ mutex_init(&eptdev->ept_lock);
+ spin_lock_init(&eptdev->queue_lock);
+ skb_queue_head_init(&eptdev->queue);
+ init_waitqueue_head(&eptdev->readq);
+
+ id = ida_simple_get(&rpmsg_ept_ida, 0, 0, GFP_KERNEL);
+ if (id < 0) {
+ kfree(eptdev);
+ return id;
+ }
+
+ dev = &eptdev->dev;
+ device_initialize(dev);
+ dev->class = rpmsg_class;
+ dev->id = id;
+ dev->parent = &ctrldev->dev;
+ dev->release = rpmsg_eptdev_release_device;
+ dev->groups = rpmsg_eptdev_groups;
+ dev_set_name(dev, "rpmsg%d", id);
+ dev_set_drvdata(dev, eptdev);
+
+ ret = rpmsg_cdev_register(dev, &eptdev->cdev,
+ &rpmsg_eptdev_fops, &dev->devt);
+ if (ret) {
+ dev_err(dev, "cdev_add failed: %d\n", ret);
+ goto out;
+ }
+
+ ret = device_add(dev);
+ if (ret) {
+ dev_err(dev, "device_register failed: %d\n", ret);
+ goto out;
+ }
+
+out:
+ if (ret < 0)
+ put_device(dev);
+
+ return ret;
+}
+
+static int rpmsg_eptdev_destroy(struct rpmsg_eptdev *eptdev)
+{
+ struct rpmsg_endpoint *ept = eptdev->ept;
+
+ mutex_lock(&eptdev->ept_lock);
+ eptdev->ept = NULL;
+ mutex_unlock(&eptdev->ept_lock);
+
+ rpmsg_destroy_ept(ept);
+
+ /* wake up any blocking processes */
+ wake_up_interruptible(&eptdev->readq);
+
+ cdev_del(&eptdev->cdev);
+ device_del(&eptdev->dev);
+ put_device(&eptdev->dev);
+
+ return 0;
+}
+
+static int rpmsg_ctrldev_open(struct inode *inode, struct file *filp)
+{
+ struct rpmsg_ctrldev *ctrldev = cdev_to_ctrldev(inode->i_cdev);
+
+ get_device(&ctrldev->rpdev->dev);
+ filp->private_data = ctrldev;
+
+ return 0;
+}
+
+static int rpmsg_ctrldev_release(struct inode *inode, struct file *filp)
+{
+ struct rpmsg_ctrldev *ctrldev = cdev_to_ctrldev(inode->i_cdev);
+
+ put_device(&ctrldev->rpdev->dev);
+
+ return 0;
+}
+
+static long rpmsg_ctrldev_ioctl(struct file *fp, unsigned int cmd,
+ unsigned long arg)
+{
+ struct rpmsg_ctrldev *ctrldev = fp->private_data;
+ void __user *argp = (void __user *)arg;
+ struct rpmsg_endpoint_info eptinfo;
+ struct rpmsg_channel_info chinfo;
+
+ if (cmd != RPMSG_CREATE_EPT_IOCTL)
+ return -EINVAL;
+
+ if (copy_from_user(&eptinfo, argp, sizeof(eptinfo)))
+ return -EFAULT;
+
+ memcpy(chinfo.name, eptinfo.name, RPMSG_NAME_SIZE);
+ chinfo.name[RPMSG_NAME_SIZE-1] = '\0';
+ chinfo.src = eptinfo.src;
+ chinfo.dst = eptinfo.dst;
+
+ return rpmsg_eptdev_create(ctrldev, chinfo);
+};
+
+static const struct file_operations rpmsg_ctrldev_fops = {
+ .owner = THIS_MODULE,
+ .open = rpmsg_ctrldev_open,
+ .release = rpmsg_ctrldev_release,
+ .unlocked_ioctl = rpmsg_ctrldev_ioctl,
+};
+
+static void rpmsg_chrdev_release_device(struct device *dev)
+{
+ struct rpmsg_ctrldev *ctrldev = dev_to_ctrldev(dev);
+
+ ida_simple_remove(&rpmsg_ctrl_ida, MINOR(dev->devt));
+ cdev_del(&ctrldev->cdev);
+ kfree(ctrldev);
+}
+
+static int rpmsg_chrdev_probe(struct rpmsg_device *rpdev)
+{
+ struct rpmsg_ctrldev *ctrldev;
+ struct device *dev;
+ int ret;
+ int id;
+
+ ctrldev = kzalloc(sizeof(*ctrldev), GFP_KERNEL);
+ if (!ctrldev)
+ return -ENOMEM;
+
+ dev = &ctrldev->dev;
+
+ ctrldev->rpdev = rpdev;
+
+ id = ida_simple_get(&rpmsg_ctrl_ida, 0, 0, GFP_KERNEL);
+ if (id < 0) {
+ kfree(ctrldev);
+ return id;
+ }
+
+ device_initialize(dev);
+ dev->parent = &rpdev->dev;
+ dev->class = rpmsg_class;
+ dev->release = rpmsg_chrdev_release_device;
+ dev_set_name(&ctrldev->dev, "rpmsg_ctrl%d", id);
+
+ ret = rpmsg_cdev_register(dev, &ctrldev->cdev,
+ &rpmsg_ctrldev_fops, &dev->devt);
+ if (ret < 0) {
+ put_device(dev);
+ return ret;
+ }
+
+ ret = device_add(dev);
+ if (ret) {
+ dev_err(&rpdev->dev, "device_register failed: %d\n", ret);
+ put_device(dev);
+ }
+
+ dev_set_drvdata(&rpdev->dev, ctrldev);
+
+ return ret;
+}
+
+static int _rpmsg_eptdev_destroy(struct device *dev, void *data)
+{
+ struct rpmsg_eptdev *eptdev = dev_to_eptdev(dev);
+
+ return rpmsg_eptdev_destroy(eptdev);
+}
+
+static void rpmsg_chrdev_remove(struct rpmsg_device *rpdev)
+{
+ struct rpmsg_ctrldev *ctrldev = dev_get_drvdata(&rpdev->dev);
+ int ret;
+
+ /* Destroy all endpoints */
+ ret = device_for_each_child(&ctrldev->dev, NULL, _rpmsg_eptdev_destroy);
+ if (ret)
+ dev_warn(&rpdev->dev, "failed to nuke endpoints: %d\n", ret);
+
+ device_del(&ctrldev->dev);
+ put_device(&ctrldev->dev);
+}
+
+static struct rpmsg_driver rpmsg_chrdev_driver = {
+ .probe = rpmsg_chrdev_probe,
+ .remove = rpmsg_chrdev_remove,
+ .drv = {
+ .name = "rpmsg_chrdev",
+ },
+};
+
+/**
+ * rpmsg_chrdev_register_device() - register chrdev device based on rpdev
+ * @rpdev: prepared rpdev to be used for creating endpoints
+ *
+ * This function wraps rpmsg_register_device() preparing the rpdev for use as
+ * basis for the rpmsg chrdev.
+ */
+int rpmsg_chrdev_register_device(struct rpmsg_device *rpdev)
+{
+ strcpy(rpdev->id.name, "rpmsg_chrdev");
+ rpdev->driver_override = "rpmsg_chrdev";
+
+ return rpmsg_register_device(rpdev);
+}
+EXPORT_SYMBOL(rpmsg_chrdev_register_device);
+
+static int rpmsg_char_init(void)
+{
+ int ret;
+
+ ret = alloc_chrdev_region(&rpmsg_major, 0, RPMSG_DEV_MAX, "rpmsg");
+ if (ret < 0) {
+ pr_err("rpmsg: failed to allocate char dev region\n");
+ return ret;
+ }
+
+ rpmsg_class = class_create(THIS_MODULE, "rpmsg");
+ if (IS_ERR(rpmsg_class)) {
+ pr_err("failed to create rpmsg class\n");
+ ret = PTR_ERR(rpmsg_class);
+ goto unregister_chrdev;
+ }
+
+ ret = register_rpmsg_driver(&rpmsg_chrdev_driver);
+ if (ret < 0) {
+ pr_err("rpmsgchr: failed to register rpmsg driver\n");
+ goto destroy_class;
+ }
+
+ return 0;
+
+destroy_class:
+ class_destroy(rpmsg_class);
+
+unregister_chrdev:
+ unregister_chrdev_region(rpmsg_major, RPMSG_DEV_MAX);
+
+ return ret;
+}
+postcore_initcall(rpmsg_char_init);
+
+static void rpmsg_chrdev_exit(void)
+{
+ unregister_rpmsg_driver(&rpmsg_chrdev_driver);
+ unregister_chrdev_region(rpmsg_major, RPMSG_DEV_MAX);
+}
+module_exit(rpmsg_chrdev_exit);
diff --git a/drivers/rpmsg/rpmsg_internal.h b/drivers/rpmsg/rpmsg_internal.h
index 8075a20f919b..53d300eacc1c 100644
--- a/drivers/rpmsg/rpmsg_internal.h
+++ b/drivers/rpmsg/rpmsg_internal.h
@@ -79,4 +79,6 @@ int rpmsg_unregister_device(struct device *parent,
struct device *rpmsg_find_device(struct device *parent,
struct rpmsg_channel_info *chinfo);
+int rpmsg_chrdev_register_device(struct rpmsg_device *rpdev);
+
#endif
diff --git a/include/uapi/linux/rpmsg.h b/include/uapi/linux/rpmsg.h
new file mode 100644
index 000000000000..dedc226e0d3f
--- /dev/null
+++ b/include/uapi/linux/rpmsg.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2016, Linaro Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _UAPI_RPMSG_H_
+#define _UAPI_RPMSG_H_
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+
+/**
+ * struct rpmsg_endpoint_info - endpoint info representation
+ * @name: name of service
+ * @src: local address
+ * @dst: destination address
+ */
+struct rpmsg_endpoint_info {
+ char name[32];
+ __u32 src;
+ __u32 dst;
+};
+
+#define RPMSG_CREATE_EPT_IOCTL _IOW(0xb5, 0x1, struct rpmsg_endpoint_info)
+#define RPMSG_DESTROY_EPT_IOCTL _IO(0xb5, 0x2)
+
+#endif
--
2.5.0
^ permalink raw reply related
* [PATCH 3/5] rpmsg: Support drivers without primary endpoint
From: Bjorn Andersson @ 2016-10-08 4:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475900595-8375-1-git-send-email-bjorn.andersson@linaro.org>
Some types of rpmsg drivers does not have a primary endpoint to tie
their existence upon, but wishes to create and destroy endpoints
dynamically, e.g. based on user interactions.
Allow rpmsg drivers to omit a driver callback to signal this case and
make the probe path not create a primary endpoint in this case.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/rpmsg/rpmsg_core.c | 32 ++++++++++++++++++--------------
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/drivers/rpmsg/rpmsg_core.c b/drivers/rpmsg/rpmsg_core.c
index 087d4db896c8..7561941ba413 100644
--- a/drivers/rpmsg/rpmsg_core.c
+++ b/drivers/rpmsg/rpmsg_core.c
@@ -347,27 +347,30 @@ static int rpmsg_dev_probe(struct device *dev)
struct rpmsg_device *rpdev = to_rpmsg_device(dev);
struct rpmsg_driver *rpdrv = to_rpmsg_driver(rpdev->dev.driver);
struct rpmsg_channel_info chinfo = {};
- struct rpmsg_endpoint *ept;
+ struct rpmsg_endpoint *ept = NULL;
int err;
- strncpy(chinfo.name, rpdev->id.name, RPMSG_NAME_SIZE);
- chinfo.src = rpdev->src;
- chinfo.dst = RPMSG_ADDR_ANY;
+ if (rpdrv->callback) {
+ strncpy(chinfo.name, rpdev->id.name, RPMSG_NAME_SIZE);
+ chinfo.src = rpdev->src;
+ chinfo.dst = RPMSG_ADDR_ANY;
- ept = rpmsg_create_ept(rpdev, rpdrv->callback, NULL, chinfo);
- if (!ept) {
- dev_err(dev, "failed to create endpoint\n");
- err = -ENOMEM;
- goto out;
- }
+ ept = rpmsg_create_ept(rpdev, rpdrv->callback, NULL, chinfo);
+ if (!ept) {
+ dev_err(dev, "failed to create endpoint\n");
+ err = -ENOMEM;
+ goto out;
+ }
- rpdev->ept = ept;
- rpdev->src = ept->addr;
+ rpdev->ept = ept;
+ rpdev->src = ept->addr;
+ }
err = rpdrv->probe(rpdev);
if (err) {
dev_err(dev, "%s: failed: %d\n", __func__, err);
- rpmsg_destroy_ept(ept);
+ if (ept)
+ rpmsg_destroy_ept(ept);
goto out;
}
@@ -388,7 +391,8 @@ static int rpmsg_dev_remove(struct device *dev)
rpdrv->remove(rpdev);
- rpmsg_destroy_ept(rpdev->ept);
+ if (rpdev->ept)
+ rpmsg_destroy_ept(rpdev->ept);
return err;
}
--
2.5.0
^ permalink raw reply related
* [PATCH 2/5] rpmsg: Introduce a driver override mechanism
From: Bjorn Andersson @ 2016-10-08 4:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475900595-8375-1-git-send-email-bjorn.andersson@linaro.org>
Similar to other subsystems it's useful to provide a mechanism to force
a specific driver match on a device, so introduce this.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/rpmsg/rpmsg_core.c | 3 +++
include/linux/rpmsg.h | 2 ++
2 files changed, 5 insertions(+)
diff --git a/drivers/rpmsg/rpmsg_core.c b/drivers/rpmsg/rpmsg_core.c
index b6ea9ffa7381..087d4db896c8 100644
--- a/drivers/rpmsg/rpmsg_core.c
+++ b/drivers/rpmsg/rpmsg_core.c
@@ -315,6 +315,9 @@ static int rpmsg_dev_match(struct device *dev, struct device_driver *drv)
const struct rpmsg_device_id *ids = rpdrv->id_table;
unsigned int i;
+ if (rpdev->driver_override)
+ return !strcmp(rpdev->driver_override, drv->name);
+
if (ids)
for (i = 0; ids[i].name[0]; i++)
if (rpmsg_id_match(rpdev, &ids[i]))
diff --git a/include/linux/rpmsg.h b/include/linux/rpmsg.h
index 452d393cc8dd..7ad6c205f110 100644
--- a/include/linux/rpmsg.h
+++ b/include/linux/rpmsg.h
@@ -64,6 +64,7 @@ struct rpmsg_channel_info {
* rpmsg_device - device that belong to the rpmsg bus
* @dev: the device struct
* @id: device id (used to match between rpmsg drivers and devices)
+ * @driver_override: driver name to force a match
* @src: local address
* @dst: destination address
* @ept: the rpmsg endpoint of this channel
@@ -72,6 +73,7 @@ struct rpmsg_channel_info {
struct rpmsg_device {
struct device dev;
struct rpmsg_device_id id;
+ char *driver_override;
u32 src;
u32 dst;
struct rpmsg_endpoint *ept;
--
2.5.0
^ permalink raw reply related
* [PATCH 1/5] rpmsg: smd: Reduce restrictions when finding channel
From: Bjorn Andersson @ 2016-10-08 4:23 UTC (permalink / raw)
To: linux-arm-kernel
SMD channels are created by the remotes in "opening" state, but
sometimes as we close and try to reopen them they linger in closing
state.
Following the search for a matching channel the create_ept() will verify
that the channel is in a suitable state, so we can lax the restrictions
of the search function to work around above difference in behaviour.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/rpmsg/qcom_smd.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/rpmsg/qcom_smd.c b/drivers/rpmsg/qcom_smd.c
index 06fef2b4c814..92efa74a0024 100644
--- a/drivers/rpmsg/qcom_smd.c
+++ b/drivers/rpmsg/qcom_smd.c
@@ -820,20 +820,13 @@ qcom_smd_find_channel(struct qcom_smd_edge *edge, const char *name)
struct qcom_smd_channel *channel;
struct qcom_smd_channel *ret = NULL;
unsigned long flags;
- unsigned state;
spin_lock_irqsave(&edge->channels_lock, flags);
list_for_each_entry(channel, &edge->channels, list) {
- if (strcmp(channel->name, name))
- continue;
-
- state = GET_RX_CHANNEL_INFO(channel, state);
- if (state != SMD_CHANNEL_OPENING &&
- state != SMD_CHANNEL_OPENED)
- continue;
-
- ret = channel;
- break;
+ if (!strcmp(channel->name, name)) {
+ ret = channel;
+ break;
+ }
}
spin_unlock_irqrestore(&edge->channels_lock, flags);
--
2.5.0
^ permalink raw reply related
* [v12, 0/8] Fix eSDHC host version register bug
From: Y.B. Lu @ 2016-10-08 3:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474441040-11946-1-git-send-email-yangbo.lu@nxp.com>
Hi Uffe, Arnd and Scott,
Any comments on this latest patcheset?
Could we consider to merge it if no any other changes needed?
:)
Thanks.
Best regards,
Yangbo Lu
> -----Original Message-----
> From: Y.B. Lu
> Sent: Monday, September 26, 2016 11:15 AM
> To: linux-mmc at vger.kernel.org; ulf.hansson at linaro.org; Scott Wood; Arnd
> Bergmann
> Cc: linuxppc-dev at lists.ozlabs.org; devicetree at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org; linux-kernel at vger.kernel.org; linux-
> clk at vger.kernel.org; linux-i2c at vger.kernel.org; iommu at lists.linux-
> foundation.org; netdev at vger.kernel.org; Mark Rutland; Rob Herring;
> Russell King; Jochen Friedrich; Joerg Roedel; Claudiu Manoil; Bhupesh
> Sharma; Qiang Zhao; Kumar Gala; Santosh Shilimkar; Leo Li; X.B. Xie; M.H.
> Lian
> Subject: RE: [v12, 0/8] Fix eSDHC host version register bug
>
> Any comments about this version patchset ?
>
> :)
>
>
> > -----Original Message-----
> > From: Yangbo Lu [mailto:yangbo.lu at nxp.com]
> > Sent: Wednesday, September 21, 2016 2:57 PM
> > To: linux-mmc at vger.kernel.org; ulf.hansson at linaro.org; Scott Wood;
> > Arnd Bergmann
> > Cc: linuxppc-dev at lists.ozlabs.org; devicetree at vger.kernel.org;
> > linux-arm- kernel at lists.infradead.org; linux-kernel at vger.kernel.org;
> > linux- clk at vger.kernel.org; linux-i2c at vger.kernel.org;
> > iommu at lists.linux- foundation.org; netdev at vger.kernel.org; Mark
> > Rutland; Rob Herring; Russell King; Jochen Friedrich; Joerg Roedel;
> > Claudiu Manoil; Bhupesh Sharma; Qiang Zhao; Kumar Gala; Santosh
> Shilimkar; Leo Li; X.B. Xie; M.H.
> > Lian; Y.B. Lu
> > Subject: [v12, 0/8] Fix eSDHC host version register bug
> >
> > This patchset is used to fix a host version register bug in the T4240-
> > R1.0-R2.0 eSDHC controller. To match the SoC version and revision, 10
> > previous version patchsets had tried many methods but all of them were
> > rejected by reviewers.
> > Such as
> > - dts compatible method
> > - syscon method
> > - ifdef PPC method
> > - GUTS driver getting SVR method
> > Anrd suggested a soc_device_match method in v10, and this is the only
> > available method left now. This v11 patchset introduces the
> > soc_device_match interface in soc driver.
> >
> > The first six patches of Yangbo are to add the GUTS driver. This is
> > used to register a soc device which contain soc version and revision
> > information.
> > The other two patches introduce the soc_device_match method in soc
> > driver and apply it on esdhc driver to fix this bug.
> >
> > Arnd Bergmann (1):
> > base: soc: introduce soc_device_match() interface
> >
> > Yangbo Lu (7):
> > dt: bindings: update Freescale DCFG compatible
> > ARM64: dts: ls2080a: add device configuration node
> > dt: bindings: move guts devicetree doc out of powerpc directory
> > powerpc/fsl: move mpc85xx.h to include/linux/fsl
> > soc: fsl: add GUTS driver for QorIQ platforms
> > MAINTAINERS: add entry for Freescale SoC drivers
> > mmc: sdhci-of-esdhc: fix host version for T4240-R1.0-R2.0
> >
> > Documentation/devicetree/bindings/arm/fsl.txt | 6 +-
> > .../bindings/{powerpc => soc}/fsl/guts.txt | 3 +
> > MAINTAINERS | 11 +-
> > arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 6 +
> > arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
> > arch/powerpc/sysdev/fsl_pci.c | 2 +-
> > drivers/base/Kconfig | 1 +
> > drivers/base/soc.c | 66 ++++++
> > drivers/clk/clk-qoriq.c | 3 +-
> > drivers/i2c/busses/i2c-mpc.c | 2 +-
> > drivers/iommu/fsl_pamu.c | 3 +-
> > drivers/mmc/host/Kconfig | 1 +
> > drivers/mmc/host/sdhci-of-esdhc.c | 20 ++
> > drivers/net/ethernet/freescale/gianfar.c | 2 +-
> > drivers/soc/Kconfig | 2 +-
> > drivers/soc/fsl/Kconfig | 19 ++
> > drivers/soc/fsl/Makefile | 1 +
> > drivers/soc/fsl/guts.c | 257
> > +++++++++++++++++++++
> > include/linux/fsl/guts.h | 125 ++++++----
> > .../asm/mpc85xx.h => include/linux/fsl/svr.h | 4 +-
> > include/linux/sys_soc.h | 3 +
> > 21 files changed, 478 insertions(+), 61 deletions(-) rename
> > Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)
> > create mode 100644 drivers/soc/fsl/Kconfig create mode 100644
> > drivers/soc/fsl/guts.c rename arch/powerpc/include/asm/mpc85xx.h =>
> > include/linux/fsl/svr.h (97%)
> >
> > --
> > 2.1.0.27.g96db324
^ permalink raw reply
* [PATCH v2 2/2] ARM: dts: rockchip: Add rk3066 MK808 board
From: Shawn Lin @ 2016-10-08 3:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2320435.WKGs9crzlB@phil>
? 2016/10/7 18:01, Heiko Stuebner ??:
> Am Freitag, 7. Oktober 2016, 10:29:48 CEST schrieb Shawn Lin:
>> Hi Pawe? ,
>>
>> On 2016/10/7 1:38, Pawe? Jarosz wrote:
>>> MK808 is a tv stick which has rockchip rk3066 CPU inside, two usb ports
>>> - host and otg, micro sd card slot and onboard wifi RK901.
>>>
>>> Signed-off-by: Pawe? Jarosz <paweljarosz3691@gmail.com>
>>> ---
>>>
>>> Changes in v2:
>>> - included Heiko sugestion.
>>>
>>> Documentation/devicetree/bindings/arm/rockchip.txt | 4 +
>>> arch/arm/boot/dts/Makefile | 1 +
>>> arch/arm/boot/dts/rk3066a-mk808.dts | 184
>>> +++++++++++++++++++++ 3 files changed, 189 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/rk3066a-mk808.dts
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt
>>> b/Documentation/devicetree/bindings/arm/rockchip.txt index
>>> 55f388f..c09595b 100644
>>> --- a/Documentation/devicetree/bindings/arm/rockchip.txt
>>> +++ b/Documentation/devicetree/bindings/arm/rockchip.txt
>>> @@ -17,6 +17,10 @@ Rockchip platforms device tree bindings
>>>
>>> Required root node properties:
>>> - compatible = "chipspark,rayeager-px2", "rockchip,rk3066a";
>>>
>>> +- Rikomagic MK808 v1 board:
>>> + Required root node properties:
>>> + - compatible = "rikomagic,mk808", "rockchip,rk3066a";
>>> +
>>>
>>> - Radxa Rock board:
>>> Required root node properties:
>>> - compatible = "radxa,rock", "rockchip,rk3188";
>>>
>>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>>> index befcd26..f19cc1d 100644
>>> --- a/arch/arm/boot/dts/Makefile
>>> +++ b/arch/arm/boot/dts/Makefile
>>> @@ -639,6 +639,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
>>>
>>> rk3036-kylin.dtb \
>>> rk3066a-bqcurie2.dtb \
>>> rk3066a-marsboard.dtb \
>>>
>>> + rk3066a-mk808.dtb \
>>>
>>> rk3066a-rayeager.dtb \
>>> rk3188-radxarock.dtb \
>>> rk3228-evb.dtb \
>>>
>>> diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts
>>> b/arch/arm/boot/dts/rk3066a-mk808.dts new file mode 100644
>>> index 0000000..2878562
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/rk3066a-mk808.dts
>>> @@ -0,0 +1,184 @@
>>> +/*
>>> + * Copyright (c) 2016 Pawe? Jarosz <paweljarosz3691@gmail.com>
>>> + *
>>> + * This file is dual-licensed: you can use it either under the terms
>>> + * of the GPL or the X11 license, at your option. Note that this dual
>>> + * licensing only applies to this file, and not this project as a
>>> + * whole.
>>> + *
>>> + * a) This file is free software; you can redistribute it and/or
>>> + * modify it under the terms of the GNU General Public License as
>>> + * published by the Free Software Foundation; either version 2 of the
>>> + * License, or (at your option) any later version.
>>> + *
>>> + * This file is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> + * GNU General Public License for more details.
>>> + *
>>> + * Or, alternatively,
>>> + *
>>> + * b) Permission is hereby granted, free of charge, to any person
>>> + * obtaining a copy of this software and associated documentation
>>> + * files (the "Software"), to deal in the Software without
>>> + * restriction, including without limitation the rights to use,
>>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>>> + * sell copies of the Software, and to permit persons to whom the
>>> + * Software is furnished to do so, subject to the following
>>> + * conditions:
>>> + *
>>> + * The above copyright notice and this permission notice shall be
>>> + * included in all copies or substantial portions of the Software.
>>> + *
>>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>>> + * OTHER DEALINGS IN THE SOFTWARE.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +#include "rk3066a.dtsi"
>>> +
>>> +/ {
>>> + model = "Rikomagic MK808";
>>> + compatible = "rikomagic,mk808", "rockchip,rk3066a";
>>> +
>>> + chosen {
>>> + stdout-path = "serial2:115200n8";
>>> + };
>>> +
>>> + memory at 60000000 {
>>> + device_type = "memory";
>>> + reg = <0x60000000 0x40000000>;
>>> + };
>>> +
>>> + gpio-leds {
>>> + compatible = "gpio-leds";
>>> +
>>> + blue {
>>> + label = "mk808:blue:power";
>>> + gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
>>> + default-state = "off";
>>> + linux,default-trigger = "default-on";
>>> + };
>>> + };
>>> +
>>> + mmc_pwrseq: mmc-pwrseq {
>>> + compatible = "mmc-pwrseq-simple";
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&sdmmc_pwr>;
>>
>> sd slot does not contain a reset pin. So the power pin should be
>> enough. just add sdmmc_pwr to mmc0's pinctrl-0 and let mmc driver
>> control it should be enough. Typically pwrseq is for emmc and sdio.
>> We don't need a pwerseq to control power for sd slot..
>>
>> But it seems sdmmc_pwr is a GPIO, but not functional port.
>> So I am interesting that why MK808 board doesn't use the mmc
>> controller's default power pin but chosing another gpio, so finally
>> we have to add thses code for your DT.
>
> Actually, we always model the sd-mmc pwr-pin as gpio-based regulator (see
> sdmmc-regulator for example in the rk3066a-rayeager.dts), and specifiy this
> regulator as vmmc. That way the mmc core really can control the power.
yes it did. There are two ways for us to control vmmc properly.
If we use gpio-based regulator or PMIC, mmc core take over it
to control the power correctly. But if we use the dafault functional
port, namely SDMMC_PWREN, the dw_mmc driver could handle the control
when doing set_ios.. Both of these two could work fine. But I always
chose the latter one to simplify the dts.
Anyway, I won't insist on it if it looks okay to you. :)
>
>
> Heiko
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>
--
Best Regards
Shawn Lin
^ permalink raw reply
* [PATCH 7/10] mmc: sdhci-xenon: Add support to PHYs of Marvell Xenon SDHC
From: Shawn Lin @ 2016-10-08 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <e08ffb085d02a784b28456ac47fa4dc6540a9139.1475853198.git-series.gregory.clement@free-electrons.com>
? 2016/10/7 23:22, Gregory CLEMENT ??:
> From: Ziji Hu <huziji@marvell.com>
>
> Marvell Xenon eMMC/SD/SDIO Host Controller contains PHY.
> Three types of PHYs are supported.
>
> Add support to multiple types of PHYs init and configuration.
> Add register definitions of PHYs.
>
> Signed-off-by: Hu Ziji <huziji@marvell.com>
> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> MAINTAINERS | 1 +-
> drivers/mmc/host/Makefile | 2 +-
> drivers/mmc/host/sdhci-xenon-phy.c | 1141 +++++++++++++++++++++++++++++-
> drivers/mmc/host/sdhci-xenon-phy.h | 157 ++++-
> drivers/mmc/host/sdhci-xenon.c | 4 +-
> drivers/mmc/host/sdhci-xenon.h | 17 +-
> 6 files changed, 1321 insertions(+), 1 deletion(-)
> create mode 100644 drivers/mmc/host/sdhci-xenon-phy.c
> create mode 100644 drivers/mmc/host/sdhci-xenon-phy.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 859420e5dfd3..b5673c2ee5f2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7583,6 +7583,7 @@ M: Ziji Hu <huziji@marvell.com>
> L: linux-mmc at vger.kernel.org
> S: Supported
> F: drivers/mmc/host/sdhci-xenon.*
> +F: drivers/mmc/host/sdhci-xenon-phy.*
drivers/mmc/host/sdhci-xenon* shoube enough
> F: Documentation/devicetree/bindings/mmc/marvell,sdhci-xenon.txt
>
> MATROX FRAMEBUFFER DRIVER
> diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
> index 75eaf743486c..4f2854556ff7 100644
> --- a/drivers/mmc/host/Makefile
> +++ b/drivers/mmc/host/Makefile
> @@ -82,4 +82,4 @@ ifeq ($(CONFIG_CB710_DEBUG),y)
> endif
>
> obj-$(CONFIG_MMC_SDHCI_XENON) += sdhci-xenon-driver.o
> -sdhci-xenon-driver-y += sdhci-xenon.o
> +sdhci-xenon-driver-y += sdhci-xenon.o sdhci-xenon-phy.o
> diff --git a/drivers/mmc/host/sdhci-xenon-phy.c b/drivers/mmc/host/sdhci-xenon-phy.c
> new file mode 100644
> index 000000000000..4eb8fea1bec9
> --- /dev/null
> +++ b/drivers/mmc/host/sdhci-xenon-phy.c
Well, it's legit to use phy API and move your phy
operations to PHY subsystem. :)
> @@ -0,0 +1,1141 @@
> +/*
> + * PHY support for Xenon SDHC
> + *
> + * Copyright (C) 2016 Marvell, All Rights Reserved.
> + *
> + * Author: Hu Ziji <huziji@marvell.com>
> + * Date: 2016-8-24
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation version 2.
> + */
> +
> +#include <linux/slab.h>
> +#include <linux/delay.h>
> +#include <linux/of_address.h>
> +#include <linux/mmc/host.h>
> +#include <linux/mmc/mmc.h>
> +#include <linux/mmc/card.h>
> +#include <linux/mmc/sdio.h>
> +
> +#include "sdhci.h"
> +#include "sdhci-pltfm.h"
> +#include "sdhci-xenon.h"
> +
> +static const char * const phy_types[] = {
> + "sdh phy",
> + "emmc 5.0 phy",
> + "emmc 5.1 phy"
> +};
> +
> +enum phy_type_enum {
> + SDH_PHY,
> + EMMC_5_0_PHY,
> + EMMC_5_1_PHY,
> + NR_PHY_TYPES
> +};
> +
> +struct soc_pad_ctrl_table {
> + const char *soc;
> + void (*set_soc_pad)(struct sdhci_host *host,
> + unsigned char signal_voltage);
> +};
> +
> +struct soc_pad_ctrl {
> + /* Register address of SOC PHY PAD ctrl */
> + void __iomem *reg;
> + /* SOC PHY PAD ctrl type */
> + enum soc_pad_ctrl_type pad_type;
> + /* SOC specific operation to set SOC PHY PAD */
> + void (*set_soc_pad)(struct sdhci_host *host,
> + unsigned char signal_voltage);
> +};
> +
> +static struct xenon_emmc_phy_regs xenon_emmc_5_0_phy_regs = {
> + .timing_adj = EMMC_5_0_PHY_TIMING_ADJUST,
> + .func_ctrl = EMMC_5_0_PHY_FUNC_CONTROL,
> + .pad_ctrl = EMMC_5_0_PHY_PAD_CONTROL,
> + .pad_ctrl2 = EMMC_5_0_PHY_PAD_CONTROL2,
> + .dll_ctrl = EMMC_5_0_PHY_DLL_CONTROL,
> + .logic_timing_adj = EMMC_5_0_PHY_LOGIC_TIMING_ADJUST,
> + .delay_mask = EMMC_5_0_PHY_FIXED_DELAY_MASK,
> + .dll_update = DLL_UPDATE_STROBE_5_0,
> +};
> +
> +static struct xenon_emmc_phy_regs xenon_emmc_5_1_phy_regs = {
> + .timing_adj = EMMC_PHY_TIMING_ADJUST,
> + .func_ctrl = EMMC_PHY_FUNC_CONTROL,
> + .pad_ctrl = EMMC_PHY_PAD_CONTROL,
> + .pad_ctrl2 = EMMC_PHY_PAD_CONTROL2,
> + .dll_ctrl = EMMC_PHY_DLL_CONTROL,
> + .logic_timing_adj = EMMC_PHY_LOGIC_TIMING_ADJUST,
> + .delay_mask = EMMC_PHY_FIXED_DELAY_MASK,
> + .dll_update = DLL_UPDATE,
> +};
> +
> +static int xenon_delay_adj_test(struct mmc_card *card);
> +
> +/*
> + * eMMC PHY configuration and operations
> + */
> +struct emmc_phy_params {
> + bool slow_mode;
> +
> + u8 znr;
> + u8 zpr;
> +
> + /* Nr of consecutive Sampling Points of a Valid Sampling Window */
> + u8 nr_tun_times;
> + /* Divider for calculating Tuning Step */
> + u8 tun_step_divider;
> +
> + struct soc_pad_ctrl pad_ctrl;
> +};
> +
> +static void xenon_emmc_phy_strobe_delay_adj(struct sdhci_host *host,
> + struct mmc_card *card);
> +static int xenon_emmc_phy_fix_sampl_delay_adj(struct sdhci_host *host,
> + struct mmc_card *card);
> +static void xenon_emmc_phy_set(struct sdhci_host *host,
> + unsigned char timing);
> +static void xenon_emmc_set_soc_pad(struct sdhci_host *host,
> + unsigned char signal_voltage);
> +
> +static const struct xenon_phy_ops emmc_phy_ops = {
> + .strobe_delay_adj = xenon_emmc_phy_strobe_delay_adj,
> + .fix_sampl_delay_adj = xenon_emmc_phy_fix_sampl_delay_adj,
> + .phy_set = xenon_emmc_phy_set,
> + .set_soc_pad = xenon_emmc_set_soc_pad,
> +};
> +
> +static int alloc_emmc_phy(struct sdhci_xenon_priv *priv)
> +{
> + struct emmc_phy_params *params;
> +
> + params = kzalloc(sizeof(*params), GFP_KERNEL);
> + if (!params)
> + return -ENOMEM;
> +
> + priv->phy_params = params;
> + priv->phy_ops = &emmc_phy_ops;
> + if (priv->phy_type == EMMC_5_0_PHY)
> + priv->emmc_phy_regs = &xenon_emmc_5_0_phy_regs;
> + else
> + priv->emmc_phy_regs = &xenon_emmc_5_1_phy_regs;
> +
> + return 0;
> +}
> +
> +static int xenon_emmc_phy_init(struct sdhci_host *host)
> +{
> + u32 reg;
> + u32 wait, clock;
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs;
> +
> + reg = sdhci_readl(host, phy_regs->timing_adj);
> + reg |= PHY_INITIALIZAION;
> + sdhci_writel(host, reg, phy_regs->timing_adj);
> +
> + /* Add duration of FC_SYNC_RST */
> + wait = ((reg >> FC_SYNC_RST_DURATION_SHIFT) &
> + FC_SYNC_RST_DURATION_MASK);
> + /* Add interval between FC_SYNC_EN and FC_SYNC_RST */
> + wait += ((reg >> FC_SYNC_RST_EN_DURATION_SHIFT) &
> + FC_SYNC_RST_EN_DURATION_MASK);
> + /* Add duration of asserting FC_SYNC_EN */
> + wait += ((reg >> FC_SYNC_EN_DURATION_SHIFT) &
> + FC_SYNC_EN_DURATION_MASK);
> + /* Add duration of waiting for PHY */
> + wait += ((reg >> WAIT_CYCLE_BEFORE_USING_SHIFT) &
> + WAIT_CYCLE_BEFORE_USING_MASK);
> + /* 4 addtional bus clock and 4 AXI bus clock are required */
> + wait += 8;
> + wait <<= 20;
> +
> + clock = host->clock;
> + if (!clock)
> + /* Use the possibly slowest bus frequency value */
> + clock = LOWEST_SDCLK_FREQ;
> + /* get the wait time */
> + wait /= clock;
> + wait++;
> + /* wait for host eMMC PHY init completes */
> + udelay(wait);
> +
> + reg = sdhci_readl(host, phy_regs->timing_adj);
> + reg &= PHY_INITIALIZAION;
> + if (reg) {
> + dev_err(mmc_dev(host->mmc), "eMMC PHY init cannot complete after %d us\n",
> + wait);
> + return -ETIMEDOUT;
> + }
> +
> + return 0;
> +}
> +
> +#define ARMADA_3700_SOC_PAD_1_8V 0x1
> +#define ARMADA_3700_SOC_PAD_3_3V 0x0
> +
> +static void armada_3700_soc_pad_voltage_set(struct sdhci_host *host,
> + unsigned char signal_voltage)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + struct emmc_phy_params *params = priv->phy_params;
> +
> + if (params->pad_ctrl.pad_type == SOC_PAD_FIXED_1_8V) {
> + writel(ARMADA_3700_SOC_PAD_1_8V, params->pad_ctrl.reg);
> + } else if (params->pad_ctrl.pad_type == SOC_PAD_SD) {
> + if (signal_voltage == MMC_SIGNAL_VOLTAGE_180)
> + writel(ARMADA_3700_SOC_PAD_1_8V, params->pad_ctrl.reg);
> + else if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
> + writel(ARMADA_3700_SOC_PAD_3_3V, params->pad_ctrl.reg);
> + }
> +}
> +
> +static void xenon_emmc_set_soc_pad(struct sdhci_host *host,
> + unsigned char signal_voltage)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + struct emmc_phy_params *params = priv->phy_params;
> +
> + if (!params->pad_ctrl.reg)
> + return;
> +
> + if (params->pad_ctrl.set_soc_pad)
> + params->pad_ctrl.set_soc_pad(host, signal_voltage);
> +}
> +
> +static int emmc_phy_set_fix_sampl_delay(struct sdhci_host *host,
> + unsigned int delay,
> + bool invert,
> + bool delay_90_degree)
> +{
> + u32 reg;
> + unsigned long flags;
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs;
> + int ret = 0;
> +
> + spin_lock_irqsave(&host->lock, flags);
> +
> + /* Setup Sampling fix delay */
> + reg = sdhci_readl(host, SDHC_SLOT_OP_STATUS_CTRL);
> + reg &= ~phy_regs->delay_mask;
> + reg |= delay & phy_regs->delay_mask;
> + sdhci_writel(host, reg, SDHC_SLOT_OP_STATUS_CTRL);
> +
> + if (priv->phy_type == EMMC_5_0_PHY) {
> + /* set 90 degree phase if necessary */
> + reg &= ~DELAY_90_DEGREE_MASK_EMMC5;
> + reg |= (delay_90_degree << DELAY_90_DEGREE_SHIFT_EMMC5);
> + sdhci_writel(host, reg, SDHC_SLOT_OP_STATUS_CTRL);
> + }
> +
> + /* Disable SDCLK */
> + reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL);
> + reg &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
> + sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL);
> +
> + udelay(200);
> +
> + if (priv->phy_type == EMMC_5_1_PHY) {
> + /* set 90 degree phase if necessary */
> + reg = sdhci_readl(host, EMMC_PHY_FUNC_CONTROL);
> + reg &= ~ASYNC_DDRMODE_MASK;
> + reg |= (delay_90_degree << ASYNC_DDRMODE_SHIFT);
> + sdhci_writel(host, reg, EMMC_PHY_FUNC_CONTROL);
> + }
> +
> + /* Setup Inversion of Sampling edge */
> + reg = sdhci_readl(host, phy_regs->timing_adj);
> + reg &= ~SAMPL_INV_QSP_PHASE_SELECT;
> + reg |= (invert << SAMPL_INV_QSP_PHASE_SELECT_SHIFT);
> + sdhci_writel(host, reg, phy_regs->timing_adj);
> +
> + /* Enable SD internal clock */
> + ret = enable_xenon_internal_clk(host);
> + if (ret)
> + goto out;
> +
> + /* Enable SDCLK */
> + reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL);
> + reg |= SDHCI_CLOCK_CARD_EN;
> + sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL);
> +
> + udelay(200);
> +
> + /*
> + * Has to re-initialize eMMC PHY here to active PHY
> + * because later get status cmd will be issued.
> + */
> + ret = xenon_emmc_phy_init(host);
> +
> +out:
> + spin_unlock_irqrestore(&host->lock, flags);
> + return ret;
> +}
> +
> +static int emmc_phy_do_fix_sampl_delay(struct sdhci_host *host,
> + struct mmc_card *card,
> + unsigned int delay,
> + bool invert, bool quarter)
> +{
> + int ret;
> +
> + emmc_phy_set_fix_sampl_delay(host, delay, invert, quarter);
> +
> + ret = xenon_delay_adj_test(card);
> + if (ret) {
> + dev_dbg(mmc_dev(host->mmc),
> + "fail when sampling fix delay = %d, phase = %d degree\n",
> + delay, invert * 180 + quarter * 90);
> + return -1;
> + }
> + return 0;
> +}
> +
> +static int xenon_emmc_phy_fix_sampl_delay_adj(struct sdhci_host *host,
> + struct mmc_card *card)
> +{
> + enum sampl_fix_delay_phase phase;
> + int idx, nr_pair;
> + int ret;
> + unsigned int delay;
> + unsigned int min_delay, max_delay;
> + bool invert, quarter;
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs;
> + u32 coarse_step, fine_step;
> + const enum sampl_fix_delay_phase delay_edge[] = {
> + PHASE_0_DEGREE,
> + PHASE_180_DEGREE,
> + PHASE_90_DEGREE,
> + PHASE_270_DEGREE
> + };
> +
> + coarse_step = phy_regs->delay_mask >> 1;
> + fine_step = coarse_step >> 2;
> +
> + nr_pair = ARRAY_SIZE(delay_edge);
> +
> + for (idx = 0; idx < nr_pair; idx++) {
> + phase = delay_edge[idx];
> + invert = (phase & 0x2) ? true : false;
> + quarter = (phase & 0x1) ? true : false;
> +
> + /* increase delay value to get fix delay */
> + for (min_delay = 0;
> + min_delay <= phy_regs->delay_mask;
> + min_delay += coarse_step) {
> + ret = emmc_phy_do_fix_sampl_delay(host, card, min_delay,
> + invert, quarter);
> + if (!ret)
> + break;
> + }
> +
> + if (ret) {
> + dev_dbg(mmc_dev(host->mmc),
> + "Fail to set Sampling Fixed Delay with phase = %d degree\n",
> + phase * 90);
> + continue;
> + }
> +
> + for (max_delay = min_delay + fine_step;
> + max_delay < phy_regs->delay_mask;
> + max_delay += fine_step) {
> + ret = emmc_phy_do_fix_sampl_delay(host, card, max_delay,
> + invert, quarter);
> + if (ret) {
> + max_delay -= fine_step;
> + break;
> + }
> + }
> +
> + if (!ret) {
> + ret = emmc_phy_do_fix_sampl_delay(host, card,
> + phy_regs->delay_mask,
> + invert, quarter);
> + if (!ret)
> + max_delay = phy_regs->delay_mask;
> + }
> +
> + /*
> + * Sampling Fixed Delay line window should be large enough,
> + * thus the sampling point (the middle of the window)
> + * can work when environment varies.
> + * However, there is no clear conclusion how large the window
> + * should be.
> + */
> + if ((max_delay - min_delay) <=
> + EMMC_PHY_FIXED_DELAY_WINDOW_MIN) {
> + dev_info(mmc_dev(host->mmc),
> + "The window size %d with phase = %d degree is too small\n",
> + max_delay - min_delay, phase * 90);
> + continue;
> + }
> +
> + delay = (min_delay + max_delay) / 2;
> + emmc_phy_set_fix_sampl_delay(host, delay, invert, quarter);
> + dev_dbg(mmc_dev(host->mmc),
> + "sampling fix delay = %d with phase = %d degree\n",
> + delay, phase * 90);
> + return 0;
> + }
> +
> + return -EIO;
> +}
> +
> +static int xenon_emmc_phy_enable_dll(struct sdhci_host *host)
> +{
> + u32 reg;
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs;
> + u8 timeout;
> +
> + if (WARN_ON(host->clock <= MMC_HIGH_52_MAX_DTR))
> + return -EINVAL;
> +
> + reg = sdhci_readl(host, phy_regs->dll_ctrl);
> + if (reg & DLL_ENABLE)
> + return 0;
> +
> + /* Enable DLL */
> + reg = sdhci_readl(host, phy_regs->dll_ctrl);
> + reg |= (DLL_ENABLE | DLL_FAST_LOCK);
> +
> + /*
> + * Set Phase as 90 degree, which is most common value.
> + * Might set another value if necessary.
> + * The granularity is 1 degree.
> + */
> + reg &= ~((DLL_PHASE_MASK << DLL_PHSEL0_SHIFT) |
> + (DLL_PHASE_MASK << DLL_PHSEL1_SHIFT));
> + reg |= ((DLL_PHASE_90_DEGREE << DLL_PHSEL0_SHIFT) |
> + (DLL_PHASE_90_DEGREE << DLL_PHSEL1_SHIFT));
> +
> + reg &= ~DLL_BYPASS_EN;
> + reg |= phy_regs->dll_update;
> + if (priv->phy_type == EMMC_5_1_PHY)
> + reg &= ~DLL_REFCLK_SEL;
> + sdhci_writel(host, reg, phy_regs->dll_ctrl);
> +
> + /* Wait max 32 ms */
> + timeout = 32;
> + while (!(sdhci_readw(host, SDHC_SLOT_EXT_PRESENT_STATE) & LOCK_STATE)) {
> + if (!timeout) {
> + dev_err(mmc_dev(host->mmc), "Wait for DLL Lock time-out\n");
> + return -ETIMEDOUT;
> + }
> + timeout--;
> + mdelay(1);
> + }
> + return 0;
> +}
> +
> +static int __emmc_phy_config_tuning(struct sdhci_host *host)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + struct emmc_phy_params *params = priv->phy_params;
> + u32 reg, tuning_step;
> + int ret;
> + unsigned long flags;
> +
> + if (WARN_ON(host->clock <= MMC_HIGH_52_MAX_DTR))
> + return -EINVAL;
> +
> + spin_lock_irqsave(&host->lock, flags);
> +
> + ret = xenon_emmc_phy_enable_dll(host);
> + if (ret) {
> + spin_unlock_irqrestore(&host->lock, flags);
> + return ret;
> + }
> +
> + reg = sdhci_readl(host, SDHC_SLOT_DLL_CUR_DLY_VAL);
> + tuning_step = reg / params->tun_step_divider;
> + if (unlikely(tuning_step > TUNING_STEP_MASK)) {
> + dev_warn(mmc_dev(host->mmc),
> + "HS200 TUNING_STEP %d is larger than MAX value\n",
> + tuning_step);
> + tuning_step = TUNING_STEP_MASK;
> + }
> +
> + reg = sdhci_readl(host, SDHC_SLOT_OP_STATUS_CTRL);
> + reg &= ~(TUN_CONSECUTIVE_TIMES_MASK << TUN_CONSECUTIVE_TIMES_SHIFT);
> + reg |= (params->nr_tun_times << TUN_CONSECUTIVE_TIMES_SHIFT);
> + reg &= ~(TUNING_STEP_MASK << TUNING_STEP_SHIFT);
> + reg |= (tuning_step << TUNING_STEP_SHIFT);
> + sdhci_writel(host, reg, SDHC_SLOT_OP_STATUS_CTRL);
> +
> + spin_unlock_irqrestore(&host->lock, flags);
> + return 0;
> +}
> +
> +static int xenon_emmc_phy_config_tuning(struct sdhci_host *host)
> +{
> + return __emmc_phy_config_tuning(host);
> +}
> +
> +static void xenon_emmc_phy_strobe_delay_adj(struct sdhci_host *host,
> + struct mmc_card *card)
> +{
> + u32 reg;
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + unsigned long flags;
> +
> + if (host->clock <= MMC_HIGH_52_MAX_DTR)
> + return;
> +
> + dev_dbg(mmc_dev(host->mmc), "starts HS400 strobe delay adjustment\n");
> +
> + spin_lock_irqsave(&host->lock, flags);
> +
> + xenon_emmc_phy_enable_dll(host);
> +
> + /* Enable SDHC Data Strobe */
> + reg = sdhci_readl(host, SDHC_SLOT_EMMC_CTRL);
> + reg |= ENABLE_DATA_STROBE;
> + sdhci_writel(host, reg, SDHC_SLOT_EMMC_CTRL);
> +
> + /* Set Data Strobe Pull down */
> + if (priv->phy_type == EMMC_5_0_PHY) {
> + reg = sdhci_readl(host, EMMC_5_0_PHY_PAD_CONTROL);
> + reg |= EMMC5_FC_QSP_PD;
> + reg &= ~EMMC5_FC_QSP_PU;
> + sdhci_writel(host, reg, EMMC_5_0_PHY_PAD_CONTROL);
> + } else {
> + reg = sdhci_readl(host, EMMC_PHY_PAD_CONTROL1);
> + reg |= EMMC5_1_FC_QSP_PD;
> + reg &= ~EMMC5_1_FC_QSP_PU;
> + sdhci_writel(host, reg, EMMC_PHY_PAD_CONTROL1);
> + }
> + spin_unlock_irqrestore(&host->lock, flags);
> +}
> +
> +#define LOGIC_TIMING_VALUE 0x00AA8977
> +
> +static void xenon_emmc_phy_set(struct sdhci_host *host,
> + unsigned char timing)
> +{
> + u32 reg;
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + struct emmc_phy_params *params = priv->phy_params;
> + struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs;
> + struct mmc_card *card = priv->card_candidate;
> + unsigned long flags;
> +
> + dev_dbg(mmc_dev(host->mmc), "eMMC PHY setting starts\n");
> +
> + spin_lock_irqsave(&host->lock, flags);
> +
> + /* Setup pad, set bit[28] and bits[26:24] */
> + reg = sdhci_readl(host, phy_regs->pad_ctrl);
> + reg |= (FC_DQ_RECEN | FC_CMD_RECEN | FC_QSP_RECEN | OEN_QSN);
> + /*
> + * All FC_XX_RECEIVCE should be set as CMOS Type
> + */
> + reg |= FC_ALL_CMOS_RECEIVER;
> + sdhci_writel(host, reg, phy_regs->pad_ctrl);
> +
> + /* Set CMD and DQ Pull Up */
> + if (priv->phy_type == EMMC_5_0_PHY) {
> + reg = sdhci_readl(host, EMMC_5_0_PHY_PAD_CONTROL);
> + reg |= (EMMC5_FC_CMD_PU | EMMC5_FC_DQ_PU);
> + reg &= ~(EMMC5_FC_CMD_PD | EMMC5_FC_DQ_PD);
> + sdhci_writel(host, reg, EMMC_5_0_PHY_PAD_CONTROL);
> + } else {
> + reg = sdhci_readl(host, EMMC_PHY_PAD_CONTROL1);
> + reg |= (EMMC5_1_FC_CMD_PU | EMMC5_1_FC_DQ_PU);
> + reg &= ~(EMMC5_1_FC_CMD_PD | EMMC5_1_FC_DQ_PD);
> + sdhci_writel(host, reg, EMMC_PHY_PAD_CONTROL1);
> + }
> +
> + if ((timing == MMC_TIMING_LEGACY) || !card)
> + goto phy_init;
> +
> + /*
> + * FIXME: should depends on the specific board timing.
> + */
> + if ((timing == MMC_TIMING_MMC_HS400) ||
> + (timing == MMC_TIMING_MMC_HS200) ||
> + (timing == MMC_TIMING_UHS_SDR50) ||
> + (timing == MMC_TIMING_UHS_SDR104) ||
> + (timing == MMC_TIMING_UHS_DDR50) ||
> + (timing == MMC_TIMING_UHS_SDR25) ||
> + (timing == MMC_TIMING_MMC_DDR52)) {
> + reg = sdhci_readl(host, phy_regs->timing_adj);
> + reg &= ~OUTPUT_QSN_PHASE_SELECT;
> + sdhci_writel(host, reg, phy_regs->timing_adj);
> + }
> +
> + /*
> + * If SDIO card, set SDIO Mode
> + * Otherwise, clear SDIO Mode and Slow Mode
> + */
> + if (mmc_card_sdio(card)) {
> + reg = sdhci_readl(host, phy_regs->timing_adj);
> + reg |= TIMING_ADJUST_SDIO_MODE;
> +
> + if ((timing == MMC_TIMING_UHS_SDR25) ||
> + (timing == MMC_TIMING_UHS_SDR12) ||
> + (timing == MMC_TIMING_SD_HS) ||
> + (timing == MMC_TIMING_LEGACY))
> + reg |= TIMING_ADJUST_SLOW_MODE;
> +
> + sdhci_writel(host, reg, phy_regs->timing_adj);
> + } else {
> + reg = sdhci_readl(host, phy_regs->timing_adj);
> + reg &= ~(TIMING_ADJUST_SDIO_MODE | TIMING_ADJUST_SLOW_MODE);
> + sdhci_writel(host, reg, phy_regs->timing_adj);
> + }
> +
> + if (((timing == MMC_TIMING_UHS_SDR50) ||
> + (timing == MMC_TIMING_UHS_SDR25) ||
> + (timing == MMC_TIMING_UHS_SDR12) ||
> + (timing == MMC_TIMING_SD_HS) ||
> + (timing == MMC_TIMING_MMC_HS) ||
> + (timing == MMC_TIMING_LEGACY)) && params->slow_mode) {
> + reg = sdhci_readl(host, phy_regs->timing_adj);
> + reg |= TIMING_ADJUST_SLOW_MODE;
> + sdhci_writel(host, reg, phy_regs->timing_adj);
> + }
> +
> + /*
> + * Set preferred ZNR and ZPR value
> + * The ZNR and ZPR value vary between different boards.
> + * Define them both in sdhci-xenon-emmc-phy.h.
> + */
> + reg = sdhci_readl(host, phy_regs->pad_ctrl2);
> + reg &= ~((ZNR_MASK << ZNR_SHIFT) | ZPR_MASK);
> + reg |= ((params->znr << ZNR_SHIFT) | params->zpr);
> + sdhci_writel(host, reg, phy_regs->pad_ctrl2);
> +
> + /*
> + * When setting EMMC_PHY_FUNC_CONTROL register,
> + * SD clock should be disabled
> + */
> + reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL);
> + reg &= ~SDHCI_CLOCK_CARD_EN;
> + sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL);
> +
> + if ((timing == MMC_TIMING_UHS_DDR50) ||
> + (timing == MMC_TIMING_MMC_HS400) ||
> + (timing == MMC_TIMING_MMC_DDR52)) {
> + reg = sdhci_readl(host, phy_regs->func_ctrl);
> + reg |= (DQ_DDR_MODE_MASK << DQ_DDR_MODE_SHIFT) | CMD_DDR_MODE;
> + sdhci_writel(host, reg, phy_regs->func_ctrl);
> + }
> +
> + if (timing == MMC_TIMING_MMC_HS400) {
> + reg = sdhci_readl(host, phy_regs->func_ctrl);
> + reg &= ~DQ_ASYNC_MODE;
> + sdhci_writel(host, reg, phy_regs->func_ctrl);
> + }
> +
> + /* Enable bus clock */
> + reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL);
> + reg |= SDHCI_CLOCK_CARD_EN;
> + sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL);
> +
> + if (timing == MMC_TIMING_MMC_HS400)
> + /* Hardware team recommend a value for HS400 */
> + sdhci_writel(host, LOGIC_TIMING_VALUE,
> + phy_regs->logic_timing_adj);
> +
> +phy_init:
> + xenon_emmc_phy_init(host);
> +
> + spin_unlock_irqrestore(&host->lock, flags);
> +
> + dev_dbg(mmc_dev(host->mmc), "eMMC PHY setting completes\n");
> +}
> +
> +static int get_dt_pad_ctrl_data(struct sdhci_host *host,
> + struct device_node *np,
> + struct emmc_phy_params *params)
> +{
> + int ret = 0;
> + const char *name;
> + struct resource iomem;
> +
> + if (of_device_is_compatible(np, "marvell,armada-3700-sdhci"))
> + params->pad_ctrl.set_soc_pad = armada_3700_soc_pad_voltage_set;
> + else
> + return 0;
> +
> + if (of_address_to_resource(np, 1, &iomem)) {
> + dev_err(mmc_dev(host->mmc), "Unable to find SOC PAD ctrl register address for %s\n",
> + np->name);
> + return -EINVAL;
> + }
> +
> + params->pad_ctrl.reg = devm_ioremap_resource(mmc_dev(host->mmc),
> + &iomem);
> + if (IS_ERR(params->pad_ctrl.reg)) {
> + dev_err(mmc_dev(host->mmc), "Unable to get SOC PHY PAD ctrl regiser for %s\n",
> + np->name);
> + return PTR_ERR(params->pad_ctrl.reg);
> + }
> +
> + ret = of_property_read_string(np, "xenon,pad-type", &name);
> + if (ret) {
> + dev_err(mmc_dev(host->mmc), "Unable to determine SOC PHY PAD ctrl type\n");
> + return ret;
> + }
> + if (!strcmp(name, "sd")) {
> + params->pad_ctrl.pad_type = SOC_PAD_SD;
> + } else if (!strcmp(name, "fixed-1-8v")) {
> + params->pad_ctrl.pad_type = SOC_PAD_FIXED_1_8V;
> + } else {
> + dev_err(mmc_dev(host->mmc), "Unsupported SOC PHY PAD ctrl type %s\n",
> + name);
> + return -EINVAL;
> + }
> +
> + return ret;
> +}
> +
> +static int emmc_phy_parse_param_dt(struct sdhci_host *host,
> + struct device_node *np,
> + struct emmc_phy_params *params)
> +{
> + u32 value;
> +
> + if (of_property_read_bool(np, "xenon,phy-slow-mode"))
> + params->slow_mode = true;
> + else
> + params->slow_mode = false;
> +
> + if (!of_property_read_u32(np, "xenon,phy-znr", &value))
> + params->znr = value & ZNR_MASK;
> + else
> + params->znr = ZNR_DEF_VALUE;
> +
> + if (!of_property_read_u32(np, "xenon,phy-zpr", &value))
> + params->zpr = value & ZPR_MASK;
> + else
> + params->zpr = ZPR_DEF_VALUE;
> +
> + if (!of_property_read_u32(np, "xenon,phy-nr-tun-times", &value))
> + params->nr_tun_times = value & TUN_CONSECUTIVE_TIMES_MASK;
> + else
> + params->nr_tun_times = TUN_CONSECUTIVE_TIMES;
> +
> + if (!of_property_read_u32(np, "xenon,phy-tun-step-divider", &value))
> + params->tun_step_divider = value & 0xFF;
> + else
> + params->tun_step_divider = TUNING_STEP_DIVIDER;
> +
> + return get_dt_pad_ctrl_data(host, np, params);
> +}
> +
> +/*
> + * SDH PHY configuration and operations
> + */
> +static int xenon_sdh_phy_set_fix_sampl_delay(struct sdhci_host *host,
> + unsigned int delay, bool invert)
> +{
> + u32 reg;
> + unsigned long flags;
> + int ret;
> +
> + if (invert)
> + invert = 0x1;
> + else
> + invert = 0x0;
> +
> + spin_lock_irqsave(&host->lock, flags);
> +
> + /* Disable SDCLK */
> + reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL);
> + reg &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
> + sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL);
> +
> + udelay(200);
> +
> + /* Setup Sampling fix delay */
> + reg = sdhci_readl(host, SDHC_SLOT_OP_STATUS_CTRL);
> + reg &= ~(SDH_PHY_FIXED_DELAY_MASK |
> + (0x1 << FORCE_SEL_INVERSE_CLK_SHIFT));
> + reg |= ((delay & SDH_PHY_FIXED_DELAY_MASK) |
> + (invert << FORCE_SEL_INVERSE_CLK_SHIFT));
> + sdhci_writel(host, reg, SDHC_SLOT_OP_STATUS_CTRL);
> +
> + /* Enable SD internal clock */
> + ret = enable_xenon_internal_clk(host);
> +
> + /* Enable SDCLK */
> + reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL);
> + reg |= SDHCI_CLOCK_CARD_EN;
> + sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL);
> +
> + udelay(200);
> +
> + spin_unlock_irqrestore(&host->lock, flags);
> + return ret;
> +}
> +
> +static int sdh_phy_do_fix_sampl_delay(struct sdhci_host *host,
> + struct mmc_card *card,
> + unsigned int delay, bool invert)
> +{
> + int ret;
> +
> + xenon_sdh_phy_set_fix_sampl_delay(host, delay, invert);
> +
> + ret = xenon_delay_adj_test(card);
> + if (ret) {
> + dev_dbg(mmc_dev(host->mmc),
> + "fail when sampling fix delay = %d, phase = %d degree\n",
> + delay, invert * 180);
> + return -1;
> + }
> + return 0;
> +}
> +
> +#define SDH_PHY_COARSE_FIX_DELAY (SDH_PHY_FIXED_DELAY_MASK / 2)
> +#define SDH_PHY_FINE_FIX_DELAY (SDH_PHY_COARSE_FIX_DELAY / 4)
> +
> +static int xenon_sdh_phy_fix_sampl_delay_adj(struct sdhci_host *host,
> + struct mmc_card *card)
> +{
> + u32 reg;
> + bool dll_enable = false;
> + unsigned int min_delay, max_delay, delay;
> + const bool sampl_edge[] = {
> + false,
> + true,
> + };
> + int i, nr;
> + int ret;
> +
> + if (host->clock > HIGH_SPEED_MAX_DTR) {
> + /* Enable DLL when SDCLK is higher than 50MHz */
> + reg = sdhci_readl(host, SDH_PHY_SLOT_DLL_CTRL);
> + if (!(reg & SDH_PHY_ENABLE_DLL)) {
> + reg |= (SDH_PHY_ENABLE_DLL | SDH_PHY_FAST_LOCK_EN);
> + sdhci_writel(host, reg, SDH_PHY_SLOT_DLL_CTRL);
> + mdelay(1);
> +
> + reg = sdhci_readl(host, SDH_PHY_SLOT_DLL_PHASE_SEL);
> + reg |= SDH_PHY_DLL_UPDATE_TUNING;
> + sdhci_writel(host, reg, SDH_PHY_SLOT_DLL_PHASE_SEL);
> + }
> + dll_enable = true;
> + }
> +
> + nr = dll_enable ? ARRAY_SIZE(sampl_edge) : 1;
> + for (i = 0; i < nr; i++) {
> + for (min_delay = 0; min_delay <= SDH_PHY_FIXED_DELAY_MASK;
> + min_delay += SDH_PHY_COARSE_FIX_DELAY) {
> + ret = sdh_phy_do_fix_sampl_delay(host, card, min_delay,
> + sampl_edge[i]);
> + if (!ret)
> + break;
> + }
> +
> + if (ret) {
> + dev_dbg(mmc_dev(host->mmc),
> + "Fail to set Fixed Sampling Delay with %s edge\n",
> + sampl_edge[i] ? "negative" : "positive");
> + continue;
> + }
> +
> + for (max_delay = min_delay + SDH_PHY_FINE_FIX_DELAY;
> + max_delay < SDH_PHY_FIXED_DELAY_MASK;
> + max_delay += SDH_PHY_FINE_FIX_DELAY) {
> + ret = sdh_phy_do_fix_sampl_delay(host, card, max_delay,
> + sampl_edge[i]);
> + if (ret) {
> + max_delay -= SDH_PHY_FINE_FIX_DELAY;
> + break;
> + }
> + }
> +
> + if (!ret) {
> + delay = SDH_PHY_FIXED_DELAY_MASK;
> + ret = sdh_phy_do_fix_sampl_delay(host, card, delay,
> + sampl_edge[i]);
> + if (!ret)
> + max_delay = SDH_PHY_FIXED_DELAY_MASK;
> + }
> +
> + if ((max_delay - min_delay) <= SDH_PHY_FIXED_DELAY_WINDOW_MIN) {
> + dev_info(mmc_dev(host->mmc),
> + "The window size %d with %s edge is too small\n",
> + max_delay - min_delay,
> + sampl_edge[i] ? "negative" : "positive");
> + continue;
> + }
> +
> + delay = (min_delay + max_delay) / 2;
> + xenon_sdh_phy_set_fix_sampl_delay(host, delay, sampl_edge[i]);
> + dev_dbg(mmc_dev(host->mmc), "sampling fix delay = %d with %s edge\n",
> + delay, sampl_edge[i] ? "negative" : "positive");
> + return 0;
> + }
> + return -EIO;
> +}
> +
> +static const struct xenon_phy_ops sdh_phy_ops = {
> + .fix_sampl_delay_adj = xenon_sdh_phy_fix_sampl_delay_adj,
> +};
> +
> +static int alloc_sdh_phy(struct sdhci_xenon_priv *priv)
> +{
> + priv->phy_params = NULL;
> + priv->phy_ops = &sdh_phy_ops;
> + return 0;
> +}
> +
> +/*
> + * Common functions for all PHYs
> + */
> +void xenon_soc_pad_ctrl(struct sdhci_host *host,
> + unsigned char signal_voltage)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> +
> + if (priv->phy_ops->set_soc_pad)
> + priv->phy_ops->set_soc_pad(host, signal_voltage);
> +}
> +
> +static int __xenon_emmc_delay_adj_test(struct mmc_card *card)
> +{
> + int err;
> + u8 *ext_csd = NULL;
> +
> + err = mmc_get_ext_csd(card, &ext_csd);
> + kfree(ext_csd);
> +
> + return err;
> +}
> +
> +static int __xenon_sdio_delay_adj_test(struct mmc_card *card)
> +{
> + struct mmc_command cmd = {0};
> + int err;
> +
> + cmd.opcode = SD_IO_RW_DIRECT;
> + cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
> +
> + err = mmc_wait_for_cmd(card->host, &cmd, 0);
> + if (err)
> + return err;
> +
> + if (cmd.resp[0] & R5_ERROR)
> + return -EIO;
> + if (cmd.resp[0] & R5_FUNCTION_NUMBER)
> + return -EINVAL;
> + if (cmd.resp[0] & R5_OUT_OF_RANGE)
> + return -ERANGE;
> + return 0;
> +}
> +
> +static int __xenon_sd_delay_adj_test(struct mmc_card *card)
> +{
> + struct mmc_command cmd = {0};
> + int err;
> +
> + cmd.opcode = MMC_SEND_STATUS;
> + cmd.arg = card->rca << 16;
> + cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
> +
> + err = mmc_wait_for_cmd(card->host, &cmd, 0);
> + return err;
> +}
> +
> +static int xenon_delay_adj_test(struct mmc_card *card)
> +{
> + WARN_ON(!card);
> + WARN_ON(!card->host);
> +
> + if (mmc_card_mmc(card))
> + return __xenon_emmc_delay_adj_test(card);
> + else if (mmc_card_sd(card))
> + return __xenon_sd_delay_adj_test(card);
> + else if (mmc_card_sdio(card))
> + return __xenon_sdio_delay_adj_test(card);
> + else
> + return -EINVAL;
> +}
> +
> +static void xenon_phy_set(struct sdhci_host *host, unsigned char timing)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> +
> + if (priv->phy_ops->phy_set)
> + priv->phy_ops->phy_set(host, timing);
> +}
> +
> +static void xenon_hs400_strobe_delay_adj(struct sdhci_host *host,
> + struct mmc_card *card)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> +
> + if (WARN_ON(!mmc_card_hs400(card)))
> + return;
> +
> + /* Enable the DLL to automatically adjust HS400 strobe delay.
> + */
> + if (priv->phy_ops->strobe_delay_adj)
> + priv->phy_ops->strobe_delay_adj(host, card);
> +}
> +
> +static int xenon_fix_sampl_delay_adj(struct sdhci_host *host,
> + struct mmc_card *card)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> +
> + if (priv->phy_ops->fix_sampl_delay_adj)
> + return priv->phy_ops->fix_sampl_delay_adj(host, card);
> +
> + return 0;
> +}
> +
> +/*
> + * xenon_delay_adj should not be called inside IRQ context,
> + * either Hard IRQ or Softirq.
> + */
> +static int xenon_hs_delay_adj(struct sdhci_host *host,
> + struct mmc_card *card)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + int ret = 0;
> +
> + if (WARN_ON(host->clock <= DEFAULT_SDCLK_FREQ))
> + return -EINVAL;
> +
> + if (mmc_card_hs400(card)) {
> + xenon_hs400_strobe_delay_adj(host, card);
> + return 0;
> + }
> +
> + if (((priv->phy_type == EMMC_5_1_PHY) ||
> + (priv->phy_type == EMMC_5_0_PHY)) &&
> + (mmc_card_hs200(card) ||
> + (host->timing == MMC_TIMING_UHS_SDR104))) {
> + ret = xenon_emmc_phy_config_tuning(host);
> + if (!ret)
> + return 0;
> + }
> +
> + ret = xenon_fix_sampl_delay_adj(host, card);
> + if (ret)
> + dev_err(mmc_dev(host->mmc), "fails sampling fixed delay adjustment\n");
> + return ret;
> +}
> +
> +int xenon_phy_adj(struct sdhci_host *host, struct mmc_ios *ios)
> +{
> + struct mmc_host *mmc = host->mmc;
> + struct mmc_card *card;
> + int ret = 0;
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> +
> + if (!host->clock) {
> + priv->clock = 0;
> + return 0;
> + }
> +
> + /*
> + * The timing, frequency or bus width is changed,
> + * better to set eMMC PHY based on current setting
> + * and adjust Xenon SDHC delay.
> + */
> + if ((host->clock == priv->clock) &&
> + (ios->bus_width == priv->bus_width) &&
> + (ios->timing == priv->timing))
> + return 0;
> +
> + xenon_phy_set(host, ios->timing);
> +
> + /* Update the record */
> + priv->bus_width = ios->bus_width;
> + /* Temp stage from HS200 to HS400 */
> + if (((priv->timing == MMC_TIMING_MMC_HS200) &&
> + (ios->timing == MMC_TIMING_MMC_HS)) ||
> + ((ios->timing == MMC_TIMING_MMC_HS) &&
> + (priv->clock > host->clock))) {
> + priv->timing = ios->timing;
> + priv->clock = host->clock;
> + return 0;
> + }
> + priv->timing = ios->timing;
> + priv->clock = host->clock;
> +
> + /* Legacy mode is a special case */
> + if (ios->timing == MMC_TIMING_LEGACY)
> + return 0;
> +
> + card = priv->card_candidate;
> + if (unlikely(!card)) {
> + dev_warn(mmc_dev(mmc), "card is not present\n");
> + return -EINVAL;
> + }
> +
> + if (host->clock > DEFAULT_SDCLK_FREQ)
> + ret = xenon_hs_delay_adj(host, card);
> + return ret;
> +}
> +
> +static int add_xenon_phy(struct device_node *np, struct sdhci_host *host,
> + const char *phy_name)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_xenon_priv *priv = sdhci_pltfm_priv(pltfm_host);
> + int i, ret;
> +
> + for (i = 0; i < NR_PHY_TYPES; i++) {
> + if (!strcmp(phy_name, phy_types[i])) {
> + priv->phy_type = i;
> + break;
> + }
> + }
> + if (i == NR_PHY_TYPES) {
> + dev_err(mmc_dev(host->mmc),
> + "Unable to determine PHY name %s. Use default eMMC 5.1 PHY\n",
> + phy_name);
> + priv->phy_type = EMMC_5_1_PHY;
> + }
> +
> + if (priv->phy_type == SDH_PHY) {
> + return alloc_sdh_phy(priv);
> + } else if ((priv->phy_type == EMMC_5_0_PHY) ||
> + (priv->phy_type == EMMC_5_1_PHY)) {
> + ret = alloc_emmc_phy(priv);
> + if (ret)
> + return ret;
> + return emmc_phy_parse_param_dt(host, np, priv->phy_params);
> + }
> +
> + return -EINVAL;
> +}
> +
> +int xenon_phy_parse_dt(struct device_node *np, struct sdhci_host *host)
> +{
> + const char *phy_type = NULL;
> +
> + if (!of_property_read_string(np, "xenon,phy-type", &phy_type))
> + return add_xenon_phy(np, host, phy_type);
> +
> + dev_err(mmc_dev(host->mmc), "Fail to get Xenon PHY type. Use default eMMC 5.1 PHY\n");
> + return add_xenon_phy(np, host, "emmc 5.1 phy");
> +}
> diff --git a/drivers/mmc/host/sdhci-xenon-phy.h b/drivers/mmc/host/sdhci-xenon-phy.h
> new file mode 100644
> index 000000000000..4373c71d3b7b
> --- /dev/null
> +++ b/drivers/mmc/host/sdhci-xenon-phy.h
> @@ -0,0 +1,157 @@
> +/* linux/drivers/mmc/host/sdhci-xenon-phy.h
> + *
> + * Author: Hu Ziji <huziji@marvell.com>
> + * Date: 2016-8-24
> + *
> + * Copyright (C) 2016 Marvell, All Rights Reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or (at
> + * your option) any later version.
> + */
> +#ifndef SDHCI_XENON_PHY_H_
> +#define SDHCI_XENON_PHY_H_
> +
> +#include <linux/types.h>
> +#include "sdhci.h"
> +
> +/* Register base for eMMC PHY 5.0 Version */
> +#define EMMC_5_0_PHY_REG_BASE 0x0160
> +/* Register base for eMMC PHY 5.1 Version */
> +#define EMMC_PHY_REG_BASE 0x0170
> +
> +#define EMMC_PHY_TIMING_ADJUST EMMC_PHY_REG_BASE
> +#define EMMC_5_0_PHY_TIMING_ADJUST EMMC_5_0_PHY_REG_BASE
> +#define TIMING_ADJUST_SLOW_MODE BIT(29)
> +#define TIMING_ADJUST_SDIO_MODE BIT(28)
> +#define OUTPUT_QSN_PHASE_SELECT BIT(17)
> +#define SAMPL_INV_QSP_PHASE_SELECT BIT(18)
> +#define SAMPL_INV_QSP_PHASE_SELECT_SHIFT 18
> +#define PHY_INITIALIZAION BIT(31)
> +#define WAIT_CYCLE_BEFORE_USING_MASK 0xF
> +#define WAIT_CYCLE_BEFORE_USING_SHIFT 12
> +#define FC_SYNC_EN_DURATION_MASK 0xF
> +#define FC_SYNC_EN_DURATION_SHIFT 8
> +#define FC_SYNC_RST_EN_DURATION_MASK 0xF
> +#define FC_SYNC_RST_EN_DURATION_SHIFT 4
> +#define FC_SYNC_RST_DURATION_MASK 0xF
> +#define FC_SYNC_RST_DURATION_SHIFT 0
> +
> +#define EMMC_PHY_FUNC_CONTROL (EMMC_PHY_REG_BASE + 0x4)
> +#define EMMC_5_0_PHY_FUNC_CONTROL (EMMC_5_0_PHY_REG_BASE + 0x4)
> +#define ASYNC_DDRMODE_MASK BIT(23)
> +#define ASYNC_DDRMODE_SHIFT 23
> +#define CMD_DDR_MODE BIT(16)
> +#define DQ_DDR_MODE_SHIFT 8
> +#define DQ_DDR_MODE_MASK 0xFF
> +#define DQ_ASYNC_MODE BIT(4)
> +
> +#define EMMC_PHY_PAD_CONTROL (EMMC_PHY_REG_BASE + 0x8)
> +#define EMMC_5_0_PHY_PAD_CONTROL (EMMC_5_0_PHY_REG_BASE + 0x8)
> +#define REC_EN_SHIFT 24
> +#define REC_EN_MASK 0xF
> +#define FC_DQ_RECEN BIT(24)
> +#define FC_CMD_RECEN BIT(25)
> +#define FC_QSP_RECEN BIT(26)
> +#define FC_QSN_RECEN BIT(27)
> +#define OEN_QSN BIT(28)
> +#define AUTO_RECEN_CTRL BIT(30)
> +#define FC_ALL_CMOS_RECEIVER 0xF000
> +
> +#define EMMC5_FC_QSP_PD BIT(18)
> +#define EMMC5_FC_QSP_PU BIT(22)
> +#define EMMC5_FC_CMD_PD BIT(17)
> +#define EMMC5_FC_CMD_PU BIT(21)
> +#define EMMC5_FC_DQ_PD BIT(16)
> +#define EMMC5_FC_DQ_PU BIT(20)
> +
> +#define EMMC_PHY_PAD_CONTROL1 (EMMC_PHY_REG_BASE + 0xC)
> +#define EMMC5_1_FC_QSP_PD BIT(9)
> +#define EMMC5_1_FC_QSP_PU BIT(25)
> +#define EMMC5_1_FC_CMD_PD BIT(8)
> +#define EMMC5_1_FC_CMD_PU BIT(24)
> +#define EMMC5_1_FC_DQ_PD 0xFF
> +#define EMMC5_1_FC_DQ_PU (0xFF << 16)
> +
> +#define EMMC_PHY_PAD_CONTROL2 (EMMC_PHY_REG_BASE + 0x10)
> +#define EMMC_5_0_PHY_PAD_CONTROL2 (EMMC_5_0_PHY_REG_BASE + 0xC)
> +#define ZNR_MASK 0x1F
> +#define ZNR_SHIFT 8
> +#define ZPR_MASK 0x1F
> +/* Perferred ZNR and ZPR value vary between different boards.
> + * The specific ZNR and ZPR value should be defined here
> + * according to board actual timing.
> + */
> +#define ZNR_DEF_VALUE 0xF
> +#define ZPR_DEF_VALUE 0xF
> +
> +#define EMMC_PHY_DLL_CONTROL (EMMC_PHY_REG_BASE + 0x14)
> +#define EMMC_5_0_PHY_DLL_CONTROL (EMMC_5_0_PHY_REG_BASE + 0x10)
> +#define DLL_ENABLE BIT(31)
> +#define DLL_UPDATE_STROBE_5_0 BIT(30)
> +#define DLL_REFCLK_SEL BIT(30)
> +#define DLL_UPDATE BIT(23)
> +#define DLL_PHSEL1_SHIFT 24
> +#define DLL_PHSEL0_SHIFT 16
> +#define DLL_PHASE_MASK 0x3F
> +#define DLL_PHASE_90_DEGREE 0x1F
> +#define DLL_FAST_LOCK BIT(5)
> +#define DLL_GAIN2X BIT(3)
> +#define DLL_BYPASS_EN BIT(0)
> +
> +#define EMMC_5_0_PHY_LOGIC_TIMING_ADJUST (EMMC_5_0_PHY_REG_BASE + 0x14)
> +#define EMMC_PHY_LOGIC_TIMING_ADJUST (EMMC_PHY_REG_BASE + 0x18)
> +
> +enum sampl_fix_delay_phase {
> + PHASE_0_DEGREE = 0x0,
> + PHASE_90_DEGREE = 0x1,
> + PHASE_180_DEGREE = 0x2,
> + PHASE_270_DEGREE = 0x3,
> +};
> +
> +#define SDH_PHY_SLOT_DLL_CTRL (0x0138)
> +#define SDH_PHY_ENABLE_DLL BIT(1)
> +#define SDH_PHY_FAST_LOCK_EN BIT(5)
> +
> +#define SDH_PHY_SLOT_DLL_PHASE_SEL (0x013C)
> +#define SDH_PHY_DLL_UPDATE_TUNING BIT(15)
> +
> +enum soc_pad_ctrl_type {
> + SOC_PAD_SD,
> + SOC_PAD_FIXED_1_8V,
> +};
> +
> +/*
> + * List offset of PHY registers and some special register values
> + * in eMMC PHY 5.0 or eMMC PHY 5.1
> + */
> +struct xenon_emmc_phy_regs {
> + /* Offset of Timing Adjust register */
> + u16 timing_adj;
> + /* Offset of Func Control register */
> + u16 func_ctrl;
> + /* Offset of Pad Control register */
> + u16 pad_ctrl;
> + /* Offset of Pad Control register */
> + u16 pad_ctrl2;
> + /* Offset of DLL Control register */
> + u16 dll_ctrl;
> + /* Offset of Logic Timing Adjust register */
> + u16 logic_timing_adj;
> + /* Max value of eMMC Fixed Sampling Delay */
> + u32 delay_mask;
> + /* DLL Update Enable bit */
> + u32 dll_update;
> +};
> +
> +struct xenon_phy_ops {
> + void (*strobe_delay_adj)(struct sdhci_host *host,
> + struct mmc_card *card);
> + int (*fix_sampl_delay_adj)(struct sdhci_host *host,
> + struct mmc_card *card);
> + void (*phy_set)(struct sdhci_host *host, unsigned char timing);
> + void (*set_soc_pad)(struct sdhci_host *host,
> + unsigned char signal_voltage);
> +};
> +#endif
> diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c
> index 03ba183494d3..4d7d871544fc 100644
> --- a/drivers/mmc/host/sdhci-xenon.c
> +++ b/drivers/mmc/host/sdhci-xenon.c
> @@ -224,6 +224,7 @@ static void xenon_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> spin_unlock_irqrestore(&host->lock, flags);
>
> sdhci_set_ios(mmc, ios);
> + xenon_phy_adj(host, ios);
>
> if (host->clock > DEFAULT_SDCLK_FREQ) {
> spin_lock_irqsave(&host->lock, flags);
> @@ -309,6 +310,8 @@ static int xenon_start_signal_voltage_switch(struct mmc_host *mmc,
> */
> enable_xenon_internal_clk(host);
>
> + xenon_soc_pad_ctrl(host, ios->signal_voltage);
> +
> if (priv->card_candidate) {
> if (mmc_card_mmc(priv->card_candidate))
> return xenon_emmc_signal_voltage_switch(mmc, ios);
> @@ -453,6 +456,7 @@ static int xenon_probe_dt(struct platform_device *pdev)
> sdhci_writel(host, reg, SDHC_SYS_EXT_OP_CTRL);
> }
>
> + err = xenon_phy_parse_dt(np, host);
> return err;
> }
>
> diff --git a/drivers/mmc/host/sdhci-xenon.h b/drivers/mmc/host/sdhci-xenon.h
> index c2370493fbe8..06e5261a563c 100644
> --- a/drivers/mmc/host/sdhci-xenon.h
> +++ b/drivers/mmc/host/sdhci-xenon.h
> @@ -15,6 +15,7 @@
> #include <linux/mmc/card.h>
> #include <linux/of.h>
> #include "sdhci.h"
> +#include "sdhci-xenon-phy.h"
>
> /* Register Offset of SD Host Controller SOCP self-defined register */
> #define SDHC_SYS_CFG_INFO 0x0104
> @@ -76,6 +77,7 @@
> #define MMC_TIMING_FAKE 0xFF
>
> #define DEFAULT_SDCLK_FREQ (400000)
> +#define LOWEST_SDCLK_FREQ (100000)
>
> /* Xenon specific Mode Select value */
> #define XENON_SDHCI_CTRL_HS200 0x5
> @@ -97,6 +99,15 @@ struct sdhci_xenon_priv {
> /* Slot idx */
> u8 slot_idx;
>
> + int phy_type;
> + /*
> + * Contains board-specific PHY parameters
> + * passed from device tree.
> + */
> + void *phy_params;
> + const struct xenon_phy_ops *phy_ops;
> + struct xenon_emmc_phy_regs *emmc_phy_regs;
> +
> /*
> * When initializing card, Xenon has to determine card type and
> * adjust Sampling Fixed delay.
> @@ -131,4 +142,10 @@ static inline int enable_xenon_internal_clk(struct sdhci_host *host)
>
> return 0;
> }
> +
> +int xenon_phy_adj(struct sdhci_host *host, struct mmc_ios *ios);
> +int xenon_phy_parse_dt(struct device_node *np,
> + struct sdhci_host *host);
> +void xenon_soc_pad_ctrl(struct sdhci_host *host,
> + unsigned char signal_voltage);
> #endif
>
--
Best Regards
Shawn Lin
^ permalink raw reply
* [PATCH 2/10] mmc: sdhci: Export sdhci_start_signal_voltage_switch() in sdhci.c
From: Shawn Lin @ 2016-10-08 2:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <9a660a813af58ad7c108fd06289513302426c9fb.1475853198.git-series.gregory.clement@free-electrons.com>
Hi,
? 2016/10/7 23:22, Gregory CLEMENT ??:
> From: Ziji Hu <huziji@marvell.com>
>
> Export sdhci_start_signal_voltage_switch() from sdhci.c.
> Thus vendor sdhci driver can implement its own signal voltage
> switch routine.
>
You can overwtite this callback within your driver itself.
That is what other sdhci variant drivers did, so patch 1-3 are
unnecessary.
> Signed-off-by: Hu Ziji <huziji@marvell.com>
> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> drivers/mmc/host/sdhci.c | 5 +++--
> drivers/mmc/host/sdhci.h | 2 ++
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index d4bb818c52d5..2250ea22231f 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1828,8 +1828,8 @@ static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
> spin_unlock_irqrestore(&host->lock, flags);
> }
>
> -static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
> - struct mmc_ios *ios)
> +int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
> + struct mmc_ios *ios)
> {
> struct sdhci_host *host = mmc_priv(mmc);
> u16 ctrl;
> @@ -1921,6 +1921,7 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
> return 0;
> }
> }
> +EXPORT_SYMBOL_GPL(sdhci_start_signal_voltage_switch);
>
> static int sdhci_card_busy(struct mmc_host *mmc)
> {
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 21dc80b8ae3d..c38ab65b9a97 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -687,6 +687,8 @@ void sdhci_set_bus_width(struct sdhci_host *host, int width);
> void sdhci_reset(struct sdhci_host *host, u8 mask);
> void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing);
> void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
> +int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
> + struct mmc_ios *ios);
>
> #ifdef CONFIG_PM
> extern int sdhci_suspend_host(struct sdhci_host *host);
>
--
Best Regards
Shawn Lin
^ permalink raw reply
* [PATCH v3 03/11] ARM: shmobile: r8a7743: basic SoC support
From: Simon Horman @ 2016-10-08 2:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2345971.ESZSzve5jF@avalon>
On Fri, Oct 07, 2016 at 11:33:33AM +0300, Laurent Pinchart wrote:
> Hi Simon,
>
>
> On Friday 07 Oct 2016 12:15:37 Simon Horman wrote:
> > On Thu, Oct 06, 2016 at 12:37:08AM +0300, Sergei Shtylyov wrote:
> > > Add minimal support for the RZ/G1M (R8A7743) SoC.
> > >
> > > Based on the original (and large) patch by Dmitry Shifrin
> > > <dmitry.shifrin@cogentembedded.com>.
> > >
> > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > Thanks, I have queued this up.
>
> I'd like to see this patch rebased on top of "[PATCH] ARM: shmobile:
> Consolidate R8A779[234] machine definitions".
I'm happy to drop this patch if that is the desired outcome of
the discussion in this sub-thread.
^ permalink raw reply
* [PATCH v3 04/11] ARM: dts: r8a7743: initial SoC device tree
From: Simon Horman @ 2016-10-08 2:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cd1391d1-d2b5-6315-ee15-0253019d9836@cogentembedded.com>
On Fri, Oct 07, 2016 at 12:57:28PM +0300, Sergei Shtylyov wrote:
> On 10/7/2016 6:09 AM, Simon Horman wrote:
>
> >>The initial R8A7743 SoC device tree including CPU cores, GIC, timer, SYSC,
> >>CPG, and the required clock descriptions.
> >>
> >>Based on the original (and large) patch by Dmitry Shifrin
> >><dmitry.shifrin@cogentembedded.com>.
> >>
> >>Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >
> >I notice that this patch enables two CPUs. Have you tested SMP and:
> >- CPU hotplug
> >- Suspend to RAM
>
> No, not really. I'll remove CPU1. :-<
Thanks.
^ permalink raw reply
* [PATCH] arm64: uniphier: select ARCH_HAS_RESET_CONTROLLER
From: Masahiro Yamada @ 2016-10-08 2:25 UTC (permalink / raw)
To: linux-arm-kernel
The UniPhier reset driver (drivers/reset/reset-uniphier.c) has been
merged. Select ARCH_HAS_RESET_CONTROLLER from the SoC Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
This is a counter-part of the following ARM-32bit variant:
https://patchwork.kernel.org/patch/9341021/
As discussed with Philipp, we go ARCH_HAS_RESET_CONTROLLER for now.
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index b6b3657..d4f5f5c 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -178,6 +178,7 @@ config ARCH_THUNDER
config ARCH_UNIPHIER
bool "Socionext UniPhier SoC Family"
+ select ARCH_HAS_RESET_CONTROLLER
select PINCTRL
help
This enables support for Socionext UniPhier SoC family.
--
1.9.1
^ permalink raw reply related
* [PATCH] ARM: uniphier: select ARCH_HAS_RESET_CONTROLLER
From: Masahiro Yamada @ 2016-10-08 2:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474356649.4030.8.camel@pengutronix.de>
2016-09-20 16:30 GMT+09:00 Philipp Zabel <p.zabel@pengutronix.de>:
> Am Dienstag, den 20.09.2016, 13:43 +0900 schrieb Masahiro Yamada:
>> The UniPhier reset driver (drivers/reset/reset-uniphier.c) has been
>> merged. Select ARCH_HAS_RESET_CONTROLLER from the SoC Kconfig.
>>
>> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
>
> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
>
> regards
> Philipp
Applied.
--
Best Regards
Masahiro Yamada
^ permalink raw reply
* [PATCH 4/10] MAINTAINERS: add entry for Marvell Xenon MMC Host Controller drivers
From: Ziji Hu @ 2016-10-08 0:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475873086.1945.20.camel@perches.com>
Hi Joe,
On 2016/10/8 4:44, Joe Perches wrote:
> On Fri, 2016-10-07 at 17:22 +0200, Gregory CLEMENT wrote:
>> Add maintainer entry for Marvell Xenon eMMC/SD/SDIO Host
>> Controller drivers.
> []
>> diff --git a/MAINTAINERS b/MAINTAINERS
> []
>> @@ -7578,6 +7578,11 @@ M: Nicolas Pitre <nico@fluxnic.net>
>> S: Odd Fixes
>> F: drivers/mmc/host/mvsdio.*
>>
>> +MARVELL XENON MMC/SD/SDIO HOST CONTROLLER DRIVER
>> +M: Ziji Hu <huziji@marvell.com>
>> +L: linux-mmc at vger.kernel.org
>> +S: Supported
>
> You should really add F: file patterns here
>
The specific file patterns will be added later when the corresponding file is included in patch.
Otherwise, it cannot pass checkpatch.pl.
Thank you.
Best regards,
Hu Ziji
^ permalink raw reply
* [GIT PULL 8/8] ARM: SoC: late DT updates for v4.9
From: Arnd Bergmann @ 2016-10-08 0:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3637015.LRn5VyhPVM@wuerfel>
The following changes since commit d63a5e7c713a68bd368016f2022326a1a91310d8:
clk: sunxi-ng: Add hardware dependency (2016-09-10 11:41:21 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/armsoc-late
for you to fetch changes up to 8185041f5fa6f02acf75229a590e16aac028fc5e:
ARM: dts: lpc32xx: add device node for IRAM on-chip memory (2016-10-02 22:08:11 -0700)
----------------------------------------------------------------
ARM: SoC: late DT updates for v4.9
These updates have been kept in a separate branch mostly because
they rely on updates to the respective clk drivers to keep the
shared header files in sync.
- The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
automotive SoC similar to the ?8a7795 chip we already support, but
the dts changes rely on a clock driver change that has been
merged for v4.9 through the clk tree.
- The Amlogic meson-gxbb (S905) platform gains support for a few
drivers merged through our tree, in particular the network and
usb driver changes are required and included here, and also
the clk tree changes.
- The Allwinner platforms have seen a large-scale change to their
clk drivers and the dts file updates must come after that.
This includes the newly added Nextthing GR8 platform, which is
derived from sun5i/A13.
- Some integrator (arm32) changes rely on clk driver changes.
- A single patch for lpc32xx has no such dependency but wasn't
added until just before the merge window
----------------------------------------------------------------
Arnd Bergmann (8):
Merge tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/.../mripard/linux into next/late
Merge tag 'amlogic-dt64' of git://git.kernel.org/.../khilman/linux-amlogic into next/late
Merge tag 'renesas-arm64-dt-for-v4.9' of git://git.kernel.org/.../horms/renesas into next/late
Merge tag 'integrator-armsoc-1' of git://git.kernel.org/.../linusw/linux-integrator into next/late
Merge tag 'amlogic-drivers-2' of git://git.kernel.org/.../khilman/linux-amlogic into next/late
Merge tag 'amlogic-dt64-2' of git://git.kernel.org/.../khilman/linux-amlogic into next/late
Merge tag 'sunxi-dt-for-4.9-3' of https://git.kernel.org/.../mripard/linux into next/late
Merge branch 'next/late' into HEAD
Carlo Caione (4):
documentation: Add secure monitor bindings documentation
ARM64: dts: amlogic: gxbb: Enable secure monitor
documentation: Add nvmem bindings documentation
ARM64: dts: amlogic: gxbb: Enable NVMEM
Chen-Yu Tsai (7):
ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings
ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi
ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused
ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused
ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: a80-optimus: Disable EHCI1
Geert Uytterhoeven (1):
arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes
Hans de Goede (6):
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04
ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h
ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03
Icenowy Zheng (2):
ARM: dts: sun8i: add pinmux for UART1 at PG
ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
Jerome Brunet (7):
ARM64: dts: amlogic: add spi nor pins
ARM64: dts: meson-gxbb: add pins for I2C
ARM64: dts: gxbb: add i2c bus
usb: dwc2: add support for Meson8b and GXBB SoCs
clk: gxbb: expose spifc clock
clk: gxbb: expose i2c clocks
ARM64: dts: meson-gxbb-p20x: Enable USB Nodes
Joachim Eastwood (1):
stmmac: introduce get_stmmac_bsp_priv() helper
Jorik Jonker (5):
dts: sun8i-h3: add pinmux definitions for UART2-3
dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
dts: sun8i-h3: add pinmux definitions for I2C0-2
dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC
Kevin Hilman (7):
ARM64: DTS: meson-gxbb: switch ethernet to real clock
Merge branch 'clk-meson-gxbb-ao' of git://git.kernel.org/.../clk/linux into v4.8/dt64
ARM64: dts: amlogic: add the input pin for the IR remote
ARM64: dts: meson-gxbb: Add PWM pinctrl nodes
Merge branch 'clk-meson-gxbb' of git://git.kernel.org/.../clk/linux into v4.8/drivers
Merge tag 'amlogic-drivers-2' into v4.8/dt64-2
Merge branch 'v4.8/dt64' into v4.8/dt64-2
Kieran Bingham (2):
arm64: dts: r8a7795: add FCPF device nodes
arm64: dts: r8a7795: add FDP1 device nodes
Laurent Pinchart (5):
arm64: dts: renesas: r8a7795: Add FCPV nodes
arm64: dts: renesas: r8a7795: Add VSP instances
arm64: dts: renesas: r8a7795: Add DU device to DT
arm64: dts: r8a7795: renesas: salvator-x: Enable DU
arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output
Linus Walleij (8):
ARM: dts: set the 24MHz xtal as parent of the UART clock
ARM: dts: add the Integrator/AP baseboard clocks
ARM: dts: Add the core module clocks to Integrator/AP
ARM: dts: add the core module clocks to Integrator/CP
ARM: integrator: move CP CLCD display to DTS
ARM: integrator: delete some auxdata
ARM: integrator: cut down on static maps
ARM: integrator: read counter using syscon/regmap
Martin Blumenstingl (11):
ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards
net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
net: stmmac: update the module description of the dwmac-meson driver
ARM64: dts: amlogic: enable ethernet on all Tronsmart Vega S95 devices
ARM64: dts: meson-gxbb: use the new GXBB DWMAC glue driver
ARM64: dts: meson-gxbb: add USB Nodes
Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
clk: gxbb: expose MPLL2 clock for use by DT
clk: gxbb: expose USB clocks
ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
Maxime Ripard (4):
Merge branch 'sunxi/clk-for-4.9' into sunxi/dt-for-4.9
ARM: sun8i: Convert the A23 and A33 to the CCU
ARM: sun8i: a33: Add display pipeline
ARM: sun8i: a23/a33: Add RGB666 pins
Myl?ne Josserand (2):
ARM: dts: Add NextThing GR8 dtsi
ARM: dts: gr8: Add support for the GR8 evaluation board
Neil Armstrong (9):
ARM64: dts: amlogic: meson-gxbb: Add watchdog node
ARM64: dts: meson-gxbb: Add GXBB AO Clock and Reset node
dt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings
ARM64: dts: meson-gxbb: Add Infrared Remote Controller decoder
ARM64: dts: meson-gxbb: Add Meson MHU Node
ARM64: dts: meson-gxbb: Add Meson GXBB PWM Controller nodes
ARM64: dts: meson-gxbb: add the SDIO pins
ARM64: dts: meson-gxbb: Add SPIFC node
ARM64: dts: meson-gxbb: add I2C nodes
Simon Horman (1):
arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property
Takeshi Kihara (2):
arm64: dts: r8a7796: Add pinctrl device node
arm64: dts: r8a7796: Add GPIO device nodes
Ulrich Hecht (1):
arm64: dts: r8a7796: salvator-x: add serial console pins
Vladimir Barinov (13):
arm64: dts: h3ulcb: add H3ULCB board DT bindings
arm64: dts: h3ulcb: initial device tree
arm64: dts: h3ulcb: enable SCIF clk and pins
arm64: dts: h3ulcb: enable EthernetAVB
arm64: dts: h3ulcb: enable I2C2
arm64: dts: h3ulcb: enable EXTALR clk
arm64: dts: h3ulcb: enable WDT
arm64: dts: h3ulcb: enable USB2 PHY of channel 1
arm64: dts: h3ulcb: enable USB2.0 Host channel 1
arm64: dts: h3ulcb: enable GPIO keys
arm64: dts: h3ulcb: enable SDHI0
arm64: dts: h3ulcb: Sound SSI support
arm64: dts: h3ulcb: enable GPIO leds
Vladimir Zapolskiy (1):
ARM: dts: lpc32xx: add device node for IRAM on-chip memory
Wolfram Sang (1):
arm64: dts: r8a7795: set maximum frequency for SDHI clocks
Yoshihiro Shimoda (4):
arm64: dts: r8a7795: Add HSUSB device node
arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0
arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0
arm64: dts: r8a7795: salvator-x: enable HSUSB
Documentation/devicetree/bindings/arm/shmobile.txt | 2 +
.../bindings/firmware/meson/meson_sm.txt | 15 +
.../devicetree/bindings/media/meson-ir.txt | 5 +-
.../devicetree/bindings/net/meson-dwmac.txt | 45 +-
.../devicetree/bindings/nvmem/amlogic-efuse.txt | 39 +
.../devicetree/bindings/phy/meson-usb2-phy.txt | 27 +
Documentation/devicetree/bindings/usb/dwc2.txt | 2 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/integratorap.dts | 51 +-
arch/arm/boot/dts/integratorcp.dts | 74 +-
arch/arm/boot/dts/lpc32xx.dtsi | 12 +-
arch/arm/boot/dts/ntc-gr8-evb.dts | 342 ++++++
arch/arm/boot/dts/ntc-gr8.dtsi | 1087 ++++++++++++++++++++
arch/arm/boot/dts/sun6i-a31.dtsi | 424 ++------
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 305 ++----
arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts | 9 +
arch/arm/boot/dts/sun8i-a23-inet86dz.dts | 9 +
.../boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 26 +
.../boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 9 +
arch/arm/boot/dts/sun8i-a23.dtsi | 80 +-
arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts | 10 +
arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 20 +
arch/arm/boot/dts/sun8i-a33.dtsi | 236 +++--
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 18 +
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 18 +
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 18 +
arch/arm/boot/dts/sun8i-h3.dtsi | 85 +-
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 116 +++
arch/arm/boot/dts/sun9i-a80-optimus.dts | 123 ++-
arch/arm/mach-integrator/integrator_ap.c | 36 -
arch/arm/mach-integrator/integrator_cp.c | 123 +--
.../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 11 +
arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts | 6 +
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 35 +
.../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 42 +
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 329 +++++-
arch/arm64/boot/dts/renesas/Makefile | 2 +-
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 328 ++++++
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 87 ++
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 276 ++++-
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 16 +
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 117 +++
drivers/clk/meson/gxbb.h | 18 +-
drivers/net/ethernet/stmicro/stmmac/Kconfig | 6 +-
drivers/net/ethernet/stmicro/stmmac/Makefile | 2 +-
drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c | 4 +-
.../net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 324 ++++++
.../net/ethernet/stmicro/stmmac/stmmac_platform.h | 8 +
drivers/usb/dwc2/platform.c | 34 +
include/dt-bindings/clock/gxbb-clkc.h | 9 +
51 files changed, 4153 insertions(+), 870 deletions(-)
^ permalink raw reply
* [GIT PULL 7/8] ARM: 64-bit DT updates for v4.8
From: Arnd Bergmann @ 2016-10-08 0:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3637015.LRn5VyhPVM@wuerfel>
The following changes since commit f2a89d3b2b85b90b05453872aaabfdb412a21a03:
arm64: dts: Fix broken architected timer interrupt trigger (2016-09-14 22:47:22 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/armsoc-dt64
for you to fetch changes up to c1fd2794a4111501027dc60b3fd9d2a29789ea47:
Merge tag 'berlin64-dt-for-v4.9-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt64 (2016-10-02 22:21:33 -0700)
----------------------------------------------------------------
ARM: 64-bit DT updates for v4.8
The 64-bit DT changes are surprisingly small this time, we only add two
SoC platforms: the ZTE ZX296718 Set-top-box SoC and the SocioNext
UniPhier LD11 TV SoC, each with their reference boards.
There are three new machines added for existing SoC platforms:
- The Marvell Armada 8040 development board is an impressive quad-core
Cortex-A72 machine with three 10gbit ethernet interfaces
- Qualcomms DragonBoard 820c single-board computer is their current
high-end phone platform in the 96boards form factor
- Rockchip: Tronsmart Orion r86 set-top-box is a popular mid-range
Android box based on the 8-core rk3368 SoC.
----------------------------------------------------------------
Alexander Graf (1):
ARM64: zynqmp: Align gic ranges for 64k in device tree
Andy Yan (2):
soc: rockchip: add reboot-mode header
arm64: dts: rockchip: add syscon-reboot-mode DT node
Archit Taneja (2):
arm64: dts: msm8916: Add display support
arm64: dts: apq8016-sbc: Add HDMI display support
Arnd Bergmann (15):
Merge tag 'uniphier-dt64-v4.9' of git://git.kernel.org/.../masahiroy/linux-uniphier into next/dt64
Merge tag 'samsung-dt64-4.9' of git://git.kernel.org/.../krzk/linux into next/dt64
Merge tag 'hisi-soc-dt-for-4.9' of git://github.com/hisilicon/linux-hisi into next/dt64
Merge tag 'qcom-arm64-for-4.9' of git://git.kernel.org/.../agross/linux into next/dt64
Merge tag 'mvebu-dt64-4.9-1' of git://git.infradead.org/linux-mvebu into next/dt64
Merge tag 'arm-soc/for-4.9/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Merge tag 'v4.9-rockchip-dts64-1' of git://git.kernel.org/.../mmind/linux-rockchip into next/dt64
Merge tag 'tegra-for-4.9-arm64-dt' of git://git.kernel.org/.../tegra/linux into next/dt64
Merge tag 'imx-dt64-4.9' of git://git.kernel.org/.../shawnguo/linux into next/dt64
Merge tag 'v4.8-next-dts64' of https://github.com/mbgg/linux-mediatek into next/dt64
Merge tag 'zynqmp-dt-for-4.9' of https://github.com/Xilinx/linux-xlnx into next/dt64
Merge branch 'dt/irq-fix' into next/dt64
Merge tag 'mvebu-dt64-4.9-2' of git://git.infradead.org/linux-mvebu into next/dt64
Merge tag 'xgene-dts-for-v4.9' of https://github.com/AppliedMicro/xgene-next into next/dt64
Merge tag 'zte-dt64-4.9' of git://git.kernel.org/.../shawnguo/linux into next/dt64
Bjorn Andersson (4):
arm64: dts: qcom: msm8916: Add smsm and smp2p nodes
arm64: dts: qcom: msm8916: Add mba memory reserve
arm64: dts: qcom: msm8916: Make scm a reset-controller
arm64: dts: qcom: msm8916: Add tcsr syscon
CK Hu (1):
arm64: dts: mt8173: Add HDMI related nodes
Caesar Wang (5):
arm64: dts: rockchip: add the saradc for rk3399
arm64: dts: rockchip: add the gmac power domain on rk3399
arm64: dts: rockchip: add the tcpc for rk3399 power domain
arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
arm64: dts: rockchip: support the pmu node for rk3399
Chris Zhong (1):
arm64: dts: rockchip: add Type-C phy for RK3399
Douglas Anderson (1):
arm64: dts: rockchip: Add pinctrl entry for 32k clock on rk3399
Duc Dang (2):
arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entries
arm64: dts: apm: Fix interrupt polarity for X-Gene PCIe legacy interrupts
Elaine Zhang (1):
arm64: dts: rockchip: add the power domain node for rk3399
Finley Xiao (1):
arm64: dts: rockchip: add efuse0 device node for rk3399
Frank Wang (2):
arm64: dts: rockchip: add usb2-phy support for rk3399
arm64: dts: rockchip: configure usb2-phy support for rk3399-evb
Guodong Xu (3):
arm64: dts: hikey: extend default cma size to 128MB
arm64: dts: hi6220: add resets property into dwmmc nodes
arm64: dts: hi6220: add sd-uhs- properties into dwmmc_1
Heiko Stuebner (1):
Merge branch 'v4.9-shared/soc-hdr' into v4.9-armsoc/dts64
Jisheng Zhang (3):
arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes
arm64: dts: berlin4ct: enable all wdt nodes unconditionally
arm64: dts: berlin4ct: Add L2 cache topology
John Stultz (2):
arm64: dts: hikey: Add hikey support for syscon-reboot-mode
arm64: dts: hikey: Add pstore support for HiKey
Jon Hunter (9):
arm64: tegra: Drop clock and reset names for XUSB powergates
arm64: tegra: Add AGIC node for Tegra210
arm64: tegra: Add ADMA node for Tegra210
arm64: tegra: Add SOR power-domain for Tegra210
arm64: tegra: Add ACONNECT, ADMA and AGIC nodes Tegra210 Smaug
arm64: tegra: Enable DPAUX for Tegra210 Smaug
arm64: tegra: Add the various audio devices for Tegra210 Smaug
arm64: tegra: Enable XUSB controller on Tegra210 Smaug
arm64: tegra: Select PM_GENERIC_DOMAINS
Jorge Ramirez-Ortiz (1):
arm64: dts: set UART1 clock frequency to 150MHz
Jun Nie (1):
arm64: dts: Add ZTE ZX296718 SoC dts and Makefile
Kefeng Wang (4):
arm64: dts: hip05: kill hip05_hns.dtsi
dt-bindings: hisilicon: Add Hip05 and Hip06 system controller support
arm64: dts: hip06: Append hns node
arm64: dts: hip06: Append sas node
Krzysztof Kozlowski (1):
arm64: dts: exynos: Use human-friendly symbols for timer interrupt flags
Liu Gang (1):
arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes
Marc Zyngier (1):
arm64: dts: qcom: Fix broken interrupt trigger settings
Masahiro Yamada (5):
arm64: dts: uniphier: match DT names to other projects and documents
arm64: dts: uniphier: add pinctrl property to System Bus node
arm64: dts: uniphier: use clock/reset controllers
arm64: dts: uniphier: add specific compatible to SoC-Glue node
arm64: dts: uniphier: add LD11 SoC/Board support
Matthias Brugger (1):
arm64: dts: rockchip: Add basic support for orion-r68
Michal Simek (3):
ARM64: zynqmp: Use 64bit size cell format
ARM64: zynqmp: Add PCIe node
ARM64: zynqmp: Add missing interrupt-parent to PMU node
Olof Johansson (1):
Merge tag 'berlin64-dt-for-v4.9-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt64
Philipp Zabel (1):
arm64: dts: mt8173-evb: enable HDMI output
Punnaiah Choudary Kalluri (1):
ARM64: zynqmp: Correct the watchdog timer interrupt number
Rajendra Nayak (2):
arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes
arm64: dts: msm8996: Add thermal zones, tsens and qfprom nodes
Roger Chen (2):
arm64: dts: rockchip: add the gmac needed node for rk3399
arm64: dts: rockchip: enable the gmac for rk3399 evb board
Shawn Lin (4):
arm64: dts: rockchip: remove broken-cd from sdio0
arm64: dts: rockchip: add the PCIe PHY for RK3399
arm64: dts: rockchip: add the PCIe controller support for RK3399
arm64: dts: rockchip: configure PCIe support for rk3399-evb
Shunqian Zheng (1):
arm64: dts: rockchip: set to CCI clock of RK3399 to 600M
Srinivas Kandagatla (8):
arm64: dts: db820c: add basic board support
arm64: dts: db820c: add support to LS-UART0
arm64: dts: db820c: add support to LS-I2C0
arm64: dts: db820c: add support to LS-I2C1
arm64: dts: db820c: add support to I2C on HS
arm64: dts: db820c: add support to LS-SPI0
arm64: dts: db820c: add support to SPI on HS
arm64: dts: db820c: add support to external sd card.
Stephen Warren (1):
arm64: tegra: Simplify Tegra210 GPIO compatible value
Stuart Yoder (2):
arm64: dts: updates serial aliases for ls1043a rdb and qds boards
arm64: dts: add stdout-path to chosen node for ls2080a/ls1043a boards
Tai Nguyen (1):
arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries
Thomas Petazzoni (4):
arm64: dts: marvell: add description for the slave CP110 in Armada 8K
arm64: dts: marvell: add description for the Armada 8040 dev board
arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K
arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K
Xing Zheng (1):
arm64: dts: rockchip: fix the address map for WDT0 and WDT1
Xinliang Liu (2):
arm64: dts: Add display subsystem DT nodes for hi6220-hikey
arm64: dts: Add HDMI node for hi6220-hikey
Yendapally Reddy Dhananjaya Reddy (1):
arm64: dts: Add PWM DT node for NS2
York Sun (1):
arm64: dts: Add DDR memory controller for Layerscape SoCs
hotran (2):
arm64: dts: apm: Add X-Gene SoC hwmon to device tree
arm64: dts: apm: Add DT node for APM X-Gene 2 CPU clocks
.../bindings/arm/hisilicon/hisilicon.txt | 39 +-
Documentation/devicetree/bindings/arm/rockchip.txt | 4 +
Documentation/devicetree/bindings/arm/zte.txt | 24 +
arch/arm64/Kconfig.platforms | 2 +
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 +-
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 8 +-
arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 135 ++++-
arch/arm64/boot/dts/apm/apm-storm.dtsi | 111 +++-
arch/arm64/boot/dts/broadcom/ns2.dtsi | 16 +-
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 8 +-
arch/arm64/boot/dts/exynos/exynos7.dtsi | 13 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 14 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 8 +
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 15 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 3 +
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 4 +
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 26 +-
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 86 ++-
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 61 +++
arch/arm64/boot/dts/hisilicon/hip05.dtsi | 5 -
arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi | 180 ------
arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 28 +
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 365 +++++++++++++
arch/arm64/boot/dts/marvell/Makefile | 1 +
arch/arm64/boot/dts/marvell/armada-8020.dtsi | 1 +
arch/arm64/boot/dts/marvell/armada-8040-db.dts | 150 +++++
arch/arm64/boot/dts/marvell/armada-8040.dtsi | 1 +
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 22 +-
.../boot/dts/marvell/armada-cp110-master.dtsi | 3 +
.../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 249 +++++++++
arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 12 +-
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 38 ++
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 77 +++
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 120 ++++
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 79 ++-
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 48 ++
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 82 +++
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 39 ++
arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 21 +
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 88 +++
arch/arm64/boot/dts/qcom/msm8916.dtsi | 286 +++++++++-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 94 +++-
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3368-orion-r68-meta.dts | 382 +++++++++++++
arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 1 -
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 10 +
arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 87 +++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 607 +++++++++++++++++++--
arch/arm64/boot/dts/socionext/Makefile | 4 +-
.../arm64/boot/dts/socionext/uniphier-ld11-ref.dts | 100 ++++
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 338 ++++++++++++
...hier-ph1-ld20-ref.dts => uniphier-ld20-ref.dts} | 11 +-
.../{uniphier-ph1-ld20.dtsi => uniphier-ld20.dtsi} | 102 ++--
arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts | 2 +-
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 108 ++--
arch/arm64/boot/dts/zte/Makefile | 5 +
arch/arm64/boot/dts/zte/zx296718-evb.dts | 64 +++
arch/arm64/boot/dts/zte/zx296718.dtsi | 292 ++++++++++
include/dt-bindings/soc/rockchip,boot-mode.h | 15 +
61 files changed, 4294 insertions(+), 411 deletions(-)
^ permalink raw reply
* [GIT PULL 6/8] ARM: DT updates for v4.9
From: Arnd Bergmann @ 2016-10-08 0:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3637015.LRn5VyhPVM@wuerfel>
The following changes since commit 3eab887a55424fc2c27553b7bfe32330df83f7b8:
Linux 4.8-rc4 (2016-08-28 15:04:33 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/armsoc-dt
for you to fetch changes up to adff807988f92d4646c50b601936e340a92d5455:
Merge tag 'berlin-dt-for-v4.9-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt (2016-10-02 22:20:39 -0700)
----------------------------------------------------------------
ARM: DT updates for v4.9
These are as usual a very large number of mostly boring updates to
enable devices in existing machines, or to fix minor bugs. Notably,
an ongoing treewide effort to fix warnings caused by an update to the
device tree compiler. These are enabled with "make W=1" at the moment
but can hopefully become the default once all issues have been addressed.
No new SoC platform is added this time around (Armada 395 and Orion
mv88f5181 are slight variations of existing ones), but a significant
number of new dts files are added, which I list by platform:
- Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets;
Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E,
Orange Pi Lite, Olimex A33-Olinuxino, and Nano Pi Neo
single-board computers
- ARM Realview: all supported machines (ported from board files)
- Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
BCM958622hr reference boards for Northstar platform;
Raspberry Pi Zero single-board computer
- Marvell EBU: Netgear WNR854T router (ported from board file);
Armada 395 SoC platform and GP board
Armada 390 DB development board
- NXP i.MX: imx7s Warp7 reference board;
Gateworks Ventana GW553x single-board computer,
Technologic Systems TS-4900 and
Engicam IMX6UL GEA M6UL computer-on-module,
Inverse Path USB armory board
- Qualcomm: LG Nexus 5 Phone
- Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards
- Rockchip: Rockchip RK3288 Fennec reference board;
Firefly RK3288 Reload platform
- ST Microelectronics STi: B2260 (96boards) single-board computer
- TI Davinci: OMAP-L138 LCDK Development kit
- TI OMAP: beagleboard-x15 rev B1 single-board computer
Conflicts: vendor-prefixes.txt has conflicting additions, keep all of
them in alphabetical order.
----------------------------------------------------------------
Adam Ford (1):
ARM: dts: Add LogicPD DM37/AM37 Torpedo and SOM-LV
Andrej Rosano (2):
devicetree: Add vendor prefix for Inverse Path
ARM: dts: imx53: add support for USB armory board
Andrew F. Davis (3):
ARM: dts: keystone-k2g: Add device state controller node
ARM: dts: keystone-k2g: Add keystone IRQ controller node
ARM: dts: keystone-k2g: Add DSP GPIO controller node
Andy Yan (5):
soc: rockchip: add reboot-mode header
ARM: dts: rockchip: add syscon-reboot-mode DT node
ARM: dts: rockchip: enable usbotg for Popemtal-rk3288 board
ARM: dts: rockchip: fix L3G4200D i2c address on PopMetal-RK3288 board
ARM: dts: rockchip: Add sensor-supplies on PopMetal-RK3288 board
Anson Huang (1):
ARM: dts: imx6ul iomuxc syscon is compatible to imx6q
Arnd Bergmann (30):
ARM: dts: mvebu: fix reference to a390 spi controller
Merge tag 'renesas-dt-for-v4.9' of git://git.kernel.org/.../horms/renesas into next/dt
Merge tag 'lpc18xx_dts_for_4.9' of https://github.com/manabian/linux-lpc into next/dt
Merge tag 'samsung-dt-4.9' of git://git.kernel.org/.../krzk/linux into next/dt
Merge tag 'uniphier-dt-v4.9' of git://git.kernel.org/.../masahiroy/linux-uniphier into next/dt
Merge tag 'keystone_dts_for_4.9' of git://git.kernel.org/.../ssantosh/linux-keystone into next/dt
Merge tag 'omap-for-v4.9/dt-pt1-signed' of git://git.kernel.org/.../tmlind/linux-omap into next/dt
Merge tag 'sti-dt-for-v4.9-1' of git://git.kernel.org/.../pchotard/sti into next/dt
Merge tag 'qcom-dts-for-4.9' of git://git.kernel.org/.../agross/linux into next/dt
Merge tag 'mvebu-dt-4.9-1' of git://git.infradead.org/linux-mvebu into next/dt
Merge tag 'lpc18xx_dts_for_4.9_part2' of https://github.com/manabian/linux-lpc into next/dt
Merge tag 'renesas-dt2-for-v4.9' of git://git.kernel.org/.../horms/renesas into next/dt
Merge tag 'sunxi-dt-for-4.9' of https://git.kernel.org/.../mripard/linux into next/dt
Merge tag 'v4.9-rockchip-dts32-1' of git://git.kernel.org/.../mmind/linux-rockchip into next/dt
Merge tag 'tegra-for-4.9-arm-dt' of git://git.kernel.org/.../tegra/linux into next/dt
Merge tag 'realview-dts-split' of git://git.kernel.org/.../linusw/linux-integrator into next/dt
Merge tag 'imx-dt-4.9' of git://git.kernel.org/.../shawnguo/linux into next/dt
Merge tag 'clcd-nomadik' of git://git.kernel.org/.../linusw/linux-nomadik into next/dt
Merge tag 'arm-soc/for-4.9/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Merge tag 'davinci-for-v4.9/dts' of git://git.kernel.org/.../nsekhar/linux-davinci into next/dt
Merge tag 'at91-ab-4.9-dt1' of git://git.kernel.org/.../abelloni/linux into next/dt
Merge tag 'mvebu-dt-4.9-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge tag 'amlogic-dt' of git://git.kernel.org/.../khilman/linux-amlogic into next/dt
Merge tag 'sti-dt-for-v4.9-2' of git://git.kernel.org/.../pchotard/sti into next/dt
Merge tag 'sti-dt-for-v4.9-3' of git://git.kernel.org/.../pchotard/sti into next/dt
Merge tag 'davinci-for-v4.9/dts-p2' of git://git.kernel.org/.../nsekhar/linux-davinci into next/dt
Merge tag 'omap-for-v4.9/dt-pt2-signed' of git://git.kernel.org/.../tmlind/linux-omap into next/dt
Merge tag 'samsung-dt-4.9-2' of git://git.kernel.org/.../krzk/linux into next/dt
Merge tag 'samsung-dt-pinctrl-4.9' of git://git.kernel.org/.../krzk/linux into next/dt
Merge tag 'omap-for-v4.9/dt-pt3-signed' of git://git.kernel.org/.../tmlind/linux-omap into next/dt
Baruch Siach (1):
dt-binding: mrvl-gpio: remove orion-gpio description
Bhushan Shah (6):
ARM: dts: msm8974: Add nodes for blsp1_uart1 serial port
ARM: dts: qcom: Add initial DTS for LG Nexus 5 Phone
ARM: dts: msm8974-hammerhead: Add regulator nodes for hammerhead
ARM: dts: msm8974-hammerhead: Introduce gpio-keys nodes
ARM: dts: qcom: msm8974: Add fixed regulator node for vph-pwr-reg
ARM: dts: msm8974: Move vreg_boost node from the honami to msm8974
Bjorn Andersson (1):
ARM: dts: msm8974: honami: Add touchscreen
Breno Lima (1):
ARM: dts: imx7s-warp: Add MPL3115 sensor support
Chen-Yu Tsai (4):
ARM: dts: sun9i: a80-optimus: Add device node for AC100
ARM: dts: sun9i: cubieboard4: Add device node for AC100
ARM: dts: sun9i: Switch to the AC100 RTC clock outputs for osc32k
ARM: dts: sun9i: Add missing #interrupt-cells to R_PIO pinctrl device node
Chris Brandt (5):
ARM: dts: Add RSKRZA1 DT bindings documentation
ARM: dts: rskrza1: initial device tree
ARM: dts: r7s72100: add ethernet clock to device tree
ARM: dts: r7s72100: add ethernet to device tree
ARM: dts: rskrza1: add ethernet DT support
Chris Packham (1):
ARM: dts: armada-38x: Add NAND pinctrl information
Christoph Fritz (1):
ARM: dts: imx6sx: document SION necessity of ENET1_REF_CLK1
Cooper Jr., Franklin (1):
ARM: dts: da850: Add new ECAP and EPWM bindings
Dave Gerlach (3):
Revert "ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu"
Revert "ARM: dts: am33xx: Move to operating-points-v2 table and ti-cpufreq driver"
Revert "ARM: dts: dra7: Move to operating-points-v2 table"
Fabien Lahoudere (2):
ARM: dts: imx53: Add DMA configuration for UART
ARM: dts: imx53: Add IPU nodes for csi
Fabio Estevam (8):
ARM: dts: imx7s-warp: Add initial support
ARM: dts: imx7s: Add SDMA node
ARM: dts: imx7s: Add SAI nodes
ARM: dts: imx7s-warp: Add audio support
ARM: dts: imx7s-warp: Add Wifi support
ARM: dts: imx7s-warp: Use WDOG_B pin reset
ARM: dts: imx6ul-pico-hobbit: Use WDOG_B pin reset
ARM: dts: imx7s-warp: Let the codec control MCLK pinctrl
Florian Fainelli (3):
ARM: dts: NSP: Add Switch Register Access Block node
ARM: dts: NSP: Add BCM958625HR switch ports
Merge tag 'bcm2835-dt-next-2016-08-29' into devicetree/next
Gabriel Fernandez (9):
ARM: dts: STiH4xx: Simplify clock binding of STiH4xx platforms
ARM: dts: STiH407: Enable clock propagation for audio clocks
ARM: dts: STiH410: Enable clock propagation for audio clocks
ARM: dts: STiH418: Enable clock propagation for audio clocks
ARM: dts: STiH407: Enable synchronous clock mode for video clocks
ARM: dts: STiH410: Enable synchronous clock mode for video clocks
ARM: dts: STiH418: Enable synchronous clock mode for video clocks
ARM: dts: STi: STiH407: clock configuration to address 720p and 1080p
ARM: dts: STiH410: clock configuration to address 720p and 1080p
Geert Uytterhoeven (2):
ARM: dts: r8a7790: Remove obsolete vsp1 properties
ARM: dts: r8a7791: Remove obsolete vsp1 properties
Grygorii Strashko (2):
ARM: dts: dra7: cpsw: fix clocks tree
ARM: dts: keystone: specify usb mode explicitly
Grzegorz Jaszczyk (14):
ARM: dts: mvebu: a385-db-ap: enable USB (orion-ehci) port
ARM: dts: mvebu: a385-db-ap: add default partition description for NAND
ARM: dts: mvebu: armada-390: add missing compatibility string and bracket
ARM: dts: mvebu: armada-39x: update the SDHCI node on Armada 39x
ARM: dts: mvebu: armada-39x: enable PMU, CA9 SoC Controller and Coherency fabric
ARM: dts: mvebu: armada-39x: enable the thermal sensor in Armada-39x SoCs
ARM: dts: mvebu: armada-39x: enable watchdog for all Armada-39x SoCs
ARM: dts: mvebu: armada-39x: add missing nodes describing GPIO's
ARM: dts: mvebu: armada-39x: enable rtc for all Armada-39x SoCs
ARM: dts: mvebu: armada-395: add support for the Armada 395 SoC family
ARM: dts: mvebu: armada-398: update the dtsi about missing interfaces
ARM: dts: mvebu: armada-398-db: enable supported usb interfaces
ARM: dts: mvebu: armada-390-db: add support for the Armada 390 DB board
ARM: dts: mvebu: armada-395-gp: add support for the Armada 395 GP Board
Guenter Roeck (1):
ARM: dts: lpc4350-hitex-eval: fix binding for SE97 i2c device
H. Nikolaus Schaller (1):
ARM: dts: omap3-gta04: reduce panel backlight PWM frequency to 83Hz
Hans de Goede (19):
ARM: dts: sun6i-a31s-colorfly-e708-q1: Add full otg support
ARM: dts: sun8i: Add dts file for the Orange Pi PC Plus SBC
ARM: dts: sun8i: Add ethernet1 alias to Orange Pi 2 dts
ARM: dts: sun8i: Add dts file for the Orange Pi Lite SBC
ARM: dts: sun8i: Use sun8i-reference-design-tablet for gt90h dts
ARM: dts: sun8i: Add dt node for rtl8703as wifi chip on ga10h
ARM: dts: sun8i: reference-design-tablet: Add gsl1680 touchscreen node
ARM: dts: sun6i: colorfly-e708-q1: Remove unused mma8452_int_e708_q1 node
ARM: dts: sun6i: Add sun6i-reference-design-tablet.dtsi
ARM: dts: sun6i: Add new dts file for tablets using the inet-q972 PCB
ARM: dts: sun8i: Add dt node for esp8089 wifi chip on polaroid-mid2407
ARM: dts: sun8i: Add dt node for esp8089 wifi chip on polaroid-mid2809
ARM: dts: sun4i: Disable ohci1 on ba10-tv-box
ARM: dts: sun5i: Convert inet-98v-rev2 dts to use reference-design-tablet.dtsi
ARM: dts: sun5i: Add dts file for the Empire Electronix M712 tablet
ARM: dts: sun8i: Rename reference-design-tablet touchscreen node
ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
Heiko Stuebner (2):
ARM: dts: rockchip: move rk3288 usbphy under the GRF node
Merge branch 'v4.9-shared/soc-hdr' into v4.9-armsoc/dts32
Icenowy Zheng (2):
ARM: dts: sun8i: add NAND controller node for A23/A33
ARM: dts: sun8i: Add dts file for inet-d978_rev2 tablets
J.D. Schroeder (1):
ARM: dts: dra7: Fix clock data for gmac_gmii_ref_clk_div
James Pettigrew (2):
ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
devicetree: Add vendor prefix for FriendlyARM
Jamie Lentin (5):
ARM: dts: orion5x: Add required properties for orion-wdt to DT node
dt-bindings: arm: add DT binding for Marvell Orion5x SoC family
ARM: dts: arm: orion5x: Add DT include for mv88f5181
ARM: dts: orion5x: Add description for Netgear WNR854T
ARM: dts: orion5x: Configure WNR854T ethernet PHY LEDs
Jason Cooper (1):
ARM: dts: kirkwood: Fix Openblock A6 external GPIO pins
Javier Martinez Canillas (42):
ARM: dts: omap3/am4372: add missing unit name to ocp node
ARM: dts: omap3: overo: add missing unit name for lcd35 display
ARM: dts: am335x/am437x: remove unneeded unit name for gpio-matrix-keypad
ARM: dts: am335x/am437x: remove unneeded unit name for fixed regulators
ARM: dts: da850/dm81x: remove unneeded unit name for fixed regulators
ARM: dts: omap3/dra62x: remove unneeded unit name for fixed regulators
ARM: dts: am335x/am437x: remove unneeded unit name for gpio-keys nodes
ARM: dts: omap3/4: remove unneeded unit name for gpio-keys nodes
ARM: dts: am335x/437x/57xx: remove unneeded unit name for gpio-leds nodes
ARM: dts: omap3/4/5/dra7: remove unneeded unit name for gpio-leds nodes
ARM: am335x: Add missing memory node in sl50 board
ARM: omap3: Add missing memory node in overo and torpedo boards
ARM: dts: omap2: Remove skeleton.dtsi usage
ARM: dts: omap3: Remove skeleton.dtsi usage
ARM: dts: omap4: Remove skeleton.dtsi usage
ARM: dts: omap5: Remove skeleton.dtsi usage
ARM: dts: am33xx: Remove skeleton.dtsi usage
ARM: dts: dm814x: Remove skeleton.dtsi usage
ARM: dts: dm816x: Remove skeleton.dtsi usage
ARM: dts: dra7: Remove skeleton.dtsi usage
ARM: dts: am4372: Remove skeleton.dtsi usage
ARM: dts: omap2: Add missing unit name to memory nodes
ARM: dts: omap3: Add missing unit name to memory nodes
ARM: dts: omap4: Add missing unit name to memory nodes
ARM: dts: omap5: Add missing unit name to memory nodes
ARM: dts: am335x: Add missing unit name to memory nodes
ARM: dts: am3517: Add missing unit name to memory nodes
ARM: dts: am4372: Add missing unit name to memory nodes
ARM: dts: am572x: Add missing unit name to memory nodes
ARM: dts: dm8148: Add missing unit name to memory nodes
ARM: dts: dm8168: Add missing unit name to memory nodes
ARM: dts: dra62x: Add missing unit name to memory nodes
ARM: dts: dra7: Add missing unit name to memory nodes
ARM: dts: exynos: Add missing memory node for Exynos5440 boards
ARM: dts: exynos: Remove skeleton.dtsi usage for Exynos3
ARM: dts: exynos: Remove skeleton.dtsi usage for Exynos4
ARM: dts: exynos: Remove skeleton.dtsi usage for Exynos5
ARM: dts: exynos: Add missing unit name to memory nodes in Exynos3 DTS
ARM: dts: exynos: Add missing unit name to memory nodes in Exynos4 DTS
ARM: dts: exynos: Add missing unit name to memory nodes in Exynos5 DTS
ARM: dts: s5p: Remove skeleton.dtsi inclusion for S5PV210
ARM: dts: s5p: Add missing unit name to memory nodes for S5PV210 boards
Jean-Christophe Trotin (1):
ARM: dts: STiH410: Add hva dt nodes
Jisheng Zhang (11):
arm: dts: berlin2: enable all wdt nodes unconditionally
arm: dts: berlin2q: enable all wdt nodes unconditionally
ARM: dts: berlin2q: Remove skeleton.dtsi inclusion
ARM: dts: berlin2cd: Remove skeleton.dtsi inclusion
ARM: dts: berlin2: Remove skeleton.dtsi inclusion
ARM: dts: berlin2q: Add missing unit name to /soc node
ARM: dts: berlin2cd: Add missing unit name to /soc node
ARM: dts: berlin2: Add missing unit name to /soc node
ARM: dts: berlin2q-marvell-dmp: add missing unit name to /memory node
ARM: dts: chromecast: add missing unit name to /memory node
ARM: dts: sony-nsz-gs7: add missing unit name to /memory node
Joachim Eastwood (4):
ARM: dts: lpc18xx: configure dwmac properly
ARM: dts: armv7-m: remove skeleton.dtsi include
ARM: dts: lpc18xx: remove skeleton.dtsi include and fix unit address warnings
ARM: dts: efm32: remove skeleton.dtsi include and fix unit address warnings
John Stultz (3):
device-tree: nexus7: Set phy mode to otg instead of host
device-tree: aqp8064.dtsi: Remove usb phy dr_mode = "host"
device-tree: nexus7: Add IMEM syscon and reboot reason support
Jon Hunter (1):
ARM: tegra: Correct polarity for Tegra114 PMIC interrupt
Jon Mason (14):
dt-bindings: net: bgmac: add bindings documentation for bgmac
ARM: dts: NSP: Add AMAC entries
ARM: dts: NSP: Correct RAM amount for BCM958625HR board
ARM: dts: NSP: Enable SATA on bcm958625hr
ARM: dts: NSP: Enable SATA and add i2c devices on XMC
ARM: dts: NSP: Specify RAM amount for BCM958625K board
ARM: dts: NSP: Specify RAM amount for BCM958525XMC board
ARM: dts: NSP: Add GPIO reboot method to bcm958625hr DTS file
ARM: dts: NSP: Add GPIO reboot method to bcm958625xmc DTS file
ARM: dts: NSP: Add new DT file for bcm958525er
ARM: dts: NSP: Add new DT file for bcm958522er
ARM: dts: NSP: Add new DT file for bcm988312hr
ARM: dts: NSP: Add new DT file for bcm958623hr
ARM: dts: NSP: Add new DT file for bcm958622hr
Joshua Clayton (1):
ARM: dts: imx6q-evi: Use GPIO_6 for fec irq
Jyri Sarha (3):
ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node
ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes
ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node
Karl Beldan (5):
ARM: dts: da850: Add missing pin muxing for the UARTs
ARM: dts: da850: Add basic DTS for the LCDK
ARM: dts: da850,da850-evm: Add an aemif node and use it for the NAND
ARM: dts: da850-lcdk: Audio support via simple-card
ARM: dts: da850-lcdk: Add NAND to DT
Keerthy (5):
ARM: dts: AM437X-GP-EVM: AM437X-SK-EVM: Make dcdc3 dcdc5 and dcdc6 enable during suspend
ARM: dts: AM437X-GP-EVM: Remove redundant regulator compatibles
ARM: dts: AM437X-SK-EVM: Remove redundant regulator compatibles
ARM: dts: AM437X-CM-T43: Remove redundant regulator compatibles
ARM: dts: AM43X-EPOS-EVM: Remove redundant regulator compatibles
Ken Lin (1):
ARM: dts: imx6q-bx50v3: configure unused pca953x pins
Kishon Vijay Abraham I (1):
ARM: dts: DRA7: Add "linux,pci-domain" property for pci dt nodes
Krzysztof Kozlowski (18):
ARM: dts: exynos: Use stdout non-deprecated property and add serial options to Odroid XU/XU3/XU4
pinctrl: dt-bindings: samsung: Add header with values used for configuration
pinctrl: dt-bindings: samsung: Update documentation with new macros
ARM: dts: exynos: Use common macros for pinctrl configuration
ARM: dts: exynos: Use macros for pinctrl configuration on exynos3250
ARM: dts: exynos: Use macros for pinctrl configuration on exynos4210
ARM: dts: exynos: Use macros for pinctrl configuration on exynos4x12
ARM: dts: exynos: Use macros for pinctrl configuration on exynos4415
ARM: dts: exynos: Use macros for pinctrl configuration on exynos5250
ARM: dts: exynos: Use macros for pinctrl configuration on exynos5260
ARM: dts: exynos: Use macros for pinctrl configuration on exynos5410
ARM: dts: exynos: Use macros for pinctrl configuration on exynos542x/exynos5800
ARM: dts: exynos: Fix mismatched value for SD4 pull up/down configuration on exynos4210
ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415
ARM: dts: s3c64xx: Use common macros for pinctrl configuration
ARM: dts: s5pv210: Use macros for pinctrl configuration
ARM: dts: s3c2416: Use macros for pinctrl configuration
ARM: dts: s3c64xx: Use macros for pinctrl configuration
Ladislav Michl (1):
ARM: dts: omap5-igep0050.dts: Use tabs for indentation
Lars Persson (3):
ARM: dts: artpec: use clock binding header
ARM: dts: artpec: use optimized pl310 settings
ARM: dts: artpec: set irq affinity on pmu interrupts
Lee Jones (6):
ARM: dts: STiH407: Supply PWM Capture IRQ
ARM: dts: STiH407: Declare PWM Capture data lines via Pinctrl
ARM: dts: STiH416: Supply PWM Capture IRQs
ARM: dts: STiH416: Declare PWM Capture data lines via Pinctrl
ARM: dts: STiH416: Define PWM Capture clock
ARM: dts: STiH416: Define the number of PWM Capture channels
Linus Walleij (13):
ARM: dts: MSM8064 remove flags from SPMI/MPP IRQs
ARM: dts: MSM8660 remove flags from SPMI/MPP IRQs
ARM: dts: add PM8058 LEDs to the APQ8060 Dragonboard
ARM: dts: fix RealView EB SMSC ethernet version
ARM: dts: add device tree for the RealView EB Rev D
ARM: dts: split RealView EB 11MPCore variants
ARM: dts: add RealView EB rev D A9 MPCore variant
ARM: dts: add STMPE PWM to the NHK15 device tree
dt-bindings: add vendor TPO
dt-bindings: Add TPO TPG110 binding
ARM: nomadik: select MFD_SYSCON
ARM: dts: add PMU to the NHK15 device tree
ARM: dts: add the CLCD LCD display to the NHK15
Lucile Quirion (2):
of: documentation: add bindings documentation for TS-4900
ARM: dts: TS-4900: add basic device tree
Marek Szyprowski (1):
ARM: dts: exynos: Add all required FIMC-IS clocks to exynos4x12
Marek Vasut (1):
ARM: dts: imx6sx: Add GPU bindings
Mark Rutland (1):
ARM: dts: explicitly mark skeleton.dtsi as deprecated
Masahiro Yamada (5):
ARM: dts: uniphier: remove a whitespace after tabs
ARM: dts: uniphier: match DT names to other projects and documents
ARM: dts: uniphier: switch over to PSCI
ARM: dts: uniphier: use clock/reset controllers
ARM: dts: uniphier: add specific compatible to SoC-Glue node
Maxime Ripard (2):
ARM: dt: axp209: Add AXP209 GPIO driver
ARM: sun5i: chip: Add status LED
Meng Yi (1):
ARM: dts: ls1021a: Add of_graph dt nodes to describe the panel
Michael Trimarchi (1):
ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
Milo Kim (3):
ARM: dts: exynos: Use 'hpd-gpios' instead of 'hpd-gpio'
ARM: dts: exynos: Enable HDMI for Arndale Octa board
ARM: dts: sun8i: Add PWM controller node in H3
Neil Armstrong (1):
ARM: dts: meson8b: Add Meson8b PWM Controller nodes
Nishanth Menon (4):
ARM: dts: keystone-k2g: Add Message Manager node
ARM: dts: am57xx-beagle-x15: Remove pinmux configurations for erratum i869
ARM: dts: am57xx-beagle-x15: Add support for rev B1
ARM: dts: am57xx-beagle-x15-common: Fix wrong pinctrl selection for mmc2
Olivier Schonken (1):
ARM: dts: at91: sama5d2: add ETM and ETB nodes
Olof Johansson (1):
Merge tag 'berlin-dt-for-v4.9-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Patrice Chotard (17):
ARM: dts: STiH407: Move pio20 node to fix kernel warning
ARM: dts: STiH410: Add thermal node
ARM: dts: STiH407-pinctrl: Add i2c2_alt2_1 node
ARM: dts: STiH407: Move non-removable property to board file
ARM: dts: STiH407-pinctrl: Add pinctrl_rgmii1_mdio_1 node
ARM: dts: STiH407-family: Add ports-implemented property in sata nodes
ARM: dts: STi: Introduce B2260 board
ARM: dts: STiH407-pinctrl: Update gpio-cells to 2
ARM: dts: STiH418-B2199: Update gpio specifier
ARM: dts: STiH41x-b2020: Update gpio specifier
ARM: dts: STiH415-pinctrl: update gpio-cells to 2
ARM: dts: STiH416-pinctrl: update gpio-cells to 2
ARM: dts: STiHxxx-b2120: update gpio specifier
ARM: dts: STiH41x-b2000: update gpio specifier
ARM: dts: STiH416-b2020e: update gpio specifier
ARM: dts: STiH410-b2260: add USB3 node
ARM: dts: STiH410-b2260: add clk_ignore_unused in bootargs
Peter Griffin (8):
ARM: STi: DT: STiH407: Add FDMA driver dt nodes.
ARM: DT: STiH407: Add i2s_out pinctrl configuration
ARM: DT: STiH407: Add i2s_in pinctrl configuration
ARM: DT: STiH407: Add spdif_out pinctrl config
ARM: STi: DT: STiH407: Add sti-sasg-codec dt node
ARM: STi: DT: STiH407: Add uniperif player dt nodes
ARM: STi: DT: STiH407: Add uniperif reader dt nodes
ARM: DT: STi: stihxxx-b2120: Add DT nodes for STi audio card
Rafa? Mi?ecki (1):
ARM: BCM5301X: Specify PHY of USB 2.0 in DT
Rajendra Nayak (3):
arm: dts: msm8974: Add thermal zones, tsens and qfprom nodes
arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes
arm: dts: apq8084: Add thermal zones, tsens and qfprom nodes
Randy Li (3):
ARM: dts: rockchip: add rk3288-firefly-reload
ARM: dts: rockchip: remove excess sd properties from firefly reload
ARM: dts: rockchip: add missing regulators for firefly reload board
Sascha Hauer (1):
ARM: i.MX6 Phytec PFLA02: Add supplies for the SoC internal regulators
Sekhar Nori (1):
ARM: dts: dra7: workaround silicon limitation i845
Sergei Shtylyov (42):
ARM: dts: r8a7792: add PFC support
ARM: dts: blanche: add SCIF0/3 pins
ARM: dts: blanche: add Ethernet pins
ARM: dts: r8a7792: add GPIO clocks
ARM: dts: r8a7792: add GPIO support
ARM: dts: r8a7792: add EtherAVB clocks
ARM: dts: r8a7792: add EtherAVB support
ARM: dts: r8a7792: add CAN clocks
ARM: dts: r8a7792: add CAN support
ARM: dts: blanche: add CAN0 support
ARM: dts: r8a7792: add SD clocks
ARM: dts: r8a7792: add SDHI support
ARM: dts: r8a7792: add I2C clocks
ARM: dts: r8a7792: add I2C support
ARM: dts: r8a7792: add VIN clocks
ARM: dts: r8a7792: add VIN support
ARM: dts: r8a7794: add audio clocks
ARM: dts: r8a7794: add MSTP5 clocks
ARM: dts: r8a7794: add MSTP10 clocks
ARM: dts: r8a7794: add Audio-DMAC support
ARM: dts: r8a7794: add sound support
ARM: dts: silk: add sound support
ARM: dts: r8a7792: fix misindented line
ARM: dts: r8a7792: add DU clocks
ARM: dts: r8a7792: add DU support
ARM: dts: r8a7794: add VSP1 support
ARM: dts: blanche: add support for general purpose switches
ARM: dts: blanche: add SDHI0 support
ARM: dts: blanche: add DU support
ARM: dts: r8a7792: add VSP1V clocks
ARM: dts: r8a7792: add VSP1V support
ARM: dts: blanche: add support for general purpose LEDs
ARM: dts: document Wheat board
ARM: dts: wheat: initial device tree
ARM: dts: wheat: add Ethernet support
ARM: dts: r8a7794: fix PWM clock parent
ARM: dts: wheat: add CAN support
ARM: dts: wheat: add SDHI0 support
ARM: dts: r8a7792: add QSPI clock
ARM: dts: r8a7792: add QSPI support
ARM: dts: wheat: add QSPI support
ARM: dts: wheat: add support for tactile switches
Simon Horman (3):
ARM: dts: r8a7794: Correct SDHI register size
ARM: dts: alt: add SDHI0 and 1 support
ARM: dts: alt: add MMCIF support
Stefan Agner (8):
ARM: dts: imx7d: move ARM platform peripherals inside soc node
ARM: dts: imx7d: fix GIC nodes interrupt and register specification
ARM: dts: imx7d: move CPU operating points to imx7d.dtsi
ARM: dts: imx7d: add clock-frequency to CPU nodes
ARM: dts: imx7-colibri: move SD-card to module level
ARM: dts: imx7-colibri: add basic supply regulators
ARM: dts: imx7-colibri: add Audio support
ARM: dts: vf610-colibri: use of_graph dt nodes to describe the panel
Stefan Mavrodiev (1):
ARM: dts: sun8i: Add dts file for Olimex A33-OLinuXino
Stefan M?ller-Klieser (1):
ARM: dts: am335x-wega: Add audio support
Stefan Roese (3):
ARM: dts: mvebu: Add SPI1 pinctrl defines for Armada XP
ARM: dts: mvebu: A37x/XP/38x/39x: Move SPI controller nodes into 'soc' node
ARM: dts: mvebu: armada-370-xp: Add MBus mappings for all SPI devices
Stefan Wahren (4):
ARM: dts: bcm283x: Add missing USB clock
ARM: dts: bcm283x: Add dtsi for USB host mode
DT: bindings: bcm: Add Raspberry Pi Zero
ARM: dts: bcm2835: Add Raspberry Pi Zero
Stephen Warren (1):
ARM: tegra: Fix Tegra114 USB compatible values
Tero Kristo (2):
ARM: dts: am437x-gp-evm: disable DDR regulator in rtc-only/poweroff mode
ARM: dts: am437x-sk-evm: disable DDR regulator in rtc-only/poweroff mode
Tim Harvey (3):
ARM: dts: imx: ventana: Add ext watchdog reset
ARM: dts: imx: add Gateworks Ventana GW553x support
ARM: dts: imx: ventana: add RS485 txen gpio support
Tony Lindgren (8):
ARM: dts: Configure panda SDIO WLAN wakeirq
ARM: dts: ARM: dts: Fix omap5 SDIO dat1 interrupt
ARM: dts: Configure omap5 OTG ID pin
ARM: dts: Add power button support for igepv5
ARM: dts: Fix LEDs for igepv5
ARM: dts: Add support for more than 2GB of memory for omap5
Merge branch 'am335x-cpufreq-regression' into omap-for-v4.9/dt-v2
ARM: dts: Fix igepv5 power button GPIO direction
Uwe Kleine-K?nig (2):
ARM: dts: imx6qdl: don't configure reserved pad settings
ARM: dts: imx35: add iim module to imx35.dtsi
Vanessa Maegima (4):
ARM: dts: imx6ul-pico-hobbit: Add Wifi support
ARM: dts: imx7s-warp: Enable I2C2 device support
ARM: dts: imx7s-warp: Add User Button support
ARM: dts: imx7s-warp: Add Bluetooth support
Vignesh R (3):
ARM: dts: dra7xx: Increase spi-max-frequency to 76.8MHz for QSPI
ARM: dts: am57xx-idk-common: Enable support for QSPI
ARM: dts: am335x-icev2: Add nodes for gpio-decoder
Vladimir Zapolskiy (1):
ARM: dts: add gpio-ranges property to iMX GPIO controllers
Xing Zheng (1):
ARM: dts: rockchip: add dts for RK3288-Fennec boards
Yakir Yang (3):
ARM: dts: rockchip: add eDP/panel display device nodes for rk3288-evb
ARM: dts: rockchip: add the panel power supply for rk3288-evb board with act8846 pmu
ARM: dts: rockchip: add the panel power supply for rk3288-evb board with rk808 pmu
Yendapally Reddy Dhananjaya Reddy (1):
ARM: dts: NSP: Add PWM Support to DT
twp at codeaurora.org (1):
ipq8064: dts: force AP148 SATA port mapping
.../devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 4 +
Documentation/devicetree/bindings/arm/davinci.txt | 4 +
.../devicetree/bindings/arm/marvell/armada-39x.txt | 15 +-
.../bindings/arm/marvell/marvell,orion5x.txt | 25 +
.../devicetree/bindings/arm/omap/omap.txt | 6 +
Documentation/devicetree/bindings/arm/rockchip.txt | 8 +
Documentation/devicetree/bindings/arm/shmobile.txt | 4 +
.../devicetree/bindings/arm/technologic.txt | 6 +
.../devicetree/bindings/clock/qcom,gcc.txt | 16 +
.../bindings/display/exynos/exynos_hdmi.txt | 4 +-
.../bindings/display/panel/tpo,tpg110.txt | 47 ++
.../devicetree/bindings/gpio/mrvl-gpio.txt | 23 -
.../devicetree/bindings/net/brcm,amac.txt | 24 +
.../devicetree/bindings/net/brcm,bgmac-nsp.txt | 24 +
.../bindings/pinctrl/samsung-pinctrl.txt | 44 +-
.../devicetree/bindings/vendor-prefixes.txt | 3 +
MAINTAINERS | 2 +
arch/arm/boot/dts/Makefile | 58 +-
arch/arm/boot/dts/am335x-baltos.dtsi | 8 +-
arch/arm/boot/dts/am335x-base0033.dts | 4 +-
arch/arm/boot/dts/am335x-bone-common.dtsi | 12 +-
arch/arm/boot/dts/am335x-boneblack.dts | 11 -
arch/arm/boot/dts/am335x-chilisom.dtsi | 2 +-
arch/arm/boot/dts/am335x-cm-t335.dts | 8 +-
arch/arm/boot/dts/am335x-evm.dts | 18 +-
arch/arm/boot/dts/am335x-evmsk.dts | 70 +-
arch/arm/boot/dts/am335x-icev2.dts | 47 +-
arch/arm/boot/dts/am335x-igep0033.dtsi | 10 +-
arch/arm/boot/dts/am335x-lxm.dts | 6 +-
arch/arm/boot/dts/am335x-nano.dts | 4 +-
arch/arm/boot/dts/am335x-pepper.dts | 18 +-
arch/arm/boot/dts/am335x-phycore-som.dtsi | 6 +-
arch/arm/boot/dts/am335x-shc.dts | 16 +-
arch/arm/boot/dts/am335x-sl50.dts | 15 +-
arch/arm/boot/dts/am335x-wega.dtsi | 64 +-
arch/arm/boot/dts/am33xx.dtsi | 92 +--
arch/arm/boot/dts/am3517-craneboard.dts | 2 +-
arch/arm/boot/dts/am3517-evm.dts | 2 +-
arch/arm/boot/dts/am3517.dtsi | 2 +-
arch/arm/boot/dts/am3517_mt_ventoux.dts | 2 +-
arch/arm/boot/dts/am4372.dtsi | 10 +-
arch/arm/boot/dts/am437x-cm-t43.dts | 6 -
arch/arm/boot/dts/am437x-gp-evm.dts | 21 +-
arch/arm/boot/dts/am437x-idk-evm.dts | 2 +-
arch/arm/boot/dts/am437x-sk-evm.dts | 45 +-
arch/arm/boot/dts/am43x-epos-evm.dts | 11 +-
arch/arm/boot/dts/am572x-idk.dts | 2 +-
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 596 +++++++++++++++
arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts | 24 +
arch/arm/boot/dts/am57xx-beagle-x15.dts | 812 +--------------------
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 4 +-
arch/arm/boot/dts/am57xx-idk-common.dtsi | 49 ++
.../dts/arm-realview-eb-11mp-bbrevd-ctrevb.dts | 32 +
arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dts | 28 +
...mp-revb.dts => arm-realview-eb-11mp-ctrevb.dts} | 0
arch/arm/boot/dts/arm-realview-eb-11mp.dts | 2 +-
arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dts | 28 +
arch/arm/boot/dts/arm-realview-eb-bbrevd.dts | 29 +
arch/arm/boot/dts/arm-realview-eb-bbrevd.dtsi | 45 ++
arch/arm/boot/dts/arm-realview-eb.dtsi | 23 +-
arch/arm/boot/dts/armada-370-db.dts | 29 +-
.../dts/armada-370-seagate-personal-cloud.dtsi | 40 +-
arch/arm/boot/dts/armada-370-synology-ds213j.dts | 112 +--
arch/arm/boot/dts/armada-370-xp.dtsi | 56 +-
arch/arm/boot/dts/armada-370.dtsi | 34 +-
arch/arm/boot/dts/armada-385-db-ap.dts | 58 +-
arch/arm/boot/dts/armada-385-linksys.dtsi | 9 +-
arch/arm/boot/dts/armada-388-clearfog.dts | 48 +-
arch/arm/boot/dts/armada-388-db.dts | 25 +-
arch/arm/boot/dts/armada-388-gp.dts | 30 +-
arch/arm/boot/dts/armada-388-rd.dts | 25 +-
arch/arm/boot/dts/armada-38x.dtsi | 57 +-
arch/arm/boot/dts/armada-390-db.dts | 175 +++++
arch/arm/boot/dts/armada-390.dtsi | 3 +
arch/arm/boot/dts/armada-395-gp.dts | 163 +++++
arch/arm/boot/dts/armada-395.dtsi | 76 ++
arch/arm/boot/dts/armada-398-db.dts | 56 +-
arch/arm/boot/dts/armada-398.dtsi | 10 +-
arch/arm/boot/dts/armada-39x.dtsi | 126 +++-
arch/arm/boot/dts/armada-xp-axpwifiap.dts | 24 +-
arch/arm/boot/dts/armada-xp-db.dts | 24 +-
arch/arm/boot/dts/armada-xp-gp.dts | 24 +-
arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 24 +-
arch/arm/boot/dts/armada-xp-synology-ds414.dts | 112 +--
arch/arm/boot/dts/armada-xp.dtsi | 31 +-
arch/arm/boot/dts/armv7-m.dtsi | 2 -
arch/arm/boot/dts/artpec6.dtsi | 31 +-
arch/arm/boot/dts/axp209.dtsi | 6 +
arch/arm/boot/dts/bcm-nsp.dtsi | 37 +
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 1 +
arch/arm/boot/dts/bcm2835-rpi-a.dts | 1 +
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 1 +
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 1 +
arch/arm/boot/dts/bcm2835-rpi-b.dts | 1 +
arch/arm/boot/dts/bcm2835-rpi-zero.dts | 40 +
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 1 +
arch/arm/boot/dts/bcm283x-rpi-usb-host.dtsi | 3 +
arch/arm/boot/dts/bcm283x.dtsi | 9 +
arch/arm/boot/dts/bcm5301x.dtsi | 11 +
arch/arm/boot/dts/bcm958522er.dts | 130 ++++
arch/arm/boot/dts/bcm958525er.dts | 142 ++++
arch/arm/boot/dts/bcm958525xmc.dts | 44 +-
arch/arm/boot/dts/bcm958622hr.dts | 170 +++++
arch/arm/boot/dts/bcm958623hr.dts | 178 +++++
arch/arm/boot/dts/bcm958625hr.dts | 71 +-
arch/arm/boot/dts/bcm958625k.dts | 13 +
arch/arm/boot/dts/bcm988312hr.dts | 182 +++++
arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts | 2 +-
arch/arm/boot/dts/berlin2.dtsi | 7 +-
arch/arm/boot/dts/berlin2cd-google-chromecast.dts | 2 +-
arch/arm/boot/dts/berlin2cd.dtsi | 5 +-
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 2 +-
arch/arm/boot/dts/berlin2q.dtsi | 8 +-
arch/arm/boot/dts/da850-evm.dts | 51 +-
arch/arm/boot/dts/da850-lcdk.dts | 221 ++++++
arch/arm/boot/dts/da850.dtsi | 80 +-
arch/arm/boot/dts/dm8148-evm.dts | 4 +-
arch/arm/boot/dts/dm8148-t410.dts | 4 +-
arch/arm/boot/dts/dm814x.dtsi | 4 +-
arch/arm/boot/dts/dm8168-evm.dts | 4 +-
arch/arm/boot/dts/dm816x.dtsi | 4 +-
arch/arm/boot/dts/dra62x-j5eco-evm.dts | 4 +-
arch/arm/boot/dts/dra7-evm.dts | 14 +-
arch/arm/boot/dts/dra7.dtsi | 36 +-
arch/arm/boot/dts/dra72-evm-common.dtsi | 4 +-
arch/arm/boot/dts/dra72-evm-revc.dts | 2 +-
arch/arm/boot/dts/dra72-evm.dts | 2 +-
arch/arm/boot/dts/dra74x.dtsi | 1 -
arch/arm/boot/dts/dra7xx-clocks.dtsi | 15 +-
arch/arm/boot/dts/efm32gg-dk3750.dts | 5 +-
arch/arm/boot/dts/efm32gg.dtsi | 4 +
arch/arm/boot/dts/exynos3250-artik5.dtsi | 3 +-
arch/arm/boot/dts/exynos3250-monk.dts | 3 +-
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 346 +++++----
arch/arm/boot/dts/exynos3250-rinato.dts | 3 +-
arch/arm/boot/dts/exynos3250.dtsi | 3 +-
arch/arm/boot/dts/exynos4.dtsi | 3 +-
arch/arm/boot/dts/exynos4210-origen.dts | 3 +-
arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 458 ++++++------
arch/arm/boot/dts/exynos4210-smdkv310.dts | 15 +-
arch/arm/boot/dts/exynos4210-trats.dts | 3 +-
arch/arm/boot/dts/exynos4210-universal_c210.dts | 13 +-
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 16 +-
arch/arm/boot/dts/exynos4412-odroidu3.dts | 3 +-
arch/arm/boot/dts/exynos4412-odroidx.dts | 5 +-
arch/arm/boot/dts/exynos4412-odroidx2.dts | 3 +-
arch/arm/boot/dts/exynos4412-origen.dts | 15 +-
arch/arm/boot/dts/exynos4412-smdk4412.dts | 15 +-
arch/arm/boot/dts/exynos4412-tiny4412.dts | 3 +-
arch/arm/boot/dts/exynos4412-trats2.dts | 3 +-
arch/arm/boot/dts/exynos4415-pinctrl.dtsi | 296 ++++----
arch/arm/boot/dts/exynos4415.dtsi | 3 +-
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 525 +++++++------
arch/arm/boot/dts/exynos4x12.dtsi | 5 +-
arch/arm/boot/dts/exynos5.dtsi | 3 +-
arch/arm/boot/dts/exynos5250-arndale.dts | 5 +-
arch/arm/boot/dts/exynos5250-pinctrl.dtsi | 404 +++++-----
arch/arm/boot/dts/exynos5250-smdk5250.dts | 11 +-
arch/arm/boot/dts/exynos5250-snow-common.dtsi | 81 +-
arch/arm/boot/dts/exynos5250-snow-rev5.dts | 6 +-
arch/arm/boot/dts/exynos5250-snow.dts | 6 +-
arch/arm/boot/dts/exynos5250-spring.dts | 77 +-
arch/arm/boot/dts/exynos5260-pinctrl.dtsi | 280 ++++---
arch/arm/boot/dts/exynos5260-xyref5260.dts | 9 +-
arch/arm/boot/dts/exynos5260.dtsi | 4 +-
arch/arm/boot/dts/exynos5410-odroidxu.dts | 35 +-
arch/arm/boot/dts/exynos5410-pinctrl.dtsi | 182 ++---
arch/arm/boot/dts/exynos5410-smdk5410.dts | 13 +-
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 22 +-
arch/arm/boot/dts/exynos5420-peach-pit.dts | 131 ++--
arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 356 ++++-----
arch/arm/boot/dts/exynos5420-smdk5420.dts | 23 +-
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 25 +-
arch/arm/boot/dts/exynos5440-sd5v1.dts | 6 +
arch/arm/boot/dts/exynos5440-ssdk5440.dts | 6 +
arch/arm/boot/dts/exynos5440.dtsi | 3 +-
arch/arm/boot/dts/exynos54xx.dtsi | 1 -
arch/arm/boot/dts/exynos5800-peach-pi.dts | 131 ++--
arch/arm/boot/dts/imx35.dtsi | 7 +
arch/arm/boot/dts/imx50.dtsi | 10 +
arch/arm/boot/dts/imx53-usbarmory.dts | 224 ++++++
arch/arm/boot/dts/imx53.dtsi | 18 +
arch/arm/boot/dts/imx6dl-gw553x.dts | 55 ++
arch/arm/boot/dts/imx6dl-riotboard.dts | 22 +-
arch/arm/boot/dts/imx6dl-ts4900.dts | 49 ++
arch/arm/boot/dts/imx6dl.dtsi | 53 ++
arch/arm/boot/dts/imx6q-arm2.dts | 24 +-
arch/arm/boot/dts/imx6q-b450v3.dts | 16 +
arch/arm/boot/dts/imx6q-b650v3.dts | 9 +
arch/arm/boot/dts/imx6q-ba16.dtsi | 24 +-
arch/arm/boot/dts/imx6q-bx50v3.dtsi | 70 ++
arch/arm/boot/dts/imx6q-cm-fx6.dts | 24 +-
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 24 +-
arch/arm/boot/dts/imx6q-evi.dts | 28 +-
arch/arm/boot/dts/imx6q-gw5400-a.dts | 24 +-
arch/arm/boot/dts/imx6q-gw553x.dts | 55 ++
arch/arm/boot/dts/imx6q-marsboard.dts | 24 +-
arch/arm/boot/dts/imx6q-novena.dts | 12 +-
arch/arm/boot/dts/imx6q-sbc6x.dts | 24 +-
arch/arm/boot/dts/imx6q-tbs2910.dts | 24 +-
arch/arm/boot/dts/imx6q-ts4900.dts | 53 ++
arch/arm/boot/dts/imx6q.dtsi | 37 +
arch/arm/boot/dts/imx6qdl-apalis.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 36 +-
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 39 +-
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 39 +-
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 44 +-
arch/arm/boot/dts/imx6qdl-gw551x.dtsi | 12 +
arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 12 +
arch/arm/boot/dts/imx6qdl-gw553x.dtsi | 433 +++++++++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi | 12 +-
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 36 +-
arch/arm/boot/dts/imx6qdl-rex.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-ts4900.dtsi | 481 ++++++++++++
arch/arm/boot/dts/imx6qdl-udoo.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 24 +-
arch/arm/boot/dts/imx6sl.dtsi | 47 ++
arch/arm/boot/dts/imx6sx-pinfunc.h | 14 +
arch/arm/boot/dts/imx6sx.dtsi | 22 +
arch/arm/boot/dts/imx6ul-geam-kit.dts | 101 +++
arch/arm/boot/dts/imx6ul-geam.dtsi | 361 +++++++++
arch/arm/boot/dts/imx6ul-pico-hobbit.dts | 33 +
arch/arm/boot/dts/imx6ul.dtsi | 9 +-
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 4 -
arch/arm/boot/dts/imx7-colibri.dtsi | 61 +-
arch/arm/boot/dts/imx7d.dtsi | 42 +-
arch/arm/boot/dts/imx7s-warp.dts | 446 +++++++++++
arch/arm/boot/dts/imx7s.dtsi | 371 ++++++----
arch/arm/boot/dts/keystone-k2e-evm.dts | 12 +-
arch/arm/boot/dts/keystone-k2e.dtsi | 4 +-
arch/arm/boot/dts/keystone-k2g.dtsi | 32 +
arch/arm/boot/dts/keystone-k2hk-evm.dts | 6 +-
arch/arm/boot/dts/keystone-k2l-evm.dts | 6 +-
arch/arm/boot/dts/keystone.dtsi | 4 +-
arch/arm/boot/dts/kirkwood-openblocks_a6.dts | 9 +-
arch/arm/boot/dts/logicpd-som-lv.dtsi | 11 +-
arch/arm/boot/dts/logicpd-torpedo-som.dtsi | 6 +
arch/arm/boot/dts/lpc18xx.dtsi | 7 +
arch/arm/boot/dts/lpc4337-ciaa.dts | 2 +-
arch/arm/boot/dts/lpc4350-hitex-eval.dts | 4 +-
arch/arm/boot/dts/lpc4357-ea4357-devkit.dts | 2 +-
arch/arm/boot/dts/ls1021a-twr.dts | 13 +-
arch/arm/boot/dts/meson8b.dtsi | 21 +
arch/arm/boot/dts/mps2.dtsi | 1 +
arch/arm/boot/dts/omap2.dtsi | 4 +-
arch/arm/boot/dts/omap2420-h4.dts | 2 +-
arch/arm/boot/dts/omap2420-n8x0-common.dtsi | 2 +-
arch/arm/boot/dts/omap2430-sdp.dts | 2 +-
arch/arm/boot/dts/omap3-beagle-xm.dts | 2 +-
arch/arm/boot/dts/omap3-beagle.dts | 2 +-
arch/arm/boot/dts/omap3-cm-t3x.dtsi | 2 +-
arch/arm/boot/dts/omap3-devkit8000-common.dtsi | 2 +-
arch/arm/boot/dts/omap3-evm-37xx.dts | 2 +-
arch/arm/boot/dts/omap3-evm.dts | 2 +-
arch/arm/boot/dts/omap3-gta04.dtsi | 4 +-
arch/arm/boot/dts/omap3-igep.dtsi | 2 +-
arch/arm/boot/dts/omap3-ldp.dts | 2 +-
arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 2 +-
arch/arm/boot/dts/omap3-n900.dts | 2 +-
arch/arm/boot/dts/omap3-n950-n9.dtsi | 6 +-
arch/arm/boot/dts/omap3-overo-alto35-common.dtsi | 2 +-
arch/arm/boot/dts/omap3-overo-base.dtsi | 10 +-
.../boot/dts/omap3-overo-chestnut43-common.dtsi | 6 +-
arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi | 2 +-
arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi | 4 +-
arch/arm/boot/dts/omap3-overo-palo35-common.dtsi | 4 +-
arch/arm/boot/dts/omap3-overo-palo43-common.dtsi | 4 +-
arch/arm/boot/dts/omap3-overo-tobi-common.dtsi | 2 -
arch/arm/boot/dts/omap3-overo-tobiduo-common.dtsi | 3 -
arch/arm/boot/dts/omap3-pandora-common.dtsi | 10 +-
arch/arm/boot/dts/omap3-sniper.dts | 2 +-
arch/arm/boot/dts/omap3-tao3530.dtsi | 2 +-
arch/arm/boot/dts/omap3-zoom3.dts | 2 +-
arch/arm/boot/dts/omap3.dtsi | 6 +-
arch/arm/boot/dts/omap3430-sdp.dts | 2 +-
arch/arm/boot/dts/omap34xx.dtsi | 2 +-
arch/arm/boot/dts/omap36xx.dtsi | 2 +-
arch/arm/boot/dts/omap4-duovero-parlor.dts | 2 +-
arch/arm/boot/dts/omap4-duovero.dtsi | 2 +-
arch/arm/boot/dts/omap4-kc1.dts | 2 +-
arch/arm/boot/dts/omap4-panda-common.dtsi | 4 +-
arch/arm/boot/dts/omap4-sdp.dts | 2 +-
arch/arm/boot/dts/omap4-var-som-om44.dtsi | 2 +-
arch/arm/boot/dts/omap4.dtsi | 4 +-
arch/arm/boot/dts/omap5-board-common.dtsi | 29 +-
arch/arm/boot/dts/omap5-cm-t54.dts | 6 +-
arch/arm/boot/dts/omap5-igep0050.dts | 42 +-
arch/arm/boot/dts/omap5-uevm.dts | 18 +-
arch/arm/boot/dts/omap5.dtsi | 26 +-
arch/arm/boot/dts/orion5x-mv88f5181.dtsi | 49 ++
arch/arm/boot/dts/orion5x-netgear-wnr854t.dts | 251 +++++++
arch/arm/boot/dts/orion5x.dtsi | 3 +-
arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 39 +
arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 15 +
arch/arm/boot/dts/qcom-apq8064.dtsi | 180 ++++-
arch/arm/boot/dts/qcom-apq8084.dtsi | 103 +++
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 1 +
arch/arm/boot/dts/qcom-msm8660.dtsi | 75 +-
.../dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 262 +++++++
.../boot/dts/qcom-msm8974-sony-xperia-honami.dts | 81 +-
arch/arm/boot/dts/qcom-msm8974.dtsi | 139 ++++
arch/arm/boot/dts/qcom-pm8941.dtsi | 5 +
arch/arm/boot/dts/r7s72100-rskrza1.dts | 61 ++
arch/arm/boot/dts/r7s72100.dtsi | 22 +
arch/arm/boot/dts/r8a7790.dtsi | 23 -
arch/arm/boot/dts/r8a7791.dtsi | 18 -
arch/arm/boot/dts/r8a7792-blanche.dts | 264 +++++++
arch/arm/boot/dts/r8a7792-wheat.dts | 199 +++++
arch/arm/boot/dts/r8a7792.dtsi | 554 +++++++++++++-
arch/arm/boot/dts/r8a7794-alt.dts | 106 +++
arch/arm/boot/dts/r8a7794-silk.dts | 70 ++
arch/arm/boot/dts/r8a7794.dtsi | 309 +++++++-
arch/arm/boot/dts/rk3036.dtsi | 12 +-
arch/arm/boot/dts/rk3288-evb-act8846.dts | 4 +
arch/arm/boot/dts/rk3288-evb-rk808.dts | 4 +
arch/arm/boot/dts/rk3288-evb.dtsi | 45 +-
arch/arm/boot/dts/rk3288-fennec.dts | 382 ++++++++++
arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi | 310 ++++++++
arch/arm/boot/dts/rk3288-firefly-reload.dts | 403 ++++++++++
arch/arm/boot/dts/rk3288-popmetal.dts | 12 +-
arch/arm/boot/dts/rk3288.dtsi | 73 +-
arch/arm/boot/dts/rk3xxx.dtsi | 12 +-
arch/arm/boot/dts/s3c2416-pinctrl.dtsi | 38 +-
arch/arm/boot/dts/s3c6410-mini6410.dts | 4 +-
arch/arm/boot/dts/s3c64xx-pinctrl.dtsi | 356 +++++----
arch/arm/boot/dts/s5pv210-aquila.dts | 6 +-
arch/arm/boot/dts/s5pv210-goni.dts | 2 +-
arch/arm/boot/dts/s5pv210-pinctrl.dtsi | 476 ++++++------
arch/arm/boot/dts/s5pv210-smdkc110.dts | 2 +-
arch/arm/boot/dts/s5pv210-smdkv210.dts | 2 +-
arch/arm/boot/dts/s5pv210-torbreck.dts | 2 +-
arch/arm/boot/dts/s5pv210.dtsi | 4 +-
arch/arm/boot/dts/sama5d2.dtsi | 29 +
arch/arm/boot/dts/skeleton.dtsi | 4 +
arch/arm/boot/dts/ste-nomadik-nhk15.dts | 68 ++
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 28 +
arch/arm/boot/dts/stih407-clock.dtsi | 22 +-
arch/arm/boot/dts/stih407-family.dtsi | 173 ++++-
arch/arm/boot/dts/stih407-pinctrl.dtsi | 140 +++-
arch/arm/boot/dts/stih407.dtsi | 16 +-
arch/arm/boot/dts/stih410-b2260.dts | 194 +++++
arch/arm/boot/dts/stih410-clock.dtsi | 20 +-
arch/arm/boot/dts/stih410.dtsi | 34 +-
arch/arm/boot/dts/stih415-pinctrl.dtsi | 54 +-
arch/arm/boot/dts/stih416-b2020e.dts | 6 +-
arch/arm/boot/dts/stih416-pinctrl.dtsi | 65 +-
arch/arm/boot/dts/stih416.dtsi | 8 +-
arch/arm/boot/dts/stih418-b2199.dts | 8 +-
arch/arm/boot/dts/stih418-clock.dtsi | 20 +-
arch/arm/boot/dts/stih41x-b2000.dtsi | 5 +-
arch/arm/boot/dts/stih41x-b2020.dtsi | 6 +-
arch/arm/boot/dts/stihxxx-b2120.dtsi | 52 +-
arch/arm/boot/dts/stm32f429.dtsi | 1 +
arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 4 -
.../boot/dts/sun5i-a13-empire-electronix-m712.dts | 51 ++
arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts | 164 +----
arch/arm/boot/dts/sun5i-r8-chip.dts | 10 +
arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts | 138 +---
arch/arm/boot/dts/sun6i-a31s-inet-q972.dts | 100 +++
.../boot/dts/sun6i-reference-design-tablet.dtsi | 193 +++++
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 21 +
arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts | 192 +----
.../boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 42 ++
.../boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 42 ++
arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts | 18 +
arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 88 +++
arch/arm/boot/dts/sun8i-a33-olinuxino.dts | 226 ++++++
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 125 ++++
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 10 +
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 178 +++++
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 88 +++
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 53 ++
arch/arm/boot/dts/sun8i-h3.dtsi | 8 +
arch/arm/boot/dts/sun8i-q8-common.dtsi | 49 ++
.../boot/dts/sun8i-reference-design-tablet.dtsi | 26 +
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 29 +
arch/arm/boot/dts/sun9i-a80-optimus.dts | 29 +
arch/arm/boot/dts/sun9i-a80.dtsi | 14 +-
arch/arm/boot/dts/tegra114-dalmore.dts | 2 +-
arch/arm/boot/dts/tegra114-roth.dts | 2 +-
arch/arm/boot/dts/tegra114-tn7.dts | 2 +-
arch/arm/boot/dts/tegra114.dtsi | 8 +-
arch/arm/boot/dts/uniphier-common32.dtsi | 63 +-
...iphier-ph1-ld4-ref.dts => uniphier-ld4-ref.dts} | 11 +-
.../{uniphier-ph1-ld4.dtsi => uniphier-ld4.dtsi} | 59 +-
...hier-ph1-ld6b-ref.dts => uniphier-ld6b-ref.dts} | 11 +-
.../{uniphier-ph1-ld6b.dtsi => uniphier-ld6b.dtsi} | 17 +-
...hier-ph1-pro4-ace.dts => uniphier-pro4-ace.dts} | 11 +-
...hier-ph1-pro4-ref.dts => uniphier-pro4-ref.dts} | 11 +-
...-ph1-pro4-sanji.dts => uniphier-pro4-sanji.dts} | 11 +-
.../{uniphier-ph1-pro4.dtsi => uniphier-pro4.dtsi} | 63 +-
.../{uniphier-ph1-pro5.dtsi => uniphier-pro5.dtsi} | 58 +-
...stream2-gentil.dts => uniphier-pxs2-gentil.dts} | 12 +-
...oxstream2-vodka.dts => uniphier-pxs2-vodka.dts} | 11 +-
...niphier-proxstream2.dtsi => uniphier-pxs2.dtsi} | 62 +-
...hier-ph1-sld3-ref.dts => uniphier-sld3-ref.dts} | 11 +-
.../{uniphier-ph1-sld3.dtsi => uniphier-sld3.dtsi} | 75 +-
...hier-ph1-sld8-ref.dts => uniphier-sld8-ref.dts} | 11 +-
.../{uniphier-ph1-sld8.dtsi => uniphier-sld8.dtsi} | 59 +-
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 13 +-
arch/arm/boot/dts/vf610m4.dtsi | 1 +
arch/arm/mach-davinci/da8xx-dt.c | 1 +
arch/arm/mach-nomadik/Kconfig | 1 +
include/dt-bindings/clock/r7s72100-clock.h | 3 +
include/dt-bindings/clock/r8a7794-clock.h | 25 +
include/dt-bindings/pinctrl/samsung.h | 57 ++
include/dt-bindings/soc/rockchip,boot-mode.h | 15 +
415 files changed, 16267 insertions(+), 5464 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
create mode 100644 Documentation/devicetree/bindings/display/panel/tpo,tpg110.txt
create mode 100644 Documentation/devicetree/bindings/net/brcm,amac.txt
create mode 100644 Documentation/devicetree/bindings/net/brcm,bgmac-nsp.txt
create mode 100644 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
create mode 100644 arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
create mode 100644 arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd-ctrevb.dts
create mode 100644 arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dts
rename arch/arm/boot/dts/{arm-realview-eb-11mp-revb.dts => arm-realview-eb-11mp-ctrevb.dts} (100%)
create mode 100644 arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dts
create mode 100644 arch/arm/boot/dts/arm-realview-eb-bbrevd.dts
create mode 100644 arch/arm/boot/dts/arm-realview-eb-bbrevd.dtsi
create mode 100644 arch/arm/boot/dts/armada-390-db.dts
create mode 100644 arch/arm/boot/dts/armada-395-gp.dts
create mode 100644 arch/arm/boot/dts/armada-395.dtsi
create mode 100644 arch/arm/boot/dts/bcm2835-rpi-zero.dts
create mode 100644 arch/arm/boot/dts/bcm283x-rpi-usb-host.dtsi
create mode 100644 arch/arm/boot/dts/bcm958522er.dts
create mode 100644 arch/arm/boot/dts/bcm958525er.dts
create mode 100644 arch/arm/boot/dts/bcm958622hr.dts
create mode 100644 arch/arm/boot/dts/bcm958623hr.dts
create mode 100644 arch/arm/boot/dts/bcm988312hr.dts
create mode 100644 arch/arm/boot/dts/da850-lcdk.dts
create mode 100644 arch/arm/boot/dts/imx53-usbarmory.dts
create mode 100644 arch/arm/boot/dts/imx6dl-gw553x.dts
create mode 100644 arch/arm/boot/dts/imx6dl-ts4900.dts
create mode 100644 arch/arm/boot/dts/imx6q-gw553x.dts
create mode 100644 arch/arm/boot/dts/imx6q-ts4900.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-gw553x.dtsi
create mode 100644 arch/arm/boot/dts/imx6qdl-ts4900.dtsi
create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
create mode 100644 arch/arm/boot/dts/imx7s-warp.dts
create mode 100644 arch/arm/boot/dts/orion5x-mv88f5181.dtsi
create mode 100644 arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
create mode 100644 arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
create mode 100644 arch/arm/boot/dts/r7s72100-rskrza1.dts
create mode 100644 arch/arm/boot/dts/r8a7792-wheat.dts
create mode 100644 arch/arm/boot/dts/rk3288-fennec.dts
create mode 100644 arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
create mode 100644 arch/arm/boot/dts/rk3288-firefly-reload.dts
create mode 100644 arch/arm/boot/dts/stih410-b2260.dts
create mode 100644 arch/arm/boot/dts/sun5i-a13-empire-electronix-m712.dts
create mode 100644 arch/arm/boot/dts/sun6i-a31s-inet-q972.dts
create mode 100644 arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi
create mode 100644 arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
create mode 100644 arch/arm/boot/dts/sun8i-a33-olinuxino.dts
create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
rename arch/arm/boot/dts/{uniphier-ph1-ld4-ref.dts => uniphier-ld4-ref.dts} (89%)
rename arch/arm/boot/dts/{uniphier-ph1-ld4.dtsi => uniphier-ld4.dtsi} (80%)
rename arch/arm/boot/dts/{uniphier-ph1-ld6b-ref.dts => uniphier-ld6b-ref.dts} (89%)
rename arch/arm/boot/dts/{uniphier-ph1-ld6b.dtsi => uniphier-ld6b.dtsi} (82%)
rename arch/arm/boot/dts/{uniphier-ph1-pro4-ace.dts => uniphier-pro4-ace.dts} (90%)
rename arch/arm/boot/dts/{uniphier-ph1-pro4-ref.dts => uniphier-pro4-ref.dts} (89%)
rename arch/arm/boot/dts/{uniphier-ph1-pro4-sanji.dts => uniphier-pro4-sanji.dts} (89%)
rename arch/arm/boot/dts/{uniphier-ph1-pro4.dtsi => uniphier-pro4.dtsi} (82%)
rename arch/arm/boot/dts/{uniphier-ph1-pro5.dtsi => uniphier-pro5.dtsi} (85%)
rename arch/arm/boot/dts/{uniphier-proxstream2-gentil.dts => uniphier-pxs2-gentil.dts} (88%)
rename arch/arm/boot/dts/{uniphier-proxstream2-vodka.dts => uniphier-pxs2-vodka.dts} (88%)
rename arch/arm/boot/dts/{uniphier-proxstream2.dtsi => uniphier-pxs2.dtsi} (84%)
rename arch/arm/boot/dts/{uniphier-ph1-sld3-ref.dts => uniphier-sld3-ref.dts} (89%)
rename arch/arm/boot/dts/{uniphier-ph1-sld3.dtsi => uniphier-sld3.dtsi} (83%)
rename arch/arm/boot/dts/{uniphier-ph1-sld8-ref.dts => uniphier-sld8-ref.dts} (89%)
rename arch/arm/boot/dts/{uniphier-ph1-sld8.dtsi => uniphier-sld8.dtsi} (80%)
create mode 100644 include/dt-bindings/pinctrl/samsung.h
create mode 100644 include/dt-bindings/soc/rockchip,boot-mode.h
^ permalink raw reply
* [GIT PULL 5/8] ARM: SoC driver updates for v4.9
From: Arnd Bergmann @ 2016-10-08 0:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3637015.LRn5VyhPVM@wuerfel>
The following changes since commit 3eab887a55424fc2c27553b7bfe32330df83f7b8:
Linux 4.8-rc4 (2016-08-28 15:04:33 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/armsoc-drivers
for you to fetch changes up to d6db68b2deaa0158d25b236edffcf6dd2117208f:
bus: qcom-ebi2: depend on HAS_IOMEM (2016-10-02 22:23:57 -0700)
----------------------------------------------------------------
ARM: SoC driver updates for v4.9
Driver updates for ARM SoCs, including a couple of newly added drivers:
- The Qualcomm external bus interface 2 (EBI2), used in some of their
mobile phone chips for connecting flash memory, LCD displays or
other peripherals
- Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for the
EFUSE based on that firmware interface.
- Perf support for the AppliedMicro X-Gene performance monitor unit
- Reset driver for STMicroelectronics STM32
- Reset driver for SocioNext UniPhier SoCs
Aside from these, there are minor updates to SoC-specific bus,
clocksource, firmware, pinctrl, reset, rtc and pmic drivers.
----------------------------------------------------------------
Arnd Bergmann (14):
Merge tag 'gpmc-omap-for-v4.9' of https://github.com/rogerq/linux into next/drivers
Merge tag 'reset-for-4.9' of git://git.pengutronix.de/git/pza/linux into next/drivers
Merge commit 'http://github.com/rogerq/linux gpmc-omap-v4.8-rc1' into next/drivers
Merge tag 'amlogic-drivers' of git://git.kernel.org/.../khilman/linux-amlogic into next/drivers
Merge tag 'v4.9-rockchip-drivers1' of git://git.kernel.org/.../mmind/linux-rockchip into next/drivers
Merge tag 'at91-ab-4.9-drivers' of git://git.kernel.org/.../abelloni/linux into next/drivers
Merge tag 'qcom-drivers-for-4.9' of git://git.kernel.org/.../agross/linux into next/drivers
Merge tag 'tegra-for-4.9-bus' of git://git.kernel.org/.../tegra/linux into next/drivers
Merge tag 'tegra-for-4.9-soc' of git://git.kernel.org/.../tegra/linux into next/drivers
Merge tag 'v4.8-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers
Merge tag 'samsung-drivers-4.9-2' of git://git.kernel.org/.../krzk/linux into next/drivers
Merge tag 'xgene-drivers-for-4.9' of https://github.com/AppliedMicro/xgene-next into next/drivers
Merge tag 'mvebu-drivers-4.9-1' of git://git.infradead.org/linux-mvebu into next/drivers
Merge tag 'qcom-ebi2-arm-soc' of git://git.kernel.org/.../linusw/linux-integrator into next/drivers
Baoyou Xie (1):
memory: omap-gpmc: make gpmc_clk_ticks_to_ns() static
Bjorn Andersson (5):
soc: qcom: smd: Correct compile stub prototypes
soc: qcom: smd: Simplify multi channel handling
soc: qcom: smd: Request irqs after parsing properties
soc: qcom: smd: Represent smd edges as devices
soc: qcom: smd: Reset rx tail rather than tx
Carlo Caione (2):
firmware: Amlogic: Add secure monitor driver
nvmem: amlogic: Add Amlogic Meson EFUSE driver
Chanwoo Choi (2):
clocksource: exynos_mct: Add the support for ARM64
dt-bindings: EXYNOS: Add Exynos5433 PMU compatible
Elaine Zhang (1):
soc: rockchip: support active_wakeup for rockchip power-domains
Gabriel Fernandez (1):
ARM: dts: stm32f429: add missing #reset-cells of rcc
Henry Chen (1):
soc: mediatek: PMIC wrap: Extend the waiting time to 10ms.
Jamie Lentin (2):
clk: mvebu: Add clk support for the orion5x SoC mv88f5181
pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
Jon Hunter (1):
bus: tegra-aconnect: Use of_pm_clk_add_clk()
LABBE Corentin (1):
memory: atmel-sdramc: fix a possible NULL dereference
Linus Walleij (4):
memory: omap-gpmc: use devm_gpiochip_add_data()
bus: qcom: add EBI2 device tree bindings
bus: qcom: add EBI2 driver
bus: qcom-ebi2: depend on HAS_IOMEM
Markus Elfring (1):
memory: omap-gpmc: Delete an unnecessary check before the function call "gpiochip_free_own_desc"
Masahiro Yamada (1):
reset: uniphier: add reset controller driver for UniPhier SoCs
Maxime Coquelin (3):
dt-bindings: mfd: Add STM32F4 RCC numeric constants into DT include file
dt-bindings: Document the STM32 reset bindings
drivers: reset: Add STM32 reset driver
Neil Armstrong (2):
media: rc: meson-ir: Add support for newer versions of the IR decoder
rtc: rtc-pm8xxx: Add support for pm8018 rtc
Paul Gortmaker (1):
firmware: qcom_scm: make it explicitly non-modular
Philipp Zabel (13):
reset: socfpga: no need to store modrst_offset
reset: warn on invalid input to reset_control_reset/assert/deassert/status
reset: ath79: add missing include
reset: ath79: add driver Kconfig option
reset: berlin: add driver Kconfig option
reset: lpc18xx: add driver Kconfig option
reset: meson: add driver Kconfig option
reset: pistachio: add driver Kconfig option
reset: socfpga: add driver Kconfig option
reset: stm32: add driver Kconfig option
reset: sunxi: add driver Kconfig option
reset: zynq: add driver Kconfig option
reset: hi6220: allow to compile test driver on other architectures
Roger Quadros (1):
memory: omap-gpmc: Fix build with CONFIG_OMAP_GPMC disabled
Stephen Boyd (1):
soc: qcom: smem: Silence probe defer error
Tai Nguyen (3):
MAINTAINERS: Add entry for APM X-Gene SoC PMU driver
Documentation: Add documentation for APM X-Gene SoC PMU DTS binding
perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver
Thierry Reding (1):
bus: tegra-aconnect: Make symbol tristate
Vince Hsu (1):
soc/tegra: pmc: Fix incorrect DPD request
Wei Yongjun (1):
memory: atmel-ebi: use PTR_ERR_OR_ZERO() to simplify the code
.../devicetree/bindings/arm/samsung/pmu.txt | 1 +
.../devicetree/bindings/bus/qcom,ebi2.txt | 138 ++
.../devicetree/bindings/clock/mvebu-core-clock.txt | 1 +
.../devicetree/bindings/clock/st,stm32-rcc.txt | 42 +-
.../devicetree/bindings/mfd/qcom-pm8xxx.txt | 1 +
.../devicetree/bindings/perf/apm-xgene-pmu.txt | 112 ++
.../bindings/pinctrl/marvell,orion-pinctrl.txt | 4 +-
.../devicetree/bindings/reset/st,stm32-rcc.txt | 6 +
.../devicetree/bindings/reset/uniphier-reset.txt | 93 ++
Documentation/perf/xgene-pmu.txt | 48 +
MAINTAINERS | 8 +
arch/arm/boot/dts/stm32f429.dtsi | 1 +
drivers/bus/Kconfig | 14 +-
drivers/bus/Makefile | 1 +
drivers/bus/qcom-ebi2.c | 408 ++++++
drivers/bus/tegra-aconnect.c | 22 +-
drivers/clk/mvebu/orion.c | 70 +
drivers/clocksource/Kconfig | 2 +-
drivers/clocksource/exynos_mct.c | 4 +
drivers/firmware/Kconfig | 1 +
drivers/firmware/Makefile | 1 +
drivers/firmware/meson/Kconfig | 9 +
drivers/firmware/meson/Makefile | 1 +
drivers/firmware/meson/meson_sm.c | 248 ++++
drivers/firmware/qcom_scm.c | 19 +-
drivers/media/rc/meson-ir.c | 29 +-
drivers/memory/atmel-ebi.c | 10 +-
drivers/memory/atmel-sdramc.c | 4 +-
drivers/memory/omap-gpmc.c | 41 +-
drivers/nvmem/Kconfig | 10 +
drivers/nvmem/Makefile | 2 +
drivers/nvmem/meson-efuse.c | 93 ++
drivers/perf/Kconfig | 7 +
drivers/perf/Makefile | 1 +
drivers/perf/xgene_pmu.c | 1398 ++++++++++++++++++++
drivers/pinctrl/mvebu/pinctrl-orion.c | 23 +-
drivers/reset/Kconfig | 65 +
drivers/reset/Makefile | 20 +-
drivers/reset/core.c | 12 +-
drivers/reset/hisilicon/Kconfig | 3 +-
drivers/reset/reset-ath79.c | 1 +
drivers/reset/reset-socfpga.c | 19 +-
drivers/reset/reset-stm32.c | 108 ++
drivers/reset/reset-uniphier.c | 440 ++++++
drivers/rtc/rtc-pm8xxx.c | 1 +
drivers/soc/mediatek/mtk-pmic-wrap.c | 2 +-
drivers/soc/qcom/smd.c | 265 ++--
drivers/soc/qcom/smem.c | 3 +-
drivers/soc/rockchip/pm_domains.c | 100 +-
drivers/soc/tegra/pmc.c | 28 +-
include/dt-bindings/mfd/stm32f4-rcc.h | 98 ++
include/linux/firmware/meson/meson_sm.h | 31 +
include/linux/omap-gpmc.h | 4 +-
include/linux/soc/qcom/smd.h | 29 +-
54 files changed, 3798 insertions(+), 304 deletions(-)
create mode 100644 Documentation/devicetree/bindings/bus/qcom,ebi2.txt
create mode 100644 Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt
create mode 100644 Documentation/devicetree/bindings/reset/st,stm32-rcc.txt
create mode 100644 Documentation/devicetree/bindings/reset/uniphier-reset.txt
create mode 100644 Documentation/perf/xgene-pmu.txt
create mode 100644 drivers/bus/qcom-ebi2.c
create mode 100644 drivers/firmware/meson/Kconfig
create mode 100644 drivers/firmware/meson/Makefile
create mode 100644 drivers/firmware/meson/meson_sm.c
create mode 100644 drivers/nvmem/meson-efuse.c
create mode 100644 drivers/perf/xgene_pmu.c
create mode 100644 drivers/reset/reset-stm32.c
create mode 100644 drivers/reset/reset-uniphier.c
create mode 100644 include/dt-bindings/mfd/stm32f4-rcc.h
create mode 100644 include/linux/firmware/meson/meson_sm.h
^ permalink raw reply
* [GIT PULL 4/8] ARM: SoC 64-bit changes for v4.9
From: Arnd Bergmann @ 2016-10-08 0:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3637015.LRn5VyhPVM@wuerfel>
The following changes since commit 3eab887a55424fc2c27553b7bfe32330df83f7b8:
Linux 4.8-rc4 (2016-08-28 15:04:33 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/armsoc-arm64
for you to fetch changes up to a119a2c4c093716193574675590ea4a7835fa277:
Merge tag 'zte-defconfig64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/arm64 (2016-09-19 22:35:21 +0200)
----------------------------------------------------------------
ARM: SoC 64-bit changes for v4.9
Changes to platform code for 64-bit ARM platforms.
Nearly all of these are defconfig updates to enable new drivers or old
drivers still used on these 64-bit platforms.
Aside from that, we gain initial support for two set-top-box platforms,
both of which already have 32-bit support in arch/arm:
- Broadcom adds abstract support for the bcm7xxx/brcmstb platform,
presumably the respective dts files and more information will
follow at a later point.
- The ZTE ZX296718 SoC for set-top-boxes, a relative of the 32-bit
ZX296702 SoC that we already support.
----------------------------------------------------------------
Andre Przywara (1):
arm64: sunxi: Kconfig: add essential pinctrl driver
Arnd Bergmann (8):
Merge tag 'hisi-defconfig-for-4.9' of git://github.com/hisilicon/linux-hisi into next/arm64
Merge tag 'qcom-arm64-defconfig-for-4.9' of git://git.kernel.org/.../agross/linux into next/arm64
Merge tag 'mvebu-defconfig64-4.9-1' of git://git.infradead.org/linux-mvebu into next/arm64
Merge tag 'renesas-arm64-defconfig-for-v4.9' of git://git.kernel.org/.../horms/renesas into next/arm64
Merge tag 'arm-soc/for-4.9/soc-arm64' of http://github.com/Broadcom/stblinux into next/arm64
Merge tag 'sunxi-config64-for-4.9' of https://git.kernel.org/.../mripard/linux into next/arm64
Merge tag 'zte-soc64-4.9' of git://git.kernel.org/.../shawnguo/linux into next/arm64
Merge tag 'zte-defconfig64-4.9' of git://git.kernel.org/.../shawnguo/linux into next/arm64
Christopher Covington (1):
arm64: defconfig: Enable QDF2432 config options
Florian Fainelli (1):
arm64: Add Broadcom Set Top Box Kconfig entry point
Gregory CLEMENT (1):
arm64: configs: enable PCIe driver for Aardvark
Guodong Xu (3):
arm64: defconfig: Enable HiSilicon kirin drm, adv7533 for HiKey
arm64: defconfig: enable CONFIG_INPUT_HISI_POWERKEY for HiKey
arm64: defconfig: enable bluetooth supports as modules
John Stultz (1):
Kconfig: ARCH_HISI: Add PINCTRL to HISI platform
Jun Nie (2):
arm64: defconfig: enable ZTE ZX related config
arm64: add ZTE ZX SoC family
Kefeng Wang (1):
arm64: defconfig: Enable Hisi SAS and HNS
Kevin Hilman (4):
arm64: defconfig: enable HW random as module
arm64: defconfig: enable meson WDT as modules
arm64: defconfig: enable meson SPI as module
arm64: defconfig: enable meson I2C
Leo Yan (1):
arm64: defconfig: enable common modules for power management
Simon Horman (1):
arm64: defconfig: Enable SDHI and GPIO_REGULATOR
Thomas Petazzoni (1):
arm64: defconfig: enable xhci-platform
Yoshihiro Shimoda (1):
arm64: defconfig: Add Renesas R-Car HSUSB driver support as module
arch/arm64/Kconfig.platforms | 15 +++++++++++++++
arch/arm64/configs/defconfig | 35 +++++++++++++++++++++++++++++++++--
2 files changed, 48 insertions(+), 2 deletions(-)
^ permalink raw reply
* [GIT PULL 3/8] ARM: SoC defconfig changes for v4.9
From: Arnd Bergmann @ 2016-10-08 0:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3637015.LRn5VyhPVM@wuerfel>
The following changes since commit 3eab887a55424fc2c27553b7bfe32330df83f7b8:
Linux 4.8-rc4 (2016-08-28 15:04:33 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/armsoc-defconfig
for you to fetch changes up to 3f0958d8aea708019d52962a7a8fe827d9f9006c:
ARM: multi_v7_defconfig: enable CONFIG_EFI (2016-09-19 17:16:34 +0200)
----------------------------------------------------------------
ARM: SoC defconfig updates for v4.9
Defconfig additions, removals, etc. Most of these are small changes adding
the options for newly upstreamed drivers, or drivers needed for new board
support. Nothing specifically sticks out this time.
----------------------------------------------------------------
Ard Biesheuvel (1):
ARM: multi_v7_defconfig: enable CONFIG_EFI
Arnd Bergmann (6):
Merge tag 'davinci-for-v4.9/defconfig' of git://git.kernel.org/.../nsekhar/linux-davinci into next/defconfig
Merge tag 'samsung-defconfig-4.9' of git://git.kernel.org/.../krzk/linux into next/defconfig
Merge tag 'omap-for-v4.9/defconfig-signed' of git://git.kernel.org/.../tmlind/linux-omap into next/defconfig
Merge tag 'keystone_config_for_4.9' of git://git.kernel.org/.../ssantosh/linux-keystone into next/defconfig
Merge tag 'mvebu-defconfig-4.9-1' of git://git.infradead.org/linux-mvebu into next/defconfig
Merge tag 'imx-defconfig-4.9' of git://git.kernel.org/.../shawnguo/linux into next/defconfig
Borislav Petkov (1):
ARM: s3c2410_defconfig: Remove CONFIG_IPV6_PRIVACY
Breno Lima (1):
ARM: imx_v6_v7_defconfig: Add CONFIG_MPL3115
Chanwoo Choi (1):
ARM: exynos_defconfig: Enable bus frequency scaling with devfreq
Fabian Frederick (1):
ARM: mvebu_v5_defconfig: use MV88E6XXX
Fabio Estevam (2):
ARM: imx_v6_v7_defconfig: Enable GPU support
ARM: imx_v6_v7_defconfig: Select the wm8960 codec driver
Grzegorz Jaszczyk (2):
ARM: mvebu: enable MTD command line partition table in mvebu_v7_defconfig
ARM: mvebu: enable UBI and UBIFS in mvebu_v7_defconfig
Javier Martinez Canillas (1):
ARM: multi_v7_defconfig: Build Atmel maXTouch driver as a module
Karl Beldan (4):
ARM: davinci_all_defconfig: enable RTC driver as module
ARM: davinci_all_defconfig: enable SMSC ethernet PHY
ARM: davinci_all_defconfig: Enable AEMIF as a module
ARM: davinci_all_defconfig: Enable some UBI modules
Kevin Hilman (2):
ARM: davinci_all_defconfig: cleanup with savedefconfig
ARM: davinci_all_defconfig: enable DA850 audio as modules
Krzysztof Kozlowski (4):
ARM: exynos_defconfig: Enable PM_DEBUG
ARM: exynos_defconfig: Enable SECCOMP
ARM: multi_v7_defconfig: Enable SECCOMP
Merge tag 'tags/samsung-defconfig-schedutil-4.9' into next/defconfig
Linus Walleij (2):
ARM: omap2plus_defconfig: switch to the IIO BMP085 driver
ARM: defconfig: update the Integrator defconfig
Peter Chen (1):
ARM: imx_v6_v7_defconfig: enable more USB configurations
Roger Quadros (1):
ARM: keystone: defconfig: Fix USB configuration
Tuomas Tynkkynen (2):
ARM: multi_v7_defconfig: Enable AHCI_IMX
ARM: multi_v7_defconfig: Enable ARM_IMX6Q_CPUFREQ
arch/arm/configs/davinci_all_defconfig | 66 +++++++++++++---------------------
arch/arm/configs/exynos_defconfig | 11 +++++-
arch/arm/configs/imx_v6_v7_defconfig | 17 +++++----
arch/arm/configs/integrator_defconfig | 13 ++-----
arch/arm/configs/keystone_defconfig | 1 +
arch/arm/configs/multi_v7_defconfig | 13 +++++--
arch/arm/configs/mvebu_v5_defconfig | 5 +--
arch/arm/configs/mvebu_v7_defconfig | 3 ++
arch/arm/configs/omap2plus_defconfig | 2 +-
arch/arm/configs/s3c2410_defconfig | 1 -
10 files changed, 66 insertions(+), 66 deletions(-)
^ permalink raw reply
* [GIT PULL 2/8] ARM: SoC platform updates for v4.9
From: Arnd Bergmann @ 2016-10-08 0:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3637015.LRn5VyhPVM@wuerfel>
The following changes since commit 3eab887a55424fc2c27553b7bfe32330df83f7b8:
Linux 4.8-rc4 (2016-08-28 15:04:33 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/armsoc-soc
for you to fetch changes up to e40454d3f444ba7f8cc78dd985a1414a5945757c:
Merge tag 'mvebu-soc-4.9-1' of git://git.infradead.org/linux-mvebu into next/soc (2016-09-21 22:35:56 +0200)
----------------------------------------------------------------
ARM: SoC platform updates for v4.9
These are updates for platform specific code on 32-bit ARM machines,
essentially anything that can not (yet) be expressed using DT files.
Noteworthy changes include:
- We get support for running in big-endian mode on two platforms:
sunxi (Allwinner) and s3c24xx (old Samsung).
- The recently added Uniphier platform now uses standard PSCI
methods for SMP booting and we remove support for old bootloader
versions that did not support it yet.
- In sunxi, we gain support for the "Nextthing GR8" SoC, which
is a close relative of the Allwinner A13 and R8 chips.
- PXA completes its move over to the generic dmaengine framework
and removes its old private API
- mach-bcm gains support for BCM47189/BCM53573, their first ARM
SoC with integrated 802.11ac wireless networking.
----------------------------------------------------------------
Andy Gross (1):
ARM: qcom: Cleanup/Remove unnecessary board file
Anson Huang (3):
ARM: imx: rename imx6q_set_int_mem_clk_lpm() function
ARM: imx: enable WAIT mode hardware workaround for imx6sx
ARM: imx: add cpuidle support for i.mx6ul
Arnd Bergmann (16):
Merge tag 'davinci-for-v4.9/soc' of git://git.kernel.org/.../nsekhar/linux-davinci into next/soc
Merge tag 'samsung-soc-4.9' of git://git.kernel.org/.../krzk/linux into next/soc
ARM: imx: build cpuidle-imx6sx.o for imx6ul
ARM: mv78xx0: simplify ethernet device creation
ARM: mvebu/orion: remove NO_IRQ check from device init
ARM: orion: simplify orion_ge00_switch_init
ARM: orion5x: remove extraneous NO_IRQ
Merge tag 'qcom-soc-for-4.9' of git://git.kernel.org/.../agross/linux into next/soc
Merge tag 'arm-soc/for-4.9/soc' of http://github.com/Broadcom/stblinux into next/soc
Merge tag 'renesas-soc-for-v4.9' of git://git.kernel.org/.../horms/renesas into next/soc
Merge tag 'pxa-for-4.9' of https://github.com/rjarzmik/linux into next/soc
Merge tag 'sunxi-core-for-4.9' of https://git.kernel.org/.../mripard/linux into next/soc
Merge tag 'imx-soc-4.9' of git://git.kernel.org/.../shawnguo/linux into next/soc
Merge tag 'uniphier-soc-v4.9' of git://git.kernel.org/.../masahiroy/linux-uniphier into next/soc
Merge tag 'imx-legacy-4.9' of git://git.kernel.org/.../shawnguo/linux into next/soc
Merge tag 'mvebu-soc-4.9-1' of git://git.infradead.org/linux-mvebu into next/soc
Bartlomiej Zolnierkiewicz (4):
arm: colibri_pxa270_defconfig: disable IDE subsystem
arm: lpda270_defconfig: disable IDE subsystem
arm: pxa255-idp_defconfig: disable IDE subsystem
arm: trizeps4_defconfig: disable IDE subsystem
Ben Dooks (1):
ARM: EXYNOS: Enable ARCH_SUPPORTS_BIG_ENDIAN explicitly
Florian Fainelli (1):
ARM: brcmstb: Add earlyprintk support using run-time checks
Geert Uytterhoeven (1):
ARM: debug-ll: Add support for r8a7992
Karl Beldan (1):
ARM: davinci: da850: Add ti-aemif lookup for clock matching
Markus Elfring (2):
ARM: s3c64xx: Delete unnecessary assignment for the field "owner"
ARM: pxa: Use kmalloc_array() in pxa_pm_init()
Masahiro Yamada (1):
ARM: uniphier: remove SoC-specific SMP code
Maxime Ripard (1):
ARM: sunxi: Support the Nextthing GR8
Michael Weiser (1):
ARM: sunxi: enable big-endian
Neil Armstrong (1):
MAINTAINERS: update list of Oxnas maintainers
Pankaj Dubey (1):
ARM: EXYNOS: Remove unused DMC and CMU offsets and their mappings
Petr Cvek (1):
ARM: pxa: magician: Remove duplicated I2C pins declaration
Rafa? Mi?ecki (1):
ARM: BCM53573: Initial support for Broadcom BCM53573 SoCs
Robert Jarzmik (7):
ARM: pxa: remove devicetree boards from pxa_defconfig
ARM: pxa: remove platform dma code
ARM: pxa: prepare pxa25x interrupts for device-tree platforms
ARM: pxa: add pxa25x device-tree support
ARM: pxa: fix GPIO double shifts
ARM: pxa: remove irq init from dt machines
ARM: pxa: pxa_cplds: fix interrupt handling
Sylwester Nawrocki (2):
ARM: S3C24XX: Add dma_mask assignments for DMA devices
ARM: S3C24XX: Add missing DMA device for Mini2440 board
Vladimir Zapolskiy (17):
ARM: imx legacy: kzm: move peripheral initialization to .init_late
ARM: imx legacy: mx31lite: move peripheral initialization to .init_late
ARM: imx legacy: mx31ads: move peripheral initialization to .init_late
ARM: imx legacy: mx31lilly: move peripheral initialization to .init_late
ARM: imx legacy: pcm037: move peripheral initialization to .init_late
ARM: imx legacy: mx31-3ds: move peripheral initialization to .init_late
ARM: imx legacy: qong: move peripheral initialization to .init_late
ARM: imx legacy: armadillo5x0: move peripheral initialization to .init_late
ARM: imx legacy: mx31moboard: move peripheral initialization to .init_late
ARM: imx legacy: vpr200: move peripheral initialization to .init_late
ARM: imx legacy: imx27-visstrim-m10: move peripheral initialization to .init_late
ARM: imx legacy: mx27-3ds: move peripheral initialization to .init_late
ARM: imx legacy: mx35-3ds: move peripheral initialization to .init_late
ARM: imx legacy: pcm043: move peripheral initialization to .init_late
ARM: imx legacy: mx21ads: move peripheral initialization to .init_late
ARM: imx legacy: mx27ads: move peripheral initialization to .init_late
ARM: imx legacy: pca100: move peripheral initialization to .init_late
Wolfram Sang (2):
ARM: shmobile: r8a7790: only use smp_init when SMP is selected
ARM: shmobile: r8a7791: only use smp_init when SMP is selected
Documentation/arm/sunxi/README | 2 +
Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
MAINTAINERS | 9 +
arch/arm/Kconfig.debug | 22 +-
arch/arm/configs/colibri_pxa270_defconfig | 1 -
arch/arm/configs/lpd270_defconfig | 1 -
arch/arm/configs/pxa255-idp_defconfig | 1 -
arch/arm/configs/pxa_defconfig | 2 -
arch/arm/configs/trizeps4_defconfig | 2 -
arch/arm/include/asm/hardware/cache-uniphier.h | 20 +-
arch/arm/include/debug/brcmstb.S | 145 +++++++++
arch/arm/mach-bcm/Kconfig | 14 +
arch/arm/mach-bcm/brcmstb.c | 16 +
arch/arm/mach-davinci/da850.c | 1 +
arch/arm/mach-davinci/da8xx-dt.c | 1 +
arch/arm/mach-exynos/Kconfig | 1 +
arch/arm/mach-exynos/exynos.c | 15 -
arch/arm/mach-exynos/include/mach/map.h | 5 -
arch/arm/mach-imx/Makefile | 1 +
arch/arm/mach-imx/common.h | 2 +-
arch/arm/mach-imx/cpuidle-imx6q.c | 2 +-
arch/arm/mach-imx/cpuidle-imx6sx.c | 11 +
arch/arm/mach-imx/mach-armadillo5x0.c | 39 ++-
arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 24 +-
arch/arm/mach-imx/mach-imx6ul.c | 3 +
arch/arm/mach-imx/mach-kzm_arm11_01.c | 9 +-
arch/arm/mach-imx/mach-mx21ads.c | 13 +-
arch/arm/mach-imx/mach-mx27_3ds.c | 30 +-
arch/arm/mach-imx/mach-mx27ads.c | 13 +-
arch/arm/mach-imx/mach-mx31_3ds.c | 39 ++-
arch/arm/mach-imx/mach-mx31ads.c | 18 +-
arch/arm/mach-imx/mach-mx31lilly.c | 50 ++-
arch/arm/mach-imx/mach-mx31lite.c | 68 +++--
arch/arm/mach-imx/mach-mx31moboard.c | 23 +-
arch/arm/mach-imx/mach-mx35_3ds.c | 15 +-
arch/arm/mach-imx/mach-pca100.c | 26 +-
arch/arm/mach-imx/mach-pcm037.c | 67 ++--
arch/arm/mach-imx/mach-pcm043.c | 10 +-
arch/arm/mach-imx/mach-qong.c | 2 +-
arch/arm/mach-imx/mach-vpr200.c | 29 +-
arch/arm/mach-imx/mx31lilly-db.c | 20 --
arch/arm/mach-imx/mx31lite-db.c | 33 --
arch/arm/mach-imx/pm-imx6.c | 8 +-
arch/arm/mach-mv78xx0/common.c | 9 +-
arch/arm/mach-orion5x/common.c | 4 +-
arch/arm/mach-orion5x/common.h | 2 +-
arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 4 +-
arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 5 +-
arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 6 +-
arch/arm/mach-orion5x/wnr854t-setup.c | 4 +-
arch/arm/mach-orion5x/wrt350n-v2-setup.c | 4 +-
arch/arm/mach-pxa/Kconfig | 11 +
arch/arm/mach-pxa/Makefile | 3 +-
arch/arm/mach-pxa/corgi_pm.c | 13 +-
arch/arm/mach-pxa/devices.h | 1 +
arch/arm/mach-pxa/generic.h | 2 -
arch/arm/mach-pxa/include/mach/dma.h | 1 -
arch/arm/mach-pxa/magician.c | 4 -
arch/arm/mach-pxa/pm.c | 5 +-
arch/arm/mach-pxa/pxa-dt.c | 35 ++-
arch/arm/mach-pxa/pxa25x.c | 26 +-
arch/arm/mach-pxa/pxa27x.c | 14 +-
arch/arm/mach-pxa/pxa3xx.c | 11 +-
arch/arm/mach-pxa/pxa_cplds_irqs.c | 24 +-
arch/arm/mach-pxa/sharpsl_pm.c | 2 +-
arch/arm/mach-pxa/sharpsl_pm.h | 2 +-
arch/arm/mach-pxa/spitz_pm.c | 9 +-
arch/arm/mach-qcom/Makefile | 1 -
arch/arm/mach-qcom/board.c | 31 --
arch/arm/mach-s3c24xx/common.c | 20 +-
arch/arm/mach-s3c24xx/mach-mini2440.c | 1 +
arch/arm/mach-s3c64xx/mach-crag6410-module.c | 3 +-
arch/arm/mach-shmobile/setup-r8a7790.c | 2 +-
arch/arm/mach-shmobile/setup-r8a7791.c | 2 +-
arch/arm/mach-sunxi/Kconfig | 1 +
arch/arm/mach-sunxi/sunxi.c | 1 +
arch/arm/mach-uniphier/Makefile | 2 +-
arch/arm/mach-uniphier/headsmp.S | 43 ---
arch/arm/mach-uniphier/platsmp.c | 209 -------------
arch/arm/mm/cache-uniphier.c | 63 +---
arch/arm/plat-orion/common.c | 85 ++----
arch/arm/plat-orion/include/plat/common.h | 10 +-
arch/arm/plat-pxa/Makefile | 2 -
arch/arm/plat-pxa/dma.c | 386 ------------------------
arch/arm/plat-pxa/include/plat/dma.h | 100 ------
arch/arm/plat-samsung/include/plat/map-s5p.h | 4 -
86 files changed, 696 insertions(+), 1285 deletions(-)
create mode 100644 arch/arm/include/debug/brcmstb.S
delete mode 100644 arch/arm/mach-qcom/board.c
delete mode 100644 arch/arm/mach-uniphier/headsmp.S
delete mode 100644 arch/arm/mach-uniphier/platsmp.c
delete mode 100644 arch/arm/plat-pxa/dma.c
delete mode 100644 arch/arm/plat-pxa/include/plat/dma.h
^ permalink raw reply
* [GIT PULL 1/8] ARM: SoC cleanups for v4.9
From: Arnd Bergmann @ 2016-10-08 0:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3637015.LRn5VyhPVM@wuerfel>
The following changes since commit 3eab887a55424fc2c27553b7bfe32330df83f7b8:
Linux 4.8-rc4 (2016-08-28 15:04:33 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/armsoc-cleanup
for you to fetch changes up to e13688fe618881dd407a68dfbd2295d70b21a445:
ARM: select PCI_DOMAINS config from ARCH_MULTIPLATFORM (2016-09-21 22:45:13 +0200)
----------------------------------------------------------------
ARM: SoC cleanups for v4.9
The cleanups for v4.9 are a little larger that usual, but thankfully
that is almost exclusively due to removing a significant number of
files that have become obsolete after the still ongoing conversion
of old board files to devicetree.
- for mach-omap2, which is still the largest platform in arch/arm/,
the conversion to DT is finally complete after the Nokia N900 is
now fully supported there, along with the omap3 LDP, and we can
remove those two board files.
If no regressions are found, another large cleanup for the platform
will happen as a follow-up, removing dead code and restructuring
the platform based on being DT-only.
- In mach-imx, similar work is ongoing, but has not come that far.
This time, we remove the obsolete board file for the i.MX1
generation, which like i.MX25, i.MX5, i.MX6, and i.MX7 is now DT-only.
The remaining board files are for i.MX2 and i.MX3 machines
based on old ARM926 or ARM1136 cores that should work with DT
in principle.
- realview has just been converted from board files to DT, and a lot
of code gets removed in the process. This is the last
ARM/Keil/Versatile derived platform that was still using board
files, the other ones being integrator, versatile and vexpress.
We can probably merge the remaining code into a single directory
in the near future.
- clps711x had completed the conversion in v4.8, but we accidentally
left the files in place that should have been deleted then.
Conflicts: two files deleted here have been modified upstream,
the changes can be discarded.
----------------------------------------------------------------
Alexander Kurz (2):
ARM: i.MX31 iomux: remove plain duplicates
ARM: i.MX31 iomux: remove duplicates with alternate name
Alexander Shiyan (4):
ARM: i.MX: Remove i.MX1 Armadeus APF9328 board support
ARM: i.MX: Remove i.MX1 Synertronixx SCB9328 board support
ARM: i.MX: Remove i.MX1 non-DT support
ARM: i.MX: Move SOC_IMX1 into 'Device tree only'
Arnd Bergmann (5):
Merge tag 'realview-broomstick-sweep' of git://git.kernel.org/.../linusw/linux-integrator into next/cleanup
ARM: clps711x: remove extraneous files
Merge tag 'omap-for-v4.8/legacy-signed' of git://git.kernel.org/.../tmlind/linux-omap into next/cleanup
Merge tag 'omap-for-v4.9/soc-signed' of git://git.kernel.org/.../tmlind/linux-omap into next/cleanup
Merge tag 'imx-cleanup-4.9' of git://git.kernel.org/.../shawnguo/linux into next/cleanup
Fabian Frederick (1):
ARM: imx: remove platform-mxc_rnga
Javier Martinez Canillas (3):
ARM: OMAP1: use IS_ENABLED() instead of checking for built-in or module
ARM: OMAP2+: use IS_ENABLED() instead of checking for built-in or module
ARM: imx: use IS_ENABLED() instead of checking for built-in or module
Kishon Vijay Abraham I (2):
ARM: stop *MIGHT_HAVE_PCI* config from being selected redundantly
ARM: select PCI_DOMAINS config from ARCH_MULTIPLATFORM
Linus Walleij (2):
ARM: realview: delete the RealView board files
ARM: realview: imply device tree boot
Lothar Wa?mann (1):
ARM: mxs: remove obsolete startup code for TX28
Martin Kaiser (1):
ARM: imx: (trivial) fix typo and grammar
Tony Lindgren (3):
Merge remote-tracking branch 'peter/peter/for-4.8_omapdss_part1' into omap-for-v4.8/legacy
ARM: OMAP2+: Drop legacy board file for n900
ARM: OMAP2+: Drop legacy board file for LDP
Vladimir Murzin (2):
ARM: imx: no need to select SMP_ON_UP explicitly
ARM: realview: no need to select SMP_ON_UP explicitly
arch/arm/Kconfig | 4 +-
arch/arm/configs/imx_v4_v5_defconfig | 3 +-
arch/arm/configs/multi_v4t_defconfig | 4 +-
arch/arm/mach-at91/Kconfig | 1 -
arch/arm/mach-axxia/Kconfig | 2 -
arch/arm/mach-clps711x/Makefile.boot | 0
arch/arm/mach-clps711x/board-autcpu12.c | 275 ------
arch/arm/mach-clps711x/board-cdb89712.c | 147 ---
arch/arm/mach-clps711x/board-clep7312.c | 45 -
arch/arm/mach-clps711x/board-edb7211.c | 188 ----
arch/arm/mach-clps711x/board-p720t.c | 373 -------
arch/arm/mach-clps711x/common.c | 65 --
arch/arm/mach-clps711x/common.h | 23 -
arch/arm/mach-clps711x/devices.c | 149 ---
arch/arm/mach-clps711x/devices.h | 12 -
arch/arm/mach-cns3xxx/Kconfig | 1 -
arch/arm/mach-exynos/Kconfig | 2 -
arch/arm/mach-imx/Kconfig | 52 +-
arch/arm/mach-imx/Makefile | 7 +-
arch/arm/mach-imx/common.h | 5 -
arch/arm/mach-imx/devices-imx1.h | 30 -
arch/arm/mach-imx/devices/Makefile | 1 -
arch/arm/mach-imx/devices/devices-common.h | 12 -
arch/arm/mach-imx/devices/platform-imx-fb.c | 5 -
arch/arm/mach-imx/devices/platform-imx-i2c.c | 5 -
arch/arm/mach-imx/devices/platform-imx-uart.c | 37 -
arch/arm/mach-imx/devices/platform-spi_imx.c | 9 -
arch/arm/mach-imx/hardware.h | 3 +-
arch/arm/mach-imx/iomux-mx1.h | 155 ---
arch/arm/mach-imx/iomux-mx3.h | 34 -
arch/arm/mach-imx/mach-apf9328.c | 148 ---
arch/arm/mach-imx/{imx1-dt.c => mach-imx1.c} | 23 +-
arch/arm/mach-imx/mach-kzm_arm11_01.c | 6 +-
arch/arm/mach-imx/mach-pcm037.c | 2 +-
arch/arm/mach-imx/mach-scb9328.c | 143 ---
arch/arm/mach-imx/mm-imx1.c | 67 --
arch/arm/mach-imx/mx1.h | 172 ----
arch/arm/mach-integrator/Kconfig | 1 -
arch/arm/mach-keystone/Kconfig | 2 -
arch/arm/mach-mxs/mach-mxs.c | 77 --
arch/arm/mach-omap1/board-h2-mmc.c | 2 +-
arch/arm/mach-omap1/board-h2.c | 2 +-
arch/arm/mach-omap1/board-h3-mmc.c | 2 +-
arch/arm/mach-omap1/board-h3.c | 2 +-
arch/arm/mach-omap1/board-htcherald.c | 4 +-
arch/arm/mach-omap1/board-innovator.c | 4 +-
arch/arm/mach-omap1/board-nokia770.c | 4 +-
arch/arm/mach-omap1/board-sx1-mmc.c | 2 +-
arch/arm/mach-omap1/devices.c | 10 +-
arch/arm/mach-omap1/fb.c | 2 +-
arch/arm/mach-omap1/include/mach/usb.h | 2 +-
arch/arm/mach-omap1/mmc.h | 2 +-
arch/arm/mach-omap1/usb.c | 6 +-
arch/arm/mach-omap2/Kconfig | 12 -
arch/arm/mach-omap2/Makefile | 4 -
arch/arm/mach-omap2/board-flash.c | 10 +-
arch/arm/mach-omap2/board-flash.h | 11 +-
arch/arm/mach-omap2/board-ldp.c | 430 --------
arch/arm/mach-omap2/board-n8x0.c | 5 +-
arch/arm/mach-omap2/board-rx51-peripherals.c | 1312 -------------------------
arch/arm/mach-omap2/board-rx51-video.c | 67 --
arch/arm/mach-omap2/board-rx51.c | 141 ---
arch/arm/mach-omap2/board-rx51.h | 11 -
arch/arm/mach-omap2/common-board-devices.c | 3 +-
arch/arm/mach-omap2/devices.c | 7 +-
arch/arm/mach-omap2/drm.c | 2 +-
arch/arm/mach-omap2/fb.c | 2 +-
arch/arm/mach-omap2/gpmc-smsc911x.h | 2 +-
arch/arm/mach-omap2/hsmmc.c | 2 +-
arch/arm/mach-omap2/hsmmc.h | 2 +-
arch/arm/mach-omap2/twl-common.c | 3 +-
arch/arm/mach-realview/Kconfig | 72 +-
arch/arm/mach-realview/Makefile | 12 +-
arch/arm/mach-realview/board-eb.h | 94 --
arch/arm/mach-realview/board-pb1176.h | 81 --
arch/arm/mach-realview/board-pb11mp.h | 96 --
arch/arm/mach-realview/board-pba8.h | 71 --
arch/arm/mach-realview/board-pbx.h | 106 --
arch/arm/mach-realview/core.c | 404 --------
arch/arm/mach-realview/core.h | 58 --
arch/arm/mach-realview/hardware.h | 40 -
arch/arm/mach-realview/hotplug.h | 1 +
arch/arm/mach-realview/irqs-eb.h | 114 ---
arch/arm/mach-realview/irqs-pb1176.h | 77 --
arch/arm/mach-realview/irqs-pb11mp.h | 97 --
arch/arm/mach-realview/irqs-pba8.h | 71 --
arch/arm/mach-realview/irqs-pbx.h | 87 --
arch/arm/mach-realview/platform.h | 247 -----
arch/arm/mach-realview/platsmp-dt.c | 3 +-
arch/arm/mach-realview/platsmp.c | 86 --
arch/arm/mach-realview/realview_eb.c | 492 ----------
arch/arm/mach-realview/realview_pb1176.c | 395 --------
arch/arm/mach-realview/realview_pb11mp.c | 385 --------
arch/arm/mach-realview/realview_pba8.c | 307 ------
arch/arm/mach-realview/realview_pbx.c | 402 --------
arch/arm/mach-shmobile/Kconfig | 1 -
arch/arm/mach-spear/Kconfig | 1 -
arch/arm/mach-versatile/Kconfig | 1 -
drivers/clk/imx/clk-imx1.c | 46 +-
drivers/irqchip/Makefile | 2 +-
drivers/mtd/maps/Kconfig | 2 +-
101 files changed, 105 insertions(+), 8106 deletions(-)
delete mode 100644 arch/arm/mach-clps711x/Makefile.boot
delete mode 100644 arch/arm/mach-clps711x/board-autcpu12.c
delete mode 100644 arch/arm/mach-clps711x/board-cdb89712.c
delete mode 100644 arch/arm/mach-clps711x/board-clep7312.c
delete mode 100644 arch/arm/mach-clps711x/board-edb7211.c
delete mode 100644 arch/arm/mach-clps711x/board-p720t.c
delete mode 100644 arch/arm/mach-clps711x/common.c
delete mode 100644 arch/arm/mach-clps711x/common.h
delete mode 100644 arch/arm/mach-clps711x/devices.c
delete mode 100644 arch/arm/mach-clps711x/devices.h
delete mode 100644 arch/arm/mach-imx/devices-imx1.h
delete mode 100644 arch/arm/mach-imx/iomux-mx1.h
delete mode 100644 arch/arm/mach-imx/mach-apf9328.c
rename arch/arm/mach-imx/{imx1-dt.c => mach-imx1.c} (63%)
delete mode 100644 arch/arm/mach-imx/mach-scb9328.c
delete mode 100644 arch/arm/mach-imx/mm-imx1.c
delete mode 100644 arch/arm/mach-imx/mx1.h
delete mode 100644 arch/arm/mach-omap2/board-ldp.c
delete mode 100644 arch/arm/mach-omap2/board-rx51-peripherals.c
delete mode 100644 arch/arm/mach-omap2/board-rx51-video.c
delete mode 100644 arch/arm/mach-omap2/board-rx51.c
delete mode 100644 arch/arm/mach-omap2/board-rx51.h
delete mode 100644 arch/arm/mach-realview/board-eb.h
delete mode 100644 arch/arm/mach-realview/board-pb1176.h
delete mode 100644 arch/arm/mach-realview/board-pb11mp.h
delete mode 100644 arch/arm/mach-realview/board-pba8.h
delete mode 100644 arch/arm/mach-realview/board-pbx.h
delete mode 100644 arch/arm/mach-realview/core.c
delete mode 100644 arch/arm/mach-realview/core.h
delete mode 100644 arch/arm/mach-realview/hardware.h
create mode 100644 arch/arm/mach-realview/hotplug.h
delete mode 100644 arch/arm/mach-realview/irqs-eb.h
delete mode 100644 arch/arm/mach-realview/irqs-pb1176.h
delete mode 100644 arch/arm/mach-realview/irqs-pb11mp.h
delete mode 100644 arch/arm/mach-realview/irqs-pba8.h
delete mode 100644 arch/arm/mach-realview/irqs-pbx.h
delete mode 100644 arch/arm/mach-realview/platform.h
delete mode 100644 arch/arm/mach-realview/platsmp.c
delete mode 100644 arch/arm/mach-realview/realview_eb.c
delete mode 100644 arch/arm/mach-realview/realview_pb1176.c
delete mode 100644 arch/arm/mach-realview/realview_pb11mp.c
delete mode 100644 arch/arm/mach-realview/realview_pba8.c
delete mode 100644 arch/arm/mach-realview/realview_pbx.c
^ permalink raw reply
* [GIT PULL 0/8] ARM: SoC changes for v4.9
From: Arnd Bergmann @ 2016-10-08 0:28 UTC (permalink / raw)
To: linux-arm-kernel
Hi Linus,
Here are 749 patches for ARM SoCs for this merge window, a bit less than
average this time. We support 29 new machines but all five SoCs we add
are in a family that is already supported.
Out of 165 developers contributing at least one patch, the most active
by number of patches are:
46 Javier Martinez Canillas
42 Sergei Shtylyov
29 Linus Walleij
25 Hans de Goede
22 Krzysztof Kozlowski
19 Vladimir Zapolskiy
17 Patrice Chotard
16 Grzegorz Jaszczyk
14 Philipp Zabel
14 Jon Mason
14 Jisheng Zhang
13 Vladimir Barinov
While according to Signed-off-by lines we get:
87 Simon Horman
86 Shawn Guo
71 Tony Lindgren
60 Maxime Ripard
46 Javier Martinez Canillas
45 Kevin Hilman
44 Andy Gross
42 Sergei Shtylyov
40 Gregory CLEMENT
35 Heiko Stuebner
34 Krzysztof Kozlowski
The dirstat shows that once more the ARM32 dts changes dominate the
overall changes, surprisingly clearly this time showing how much
more work went into 32-bit platforms compared to 64-bit platforms:
2.1% Documentation/devicetree/bindings/
52.3% arch/arm/boot/dts/
2.9% arch/arm/mach-clps711x/
3.0% arch/arm/mach-imx/
4.2% arch/arm/mach-omap2/
9.9% arch/arm/mach-realview/
4.2% arch/arm/
2.2% arch/arm64/boot/dts/rockchip/
9.2% arch/arm64/boot/dts/
2.9% drivers/perf/
5.5% drivers/
742 files changed, 29317 insertions(+), 16385 deletions(-)
Ignoring dts and driver churn, we can see a nice cleanup, removing
almost 9000 lines of old platform code:
12.2% arch/arm/mach-clps711x/
12.7% arch/arm/mach-imx/
1.4% arch/arm/mach-integrator/
17.6% arch/arm/mach-omap2/
1.4% arch/arm/mach-pxa/
41.6% arch/arm/mach-realview/
2.3% arch/arm/mach-uniphier/
1.1% arch/arm/plat-orion/
1.2% arch/arm/plat-pxa/include/plat/
3.1% arch/arm/plat-pxa/
4.6% arch/arm/
172 files changed, 698 insertions(+), 9468 deletions(-)
Arnd
^ permalink raw reply
* [PATCH] usb: dwc3: host: inherit dma configuration from parent dev
From: Leo Li @ 2016-10-07 22:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <DB5PR0401MB1925E5980009DD23FA9C7D50F5C90@DB5PR0401MB1925.eurprd04.prod.outlook.com>
On Thu, Sep 22, 2016 at 12:02 AM, Sriram Dash <sriram.dash@nxp.com> wrote:
>>From: Arnd Bergmann [mailto:arnd at arndb.de]
>>On Wednesday, September 21, 2016 11:43:59 AM CEST Sriram Dash wrote:
>>> >From: Arnd Bergmann [mailto:arnd at arndb.de] On Wednesday, September
>>> >21, 2016 11:06:47 AM CEST Sriram Dash wrote:
>>>
>>> ==============================================================
>>> From 8b0dea1513e9e73a11dcfa802ddc71cca11d66f8 Mon Sep 17 00:00:00 2001
>>> From: Sriram Dash <sriram.dash@nxp.com>
>>> Date: Wed, 21 Sep 2016 11:39:30 +0530
>>> Subject: [PATCH] usb: xhci: Fix the patch inherit dma configuration
>>> from parent dev
>>>
>>> Fixes the patch https://patchwork.kernel.org/patch/9319527/
>>> ("usb: dwc3: host: inherit dma configuration from parent dev").
>>>
>>> Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
>>> ---
>>> drivers/usb/host/xhci-mem.c | 12 ++++++------
>>> drivers/usb/host/xhci.c | 20 ++++++++++----------
>>> 2 files changed, 16 insertions(+), 16 deletions(-)
>>>
>>> diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
>>> index 6afe323..79608df 100644
>>> --- a/drivers/usb/host/xhci-mem.c
>>> +++ b/drivers/usb/host/xhci-mem.c
>>
>>All the changes you did to this file seem fine, I completely missed that part.
>>
>>> diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index
>>> 01d96c9..9a1ff09 100644
>>> --- a/drivers/usb/host/xhci.c
>>> +++ b/drivers/usb/host/xhci.c
>
> Yes. Some sanity is required over this patch.
Hi Sriram,
Have you been able to do the sanity check on the patch? I will be
good to have the formal patch submitted for integration as soon as
possible because the dwc3 USB functionality has been broken for a
while in upstream kernel.
Regards,
Leo
^ permalink raw reply
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