* [RFC 05/10] dt-bindings: pinctrl: meson: update gpio dt-bindings
From: Rob Herring @ 2016-10-09 1:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475593708-10526-6-git-send-email-jbrunet@baylibre.com>
On Tue, Oct 04, 2016 at 05:08:23PM +0200, Jerome Brunet wrote:
> Add description for the interrupt-parent property of the gpio sub-node
> If provided here, this property must be a phandle to an interrupt
> controller suitable for meson pinctrl, like the meson gpio interrupt
> controller.
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
> Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 4 ++++
> 1 file changed, 4 insertions(+)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [RFC 02/10] dt-bindings: interrupt-controller: add DT binding for meson GPIO interrupt controller
From: Rob Herring @ 2016-10-09 1:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475593708-10526-3-git-send-email-jbrunet@baylibre.com>
On Tue, Oct 04, 2016 at 05:08:20PM +0200, Jerome Brunet wrote:
> This commit adds the device tree bindings description for Amlogic's GPIO
> interrupt controller available on the meson8, meson8b and gxbb SoC families
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
> .../amlogic,meson-gpio-intc.txt | 39 ++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
> new file mode 100644
> index 000000000000..bd4cceefcda1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
> @@ -0,0 +1,39 @@
> +Amlogic meson GPIO interrupt controller
> +
> +Meson SoCs contains an interrupt controller which is able watch the SoC pads
> +and generate an interrupt on edges or level. The controller is essentially a
> +256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge
> +or level and polarity. We don?t expose all 256 mux inputs because the
> +documentation shows that upper part is not mapped to any pad. The actual number
> +of interrupt exposed depends on the SoC.
> +
> +Required properties:
> +
> +- compatible : should be: "amlogic,meson8-gpio-intc? or
> + ?amlogic,meson8b-gpio-intc? or ?amlogic,gxbb-gpio-intc?
One per line please if you respin the series.
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 3/3] dt-bindings: oxnas: Update Pinctrl and GPIO for OX820 Support
From: Rob Herring @ 2016-10-09 1:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161004134148.23028-4-narmstrong@baylibre.com>
On Tue, Oct 04, 2016 at 03:41:48PM +0200, Neil Armstrong wrote:
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> Documentation/devicetree/bindings/gpio/gpio_oxnas.txt | 2 +-
> Documentation/devicetree/bindings/pinctrl/oxnas,pinctrl.txt | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt b/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt
> index 928ed4f..9665147 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt
> +++ b/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt
> @@ -3,7 +3,7 @@
> Please refer to gpio.txt for generic information regarding GPIO bindings.
>
> Required properties:
> - - compatible: "oxsemi,ox810se-gpio"
> + - compatible: "oxsemi,ox810se-gpio" or "oxsemi,ox820-gpio"
It is preferred to have one per line, but it's fine unless you respin
the series.
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v3] drm: tilcdc: add a da850-specific compatible string
From: Rob Herring @ 2016-10-09 1:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475509519-29516-1-git-send-email-bgolaszewski@baylibre.com>
On Mon, Oct 03, 2016 at 05:45:19PM +0200, Bartosz Golaszewski wrote:
> Due to some potential tweaks for the da850 LCDC (for example: the
> required memory bandwith settings) we need a separate compatible
> for the IP present on the da850 boards.
>
> Suggested-by: Sekhar Nori <nsekhar@ti.com>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> v1 -> v2:
> - added the new compatible to the bindings documentation
>
> v2 -> v3:
> - made the documentation more detailed
>
> Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt | 6 ++++--
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 1 +
> 2 files changed, 5 insertions(+), 2 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 10/12] ASoC: sun4i-codec: Add support for A31 board level audio routing
From: Rob Herring @ 2016-10-09 1:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003110804.28235-11-wens@csie.org>
On Mon, Oct 03, 2016 at 07:08:02PM +0800, Chen-Yu Tsai wrote:
> The A31 SoC's codec has various inputs, outputs and microphone bias
> supplies. These can be routed on the board in different ways, such as:
>
> - Microphones all use the MBIAS main microphone supply or one mic may
> use the HBIAS supply, which supports headset detection and buttons.
>
> - Line Out may be routed to an audio jack, or an onboard speaker amp
> with power controls.
>
> Add support for specifying the audio routes in the device tree.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
> .../devicetree/bindings/sound/sun4i-codec.txt | 35 ++++++++++++++++++++++
Acked-by: Rob Herring <robh@kernel.org>
> sound/soc/sunxi/sun4i-codec.c | 21 +++++++++++--
> 2 files changed, 54 insertions(+), 2 deletions(-)
^ permalink raw reply
* [PATCH 05/12] ASoC: sun4i-codec: Add support for A31 playback through headphone output
From: Rob Herring @ 2016-10-09 1:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003110804.28235-6-wens@csie.org>
On Mon, Oct 03, 2016 at 07:07:57PM +0800, Chen-Yu Tsai wrote:
> The A31 has a similar codec to the A10/A20. The PCM parts are very
> similar, with just different register offsets. The analog paths are
> very different. There are more inputs and outputs.
>
> The quirks structure is expanded to include different register offsets
> and separate callbacks for creating the ASoC card. Also the DMA burst
> length is increased to 8. While the A10 DMA engine supports bursts of
> 1, 4 and 8, the A31 engine only supports 1 and 8.
>
> This patch adds support for the basic playback path of the A31 codec,
> from the DAC to the headphones. Headphone detection, microphone,
> signaling, other inputs/outputs and capture will be added later.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
> .../devicetree/bindings/sound/sun4i-codec.txt | 6 +-
Acked-by: Rob Herring <robh@kernel.org>
> sound/soc/sunxi/sun4i-codec.c | 396 +++++++++++++++++----
> 2 files changed, 334 insertions(+), 68 deletions(-)
^ permalink raw reply
* [PATCH v3 2/3] Documentation: dt-bindings: rename meson-usb2-phy to meson8b-usb2-phy
From: Rob Herring @ 2016-10-09 1:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161001121900.1168-3-martin.blumenstingl@googlemail.com>
On Sat, Oct 01, 2016 at 02:18:59PM +0200, Martin Blumenstingl wrote:
> The corresponding driver only supports the USB PHY on Meson8b and GXBB
> SoCs. Newer SoC versions are using a different USB PHY implementation,
> which will mean that a new driver is required. Thus make sure that our
> naming is specific enough so it does not conflict with upcoming drivers.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> .../bindings/phy/{meson-usb2-phy.txt => meson8b-usb2-phy.txt} | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> rename Documentation/devicetree/bindings/phy/{meson-usb2-phy.txt => meson8b-usb2-phy.txt} (95%)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v3 1/3] Documentation: dt-bindings: update the meson-usb2-phy example
From: Rob Herring @ 2016-10-09 1:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161001121900.1168-2-martin.blumenstingl@googlemail.com>
On Sat, Oct 01, 2016 at 02:18:58PM +0200, Martin Blumenstingl wrote:
> Update the example so the node name uses a dash (instead of an
> underscore) as per convention.
> Additionally it updates the example register offset to a real example
> (the old value was taken from a draft where there was an additional PHY
> bus).
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> Documentation/devicetree/bindings/phy/meson-usb2-phy.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 3/3] bindings: add compatible "fsl, ls1043-ucc-hdlc" to bindings
From: Rob Herring @ 2016-10-09 1:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475034038-7217-3-git-send-email-qiang.zhao@nxp.com>
On Wed, Sep 28, 2016 at 11:40:38AM +0800, Zhao Qiang wrote:
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> ---
> Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> index 03c7416..325e3e2 100644
> --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> @@ -45,7 +45,7 @@ Example:
> * HDLC
>
> Currently defined compatibles:
> -- fsl,ucc-hdlc
> +- "fsl,ucc-hdlc", "fsl,ls1043-ucc-hdlc"
What's the relationship of these 2 compatibles? Both should be specified
for LS1043 or ...? The former only applies to certain SoCs? Rework this
text to answer these questions.
Rob
^ permalink raw reply
* [PATCH] clk: hi6220: use CLK_OF_DECLARE_DRIVER for sysctrl and mediactrl clock init
From: Shawn Guo @ 2016-10-09 0:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475933892-16021-1-git-send-email-shawn.guo@linaro.org>
On Sat, Oct 08, 2016 at 09:38:12PM +0800, Shawn Guo wrote:
> The hi6220-sysctrl and hi6220-mediactrl are not only clock provider but
> also reset controller. It worked fine that single sysctrl/mediactrl
> device node in DT can be used to initialize clock driver and populate
> platform device for reset controller. But it stops working after
> commit 989eafd0b609 ("clk: core: Avoid double initialization of clocks")
> gets merged. The commit sets flag OF_POPULATED during clock
> initialization to skip the platform device populating for the same
> device node. On hi6220, it effectively makes hi6220-sysctrl reset
> driver not probe any more.
>
> The patch changes hi6220 sysctrl and mediactrl clock init macro from
> CLK_OF_DECLARE to CLK_OF_DECLARE_DRIVER, so that the reset driver using
> the same hardware block can continue working.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> It fixes an issue that is seen on linux-next, i.e. the new added
> hi6220-sysctrl reset driver doesn't probe at all, and consequently the
> mmc driver fails to register.
Correction: the hi6220-sysctrl has been there for a while, and the issue
is discovered by mmc driver which adds reset support recently. So
technically, this is a regression fix.
Shawn
^ permalink raw reply
* Re: [RFC 05/10] dt-bindings: pinctrl: meson: update gpio dt-bindings
From: Rob Herring @ 2016-10-08 23:33 UTC (permalink / raw)
To: Jerome Brunet, linux-arm-kernel
Cc: Kevin Hilman, Carlo Caione, Thomas Gleixner, Jason Cooper,
Marc Zyngier, linux-amlogic
In-Reply-To: <1475593708-10526-6-git-send-email-jbrunet@baylibre.com>
On Tue, Oct 04, 2016 at 05:08:23PM +0200, Jerome Brunet wrote:
> Add description for the interrupt-parent property of the gpio sub-node
> If provided here, this property must be a phandle to an interrupt
> controller suitable for meson pinctrl, like the meson gpio interrupt
> controller.
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
> Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 4 ++++
> 1 file changed, 4 insertions(+)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH 3/3] dt-bindings: oxnas: Update Pinctrl and GPIO for OX820 Support
From: Rob Herring @ 2016-10-08 23:29 UTC (permalink / raw)
To: Neil Armstrong, linux-arm-kernel; +Cc: linus.walleij
In-Reply-To: <20161004134148.23028-4-narmstrong@baylibre.com>
On Tue, Oct 04, 2016 at 03:41:48PM +0200, Neil Armstrong wrote:
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> Documentation/devicetree/bindings/gpio/gpio_oxnas.txt | 2 +-
> Documentation/devicetree/bindings/pinctrl/oxnas,pinctrl.txt | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt b/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt
> index 928ed4f..9665147 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt
> +++ b/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt
> @@ -3,7 +3,7 @@
> Please refer to gpio.txt for generic information regarding GPIO bindings.
>
> Required properties:
> - - compatible: "oxsemi,ox810se-gpio"
> + - compatible: "oxsemi,ox810se-gpio" or "oxsemi,ox820-gpio"
It is preferred to have one per line, but it's fine unless you respin
the series.
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v3] drm: tilcdc: add a da850-specific compatible string
From: Rob Herring @ 2016-10-08 23:15 UTC (permalink / raw)
To: Bartosz Golaszewski, linux-arm-kernel
Cc: Jyri Sarha, Tomi Valkeinen, David Airlie, Kevin Hilman,
Michael Turquette, Sekhar Nori, Frank Rowand, Mark Rutland, LKML,
arm-soc, linux-drm, linux-devicetree
In-Reply-To: <1475509519-29516-1-git-send-email-bgolaszewski@baylibre.com>
On Mon, Oct 03, 2016 at 05:45:19PM +0200, Bartosz Golaszewski wrote:
> Due to some potential tweaks for the da850 LCDC (for example: the
> required memory bandwith settings) we need a separate compatible
> for the IP present on the da850 boards.
>
> Suggested-by: Sekhar Nori <nsekhar@ti.com>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> v1 -> v2:
> - added the new compatible to the bindings documentation
>
> v2 -> v3:
> - made the documentation more detailed
>
> Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt | 6 ++++--
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 1 +
> 2 files changed, 5 insertions(+), 2 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v7 1/3] Documentation: dt: net: add ath9k wireless device binding
From: Rob Herring @ 2016-10-08 22:50 UTC (permalink / raw)
To: Martin Blumenstingl, linux-arm-kernel; +Cc: ath9k-devel
In-Reply-To: <20161002214743.2263-2-martin.blumenstingl@googlemail.com>
On Sun, Oct 02, 2016 at 11:47:41PM +0200, Martin Blumenstingl wrote:
> Add documentation how devicetree can be used to configure ath9k based
> devices.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> .../devicetree/bindings/net/wireless/qca,ath9k.txt | 30 ++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/wireless/qca,ath9k.txt
>
> diff --git a/Documentation/devicetree/bindings/net/wireless/qca,ath9k.txt b/Documentation/devicetree/bindings/net/wireless/qca,ath9k.txt
> new file mode 100644
> index 0000000..9b58ede
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/wireless/qca,ath9k.txt
> @@ -0,0 +1,30 @@
> +* Qualcomm Atheros ath9k wireless devices
> +
> +This node provides properties for configuring the ath9k wireless device. The
> +node is expected to be specified as a child node of the PCI controller to
> +which the wireless chip is connected.
> +
> +Required properties:
> +- compatible: For PCI and PCIe devices this should be an identifier following
> + the format as defined in "PCI Bus Binding to Open Firmware"
> + Revision 2.1. One of the possible formats is "pciVVVV,DDDD"
> + where VVVV is the PCI vendor ID and DDDD is PCI device ID.
Are there some known values you can document here? Like the one in the
example.
> +- reg: Address and length of the register set for the device.
> +
> +Optional properties:
> +- qca,no-eeprom: Indicates that there is no physical EEPROM connected to the
> + ath9k wireless chip (in this case the calibration /
> + EEPROM data will be loaded from userspace using the
> + kernel firmware loader).
> +- mac-address: See ethernet.txt in the parent directory
> +- local-mac-address: See ethernet.txt in the parent directory
> +
> +
> +In this example, the node is defined as child node of the PCI controller:
> +&pci0 {
> + ath9k at 168c,002d {
wifi at ...
> + compatible = "pci168c,002d";
> + reg = <0x7000 0 0 0 0x1000>;
> + qca,no-eeprom;
> + };
> +};
> --
> 2.10.0
>
^ permalink raw reply
* Re: [RFC V2 PATCH 04/12] dt-bindings: qcom: Add msm8992 bindings
From: Rob Herring @ 2016-10-08 22:41 UTC (permalink / raw)
To: Jeremy McNicoll, linux-arm-kernel; +Cc: andy.gross
In-Reply-To: <1475375919-618-5-git-send-email-jmcnicol@redhat.com>
On Sat, Oct 01, 2016 at 07:38:31PM -0700, Jeremy McNicoll wrote:
> Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
> ---
> Documentation/devicetree/bindings/arm/qcom.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom.txt b/Documentation/devicetree/bindings/arm/qcom.txt
> index 3e24518..fc5d5ee 100644
> --- a/Documentation/devicetree/bindings/arm/qcom.txt
> +++ b/Documentation/devicetree/bindings/arm/qcom.txt
> @@ -22,6 +22,7 @@ The 'SoC' element must be one of the following strings:
> msm8916
> msm8974
> msm8996
> + msm8992
What about 8994 and 8994v2?
>
> The 'board' element must be one of the following strings:
>
> --
> 2.6.1
>
^ permalink raw reply
* Re: [PATCH] usb: xhci: add support for performing fake doorbell
From: Rob Herring @ 2016-10-08 22:32 UTC (permalink / raw)
To: Rafał Miłecki, linux-arm-kernel
Cc: Greg Kroah-Hartman, Hauke Mehrtens, Rafał Miłecki,
Mark Rutland, Mathias Nyman, open list:USB SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
In-Reply-To: <20161001215817.25384-1-zajec5@gmail.com>
On Sat, Oct 01, 2016 at 11:58:10PM +0200, Rafa?? Mi??ecki wrote:
> From: Rafa?? Mi??ecki <rafal@milecki.pl>
>
> Broadcom's Northstar XHCI controllers seem to need a special start
> procedure to work correctly. There isn't any official documentation on
> this, the problem is that controller doesn't detect any connected
> devices with default setup. Moreover connecting USB device to controller
> that doesn't run properly can cause SoC's watchdog issues.
>
> A workaround that was successfully tested on multiple devices is to
> perform a fake doorbell. This patch adds code for doing that and a DT
> binding enabling it.
>
> Signed-off-by: Rafa?? Mi??ecki <rafal@milecki.pl>
> ---
> Documentation/devicetree/bindings/usb/usb-xhci.txt | 2 +
> drivers/usb/host/xhci-plat.c | 6 +++
> drivers/usb/host/xhci.c | 63 ++++++++++++++++++++--
> drivers/usb/host/xhci.h | 1 +
> 4 files changed, 69 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt
> index 966885c..ce01b7f 100644
> --- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
> +++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
> @@ -26,6 +26,8 @@ Required properties:
> Optional properties:
> - clocks: reference to a clock
> - usb3-lpm-capable: determines if platform is USB3 LPM capable
> + - usb3-fake-doorbell: determines if controller requires a fake doorbell when
> + starting it
You should use Northstar XHCI compatible string to enable this. Then the
DT doesn't need updating.
Rob
^ permalink raw reply
* Re: [PATCH v5] drm/fsl-dcu: Implement gamma_lut atomic crtc properties
From: Rob Herring @ 2016-10-08 22:26 UTC (permalink / raw)
To: Meng Yi, linux-arm-kernel; +Cc: stefan
In-Reply-To: <1475051069-24452-1-git-send-email-meng.yi@nxp.com>
On Wed, Sep 28, 2016 at 04:24:29PM +0800, Meng Yi wrote:
> Gamma correction is optional and can be used to adjust the color
> output values to match the gamut of a particular TFT LCD panel
>
> Split the DCU regs into "regs", "palette", "gamma" and "cursor".
> Create a second regmap for gamma memory space using little endian.
> The registers after the first address space are not accessed yet,
> hence new device trees would even work with old kernels. Just new
> kernel need the new format so we can access the separate gamma
> reg space.
>
> Suggested-by: Stefan Agner <stefan@agner.ch>
> Signed-off-by: Meng Yi <meng.yi@nxp.com>
> ---
> Changes since V1:
> -created a second regmap for gamma
> -updated the DCU DT binding
> -removed Kconfig for gamma and enable gamma when valid data filled.
> -extended and simplified comment lines.
> ---
> .../devicetree/bindings/display/fsl,dcu.txt | 12 +++++++-
Acked-by: Rob Herring <robh@kernel.org>
> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 33 ++++++++++++++++++++
> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 35 +++++++++++++++++++++-
> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h | 7 +++++
> 4 files changed, 85 insertions(+), 2 deletions(-)
^ permalink raw reply
* [PATCH 3/3] bindings: add compatible "fsl, ls1043-ucc-hdlc" to bindings
From: Rob Herring @ 2016-10-08 22:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475034038-7217-3-git-send-email-qiang.zhao@nxp.com>
On Wed, Sep 28, 2016 at 11:40:38AM +0800, Zhao Qiang wrote:
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> ---
> Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> index 03c7416..325e3e2 100644
> --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> @@ -45,7 +45,7 @@ Example:
> * HDLC
>
> Currently defined compatibles:
> -- fsl,ucc-hdlc
> +- "fsl,ucc-hdlc", "fsl,ls1043-ucc-hdlc"
What's the relationship of these 2 compatibles? Both should be specified
for LS1043 or ...? The former only applies to certain SoCs? Rework this
text to answer these questions.
Rob
^ permalink raw reply
* [PATCH v3 03/11] ARM: shmobile: r8a7743: basic SoC support
From: Laurent Pinchart @ 2016-10-08 21:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161008023149.GB14617@verge.net.au>
Hi Simon,
On Saturday 08 Oct 2016 11:31:50 Simon Horman wrote:
> On Fri, Oct 07, 2016 at 11:33:33AM +0300, Laurent Pinchart wrote:
> > On Friday 07 Oct 2016 12:15:37 Simon Horman wrote:
> >> On Thu, Oct 06, 2016 at 12:37:08AM +0300, Sergei Shtylyov wrote:
> >>> Add minimal support for the RZ/G1M (R8A7743) SoC.
> >>>
> >>> Based on the original (and large) patch by Dmitry Shifrin
> >>> <dmitry.shifrin@cogentembedded.com>.
> >>>
> >>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >>
> >> Thanks, I have queued this up.
> >
> > I'd like to see this patch rebased on top of "[PATCH] ARM: shmobile:
> > Consolidate R8A779[234] machine definitions".
>
> I'm happy to drop this patch if that is the desired outcome of
> the discussion in this sub-thread.
It's at least my desired outcome ;-)
--
Regards,
Laurent Pinchart
^ permalink raw reply
* [PATCH] ARM: dts: fix naming of pinctrl node
From: Ray Jui @ 2016-10-08 21:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475958866-15942-1-git-send-email-scott.branden@broadcom.com>
On 10/8/2016 1:34 PM, Scott Branden wrote:
> Remove 0x from pinctrl node to match device tree naming convention.
>
> Signed-off-by: Scott Branden <scott.branden@broadcom.com>
> ---
> arch/arm/boot/dts/bcm-cygnus.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> index fabc9f3..539c58f 100644
> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> @@ -108,7 +108,7 @@
> };
> };
>
> - pinctrl: pinctrl at 0x0301d0c8 {
> + pinctrl: pinctrl at 0301d0c8 {
> compatible = "brcm,cygnus-pinmux";
> reg = <0x0301d0c8 0x30>,
> <0x0301d24c 0x2c>;
>
Looks good to me!
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
^ permalink raw reply
* [PATCH v2] arm64: dts: rename ns2.txt to brcm,ns2.txt
From: Ray Jui @ 2016-10-08 21:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475959684-18085-1-git-send-email-scott.branden@broadcom.com>
On 10/8/2016 1:48 PM, Scott Branden wrote:
> Rename ns2.txt to brcm,ns2.txt to match naming convention followed
> by rest of Broadcom binding documentation.
>
> Signed-off-by: Scott Branden <scott.branden@broadcom.com>
> ---
> Documentation/devicetree/bindings/arm/bcm/{ns2.txt => brcm,ns2.txt} | 0
> 1 file changed, 0 insertions(+), 0 deletions(-)
> rename Documentation/devicetree/bindings/arm/bcm/{ns2.txt => brcm,ns2.txt} (100%)
>
> diff --git a/Documentation/devicetree/bindings/arm/bcm/ns2.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.txt
> similarity index 100%
> rename from Documentation/devicetree/bindings/arm/bcm/ns2.txt
> rename to Documentation/devicetree/bindings/arm/bcm/brcm,ns2.txt
>
Looks good to me!
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
^ permalink raw reply
* [PATCH 5/6] clk: stm32f469: Add QSPI clock
From: Rob Herring @ 2016-10-08 20:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475245509-6487-6-git-send-email-gabriel.fernandez@st.com>
On Fri, Sep 30, 2016 at 04:25:08PM +0200, gabriel.fernandez at st.com wrote:
> From: Gabriel Fernandez <gabriel.fernandez@st.com>
>
> This patch adds the QSPI clock for stm32f469 discovery board.
> The gate mapping is a little bit different from stm32f429 soc.
>
> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
> ---
> .../devicetree/bindings/clock/st,stm32-rcc.txt | 4 +-
> drivers/clk/clk-stm32f4.c | 173 ++++++++++++++++++---
> 2 files changed, 158 insertions(+), 19 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt b/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
> index fee3205..eace3de 100644
> --- a/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
> +++ b/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
> @@ -8,7 +8,9 @@ Please also refer to clock-bindings.txt in this directory for common clock
> controller binding usage.
>
> Required properties:
> -- compatible: Should be "st,stm32f42xx-rcc"
> +- compatible: Should be:
> + "st,stm32f42xx-rcc"
> + "st,stm32f46xx-rcc"
Generally, we don't use wildcards in compatible strings. I know there's
lots of part numbers of stm32 parts which I guess are often same die
with different fusing or package. Your compatible strings should be at
least specific enough to identify parts that are really different die.
> - reg: should be register base and length as documented in the
> datasheet
> - #clock-cells: 2, device nodes should specify the clock in their "clocks"
^ permalink raw reply
* [PATCH v6 3/3] pci:add support aer/pme interrupts with none MSI/MSI-X/INTx mode
From: Rob Herring @ 2016-10-08 20:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475226697-7709-3-git-send-email-po.liu@nxp.com>
On Fri, Sep 30, 2016 at 05:11:37PM +0800, Po Liu wrote:
> On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
> When chip support the aer/pme interrupts with none MSI/MSI-X/INTx mode,
> maybe there is interrupt line for aer pme etc. Search the interrupt
> number in the fdt file. Then fixup the dev->irq with it.
Again, explain why you are breaking compatibility. Will an old dtb using
"intr" still work with this change? It should normally. There are some
exceptions, but you need to say what they are.
>
> Signed-off-by: Po Liu <po.liu@nxp.com>
> ---
> changes for v6:
> - modify bindings for "aer""pme";
> - changing to the hood method to implement the aer pme interrupt;
> - add pme interrupt in the same way;
>
> .../devicetree/bindings/pci/layerscape-pci.txt | 13 +++++--
> arch/arm/kernel/bios32.c | 43 ++++++++++++++++++++++
> arch/arm64/kernel/pci.c | 43 ++++++++++++++++++++++
> drivers/pci/pcie/portdrv_core.c | 31 +++++++++++++++-
> include/linux/pci.h | 1 +
> 5 files changed, 126 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> index 41e9f55..51ed49e 100644
> --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> @@ -18,8 +18,12 @@ Required properties:
> - reg: base addresses and lengths of the PCIe controller
> - interrupts: A list of interrupt outputs of the controller. Must contain an
> entry for each entry in the interrupt-names property.
> -- interrupt-names: Must include the following entries:
> - "intr": The interrupt that is asserted for controller interrupts
> +- interrupt-names: It could include the following entries:
"Could" is not strong enough. Every valid combination of interrupts
should correspond to a specific compatible string. A given version of
h/w either has these interrupts or not.
> + "aer": Asserted for aer interrupt when chip support the aer interrupt with
> + none MSI/MSI-X/INTx mode,but there is interrupt line for aer.
> + "pme": Asserted for pme interrupt when chip support the pme interrupt with
> + none MSI/MSI-X/INTx mode,but there is interrupt line for pme.
> + ......
> - fsl,pcie-scfg: Must include two entries.
> The first entry must be a link to the SCFG device node
> The second entry must be '0' or '1' based on physical PCIe controller index.
^ permalink raw reply
* [PATCH v19 03/12] add bindings document for altera freeze bridge
From: Rob Herring @ 2016-10-08 20:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160928182200.15800-4-atull@opensource.altera.com>
On Wed, Sep 28, 2016 at 01:21:51PM -0500, Alan Tull wrote:
> Add bindings document for the Altera Freeze Bridge. A Freeze
> Bridge is used to gate traffic to/from a region of a FPGA
> such that that region can be reprogrammed. The Freeze Bridge
> exist in FPGA fabric that is not currently being reconfigured.
>
> Signed-off-by: Alan Tull <atull@opensource.altera.com>
> Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
> ---
> v19: Added in v19 of patchset, uses fpga image info struct
> ---
> .../bindings/fpga/altera-freeze-bridge.txt | 23 ++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
>
> diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
> new file mode 100644
> index 0000000..97ecc11
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
> @@ -0,0 +1,23 @@
> +Altera Freeze Bridge Controller Driver
> +
> +The Altera Freeze Bridge Controller manages one or more freeze bridges.
> +The controller can freeze/disable the bridges which prevents signal
> +changes from passing through the bridge. The controller can also
> +unfreeze/enable the bridges which allows traffic to pass through the
> +bridge normally.
> +
> +Required properties:
> +- compatible : Should contain "altr,freeze-bridge-controller"
Only one version of the h/w?
> +- regs : base address and size for freeze bridge module
> +
> +Optional properties:
> +- bridge-enable : 0 if driver should disable bridge at startup
> + 1 if driver should enable bridge at startup
> + Default is to leave bridge in current state.
> +
> +Example:
> + freeze_controller at 100000450 {
Underscore...
> + compatible = "altr,freeze-bridge-controller";
> + regs = <0x1000 0x10>;
> + bridge-enable = <0>;
> + };
> --
> 2.9.3
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH v19 01/12] fpga: add bindings document for fpga region
From: Rob Herring @ 2016-10-08 20:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160928182200.15800-2-atull@opensource.altera.com>
On Wed, Sep 28, 2016 at 01:21:49PM -0500, Alan Tull wrote:
> New bindings document for FPGA Region to support programming
> FPGA's under Device Tree control
>
> Signed-off-by: Alan Tull <atull@opensource.altera.com>
> Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
> ---
> v9: initial version added to this patchset
> v10: s/fpga/FPGA/g
> replace DT overlay example with slightly more complicated example
> move to staging/simple-fpga-bus
> v11: No change in this patch for v11 of the patch set
> v12: Moved out of staging.
> Changed to use FPGA bridges framework instead of resets
> for bridges.
> v13: bridge at 0xff20000 -> bridge at ff200000, etc
> Leave out directly talking about overlays
> Remove regs and clocks directly under simple-fpga-bus in example
> Use common "firmware-name" binding instead of "fpga-firmware"
> v14: Use firmware-name in bindings description
> Call it FPGA Area
> Remove bindings that specify FPGA Manager and FPGA Bridges
> v15: Cleanup as per Rob's comments
> Combine usage doc with bindings document
> Document as being Altera specific
> Additions and changes to add FPGA Bus
> v16: Reworked to document FPGA Regions
> rename altera-fpga-bus-fpga-area.txt -> fpga-region.txt
> Remove references that made it sound exclusive to Altera
> Remove altr, prefix from fpga-bus and fpga-area compatible strings
> Added Moritz' usage example with Xilinx
> Cleaned up unit addresses
> v17: Lots of rewrites to try to make things clearer
> Clarify that overlay can be rejected if FPGA isn't programmed
> Add external-fpga-config binding already used in u-boot
> Change partial-reconfig binding to partial-fpga-config to align
> with existing u-boot binding format *-fpga-config
> Add a document from Xilinx' website
> v18: Fix node names underscores to be hyphens
> Fix copy/pasted duplicate nodes in diagram
> v19: Fix more underscores
> Make FPGA regions to be children of bridges
> General cleanup and clarification
> ---
> .../devicetree/bindings/fpga/fpga-region.txt | 494 +++++++++++++++++++++
> 1 file changed, 494 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/fpga/fpga-region.txt
Reviewed-by: Rob Herring <robh@kernel.org>
Nice job.
Rob
^ permalink raw reply
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