* [PATCH] ARM: dts: fix naming of pinctrl node
From: Florian Fainelli @ 2016-10-10 9:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6039a5f9-2b36-c427-2f8a-addf76cf1c26@broadcom.com>
On 10/08/2016 02:03 PM, Ray Jui wrote:
>
>
> On 10/8/2016 1:34 PM, Scott Branden wrote:
>> Remove 0x from pinctrl node to match device tree naming convention.
>>
>> Signed-off-by: Scott Branden <scott.branden@broadcom.com>
>> ---
>> arch/arm/boot/dts/bcm-cygnus.dtsi | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi
>> b/arch/arm/boot/dts/bcm-cygnus.dtsi
>> index fabc9f3..539c58f 100644
>> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
>> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
>> @@ -108,7 +108,7 @@
>> };
>> };
>>
>> - pinctrl: pinctrl at 0x0301d0c8 {
>> + pinctrl: pinctrl at 0301d0c8 {
>> compatible = "brcm,cygnus-pinmux";
>> reg = <0x0301d0c8 0x30>,
>> <0x0301d24c 0x2c>;
>>
>
> Looks good to me!
>
> Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Applied, thanks!
--
Florian
^ permalink raw reply
* [PATCH v2] arm64: dts: rename ns2.txt to brcm,ns2.txt
From: Florian Fainelli @ 2016-10-10 9:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <c0cfffa7-d72a-6acb-c457-cd696e24f2eb@broadcom.com>
On 10/08/2016 02:02 PM, Ray Jui wrote:
> On 10/8/2016 1:48 PM, Scott Branden wrote:
>> Rename ns2.txt to brcm,ns2.txt to match naming convention followed
>> by rest of Broadcom binding documentation.
>>
>> Signed-off-by: Scott Branden <scott.branden@broadcom.com>
>> ---
>> Documentation/devicetree/bindings/arm/bcm/{ns2.txt => brcm,ns2.txt} | 0
>> 1 file changed, 0 insertions(+), 0 deletions(-)
>> rename Documentation/devicetree/bindings/arm/bcm/{ns2.txt =>
>> brcm,ns2.txt} (100%)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/bcm/ns2.txt
>> b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.txt
>> similarity index 100%
>> rename from Documentation/devicetree/bindings/arm/bcm/ns2.txt
>> rename to Documentation/devicetree/bindings/arm/bcm/brcm,ns2.txt
>>
>
> Looks good to me!
>
> Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Applied, thanks!
--
Florian
^ permalink raw reply
* [PATCH v7 3/3] ARM: sunxi: Enable VGA bridge
From: Maxime Ripard @ 2016-10-10 9:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.60fc2fa7a6c5b5800b4e3a97b5598216817e0d9c.1476090316.git-series.maxime.ripard@free-electrons.com>
Enable the VGA bridge used on the A13-Olinuxino in the sunxi defconfig
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/configs/sunxi_defconfig | 1 +
1 file changed, 1 insertion(+), 0 deletions(-)
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 714da336ec86..dfeee5c51b40 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -98,6 +98,7 @@ CONFIG_MEDIA_RC_SUPPORT=y
CONFIG_RC_DEVICES=y
CONFIG_IR_SUNXI=y
CONFIG_DRM=y
+CONFIG_DRM_DUMB_VGA_DAC=y
CONFIG_DRM_SUN4I=y
CONFIG_FB=y
CONFIG_FB_SIMPLE=y
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH v7 2/3] ARM: multi_v7: enable VGA bridge
From: Maxime Ripard @ 2016-10-10 9:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.60fc2fa7a6c5b5800b4e3a97b5598216817e0d9c.1476090316.git-series.maxime.ripard@free-electrons.com>
Enable the RGB to VGA bridge driver in the defconfig
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+), 0 deletions(-)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 2c8665cd9dc5..aae732bd6681 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -567,6 +567,7 @@ CONFIG_DRM=y
CONFIG_DRM_I2C_ADV7511=m
# CONFIG_DRM_I2C_CH7006 is not set
# CONFIG_DRM_I2C_SIL164 is not set
+CONFIG_DRM_DUMB_VGA_DAC=m
CONFIG_DRM_NXP_PTN3460=m
CONFIG_DRM_PARADE_PS8622=m
CONFIG_DRM_NOUVEAU=m
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH v7 1/3] ARM: sun5i: a13-olinuxino: Enable VGA bridge
From: Maxime Ripard @ 2016-10-10 9:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.60fc2fa7a6c5b5800b4e3a97b5598216817e0d9c.1476090316.git-series.maxime.ripard@free-electrons.com>
Now that we have support for the VGA bridges using our DRM driver, enable
the display engine for the Olimex A13-Olinuxino.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 54 ++++++++++++++++++++++++-
1 file changed, 54 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index b3c234c65ea1..bb7210e0e4a9 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -72,6 +72,47 @@
default-state = "on";
};
};
+
+ bridge {
+ compatible = "dumb-vga-dac";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+
+ vga_bridge_in: endpoint {
+ remote-endpoint = <&tcon0_out_vga>;
+ };
+ };
+
+ port at 1 {
+ reg = <1>;
+
+ vga_bridge_out: endpoint {
+ remote-endpoint = <&vga_con_in>;
+ };
+ };
+ };
+ };
+
+ vga {
+ compatible = "vga-connector";
+
+ port {
+ vga_con_in: endpoint {
+ remote-endpoint = <&vga_bridge_out>;
+ };
+ };
+ };
+};
+
+&be0 {
+ status = "okay";
};
&ehci0 {
@@ -211,6 +252,19 @@
status = "okay";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rgb666_pins>;
+ status = "okay";
+};
+
+&tcon0_out {
+ tcon0_out_vga: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vga_bridge_in>;
+ };
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_b>;
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH v7 0/3] drm: Add Support for Passive RGB to VGA bridges
From: Maxime Ripard @ 2016-10-10 9:05 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
This serie is about adding support for the RGB to VGA bridge found in
the A13-Olinuxino and the CHIP VGA adapter.
Both these boards rely on an entirely passive bridge made out of
resitor ladders that do not require any initialisation. The only thing
needed is to get the timings from the screen if available (and if not,
fall back on XGA standards), set up the display pipeline to output on
the RGB bus with the proper timings, and you're done.
This serie also fixes a bunch of bugs uncovered when trying to
increase the resolution, and hence the pixel clock, of our
pipeline. It also fixes a few bugs in the DRM driver itself that went
unnoticed before.
Let me know what you think,
Maxime
Changes from v6:
- Reworked the patches to match the compatible and driver name merged
Changes from v5:
- Renamed to simple-vga-dac
Changes from v4:
- Removed unused functions
Changes from v3:
- Depends on OF in Kconfig
- Fixed typos in the driver comments
- Removed the mention of a "passive" bridge in the bindings doc
- Made the strcuture const
- Removed the nops and best_encoders implementations
- Removed the call to drm_bridge_enable in the sun4i driver
Changes from v2:
- Changed the compatible as suggested
- Rebased on top 4.8
Changes from v1:
- Switch to using a vga-connector
- Use drm_encoder bridge pointer instead of doing our own
- Report the connector status as unknown instead of connected by
default, and as connected only if we can retrieve the EDID.
- Switch to of_i2c_get_adapter by node, and put the reference when done
- Rebased on linux-next
Maxime Ripard (5):
drm/sun4i: rgb: Remove the bridge enable/disable functions
drm/bridge: Add RGB to VGA bridge support
ARM: sun5i: a13-olinuxino: Enable VGA bridge
ARM: multi_v7: enable VGA bridge
ARM: sunxi: Enable VGA bridge
.../bindings/display/bridge/rgb-to-vga-bridge.txt | 48 +++++
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 54 +++++
arch/arm/configs/multi_v7_defconfig | 1 +
arch/arm/configs/sunxi_defconfig | 1 +
drivers/gpu/drm/bridge/Kconfig | 7 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/rgb-to-vga.c | 229 +++++++++++++++++++++
drivers/gpu/drm/sun4i/sun4i_rgb.c | 6 -
8 files changed, 341 insertions(+), 6 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/bridge/rgb-to-vga-bridge.txt
create mode 100644 drivers/gpu/drm/bridge/rgb-to-vga.c
--
2.9.3
Maxime Ripard (3):
ARM: sun5i: a13-olinuxino: Enable VGA bridge
ARM: multi_v7: enable VGA bridge
ARM: sunxi: Enable VGA bridge
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 54 ++++++++++++++++++++++++-
arch/arm/configs/multi_v7_defconfig | 1 +-
arch/arm/configs/sunxi_defconfig | 1 +-
3 files changed, 56 insertions(+), 0 deletions(-)
--
git-series 0.8.10
^ permalink raw reply
* [PATCH 4/5] rpmsg: Driver for user space endpoint interface
From: Marek Novak @ 2016-10-10 9:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475900595-8375-4-git-send-email-bjorn.andersson@linaro.org>
-----Original Message-----
From: Bjorn Andersson [mailto:bjorn.andersson at linaro.org]
Sent: Saturday, October 08, 2016 6:23 AM
To: Ohad Ben-Cohen <ohad@wizery.com>; Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Jonathan Corbet <corbet@lwn.net>; Linus Walleij <linus.walleij@linaro.org>; Marek Novak <marek.novak@nxp.com>; Matteo Sartori <matteo.sartori@t3lab.it>; Michal Simek <monstr@monstr.eu>; linux-doc at vger.kernel.org; linux-kernel at vger.kernel.org; linux-remoteproc at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-arm-msm at vger.kernel.org
Subject: [PATCH 4/5] rpmsg: Driver for user space endpoint interface
This driver allows rpmsg instances to expose access to rpmsg endpoints to user space processes. It provides a control interface, allowing userspace to export endpoints and an endpoint interface for each exposed endpoint.
The implementation is based on prior art by Texas Instrument, Google, PetaLogix and was derived from a FreeRTOS performance statistics driver written by Michal Simek.
The control interface provides a "create endpoint" ioctl, which is fed a name, source and destination address. The three values are used to create the endpoint, in a backend-specific way, and a rpmsg endpoint device is created - with the three parameters are available in sysfs for udev usage.
E.g. to create an endpoint device for one of the Qualcomm SMD channel related to DIAG one would issue:
struct rpmsg_endpoint_info info = { "DIAG_CNTL", 0, 0 };
int fd = open("/dev/rpmsg_ctrl0", O_RDWR);
ioctl(fd, RPMSG_CREATE_EPT_IOCTL, &info);
Each created endpoint device shows up as an individual character device in /dev, allowing permission to be controlled on a per-endpoint basis.
The rpmsg endpoint will be created and destroyed following the opening and closing of the endpoint device, allowing rpmsg backends to open and close the physical channel, if supported by the wire protocol.
Cc: Marek Novak <marek.novak@nxp.com>
Cc: Matteo Sartori <matteo.sartori@t3lab.it>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Documentation/ioctl/ioctl-number.txt | 1 +
drivers/rpmsg/Makefile | 2 +-
drivers/rpmsg/rpmsg_char.c | 576 +++++++++++++++++++++++++++++++++++
drivers/rpmsg/rpmsg_internal.h | 2 +
include/uapi/linux/rpmsg.h | 35 +++
5 files changed, 615 insertions(+), 1 deletion(-) create mode 100644 drivers/rpmsg/rpmsg_char.c create mode 100644 include/uapi/linux/rpmsg.h
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 81c7f2bb7daf..08244bea5048 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -321,6 +321,7 @@ Code Seq#(hex) Include File Comments
0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
0xB3 00 linux/mmc/ioctl.h
0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org>
+0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org>
0xC0 00-0F linux/usb/iowarrior.h
0xCA 00-0F uapi/misc/cxl.h
0xCA 80-8F uapi/scsi/cxlflash_ioctl.h
diff --git a/drivers/rpmsg/Makefile b/drivers/rpmsg/Makefile index ae9c9132cf76..5daf1209b77d 100644
--- a/drivers/rpmsg/Makefile
+++ b/drivers/rpmsg/Makefile
@@ -1,3 +1,3 @@
-obj-$(CONFIG_RPMSG) += rpmsg_core.o
+obj-$(CONFIG_RPMSG) += rpmsg_core.o rpmsg_char.o
obj-$(CONFIG_RPMSG_QCOM_SMD) += qcom_smd.o
obj-$(CONFIG_RPMSG_VIRTIO) += virtio_rpmsg_bus.o
diff --git a/drivers/rpmsg/rpmsg_char.c b/drivers/rpmsg/rpmsg_char.c new file mode 100644 index 000000000000..a398a63e8d44
--- /dev/null
+++ b/drivers/rpmsg/rpmsg_char.c
@@ -0,0 +1,576 @@
+/*
+ * Copyright (c) 2016, Linaro Ltd.
+ * Copyright (c) 2012, Michal Simek <monstr@monstr.eu>
+ * Copyright (c) 2012, PetaLogix
+ * Copyright (c) 2011, Texas Instruments, Inc.
+ * Copyright (c) 2011, Google, Inc.
+ *
+ * Based on rpmsg performance statistics driver by Michal Simek, which
+in turn
+ * was based on TI & Google OMX rpmsg driver.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/fs.h>
+#include <linux/idr.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/rpmsg.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <uapi/linux/rpmsg.h>
+
+#include "rpmsg_internal.h"
+
+#define RPMSG_DEV_MAX 256
+
+static dev_t rpmsg_major;
+static struct class *rpmsg_class;
+
+static DEFINE_IDA(rpmsg_ctrl_ida);
+static DEFINE_IDA(rpmsg_ept_ida);
+static DEFINE_IDA(rpmsg_minor_ida);
+
+#define dev_to_eptdev(dev) container_of(dev, struct rpmsg_eptdev, dev)
+#define cdev_to_eptdev(i_cdev) container_of(i_cdev, struct
+rpmsg_eptdev, cdev)
+
+#define dev_to_ctrldev(dev) container_of(dev, struct rpmsg_ctrldev,
+dev) #define cdev_to_ctrldev(i_cdev) container_of(i_cdev, struct
+rpmsg_ctrldev, cdev)
+
+struct rpmsg_ctrldev {
+ struct rpmsg_device *rpdev;
+ struct cdev cdev;
+ struct device dev;
+};
+
+struct rpmsg_eptdev {
+ struct device dev;
+ struct cdev cdev;
+
+ struct rpmsg_device *rpdev;
+ struct rpmsg_channel_info chinfo;
+
+ struct mutex ept_lock;
+ struct rpmsg_endpoint *ept;
+
+ spinlock_t queue_lock;
+ struct sk_buff_head queue;
+ wait_queue_head_t readq;
+};
+
+static int rpmsg_eptdev_destroy(struct rpmsg_eptdev *eptdev);
+
+
+static int rpmsg_cdev_register(struct device *dev,
+ struct cdev *cdev,
+ const struct file_operations *fops,
+ dev_t *assigned_devt)
+{
+ dev_t devt;
+ int ret;
+
+ ret = ida_simple_get(&rpmsg_minor_ida, 0, 0, GFP_KERNEL);
+ if (ret < 0)
+ return ret;
+
+ devt = MKDEV(MAJOR(rpmsg_major), ret);
+
+ cdev_init(cdev, fops);
+ cdev->owner = THIS_MODULE;
+ ret = cdev_add(cdev, devt, 1);
+ if (ret < 0) {
+ dev_err(dev, "cdev_add failed: %d\n", ret);
+ ida_simple_remove(&rpmsg_minor_ida, MINOR(devt));
+ return ret;
+ }
+
+ *assigned_devt = devt;
+ return 0;
+}
+
+static int rpmsg_ept_cb(struct rpmsg_device *rpdev, void *buf, int len,
+ void *priv, u32 addr)
+{
+ struct rpmsg_eptdev *eptdev = priv;
+ struct sk_buff *skb;
+
+ skb = alloc_skb(len, GFP_ATOMIC);
+ if (!skb)
+ return -ENOMEM;
+
+ memcpy(skb_put(skb, len), buf, len);
+
+ spin_lock(&eptdev->queue_lock);
+ skb_queue_tail(&eptdev->queue, skb);
+ spin_unlock(&eptdev->queue_lock);
+
+ /* wake up any blocking processes, waiting for new data */
+ wake_up_interruptible(&eptdev->readq);
+
+ return 0;
+}
+
+static int rpmsg_eptdev_open(struct inode *inode, struct file *filp) {
+ struct rpmsg_eptdev *eptdev = cdev_to_eptdev(inode->i_cdev);
+ struct rpmsg_endpoint *ept;
+ struct rpmsg_device *rpdev = eptdev->rpdev;
+ struct device *dev = &eptdev->dev;
+
+ get_device(dev);
+
+ ept = rpmsg_create_ept(rpdev, rpmsg_ept_cb, eptdev, eptdev->chinfo);
+ if (!ept) {
+ dev_err(dev, "failed to open %s\n", eptdev->chinfo.name);
+ put_device(dev);
+ return -EINVAL;
+ }
+
+ eptdev->ept = ept;
+ filp->private_data = eptdev;
+
+ return 0;
+}
+
+static int rpmsg_eptdev_release(struct inode *inode, struct file *filp)
+{
+ struct rpmsg_eptdev *eptdev = cdev_to_eptdev(inode->i_cdev);
+ struct device *dev = &eptdev->dev;
+ struct sk_buff *skb;
+
+ /* Close the endpoint, if it's not already destroyed by the parent */
+ if (eptdev->ept)
+ rpmsg_destroy_ept(eptdev->ept);
+
+ /* Discard all SKBs */
+ while (!skb_queue_empty(&eptdev->queue)) {
+ skb = skb_dequeue(&eptdev->queue);
+ kfree_skb(skb);
+ }
+
+ put_device(dev);
+
+ return 0;
+}
+
+static long rpmsg_eptdev_ioctl(struct file *fp, unsigned int cmd,
+ unsigned long arg)
+{
+ struct rpmsg_eptdev *eptdev = fp->private_data;
+
+ if (cmd != RPMSG_DESTROY_EPT_IOCTL)
+ return -EINVAL;
+
+ return rpmsg_eptdev_destroy(eptdev);
+}
+
+static ssize_t rpmsg_eptdev_read(struct file *filp, char __user *buf,
+ size_t count, loff_t *f_pos)
+{
+ struct rpmsg_eptdev *eptdev = filp->private_data;
+ unsigned long flags;
+ struct sk_buff *skb;
+ int use;
+
+ spin_lock_irqsave(&eptdev->queue_lock, flags);
+
+ /* Wait for data in the queue */
+ if (skb_queue_empty(&eptdev->queue)) {
+ spin_unlock_irqrestore(&eptdev->queue_lock, flags);
+
+ if (filp->f_flags & O_NONBLOCK)
+ return -EAGAIN;
+
+ /* Wait until we get data or the endpoint goes away */
+ if (wait_event_interruptible(eptdev->readq,
+ !skb_queue_empty(&eptdev->queue) ||
+ !eptdev->ept))
+ return -ERESTARTSYS;
+
+ /* We lost the endpoint while waiting */
+ if (!eptdev->ept)
+ return -EPIPE;
+
+ spin_lock_irqsave(&eptdev->queue_lock, flags);
+ }
+
+ skb = skb_dequeue(&eptdev->queue);
+ if (!skb)
+ return -EFAULT;
+
+ spin_unlock_irqrestore(&eptdev->queue_lock, flags);
+
+ use = min_t(size_t, count, skb->len);
+ if (copy_to_user(buf, skb->data, use))
+ use = -EFAULT;
+
+ kfree_skb(skb);
+
+ return use;
+}
+
+static ssize_t rpmsg_eptdev_write(struct file *filp, const char __user *buf,
+ size_t count, loff_t *f_pos)
+{
+ struct rpmsg_eptdev *eptdev = filp->private_data;
+ void *kbuf;
+ int ret;
+
+ kbuf = kzalloc(count, GFP_KERNEL);
+ if (!kbuf)
+ return -ENOMEM;
+
+ if (copy_from_user(kbuf, buf, count)) {
+ ret = -EFAULT;
+ goto free_kbuf;
+ }
+
+ if (mutex_lock_interruptible(&eptdev->ept_lock)) {
+ ret = -ERESTARTSYS;
+ goto free_kbuf;
+ }
+
+ if (!eptdev->ept) {
+ ret = -EPIPE;
+ goto unlock_eptdev;
+ }
+
+ if (filp->f_flags & O_NONBLOCK)
+ ret = rpmsg_trysend(eptdev->ept, kbuf, count);
+ else
+ ret = rpmsg_send(eptdev->ept, kbuf, count);
+
+unlock_eptdev:
+ mutex_unlock(&eptdev->ept_lock);
+
+free_kbuf:
+ kfree(kbuf);
+ return ret;
+}
+
+static const struct file_operations rpmsg_eptdev_fops = {
+ .owner = THIS_MODULE,
+ .open = rpmsg_eptdev_open,
+ .release = rpmsg_eptdev_release,
+ .read = rpmsg_eptdev_read,
+ .write = rpmsg_eptdev_write,
+ .unlocked_ioctl = rpmsg_eptdev_ioctl,
+};
+
+static ssize_t name_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct rpmsg_eptdev *eptdev = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%s\n", eptdev->chinfo.name); } static
+DEVICE_ATTR_RO(name);
+
+static ssize_t src_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct rpmsg_eptdev *eptdev = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%d\n", eptdev->chinfo.src); } static
+DEVICE_ATTR_RO(src);
+
+static ssize_t dst_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct rpmsg_eptdev *eptdev = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%d\n", eptdev->chinfo.dst); } static
+DEVICE_ATTR_RO(dst);
+
+static struct attribute *rpmsg_eptdev_attrs[] = {
+ &dev_attr_name.attr,
+ &dev_attr_src.attr,
+ &dev_attr_dst.attr,
+ NULL
+};
+ATTRIBUTE_GROUPS(rpmsg_eptdev);
+
+static void rpmsg_eptdev_release_device(struct device *dev) {
+ struct rpmsg_eptdev *eptdev = dev_to_eptdev(dev);
+
+ ida_simple_remove(&rpmsg_minor_ida, MINOR(eptdev->dev.devt));
+ kfree(eptdev);
+}
+
+static int rpmsg_eptdev_create(struct rpmsg_ctrldev *ctrldev,
+ struct rpmsg_channel_info chinfo) {
+ struct rpmsg_device *rpdev = ctrldev->rpdev;
+ struct rpmsg_eptdev *eptdev;
+ struct device *dev;
+ int ret;
+ int id;
+
+ eptdev = kzalloc(sizeof(*eptdev), GFP_KERNEL);
+ if (!eptdev)
+ return -ENOMEM;
+
+ eptdev->rpdev = rpdev;
+ eptdev->chinfo = chinfo;
+
+ mutex_init(&eptdev->ept_lock);
+ spin_lock_init(&eptdev->queue_lock);
+ skb_queue_head_init(&eptdev->queue);
+ init_waitqueue_head(&eptdev->readq);
+
+ id = ida_simple_get(&rpmsg_ept_ida, 0, 0, GFP_KERNEL);
+ if (id < 0) {
+ kfree(eptdev);
+ return id;
+ }
+
+ dev = &eptdev->dev;
+ device_initialize(dev);
+ dev->class = rpmsg_class;
+ dev->id = id;
+ dev->parent = &ctrldev->dev;
+ dev->release = rpmsg_eptdev_release_device;
+ dev->groups = rpmsg_eptdev_groups;
+ dev_set_name(dev, "rpmsg%d", id);
+ dev_set_drvdata(dev, eptdev);
+
+ ret = rpmsg_cdev_register(dev, &eptdev->cdev,
+ &rpmsg_eptdev_fops, &dev->devt);
+ if (ret) {
+ dev_err(dev, "cdev_add failed: %d\n", ret);
+ goto out;
+ }
+
+ ret = device_add(dev);
+ if (ret) {
+ dev_err(dev, "device_register failed: %d\n", ret);
+ goto out;
+ }
+
+out:
+ if (ret < 0)
+ put_device(dev);
+
+ return ret;
+}
+
+static int rpmsg_eptdev_destroy(struct rpmsg_eptdev *eptdev) {
+ struct rpmsg_endpoint *ept = eptdev->ept;
+
+ mutex_lock(&eptdev->ept_lock);
+ eptdev->ept = NULL;
+ mutex_unlock(&eptdev->ept_lock);
+
+ rpmsg_destroy_ept(ept);
+
+ /* wake up any blocking processes */
+ wake_up_interruptible(&eptdev->readq);
+
+ cdev_del(&eptdev->cdev);
+ device_del(&eptdev->dev);
+ put_device(&eptdev->dev);
+
+ return 0;
+}
+
+static int rpmsg_ctrldev_open(struct inode *inode, struct file *filp) {
+ struct rpmsg_ctrldev *ctrldev = cdev_to_ctrldev(inode->i_cdev);
+
+ get_device(&ctrldev->rpdev->dev);
+ filp->private_data = ctrldev;
+
+ return 0;
+}
+
+static int rpmsg_ctrldev_release(struct inode *inode, struct file
+*filp) {
+ struct rpmsg_ctrldev *ctrldev = cdev_to_ctrldev(inode->i_cdev);
+
+ put_device(&ctrldev->rpdev->dev);
+
+ return 0;
+}
+
+static long rpmsg_ctrldev_ioctl(struct file *fp, unsigned int cmd,
+ unsigned long arg)
+{
+ struct rpmsg_ctrldev *ctrldev = fp->private_data;
+ void __user *argp = (void __user *)arg;
+ struct rpmsg_endpoint_info eptinfo;
+ struct rpmsg_channel_info chinfo;
+
+ if (cmd != RPMSG_CREATE_EPT_IOCTL)
+ return -EINVAL;
+
+ if (copy_from_user(&eptinfo, argp, sizeof(eptinfo)))
+ return -EFAULT;
+
+ memcpy(chinfo.name, eptinfo.name, RPMSG_NAME_SIZE);
+ chinfo.name[RPMSG_NAME_SIZE-1] = '\0';
+ chinfo.src = eptinfo.src;
+ chinfo.dst = eptinfo.dst;
+
+ return rpmsg_eptdev_create(ctrldev, chinfo); };
+
+static const struct file_operations rpmsg_ctrldev_fops = {
+ .owner = THIS_MODULE,
+ .open = rpmsg_ctrldev_open,
+ .release = rpmsg_ctrldev_release,
+ .unlocked_ioctl = rpmsg_ctrldev_ioctl, };
+
+static void rpmsg_chrdev_release_device(struct device *dev) {
+ struct rpmsg_ctrldev *ctrldev = dev_to_ctrldev(dev);
+
+ ida_simple_remove(&rpmsg_ctrl_ida, MINOR(dev->devt));
+ cdev_del(&ctrldev->cdev);
+ kfree(ctrldev);
+}
+
+static int rpmsg_chrdev_probe(struct rpmsg_device *rpdev) {
+ struct rpmsg_ctrldev *ctrldev;
+ struct device *dev;
+ int ret;
+ int id;
+
+ ctrldev = kzalloc(sizeof(*ctrldev), GFP_KERNEL);
+ if (!ctrldev)
+ return -ENOMEM;
+
+ dev = &ctrldev->dev;
+
+ ctrldev->rpdev = rpdev;
+
+ id = ida_simple_get(&rpmsg_ctrl_ida, 0, 0, GFP_KERNEL);
+ if (id < 0) {
+ kfree(ctrldev);
+ return id;
+ }
+
+ device_initialize(dev);
+ dev->parent = &rpdev->dev;
+ dev->class = rpmsg_class;
+ dev->release = rpmsg_chrdev_release_device;
+ dev_set_name(&ctrldev->dev, "rpmsg_ctrl%d", id);
+
+ ret = rpmsg_cdev_register(dev, &ctrldev->cdev,
+ &rpmsg_ctrldev_fops, &dev->devt);
+ if (ret < 0) {
+ put_device(dev);
+ return ret;
+ }
+
+ ret = device_add(dev);
+ if (ret) {
+ dev_err(&rpdev->dev, "device_register failed: %d\n", ret);
+ put_device(dev);
+ }
+
+ dev_set_drvdata(&rpdev->dev, ctrldev);
+
+ return ret;
+}
+
+static int _rpmsg_eptdev_destroy(struct device *dev, void *data) {
+ struct rpmsg_eptdev *eptdev = dev_to_eptdev(dev);
+
+ return rpmsg_eptdev_destroy(eptdev);
+}
+
+static void rpmsg_chrdev_remove(struct rpmsg_device *rpdev) {
+ struct rpmsg_ctrldev *ctrldev = dev_get_drvdata(&rpdev->dev);
+ int ret;
+
+ /* Destroy all endpoints */
+ ret = device_for_each_child(&ctrldev->dev, NULL, _rpmsg_eptdev_destroy);
+ if (ret)
+ dev_warn(&rpdev->dev, "failed to nuke endpoints: %d\n", ret);
+
+ device_del(&ctrldev->dev);
+ put_device(&ctrldev->dev);
+}
+
+static struct rpmsg_driver rpmsg_chrdev_driver = {
+ .probe = rpmsg_chrdev_probe,
+ .remove = rpmsg_chrdev_remove,
+ .drv = {
+ .name = "rpmsg_chrdev",
+ },
+};
+
+/**
+ * rpmsg_chrdev_register_device() - register chrdev device based on rpdev
+ * @rpdev: prepared rpdev to be used for creating endpoints
+ *
+ * This function wraps rpmsg_register_device() preparing the rpdev for
+use as
+ * basis for the rpmsg chrdev.
+ */
+int rpmsg_chrdev_register_device(struct rpmsg_device *rpdev) {
+ strcpy(rpdev->id.name, "rpmsg_chrdev");
+ rpdev->driver_override = "rpmsg_chrdev";
+
+ return rpmsg_register_device(rpdev);
+}
+EXPORT_SYMBOL(rpmsg_chrdev_register_device);
+
+static int rpmsg_char_init(void)
+{
+ int ret;
+
+ ret = alloc_chrdev_region(&rpmsg_major, 0, RPMSG_DEV_MAX, "rpmsg");
+ if (ret < 0) {
+ pr_err("rpmsg: failed to allocate char dev region\n");
+ return ret;
+ }
+
+ rpmsg_class = class_create(THIS_MODULE, "rpmsg");
+ if (IS_ERR(rpmsg_class)) {
+ pr_err("failed to create rpmsg class\n");
+ ret = PTR_ERR(rpmsg_class);
+ goto unregister_chrdev;
+ }
+
+ ret = register_rpmsg_driver(&rpmsg_chrdev_driver);
+ if (ret < 0) {
+ pr_err("rpmsgchr: failed to register rpmsg driver\n");
+ goto destroy_class;
+ }
+
+ return 0;
+
+destroy_class:
+ class_destroy(rpmsg_class);
+
+unregister_chrdev:
+ unregister_chrdev_region(rpmsg_major, RPMSG_DEV_MAX);
+
+ return ret;
+}
+postcore_initcall(rpmsg_char_init);
+
+static void rpmsg_chrdev_exit(void)
+{
+ unregister_rpmsg_driver(&rpmsg_chrdev_driver);
+ unregister_chrdev_region(rpmsg_major, RPMSG_DEV_MAX); }
+module_exit(rpmsg_chrdev_exit);
diff --git a/drivers/rpmsg/rpmsg_internal.h b/drivers/rpmsg/rpmsg_internal.h index 8075a20f919b..53d300eacc1c 100644
--- a/drivers/rpmsg/rpmsg_internal.h
+++ b/drivers/rpmsg/rpmsg_internal.h
@@ -79,4 +79,6 @@ int rpmsg_unregister_device(struct device *parent, struct device *rpmsg_find_device(struct device *parent,
struct rpmsg_channel_info *chinfo);
+int rpmsg_chrdev_register_device(struct rpmsg_device *rpdev);
+
#endif
diff --git a/include/uapi/linux/rpmsg.h b/include/uapi/linux/rpmsg.h new file mode 100644 index 000000000000..dedc226e0d3f
--- /dev/null
+++ b/include/uapi/linux/rpmsg.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2016, Linaro Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _UAPI_RPMSG_H_
+#define _UAPI_RPMSG_H_
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+
+/**
+ * struct rpmsg_endpoint_info - endpoint info representation
+ * @name: name of service
+ * @src: local address
+ * @dst: destination address
+ */
+struct rpmsg_endpoint_info {
+ char name[32];
+ __u32 src;
+ __u32 dst;
+};
+
+#define RPMSG_CREATE_EPT_IOCTL _IOW(0xb5, 0x1, struct rpmsg_endpoint_info)
+#define RPMSG_DESTROY_EPT_IOCTL _IO(0xb5, 0x2)
+
+#endif
--
2.5.0
----------------------------------------
Hi Bjorn,
Great patch!
You managed to simplify what I was trying to accomplish with my patch (https://raw.githubusercontent.com/NXPmicro/rpmsg-sysfs/0aa1817545a765c200b1b2f9b6680a420dcf9171/rpmsg_sysfs_interface.patch )
I am looking forward for your patch being upstreamed!
Did you place a pull request?
Can you share with me/us a link to your fork, where the patch is applied?
Thanks,
Marek
^ permalink raw reply related
* [PATCH devicetree] ARM: BCM53573: Specify PMU and its ILP clock in the DT
From: Florian Fainelli @ 2016-10-10 8:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160917201346.15060-1-zajec5@gmail.com>
On 09/17/2016 01:13 PM, Rafa? Mi?ecki wrote:
> From: Rafa? Mi?ecki <rafal@milecki.pl>
>
> ILP clock (sometimes called a "slow clock") is a part of PMU (Power
> Management Unit). There has been recently added a driver for it, so add
> a proper entry in the DT as well.
>
> Signed-off-by: Rafa? Mi?ecki <rafal@milecki.pl>
Applied, thanks!
--
Florian
^ permalink raw reply
* camera on n900, v4.8
From: Pali Rohár @ 2016-10-10 8:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161005190340.GA25755@amd>
On Wednesday 05 October 2016 21:03:41 Pavel Machek wrote:
> Hi!
>
> Camera has some non-trivial dependencies on N900; it seems to rely on
> gpio-switch.c, for example. I'll try to strip the diff further, but in
> the meantime, here's the version I'm working with.
>
> Pavel
>
>
With "Camera" do you mean some Maemo userspace application? Because I
think that nobody else could depends on gpio-switch kernel driver.
Anyway, it should be easy to rewrite such gpio-switch application to use
either input kernel events (from /dev/input/something) or directly check
gpio state via /sys/class/gpio/.
IIRC Maemo's Camera needed gpio-switch for testing if back camera cover
is open or closed and for checking when camera push button pressed and
released.
--
Pali Roh?r
pali.rohar at gmail.com
^ permalink raw reply
* [PATCH v2 1/8] PM / Domains: Make genpd state allocation dynamic
From: Ulf Hansson @ 2016-10-10 8:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475879821-8035-2-git-send-email-lina.iyer@linaro.org>
On 8 October 2016 at 00:36, Lina Iyer <lina.iyer@linaro.org> wrote:
> Allow PM Domain states to be defined dynamically by the drivers. This
> removes the limitation on the maximum number of states possible for a
> domain.
>
> Cc: Axel Haslam <ahaslam+renesas@baylibre.com>
> Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
> ---
> arch/arm/mach-imx/gpc.c | 17 ++++++++++-------
> drivers/base/power/domain.c | 36 ++++++++++++++++++++++++------------
> include/linux/pm_domain.h | 5 ++---
> 3 files changed, 36 insertions(+), 22 deletions(-)
>
> diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
> index 0df062d..57a410b 100644
> --- a/arch/arm/mach-imx/gpc.c
> +++ b/arch/arm/mach-imx/gpc.c
> @@ -380,13 +380,6 @@ static struct pu_domain imx6q_pu_domain = {
> .name = "PU",
> .power_off = imx6q_pm_pu_power_off,
> .power_on = imx6q_pm_pu_power_on,
> - .states = {
> - [0] = {
> - .power_off_latency_ns = 25000,
> - .power_on_latency_ns = 2000000,
> - },
> - },
> - .state_count = 1,
> },
> };
>
> @@ -430,6 +423,16 @@ static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg)
> if (!IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS))
> return 0;
>
> + imx6q_pu_domain.base.states = devm_kzalloc(dev,
> + sizeof(*imx6q_pu_domain.base.states),
> + GFP_KERNEL);
> + if (!imx6q_pu_domain.base.states)
> + return -ENOMEM;
> +
> + imx6q_pu_domain.base.states[0].power_off_latency_ns = 25000;
> + imx6q_pu_domain.base.states[0].power_on_latency_ns = 2000000;
> + imx6q_pu_domain.base.state_count = 1;
> +
> pm_genpd_init(&imx6q_pu_domain.base, NULL, false);
> return of_genpd_add_provider_onecell(dev->of_node,
> &imx_gpc_onecell_data);
> diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
> index e023066..4e87170 100644
> --- a/drivers/base/power/domain.c
> +++ b/drivers/base/power/domain.c
> @@ -1282,6 +1282,21 @@ out:
> }
> EXPORT_SYMBOL_GPL(pm_genpd_remove_subdomain);
>
> +static int genpd_set_default_power_state(struct generic_pm_domain *genpd)
> +{
> + struct genpd_power_state *state;
> +
> + state = kzalloc(sizeof(*state), GFP_KERNEL);
> + if (!state)
> + return -ENOMEM;
> +
> + genpd->states = state;
> + genpd->state_count = 1;
> + genpd->free = state;
> +
> + return 0;
> +}
> +
> /**
> * pm_genpd_init - Initialize a generic I/O PM domain object.
> * @genpd: PM domain object to initialize.
> @@ -1293,6 +1308,8 @@ EXPORT_SYMBOL_GPL(pm_genpd_remove_subdomain);
> int pm_genpd_init(struct generic_pm_domain *genpd,
> struct dev_power_governor *gov, bool is_off)
> {
> + int ret;
> +
> if (IS_ERR_OR_NULL(genpd))
> return -EINVAL;
>
> @@ -1325,19 +1342,12 @@ int pm_genpd_init(struct generic_pm_domain *genpd,
> genpd->dev_ops.start = pm_clk_resume;
> }
>
> - if (genpd->state_idx >= GENPD_MAX_NUM_STATES) {
> - pr_warn("Initial state index out of bounds.\n");
> - genpd->state_idx = GENPD_MAX_NUM_STATES - 1;
> - }
> -
> - if (genpd->state_count > GENPD_MAX_NUM_STATES) {
> - pr_warn("Limiting states to %d\n", GENPD_MAX_NUM_STATES);
> - genpd->state_count = GENPD_MAX_NUM_STATES;
> - }
> -
> /* Use only one "off" state if there were no states declared */
> - if (genpd->state_count == 0)
> - genpd->state_count = 1;
> + if (genpd->state_count == 0) {
> + ret = genpd_set_default_power_state(genpd);
> + if (ret)
> + return ret;
> + }
>
> mutex_lock(&gpd_list_lock);
> list_add(&genpd->gpd_list_node, &gpd_list);
> @@ -1374,6 +1384,8 @@ static int genpd_remove(struct generic_pm_domain *genpd)
> kfree(link);
> }
>
> + kfree(genpd->free);
> +
To be safe, let's move this after cancel_work_sync() - as to prevent
no accesses is made to ->states pointer after you have freed it.
> list_del(&genpd->gpd_list_node);
> mutex_unlock(&genpd->lock);
> cancel_work_sync(&genpd->power_off_work);
> diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
> index a09fe5c..de1d8f3 100644
> --- a/include/linux/pm_domain.h
> +++ b/include/linux/pm_domain.h
> @@ -19,8 +19,6 @@
> /* Defines used for the flags field in the struct generic_pm_domain */
> #define GENPD_FLAG_PM_CLK (1U << 0) /* PM domain uses PM clk */
>
> -#define GENPD_MAX_NUM_STATES 8 /* Number of possible low power states */
> -
> enum gpd_status {
> GPD_STATE_ACTIVE = 0, /* PM domain is active */
> GPD_STATE_POWER_OFF, /* PM domain is off */
> @@ -70,9 +68,10 @@ struct generic_pm_domain {
> void (*detach_dev)(struct generic_pm_domain *domain,
> struct device *dev);
> unsigned int flags; /* Bit field of configs for genpd */
> - struct genpd_power_state states[GENPD_MAX_NUM_STATES];
> + struct genpd_power_state *states;
> unsigned int state_count; /* number of states */
> unsigned int state_idx; /* state that genpd will go to when off */
> + void *free; /* Free the state that was allocated for default */
>
> };
>
> --
> 2.7.4
>
After the minor change suggested above, you may add my ack.
Kind regards
Uffe
^ permalink raw reply
* [PATCH] efi/arm: fix absolute relocation detection for older toolchains
From: Jon Hunter @ 2016-10-10 8:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKv+Gu-QJt4-c2Egnog0TdjJ0hLdg8g4Q303T2R9u_F3RXcwOA@mail.gmail.com>
On 05/10/16 18:30, Ard Biesheuvel wrote:
> On 4 October 2016 at 22:30, Matt Fleming <matt@codeblueprint.co.uk> wrote:
>> On Tue, 04 Oct, at 11:34:31AM, Ard Biesheuvel wrote:
>>>
>>> These relocations are harmless, since the debug ones are only
>>> interpreted by the debugger, and the ones generated by
>>> EXPORT_SYMBOL(sort) will never be referenced, since the symbols they
>>> contain are either renamed to __efistub_xxx (arm64), or they are not
>>> part of the kernel proper (arm)
>>>
>>> So both cases are false positives, but the diagnostic is important,
>>> and so breaking the build is appropriate for any other absolute
>>> relocation that may appear.
>>>
>>> The effect of the patch is not that the diagnostic is ignored, but
>>> that these relocations are not generated in the first place (-g0) or
>>> removed explicitly (ksymtab/krcrctab+sort) rather than via a wildcard.
>>> So other than not breaking the build, this patch should have no user
>>> observeable differences.
>>
>> Thanks Ard, sounds reasonable. Feel free to take this through
>> whichever tree you think is best.
>>
>> Reviewed-by: Matt Fleming <matt@codeblueprint.co.uk>
>
> Thanks Matt.
>
> Arnd: could you take this on top of the patch that adds CONFIG_EFI to
> multi_v7_defconfig? That would minimize the breakage, I think.
Can someone pick up this fix? -next has been broken for me since 20th
Sept :-(
Cheers
Jon
--
nvpublic
^ permalink raw reply
* [PATCH v6 1/5] drm/sun4i: rgb: Remove the bridge enable/disable functions
From: Maxime Ripard @ 2016-10-10 8:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOw6vbJ5C95rxK6--zEintO=qeu+Pm=OcvB+SYzQuvz5pSQaaw@mail.gmail.com>
On Thu, Oct 06, 2016 at 03:43:21PM -0400, Sean Paul wrote:
> On Thu, Oct 6, 2016 at 3:57 AM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > The atomic helpers already call the drm_bridge_enable on our behalf,
> > there's no need to do it a second time.
> >
> > Reported-by: Sean Paul <seanpaul@chromium.org>
>
> Reviewed-by: Sean Paul <seanpaul@chromium.org>
Thanks, I just queued it in my fixes for 4.9.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [RFC 02/10] dt-bindings: interrupt-controller: add DT binding for meson GPIO interrupt controller
From: Jerome Brunet @ 2016-10-10 8:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161009012927.GV18158@rob-hp-laptop>
On Sat, 2016-10-08 at 20:29 -0500, Rob Herring wrote:
> On Tue, Oct 04, 2016 at 05:08:20PM +0200, Jerome Brunet wrote:
> >
> > This commit adds the device tree bindings description for Amlogic's
> > GPIO
> > interrupt controller available on the meson8, meson8b and gxbb SoC
> > families
> >
> > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> > ---
> > ?.../amlogic,meson-gpio-intc.txt????????????????????| 39
> > ++++++++++++++++++++++
> > ?1 file changed, 39 insertions(+)
> > ?create mode 100644 Documentation/devicetree/bindings/interrupt-
> > controller/amlogic,meson-gpio-intc.txt
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-
> > controller/amlogic,meson-gpio-intc.txt
> > b/Documentation/devicetree/bindings/interrupt-
> > controller/amlogic,meson-gpio-intc.txt
> > new file mode 100644
> > index 000000000000..bd4cceefcda1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/interrupt-
> > controller/amlogic,meson-gpio-intc.txt
> > @@ -0,0 +1,39 @@
> > +Amlogic meson GPIO interrupt controller
> > +
> > +Meson SoCs contains an interrupt controller which is able watch
> > the SoC pads
> > +and generate an interrupt on edges or level. The controller is
> > essentially a
> > +256 pads to 8 GIC interrupt multiplexer, with a filter block to
> > select edge
> > +or level and polarity. We don?t expose all 256 mux inputs because
> > the
> > +documentation shows that upper part is not mapped to any pad. The
> > actual number
> > +of interrupt exposed depends on the SoC.
> > +
> > +Required properties:
> > +
> > +- compatible : should be: "amlogic,meson8-gpio-intc? or
> > +???amlogic,meson8b-gpio-intc? or ?amlogic,gxbb-gpio-intc?
>
> One per line please if you respin the series.
Got it. There will be a respin for sure.
Thx Rob
>
> Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement remaining pins
From: Linus Walleij @ 2016-10-10 7:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.115463f791b69859c5ce9dafd61a5755ea039f4b.1474986045.git-series.andrew@aj.id.au>
On Tue, Sep 27, 2016 at 4:50 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> The initial Aspeed pinctrl patches implemented a subset of pins for each of the
> g4 and g5 SoCs. This series provides a number of fixes to the initial patches,
> mostly for issues identified in the g5 driver. The fixes account for the first
> half of the series (up to and including "pinctrl: aspeed-g5: Fix pin
> association of SPI1 function") and should be applied for 4.9.
Those are applied for fixes.
> The second half, from "pinctrl: aspeed: Enable capture of off-SCU pinmux
> state", implements some additional functionality in the core engine for the
> Aspeed SoCs and follows up with patches implementing mux configuration tables
> for all remaining pins. Given the significant additions in the last few
> patches, their lateness in the cycle and the light testing they have received
> they are best left for 4.10, but I'm keen to get them out for review.
I'm holding these back until v4.9-rc1 is out.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 4/8] pinctrl: aspeed-g5: Fix pin association of SPI1 function
From: Linus Walleij @ 2016-10-10 7:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <bdd34f8c4bfabbc1d3cd05a66ac8734da514b1e5.1474986045.git-series.andrew@aj.id.au>
On Tue, Sep 27, 2016 at 4:50 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> The SPI1 function was associated with the wrong pins: The functions that
> those pins provide is either an SPI debug or passthrough function
> coupled to SPI1. Make the SPI1 mux function configure the relevant pins
> and associate new SPI1DEBUG and SPI1PASSTHRU functions with the pins
> that were already defined.
>
> The notation used in the datasheet's multi-function pin table for the SoC is
> often creative: in this case the SYS* signals are enabled by a single bit,
> which is nothing unusual on its own, but in this case the bit was also
> participating in a multi-bit bitfield and therefore represented multiple
> functions. This fact was overlooked in the original patch.
>
> Fixes: 56e57cb6c07f (pinctrl: Add pinctrl-aspeed-g5 driver)
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Patch applied for fixes.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 3/8] pinctrl: aspeed-g5: Fix GPIOE1 typo
From: Linus Walleij @ 2016-10-10 7:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <9364de84d3be30a5349298e219ca827d176d7ba8.1474986045.git-series.andrew@aj.id.au>
On Tue, Sep 27, 2016 at 4:50 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> This prevented C20 from successfully being muxed as GPIO.
>
> Fixes: 56e57cb6c07f (pinctrl: Add pinctrl-aspeed-g5 driver)
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Patch applied for fixes.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 2/8] pinctrl: aspeed-g5: Fix names of GPID2 pins
From: Linus Walleij @ 2016-10-10 7:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <69eda17c16684f4212a9f3e64d9587abfcc7ae74.1474986045.git-series.andrew@aj.id.au>
On Tue, Sep 27, 2016 at 4:50 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> Fixes simple typos in the initial commit. There is no behavioural
> change.
>
> Fixes: 56e57cb6c07f (pinctrl: Add pinctrl-aspeed-g5 driver)
> Reported-by: Xo Wang <xow@google.com>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Patch applied for fixes.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 1/8] pinctrl: aspeed: "Not enabled" is a significant mux state
From: Linus Walleij @ 2016-10-10 7:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a2fce70d4285ec2321a64a4f7145ea8a90d988b3.1474986045.git-series.andrew@aj.id.au>
On Tue, Sep 27, 2016 at 4:50 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> Consider a scenario with one pin P that has two signals A and B, where A
> is defined to be higher priority than B: That is, if the mux IP is in a
> state that would consider both A and B to be active on P, then A will be
> the active signal.
>
> To instead configure B as the active signal we must configure the mux so
> that A is inactive. The mux state for signals can be described by
> logical operations on one or more bits from one or more registers (a
> "signal expression"), which in some cases leads to aliased mux states for
> a particular signal. Further, signals described by multi-bit bitfields
> often do not only need to record the states that would make them active
> (the "enable" expressions), but also the states that makes them inactive
> (the "disable" expressions). All of this combined leads to four possible
> states for a signal:
>
> 1. A signal is active with respect to an "enable" expression
> 2. A signal is not active with respect to an "enable" expression
> 3. A signal is inactive with respect to a "disable" expression
> 4. A signal is not inactive with respect to a "disable" expression
>
> In the case of P, if we are looking to activate B without explicitly
> having configured A it's enough to consider A inactive if all of A's
> "enable" signal expressions evaluate to "not active". If any evaluate to
> "active" then the corresponding "disable" states must be applied so it
> becomes inactive.
>
> For example, on the AST2400 the pins composing GPIO bank H provide
> signals ROMD8 through ROMD15 (high priority) and those for UART6 (low
> priority). The mux states for ROMD8 through ROMD15 are aliased, i.e.
> there are two mux states that result in the respective signals being
> configured:
>
> A. SCU90[6]=1
> B. Strap[4,1:0]=100
>
> Further, the second mux state is a 3-bit bitfield that explicitly
> defines the enabled state but the disabled state is implicit, i.e. if
> Strap[4,1:0] is not exactly "100" then ROMD8 through ROMD15 are not
> considered active. This requires the mux function evaluation logic to
> use approach 2. above, however the existing code was using approach 3.
> The problem was brought to light on the Palmetto machines where the
> strap register value is 0x120ce416, and prevented GPIO requests in bank
> H from succeeding despite the hardware being in a position to allow
> them.
>
> Fixes: 318398c09a8d ("pinctrl: Add core pinctrl support for Aspeed SoCs")
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Patch applied for fixes.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH] ARM: multi_v7_defconfig: Enable Intel e1000e driver
From: Arnd Bergmann @ 2016-10-10 7:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475959264-16582-1-git-send-email-scott.branden@broadcom.com>
On Saturday, October 8, 2016 1:41:04 PM CEST Scott Branden wrote:
> Enable support for the Intel e1000e driver
>
> Signed-off-by: Ray Jui <rjui@broadcom.com>
> Signed-off-by: Scott Branden <scott.branden@broadcom.com>
>
Can we make this a loadable module and group it with the other
ethernet drivers?
Arnd
^ permalink raw reply
* [PATCH] ARM: dts: rockchip: Reserve unusable memory region on rk3066
From: Huang, Tao @ 2016-10-10 7:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <f8aba48d-6c69-b246-4cb2-48a2770c80e4@gmail.com>
Hi Pawe?:
On 2016?10?05? 14:09, Pawe? Jarosz wrote:
> W dniu 05.10.2016 o 04:27, Huang, Tao pisze:
>> I don't remember RK3066 has such limit. I will double check with our IC
>> design team.
>> Do you know which master can not access this memory area
>> [0x9F000000~0xA0000000)?
> I don't.
>> Could you please tell which board you're using (and how much memory it has)
> Rikomagic MK808 1GB RAM
>
Our IC guy need us tell them which master can not access such area, DMA
or EMMC Controller or GPU, etc? Could you tell me how to reproduce such
issue?
And we can confirm CPU core can access this memory through /dev/mem and
the test board is 1GB too. Personally, I don't think RK3066 has such
limit because when we verify this chip, we don't found such limit at all.
Thanks,
Huang, Tao
^ permalink raw reply
* [PATCH v5 2/5] drm/bridge: Add RGB to VGA bridge support
From: Laurent Pinchart @ 2016-10-10 7:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <04679d93-ae58-7c94-616e-2eec23e84d6e@codeaurora.org>
Hi Archit,
On Monday 10 Oct 2016 11:05:10 Archit Taneja wrote:
> On 10/07/2016 02:44 PM, Maxime Ripard wrote:
> > On Fri, Oct 07, 2016 at 10:27:31AM +0530, Archit Taneja wrote:
[snip]
> >> If no one has any more objections within the next day, I'll pull in
> >> Maxime's v5 RGB to VGA bridge driver, and change the compatible to
> >> "dumb-vga-dac".
> >
> > That works for me. You'll probably want to update the Kconfig and file
> > name to match though.
>
> Queued to drm-misc, with the changes suggested by you and Laurent.
Those changes would have been worth a repost. I've had a look at the patch
you've committed and it looks OK to me, so no harm done (the commit message is
a bit inaccurate, but it's not the end of the world). Could you please make
sure you repost patches in the future when you change them in non-trivial ways
?
--
Regards,
Laurent Pinchart
^ permalink raw reply
* [PATCH v3] drm: tilcdc: add a da850-specific compatible string
From: Jyri Sarha @ 2016-10-10 6:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475509519-29516-1-git-send-email-bgolaszewski@baylibre.com>
On 10/03/16 18:45, Bartosz Golaszewski wrote:
> Due to some potential tweaks for the da850 LCDC (for example: the
> required memory bandwith settings) we need a separate compatible
> for the IP present on the da850 boards.
>
> Suggested-by: Sekhar Nori <nsekhar@ti.com>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Thanks,
I pick this up, but I won't send it for 4.9 any more. The LCDC rev1
support is not yet complete in 4.9 anyway.
BR,
Jyri
> ---
> v1 -> v2:
> - added the new compatible to the bindings documentation
>
> v2 -> v3:
> - made the documentation more detailed
>
> Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt | 6 ++++--
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 1 +
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
> index a83abd7..6fddb4f 100644
> --- a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
> +++ b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
> @@ -1,7 +1,9 @@
> Device-Tree bindings for tilcdc DRM driver
>
> Required properties:
> - - compatible: value should be "ti,am33xx-tilcdc".
> + - compatible: value should be one of the following:
> + - "ti,am33xx-tilcdc" for AM335x based boards
> + - "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards
> - interrupts: the interrupt number
> - reg: base address and size of the LCDC device
>
> @@ -51,7 +53,7 @@ Optional nodes:
> Example:
>
> fb: fb at 4830e000 {
> - compatible = "ti,am33xx-tilcdc";
> + compatible = "ti,am33xx-tilcdc", "ti,da850-tilcdc";
> reg = <0x4830e000 0x1000>;
> interrupt-parent = <&intc>;
> interrupts = <36>;
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index a694977..231f2c7 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -723,6 +723,7 @@ static int tilcdc_pdev_remove(struct platform_device *pdev)
>
> static struct of_device_id tilcdc_of_match[] = {
> { .compatible = "ti,am33xx-tilcdc", },
> + { .compatible = "ti,da850-tilcdc", },
> { },
> };
> MODULE_DEVICE_TABLE(of, tilcdc_of_match);
>
^ permalink raw reply
* [PATCH 0/2] ARM: at91: properly handle LPDDR poweroff
From: Alexander Stein @ 2016-10-10 6:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161007163427.11454-1-alexandre.belloni@free-electrons.com>
Hi Alexandre,
On Friday 07 October 2016 18:34:25, Alexandre Belloni wrote:
> Hi,
>
> This patch set improves LPDDR support on SoCs using the Atmel MPDDR
> controller.
>
> LPDDR memoris can only handle up to 400 uncontrolled power offs in their
> life. The proper power off sequence has to be applied before shutting down
> the SoC.
>
> I'm not too happy with the code duplication but this is a design choice
> that has been made before because both shitdown controler are really
^^^^^^^^
I guess you mean shutdown? :) Same for the suject of 2nd patch.
Best regards,
Alexander
^ permalink raw reply
* [PATCH v5 2/5] drm/bridge: Add RGB to VGA bridge support
From: Archit Taneja @ 2016-10-10 5:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161007091444.GO4684@lukather>
On 10/07/2016 02:44 PM, Maxime Ripard wrote:
> On Fri, Oct 07, 2016 at 10:27:31AM +0530, Archit Taneja wrote:
>>
>>
>> On 10/07/2016 02:34 AM, Laurent Pinchart wrote:
>>> Hi Sean,
>>>
>>> On Thursday 06 Oct 2016 15:53:28 Sean Paul wrote:
>>>> On Thu, Oct 6, 2016 at 1:27 PM, Laurent Pinchart wrote:
>>>>> On Thursday 06 Oct 2016 17:09:57 Archit Taneja wrote:
>>>>>> On 10/06/2016 12:51 PM, Maxime Ripard wrote:
>>>>>>> On Mon, Oct 03, 2016 at 04:40:57PM +0530, Archit Taneja wrote:
>>>>>>>> On 09/30/2016 08:07 PM, Maxime Ripard wrote:
>>>>>>>>> Some boards have an entirely passive RGB to VGA bridge, based on
>>>>>>>>> either DACs or resistor ladders.
>>>>>>>>>
>>>>>>>>> Those might or might not have an i2c bus routed to the VGA connector
>>>>>>>>> in order to access the screen EDIDs.
>>>>>>>>>
>>>>>>>>> Add a bridge that doesn't do anything but expose the modes available
>>>>>>>>> on the screen, either based on the EDIDs if available, or based on
>>>>>>>>> the XGA standards.
>>>>>>>>>
>>>>>>>>> Acked-by: Rob Herring <robh@kernel.org>
>>>>>>>>> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>>>>>>>>> ---
>>>>>>>>> .../bindings/display/bridge/rgb-to-vga-bridge.txt | 48 +++++
>>>>>>>>> drivers/gpu/drm/bridge/Kconfig | 7 +
>>>>>>>>> drivers/gpu/drm/bridge/Makefile | 1 +
>>>>>>>>> drivers/gpu/drm/bridge/rgb-to-vga.c | 229 +++++++++++++
>>>>>>>>> 4 files changed, 285 insertions(+)
>>>>>>>>> create mode 100644
>>>>>>>>> Documentation/devicetree/bindings/display/bridge/rgb-to-vga-bridge.tx
>>>>>>>>> t
>>>>>>>>> create mode 100644 drivers/gpu/drm/bridge/rgb-to-vga.c
>>>>>>>>>
>>>>>>>>> diff --git
>>>>>>>>> a/Documentation/devicetree/bindings/display/bridge/rgb-to-vga-bridge.
>>>>>>>>> txt
>>>>>>>>> b/Documentation/devicetree/bindings/display/bridge/rgb-to-vga-bridge.
>>>>>>>>> txt
>>>>>>>>> new file mode 100644
>>>>>>>>> index 000000000000..a8375bc1f9cb
>>>>>>>>> --- /dev/null
>>>>>>>>> +++
>>>>>>>>> b/Documentation/devicetree/bindings/display/bridge/rgb-to-vga-bridge.
>>>>>>>>> tx
>>>>>>>>> t @@ -0,0 +1,48 @@
>>>>>>>>> +Dumb RGB to VGA bridge
>>>>>>>>> +----------------------
>>>>>>>>> +
>>>>>>>>> +This binding is aimed for dumb RGB to VGA bridges that do not
>>>>>>>>> require
>>>>>>>>> +any configuration.
>>>>>>>>> +
>>>>>>>>> +Required properties:
>>>>>>>>> +
>>>>>>>>> +- compatible: Must be "rgb-to-vga-bridge"
>>>>>>>>
>>>>>>>> I'd talked to Laurent on IRC if he's okay with this. And I guess you
>>>>>>>> to had discussed it during XDC too. He's suggested that it'd be better
>>>>>>>> to have the compatible string as "simple-vga-dac".
>>>>>>>
>>>>>>> I just wished this bikeshedding had taken place publicly and be
>>>>>>> actually part of that discussion, but yeah, ok.
>>>>>>
>>>>>> Sorry about that. I'd pinged him for an Ack, the discussion went
>>>>>> more than that :)
>>>>>>
>>>>>>>> Some of the reasons behind having this:
>>>>>>>>
>>>>>>>> - We don't need to specify "rgb" in the compatible string since most
>>>>>>>> simple VGA DACs can only work with an RGB input.
>>>>>>>
>>>>>>> Ok.
>>>>>>>
>>>>>>>> - Also, with "dac" specified in the string, we don't need to
>>>>>>>> specifically mention "bridge" in the string. Also, bridge is a drm
>>>>>>>> specific term.
>>>>>>>>
>>>>>>>> - "simple" is considered because it's an unconfigurable bridge, and it
>>>>>>>> might be misleading for other VGA DACs to not use "vga-dac".
>>>>>>>
>>>>>>> All those "simple" bindings are just the biggest lie we ever
>>>>>>> told. It's simple when you introduce it, and then grows into something
>>>>>>> much more complicated than a non-simple implementation.
>>>>>>
>>>>>> "simple" here is supposed to mean that it's an unconfigurable RGB to
>>>>>> VGA DAC. This isn't supposed to follow the simple-panel model, where
>>>>>> you add the "simple-panel" string in the compatible node, along with
>>>>>> you chip specific compatible string.
>>>>>
>>>>> I agree with Maxime, I don't like the word "simple". My preference would
>>>>> be "vga-dac" for a lack of a better qualifier than "simple" to describe
>>>>> the fact that the device requires no configuration. My only concern with
>>>>> "vga-dac" is that we would restrict usage of that compatible string for a
>>>>> subset of VGA DACs, with more complex devices not being compatible with
>>>>> "vga-dac" even though they are VGA DACs. That's a problem I can live with
>>>>> though.
>>>>
>>>> While we're bikeshedding (feel free to ignore my input on this), I
>>>> think Maxime's initial "dumb" qualifier was better than "simple".
>>>
>>> I think I agree.
>>>
>>>> I think "passive" also gets the point across better than "simple", which
>>>> we've already established as something else in drm.
>>>
>>> To my electrical engineer's ear, passive refers to a component or combination
>>> of components that is not capable of power gain. The resistors ladder VGA DAC
>>> that Maxime is trying to support is a passive system, but the ADV7123 VGA DAC
>>> that equally requires no configuration is an active component.
>>
>> If no one has any more objections within the next day, I'll pull in
>> Maxime's v5 RGB to VGA bridge driver, and change the compatible to
>> "dumb-vga-dac".
>
> That works for me. You'll probably want to update the Kconfig and file
> name to match though.
Queued to drm-misc, with the changes suggested by you and Laurent.
Thanks,
Archit
>
> Maxime
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v3 07/12] scsi/ncr5380: Store IO ports and addresses in host private data
From: Finn Thain @ 2016-10-10 4:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1476051961.git.fthain@telegraphics.com.au>
The various 5380 drivers inconsistently store register pointers
either in the Scsi_Host struct "legacy crap" area or in special,
board-specific members of the NCR5380_hostdata struct. Uniform
use of the latter struct makes for simpler and faster code (see
the following patches) and helps to reduce use of the
NCR5380_implementation_fields macro.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Tested-by: Ondrej Zary <linux@rainbow-software.org>
Tested-by: Michael Schmitz <schmitzmic@gmail.com>
---
drivers/scsi/NCR5380.c | 8 +++---
drivers/scsi/NCR5380.h | 5 ++++
drivers/scsi/arm/cumana_1.c | 60 ++++++++++++++++++++--------------------
drivers/scsi/arm/oak.c | 23 ++++++++--------
drivers/scsi/dmx3191d.c | 14 +++++++---
drivers/scsi/g_NCR5380.c | 67 +++++++++++++++++++++++----------------------
drivers/scsi/g_NCR5380.h | 6 ++--
drivers/scsi/mac_scsi.c | 27 ++++++++++--------
drivers/scsi/sun3_scsi.c | 5 +++-
9 files changed, 118 insertions(+), 97 deletions(-)
diff --git a/drivers/scsi/NCR5380.c b/drivers/scsi/NCR5380.c
index 25ee5be..82fd37d 100644
--- a/drivers/scsi/NCR5380.c
+++ b/drivers/scsi/NCR5380.c
@@ -437,14 +437,14 @@ static void prepare_info(struct Scsi_Host *instance)
struct NCR5380_hostdata *hostdata = shost_priv(instance);
snprintf(hostdata->info, sizeof(hostdata->info),
- "%s, io_port 0x%lx, n_io_port %d, "
- "base 0x%lx, irq %d, "
+ "%s, irq %d, "
+ "io_port 0x%lx, base 0x%lx, "
"can_queue %d, cmd_per_lun %d, "
"sg_tablesize %d, this_id %d, "
"flags { %s%s%s}, "
"options { %s} ",
- instance->hostt->name, instance->io_port, instance->n_io_port,
- instance->base, instance->irq,
+ instance->hostt->name, instance->irq,
+ hostdata->io_port, hostdata->base,
instance->can_queue, instance->cmd_per_lun,
instance->sg_tablesize, instance->this_id,
hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
diff --git a/drivers/scsi/NCR5380.h b/drivers/scsi/NCR5380.h
index ceafa0c..02f20ff 100644
--- a/drivers/scsi/NCR5380.h
+++ b/drivers/scsi/NCR5380.h
@@ -220,6 +220,8 @@
struct NCR5380_hostdata {
NCR5380_implementation_fields; /* Board-specific data */
+ u8 __iomem *io; /* Remapped 5380 address */
+ u8 __iomem *pdma_io; /* Remapped PDMA address */
unsigned long poll_loops; /* Register polling limit */
spinlock_t lock; /* Protects this struct */
struct scsi_cmnd *connected; /* Currently connected cmnd */
@@ -230,6 +232,8 @@ struct NCR5380_hostdata {
int flags; /* Board-specific quirks */
int dma_len; /* Requested length of DMA */
int read_overruns; /* Transfer size reduction for DMA erratum */
+ unsigned long io_port; /* Device IO port */
+ unsigned long base; /* Device base address */
struct list_head unissued; /* Waiting to be issued */
struct scsi_cmnd *selecting; /* Cmnd to be connected */
struct list_head autosense; /* Priority cmnd queue */
@@ -239,6 +243,7 @@ struct NCR5380_hostdata {
unsigned char id_mask; /* 1 << Host ID */
unsigned char id_higher_mask; /* All bits above id_mask */
unsigned char last_message; /* Last Message Out */
+ unsigned long region_size; /* Size of address/port range */
char info[256];
};
diff --git a/drivers/scsi/arm/cumana_1.c b/drivers/scsi/arm/cumana_1.c
index f616756..88db281 100644
--- a/drivers/scsi/arm/cumana_1.c
+++ b/drivers/scsi/arm/cumana_1.c
@@ -27,9 +27,7 @@
#define NCR5380_info cumanascsi_info
#define NCR5380_implementation_fields \
- unsigned ctrl; \
- void __iomem *base; \
- void __iomem *dma
+ unsigned ctrl
#include "../NCR5380.h"
@@ -42,17 +40,18 @@ static inline int cumanascsi_pwrite(struct Scsi_Host *host,
unsigned char *addr, int len)
{
unsigned long *laddr;
- void __iomem *dma = priv(host)->dma + 0x2000;
+ u8 __iomem *base = priv(host)->io;
+ u8 __iomem *dma = priv(host)->pdma_io + 0x2000;
if(!len) return 0;
- writeb(0x02, priv(host)->base + CTRL);
+ writeb(0x02, base + CTRL);
laddr = (unsigned long *)addr;
while(len >= 32)
{
unsigned int status;
unsigned long v;
- status = readb(priv(host)->base + STAT);
+ status = readb(base + STAT);
if(status & 0x80)
goto end;
if(!(status & 0x40))
@@ -71,12 +70,12 @@ static inline int cumanascsi_pwrite(struct Scsi_Host *host,
}
addr = (unsigned char *)laddr;
- writeb(0x12, priv(host)->base + CTRL);
+ writeb(0x12, base + CTRL);
while(len > 0)
{
unsigned int status;
- status = readb(priv(host)->base + STAT);
+ status = readb(base + STAT);
if(status & 0x80)
goto end;
if(status & 0x40)
@@ -86,7 +85,7 @@ static inline int cumanascsi_pwrite(struct Scsi_Host *host,
break;
}
- status = readb(priv(host)->base + STAT);
+ status = readb(base + STAT);
if(status & 0x80)
goto end;
if(status & 0x40)
@@ -97,7 +96,7 @@ static inline int cumanascsi_pwrite(struct Scsi_Host *host,
}
}
end:
- writeb(priv(host)->ctrl | 0x40, priv(host)->base + CTRL);
+ writeb(priv(host)->ctrl | 0x40, base + CTRL);
if (len)
return -1;
@@ -108,16 +107,17 @@ static inline int cumanascsi_pread(struct Scsi_Host *host,
unsigned char *addr, int len)
{
unsigned long *laddr;
- void __iomem *dma = priv(host)->dma + 0x2000;
+ u8 __iomem *base = priv(host)->io;
+ u8 __iomem *dma = priv(host)->pdma_io + 0x2000;
if(!len) return 0;
- writeb(0x00, priv(host)->base + CTRL);
+ writeb(0x00, base + CTRL);
laddr = (unsigned long *)addr;
while(len >= 32)
{
unsigned int status;
- status = readb(priv(host)->base + STAT);
+ status = readb(base + STAT);
if(status & 0x80)
goto end;
if(!(status & 0x40))
@@ -136,12 +136,12 @@ static inline int cumanascsi_pread(struct Scsi_Host *host,
}
addr = (unsigned char *)laddr;
- writeb(0x10, priv(host)->base + CTRL);
+ writeb(0x10, base + CTRL);
while(len > 0)
{
unsigned int status;
- status = readb(priv(host)->base + STAT);
+ status = readb(base + STAT);
if(status & 0x80)
goto end;
if(status & 0x40)
@@ -151,7 +151,7 @@ static inline int cumanascsi_pread(struct Scsi_Host *host,
break;
}
- status = readb(priv(host)->base + STAT);
+ status = readb(base + STAT);
if(status & 0x80)
goto end;
if(status & 0x40)
@@ -162,7 +162,7 @@ static inline int cumanascsi_pread(struct Scsi_Host *host,
}
}
end:
- writeb(priv(host)->ctrl | 0x40, priv(host)->base + CTRL);
+ writeb(priv(host)->ctrl | 0x40, base + CTRL);
if (len)
return -1;
@@ -171,7 +171,7 @@ end:
static unsigned char cumanascsi_read(struct Scsi_Host *host, unsigned int reg)
{
- void __iomem *base = priv(host)->base;
+ u8 __iomem *base = priv(host)->io;
unsigned char val;
writeb(0, base + CTRL);
@@ -186,7 +186,7 @@ static unsigned char cumanascsi_read(struct Scsi_Host *host, unsigned int reg)
static void cumanascsi_write(struct Scsi_Host *host, unsigned int reg, unsigned int value)
{
- void __iomem *base = priv(host)->base;
+ u8 __iomem *base = priv(host)->io;
writeb(0, base + CTRL);
@@ -231,11 +231,11 @@ static int cumanascsi1_probe(struct expansion_card *ec,
goto out_release;
}
- priv(host)->base = ioremap(ecard_resource_start(ec, ECARD_RES_IOCSLOW),
- ecard_resource_len(ec, ECARD_RES_IOCSLOW));
- priv(host)->dma = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC),
- ecard_resource_len(ec, ECARD_RES_MEMC));
- if (!priv(host)->base || !priv(host)->dma) {
+ priv(host)->io = ioremap(ecard_resource_start(ec, ECARD_RES_IOCSLOW),
+ ecard_resource_len(ec, ECARD_RES_IOCSLOW));
+ priv(host)->pdma_io = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC),
+ ecard_resource_len(ec, ECARD_RES_MEMC));
+ if (!priv(host)->io || !priv(host)->pdma_io) {
ret = -ENOMEM;
goto out_unmap;
}
@@ -249,7 +249,7 @@ static int cumanascsi1_probe(struct expansion_card *ec,
NCR5380_maybe_reset_bus(host);
priv(host)->ctrl = 0;
- writeb(0, priv(host)->base + CTRL);
+ writeb(0, priv(host)->io + CTRL);
ret = request_irq(host->irq, cumanascsi_intr, 0,
"CumanaSCSI-1", host);
@@ -271,8 +271,8 @@ static int cumanascsi1_probe(struct expansion_card *ec,
out_exit:
NCR5380_exit(host);
out_unmap:
- iounmap(priv(host)->base);
- iounmap(priv(host)->dma);
+ iounmap(priv(host)->io);
+ iounmap(priv(host)->pdma_io);
scsi_host_put(host);
out_release:
ecard_release_resources(ec);
@@ -283,15 +283,17 @@ static int cumanascsi1_probe(struct expansion_card *ec,
static void cumanascsi1_remove(struct expansion_card *ec)
{
struct Scsi_Host *host = ecard_get_drvdata(ec);
+ void __iomem *base = priv(host)->io;
+ void __iomem *dma = priv(host)->pdma_io;
ecard_set_drvdata(ec, NULL);
scsi_remove_host(host);
free_irq(host->irq, host);
NCR5380_exit(host);
- iounmap(priv(host)->base);
- iounmap(priv(host)->dma);
scsi_host_put(host);
+ iounmap(base);
+ iounmap(dma);
ecard_release_resources(ec);
}
diff --git a/drivers/scsi/arm/oak.c b/drivers/scsi/arm/oak.c
index a396024..1c4a44a 100644
--- a/drivers/scsi/arm/oak.c
+++ b/drivers/scsi/arm/oak.c
@@ -17,9 +17,9 @@
#define priv(host) ((struct NCR5380_hostdata *)(host)->hostdata)
#define NCR5380_read(reg) \
- readb(priv(instance)->base + ((reg) << 2))
+ readb(priv(instance)->io + ((reg) << 2))
#define NCR5380_write(reg, value) \
- writeb(value, priv(instance)->base + ((reg) << 2))
+ writeb(value, priv(instance)->io + ((reg) << 2))
#define NCR5380_dma_xfer_len(instance, cmd, phase) (0)
#define NCR5380_dma_recv_setup oakscsi_pread
@@ -29,8 +29,7 @@
#define NCR5380_queue_command oakscsi_queue_command
#define NCR5380_info oakscsi_info
-#define NCR5380_implementation_fields \
- void __iomem *base
+#define NCR5380_implementation_fields /* none */
#include "../NCR5380.h"
@@ -43,7 +42,7 @@
static inline int oakscsi_pwrite(struct Scsi_Host *instance,
unsigned char *addr, int len)
{
- void __iomem *base = priv(instance)->base;
+ u8 __iomem *base = priv(instance)->io;
printk("writing %p len %d\n",addr, len);
@@ -58,7 +57,7 @@ printk("writing %p len %d\n",addr, len);
static inline int oakscsi_pread(struct Scsi_Host *instance,
unsigned char *addr, int len)
{
- void __iomem *base = priv(instance)->base;
+ u8 __iomem *base = priv(instance)->io;
printk("reading %p len %d\n", addr, len);
while(len > 0)
{
@@ -133,15 +132,14 @@ static int oakscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
goto release;
}
- priv(host)->base = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC),
- ecard_resource_len(ec, ECARD_RES_MEMC));
- if (!priv(host)->base) {
+ priv(host)->io = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC),
+ ecard_resource_len(ec, ECARD_RES_MEMC));
+ if (!priv(host)->io) {
ret = -ENOMEM;
goto unreg;
}
host->irq = NO_IRQ;
- host->n_io_port = 255;
ret = NCR5380_init(host, FLAG_DMA_FIXUP | FLAG_LATE_DMA_SETUP);
if (ret)
@@ -159,7 +157,7 @@ static int oakscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
out_exit:
NCR5380_exit(host);
out_unmap:
- iounmap(priv(host)->base);
+ iounmap(priv(host)->io);
unreg:
scsi_host_put(host);
release:
@@ -171,13 +169,14 @@ static int oakscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
static void oakscsi_remove(struct expansion_card *ec)
{
struct Scsi_Host *host = ecard_get_drvdata(ec);
+ void __iomem *base = priv(host)->io;
ecard_set_drvdata(ec, NULL);
scsi_remove_host(host);
NCR5380_exit(host);
- iounmap(priv(host)->base);
scsi_host_put(host);
+ iounmap(base);
ecard_release_resources(ec);
}
diff --git a/drivers/scsi/dmx3191d.c b/drivers/scsi/dmx3191d.c
index 9b5a457..3b6df90 100644
--- a/drivers/scsi/dmx3191d.c
+++ b/drivers/scsi/dmx3191d.c
@@ -34,8 +34,10 @@
* Definitions for the generic 5380 driver.
*/
-#define NCR5380_read(reg) inb(instance->io_port + reg)
-#define NCR5380_write(reg, value) outb(value, instance->io_port + reg)
+#define priv(instance) ((struct NCR5380_hostdata *)shost_priv(instance))
+
+#define NCR5380_read(reg) inb(priv(instance)->base + (reg))
+#define NCR5380_write(reg, value) outb(value, priv(instance)->base + (reg))
#define NCR5380_dma_xfer_len(instance, cmd, phase) (0)
#define NCR5380_dma_recv_setup(instance, dst, len) (0)
@@ -71,6 +73,7 @@ static int dmx3191d_probe_one(struct pci_dev *pdev,
const struct pci_device_id *id)
{
struct Scsi_Host *shost;
+ struct NCR5380_hostdata *hostdata;
unsigned long io;
int error = -ENODEV;
@@ -88,7 +91,9 @@ static int dmx3191d_probe_one(struct pci_dev *pdev,
sizeof(struct NCR5380_hostdata));
if (!shost)
goto out_release_region;
- shost->io_port = io;
+
+ hostdata = shost_priv(shost);
+ hostdata->base = io;
/* This card does not seem to raise an interrupt on pdev->irq.
* Steam-powered SCSI controllers run without an IRQ anyway.
@@ -125,7 +130,8 @@ out_host_put:
static void dmx3191d_remove_one(struct pci_dev *pdev)
{
struct Scsi_Host *shost = pci_get_drvdata(pdev);
- unsigned long io = shost->io_port;
+ struct NCR5380_hostdata *hostdata = shost_priv(shost);
+ unsigned long io = hostdata->base;
scsi_remove_host(shost);
diff --git a/drivers/scsi/g_NCR5380.c b/drivers/scsi/g_NCR5380.c
index 4d7a9de..98aef0e 100644
--- a/drivers/scsi/g_NCR5380.c
+++ b/drivers/scsi/g_NCR5380.c
@@ -115,7 +115,7 @@ static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
unsigned long region_size;
struct Scsi_Host *instance;
struct NCR5380_hostdata *hostdata;
- void __iomem *iomem;
+ u8 __iomem *iomem;
switch (board) {
case BOARD_NCR5380:
@@ -201,11 +201,11 @@ static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
}
hostdata = shost_priv(instance);
- hostdata->iomem = iomem;
+ hostdata->io = iomem;
+ hostdata->region_size = region_size;
if (is_pmio) {
- instance->io_port = base;
- instance->n_io_port = region_size;
+ hostdata->io_port = base;
hostdata->io_width = 1; /* 8-bit PDMA by default */
hostdata->offset = 0;
@@ -215,7 +215,7 @@ static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
*/
switch (board) {
case BOARD_NCR53C400:
- instance->io_port += 8;
+ hostdata->io_port += 8;
hostdata->c400_ctl_status = 0;
hostdata->c400_blk_cnt = 1;
hostdata->c400_host_buf = 4;
@@ -231,8 +231,7 @@ static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
break;
}
} else {
- instance->base = base;
- hostdata->iomem_size = region_size;
+ hostdata->base = base;
hostdata->offset = NCR53C400_mem_base;
switch (board) {
case BOARD_NCR53C400:
@@ -314,17 +313,21 @@ out_release:
static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
{
struct NCR5380_hostdata *hostdata = shost_priv(instance);
+ void __iomem *iomem = hostdata->io;
+ unsigned long io_port = hostdata->io_port;
+ unsigned long base = hostdata->base;
+ unsigned long region_size = hostdata->region_size;
scsi_remove_host(instance);
if (instance->irq != NO_IRQ)
free_irq(instance->irq, instance);
NCR5380_exit(instance);
- iounmap(hostdata->iomem);
- if (instance->io_port)
- release_region(instance->io_port, instance->n_io_port);
- else
- release_mem_region(instance->base, hostdata->iomem_size);
scsi_host_put(instance);
+ iounmap(iomem);
+ if (io_port)
+ release_region(io_port, region_size);
+ else
+ release_mem_region(base, region_size);
}
/**
@@ -356,15 +359,15 @@ static inline int generic_NCR5380_pread(struct Scsi_Host *instance,
while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
; /* FIXME - no timeout */
- if (instance->io_port && hostdata->io_width == 2)
- insw(instance->io_port + hostdata->c400_host_buf,
+ if (hostdata->io_port && hostdata->io_width == 2)
+ insw(hostdata->io_port + hostdata->c400_host_buf,
dst + start, 64);
- else if (instance->io_port)
- insb(instance->io_port + hostdata->c400_host_buf,
+ else if (hostdata->io_port)
+ insb(hostdata->io_port + hostdata->c400_host_buf,
dst + start, 128);
else
memcpy_fromio(dst + start,
- hostdata->iomem + NCR53C400_host_buffer, 128);
+ hostdata->io + NCR53C400_host_buffer, 128);
start += 128;
blocks--;
@@ -374,15 +377,15 @@ static inline int generic_NCR5380_pread(struct Scsi_Host *instance,
while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
; /* FIXME - no timeout */
- if (instance->io_port && hostdata->io_width == 2)
- insw(instance->io_port + hostdata->c400_host_buf,
+ if (hostdata->io_port && hostdata->io_width == 2)
+ insw(hostdata->io_port + hostdata->c400_host_buf,
dst + start, 64);
- else if (instance->io_port)
- insb(instance->io_port + hostdata->c400_host_buf,
+ else if (hostdata->io_port)
+ insb(hostdata->io_port + hostdata->c400_host_buf,
dst + start, 128);
else
memcpy_fromio(dst + start,
- hostdata->iomem + NCR53C400_host_buffer, 128);
+ hostdata->io + NCR53C400_host_buffer, 128);
start += 128;
blocks--;
@@ -431,14 +434,14 @@ static inline int generic_NCR5380_pwrite(struct Scsi_Host *instance,
while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
; // FIXME - timeout
- if (instance->io_port && hostdata->io_width == 2)
- outsw(instance->io_port + hostdata->c400_host_buf,
+ if (hostdata->io_port && hostdata->io_width == 2)
+ outsw(hostdata->io_port + hostdata->c400_host_buf,
src + start, 64);
- else if (instance->io_port)
- outsb(instance->io_port + hostdata->c400_host_buf,
+ else if (hostdata->io_port)
+ outsb(hostdata->io_port + hostdata->c400_host_buf,
src + start, 128);
else
- memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
+ memcpy_toio(hostdata->io + NCR53C400_host_buffer,
src + start, 128);
start += 128;
@@ -448,14 +451,14 @@ static inline int generic_NCR5380_pwrite(struct Scsi_Host *instance,
while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
; // FIXME - no timeout
- if (instance->io_port && hostdata->io_width == 2)
- outsw(instance->io_port + hostdata->c400_host_buf,
+ if (hostdata->io_port && hostdata->io_width == 2)
+ outsw(hostdata->io_port + hostdata->c400_host_buf,
src + start, 64);
- else if (instance->io_port)
- outsb(instance->io_port + hostdata->c400_host_buf,
+ else if (hostdata->io_port)
+ outsb(hostdata->io_port + hostdata->c400_host_buf,
src + start, 128);
else
- memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
+ memcpy_toio(hostdata->io + NCR53C400_host_buffer,
src + start, 128);
start += 128;
diff --git a/drivers/scsi/g_NCR5380.h b/drivers/scsi/g_NCR5380.h
index 2b777824..ec4d70b 100644
--- a/drivers/scsi/g_NCR5380.h
+++ b/drivers/scsi/g_NCR5380.h
@@ -17,18 +17,16 @@
#define DRV_MODULE_NAME "g_NCR5380"
#define NCR5380_read(reg) \
- ioread8(((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
+ ioread8(((struct NCR5380_hostdata *)shost_priv(instance))->io + \
((struct NCR5380_hostdata *)shost_priv(instance))->offset + \
(reg))
#define NCR5380_write(reg, value) \
- iowrite8(value, ((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
+ iowrite8(value, ((struct NCR5380_hostdata *)shost_priv(instance))->io + \
((struct NCR5380_hostdata *)shost_priv(instance))->offset + \
(reg))
#define NCR5380_implementation_fields \
int offset; \
- void __iomem *iomem; \
- resource_size_t iomem_size; \
int c400_ctl_status; \
int c400_blk_cnt; \
int c400_host_buf; \
diff --git a/drivers/scsi/mac_scsi.c b/drivers/scsi/mac_scsi.c
index a590089..80e10d9 100644
--- a/drivers/scsi/mac_scsi.c
+++ b/drivers/scsi/mac_scsi.c
@@ -28,8 +28,7 @@
/* Definitions for the core NCR5380 driver. */
-#define NCR5380_implementation_fields unsigned char *pdma_base; \
- int pdma_residual
+#define NCR5380_implementation_fields int pdma_residual
#define NCR5380_read(reg) macscsi_read(instance, reg)
#define NCR5380_write(reg, value) macscsi_write(instance, reg, value)
@@ -67,12 +66,16 @@ module_param(setup_toshiba_delay, int, 0);
static inline char macscsi_read(struct Scsi_Host *instance, int reg)
{
- return in_8(instance->base + (reg << 4));
+ struct NCR5380_hostdata *hostdata = shost_priv(instance);
+
+ return in_8(hostdata->io + (reg << 4));
}
static inline void macscsi_write(struct Scsi_Host *instance, int reg, int value)
{
- out_8(instance->base + (reg << 4), value);
+ struct NCR5380_hostdata *hostdata = shost_priv(instance);
+
+ out_8(hostdata->io + (reg << 4), value);
}
#ifndef MODULE
@@ -171,7 +174,7 @@ static int macscsi_pread(struct Scsi_Host *instance,
unsigned char *dst, int len)
{
struct NCR5380_hostdata *hostdata = shost_priv(instance);
- unsigned char *s = hostdata->pdma_base + (INPUT_DATA_REG << 4);
+ unsigned char *s = hostdata->pdma_io + (INPUT_DATA_REG << 4);
unsigned char *d = dst;
int n = len;
int transferred;
@@ -275,7 +278,7 @@ static int macscsi_pwrite(struct Scsi_Host *instance,
{
struct NCR5380_hostdata *hostdata = shost_priv(instance);
unsigned char *s = src;
- unsigned char *d = hostdata->pdma_base + (OUTPUT_DATA_REG << 4);
+ unsigned char *d = hostdata->pdma_io + (OUTPUT_DATA_REG << 4);
int n = len;
int transferred;
@@ -356,6 +359,7 @@ static struct scsi_host_template mac_scsi_template = {
static int __init mac_scsi_probe(struct platform_device *pdev)
{
struct Scsi_Host *instance;
+ struct NCR5380_hostdata *hostdata;
int error;
int host_flags = 0;
struct resource *irq, *pio_mem, *pdma_mem = NULL;
@@ -388,17 +392,18 @@ static int __init mac_scsi_probe(struct platform_device *pdev)
if (!instance)
return -ENOMEM;
- instance->base = pio_mem->start;
if (irq)
instance->irq = irq->start;
else
instance->irq = NO_IRQ;
- if (pdma_mem && setup_use_pdma) {
- struct NCR5380_hostdata *hostdata = shost_priv(instance);
+ hostdata = shost_priv(instance);
+ hostdata->base = pio_mem->start;
+ hostdata->io = (void *)pio_mem->start;
- hostdata->pdma_base = (unsigned char *)pdma_mem->start;
- } else
+ if (pdma_mem && setup_use_pdma)
+ hostdata->pdma_io = (void *)pdma_mem->start;
+ else
host_flags |= FLAG_NO_PSEUDO_DMA;
host_flags |= setup_toshiba_delay > 0 ? FLAG_TOSHIBA_DELAY : 0;
diff --git a/drivers/scsi/sun3_scsi.c b/drivers/scsi/sun3_scsi.c
index 3c4c070..efee144 100644
--- a/drivers/scsi/sun3_scsi.c
+++ b/drivers/scsi/sun3_scsi.c
@@ -428,6 +428,7 @@ static struct scsi_host_template sun3_scsi_template = {
static int __init sun3_scsi_probe(struct platform_device *pdev)
{
struct Scsi_Host *instance;
+ struct NCR5380_hostdata *hostdata;
int error;
struct resource *irq, *mem;
unsigned char *ioaddr;
@@ -502,9 +503,11 @@ static int __init sun3_scsi_probe(struct platform_device *pdev)
goto fail_alloc;
}
- instance->io_port = (unsigned long)ioaddr;
instance->irq = irq->start;
+ hostdata = shost_priv(instance);
+ hostdata->base = (unsigned long)ioaddr;
+
error = NCR5380_init(instance, host_flags);
if (error)
goto fail_init;
--
2.7.3
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