* [PATCH RESEND] ARM: dts: keystone-k2*: Increase SPI Flash partition size for U-Boot
From: Vignesh R @ 2016-10-10 14:11 UTC (permalink / raw)
To: linux-arm-kernel
U-Boot SPI Boot image is now more than 512KB for Keystone2 devices and
cannot fit into existing partition. So, increase the SPI Flash partition
for U-Boot to 1MB for all Keystone2 devices.
Signed-off-by: Vignesh R <vigneshr@ti.com>
---
This was submitted to v4.9 merge window but was never picked up:
https://patchwork.kernel.org/patch/9135023/
arch/arm/boot/dts/keystone-k2e-evm.dts | 4 ++--
arch/arm/boot/dts/keystone-k2hk-evm.dts | 4 ++--
arch/arm/boot/dts/keystone-k2l-evm.dts | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-k2e-evm.dts b/arch/arm/boot/dts/keystone-k2e-evm.dts
index ae1ebe7ee021..08ca9dc6ef7c 100644
--- a/arch/arm/boot/dts/keystone-k2e-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2e-evm.dts
@@ -137,13 +137,13 @@
partition at 0 {
label = "u-boot-spl";
- reg = <0x0 0x80000>;
+ reg = <0x0 0x100000>;
read-only;
};
partition at 1 {
label = "misc";
- reg = <0x80000 0xf80000>;
+ reg = <0x100000 0xf00000>;
};
};
};
diff --git a/arch/arm/boot/dts/keystone-k2hk-evm.dts b/arch/arm/boot/dts/keystone-k2hk-evm.dts
index 2156ff92d08f..369e1245f1ba 100644
--- a/arch/arm/boot/dts/keystone-k2hk-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2hk-evm.dts
@@ -161,13 +161,13 @@
partition at 0 {
label = "u-boot-spl";
- reg = <0x0 0x80000>;
+ reg = <0x0 0x100000>;
read-only;
};
partition at 1 {
label = "misc";
- reg = <0x80000 0xf80000>;
+ reg = <0x100000 0xf00000>;
};
};
};
diff --git a/arch/arm/boot/dts/keystone-k2l-evm.dts b/arch/arm/boot/dts/keystone-k2l-evm.dts
index 056b42f99d7a..63ae65987ca5 100644
--- a/arch/arm/boot/dts/keystone-k2l-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2l-evm.dts
@@ -110,13 +110,13 @@
partition at 0 {
label = "u-boot-spl";
- reg = <0x0 0x80000>;
+ reg = <0x0 0x100000>;
read-only;
};
partition at 1 {
label = "misc";
- reg = <0x80000 0xf80000>;
+ reg = <0x100000 0xf00000>;
};
};
};
--
2.10.1
^ permalink raw reply related
* [PATCH v2 1/2] clk: imx: fix integer overflow in AV PLL round rate
From: Fabio Estevam @ 2016-10-10 14:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4e8696869cc82443825a590966bbd3a265befdfa.1476092427.git.emil@limesaudio.com>
On Mon, Oct 10, 2016 at 7:03 AM, Emil Lundmark <emil@limesaudio.com> wrote:
> Since 'parent_rate * mfn' may overflow 32 bits, the result should be
> stored using 64 bits.
It would be nice to add the text you put in the cover letter where you
explain the PLL4 clock discrepancy here in the commit log.
>
> Fixes: ba7f4f557eb6 ("clk: imx: correct AV PLL rate formula")
Would be nice to Cc the author of this commit (Anson Huang). Added on Cc.
Another hint: ./scripts/get_maintainer.pl drivers/clk/imx/clk-pllv3.c
gives you some suggestions on people and lists to add to Cc.
^ permalink raw reply
* MAINTAINERS entry for ARM/CLKDEV SUPPORT
From: Dan Carpenter @ 2016-10-10 14:08 UTC (permalink / raw)
To: linux-arm-kernel
Hello Stephen Boyd,
The MAINTAINERS entry looks like this:
ARM/CLKDEV SUPPORT
M: Russell King <linux@armlinux.org.uk>
L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/include/asm/clkdev.h
F: drivers/clk/clkdev.c
We removed arch/arm/include/asm/clkdev.h in 34d2f4d3a4d6a6b ('ARM: Use
generic clkdev.h header'). Do you still need to be CC'd on the clkdev.c
changes?
regards,
dan carpenter
^ permalink raw reply
* [PATCH v2 1/2] clk: imx: fix integer overflow in AV PLL round rate
From: Uwe Kleine-König @ 2016-10-10 13:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4e8696869cc82443825a590966bbd3a265befdfa.1476092427.git.emil@limesaudio.com>
On Mon, Oct 10, 2016 at 12:03:05PM +0200, Emil Lundmark wrote:
> Since 'parent_rate * mfn' may overflow 32 bits, the result should be
> stored using 64 bits.
>
> Fixes: ba7f4f557eb6 ("clk: imx: correct AV PLL rate formula")
> Signed-off-by: Emil Lundmark <emil@limesaudio.com>
> ---
> drivers/clk/imx/clk-pllv3.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
> index 19f9b622981a..bc7f163ea13c 100644
> --- a/drivers/clk/imx/clk-pllv3.c
> +++ b/drivers/clk/imx/clk-pllv3.c
> @@ -247,7 +247,11 @@ static long clk_pllv3_av_round_rate(struct clk_hw *hw, unsigned long rate,
> do_div(temp64, parent_rate);
> mfn = temp64;
>
> - return parent_rate * div + parent_rate * mfn / mfd;
> + temp64 = (u64)parent_rate;
> + temp64 *= mfn;
> + do_div(temp64, mfd);
If you change parent_rate from unsigned long to u64 this simplifies to
temp64 = parent_rate * mfn
do_div(temp64, mfd);
> +
> + return parent_rate * div + (u32)temp64;
When thinking about overflow problems: Should this fail somehow if
temp64 != (u32)temp64?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH v2 1/5] clk: add support for runtime pm
From: Ulf Hansson @ 2016-10-10 13:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <86cd1c31-6265-7493-fe6d-9a64fc34cd65@samsung.com>
[...]
>>> @@ -157,11 +181,17 @@ static bool clk_core_is_prepared(struct clk_core
>>> *core)
>>> if (!core->ops->is_prepared)
>>> return core->prepare_count;
>>>
>>> - return core->ops->is_prepared(core->hw);
>>> + clk_pm_runtime_get(core);
>>
>> I guess you should assign status to the return code, and check it.
>
>
> Okay. I assume that in case of any failure from runtime pm, the function
> should return false?
I think so, yes.
>
>
[...]
>>> static void clk_disable_unused_subtree(struct clk_core *core)
>>> @@ -768,6 +834,9 @@ static void clk_disable_unused_subtree(struct
>>> clk_core *core)
>>> if (core->flags & CLK_OPS_PARENT_ENABLE)
>>> clk_core_prepare_enable(core->parent);
>>>
>>> + if (clk_pm_runtime_get(core) != 0)
>>
>> Is there any reason to why you haven't moved this further down in this
>> function, like just before calling clk_core_is_enabled()?
>
>
> Yes, clk_enable_lock() takes a spinlock, so I cannot call pm_runtime_get
> after it.
Of course, you are right!
>
>
>>
>> You may also simplify this:
>> if (clk_pm_runtime_get(core))
>>
>>> + return;
>>> +
>>
>> You need to restore the call made to clk_core_prepare_enable()
>> earlier, so please update the error handling to cope with this.
>>
[...]
>>> @@ -2546,6 +2631,8 @@ struct clk *clk_register(struct device *dev, struct
>>> clk_hw *hw)
>>> goto fail_name;
>>> }
>>> core->ops = hw->init->ops;
>>> + if (dev && (hw->init->flags & CLK_RUNTIME_PM))
>>> + core->dev = dev;
>>
>> I guess you need this to play safe, although I am really wondering if
>> we should try without.
>>
>> Not that many clocks are currently being registered with a valid
>> struct device pointer. For the other cases why not try to use runtime
>> PM as per default?
>
>
> I've that tried initially, but it causes failure for all the clock
> controllers, which don't enable runtime pm. One of such case is max77686
> PMIC, which provides 3 clocks. Maybe a negative flag (CLK_NO_RUNTIME_PM)
> will be a better solution, so by default the runtime pm calls will be
> enabled for every driver providing struct device?
I assume that's because the runtime PM errors in clk_pm_runtime_get()
and friends, are being propagated to the callers? Especially because
the runtime PM core returns error codes, in cases when runtime PM
hasn't been enabled for the device.
>
>> Moreover we anyway rely on the clock provider to enable runtime PM for
>> the clock device, and when that isn't the case the runtime PM
>> deployment in the core should still be safe, right!?
>
>
> I don't get the above comment. Do you want to check if runtime pm has
> been enabled during clock registration?
Yes, something like that. Apologize, I was clearly being too vague.
My point is, we don't need to invent a specific clock provider flag
for this. Instead the clock core could just at clock registration
check if runtime PM is enabled for the device (pm_runtime_enabled()),.
and from that assign an internal clock core flag to keep track of
whether runtime PM should be managed or not.
>
>>> if (dev && dev->driver)
>>> core->owner = dev->driver->owner;
>>> core->hw = hw;
>>> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
>>> index a39c0c530778..8a131eb71fdf 100644
>>> --- a/include/linux/clk-provider.h
>>> +++ b/include/linux/clk-provider.h
>>> @@ -35,6 +35,7 @@
>>> #define CLK_IS_CRITICAL BIT(11) /* do not gate, ever */
>>> /* parents need enable during gate/ungate, set rate and re-parent */
>>> #define CLK_OPS_PARENT_ENABLE BIT(12)
>>> +#define CLK_RUNTIME_PM BIT(13)
>>>
>>> struct clk;
>>> struct clk_hw;
>>> --
>>> 1.9.1
>>>
>>
>
> Best regards
> --
> Marek Szyprowski, PhD
> Samsung R&D Institute Poland
>
Kind regards
Uffe
^ permalink raw reply
* [PATCH] ARM: dts: imx6sx: Fix LCDIF interrupt type
From: Lucas Stach @ 2016-10-10 13:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161002164435.5812-1-marex@denx.de>
Am Sonntag, den 02.10.2016, 18:44 +0200 schrieb Marek Vasut:
> The LCDIF interrupt should be triggered by the rising edge of the
> IRQ line because we only want the interrupt to trigger once per each
> frame. It seems the LCDIF IRQ line cannot be explicitly de-asserted
> by software, so the previous behavior before this patch, where the
> interrupt was triggered by level-high status of the IRQ line, caused
> the interrupt to fire again immediatelly after it was handled, which
> caused the system to lock up due to the high rate of interrupts.
>
If there is no way to ack the IRQ how is the line going low again? Some
hardware state machine?
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Shawn Guo <shawnguo@kernel.org>
> ---
> arch/arm/boot/dts/imx6sx.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
> index 1a473e8..9526c38 100644
> --- a/arch/arm/boot/dts/imx6sx.dtsi
> +++ b/arch/arm/boot/dts/imx6sx.dtsi
> @@ -1143,7 +1143,7 @@
> lcdif1: lcdif at 02220000 {
> compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
> reg = <0x02220000 0x4000>;
> - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 5 IRQ_TYPE_EDGE_RISING>;
> clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>,
> <&clks IMX6SX_CLK_LCDIF_APB>,
> <&clks IMX6SX_CLK_DISPLAY_AXI>;
> @@ -1154,7 +1154,7 @@
> lcdif2: lcdif at 02224000 {
> compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
> reg = <0x02224000 0x4000>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>;
> clocks = <&clks IMX6SX_CLK_LCDIF2_PIX>,
> <&clks IMX6SX_CLK_LCDIF_APB>,
> <&clks IMX6SX_CLK_DISPLAY_AXI>;
^ permalink raw reply
* [PATCH v3 1/4] net: phy: dp83867: Add documentation for optional impedance control
From: Rob Herring @ 2016-10-10 13:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161006051355.15947-2-mugunthanvnm@ti.com>
On Thu, Oct 06, 2016 at 10:43:52AM +0530, Mugunthan V N wrote:
> Add documention of ti,impedance-control which can be used to
Needs updating.
> correct MAC impedance mismatch using phy extended registers.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
> Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt
> index 5d21141..85bf945 100644
> --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt
> +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt
> @@ -9,6 +9,18 @@ Required properties:
> - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
> for applicable values
>
> +Optional property:
> + - ti,min-output-impedance - MAC Interface Impedance control to set
> + the programmable output impedance to
> + minimum value (35 ohms).
> + - ti,max-output-impedance - MAC Interface Impedance control to set
> + the programmable output impedance to
> + maximum value (70 ohms).
Define what are valid range of values for these.
> +
> +Note: ti,min-output-impedance and ti,max-output-impedance are mutually
> + exclusive. When both properties are present ti,max-output-impedance
> + takes precedence.
> +
> Default child nodes are standard Ethernet PHY device
> nodes as described in Documentation/devicetree/bindings/net/phy.txt
>
> --
> 2.10.0.372.g6fe1b14
>
^ permalink raw reply
* [PATCH 2/3] dt-bindings: mtd: add DT binding for s3c2410 flash controller
From: Rob Herring @ 2016-10-10 13:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475711217-974-3-git-send-email-sergio.prado@e-labworks.com>
On Wed, Oct 05, 2016 at 08:46:56PM -0300, Sergio Prado wrote:
> Adds the device tree bindings description for Samsung S3C2410 and
> compatible NAND flash controller.
>
> Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
> ---
> .../devicetree/bindings/mtd/samsung-s3c2410.txt | 57 ++++++++++++++++++++++
> 1 file changed, 57 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v2 2/4] power: add axp20x-battery driver
From: Maxime Ripard @ 2016-10-10 13:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161010125726.GJ3462@lukather>
Adding the real Quentin address
On Mon, Oct 10, 2016 at 02:57:26PM +0200, Maxime Ripard wrote:
> Hi Icenowy,
>
> On Sun, Oct 09, 2016 at 02:27:12PM +0800, Icenowy Zheng wrote:
> > + case POWER_SUPPLY_PROP_CURRENT_NOW:
> > + ret = regmap_read(power->regmap, AXP20X_BATT_DISCHRG_I_H, &dh);
> > + if (ret)
> > + return ret;
> > + ret = regmap_read(power->regmap, AXP20X_BATT_DISCHRG_I_L, &dl);
> > + if (ret)
> > + return ret;
> > + /* it's a 12 bit integer, high 8-bit is stored in dh */
> > + val->intval = dh << 4 | dl >> 4;
> > + break;
> > + case POWER_SUPPLY_PROP_VOLTAGE_NOW:
> > + ret = regmap_read(power->regmap, AXP20X_BATT_V_H, &dh);
> > + if (ret)
> > + return ret;
> > + ret = regmap_read(power->regmap, AXP20X_BATT_V_L, &dl);
> > + if (ret)
> > + return ret;
> > + /* it's a 12 bit integer, high 8-bit is stored in dh */
> > + val->intval = dh << 4 | dl >> 4;
> > + /* The formula below is from axp22_vbat_to_mV function
> > + * of Allwinner 3.4 kernel.
> > + */
> > + val->intval = val->intval * 1100 / 1000;
> > + break;
>
> I really feel that this should be implemented through a IIO driver
> (like the AXP288). This is especially true for the AXP209 and its
> multiple GPIOs that can be muxed to a general purpose ADC, but it's
> also true for the AXP221 / 223 TS pin that can also be used as an ADC.
>
> Quentin has been working on this lately for the AXP209, feel free to
> sync with him to support the AXP22*
>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH v4 10/10] ARM: sunxi: Enable sun8i-emac driver on multi_v7_defconfig
From: Jean-Francois Moine @ 2016-10-10 13:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161010123511.GA16103@Red>
On Mon, 10 Oct 2016 14:35:11 +0200
LABBE Corentin <clabbe.montjoie@gmail.com> wrote:
> On Mon, Oct 10, 2016 at 02:30:46PM +0200, Maxime Ripard wrote:
> > On Fri, Oct 07, 2016 at 10:25:57AM +0200, Corentin Labbe wrote:
> > > Enable the sun8i-emac driver in the multi_v7 default configuration
> > >
> > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> > > ---
> > > arch/arm/configs/multi_v7_defconfig | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
> > > index 5845910..f44d633 100644
> > > --- a/arch/arm/configs/multi_v7_defconfig
> > > +++ b/arch/arm/configs/multi_v7_defconfig
> > > @@ -229,6 +229,7 @@ CONFIG_NETDEVICES=y
> > > CONFIG_VIRTIO_NET=y
> > > CONFIG_HIX5HD2_GMAC=y
> > > CONFIG_SUN4I_EMAC=y
> > > +CONFIG_SUN8I_EMAC=y
> >
> > Any reason to build it statically?
> >
>
> No, just copied the same than CONFIG_SUN4I_EMAC that probably do not need it also.
All arm configs are done the same way, and, some day, the generic ARM
V7 kernel will not be loadable in 1Gb RAM...
--
Ken ar c'henta? | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
^ permalink raw reply
* [RESEND PATCH v2 3/3] dt-bindings: reset: oxnas: Update for OX820
From: Rob Herring @ 2016-10-10 12:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161005152710.2898-4-narmstrong@baylibre.com>
On Wed, Oct 05, 2016 at 05:27:10PM +0200, Neil Armstrong wrote:
> Add new compatible string for reset and sys-ctrl for the Oxford
> Semiconductor OX820 Support.
> Drop the OX810SE indices since they moved in a dedicated include file.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> .../devicetree/bindings/reset/oxnas,reset.txt | 44 +++++-----------------
> 1 file changed, 9 insertions(+), 35 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 6/6] dt-bindings: clk: oxnas,stdclk: Add OX820 bindings
From: Rob Herring @ 2016-10-10 12:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161005150752.22618-7-narmstrong@baylibre.com>
On Wed, Oct 05, 2016 at 05:07:52PM +0200, Neil Armstrong wrote:
> Add OX820 bindings and remove clock indices from bindings since they are present
> in the dt-bindings headers files.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> .../devicetree/bindings/clock/oxnas,stdclk.txt | 19 ++++++-------------
> 1 file changed, 6 insertions(+), 13 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v2 2/4] power: add axp20x-battery driver
From: Maxime Ripard @ 2016-10-10 12:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161009062714.5085-2-icenowy@aosc.xyz>
Hi Icenowy,
On Sun, Oct 09, 2016 at 02:27:12PM +0800, Icenowy Zheng wrote:
> + case POWER_SUPPLY_PROP_CURRENT_NOW:
> + ret = regmap_read(power->regmap, AXP20X_BATT_DISCHRG_I_H, &dh);
> + if (ret)
> + return ret;
> + ret = regmap_read(power->regmap, AXP20X_BATT_DISCHRG_I_L, &dl);
> + if (ret)
> + return ret;
> + /* it's a 12 bit integer, high 8-bit is stored in dh */
> + val->intval = dh << 4 | dl >> 4;
> + break;
> + case POWER_SUPPLY_PROP_VOLTAGE_NOW:
> + ret = regmap_read(power->regmap, AXP20X_BATT_V_H, &dh);
> + if (ret)
> + return ret;
> + ret = regmap_read(power->regmap, AXP20X_BATT_V_L, &dl);
> + if (ret)
> + return ret;
> + /* it's a 12 bit integer, high 8-bit is stored in dh */
> + val->intval = dh << 4 | dl >> 4;
> + /* The formula below is from axp22_vbat_to_mV function
> + * of Allwinner 3.4 kernel.
> + */
> + val->intval = val->intval * 1100 / 1000;
> + break;
I really feel that this should be implemented through a IIO driver
(like the AXP288). This is especially true for the AXP209 and its
multiple GPIOs that can be muxed to a general purpose ADC, but it's
also true for the AXP221 / 223 TS pin that can also be used as an ADC.
Quentin has been working on this lately for the AXP209, feel free to
sync with him to support the AXP22*
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH v4 04/10] ARM: dts: sun8i-h3: Add dt node for the syscon control module
From: Jean-Francois Moine @ 2016-10-10 12:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161010123151.GI3462@lukather>
On Mon, 10 Oct 2016 14:31:51 +0200
Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
> Hi,
>
> On Fri, Oct 07, 2016 at 10:25:51AM +0200, Corentin Labbe wrote:
> > This patch add the dt node for the syscon register present on the
> > Allwinner H3.
> >
> > Only two register are present in this syscon and the only one useful is
> > the one dedicated to EMAC clock.
> >
> > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> > ---
> > arch/arm/boot/dts/sun8i-h3.dtsi | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> > index 8a95e36..1101d2f 100644
> > --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> > @@ -140,6 +140,11 @@
> > #size-cells = <1>;
> > ranges;
> >
> > + syscon: syscon at 01c00000 {
> > + compatible = "syscon";
>
> It would be great to have a more specific compatible here in addition
> to the syscon, like "allwinner,sun8i-h3-system-controller".
The System Control area is just like the PRCM area: it would be simpler
to define the specific registers in the associated drivers.
Here, instead of the syscon node, plus
+ emac: ethernet at 1c30000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ syscon = <&syscon>;
+ reg = <0x01c30000 0x104>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
...
there would be no 'syscon' node and
+ emac: ethernet at 1c30000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ syscon = <&syscon>;
+ reg = <0x01c30000 0x104>, /* EMAC */
+ <0x01c00030 4>; /* system control */
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
...
--
Ken ar c'henta? | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
^ permalink raw reply
* [PATCH] PM / AVS: rockchip-io: make the log more consistent
From: Shawn Lin @ 2016-10-10 12:44 UTC (permalink / raw)
To: linux-arm-kernel
When testing SD hotplug automatically, I got bunch of
useless log like this:
[ 588.357838] mmc0: card 0007 removed
[ 589.492664] rockchip-iodomain ff770000.syscon:io-domains: Setting to 3300000 done
[ 589.500698] vccio_sd: ramp_delay not set
[ 589.504817] rockchip-iodomain ff770000.syscon:io-domains: Setting to 3300000 done
[ 589.669705] rockchip-iodomain ff770000.syscon:io-domains: Setting to 3300000 done
[ 589.677593] vccio_sd: ramp_delay not set
[ 589.681581] rockchip-iodomain ff770000.syscon:io-domains: Setting to 1800000 done
[ 590.032820] dwmmc_rockchip ff0c0000.dwmmc: Successfully tuned phase to 140
[ 590.039725] mmc0: new ultra high speed SDR50 SDHC card at address 0007
[ 590.046641] mmcblk0: mmc0:0007 SD32G 29.3 GiB
[ 590.052163] mmcblk0: p1
Moreover the code is intent to print the 'uV' for debug but
later print it using dev_info. It looks more like to me that
it should be the real intention of the code. Anyway, let's
mark this verbose log as debug message.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
drivers/power/avs/rockchip-io-domain.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/avs/rockchip-io-domain.c b/drivers/power/avs/rockchip-io-domain.c
index 01b6d3f..56bce19 100644
--- a/drivers/power/avs/rockchip-io-domain.c
+++ b/drivers/power/avs/rockchip-io-domain.c
@@ -143,7 +143,7 @@ static int rockchip_iodomain_notify(struct notifier_block *nb,
if (ret && event == REGULATOR_EVENT_PRE_VOLTAGE_CHANGE)
return NOTIFY_BAD;
- dev_info(supply->iod->dev, "Setting to %d done\n", uV);
+ dev_dbg(supply->iod->dev, "Setting to %d done\n", uV);
return NOTIFY_OK;
}
--
2.3.7
^ permalink raw reply related
* [PATCH 1/2] mmc: block: add missing header dependencies
From: Ulf Hansson @ 2016-10-10 12:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475199459-4775-1-git-send-email-baoyou.xie@linaro.org>
On 30 September 2016 at 03:37, Baoyou Xie <baoyou.xie@linaro.org> wrote:
> We get 1 warning when building kernel with W=1:
> drivers/mmc/card/block.c:2147:5: warning: no previous prototype for 'mmc_blk_issue_rq' [-Wmissing-prototypes]
>
> In fact, this function is declared in drivers/mmc/card/block.h,
> so this patch adds missing header dependencies.
>
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Thanks, applied for fixes!
Kind regards
Uffe
> ---
> drivers/mmc/card/block.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
> index c333511..0f2cc9f2 100644
> --- a/drivers/mmc/card/block.c
> +++ b/drivers/mmc/card/block.c
> @@ -46,6 +46,7 @@
> #include <asm/uaccess.h>
>
> #include "queue.h"
> +#include "block.h"
>
> MODULE_ALIAS("mmc:block");
> #ifdef MODULE_PARAM_PREFIX
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH -next] mmc: sdhci-of-arasan: Fix non static symbol warning
From: Ulf Hansson @ 2016-10-10 12:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474818243-19207-1-git-send-email-weiyj.lk@gmail.com>
On 25 September 2016 at 17:44, Wei Yongjun <weiyj.lk@gmail.com> wrote:
> From: Wei Yongjun <weiyongjun1@huawei.com>
>
> Fixes the following sparse warning:
>
> drivers/mmc/host/sdhci-of-arasan.c:253:6: warning:
> symbol 'sdhci_arasan_reset' was not declared. Should it be static?
>
> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Thanks, applied for fixes!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-of-arasan.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> index da8e40a..e263671 100644
> --- a/drivers/mmc/host/sdhci-of-arasan.c
> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> @@ -250,7 +250,7 @@ static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc,
> writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER);
> }
>
> -void sdhci_arasan_reset(struct sdhci_host *host, u8 mask)
> +static void sdhci_arasan_reset(struct sdhci_host *host, u8 mask)
> {
> u8 ctrl;
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
>
>
>
^ permalink raw reply
* [PATCH V3 0/8] IOMMU probe deferral support
From: Marek Szyprowski @ 2016-10-10 12:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475600632-21289-1-git-send-email-sricharan@codeaurora.org>
Hi Sricharan,
On 2016-10-04 19:03, Sricharan R wrote:
> Initial post from Laurent Pinchart[1]. This is
> series calls the dma ops configuration for the devices
> at a generic place so that it works for all busses.
> The dma_configure_ops for a device is now called during
> the device_attach callback just before the probe of the
> bus/driver is called. Similarly dma_deconfigure is called during
> device/driver_detach path.
>
>
> pci_bus_add_devices (platform/amba)(_device_create/driver_register)
> | |
> pci_bus_add_device (device_add/driver_register)
> | |
> device_attach device_initial_probe
> | |
> __device_attach_driver __device_attach_driver
> |
> driver_probe_device
> |
> really_probe
> |
> dma_configure
>
> Similarly on the device/driver_unregister path __device_release_driver is
> called which inturn calls dma_deconfigure.
>
> If the ACPI bus code follows the same, we can add acpi_dma_configure
> at the same place as of_dma_configure.
>
> This series is based on the recently merged Generic DT bindings for
> PCI IOMMUs and ARM SMMU from Robin Murphy robin.murphy at arm.com [2]
>
> This time tested this with platform and pci device for probe deferral
> and reprobe on arm64 based platform. There is an issue on the cleanup
> path for arm64 though, where there is WARN_ON if the dma_ops is reset while
> device is attached to an domain in arch_teardown_dma_ops.
> But with iommu_groups created from the iommu driver, the device is always
> attached to a domain/default_domain. So so the WARN has to be removed/handled
> probably.
Thanks for continuing work on this feature! Your can add my:
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
It works fine with Exynos SYSMMU driver, although a patch is needed to fix
infinite loop due to list corruption (same element is added twice if master
device fails with deferred probe):
From: Marek Szyprowski <m.szyprowski@samsung.com>
Date: Mon, 10 Oct 2016 14:22:42 +0200
Subject: [PATCH] iommu/exynos: ensure that sysmmu is added only once to its
master
Since adding IOMMU deferred probing support, of_xlate() callback might
be called more than once for given master device (for example it happens
when masters device driver fails with EPROBE_DEFER), so ensure that
SYSMMU controller is added to its master device (owner) only once.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
drivers/iommu/exynos-iommu.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 30808e91b775..1525a86eb829 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -1253,7 +1253,7 @@ static int exynos_iommu_of_xlate(struct device *dev,
{
struct exynos_iommu_owner *owner = dev->archdata.iommu;
struct platform_device *sysmmu = of_find_device_by_node(spec->np);
- struct sysmmu_drvdata *data;
+ struct sysmmu_drvdata *data, *entry;
if (!sysmmu)
return -ENODEV;
@@ -1271,6 +1271,10 @@ static int exynos_iommu_of_xlate(struct device *dev,
dev->archdata.iommu = owner;
}
+ list_for_each_entry(entry, &owner->controllers, owner_node)
+ if (entry == data)
+ return 0;
+
list_add_tail(&data->owner_node, &owner->controllers);
return 0;
}
--
1.9.1
>
> Previous post of this series [3].
>
> [V3]
> * Removed the patch to split dma_masks/dma_ops configuration separately
> based on review comments that both masks and ops are required only
> during the device probe time.
>
> * Reworked the series based on Generic DT bindings series [2].
>
> * Added call to iommu's remove_device in the cleanup path for arm and arm64.
>
> * Removed the notifier trick in arm64 to handle early device registration.
>
> * Added reset of dma_ops in cleanup path for arm based on comments.
>
> * Fixed the pci_iommu_configure path and tested with PCI device as well.
>
> * Fixed a bug to return the correct iommu_ops from patch 7 [4] in last post.
>
> * Fixed few other cosmetic comments.
>
> [V2]
> * Updated the Initial post to call dma_configure/deconfigure from generic code
>
> * Added iommu add_device callback from of_iommu_configure path
>
> [V1]
> * Initial post
>
> [1] http://lists.linuxfoundation.org/pipermail/iommu/2015-May/013016.html
> [2] http://www.spinics.net/lists/devicetree/msg142943.html
> [3] https://www.mail-archive.com/iommu at lists.linux-foundation.org/msg13941.html
> [4] https://www.mail-archive.com/iommu at lists.linux-foundation.org/msg13940.html
>
>
>
> Laurent Pinchart (4):
> arm: dma-mapping: Don't override dma_ops in arch_setup_dma_ops()
> of: dma: Move range size workaround to of_dma_get_range()
> of: dma: Make of_dma_deconfigure() public
> iommu: of: Handle IOMMU lookup failure with deferred probing or error
>
> Sricharan R (4):
> drivers: platform: Configure dma operations at probe time
> arm: dma-mapping: Reset the device's dma_ops
> arm/arm64: dma-mapping: Call iommu's remove_device callback during
> device detach
> arm64: dma-mapping: Remove the notifier trick to handle early setting
> of dma_ops
>
> arch/arm/mm/dma-mapping.c | 18 ++++++++
> arch/arm64/mm/dma-mapping.c | 107 +++++---------------------------------------
> drivers/base/dd.c | 10 +++++
> drivers/base/dma-mapping.c | 11 +++++
> drivers/iommu/of_iommu.c | 47 +++++++++++++++++--
> drivers/of/address.c | 20 ++++++++-
> drivers/of/device.c | 34 +++++++-------
> drivers/of/platform.c | 9 ----
> drivers/pci/probe.c | 5 +--
> include/linux/dma-mapping.h | 3 ++
> include/linux/of_device.h | 7 ++-
> 11 files changed, 138 insertions(+), 133 deletions(-)
>
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
^ permalink raw reply related
* [PATCH v4 10/10] ARM: sunxi: Enable sun8i-emac driver on multi_v7_defconfig
From: LABBE Corentin @ 2016-10-10 12:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161010123046.GH3462@lukather>
On Mon, Oct 10, 2016 at 02:30:46PM +0200, Maxime Ripard wrote:
> On Fri, Oct 07, 2016 at 10:25:57AM +0200, Corentin Labbe wrote:
> > Enable the sun8i-emac driver in the multi_v7 default configuration
> >
> > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> > ---
> > arch/arm/configs/multi_v7_defconfig | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
> > index 5845910..f44d633 100644
> > --- a/arch/arm/configs/multi_v7_defconfig
> > +++ b/arch/arm/configs/multi_v7_defconfig
> > @@ -229,6 +229,7 @@ CONFIG_NETDEVICES=y
> > CONFIG_VIRTIO_NET=y
> > CONFIG_HIX5HD2_GMAC=y
> > CONFIG_SUN4I_EMAC=y
> > +CONFIG_SUN8I_EMAC=y
>
> Any reason to build it statically?
>
No, just copied the same than CONFIG_SUN4I_EMAC that probably do not need it also.
Regards
Corentin Labbe
^ permalink raw reply
* [PATCH v4 04/10] ARM: dts: sun8i-h3: Add dt node for the syscon control module
From: Maxime Ripard @ 2016-10-10 12:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475828757-926-5-git-send-email-clabbe.montjoie@gmail.com>
Hi,
On Fri, Oct 07, 2016 at 10:25:51AM +0200, Corentin Labbe wrote:
> This patch add the dt node for the syscon register present on the
> Allwinner H3.
>
> Only two register are present in this syscon and the only one useful is
> the one dedicated to EMAC clock.
>
> Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> ---
> arch/arm/boot/dts/sun8i-h3.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index 8a95e36..1101d2f 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -140,6 +140,11 @@
> #size-cells = <1>;
> ranges;
>
> + syscon: syscon at 01c00000 {
> + compatible = "syscon";
It would be great to have a more specific compatible here in addition
to the syscon, like "allwinner,sun8i-h3-system-controller".
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH v4 10/10] ARM: sunxi: Enable sun8i-emac driver on multi_v7_defconfig
From: Maxime Ripard @ 2016-10-10 12:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475828757-926-11-git-send-email-clabbe.montjoie@gmail.com>
On Fri, Oct 07, 2016 at 10:25:57AM +0200, Corentin Labbe wrote:
> Enable the sun8i-emac driver in the multi_v7 default configuration
>
> Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> ---
> arch/arm/configs/multi_v7_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
> index 5845910..f44d633 100644
> --- a/arch/arm/configs/multi_v7_defconfig
> +++ b/arch/arm/configs/multi_v7_defconfig
> @@ -229,6 +229,7 @@ CONFIG_NETDEVICES=y
> CONFIG_VIRTIO_NET=y
> CONFIG_HIX5HD2_GMAC=y
> CONFIG_SUN4I_EMAC=y
> +CONFIG_SUN8I_EMAC=y
Any reason to build it statically?
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH v4 03/10] ARM: sun8i: dt: Add DT bindings documentation for Allwinner sun8i-emac
From: Maxime Ripard @ 2016-10-10 12:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475828757-926-4-git-send-email-clabbe.montjoie@gmail.com>
On Fri, Oct 07, 2016 at 10:25:50AM +0200, Corentin Labbe wrote:
> This patch adds documentation for Device-Tree bindings for the
> Allwinner sun8i-emac driver.
>
> Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> ---
> .../bindings/net/allwinner,sun8i-emac.txt | 70 ++++++++++++++++++++++
> 1 file changed, 70 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt
>
> diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt b/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt
> new file mode 100644
> index 0000000..92e4ef3b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt
> @@ -0,0 +1,70 @@
> +* Allwinner sun8i EMAC ethernet controller
> +
> +Required properties:
> +- compatible: should be one of the following string:
> + "allwinner,sun8i-a83t-emac"
> + "allwinner,sun8i-h3-emac"
> + "allwinner,sun50i-a64-emac"
> +- reg: address and length of the register for the device.
> +- syscon: A phandle to the syscon of the SoC
> +- interrupts: interrupt for the device
> +- clocks: A phandle to the reference clock for this device
> +- clock-names: should be "ahb"
> +- resets: A phandle to the reset control for this device
> +- reset-names: should be "ahb"
> +- phy-mode: See ethernet.txt
> +- phy-handle: See ethernet.txt
> +- #address-cells: shall be 1
> +- #size-cells: shall be 0
> +
> +Optional properties:
> +- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07. Default is 0)
> +- allwinner,rx-delay: RX clock delay chain value. Range value is 0-0x1F. Default is 0)
> +Both delay properties does not have units, there are arbitrary value.
> +The TX/RX clock delay chain settings are board specific and could be found
> +in vendor FEX files.
> +
> +Optional properties for "allwinner,sun8i-h3-emac":
> +- allwinner,leds-active-low: EPHY LEDs are active low
> +
> +Required child node of emac:
> +- mdio bus node: should be named mdio
> +
> +Required properties of the mdio node:
> +- #address-cells: shall be 1
> +- #size-cells: shall be 0
> +
> +The device node referenced by "phy" or "phy-handle" should be a child node
> +of the mdio node. See phy.txt for the generic PHY bindings.
> +
> +Required properties of the phy node with "allwinner,sun8i-h3-emac":
> +- clocks: an extra phandle to the reference clock for the EPHY
> +- resets: an extra phandle to the reset control for the EPHY
> +
> +Example:
> +
> +emac: ethernet at 01c0b000 {
> + compatible = "allwinner,sun8i-h3-emac";
> + syscon = <&syscon>;
> + reg = <0x01c0b000 0x104>;
> + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&ccu RST_BUS_EMAC>;
> + reset-names = "ahb";
> + clocks = <&ccu CLK_BUS_EMAC>;
> + clock-names = "ahb";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + phy = <&int_mii_phy>;
> + phy-mode = "mii";
> + allwinner,leds-active-low;
> + mdio: mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + int_mii_phy: ethernet-phy at 1 {
> + reg = <1>;
> + clocks = <&ccu CLK_BUS_EPHY>;
> + resets = <&ccu RST_BUS_EPHY>;
That works for me, let's see how the DT maintainers feel about it.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH v1 2/2] arm64: dts: rockchip: Add PX5 Evaluation board
From: Heiko Stuebner @ 2016-10-10 12:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ef2bb52c-26f9-49a5-fe18-538effcd30b0@suse.de>
Hi Andreas, Andy,
Am Dienstag, 13. September 2016, 14:23:35 CEST schrieb Andreas F?rber:
> Hi,
>
> Am 10.09.2016 um 19:47 schrieb Andy Yan:
> > PX5 EVB is designed by Rockchip for automotive field,
> > which intergrated with CVBS(TP2825)/MIPI DSI/CSI/LVDS
> > HDMI video input/output interface, audio codec ES8396,
> > WIFI/BT(on RTL8723BS), Gsensor BMA250E and light&proximity
> > sensor STK3410.
> >
> > Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
>
> Most comments from PX3 1/2 apply here, too.
ammended te commit
> > ---
> >
> > Changes in v1:
> > - board rename
> > - add vendor prefix for i2c interfaced devices
> >
> > Documentation/devicetree/bindings/arm/rockchip.txt | 4 +
> > arch/arm64/boot/dts/rockchip/Makefile | 1 +
> > arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts | 304
> > +++++++++++++++++++++ 3 files changed, 309 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
> >
> > diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt
> > b/Documentation/devicetree/bindings/arm/rockchip.txt index
> > 6da3881..b6f92d6 100644
> > --- a/Documentation/devicetree/bindings/arm/rockchip.txt
> > +++ b/Documentation/devicetree/bindings/arm/rockchip.txt
> > @@ -107,6 +107,10 @@ Rockchip platforms device tree bindings
> >
> > Required root node properties:
> > - compatible = "rockchip,r88", "rockchip,rk3368";
> >
> > +- Rockchip PX5 Evaluation board:
> > + Required root node properties:
> > + - compatible = "rockchip,px5-evb", "rockchip,px5",
> > "rockchip,rk3368"; +
> >
> > - Rockchip RK3228 Evaluation board:
> > Required root node properties:
> > - compatible = "rockchip,rk3228-evb", "rockchip,rk3228";
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/Makefile
> > b/arch/arm64/boot/dts/rockchip/Makefile index 7037a16..86c74b2 100644
> > --- a/arch/arm64/boot/dts/rockchip/Makefile
> > +++ b/arch/arm64/boot/dts/rockchip/Makefile
> > @@ -1,6 +1,7 @@
> >
> > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
> > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
> > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
> >
> > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
>
> There is no PX5 listed on your English website (yet), but given that you
> have your own rockchip/ folder for arm64 I would encourage you to rename
> to px5-evb.dtb independent of any internal heritage or compatibility the
> SoC has. Compare apq/ipq/msm in qcom.
I prefer to keep it like it is, see comment in px3 patch.
>
> > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
> >
> > always := $(dtb-y)
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
> > b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts new file mode 100644
> > index 0000000..be0e915
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
> > @@ -0,0 +1,304 @@
> > +/*
> > + * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
> > + *
> > + * This file is dual-licensed: you can use it either under the terms
> > + * of the GPL or the X11 license, at your option. Note that this dual
> > + * licensing only applies to this file, and not this project as a
> > + * whole.
> > + *
> > + * a) This file is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of the
> > + * License, or (at your option) any later version.
> > + *
> > + * This file is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * Or, alternatively,
> > + *
> > + * b) Permission is hereby granted, free of charge, to any person
> > + * obtaining a copy of this software and associated documentation
> > + * files (the "Software"), to deal in the Software without
> > + * restriction, including without limitation the rights to use,
> > + * copy, modify, merge, publish, distribute, sublicense, and/or
> > + * sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following
> > + * conditions:
> > + *
> > + * The above copyright notice and this permission notice shall be
> > + * included in all copies or substantial portions of the Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > + * OTHER DEALINGS IN THE SOFTWARE.
> > + */
> > +
> > +/dts-v1/;
> > +#include "rk3368.dtsi"
>
> Similarly suggest a px5.dtsi here.
>
> > +#include <dt-bindings/input/input.h>
> > +
> > +/ {
> > + model = "Rockchip PX5 EVB";
> > + compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
> > +
> > + chosen {
> > + stdout-path = "serial4:115200n8";
> > + };
> > +
> > + memory at 0 {
> > + device_type = "memory";
> > + reg = <0x0 0x0 0x0 0x80000000>;
> > + };
> > +
> > + keys: gpio-keys {
> > + compatible = "gpio-keys";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pwr_key>;
> > +
> > + power {
> > + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
> > + label = "GPIO Power";
> > + linux,code = <KEY_POWER>;
> > + wakeup-source;
> > + };
> > + };
> > +
> > + vcc_sys: vcc-sys-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc_sys";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-always-on;
> > + regulator-boot-on;
> > + };
> > +};
> > +
> > +&emmc {
> > + status = "okay";
> > + bus-width = <8>;
> > + cap-mmc-highspeed;
> > + clock-frequency = <150000000>;
> > + disable-wp;
> > + keep-power-in-suspend;
> > + non-removable;
> > + num-slots = <1>;
> > + vmmc-supply = <&vcc_io>;
> > + vqmmc-supply = <&vcc18_flash>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
> > +};
> > +
> > +&i2c0 {
> > + status = "okay";
> > +
> > + rk808: pmic at 1b {
> > + compatible = "rockchip,rk808";
> > + reg = <0x1b>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
> > + interrupt-parent = <&gpio0>;
> > + interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
> > + rockchip,system-power-controller;
> > + vcc1-supply = <&vcc_sys>;
> > + vcc2-supply = <&vcc_sys>;
> > + vcc3-supply = <&vcc_sys>;
> > + vcc4-supply = <&vcc_sys>;
> > + vcc6-supply = <&vcc_sys>;
> > + vcc7-supply = <&vcc_sys>;
> > + vcc8-supply = <&vcc_io>;
> > + vcc9-supply = <&vcc_sys>;
> > + vcc10-supply = <&vcc_sys>;
> > + vcc11-supply = <&vcc_sys>;
> > + vcc12-supply = <&vcc_io>;
> > + clock-output-names = "xin32k", "rk808-clkout2";
> > + #clock-cells = <1>;
> > +
> > + regulators {
> > + vdd_cpu: DCDC_REG1 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <700000>;
> > + regulator-max-microvolt = <1500000>;
> > + regulator-name = "vdd_cpu";
> > + };
> > +
> > + vdd_log: DCDC_REG2 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <700000>;
> > + regulator-max-microvolt = <1500000>;
> > + regulator-name = "vdd_log";
> > + };
> > +
> > + vcc_ddr: DCDC_REG3 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-name = "vcc_ddr";
> > + };
> > +
> > + vcc_io: DCDC_REG4 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-name = "vcc_io";
> > + };
> > +
> > + vcc18_flash: LDO_REG1 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-name = "vcc18_flash";
> > + };
> > +
> > + vcca_33: LDO_REG2 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-name = "vcca_33";
> > + };
> > +
> > + vdd_10: LDO_REG3 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1000000>;
> > + regulator-max-microvolt = <1000000>;
> > + regulator-name = "vdd_10";
> > + };
> > +
> > + avdd_33: LDO_REG4 {
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-name = "avdd_33";
> > + };
> > +
> > + vccio_sd: LDO_REG5 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-name = "vccio_sd";
> > + };
> > +
> > + vdd10_lcd: LDO_REG6 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1000000>;
> > + regulator-max-microvolt = <1000000>;
> > + regulator-name = "vdd10_lcd";
> > + };
> > +
> > + vcc_18: LDO_REG7 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-name = "vcc_18";
> > + };
> > +
> > + vcc18_lcd: LDO_REG8 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-name = "vcc18_lcd";
> > + };
> > +
> > + vcc_sd: SWITCH_REG1 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-name = "vcc_sd";
> > + };
> > +
> > + vcc33_lcd: SWITCH_REG2 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-name = "vcc33_lcd";
> > + };
> > + };
> > + };
> > +};
> > +
> > +&i2c1 {
> > + status = "okay";
> > +
> > + /* Accelerometer */
> > + bma250 at 18 {
changed to accelerometer at 18 similar to px3
> > + compatible = "bosch,bma250";
> > + reg = <0x18>;
> > + interrupt-parent = <&gpio2>;
> > + interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
> > + };
> > +
> > + stk3410 at 48 {
> > + compatible = "sensortek,STK3310";
> > + reg = <0x48>;
> > + interrupt-parent = <&gpio2>;
> > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> > + };
> > +};
> > +
> > +&i2c2 {
> > + status = "okay";
> > +
> > + gsl1680: touchscreen at 40 {
> > + compatible = "silead,gsl1680";
> > + reg = <0x40>;
> > + interrupt-parent = <&gpio3>;
> > + interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
> > + power-gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
> > + touchscreen-size-x = <800>;
> > + touchscreen-size-y = <1280>;
> > + silead,max-fingers = <5>;
> > + };
> > +};
> > +
> > +&pinctrl {
> > +
>
> Drop white line?
seems I dropped that already.
> > + keys {
> > + pwr_key: pwr-key {
> > + rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
> > + };
> > + };
> > +
> > + pmic {
> > + pmic_sleep: pmic-sleep {
> > + rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
> > + };
> > +
> > + pmic_int: pmic-int {
> > + rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
> > + };
> > + };
> > +};
> > +
> > +&tsadc {
> > + status = "okay";
> > + rockchip,hw-tshut-mode = <0>; /* CRU */
> > + rockchip,hw-tshut-polarity = <1>; /* high */
> > +};
> > +
> > +&uart4 {
> > + status = "okay";
> > +};
> > +
> > +&usb_host0_ehci {
> > + status = "okay";
> > +};
> > +
> > +&usb_otg {
> > + status = "okay";
> > +};
> > +
> > +&wdt {
> > + status = "okay";
> > +};
>
> Otherwise formally looks fine.
Thanks for looking at the patch.
Heiko
^ permalink raw reply
* [PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI
From: Gabriel Fernandez @ 2016-10-10 12:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1880a125-b5ec-b64a-5c9b-90d4e9c0af86@st.com>
Hi Rados?aw,
Yes i m nearly ready to push a patch-set to manage LCD-TFT clock.
In my patch-set i introduced PLLI2S and PLLSAI in generic way, and offer
the possibility to change the vco frequency (in order to cover all
frequencies for any LCD).
And then, the vco is no longer a fixed factor.
This patch is just a fix or do you planned to upstream PLLI2S and PLLSAI ?
If you are ok I can send my patch-set ?
Best Regards
Gabriel
On 10/10/2016 01:32 PM, Alexandre Torgue wrote:
> Hi Radoslaw,
>
> I add Gabriel in the discussion. Gabriel is updating PLL management
> for STM32F429.
>
> Regards
> Alex
>
> On 10/10/2016 12:31 PM, Daniel Thompson wrote:
>> On 10/10/16 10:56, Rados?aw Pietrzyk wrote:
>>> Hi,
>>> all plls have the same clock parent which is after a main divider.
>>> Currently the divider and multiplier are connected together within vco
>>> clock and therefore there is no chance to reuse the divider and clearly
>>> state where the conncetion "really" is. We can arrange all of them
>>> separately but than the divider will be hidden for all of them
>>> separately.
>>
>> Quoting my last mail "I can see the value of naming the "/M"
>> pre-division separately". In other words I agree with the idea of the
>> patch.
>>
>> To more explicitly state my review comments...
>>
>>> From: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>
>>
>> Please add a explanation of the problem and solution in the patch
>> description.
>>
>>
>>> Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>
>>> ---
>>> drivers/clk/clk-stm32f4.c | 7 ++++---
>>> 1 file changed, 4 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
>>> index 02d6810..1fd3eac 100644
>>> --- a/drivers/clk/clk-stm32f4.c
>>> +++ b/drivers/clk/clk-stm32f4.c
>>> @@ -245,9 +245,10 @@ static void stm32f4_rcc_register_pll(const char
>> *hse_clk, const char *hsi_clk)
>>> const char *pllsrc = pllcfgr & BIT(22) ? hse_clk : hsi_clk;
>>> unsigned long pllq = (pllcfgr >> 24) & 0xf;
>>>
>>> - clk_register_fixed_factor(NULL, "vco", pllsrc, 0, plln, pllm);
>>> - clk_register_fixed_factor(NULL, "pll", "vco", 0, 1, pllp);
>>> - clk_register_fixed_factor(NULL, "pll48", "vco", 0, 1, pllq);
>>> + clk_register_fixed_factor(NULL, "vco-div", pllsrc, 0, 1, pllm);
>>
>> This strikes me as a bad name for a clock that is shared by all three
>> PLLs (the vco being an internal component of the PLL) however since the
>> clock is not named in the datasheet we are forced to invent a name [I
>> suspect that's why I gave up trying to name it when I wrote the driver
>> originally ;-) ].
>>
>> Perhaps "pllin-prediv"?
>>
>>
>>> + clk_register_fixed_factor(NULL, "vco-mul", "vco-div", 0, plln, 1);
>>
>> Why rename this clock? Multiplying is a what the vco (and its control
>> circuits) is *for*. Tagging it "-mul" is meaningless.
>>
>>
>> Daniel.
^ permalink raw reply
* [PATCH 1/1] mfd: Remove unused variable using Coccinelle
From: Linus Walleij @ 2016-10-10 11:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476063419-13866-1-git-send-email-mayhs11saini@gmail.com>
On Mon, Oct 10, 2016 at 3:36 AM, Shyam Saini <mayhs11saini@gmail.com> wrote:
> The variable err is initialized but never used otherwise.
>
> The semantic patch that makes this change is as follows:
>
> // <smpl>
> @@
> type T;
> identifier i;
> constant C;
> @@
>
> (
> extern T i;
> |
> - T i;
> <+... when != i
> - i = C;
> ...+>
> )
> // </smpl>
>
> Signed-off-by: Shyam Saini <mayhs11saini@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply
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