* [PATCH v2 7/8] crypto: arm64/aes-xts-ce: fix for big endian
From: Ard Biesheuvel @ 2016-10-11 18:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476209720-21114-1-git-send-email-ard.biesheuvel@linaro.org>
Emit the XTS tweak literal constants in the appropriate order for a
single 128-bit scalar literal load.
Fixes: 49788fe2a128 ("arm64/crypto: AES-ECB/CBC/CTR/XTS using ARMv8 NEON and Crypto Extensions")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/crypto/aes-ce.S | 1 +
arch/arm64/crypto/aes-modes.S | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/crypto/aes-ce.S b/arch/arm64/crypto/aes-ce.S
index 78f3cfe92c08..b46093d567e5 100644
--- a/arch/arm64/crypto/aes-ce.S
+++ b/arch/arm64/crypto/aes-ce.S
@@ -10,6 +10,7 @@
*/
#include <linux/linkage.h>
+#include <asm/assembler.h>
#define AES_ENTRY(func) ENTRY(ce_ ## func)
#define AES_ENDPROC(func) ENDPROC(ce_ ## func)
diff --git a/arch/arm64/crypto/aes-modes.S b/arch/arm64/crypto/aes-modes.S
index f6e372c528eb..c53dbeae79f2 100644
--- a/arch/arm64/crypto/aes-modes.S
+++ b/arch/arm64/crypto/aes-modes.S
@@ -386,7 +386,8 @@ AES_ENDPROC(aes_ctr_encrypt)
.endm
.Lxts_mul_x:
- .word 1, 0, 0x87, 0
+CPU_LE( .quad 1, 0x87 )
+CPU_BE( .quad 0x87, 1 )
AES_ENTRY(aes_xts_encrypt)
FRAME_PUSH
--
2.7.4
^ permalink raw reply related
* [PATCH v2 6/8] crypto: arm64/aes-neon - fix for big endian
From: Ard Biesheuvel @ 2016-10-11 18:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476209720-21114-1-git-send-email-ard.biesheuvel@linaro.org>
The AES implementation using pure NEON instructions relies on the generic
AES key schedule generation routines, which store the round keys as arrays
of 32-bit quantities stored in memory using native endianness. This means
we should refer to these round keys using 4x4 loads rather than 16x1 loads.
In addition, the ShiftRows tables are loading using a single scalar load,
which is also affected by endianness, so emit these tables in the correct
order depending on whether we are building for big endian or not.
Fixes: 49788fe2a128 ("arm64/crypto: AES-ECB/CBC/CTR/XTS using ARMv8 NEON and Crypto Extensions")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/crypto/aes-neon.S | 25 ++++++++++++--------
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/crypto/aes-neon.S b/arch/arm64/crypto/aes-neon.S
index b93170e1cc93..85f07ead7c5c 100644
--- a/arch/arm64/crypto/aes-neon.S
+++ b/arch/arm64/crypto/aes-neon.S
@@ -9,6 +9,7 @@
*/
#include <linux/linkage.h>
+#include <asm/assembler.h>
#define AES_ENTRY(func) ENTRY(neon_ ## func)
#define AES_ENDPROC(func) ENDPROC(neon_ ## func)
@@ -83,13 +84,13 @@
.endm
.macro do_block, enc, in, rounds, rk, rkp, i
- ld1 {v15.16b}, [\rk]
+ ld1 {v15.4s}, [\rk]
add \rkp, \rk, #16
mov \i, \rounds
1111: eor \in\().16b, \in\().16b, v15.16b /* ^round key */
tbl \in\().16b, {\in\().16b}, v13.16b /* ShiftRows */
sub_bytes \in
- ld1 {v15.16b}, [\rkp], #16
+ ld1 {v15.4s}, [\rkp], #16
subs \i, \i, #1
beq 2222f
.if \enc == 1
@@ -229,7 +230,7 @@
.endm
.macro do_block_2x, enc, in0, in1 rounds, rk, rkp, i
- ld1 {v15.16b}, [\rk]
+ ld1 {v15.4s}, [\rk]
add \rkp, \rk, #16
mov \i, \rounds
1111: eor \in0\().16b, \in0\().16b, v15.16b /* ^round key */
@@ -237,7 +238,7 @@
sub_bytes_2x \in0, \in1
tbl \in0\().16b, {\in0\().16b}, v13.16b /* ShiftRows */
tbl \in1\().16b, {\in1\().16b}, v13.16b /* ShiftRows */
- ld1 {v15.16b}, [\rkp], #16
+ ld1 {v15.4s}, [\rkp], #16
subs \i, \i, #1
beq 2222f
.if \enc == 1
@@ -254,7 +255,7 @@
.endm
.macro do_block_4x, enc, in0, in1, in2, in3, rounds, rk, rkp, i
- ld1 {v15.16b}, [\rk]
+ ld1 {v15.4s}, [\rk]
add \rkp, \rk, #16
mov \i, \rounds
1111: eor \in0\().16b, \in0\().16b, v15.16b /* ^round key */
@@ -266,7 +267,7 @@
tbl \in1\().16b, {\in1\().16b}, v13.16b /* ShiftRows */
tbl \in2\().16b, {\in2\().16b}, v13.16b /* ShiftRows */
tbl \in3\().16b, {\in3\().16b}, v13.16b /* ShiftRows */
- ld1 {v15.16b}, [\rkp], #16
+ ld1 {v15.4s}, [\rkp], #16
subs \i, \i, #1
beq 2222f
.if \enc == 1
@@ -306,12 +307,16 @@
.text
.align 4
.LForward_ShiftRows:
- .byte 0x0, 0x5, 0xa, 0xf, 0x4, 0x9, 0xe, 0x3
- .byte 0x8, 0xd, 0x2, 0x7, 0xc, 0x1, 0x6, 0xb
+CPU_LE( .byte 0x0, 0x5, 0xa, 0xf, 0x4, 0x9, 0xe, 0x3 )
+CPU_LE( .byte 0x8, 0xd, 0x2, 0x7, 0xc, 0x1, 0x6, 0xb )
+CPU_BE( .byte 0xb, 0x6, 0x1, 0xc, 0x7, 0x2, 0xd, 0x8 )
+CPU_BE( .byte 0x3, 0xe, 0x9, 0x4, 0xf, 0xa, 0x5, 0x0 )
.LReverse_ShiftRows:
- .byte 0x0, 0xd, 0xa, 0x7, 0x4, 0x1, 0xe, 0xb
- .byte 0x8, 0x5, 0x2, 0xf, 0xc, 0x9, 0x6, 0x3
+CPU_LE( .byte 0x0, 0xd, 0xa, 0x7, 0x4, 0x1, 0xe, 0xb )
+CPU_LE( .byte 0x8, 0x5, 0x2, 0xf, 0xc, 0x9, 0x6, 0x3 )
+CPU_BE( .byte 0x3, 0x6, 0x9, 0xc, 0xf, 0x2, 0x5, 0x8 )
+CPU_BE( .byte 0xb, 0xe, 0x1, 0x4, 0x7, 0xa, 0xd, 0x0 )
.LForward_Sbox:
.byte 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5
--
2.7.4
^ permalink raw reply related
* [PATCH v2 5/8] crypto: arm64/aes-ccm-ce: fix for big endian
From: Ard Biesheuvel @ 2016-10-11 18:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476209720-21114-1-git-send-email-ard.biesheuvel@linaro.org>
The AES-CCM implementation that uses ARMv8 Crypto Extensions instructions
refers to the AES round keys as pairs of 64-bit quantities, which causes
failures when building the code for big endian. In addition, it byte swaps
the input counter unconditionally, while this is only required for little
endian builds. So fix both issues.
Fixes: 12ac3efe74f8 ("arm64/crypto: use crypto instructions to generate AES key schedule")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/crypto/aes-ce-ccm-core.S | 53 ++++++++++----------
1 file changed, 27 insertions(+), 26 deletions(-)
diff --git a/arch/arm64/crypto/aes-ce-ccm-core.S b/arch/arm64/crypto/aes-ce-ccm-core.S
index a2a7fbcacc14..3363560c79b7 100644
--- a/arch/arm64/crypto/aes-ce-ccm-core.S
+++ b/arch/arm64/crypto/aes-ce-ccm-core.S
@@ -9,6 +9,7 @@
*/
#include <linux/linkage.h>
+#include <asm/assembler.h>
.text
.arch armv8-a+crypto
@@ -19,7 +20,7 @@
*/
ENTRY(ce_aes_ccm_auth_data)
ldr w8, [x3] /* leftover from prev round? */
- ld1 {v0.2d}, [x0] /* load mac */
+ ld1 {v0.16b}, [x0] /* load mac */
cbz w8, 1f
sub w8, w8, #16
eor v1.16b, v1.16b, v1.16b
@@ -31,7 +32,7 @@ ENTRY(ce_aes_ccm_auth_data)
beq 8f /* out of input? */
cbnz w8, 0b
eor v0.16b, v0.16b, v1.16b
-1: ld1 {v3.2d}, [x4] /* load first round key */
+1: ld1 {v3.16b}, [x4] /* load first round key */
prfm pldl1strm, [x1]
cmp w5, #12 /* which key size? */
add x6, x4, #16
@@ -41,17 +42,17 @@ ENTRY(ce_aes_ccm_auth_data)
mov v5.16b, v3.16b
b 4f
2: mov v4.16b, v3.16b
- ld1 {v5.2d}, [x6], #16 /* load 2nd round key */
+ ld1 {v5.16b}, [x6], #16 /* load 2nd round key */
3: aese v0.16b, v4.16b
aesmc v0.16b, v0.16b
-4: ld1 {v3.2d}, [x6], #16 /* load next round key */
+4: ld1 {v3.16b}, [x6], #16 /* load next round key */
aese v0.16b, v5.16b
aesmc v0.16b, v0.16b
-5: ld1 {v4.2d}, [x6], #16 /* load next round key */
+5: ld1 {v4.16b}, [x6], #16 /* load next round key */
subs w7, w7, #3
aese v0.16b, v3.16b
aesmc v0.16b, v0.16b
- ld1 {v5.2d}, [x6], #16 /* load next round key */
+ ld1 {v5.16b}, [x6], #16 /* load next round key */
bpl 3b
aese v0.16b, v4.16b
subs w2, w2, #16 /* last data? */
@@ -60,7 +61,7 @@ ENTRY(ce_aes_ccm_auth_data)
ld1 {v1.16b}, [x1], #16 /* load next input block */
eor v0.16b, v0.16b, v1.16b /* xor with mac */
bne 1b
-6: st1 {v0.2d}, [x0] /* store mac */
+6: st1 {v0.16b}, [x0] /* store mac */
beq 10f
adds w2, w2, #16
beq 10f
@@ -79,7 +80,7 @@ ENTRY(ce_aes_ccm_auth_data)
adds w7, w7, #1
bne 9b
eor v0.16b, v0.16b, v1.16b
- st1 {v0.2d}, [x0]
+ st1 {v0.16b}, [x0]
10: str w8, [x3]
ret
ENDPROC(ce_aes_ccm_auth_data)
@@ -89,27 +90,27 @@ ENDPROC(ce_aes_ccm_auth_data)
* u32 rounds);
*/
ENTRY(ce_aes_ccm_final)
- ld1 {v3.2d}, [x2], #16 /* load first round key */
- ld1 {v0.2d}, [x0] /* load mac */
+ ld1 {v3.16b}, [x2], #16 /* load first round key */
+ ld1 {v0.16b}, [x0] /* load mac */
cmp w3, #12 /* which key size? */
sub w3, w3, #2 /* modified # of rounds */
- ld1 {v1.2d}, [x1] /* load 1st ctriv */
+ ld1 {v1.16b}, [x1] /* load 1st ctriv */
bmi 0f
bne 3f
mov v5.16b, v3.16b
b 2f
0: mov v4.16b, v3.16b
-1: ld1 {v5.2d}, [x2], #16 /* load next round key */
+1: ld1 {v5.16b}, [x2], #16 /* load next round key */
aese v0.16b, v4.16b
aesmc v0.16b, v0.16b
aese v1.16b, v4.16b
aesmc v1.16b, v1.16b
-2: ld1 {v3.2d}, [x2], #16 /* load next round key */
+2: ld1 {v3.16b}, [x2], #16 /* load next round key */
aese v0.16b, v5.16b
aesmc v0.16b, v0.16b
aese v1.16b, v5.16b
aesmc v1.16b, v1.16b
-3: ld1 {v4.2d}, [x2], #16 /* load next round key */
+3: ld1 {v4.16b}, [x2], #16 /* load next round key */
subs w3, w3, #3
aese v0.16b, v3.16b
aesmc v0.16b, v0.16b
@@ -120,47 +121,47 @@ ENTRY(ce_aes_ccm_final)
aese v1.16b, v4.16b
/* final round key cancels out */
eor v0.16b, v0.16b, v1.16b /* en-/decrypt the mac */
- st1 {v0.2d}, [x0] /* store result */
+ st1 {v0.16b}, [x0] /* store result */
ret
ENDPROC(ce_aes_ccm_final)
.macro aes_ccm_do_crypt,enc
ldr x8, [x6, #8] /* load lower ctr */
- ld1 {v0.2d}, [x5] /* load mac */
- rev x8, x8 /* keep swabbed ctr in reg */
+ ld1 {v0.16b}, [x5] /* load mac */
+CPU_LE( rev x8, x8 ) /* keep swabbed ctr in reg */
0: /* outer loop */
- ld1 {v1.1d}, [x6] /* load upper ctr */
+ ld1 {v1.8b}, [x6] /* load upper ctr */
prfm pldl1strm, [x1]
add x8, x8, #1
rev x9, x8
cmp w4, #12 /* which key size? */
sub w7, w4, #2 /* get modified # of rounds */
ins v1.d[1], x9 /* no carry in lower ctr */
- ld1 {v3.2d}, [x3] /* load first round key */
+ ld1 {v3.16b}, [x3] /* load first round key */
add x10, x3, #16
bmi 1f
bne 4f
mov v5.16b, v3.16b
b 3f
1: mov v4.16b, v3.16b
- ld1 {v5.2d}, [x10], #16 /* load 2nd round key */
+ ld1 {v5.16b}, [x10], #16 /* load 2nd round key */
2: /* inner loop: 3 rounds, 2x interleaved */
aese v0.16b, v4.16b
aesmc v0.16b, v0.16b
aese v1.16b, v4.16b
aesmc v1.16b, v1.16b
-3: ld1 {v3.2d}, [x10], #16 /* load next round key */
+3: ld1 {v3.16b}, [x10], #16 /* load next round key */
aese v0.16b, v5.16b
aesmc v0.16b, v0.16b
aese v1.16b, v5.16b
aesmc v1.16b, v1.16b
-4: ld1 {v4.2d}, [x10], #16 /* load next round key */
+4: ld1 {v4.16b}, [x10], #16 /* load next round key */
subs w7, w7, #3
aese v0.16b, v3.16b
aesmc v0.16b, v0.16b
aese v1.16b, v3.16b
aesmc v1.16b, v1.16b
- ld1 {v5.2d}, [x10], #16 /* load next round key */
+ ld1 {v5.16b}, [x10], #16 /* load next round key */
bpl 2b
aese v0.16b, v4.16b
aese v1.16b, v4.16b
@@ -177,14 +178,14 @@ ENDPROC(ce_aes_ccm_final)
eor v0.16b, v0.16b, v2.16b /* xor mac with pt ^ rk[last] */
st1 {v1.16b}, [x0], #16 /* write output block */
bne 0b
- rev x8, x8
- st1 {v0.2d}, [x5] /* store mac */
+CPU_LE( rev x8, x8 )
+ st1 {v0.16b}, [x5] /* store mac */
str x8, [x6, #8] /* store lsb end of ctr (BE) */
5: ret
6: eor v0.16b, v0.16b, v5.16b /* final round mac */
eor v1.16b, v1.16b, v5.16b /* final round enc */
- st1 {v0.2d}, [x5] /* store mac */
+ st1 {v0.16b}, [x5] /* store mac */
add w2, w2, #16 /* process partial tail block */
7: ldrb w9, [x1], #1 /* get 1 byte of input */
umov w6, v1.b[0] /* get top crypted ctr byte */
--
2.7.4
^ permalink raw reply related
* [PATCH v2 4/8] crypto: arm64/sha2-ce - fix for big endian
From: Ard Biesheuvel @ 2016-10-11 18:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476209720-21114-1-git-send-email-ard.biesheuvel@linaro.org>
The SHA256 digest is an array of 8 32-bit quantities, so we should refer
to them as such in order for this code to work correctly when built for
big endian. So replace 16 byte scalar loads and stores with 4x32 vector
ones where appropriate.
Fixes: 6ba6c74dfc6b ("arm64/crypto: SHA-224/SHA-256 using ARMv8 Crypto Extensions")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/crypto/sha2-ce-core.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/crypto/sha2-ce-core.S b/arch/arm64/crypto/sha2-ce-core.S
index 5df9d9d470ad..01cfee066837 100644
--- a/arch/arm64/crypto/sha2-ce-core.S
+++ b/arch/arm64/crypto/sha2-ce-core.S
@@ -85,7 +85,7 @@ ENTRY(sha2_ce_transform)
ld1 {v12.4s-v15.4s}, [x8]
/* load state */
- ldp dga, dgb, [x0]
+ ld1 {dgav.4s, dgbv.4s}, [x0]
/* load sha256_ce_state::finalize */
ldr w4, [x0, #:lo12:sha256_ce_offsetof_finalize]
@@ -148,6 +148,6 @@ CPU_LE( rev32 v19.16b, v19.16b )
b 1b
/* store new state */
-3: stp dga, dgb, [x0]
+3: st1 {dgav.4s, dgbv.4s}, [x0]
ret
ENDPROC(sha2_ce_transform)
--
2.7.4
^ permalink raw reply related
* [PATCH v2 3/8] crypto: arm64/sha1-ce - fix for big endian
From: Ard Biesheuvel @ 2016-10-11 18:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476209720-21114-1-git-send-email-ard.biesheuvel@linaro.org>
The SHA1 digest is an array of 5 32-bit quantities, so we should refer
to them as such in order for this code to work correctly when built for
big endian. So replace 16 byte scalar loads and stores with 4x4 vector
ones where appropriate.
Fixes: 2c98833a42cd ("arm64/crypto: SHA-1 using ARMv8 Crypto Extensions")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/crypto/sha1-ce-core.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/crypto/sha1-ce-core.S b/arch/arm64/crypto/sha1-ce-core.S
index 033aae6d732a..c98e7e849f06 100644
--- a/arch/arm64/crypto/sha1-ce-core.S
+++ b/arch/arm64/crypto/sha1-ce-core.S
@@ -78,7 +78,7 @@ ENTRY(sha1_ce_transform)
ld1r {k3.4s}, [x6]
/* load state */
- ldr dga, [x0]
+ ld1 {dgav.4s}, [x0]
ldr dgb, [x0, #16]
/* load sha1_ce_state::finalize */
@@ -144,7 +144,7 @@ CPU_LE( rev32 v11.16b, v11.16b )
b 1b
/* store new state */
-3: str dga, [x0]
+3: st1 {dgav.4s}, [x0]
str dgb, [x0, #16]
ret
ENDPROC(sha1_ce_transform)
--
2.7.4
^ permalink raw reply related
* [PATCH v2 2/8] crypto: arm64/ghash-ce - fix for big endian
From: Ard Biesheuvel @ 2016-10-11 18:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476209720-21114-1-git-send-email-ard.biesheuvel@linaro.org>
The GHASH key and digest are both pairs of 64-bit quantities, but the
GHASH code does not always refer to them as such, causing failures when
built for big endian. So replace the 16x1 loads and stores with 2x8 ones.
Fixes: b913a6404ce2 ("arm64/crypto: improve performance of GHASH algorithm")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/crypto/ghash-ce-core.S | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/crypto/ghash-ce-core.S b/arch/arm64/crypto/ghash-ce-core.S
index dc457015884e..f0bb9f0b524f 100644
--- a/arch/arm64/crypto/ghash-ce-core.S
+++ b/arch/arm64/crypto/ghash-ce-core.S
@@ -29,8 +29,8 @@
* struct ghash_key const *k, const char *head)
*/
ENTRY(pmull_ghash_update)
- ld1 {SHASH.16b}, [x3]
- ld1 {XL.16b}, [x1]
+ ld1 {SHASH.2d}, [x3]
+ ld1 {XL.2d}, [x1]
movi MASK.16b, #0xe1
ext SHASH2.16b, SHASH.16b, SHASH.16b, #8
shl MASK.2d, MASK.2d, #57
@@ -74,6 +74,6 @@ CPU_LE( rev64 T1.16b, T1.16b )
cbnz w0, 0b
- st1 {XL.16b}, [x1]
+ st1 {XL.2d}, [x1]
ret
ENDPROC(pmull_ghash_update)
--
2.7.4
^ permalink raw reply related
* [PATCH v2 1/8] crypto: arm64/aes-ce - fix for big endian
From: Ard Biesheuvel @ 2016-10-11 18:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476209720-21114-1-git-send-email-ard.biesheuvel@linaro.org>
The core AES cipher implementation that uses ARMv8 Crypto Extensions
instructions erroneously loads the round keys as 64-bit quantities,
which causes the algorithm to fail when built for big endian. In
addition, the key schedule generation routine fails to take endianness
into account as well, when loading the combining the input key with
the round constants. So fix both issues.
Fixes: 12ac3efe74f8 ("arm64/crypto: use crypto instructions to generate AES key schedule")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/crypto/aes-ce-cipher.c | 25 ++++++++++++--------
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/crypto/aes-ce-cipher.c b/arch/arm64/crypto/aes-ce-cipher.c
index f7bd9bf0bbb3..50d9fe11d0c8 100644
--- a/arch/arm64/crypto/aes-ce-cipher.c
+++ b/arch/arm64/crypto/aes-ce-cipher.c
@@ -47,24 +47,24 @@ static void aes_cipher_encrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[])
kernel_neon_begin_partial(4);
__asm__(" ld1 {v0.16b}, %[in] ;"
- " ld1 {v1.2d}, [%[key]], #16 ;"
+ " ld1 {v1.16b}, [%[key]], #16 ;"
" cmp %w[rounds], #10 ;"
" bmi 0f ;"
" bne 3f ;"
" mov v3.16b, v1.16b ;"
" b 2f ;"
"0: mov v2.16b, v1.16b ;"
- " ld1 {v3.2d}, [%[key]], #16 ;"
+ " ld1 {v3.16b}, [%[key]], #16 ;"
"1: aese v0.16b, v2.16b ;"
" aesmc v0.16b, v0.16b ;"
- "2: ld1 {v1.2d}, [%[key]], #16 ;"
+ "2: ld1 {v1.16b}, [%[key]], #16 ;"
" aese v0.16b, v3.16b ;"
" aesmc v0.16b, v0.16b ;"
- "3: ld1 {v2.2d}, [%[key]], #16 ;"
+ "3: ld1 {v2.16b}, [%[key]], #16 ;"
" subs %w[rounds], %w[rounds], #3 ;"
" aese v0.16b, v1.16b ;"
" aesmc v0.16b, v0.16b ;"
- " ld1 {v3.2d}, [%[key]], #16 ;"
+ " ld1 {v3.16b}, [%[key]], #16 ;"
" bpl 1b ;"
" aese v0.16b, v2.16b ;"
" eor v0.16b, v0.16b, v3.16b ;"
@@ -92,24 +92,24 @@ static void aes_cipher_decrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[])
kernel_neon_begin_partial(4);
__asm__(" ld1 {v0.16b}, %[in] ;"
- " ld1 {v1.2d}, [%[key]], #16 ;"
+ " ld1 {v1.16b}, [%[key]], #16 ;"
" cmp %w[rounds], #10 ;"
" bmi 0f ;"
" bne 3f ;"
" mov v3.16b, v1.16b ;"
" b 2f ;"
"0: mov v2.16b, v1.16b ;"
- " ld1 {v3.2d}, [%[key]], #16 ;"
+ " ld1 {v3.16b}, [%[key]], #16 ;"
"1: aesd v0.16b, v2.16b ;"
" aesimc v0.16b, v0.16b ;"
- "2: ld1 {v1.2d}, [%[key]], #16 ;"
+ "2: ld1 {v1.16b}, [%[key]], #16 ;"
" aesd v0.16b, v3.16b ;"
" aesimc v0.16b, v0.16b ;"
- "3: ld1 {v2.2d}, [%[key]], #16 ;"
+ "3: ld1 {v2.16b}, [%[key]], #16 ;"
" subs %w[rounds], %w[rounds], #3 ;"
" aesd v0.16b, v1.16b ;"
" aesimc v0.16b, v0.16b ;"
- " ld1 {v3.2d}, [%[key]], #16 ;"
+ " ld1 {v3.16b}, [%[key]], #16 ;"
" bpl 1b ;"
" aesd v0.16b, v2.16b ;"
" eor v0.16b, v0.16b, v3.16b ;"
@@ -173,7 +173,12 @@ int ce_aes_expandkey(struct crypto_aes_ctx *ctx, const u8 *in_key,
u32 *rki = ctx->key_enc + (i * kwords);
u32 *rko = rki + kwords;
+#ifndef CONFIG_CPU_BIG_ENDIAN
rko[0] = ror32(aes_sub(rki[kwords - 1]), 8) ^ rcon[i] ^ rki[0];
+#else
+ rko[0] = rol32(aes_sub(rki[kwords - 1]), 8) ^ (rcon[i] << 24) ^
+ rki[0];
+#endif
rko[1] = rko[0] ^ rki[1];
rko[2] = rko[1] ^ rki[2];
rko[3] = rko[2] ^ rki[3];
--
2.7.4
^ permalink raw reply related
* [PATCH v2 0/8] crypto: ARM/arm64 - big endian fixes
From: Ard Biesheuvel @ 2016-10-11 18:15 UTC (permalink / raw)
To: linux-arm-kernel
As it turns out, none of the accelerated crypto routines under arch/arm64/crypto
currently work, or have ever worked correctly when built for big endian. So this
series fixes all of them. This v2 now includes a similar fix for 32-bit ARM as
well, and an additional fix for XTS which escaped my attention before.
Each of these patches carries a fixes tag, and could be backported to stable.
However, for patches #1 and #5, the fixes tag denotes the oldest commit that the
fix is compatible with, not the patch that introduced the algorithm. This is due
to the fact that the key schedules are incompatible between generic AES and the
arm64 Crypto Extensions implementation (but only when building for big endian)
This is not a problem in practice, but it does mean that the AES-CCM and AES in
EBC/CBC/CTR/XTS mode implementations before v3.19 require a different fix, i.e.,
one that is compatible with the generic AES key schedule generation code (which
it currently no longer uses)
In any case, please apply with cc to stable.
Ard Biesheuvel (8):
crypto: arm64/aes-ce - fix for big endian
crypto: arm64/ghash-ce - fix for big endian
crypto: arm64/sha1-ce - fix for big endian
crypto: arm64/sha2-ce - fix for big endian
crypto: arm64/aes-ccm-ce: fix for big endian
crypto: arm64/aes-neon - fix for big endian
crypto: arm64/aes-xts-ce: fix for big endian
crypto: arm/aes-ce - fix for big endian
arch/arm/crypto/aes-ce-glue.c | 5 ++
arch/arm64/crypto/aes-ce-ccm-core.S | 53 ++++++++++----------
arch/arm64/crypto/aes-ce-cipher.c | 25 +++++----
arch/arm64/crypto/aes-ce.S | 1 +
arch/arm64/crypto/aes-modes.S | 3 +-
arch/arm64/crypto/aes-neon.S | 25 +++++----
arch/arm64/crypto/ghash-ce-core.S | 6 +--
arch/arm64/crypto/sha1-ce-core.S | 4 +-
arch/arm64/crypto/sha2-ce-core.S | 4 +-
9 files changed, 72 insertions(+), 54 deletions(-)
--
2.7.4
^ permalink raw reply
* The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula
From: Fabio Estevam @ 2016-10-11 18:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <WM!8ae38b052eee9a42a4712d13aee34e2d793055d4125e98cc2c03451811f33168b3556d3bf52ee5ba8dda879cea808cdc!@dg.advantech.com>
Hi Ken,
On Tue, Oct 11, 2016 at 2:49 PM, Ken.Lin <ken.lin@advantech.com> wrote:
> With the patches applied, the pixel clock (148500000 required for 1920x1080 at 60) is correct as we checked in kernel 4.7 and the actual measurement result looked good as we expected.
> I think the patches should fix the issue.
That's good news. Thanks for testing.
Emil is working on a v3 version of the patch series.
Emil,
Please add Ken Lin on Cc when you submit v3.
^ permalink raw reply
* [PATCH] ARM: imx: gpc: Initialize all power domains
From: Fabio Estevam @ 2016-10-11 17:53 UTC (permalink / raw)
To: linux-arm-kernel
When booting a kernel built with multi_v7_defconfig the following
probe error is seen:
imx-gpc: probe of 20dc000.gpc failed with error -22
Later on the kernel crashes like this:
[ 1.723358] Unable to handle kernel NULL pointer dereference at virtual address 00000040
[ 1.731500] pgd = c0204000
[ 1.731863] hctosys: unable to open rtc device (rtc0)
[ 1.739301] [00000040] *pgd=00000000
[ 1.739310] Internal error: Oops: 5 [#1] SMP ARM
[ 1.739319] Modules linked in:
[ 1.739328] CPU: 1 PID: 95 Comm: kworker/1:4 Not tainted 4.8.0-11897-g6b5e09a #1
[ 1.739331] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[ 1.739352] Workqueue: pm genpd_power_off_work_fn
[ 1.739356] task: ee63d400 task.stack: ee70a000
[ 1.739365] PC is at mutex_lock+0xc/0x4c
[ 1.739374] LR is at regulator_disable+0x2c/0x60
[ 1.739379] pc : [<c0bc0da0>] lr : [<c06e4b10>] psr: 60000013
[ 1.739379] sp : ee70beb0 ip : 10624dd3 fp : ee6e6280
[ 1.739382] r10: eefb0900 r9 : 00000000 r8 : c1309918
[ 1.739385] r7 : 00000000 r6 : 00000040 r5 : 00000000 r4 : 00000040
[ 1.739390] r3 : 0000004c r2 : 7fffd540 r1 : 000001e4 r0 : 00000040
The gpc probe fails because of_genpd_add_provider_onecell() checks
if all the domains are initialized via pm_genpd_present() function
and it returns an error on the multi_v7_defconfig case.
In order to fix this error, initialize all the imx_gpc_domains, not
only the imx6q_pu_domain.base one.
Reported-by: Olof's autobooter <build@lixom.net>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
arch/arm/mach-imx/gpc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
index 0df062d..d0463e9 100644
--- a/arch/arm/mach-imx/gpc.c
+++ b/arch/arm/mach-imx/gpc.c
@@ -430,7 +430,8 @@ static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg)
if (!IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS))
return 0;
- pm_genpd_init(&imx6q_pu_domain.base, NULL, false);
+ for (i = 0; i < ARRAY_SIZE(imx_gpc_domains); i++)
+ pm_genpd_init(imx_gpc_domains[i], NULL, false);
return of_genpd_add_provider_onecell(dev->of_node,
&imx_gpc_onecell_data);
--
2.7.4
^ permalink raw reply related
* The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula
From: Ken.Lin @ 2016-10-11 17:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <WM!8b5ef465717800ac4466674b98bb32450dc231d955cd4979ca96fd54828a7c3af7de5f376015ebf046c75f20677161c6!@dgg.advantech.com>
Hi Fabio,
> -----Original Message-----
> From: Fabio Estevam [mailto:festevam at gmail.com]
> Sent: Thursday, October 6, 2016 4:38 PM
> To: Ken.Lin
> Cc: shawnguo at kernel.org; kernel at pengutronix.de; sboyd at codeaurora.org;
> mturquette at baylibre.com; linux-arm-kernel at lists.infradead.org; linux-
> clk at vger.kernel.org; linux-kernel at vger.kernel.org; Peter.Stretz; Peter.Chiang;
> Akshay Bhat; Jason Moss; emil at limesaudio.com
> Subject: Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate
> formula
>
> Hi Ken,
>
> On Thu, Oct 6, 2016 at 8:26 PM, Ken.Lin <ken.lin@advantech.com> wrote:
> > Hi,
> >
> > We found a possible regression issue (not seen in kernel 4.7-stable), which has
> to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c
> when we did a DP test (1920x1080 at 60) with clock source PLL5.
> > The DP desired pixel clock (148.5MHz that is calculated from the input of PLL
> output frequency) would be correct again when we reverted this commit.
> > Could you please help check if the commit has the side effect since it would
> have impacts on our on-going project when it requires moving from kernel 4.7
> to kernel 4.8 or newer version?
> >
> > Please check the following URL for the details
> > https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_
> > imx_correct_VL_PLL_rate_formula.pdf?dl=0
>
> Do these patches from Emil fix the issue?
>
> http://www.spinics.net/lists/arm-kernel/msg535204.html
>
> and
>
> http://www.spinics.net/lists/arm-kernel/msg535203.html
>
> Thanks
With the patches applied, the pixel clock (148500000 required for 1920x1080 at 60) is correct as we checked in kernel 4.7 and the actual measurement result looked good as we expected.
I think the patches should fix the issue.
Ref: /sys/kernel/debug/clk/clk_summary
pll5 1 1 1039500000 0 0
pll5_bypass 1 1 1039500000 0 0
pll5_video 1 1 1039500000 0 0
pll5_post_div 1 1 519750000 0 0
pll5_video_div 2 2 519750000 0 0
ipu2_di1_pre_sel 0 0 519750000 0 0
ipu2_di1_pre 0 0 173250000 0 0
ipu2_di1_sel 0 0 173250000 0 0
ipu2_di1 0 0 173250000 0 0
ipu2_di0_pre_sel 0 0 519750000 0 0
ipu2_di0_pre 0 0 173250000 0 0
ldb_di1_sel 1 1 519750000 0 0
ldb_di1_div_3_5 1 1 148500000 0 0
ldb_di1_podf 1 1 148500000 0 0
ldb_di1 2 2 148500000 0 0
ipu2_di0_sel 1 1 148500000 0 0
ipu2_di0 1 1 148500000 0 0
ldb_di0_sel 1 1 519750000 0 0
ldb_di0_div_3_5 1 1 148500000 0 0
ldb_di0_podf 1 1 148500000 0 0
ldb_di0 1 1 148500000 0 0
Ref: kernel debug messages
[ 113.848959] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: mode->hdisplay: 1920
[ 113.857201] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: mode->vdisplay: 1080
[ 113.865421] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: attached to encoder types 0x8
[ 113.874483] imx-ipuv3 2800000.ipu: disp 0: panel size = 1920 x 1080
[ 113.880803] imx-ipuv3 2800000.ipu: Clocks: IPU 264000000Hz DI 75833334Hz Needed 148500000Hz
[ 113.889252] imx-ipuv3 2800000.ipu: Want 148500000Hz IPU 264000000Hz DI 75833334Hz using DI, 75833334Hz
[ 113.898768] imx-ldb 2000000.aips-bus:ldb at 020e0008: imx_ldb_set_clock: now: 227500000 want: 519750000
[ 113.908018] imx-ldb 2000000.aips-bus:ldb at 020e0008: imx_ldb_set_clock after: 519750000
[ 113.915886] imx-ldb 2000000.aips-bus:ldb at 020e0008: imx_ldb_set_clock: now: 148500000 want: 148500000
[ 113.925050] imx-ldb 2000000.aips-bus:ldb at 020e0008: imx_ldb_set_clock after: 148500000
[ 113.932928] imx-ldb 2000000.aips-bus:ldb at 020e0008: imx_ldb_set_clock: now: 519750000 want: 519750000
[ 113.942096] imx-ldb 2000000.aips-bus:ldb at 020e0008: imx_ldb_set_clock after: 519750000
[ 113.949938] imx-ldb 2000000.aips-bus:ldb at 020e0008: imx_ldb_set_clock: now: 148500000 want: 148500000
[ 113.959104] imx-ldb 2000000.aips-bus:ldb at 020e0008: imx_ldb_set_clock after: 148500000
>
> --
> This message has been scanned for viruses and dangerous content by
> MailScanner, and is believed to be clean.
Thank you
--
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
^ permalink raw reply
* [PATCH 3/5] Input: add driver for Ilitek ili2139 touch IC
From: Dmitry Torokhov @ 2016-10-11 17:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161011003359.26079-3-icenowy@aosc.xyz>
Hi Icenowy,
On Tue, Oct 11, 2016 at 08:33:57AM +0800, Icenowy Zheng wrote:
> This driver adds support for Ilitek ili2139 touch IC, which is used in
> several Colorfly tablets (for example, Colorfly E708 Q1, which is an
> Allwinner A31s tablet with mainline kernel support).
>
> Theortically it may support more Ilitek touch ICs, however, only ili2139
> is used in any mainlined device.
>
> It supports device tree enumeration, with screen resolution and axis
> quirks configurable.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Please extend ili210x.c instead of adding brand new driver, they look
very similar.
Thanks.
> ---
> drivers/input/touchscreen/Kconfig | 14 ++
> drivers/input/touchscreen/Makefile | 1 +
> drivers/input/touchscreen/ili2139.c | 320 ++++++++++++++++++++++++++++++++++++
> 3 files changed, 335 insertions(+)
> create mode 100644 drivers/input/touchscreen/ili2139.c
>
> diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
> index 5079813..bb4d9d2 100644
> --- a/drivers/input/touchscreen/Kconfig
> +++ b/drivers/input/touchscreen/Kconfig
> @@ -348,6 +348,20 @@ config TOUCHSCREEN_ILI210X
> To compile this driver as a module, choose M here: the
> module will be called ili210x.
>
> +config TOUCHSCREEN_ILI2139
> + tristate "Ilitek ILI2139 based touchscreen"
> + depends on I2C
> + depends on OF
> + help
> + Say Y here if you have a ILI2139 based touchscreen
> + controller. Such kind of chipsets can be found in several
> + Colorfly tablets.
> +
> + If unsure, say N.
> +
> + To compile this driver as a module, choose M here; the
> + module will be called ili2139.
> +
> config TOUCHSCREEN_IPROC
> tristate "IPROC touch panel driver support"
> depends on ARCH_BCM_IPROC || COMPILE_TEST
> diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
> index 81b8645..930b5e2 100644
> --- a/drivers/input/touchscreen/Makefile
> +++ b/drivers/input/touchscreen/Makefile
> @@ -40,6 +40,7 @@ obj-$(CONFIG_TOUCHSCREEN_EGALAX_SERIAL) += egalax_ts_serial.o
> obj-$(CONFIG_TOUCHSCREEN_FUJITSU) += fujitsu_ts.o
> obj-$(CONFIG_TOUCHSCREEN_GOODIX) += goodix.o
> obj-$(CONFIG_TOUCHSCREEN_ILI210X) += ili210x.o
> +obj-$(CONFIG_TOUCHSCREEN_ILI2139) += ili2139.o
> obj-$(CONFIG_TOUCHSCREEN_IMX6UL_TSC) += imx6ul_tsc.o
> obj-$(CONFIG_TOUCHSCREEN_INEXIO) += inexio.o
> obj-$(CONFIG_TOUCHSCREEN_INTEL_MID) += intel-mid-touch.o
> diff --git a/drivers/input/touchscreen/ili2139.c b/drivers/input/touchscreen/ili2139.c
> new file mode 100644
> index 0000000..65c2dea
> --- /dev/null
> +++ b/drivers/input/touchscreen/ili2139.c
> @@ -0,0 +1,320 @@
> +/* -------------------------------------------------------------------------
> + * Copyright (C) 2016, Icenowy Zheng <icenowy@aosc.xyz>
> + *
> + * Derived from:
> + * ili210x.c
> + * Copyright (C) Olivier Sobrie <olivier@sobrie.be>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + * -------------------------------------------------------------------------
> + */
> +
> +#include <linux/module.h>
> +#include <linux/i2c.h>
> +#include <linux/interrupt.h>
> +#include <linux/slab.h>
> +#include <linux/input.h>
> +#include <linux/input/mt.h>
> +#include <linux/input/touchscreen.h>
> +#include <linux/delay.h>
> +#include <linux/workqueue.h>
> +
> +#define DEFAULT_POLL_PERIOD 20
> +
> +#define MAX_TOUCHES 10
> +#define COMPATIBLE_TOUCHES 2
> +
> +/* Touchscreen commands */
> +#define REG_TOUCHDATA 0x10
> +#define REG_TOUCHSUBDATA 0x11
> +#define REG_PANEL_INFO 0x20
> +#define REG_FIRMWARE_VERSION 0x40
> +#define REG_PROTO_VERSION 0x42
> +
> +#define SUBDATA_STATUS_TOUCH_POINT 0x80
> +#define SUBDATA_STATUS_RELEASE_POINT 0x00
> +
> +struct finger {
> + u8 x_low;
> + u8 x_high;
> + u8 y_low;
> + u8 y_high;
> +} __packed;
> +
> +struct touchdata {
> + u8 length;
> + struct finger finger[COMPATIBLE_TOUCHES];
> +} __packed;
> +
> +struct touch_subdata {
> + u8 status;
> + struct finger finger;
> +} __packed;
> +
> +struct panel_info {
> + struct finger finger_max;
> + u8 xchannel_num;
> + u8 ychannel_num;
> +} __packed;
> +
> +struct firmware_version {
> + u8 id;
> + u8 major;
> + u8 minor;
> +} __packed;
> +
> +struct ili2139 {
> + struct i2c_client *client;
> + struct input_dev *input;
> + unsigned int poll_period;
> + struct delayed_work dwork;
> + struct touchscreen_properties prop;
> + int slots[MAX_TOUCHES];
> + int ids[MAX_TOUCHES];
> + struct input_mt_pos pos[MAX_TOUCHES];
> +};
> +
> +static int ili2139_read_reg(struct i2c_client *client, u8 reg, void *buf,
> + size_t len)
> +{
> + struct i2c_msg msg[2] = {
> + {
> + .addr = client->addr,
> + .flags = 0,
> + .len = 1,
> + .buf = ®,
> + },
> + {
> + .addr = client->addr,
> + .flags = I2C_M_RD,
> + .len = len,
> + .buf = buf,
> + }
> + };
> +
> + if (i2c_transfer(client->adapter, msg, 2) != 2) {
> + dev_err(&client->dev, "i2c transfer failed\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static void ili2139_work(struct work_struct *work)
> +{
> + int id;
> + struct ili2139 *priv = container_of(work, struct ili2139,
> + dwork.work);
> + struct i2c_client *client = priv->client;
> + struct touchdata touchdata;
> + struct touch_subdata subdata;
> + int error;
> +
> + error = ili2139_read_reg(client, REG_TOUCHDATA,
> + &touchdata, sizeof(touchdata));
> + if (error) {
> + dev_err(&client->dev,
> + "Unable to get touchdata, err = %d\n", error);
> + return;
> + }
> +
> + for (id = 0; id < touchdata.length; id++) {
> + error = ili2139_read_reg(client, REG_TOUCHSUBDATA, &subdata,
> + sizeof(subdata));
> + if (error) {
> + dev_err(&client->dev,
> + "Unable to get touch subdata, err = %d\n",
> + error);
> + return;
> + }
> +
> + priv->ids[id] = subdata.status & 0x3F;
> +
> + /* The sequence changed in the v2 subdata protocol. */
> + touchscreen_set_mt_pos(&priv->pos[id], &priv->prop,
> + (subdata.finger.x_high | (subdata.finger.x_low << 8)),
> + (subdata.finger.y_high | (subdata.finger.y_low << 8)));
> + }
> +
> + input_mt_assign_slots(priv->input, priv->slots, priv->pos,
> + touchdata.length, 0);
> +
> + for (id = 0; id < touchdata.length; id++) {
> + input_mt_slot(priv->input, priv->slots[id]);
> + input_mt_report_slot_state(priv->input, MT_TOOL_FINGER,
> + subdata.status &
> + SUBDATA_STATUS_TOUCH_POINT);
> + input_report_abs(priv->input, ABS_MT_POSITION_X,
> + priv->pos[id].x);
> + input_report_abs(priv->input, ABS_MT_POSITION_Y,
> + priv->pos[id].y);
> + }
> +
> + input_mt_sync_frame(priv->input);
> + input_sync(priv->input);
> +
> + schedule_delayed_work(&priv->dwork,
> + msecs_to_jiffies(priv->poll_period));
> +}
> +
> +static irqreturn_t ili2139_irq(int irq, void *irq_data)
> +{
> + struct ili2139 *priv = irq_data;
> +
> + schedule_delayed_work(&priv->dwork, 0);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int ili2139_i2c_probe(struct i2c_client *client,
> + const struct i2c_device_id *id)
> +{
> + struct device *dev = &client->dev;
> + struct ili2139 *priv;
> + struct input_dev *input;
> + struct panel_info panel;
> + struct firmware_version firmware;
> + int xmax, ymax;
> + int error;
> +
> + dev_dbg(dev, "Probing for ILI2139 I2C Touschreen driver");
> +
> + if (client->irq <= 0) {
> + dev_err(dev, "No IRQ!\n");
> + return -ENODEV;
> + }
> +
> + /* Get firmware version */
> + error = ili2139_read_reg(client, REG_FIRMWARE_VERSION,
> + &firmware, sizeof(firmware));
> + if (error) {
> + dev_err(dev, "Failed to get firmware version, err: %d\n",
> + error);
> + return error;
> + }
> +
> + /* get panel info */
> + error = ili2139_read_reg(client, REG_PANEL_INFO, &panel, sizeof(panel));
> + if (error) {
> + dev_err(dev, "Failed to get panel information, err: %d\n",
> + error);
> + return error;
> + }
> +
> + xmax = panel.finger_max.x_low | (panel.finger_max.x_high << 8);
> + ymax = panel.finger_max.y_low | (panel.finger_max.y_high << 8);
> +
> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + input = devm_input_allocate_device(dev);
> + if (!priv || !input)
> + return -ENOMEM;
> +
> + priv->client = client;
> + priv->input = input;
> + priv->poll_period = DEFAULT_POLL_PERIOD;
> + INIT_DELAYED_WORK(&priv->dwork, ili2139_work);
> +
> + /* Setup input device */
> + input->name = "ILI2139 Touchscreen";
> + input->id.bustype = BUS_I2C;
> + input->dev.parent = dev;
> +
> + __set_bit(EV_SYN, input->evbit);
> + __set_bit(EV_KEY, input->evbit);
> + __set_bit(EV_ABS, input->evbit);
> +
> + /* Multi touch */
> + input_mt_init_slots(input, MAX_TOUCHES, INPUT_MT_DIRECT |
> + INPUT_MT_DROP_UNUSED | INPUT_MT_TRACK);
> + input_set_abs_params(input, ABS_MT_POSITION_X, 0, xmax, 0, 0);
> + input_set_abs_params(input, ABS_MT_POSITION_Y, 0, ymax, 0, 0);
> +
> + touchscreen_parse_properties(input, true, &priv->prop);
> +
> + input_set_drvdata(input, priv);
> + i2c_set_clientdata(client, priv);
> +
> + error = devm_request_irq(dev, client->irq, ili2139_irq,
> + IRQF_TRIGGER_FALLING, client->name, priv);
> + if (error) {
> + dev_err(dev, "Unable to request touchscreen IRQ, err: %d\n",
> + error);
> + return error;
> + }
> +
> + error = input_register_device(priv->input);
> + if (error) {
> + dev_err(dev, "Cannot register input device, err: %d\n", error);
> + return error;
> + }
> +
> + device_init_wakeup(&client->dev, 1);
> +
> + dev_dbg(dev,
> + "ILI2139 initialized (IRQ: %d), firmware version %d.%d.%d",
> + client->irq, firmware.id, firmware.major, firmware.minor);
> +
> + return 0;
> +}
> +
> +static int ili2139_i2c_remove(struct i2c_client *client)
> +{
> + struct ili2139 *priv = i2c_get_clientdata(client);
> +
> + cancel_delayed_work_sync(&priv->dwork);
> +
> + return 0;
> +}
> +
> +static int __maybe_unused ili2139_i2c_suspend(struct device *dev)
> +{
> + struct i2c_client *client = to_i2c_client(dev);
> +
> + if (device_may_wakeup(&client->dev))
> + enable_irq_wake(client->irq);
> +
> + return 0;
> +}
> +
> +static int __maybe_unused ili2139_i2c_resume(struct device *dev)
> +{
> + struct i2c_client *client = to_i2c_client(dev);
> +
> + if (device_may_wakeup(&client->dev))
> + disable_irq_wake(client->irq);
> +
> + return 0;
> +}
> +
> +static SIMPLE_DEV_PM_OPS(ili2139_i2c_pm,
> + ili2139_i2c_suspend, ili2139_i2c_resume);
> +
> +static const struct i2c_device_id ili2139_i2c_id[] = {
> + { "ili2139", 0 },
> + { }
> +};
> +MODULE_DEVICE_TABLE(i2c, ili2139_i2c_id);
> +
> +static struct i2c_driver ili2139_ts_driver = {
> + .driver = {
> + .name = "ili2139_i2c",
> + .pm = &ili2139_i2c_pm,
> + },
> + .id_table = ili2139_i2c_id,
> + .probe = ili2139_i2c_probe,
> + .remove = ili2139_i2c_remove,
> +};
> +
> +module_i2c_driver(ili2139_ts_driver);
> +
> +MODULE_AUTHOR("Olivier Sobrie <olivier@sobrie.be>");
> +MODULE_DESCRIPTION("ILI2139 I2C Touchscreen Driver");
> +MODULE_LICENSE("GPL");
> --
> 2.10.1
>
--
Dmitry
^ permalink raw reply
* [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1
From: Suzuki K Poulose @ 2016-10-11 17:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475875882-2604-3-git-send-email-tbaicar@codeaurora.org>
On 07/10/16 22:31, Tyler Baicar wrote:
> Currently when a RAS error is reported it is not timestamped.
> The ACPI 6.1 spec adds the timestamp field to the generic error
> data entry v3 structure. The timestamp of when the firmware
> generated the error is now being reported.
>
> Signed-off-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
> Signed-off-by: Richard Ruigrok <rruigrok@codeaurora.org>
> Signed-off-by: Tyler Baicar <tbaicar@codeaurora.org>
> Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Please could you keep the people who reviewed/commented on your series in the past,
whenever you post a new version ?
> ---
> drivers/acpi/apei/ghes.c | 25 ++++++++++--
> drivers/firmware/efi/cper.c | 97 +++++++++++++++++++++++++++++++++++++++------
> 2 files changed, 105 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c
> index 3021f0e..c8488f1 100644
> --- a/drivers/acpi/apei/ghes.c
> +++ b/drivers/acpi/apei/ghes.c
> @@ -80,6 +80,10 @@
> ((struct acpi_hest_generic_status *) \
> ((struct ghes_estatus_node *)(estatus_node) + 1))
>
> +#define acpi_hest_generic_data_version(gdata) \
> + (gdata->revision >> 8)
...
> +inline void *acpi_hest_generic_data_payload(struct acpi_hest_generic_data *gdata)
> +{
> + return acpi_hest_generic_data_version(gdata) >= 3 ?
> + (void *)(((struct acpi_hest_generic_data_v300 *)(gdata)) + 1) :
> + gdata + 1;
> +}
> +
> diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c
> index d425374..9fa1317 100644
> --- a/drivers/firmware/efi/cper.c
> +++ b/drivers/firmware/efi/cper.c
> +#define acpi_hest_generic_data_version(gdata) \
> + (gdata->revision >> 8)
> +
...
> +static inline void *acpi_hest_generic_data_payload(struct acpi_hest_generic_data *gdata)
> +{
> + return acpi_hest_generic_data_version(gdata) >= 3 ?
> + (void *)(((struct acpi_hest_generic_data_v300 *)(gdata)) + 1) :
> + gdata + 1;
> +}
Could these go to a header file, so that we don't need duplicate definitions of these helpers in
different files ?
> +
> +static void cper_estatus_print_section_v300(const char *pfx,
> + const struct acpi_hest_generic_data_v300 *gdata)
> +{
> + __u8 hour, min, sec, day, mon, year, century, *timestamp;
> +
> + if (gdata->validation_bits & ACPI_HEST_GEN_VALID_TIMESTAMP) {
> + timestamp = (__u8 *)&(gdata->time_stamp);
> + memcpy(&sec, timestamp, 1);
> + memcpy(&min, timestamp + 1, 1);
> + memcpy(&hour, timestamp + 2, 1);
> + memcpy(&day, timestamp + 4, 1);
> + memcpy(&mon, timestamp + 5, 1);
> + memcpy(&year, timestamp + 6, 1);
> + memcpy(¢ury, timestamp + 7, 1);
> + printk("%stime: ", pfx);
> + printk("%7s", 0x01 & *(timestamp + 3) ? "precise" : "");
What format is the (timestamp + 3) stored in ? Does it need conversion ?
> + printk(" %02d:%02d:%02d %02d%02d-%02d-%02d\n",
> + bcd2bin(hour), bcd2bin(min), bcd2bin(sec),
> + bcd2bin(century), bcd2bin(year), bcd2bin(mon),
> + bcd2bin(day));
> + }
minor nit: Would it be easier to order/parse the error messages if the date
is printed first followed by time ?
i.e,
17:20:14 2016-09-15 Mon
vs
2016-09-15 Mon 17:20:14
e.g, people looking at a huge log, looking for logs from a specific date might
find the latter more useful to skip the messages.
> +}
> +
> static void cper_estatus_print_section(
> - const char *pfx, const struct acpi_hest_generic_data *gdata, int sec_no)
> + const char *pfx, struct acpi_hest_generic_data *gdata, int sec_no)
> {
> uuid_le *sec_type = (uuid_le *)gdata->section_type;
> __u16 severity;
> char newpfx[64];
>
> + if ((gdata->revision >> 8) >= 0x03)
Could we use the helper defined above ?
> @@ -451,12 +497,22 @@ void cper_estatus_print(const char *pfx,
> printk("%s""event severity: %s\n", pfx, cper_severity_str(severity));
> data_len = estatus->data_length;
> gdata = (struct acpi_hest_generic_data *)(estatus + 1);
> + if ((gdata->revision >> 8) >= 0x03)
Same as above, use the macro ?
> + gdata_v3 = (struct acpi_hest_generic_data_v300 *)gdata;
> +
> snprintf(newpfx, sizeof(newpfx), "%s%s", pfx, INDENT_SP);
> +
> while (data_len >= sizeof(*gdata)) {
> gedata_len = gdata->error_data_length;
> cper_estatus_print_section(newpfx, gdata, sec_no);
> - data_len -= gedata_len + sizeof(*gdata);
> - gdata = (void *)(gdata + 1) + gedata_len;
> + if(gdata_v3) {
> + data_len -= gedata_len + sizeof(*gdata_v3);
> + gdata_v3 = (void *)(gdata_v3 + 1) + gedata_len;
> + gdata = (struct acpi_hest_generic_data *)gdata_v3;
> + } else {
> + data_len -= gedata_len + sizeof(*gdata);
> + gdata = (void *)(gdata + 1) + gedata_len;
> + }
> sec_no++;
> }
...
>
> @@ -486,15 +543,29 @@ int cper_estatus_check(const struct acpi_hest_generic_status *estatus)
> return rc;
> data_len = estatus->data_length;
> gdata = (struct acpi_hest_generic_data *)(estatus + 1);
> - while (data_len >= sizeof(*gdata)) {
> - gedata_len = gdata->error_data_length;
> - if (gedata_len > data_len - sizeof(*gdata))
> +
> + if ((gdata->revision >> 8) >= 0x03) {
> + gdata_v3 = (struct acpi_hest_generic_data_v300 *)gdata;
> + while (data_len >= sizeof(*gdata_v3)) {
> + gedata_len = gdata_v3->error_data_length;
> + if (gedata_len > data_len - sizeof(*gdata_v3))
> + return -EINVAL;
> + data_len -= gedata_len + sizeof(*gdata_v3);
> + gdata_v3 = (void *)(gdata_v3 + 1) + gedata_len;
> + }
> + if (data_len)
> + return -EINVAL;
> + } else {
> + while (data_len >= sizeof(*gdata)) {
> + gedata_len = gdata->error_data_length;
> + if (gedata_len > data_len - sizeof(*gdata))
> + return -EINVAL;
> + data_len -= gedata_len + sizeof(*gdata);
> + gdata = (void *)(gdata + 1) + gedata_len;
> + }
> + if (data_len)
As mentioned in the previous version, would it make sense to add some more
helpers to deal with record versions ? We seem to be doing the version switch and
code duplication at different places.
Does the following help ? Thoughts ?
#define acpi_hest_generic_data_error_length(gdata) (((struct acpi_hest_generic_data *)(gdata))->error_data_length)
#define acpi_hest_generic_data_size(gdata) \
((acpi_hest_generic_data_version(gdata) >= 3) ? \
sizeof(struct acpi_hest_generic_data_v300) : \
sizeof(struct acpi_hest_generic_data))
#define acpi_hest_generic_data_record_size(gdata)
(acpi_hest_generic_data_size(gdata) + \
acpi_hest_generic_data_error_length(gdata))
#define acpi_hest_generic_data_next(gdata) \
((void *)(gdata) + acpi_hest_generic_data_record_size(gdata))
Suzuki
^ permalink raw reply
* [PATCH] arm64: mmu: set the contiguous for kernel mappings when appropriate
From: Ard Biesheuvel @ 2016-10-11 16:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161011162914.GF9532@arm.com>
On 11 October 2016 at 17:29, Will Deacon <will.deacon@arm.com> wrote:
> On Tue, Oct 11, 2016 at 01:56:26PM +0100, Ard Biesheuvel wrote:
>> On 11 October 2016 at 13:41, Will Deacon <will.deacon@arm.com> wrote:
>> > On Tue, Oct 11, 2016 at 12:17:54PM +0100, Ard Biesheuvel wrote:
>> >> On 11 October 2016 at 10:09, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
>> >> > On 11 October 2016 at 09:48, Steve Capper <steve.capper@linaro.org> wrote:
>> >> >> So in arch/arm64/include/asm/pgtable-hwdef.h, we have:
>> >> >> CONT_PTE_SHIFT
>> >> >> CONT_PMD_SHIFT
>> >> >> CONT_PTES
>> >> >> CONT_PMDS
>> >> >> CONT_PTE_SIZE
>> >> >> CONT_PTE_MASK
>> >> >> ...
>> >> >>
>> >> >> which are used by the contiguous hint HugeTLB code.
>> >> >> Can those be adopted instead of CONT_MASK and CONT_SIZE?
>> >> >>
>> >>
>> >> Looking at the hugetlb code, it appears to support contiguous PMDs for
>> >> 4k and 64k pages as well, while the ARM ARM only defines it for 16k
>> >> pages. I suppose the contiguous bit is simply ignored for level 2
>> >> entries when using 4k or 64k pages kernels, but I think it would be
>> >> better for the code to reflect this as well.
>> >
>> > Which bit in the ARM ARM says that you can't support contiguous PMDs for 4k
>> > and 64k pages? I see that the number of contiguous entries changes between
>> > levels for 16k pages, but that's it.
>> >
>>
>> You are right, the ARM ARM does not say that at all. But given Mark's comment:
>>
>> """
>> With 16K pages, we can have contiguous PMD entries. Should we handle those,
>> too? e.g. have separate {PMD,PTE}_CONT{,_SIZE}?
>> """
>>
>> it seems I am not the only one who is confused about this. In any
>> case, the fact that the ARM ARM documents levels 2 and 3 explicitly
>> for 16k pages does very little to clarify at which levels this bit is
>> defined, and if it is defined at levels < 2, what the granularity is
>> for 16k pages.
>
> I see you're going to work on a more comprehensive v3 (thanks!), but just
> to help clarify this: the contiguous bit is valid whenever a block or page
> (i.e. a leaf) entry is valid. The only complication with 16k pages is that
> the number of contiguous entries changes between level 2 and level 3,
> which makes sense if you think about the TLB entries supported due to
> non-contiguous block mappings in other regimes anyway (and brings into
> question whether people bother with 16G in practice).
>
> That means you can use the contiguous bit as:
>
> 4k: levels 1,2,3 (16G, 32M, 64K)
> 16k: levels 2,3 (1G, 2M)
> 64k: levels 2,3 (16G, 2M)
>
> Hopefully my maths is correct and that clears things up,
>
Yes, that resembles my own calculations. Another complication is that
folded PUDs and PMDs need to be dealt with at the PGD level, but I
think I have worked it out now.
Re 16 GB: are you saying don't bother? Because supporting this would
require ARM64_MEMSTART_SHIFT to be increased to (CONT_PUD_SHIFT +
PUD_SHIFT) or (CONT_PMD_SHIFT + PMD_SHIFT) [for 4k and 16k/64k,
respectively] in order to guarantee that the physical and virtual
addresses are always equal modulo 16 GB (for granules that support
it). It's a nice idea that the linear mapping can be covered by fewer
TLB entries if you have huge amounts of RAM, but if the hardware is
unlikely to honour it, it may not be worth the trouble.
^ permalink raw reply
* [PATCH 4/5] rpmsg: Driver for user space endpoint interface
From: Bjorn Andersson @ 2016-10-11 16:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1005047c-ef7c-ccd8-848c-4974f893c820@st.com>
On Tue 11 Oct 00:46 PDT 2016, loic pallardy wrote:
> On 10/08/2016 06:23 AM, Bjorn Andersson wrote:
[..]
> >diff --git a/drivers/rpmsg/Makefile b/drivers/rpmsg/Makefile
> >index ae9c9132cf76..5daf1209b77d 100644
> >--- a/drivers/rpmsg/Makefile
> >+++ b/drivers/rpmsg/Makefile
> >@@ -1,3 +1,3 @@
> >-obj-$(CONFIG_RPMSG) += rpmsg_core.o
> >+obj-$(CONFIG_RPMSG) += rpmsg_core.o rpmsg_char.o
> Hi Bjorn,
>
> Could you please create a dedicated Kconfig entry for this new interface?
> This should be an option like i2C_dev.
>
No problem, I'll do that.
Regards,
Bjorn
^ permalink raw reply
* [PATCH] arm64: mmu: set the contiguous for kernel mappings when appropriate
From: Will Deacon @ 2016-10-11 16:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKv+Gu_AX80Uts8gtn+PD9F0DWDMU2tEw6PEZg1p6G+ajXS_eg@mail.gmail.com>
On Tue, Oct 11, 2016 at 01:56:26PM +0100, Ard Biesheuvel wrote:
> On 11 October 2016 at 13:41, Will Deacon <will.deacon@arm.com> wrote:
> > On Tue, Oct 11, 2016 at 12:17:54PM +0100, Ard Biesheuvel wrote:
> >> On 11 October 2016 at 10:09, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> >> > On 11 October 2016 at 09:48, Steve Capper <steve.capper@linaro.org> wrote:
> >> >> So in arch/arm64/include/asm/pgtable-hwdef.h, we have:
> >> >> CONT_PTE_SHIFT
> >> >> CONT_PMD_SHIFT
> >> >> CONT_PTES
> >> >> CONT_PMDS
> >> >> CONT_PTE_SIZE
> >> >> CONT_PTE_MASK
> >> >> ...
> >> >>
> >> >> which are used by the contiguous hint HugeTLB code.
> >> >> Can those be adopted instead of CONT_MASK and CONT_SIZE?
> >> >>
> >>
> >> Looking at the hugetlb code, it appears to support contiguous PMDs for
> >> 4k and 64k pages as well, while the ARM ARM only defines it for 16k
> >> pages. I suppose the contiguous bit is simply ignored for level 2
> >> entries when using 4k or 64k pages kernels, but I think it would be
> >> better for the code to reflect this as well.
> >
> > Which bit in the ARM ARM says that you can't support contiguous PMDs for 4k
> > and 64k pages? I see that the number of contiguous entries changes between
> > levels for 16k pages, but that's it.
> >
>
> You are right, the ARM ARM does not say that at all. But given Mark's comment:
>
> """
> With 16K pages, we can have contiguous PMD entries. Should we handle those,
> too? e.g. have separate {PMD,PTE}_CONT{,_SIZE}?
> """
>
> it seems I am not the only one who is confused about this. In any
> case, the fact that the ARM ARM documents levels 2 and 3 explicitly
> for 16k pages does very little to clarify at which levels this bit is
> defined, and if it is defined at levels < 2, what the granularity is
> for 16k pages.
I see you're going to work on a more comprehensive v3 (thanks!), but just
to help clarify this: the contiguous bit is valid whenever a block or page
(i.e. a leaf) entry is valid. The only complication with 16k pages is that
the number of contiguous entries changes between level 2 and level 3,
which makes sense if you think about the TLB entries supported due to
non-contiguous block mappings in other regimes anyway (and brings into
question whether people bother with 16G in practice).
That means you can use the contiguous bit as:
4k: levels 1,2,3 (16G, 32M, 64K)
16k: levels 2,3 (1G, 2M)
64k: levels 2,3 (16G, 2M)
Hopefully my maths is correct and that clears things up,
Will
^ permalink raw reply
* [PATCH v6 2/2] i2c: qup: support SMBus block read
From: Austin Christ @ 2016-10-11 16:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476203277-6893-1-git-send-email-austinwc@codeaurora.org>
From: Naveen Kaje <nkaje@codeaurora.org>
I2C QUP driver relies on SMBus emulation support from the framework.
To handle SMBus block reads, the driver should check I2C_M_RECV_LEN
flag and should read the first byte received as the message length.
The driver configures the QUP hardware to read one byte. Once the
message length is known from this byte, the QUP hardware is configured
to read the rest.
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Austin Christ <austinwc@codeaurora.org>
Reviewed-by: Sricharan R <sricharan@codeaurora.org>
---
drivers/i2c/busses/i2c-qup.c | 64 +++++++++++++++++++++++++++++++++++++++++---
1 file changed, 61 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index bf0957e..d34120a 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -517,6 +517,33 @@ static int qup_i2c_get_data_len(struct qup_i2c_dev *qup)
return data_len;
}
+static bool qup_i2c_check_msg_len(struct i2c_msg *msg)
+{
+ return ((msg->flags & I2C_M_RD) && (msg->flags & I2C_M_RECV_LEN));
+}
+
+static int qup_i2c_set_tags_smb(u16 addr, u8 *tags, struct qup_i2c_dev *qup,
+ struct i2c_msg *msg)
+{
+ int len = 0;
+
+ if (msg->len > 1) {
+ tags[len++] = QUP_TAG_V2_DATARD_STOP;
+ tags[len++] = qup_i2c_get_data_len(qup) - 1;
+ } else {
+ tags[len++] = QUP_TAG_V2_START;
+ tags[len++] = addr & 0xff;
+
+ if (msg->flags & I2C_M_TEN)
+ tags[len++] = addr >> 8;
+
+ tags[len++] = QUP_TAG_V2_DATARD;
+ /* Read 1 byte indicating the length of the SMBus message */
+ tags[len++] = 1;
+ }
+ return len;
+}
+
static int qup_i2c_set_tags(u8 *tags, struct qup_i2c_dev *qup,
struct i2c_msg *msg, int is_dma)
{
@@ -526,6 +553,10 @@ static int qup_i2c_set_tags(u8 *tags, struct qup_i2c_dev *qup,
int last = (qup->blk.pos == (qup->blk.count - 1)) && (qup->is_last);
+ /* Handle tags for SMBus block read */
+ if (qup_i2c_check_msg_len(msg))
+ return qup_i2c_set_tags_smb(addr, tags, qup, msg);
+
if (qup->blk.pos == 0) {
tags[len++] = QUP_TAG_V2_START;
tags[len++] = addr & 0xff;
@@ -1065,9 +1096,17 @@ static int qup_i2c_read_fifo_v2(struct qup_i2c_dev *qup,
struct i2c_msg *msg)
{
u32 val;
- int idx, pos = 0, ret = 0, total;
+ int idx, pos = 0, ret = 0, total, msg_offset = 0;
+ /*
+ * If the message length is already read in
+ * the first byte of the buffer, account for
+ * that by setting the offset
+ */
+ if (qup_i2c_check_msg_len(msg) && (msg->len > 1))
+ msg_offset = 1;
total = qup_i2c_get_data_len(qup);
+ total -= msg_offset;
/* 2 extra bytes for read tags */
while (pos < (total + 2)) {
@@ -1087,8 +1126,8 @@ static int qup_i2c_read_fifo_v2(struct qup_i2c_dev *qup,
if (pos >= (total + 2))
goto out;
-
- msg->buf[qup->pos++] = val & 0xff;
+ msg->buf[qup->pos + msg_offset] = val & 0xff;
+ qup->pos++;
}
}
@@ -1128,6 +1167,20 @@ static int qup_i2c_read_one_v2(struct qup_i2c_dev *qup, struct i2c_msg *msg)
goto err;
qup->blk.pos++;
+
+ /* Handle SMBus block read length */
+ if (qup_i2c_check_msg_len(msg) && (msg->len == 1)) {
+ if (msg->buf[0] > I2C_SMBUS_BLOCK_MAX) {
+ ret = -EPROTO;
+ goto err;
+ }
+ msg->len += msg->buf[0];
+ qup->pos = 0;
+ qup_i2c_set_blk_data(qup, msg);
+ /* set tag length for block read */
+ qup->blk.tx_tag_len = 2;
+ qup_i2c_set_read_mode_v2(qup, msg->buf[0]);
+ }
} while (qup->blk.pos < qup->blk.count);
err:
@@ -1210,6 +1263,11 @@ static int qup_i2c_xfer(struct i2c_adapter *adap,
goto out;
}
+ if (qup_i2c_check_msg_len(&msgs[idx])) {
+ ret = -EINVAL;
+ goto out;
+ }
+
if (msgs[idx].flags & I2C_M_RD)
ret = qup_i2c_read_one(qup, &msgs[idx]);
else
--
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply related
* [PATCH v6 1/2] i2c: qup: add ACPI support
From: Austin Christ @ 2016-10-11 16:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476203277-6893-1-git-send-email-austinwc@codeaurora.org>
From: Naveen Kaje <nkaje@codeaurora.org>
Add support to get the device parameters from ACPI. Assume
that the clocks are managed by firmware.
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Austin Christ <austinwc@codeaurora.org>
Reviewed-by: Sricharan R <sricharan@codeaurora.org>
---
drivers/i2c/busses/i2c-qup.c | 58 ++++++++++++++++++++++++++++++++------------
1 file changed, 42 insertions(+), 16 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index 041050e..bf0957e 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -14,6 +14,7 @@
*
*/
+#include <linux/acpi.h>
#include <linux/atomic.h>
#include <linux/clk.h>
#include <linux/delay.h>
@@ -132,6 +133,10 @@
/* Max timeout in ms for 32k bytes */
#define TOUT_MAX 300
+/* Default values. Use these if FW query fails */
+#define DEFAULT_CLK_FREQ 100000
+#define DEFAULT_SRC_CLK 20000000
+
struct qup_i2c_block {
int count;
int pos;
@@ -1356,14 +1361,13 @@ static void qup_i2c_disable_clocks(struct qup_i2c_dev *qup)
static int qup_i2c_probe(struct platform_device *pdev)
{
static const int blk_sizes[] = {4, 16, 32};
- struct device_node *node = pdev->dev.of_node;
struct qup_i2c_dev *qup;
unsigned long one_bit_t;
struct resource *res;
u32 io_mode, hw_ver, size;
int ret, fs_div, hs_div;
- int src_clk_freq;
- u32 clk_freq = 100000;
+ u32 src_clk_freq = DEFAULT_SRC_CLK;
+ u32 clk_freq = DEFAULT_CLK_FREQ;
int blocks;
qup = devm_kzalloc(&pdev->dev, sizeof(*qup), GFP_KERNEL);
@@ -1374,7 +1378,11 @@ static int qup_i2c_probe(struct platform_device *pdev)
init_completion(&qup->xfer);
platform_set_drvdata(pdev, qup);
- of_property_read_u32(node, "clock-frequency", &clk_freq);
+ ret = device_property_read_u32(qup->dev, "clock-frequency", &clk_freq);
+ if (ret) {
+ dev_notice(qup->dev, "using default clock-frequency %d",
+ DEFAULT_CLK_FREQ);
+ }
if (of_device_is_compatible(pdev->dev.of_node, "qcom,i2c-qup-v1.1.1")) {
qup->adap.algo = &qup_i2c_algo;
@@ -1456,20 +1464,30 @@ nodma:
return qup->irq;
}
- qup->clk = devm_clk_get(qup->dev, "core");
- if (IS_ERR(qup->clk)) {
- dev_err(qup->dev, "Could not get core clock\n");
- return PTR_ERR(qup->clk);
- }
+ if (has_acpi_companion(qup->dev)) {
+ ret = device_property_read_u32(qup->dev,
+ "src-clock-hz", &src_clk_freq);
+ if (ret) {
+ dev_notice(qup->dev, "using default src-clock-hz %d",
+ DEFAULT_SRC_CLK);
+ }
+ ACPI_COMPANION_SET(&qup->adap.dev, ACPI_COMPANION(qup->dev));
+ } else {
+ qup->clk = devm_clk_get(qup->dev, "core");
+ if (IS_ERR(qup->clk)) {
+ dev_err(qup->dev, "Could not get core clock\n");
+ return PTR_ERR(qup->clk);
+ }
- qup->pclk = devm_clk_get(qup->dev, "iface");
- if (IS_ERR(qup->pclk)) {
- dev_err(qup->dev, "Could not get iface clock\n");
- return PTR_ERR(qup->pclk);
+ qup->pclk = devm_clk_get(qup->dev, "iface");
+ if (IS_ERR(qup->pclk)) {
+ dev_err(qup->dev, "Could not get iface clock\n");
+ return PTR_ERR(qup->pclk);
+ }
+ qup_i2c_enable_clocks(qup);
+ src_clk_freq = clk_get_rate(qup->clk);
}
- qup_i2c_enable_clocks(qup);
-
/*
* Bootloaders might leave a pending interrupt on certain QUP's,
* so we reset the core before registering for interrupts.
@@ -1516,7 +1534,6 @@ nodma:
size = QUP_INPUT_FIFO_SIZE(io_mode);
qup->in_fifo_sz = qup->in_blk_sz * (2 << size);
- src_clk_freq = clk_get_rate(qup->clk);
fs_div = ((src_clk_freq / clk_freq) / 2) - 3;
hs_div = 3;
qup->clk_ctl = (hs_div << 8) | (fs_div & 0xff);
@@ -1641,6 +1658,14 @@ static const struct of_device_id qup_i2c_dt_match[] = {
};
MODULE_DEVICE_TABLE(of, qup_i2c_dt_match);
+#if IS_ENABLED(CONFIG_ACPI)
+static const struct acpi_device_id qup_i2c_acpi_match[] = {
+ { "QCOM8010"},
+ { },
+};
+MODULE_DEVICE_TABLE(acpi, qup_i2c_acpi_match);
+#endif
+
static struct platform_driver qup_i2c_driver = {
.probe = qup_i2c_probe,
.remove = qup_i2c_remove,
@@ -1648,6 +1673,7 @@ static struct platform_driver qup_i2c_driver = {
.name = "i2c_qup",
.pm = &qup_i2c_qup_pm_ops,
.of_match_table = qup_i2c_dt_match,
+ .acpi_match_table = ACPI_PTR(qup_i2c_acpi_match),
},
};
--
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply related
* [PATCH v6 0/2] Add ACPI support and SMBus block read
From: Austin Christ @ 2016-10-11 16:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Austin Christ <austinwc@qti.qualcomm.com>
Add ACPI support to I2C QUP driver and get properties from ACPI table.
Add support to the I2C QUP driver to correctly handle SMBus block reads by
checking I2C_M_RECV_LEN flag and reading the first byte received as the
message length.
Documentation for the two properites used from ACPI has been submitted through
dsd at acpica.org to https://github.com/ahs3/dsd. The documentation can be viewed
at https://lists.acpica.org/pipermail/dsd/2016-September/000095.html.
[V6]
- correct block size for SMBus data read
[V5]
- remove warning and use correct ACPI function
[V4]
- correct error code
- remove warning for fall back to default clock frequency
[V3]
- clean up unused variables
- use constant instead of variable for smbus length field
[V2]
- rework the smbus block read and break into separate function
- clean up redundant checks and variables
Naveen Kaje (2):
i2c: qup: add ACPI support
i2c: qup: support SMBus block read
drivers/i2c/busses/i2c-qup.c | 122 ++++++++++++++++++++++++++++++++++++-------
1 file changed, 103 insertions(+), 19 deletions(-)
--
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH] clk: lpc32xx: add a quirk for PWM and MS clock dividers
From: Sylvain Lemieux @ 2016-10-11 16:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475803015-4067-1-git-send-email-vz@mleia.com>
Hi Vladimir,
On Fri, 2016-10-07 at 04:16 +0300, Vladimir Zapolskiy wrote:
> In common clock framework CLK_DIVIDER_ONE_BASED or'ed with
> CLK_DIVIDER_ALLOW_ZERO flags indicates that
> 1) a divider clock may be set to zero value,
> 2) divider's zero value is interpreted as a non-divided clock.
>
> On the LPC32xx platform clock dividers of PWM and memory card clocks
> comply with the first condition, but zero value means a gated clock,
> thus it may happen that the divider value is not updated when
> the clock is enabled and the clock remains gated.
>
> The change adds one-shot quirks, which check for zero value of divider
> on initialization and set it to a non-zero value, therefore in runtime
> a gate clock will work as expected.
>
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
This patch resolved the issue reported in the following post:
https://www.spinics.net/lists/arm-kernel/msg534048.html
Reviewed-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
> ---
> drivers/clk/nxp/clk-lpc32xx.c | 32 ++++++++++++++++++++++++++++----
> 1 file changed, 28 insertions(+), 4 deletions(-)
>
[...]
^ permalink raw reply
* [PATCH] ARM: dts: lpc32xx: set pwm1 & pwm2 default clock rate
From: Sylvain Lemieux @ 2016-10-11 15:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475676679.23405.15.camel@localhost>
On Wed, 2016-10-05 at 10:11 -0400, Sylvain Lemieux wrote:
> Hi Vladimir,
>
> On Wed, 2016-10-05 at 05:08 +0300, Vladimir Zapolskiy wrote:
> > Hi Sylvain,
> >
> > On 26.09.2016 21:54, Sylvain Lemieux wrote:
> > > From: Sylvain Lemieux <slemieux@tycoint.com>
> > >
> > > Probably most of NXP LPC32xx boards have 13MHz main oscillator
> > > and therefore for HCLK PLL and ARM core clock rate default
> > > hardware setting of 16 * 13MHz = 208MHz and the AHB bus clock
> > > rate of 208MHz / 2 = 104MHz.
> > >
> > > The change explicitly defines the peripheral PWM1/PWM2 default
> > > clock output rate of 104MHz. If needed it can be redefined
> > > in a board DTS file.
> > >
> > > Signed-off-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
> > > ---
[...]
>
> I can submit a version 2 with the proper value and update
> the patch description to list the default peripheral clock
> setup of 13MHz.
>
> This change is adding a default value for the PWM clock
> (setup to CLK_PERIPH) to the PWM device node, allowing the
> board specific DTS to only enable the PWM to get it work.
>
> If the PWM clock output is not setup with a default value,
> only enabling the PWM in the board specific DTS file is not
> enough; the PWM divider will keep the default value of zero
> (i.e. PWM clock off).
>
This patch is no longer needed;
the following patch is handle the issue:
http://www.spinics.net/lists/arm-kernel/msg535313.html
The PWM clock will match the parent clock (i.e. update at
initialization) if the PWM divider value was setup to 0
(i.e. gating functionality).
> > --
> > With best wishes,
> > Vladimir
>
> Sylvain
>
>
^ permalink raw reply
* [PATCH v2 8/9] ARM: sunxi: Remove useless allwinner,pull property
From: Maxime Ripard @ 2016-10-11 15:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.7edc6c25be8a5e2efdda6a82e102dbf7ece6aa64.1476200742.git-series.maxime.ripard@free-electrons.com>
The allwinner,pull property set to NO_PULL was really considered our
default (and wasn't even changing the default value in the code).
Remove these properties to make it obvious that we do not set anything in
such a case.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/ntc-gr8-evb.dts | 4 +-
arch/arm/boot/dts/ntc-gr8.dtsi | 14 +-----
arch/arm/boot/dts/sun4i-a10-a1000.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 1 +-
arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts | 4 +-
arch/arm/boot/dts/sun4i-a10-gemei-g9.dts | 1 +-
arch/arm/boot/dts/sun4i-a10-hackberry.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-inet1.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-marsboard.dts | 1 +-
arch/arm/boot/dts/sun4i-a10-mk802.dts | 3 +-
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-pcduino.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-pcduino2.dts | 1 +-
arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts | 3 +-
arch/arm/boot/dts/sun4i-a10.dtsi | 24 +--------
arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts | 1 +-
arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-mk802.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +--
arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 1 +-
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 3 +-
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 2 +-
arch/arm/boot/dts/sun5i-a13-utoo-p66.dts | 1 +-
arch/arm/boot/dts/sun5i-a13.dtsi | 3 +-
arch/arm/boot/dts/sun5i-r8-chip.dts | 2 +-
arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi | 2 +-
arch/arm/boot/dts/sun5i.dtsi | 7 +--
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 1 +-
arch/arm/boot/dts/sun6i-a31-colombus.dts | 1 +-
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-i7.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-m9.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 2 +-
arch/arm/boot/dts/sun6i-a31.dtsi | 13 +----
arch/arm/boot/dts/sun6i-a31s-primo81.dts | 1 +-
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 1 +-
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 5 +--
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 6 +--
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-m3.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-mk808c.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 1 +-
arch/arm/boot/dts/sun7i-a20.dtsi | 37 +------------
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 10 +---
arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 1 +-
arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 1 +-
arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 1 +-
arch/arm/boot/dts/sun8i-a33-olinuxino.dts | 3 +-
arch/arm/boot/dts/sun8i-a33.dtsi | 1 +-
arch/arm/boot/dts/sun8i-a83t.dtsi | 3 +-
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 3 +-
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 4 +-
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 3 +-
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 3 +-
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 3 +-
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 1 +-
arch/arm/boot/dts/sun8i-h3.dtsi | 12 +----
arch/arm/boot/dts/sun8i-r16-parrot.dts | 3 +-
arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 2 +-
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 1 +-
arch/arm/boot/dts/sun9i-a80-optimus.dts | 4 +-
arch/arm/boot/dts/sun9i-a80.dtsi | 6 +--
arch/arm/boot/dts/sunxi-common-regulators.dtsi | 4 +-
85 files changed, 0 insertions(+), 302 deletions(-)
diff --git a/arch/arm/boot/dts/ntc-gr8-evb.dts b/arch/arm/boot/dts/ntc-gr8-evb.dts
index 04a474471adc..5a97dea32f98 100644
--- a/arch/arm/boot/dts/ntc-gr8-evb.dts
+++ b/arch/arm/boot/dts/ntc-gr8-evb.dts
@@ -228,25 +228,21 @@
mmc0_cd_pin_gr8_evb: mmc0-cd-pin at 0 {
allwinner,pins = "PG0";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_pin_gr8_evb: usb0-id-pin at 0 {
allwinner,pins = "PG2";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_det_pin_gr8_evb: usb0-vbus-det-pin at 0 {
allwinner,pins = "PG1";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_gr8_evb: usb1-vbus-pin at 0 {
allwinner,pins = "PG13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/ntc-gr8.dtsi b/arch/arm/boot/dts/ntc-gr8.dtsi
index d6a499bfd795..1c46cd38d999 100644
--- a/arch/arm/boot/dts/ntc-gr8.dtsi
+++ b/arch/arm/boot/dts/ntc-gr8.dtsi
@@ -766,37 +766,31 @@
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PB15", "PB16";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PB17", "PB18";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2s0_data_pins_a: i2s0-data at 0 {
allwinner,pins = "PB6", "PB7", "PB8", "PB9";
allwinner,function = "i2s0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2s0_mclk_pins_a: i2s0-mclk at 0 {
allwinner,pins = "PB6", "PB7", "PB8", "PB9";
allwinner,function = "i2s0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_rx_pins_a: ir0 at 0 {
allwinner,pins = "PB4";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
lcd_rgb666_pins: lcd-rgb666 at 0 {
@@ -805,7 +799,6 @@
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
allwinner,function = "lcd0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -813,7 +806,6 @@
"PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_pins_a: nand-base0 at 0 {
@@ -822,25 +814,21 @@
"PC11", "PC12", "PC13", "PC14",
"PC15";
allwinner,function = "nand0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs0_pins_a: nand-cs at 0 {
allwinner,pins = "PC4";
allwinner,function = "nand0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_rb0_pins_a: nand-rb at 0 {
allwinner,pins = "PC6";
allwinner,function = "nand0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins_a: pwm0 at 0 {
allwinner,pins = "PB2";
allwinner,function = "pwm0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spdif_tx_pins_a: spdif at 0 {
@@ -852,13 +840,11 @@
uart1_pins_a: uart1 at 1 {
allwinner,pins = "PG3", "PG4";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_cts_rts_pins_a: uart1-cts-rts at 0 {
allwinner,pins = "PG5", "PG6";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index 035395a32212..4d8164afc671 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -188,13 +188,11 @@
emac_power_pin_a1000: emac_power_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_a1000: led_pins at 0 {
allwinner,pins = "PH10", "PH20";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index f11dcd82f468..e7188d2fb303 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -168,7 +168,6 @@
allwinner,pins = "PH20", "PH21";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
index e01bdd1f1b2b..b4b829d6008d 100644
--- a/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
+++ b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
@@ -180,25 +180,21 @@
bl_en_pin_dsrv9703c: bl_en_pin at 0 {
allwinner,pins = "PH7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
motor_pins: motor_pins at 0 {
allwinner,pins = "PB3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
touchscreen_pins: touchscreen_pins at 0 {
allwinner,pins = "PB13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
index fbd02c7a5d43..57496a38b94a 100644
--- a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
+++ b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
@@ -158,7 +158,6 @@
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
index 9b8134cb968d..de10ae48c6f6 100644
--- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -131,13 +131,11 @@
hackberry_hogs: hogs at 0 {
allwinner,pins = "PH19";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb2_vbus_pin_hackberry: usb2_vbus_pin at 0 {
allwinner,pins = "PH12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-inet1.dts b/arch/arm/boot/dts/sun4i-a10-inet1.dts
index bb64e466c4e0..f78c17a9a298 100644
--- a/arch/arm/boot/dts/sun4i-a10-inet1.dts
+++ b/arch/arm/boot/dts/sun4i-a10-inet1.dts
@@ -182,13 +182,11 @@
bl_en_pin_inet: bl_en_pin at 0 {
allwinner,pins = "PH7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
touchscreen_wake_pin: touchscreen_wake_pin at 0 {
allwinner,pins = "PB13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
index 65273bc7998c..e6ffaefed42d 100644
--- a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
+++ b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
@@ -165,13 +165,11 @@
emac_power_pin_q5: emac_power_pin at 0 {
allwinner,pins = "PH19";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_q5: led_pins at 0 {
allwinner,pins = "PH20";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-marsboard.dts b/arch/arm/boot/dts/sun4i-a10-marsboard.dts
index c5916125bea8..001656eb9171 100644
--- a/arch/arm/boot/dts/sun4i-a10-marsboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-marsboard.dts
@@ -166,7 +166,6 @@
led_pins_marsboard: led_pins at 0 {
allwinner,pins = "PB5", "PB6", "PB7", "PB8";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-mk802.dts b/arch/arm/boot/dts/sun4i-a10-mk802.dts
index 204e2b68d09f..9ce39f75188e 100644
--- a/arch/arm/boot/dts/sun4i-a10-mk802.dts
+++ b/arch/arm/boot/dts/sun4i-a10-mk802.dts
@@ -93,19 +93,16 @@
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PH4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PH5";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb2_vbus_pin_mk802: usb2_vbus_pin at 0 {
allwinner,pins = "PH12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
index e8e14a53b764..203d399f0f7b 100644
--- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
@@ -170,14 +170,12 @@
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 {
allwinner,pins = "PC3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_olinuxinolime: led_pins at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts
index 7e94334420af..94cdef53ac11 100644
--- a/arch/arm/boot/dts/sun4i-a10-pcduino.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pcduino.dts
@@ -172,13 +172,11 @@
led_pins_pcduino: led_pins at 0 {
allwinner,pins = "PH15", "PH16";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
key_pins_pcduino: key_pins at 0 {
allwinner,pins = "PH17", "PH18", "PH19";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino2.dts b/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
index 05de4050a831..9656ec9b51ae 100644
--- a/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
@@ -59,7 +59,6 @@
usb2_vbus_pin_pcduino2: usb2_vbus_pin at 0 {
allwinner,pins = "PD2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
index 459c7a2dbee7..9dedd808bde8 100644
--- a/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
@@ -166,19 +166,16 @@
bl_en_pin_protab: bl_en_pin at 0 {
allwinner,pins = "PH7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
touchscreen_pins: touchscreen_pins at 0 {
allwinner,pins = "PA5", "PB13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index ae562272589c..36f3416c4c32 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -980,49 +980,41 @@
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
allwinner,function = "emac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PB18", "PB19";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PB20", "PB21";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_rx_pins_a: ir0 at 0 {
allwinner,pins = "PB4";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_tx_pins_a: ir0 at 1 {
allwinner,pins = "PB3";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir1_rx_pins_a: ir1 at 0 {
allwinner,pins = "PB23";
allwinner,function = "ir1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir1_tx_pins_a: ir1 at 1 {
allwinner,pins = "PB22";
allwinner,function = "ir1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -1030,7 +1022,6 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_reference_design: mmc0_cd_pin at 0 {
@@ -1042,25 +1033,21 @@
ps20_pins_a: ps20 at 0 {
allwinner,pins = "PI20", "PI21";
allwinner,function = "ps2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ps21_pins_a: ps21 at 0 {
allwinner,pins = "PH12", "PH13";
allwinner,function = "ps2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins_a: pwm0 at 0 {
allwinner,pins = "PB2";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm1_pins_a: pwm1 at 0 {
allwinner,pins = "PI3";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spdif_tx_pins_a: spdif at 0 {
@@ -1072,67 +1059,56 @@
spi0_pins_a: spi0 at 0 {
allwinner,pins = "PI11", "PI12", "PI13";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi0_cs0_pins_a: spi0_cs0 at 0 {
allwinner,pins = "PI10";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_pins_a: spi1 at 0 {
allwinner,pins = "PI17", "PI18", "PI19";
allwinner,function = "spi1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_cs0_pins_a: spi1_cs0 at 0 {
allwinner,pins = "PI16";
allwinner,function = "spi1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_a: spi2 at 0 {
allwinner,pins = "PC20", "PC21", "PC22";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_b: spi2 at 1 {
allwinner,pins = "PB15", "PB16", "PB17";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_a: spi2_cs0 at 0 {
allwinner,pins = "PC19";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_b: spi2_cs0 at 1 {
allwinner,pins = "PB14";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PB22", "PB23";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_b: uart0 at 1 {
allwinner,pins = "PF2", "PF4";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins_a: uart1 at 0 {
allwinner,pins = "PA10", "PA11";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts b/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
index 813e18c011da..8d1e414c0a3a 100644
--- a/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
@@ -118,7 +118,6 @@
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
index 3c79e3536521..e3438a685c71 100644
--- a/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
@@ -144,14 +144,12 @@
mmc1_vcc_en_pin_t004: mmc1_vcc_en_pin at 0 {
allwinner,pins = "PB18";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_t004: led_pins at 0 {
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-mk802.dts b/arch/arm/boot/dts/sun5i-a10s-mk802.dts
index 940139145fd5..405c1d519301 100644
--- a/arch/arm/boot/dts/sun5i-a10s-mk802.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-mk802.dts
@@ -118,7 +118,6 @@
led_pins_mk802: led_pins at 0 {
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_mk802: mmc0_cd_pin at 0 {
@@ -130,7 +129,6 @@
usb1_vbus_pin_mk802: usb1_vbus_pin at 0 {
allwinner,pins = "PB10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index 26d74958bd57..125243305525 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -217,13 +217,11 @@
allwinner,pins = "PE3";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_olinuxino_m: usb1_vbus_pin at 0 {
allwinner,pins = "PB10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
index 84a3bf817c3b..e2dceda4889b 100644
--- a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
@@ -110,13 +110,11 @@
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_r7: usb1_vbus_pin at 0 {
allwinner,pins = "PG13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts b/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
index 56a6982773a9..f40451bffb84 100644
--- a/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
@@ -148,7 +148,6 @@
led_pins_wobo_i5: led_pins at 0 {
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_wobo_i5: mmc0_cd_pin at 0 {
@@ -160,7 +159,6 @@
emac_power_pin_wobo: emac_power_pin at 0 {
allwinner,pins = "PA02";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 9aa80630e00f..4e014cb11e81 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -202,13 +202,11 @@
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PB19", "PB20";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart2_pins_a: uart2 at 0 {
allwinner,pins = "PC18", "PC19";
allwinner,function = "uart2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
emac_pins_a: emac0 at 0 {
@@ -218,7 +216,6 @@
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
allwinner,function = "emac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
emac_pins_b: emac0 at 1 {
@@ -228,7 +225,6 @@
"PD21", "PD22", "PD23", "PD24",
"PD25", "PD26", "PD27";
allwinner,function = "emac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc1_pins_a: mmc1 at 0 {
@@ -236,19 +232,16 @@
"PG6", "PG7", "PG8";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_a: spi2 at 0 {
allwinner,pins = "PB12", "PB13", "PB14";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_a: spi2_cs0 at 0 {
allwinner,pins = "PB11";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
index aa4484ac50b2..f5d1a04f3a16 100644
--- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
+++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
@@ -150,7 +150,6 @@
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PG1";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
index 8aec90ac28a4..df9315e5c850 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
@@ -124,7 +124,6 @@
allwinner,pins = "PG9";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
@@ -142,13 +141,11 @@
usb0_vbus_pin_olinuxinom: usb0_vbus_pin at 0 {
allwinner,pins = "PG12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_olinuxinom: usb1_vbus_pin at 0 {
allwinner,pins = "PG11";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 86ae19ba70d4..0f035adfbc57 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -174,7 +174,6 @@
allwinner,pins = "PG9";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
@@ -192,7 +191,6 @@
usb1_vbus_pin_olinuxino: usb1_vbus_pin at 0 {
allwinner,pins = "PG11";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
index 663cfa414dc2..3b7f2097824d 100644
--- a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
+++ b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
@@ -124,7 +124,6 @@
ts_wake_pin_p66: ts_wake_pin at 0 {
allwinner,pins = "PB3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index d79db1525448..1f4c5f773226 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -355,18 +355,15 @@
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
allwinner,function = "lcd0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins_a: uart1 at 0 {
allwinner,pins = "PE10", "PE11";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins_b: uart1 at 1 {
allwinner,pins = "PG3", "PG4";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts
index 398a17a5d2e6..8f7f01bf1f0c 100644
--- a/arch/arm/boot/dts/sun5i-r8-chip.dts
+++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
@@ -152,13 +152,11 @@
chip_vbus_pin: chip_vbus_pin at 0 {
allwinner,pins = "PB10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
chip_id_det_pin: chip_id_det_pin at 0 {
allwinner,pins = "PG2";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
index 600bd3c0e231..b29c4d1fad40 100644
--- a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
@@ -114,7 +114,6 @@
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PG10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin: mmc0_cd_pin at 0 {
@@ -138,7 +137,6 @@
usb0_vbus_pin_a: usb0_vbus_pin at 0 {
allwinner,pins = "PG12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index fe84703d3c14..76b696944514 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -556,19 +556,16 @@
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PB15", "PB16";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PB17", "PB18";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -576,7 +573,6 @@
"PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_pins_a: mmc2 at 0 {
@@ -591,19 +587,16 @@
uart3_pins_a: uart3 at 0 {
allwinner,pins = "PG9", "PG10";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins_cts_rts_a: uart3-cts-rts at 0 {
allwinner,pins = "PG11", "PG12";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins: pwm0 {
allwinner,pins = "PB2";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
index e723dedeb614..cbc99ce6ab1a 100644
--- a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
+++ b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
@@ -70,7 +70,6 @@
usb1_vbus_pin_a: usb1_vbus_pin at 0 {
allwinner,pins = "PH27";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts b/arch/arm/boot/dts/sun6i-a31-colombus.dts
index 4057e91c7cb5..24909c8c1186 100644
--- a/arch/arm/boot/dts/sun6i-a31-colombus.dts
+++ b/arch/arm/boot/dts/sun6i-a31-colombus.dts
@@ -137,7 +137,6 @@
usb2_vbus_pin_colombus: usb2_vbus_pin at 0 {
allwinner,pins = "PH24";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c_lcd_pins: i2c_lcd_pin at 0 {
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index a82c4674a3fc..7ec5f5fcdaac 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -155,7 +155,6 @@
gmac_phy_reset_pin_hummingbird: gmac_phy_reset_pin at 0 {
allwinner,pins = "PA21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_hummingbird: mmc0_cd_pin at 0 {
@@ -167,7 +166,6 @@
wifi_reset_pin_hummingbird: wifi_reset_pin at 0 {
allwinner,pins = "PG10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-i7.dts b/arch/arm/boot/dts/sun6i-a31-i7.dts
index a2d6a92dac29..61e3ef4528ec 100644
--- a/arch/arm/boot/dts/sun6i-a31-i7.dts
+++ b/arch/arm/boot/dts/sun6i-a31-i7.dts
@@ -111,7 +111,6 @@
led_pins_i7: led_pins at 0 {
allwinner,pins = "PH13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_i7: mmc0_cd_pin at 0 {
@@ -123,7 +122,6 @@
usb1_vbus_pin_i7: usb1_vbus_pin at 0 {
allwinner,pins = "PC27";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts
index 0ae5ab2f06fa..96ad1fe9bbc8 100644
--- a/arch/arm/boot/dts/sun6i-a31-m9.dts
+++ b/arch/arm/boot/dts/sun6i-a31-m9.dts
@@ -130,7 +130,6 @@
led_pins_m9: led_pins at 0 {
allwinner,pins = "PH13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_m9: mmc0_cd_pin at 0 {
@@ -142,7 +141,6 @@
usb1_vbus_pin_m9: usb1_vbus_pin at 0 {
allwinner,pins = "PC27";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
index a551673aca68..a29ea186b964 100644
--- a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
+++ b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
@@ -130,7 +130,6 @@
led_pins_m9: led_pins at 0 {
allwinner,pins = "PH13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_m9: mmc0_cd_pin at 0 {
@@ -142,7 +141,6 @@
usb1_vbus_pin_m9: usb1_vbus_pin at 0 {
allwinner,pins = "PC27";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 6fcd3cf5b3b9..f754a255ca7d 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -437,25 +437,21 @@
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PH20", "PH21";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PH14", "PH15";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PH16", "PH17";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PH18", "PH19";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -463,7 +459,6 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc1_pins_a: mmc1 at 0 {
@@ -471,7 +466,6 @@
"PG4", "PG5";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_pins_a: mmc2 at 0 {
@@ -489,7 +483,6 @@
"PC24";
allwinner,function = "mmc2";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc3_8bit_emmc_pins: mmc3 at 1 {
@@ -499,7 +492,6 @@
"PC24";
allwinner,function = "mmc3";
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_mii_a: gmac_mii at 0 {
@@ -509,7 +501,6 @@
"PA20", "PA21", "PA22", "PA23",
"PA24", "PA26", "PA27";
allwinner,function = "gmac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_gmii_a: gmac_gmii at 0 {
@@ -526,7 +517,6 @@
* might need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_rgmii_a: gmac_rgmii at 0 {
@@ -540,7 +530,6 @@
* and need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -892,13 +881,11 @@
ir_pins_a: ir at 0 {
allwinner,pins = "PL4";
allwinner,function = "s_ir";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
p2wi_pins: p2wi {
allwinner,pins = "PL0", "PL1";
allwinner,function = "s_p2wi";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31s-primo81.dts b/arch/arm/boot/dts/sun6i-a31s-primo81.dts
index 4332cde8d6ca..f511aa0e250d 100644
--- a/arch/arm/boot/dts/sun6i-a31s-primo81.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-primo81.dts
@@ -136,7 +136,6 @@
gt911_int_primo81: gt911_int_pin at 0 {
allwinner,pins = "PA3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mma8452_int_primo81: mma8452_int_pin at 0 {
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
index d0304f51a5c6..2beb867d095a 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
@@ -130,7 +130,6 @@
led_pin_sina31s: led_pin at 0 {
allwinner,pins = "PH13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_sina31s: mmc0_cd_pin at 0 {
diff --git a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
index 83e47a1c93bd..3731cf22abc1 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -155,13 +155,11 @@
gmac_phy_reset_pin_bpi_m2: gmac_phy_reset_pin at 0 {
allwinner,pins = "PA21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_bpi_m2: led_pins at 0 {
allwinner,pins = "PG5", "PG10", "PG11";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_bpi_m2: mmc0_cd_pin at 0 {
@@ -175,7 +173,6 @@
mmc2_pwrseq_pin_bpi_m2: mmc2_pwrseq_pin at 0 {
allwinner,pins = "PL8";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
index e10630e59c05..2018f074ff05 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
@@ -196,13 +196,11 @@
gmac_power_pin_bpi_m1p: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_bpi_m1p: led_pins at 0 {
allwinner,pins = "PH24", "PH25";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_bpi_m1p: mmc0_cd_pin at 0 {
@@ -214,7 +212,6 @@
mmc3_pwrseq_pin_bpi_m1p: mmc3_pwrseq_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
index 158ab889dce7..7cd6a74d104c 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
@@ -193,13 +193,11 @@
gmac_power_pin_bananapi: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_bananapi: led_pins at 0 {
allwinner,pins = "PH24";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index 4aaf137376de..366636451e7e 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -184,13 +184,11 @@
gmac_power_pin_bananapro: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_bananapro: led_pins at 0 {
allwinner,pins = "PH24", "PG2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_bananapro: mmc0_cd_pin at 0 {
@@ -202,19 +200,16 @@
usb1_vbus_pin_bananapro: usb1_vbus_pin at 0 {
allwinner,pins = "PH0";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb2_vbus_pin_bananapro: usb2_vbus_pin at 0 {
allwinner,pins = "PH1";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
vmmc3_pin_bananapro: vmmc3_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
index 42779aeb7297..e635dd6ac47d 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
@@ -162,7 +162,6 @@
led_pins_cubieboard2: led_pins at 0 {
allwinner,pins = "PH20", "PH21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index a0b7ffb6196d..be8fa4879453 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -226,37 +226,31 @@
ahci_pwr_pin_cubietruck: ahci_pwr_pin at 1 {
allwinner,pins = "PH12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_cubietruck: led_pins at 0 {
allwinner,pins = "PH7", "PH11", "PH20", "PH21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc3_pwrseq_pin_cubietruck: mmc3_pwrseq_pin at 0 {
allwinner,pins = "PH9";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_pin_a: usb0_vbus_pin at 0 {
allwinner,pins = "PH17";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PH19";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
index 714a463e24ed..6719c701a45f 100644
--- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
+++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
@@ -190,25 +190,21 @@
ahci_pwr_pin_a20_hummingbird: ahci_pwr_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_a20_hummingbird: usb1_vbus_pin at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc3_vdd_pin_a20_hummingbird: mmc3_vdd_pin at 0 {
allwinner,pins = "PH9";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_vdd_pin_a20_hummingbird: gmac_vdd_pin at 0 {
allwinner,pins = "PH16";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
index 4d1e102ea4b9..d64c11134dd7 100644
--- a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
+++ b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
@@ -200,25 +200,21 @@
vmmc3_pin_i12_tvbox: vmmc3_pin at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
vmmc3_io_pin_i12_tvbox: vmmc3_io_pin at 0 {
allwinner,pins = "PH12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_power_pin_i12_tvbox: gmac_power_pin at 0 {
allwinner,pins = "PH21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_i12_tvbox: led_pins at 0 {
allwinner,pins = "PH9", "PH20";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts b/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
index 10d48cbf81ff..44f09642c893 100644
--- a/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
+++ b/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
@@ -134,7 +134,6 @@
allwinner,pins = "PH20","PH21";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
index 57c05e69d012..79cee00a85de 100644
--- a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
+++ b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
@@ -236,13 +236,11 @@
gmac_power_pin_lamobo_r1: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_lamobo_r1: led_pins at 0 {
allwinner,pins = "PH24";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-m3.dts b/arch/arm/boot/dts/sun7i-a20-m3.dts
index cfaa5b45b159..97ce27da445f 100644
--- a/arch/arm/boot/dts/sun7i-a20-m3.dts
+++ b/arch/arm/boot/dts/sun7i-a20-m3.dts
@@ -147,7 +147,6 @@
led_pins_m3: led_pins at 0 {
allwinner,pins = "PH20";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-mk808c.dts b/arch/arm/boot/dts/sun7i-a20-mk808c.dts
index edd397d796be..c5890617382c 100644
--- a/arch/arm/boot/dts/sun7i-a20-mk808c.dts
+++ b/arch/arm/boot/dts/sun7i-a20-mk808c.dts
@@ -134,13 +134,11 @@
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PH4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PH5";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
index edf735c10b63..de2863651b44 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -206,14 +206,12 @@
ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin at 1 {
allwinner,pins = "PC3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_olimex_som_evb: led_pins at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc3_cd_pin_olimex_som_evb: mmc3_cd_pin at 0 {
@@ -225,13 +223,11 @@
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PH4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PH5";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
index 632ad580e09f..21946497789e 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
@@ -155,14 +155,12 @@
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 {
allwinner,pins = "PC3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_olinuxinolime: led_pins at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
index a64c2b3a1125..6858d6aafea3 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
@@ -59,7 +59,6 @@
mmc2_pins_nrst: mmc2 at 0 {
allwinner,pins = "PC16";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index b47b67765aec..3dcd745126a9 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -204,14 +204,12 @@
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 {
allwinner,pins = "PC3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_olinuxinolime: led_pins at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
@@ -229,7 +227,6 @@
usb0_vbus_pin_lime2: usb0_vbus_pin at 0 {
allwinner,pins = "PC17";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 2dddbf148d8e..3773926df96e 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -236,7 +236,6 @@
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
index 69ad2345613f..8e05256f7c1b 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
@@ -186,25 +186,21 @@
usb2_vbus_pin_bananapro: usb2_vbus_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_power_pin_orangepi: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_orangepi: led_pins at 0 {
allwinner,pins = "PH24", "PH25";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_bananapro: usb1_vbus_pin at 0 {
allwinner,pins = "PH26";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
index d6608ed6cdf3..d168b8f08e30 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
@@ -161,25 +161,21 @@
usb2_vbus_pin_bananapro: usb2_vbus_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_power_pin_orangepi: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_orangepi: led_pins at 0 {
allwinner,pins = "PH24";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_bananapro: usb1_vbus_pin at 0 {
allwinner,pins = "PH26";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
index 4a292a12616d..cdcbee74274e 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
@@ -154,13 +154,11 @@
ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_pcduino3_nano: led_pins at 0 {
allwinner,pins = "PH16", "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
@@ -172,7 +170,6 @@
usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin at 0 {
allwinner,pins = "PD2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
index a416b3a47cee..fd2b4b8af9ea 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
@@ -185,13 +185,11 @@
led_pins_pcduino3: led_pins at 0 {
allwinner,pins = "PH15", "PH16";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
key_pins_pcduino3: key_pins at 0 {
allwinner,pins = "PH17", "PH18", "PH19";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
index a10c4ccd741d..688f75ceab58 100644
--- a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
+++ b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
@@ -175,19 +175,16 @@
bl_enable_pin: bl_enable_pin at 0 {
allwinner,pins = "PH7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ts_reset_pin: ts_reset_pin at 0 {
allwinner,pins = "PB13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
index 87901259582b..b12493350ee3 100644
--- a/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
+++ b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
@@ -162,7 +162,6 @@
vmmc3_pin_ap6xxx_wl_regon: vmmc3_pin at 0 {
allwinner,pins = "PH9";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index b6486fbfb48a..35dd9680ce3d 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1094,13 +1094,11 @@
clk_out_a_pins_a: clk_out_a at 0 {
allwinner,pins = "PI12";
allwinner,function = "clk_out_a";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
clk_out_b_pins_a: clk_out_b at 0 {
allwinner,pins = "PI13";
allwinner,function = "clk_out_b";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
emac_pins_a: emac0 at 0 {
@@ -1110,7 +1108,6 @@
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
allwinner,function = "emac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_mii_a: gmac_mii at 0 {
@@ -1120,7 +1117,6 @@
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
allwinner,function = "gmac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_rgmii_a: gmac_rgmii at 0 {
@@ -1135,55 +1131,46 @@
* and need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PB18", "PB19";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PB20", "PB21";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c3_pins_a: i2c3 at 0 {
allwinner,pins = "PI0", "PI1";
allwinner,function = "i2c3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_rx_pins_a: ir0 at 0 {
allwinner,pins = "PB4";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_tx_pins_a: ir0 at 1 {
allwinner,pins = "PB3";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir1_rx_pins_a: ir1 at 0 {
allwinner,pins = "PB23";
allwinner,function = "ir1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir1_tx_pins_a: ir1 at 1 {
allwinner,pins = "PB22";
allwinner,function = "ir1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -1191,7 +1178,6 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_reference_design: mmc0_cd_pin at 0 {
@@ -1213,31 +1199,26 @@
"PI7", "PI8", "PI9";
allwinner,function = "mmc3";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ps20_pins_a: ps20 at 0 {
allwinner,pins = "PI20", "PI21";
allwinner,function = "ps2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ps21_pins_a: ps21 at 0 {
allwinner,pins = "PH12", "PH13";
allwinner,function = "ps2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins_a: pwm0 at 0 {
allwinner,pins = "PB2";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm1_pins_a: pwm1 at 0 {
allwinner,pins = "PI3";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spdif_tx_pins_a: spdif at 0 {
@@ -1249,109 +1230,91 @@
spi0_pins_a: spi0 at 0 {
allwinner,pins = "PI11", "PI12", "PI13";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi0_cs0_pins_a: spi0_cs0 at 0 {
allwinner,pins = "PI10";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi0_cs1_pins_a: spi0_cs1 at 0 {
allwinner,pins = "PI14";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_pins_a: spi1 at 0 {
allwinner,pins = "PI17", "PI18", "PI19";
allwinner,function = "spi1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_cs0_pins_a: spi1_cs0 at 0 {
allwinner,pins = "PI16";
allwinner,function = "spi1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_a: spi2 at 0 {
allwinner,pins = "PC20", "PC21", "PC22";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_b: spi2 at 1 {
allwinner,pins = "PB15", "PB16", "PB17";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_a: spi2_cs0 at 0 {
allwinner,pins = "PC19";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_b: spi2_cs0 at 1 {
allwinner,pins = "PB14";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PB22", "PB23";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart2_pins_a: uart2 at 0 {
allwinner,pins = "PI16", "PI17", "PI18", "PI19";
allwinner,function = "uart2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins_a: uart3 at 0 {
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins_b: uart3 at 1 {
allwinner,pins = "PH0", "PH1";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart4_pins_a: uart4 at 0 {
allwinner,pins = "PG10", "PG11";
allwinner,function = "uart4";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart4_pins_b: uart4 at 1 {
allwinner,pins = "PH4", "PH5";
allwinner,function = "uart4";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart5_pins_a: uart5 at 0 {
allwinner,pins = "PI10", "PI11";
allwinner,function = "uart5";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart6_pins_a: uart6 at 0 {
allwinner,pins = "PI12", "PI13";
allwinner,function = "uart6";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart7_pins_a: uart7 at 0 {
allwinner,pins = "PI20", "PI21";
allwinner,function = "uart7";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index c250c6d12f2f..294f00a95559 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -275,7 +275,6 @@
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PF2", "PF4";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins_a: uart1 at 0 {
@@ -293,7 +292,6 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc1_pins_a: mmc1 at 0 {
@@ -301,7 +299,6 @@
"PG3", "PG4", "PG5";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_8bit_pins: mmc2_8bit {
@@ -311,31 +308,26 @@
"PC15", "PC16";
allwinner,function = "mmc2";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins: pwm0 {
allwinner,pins = "PH0";
allwinner,function = "pwm0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PH2", "PH3";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PH4", "PH5";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PE12", "PE13";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
lcd_rgb666_pins: lcd-rgb666 at 0 {
@@ -344,7 +336,6 @@
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
allwinner,function = "lcd0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -584,7 +575,6 @@
r_uart_pins_a: r_uart at 0 {
allwinner,pins = "PL2", "PL3";
allwinner,function = "s_uart";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
index fea9db3ee9ad..89f68a78ab32 100644
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
@@ -93,7 +93,6 @@
wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin at 0 {
allwinner,pins = "PL6";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
index abcd94ea5e86..e8367deaa587 100644
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
@@ -86,7 +86,6 @@
wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin at 0 {
allwinner,pins = "PL6";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
index fb4665576dff..442db91b943a 100644
--- a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
+++ b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
@@ -92,7 +92,6 @@
allwinner,pins = "PL5";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
index 7eaf610eabd7..59a64d2d695c 100644
--- a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
+++ b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
@@ -94,19 +94,16 @@
led_pin_olinuxino: led_pins at 0 {
allwinner,pins = "PB7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_olinuxino: mmc0_cd_pin at 0 {
allwinner,pins = "PB4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PB3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index e60c4c8c6976..310a38cf7f18 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -240,7 +240,6 @@
uart0_pins_b: uart0 at 1 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index c03d7f4cac83..cec6bfc2d3c9 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -171,19 +171,16 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PF2", "PF4";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_b: uart0 at 1 {
allwinner,pins = "PB9", "PB10";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e02314a2d643..49194c38d56b 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -158,19 +158,16 @@
pwr_led_bpi_m2p: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_bpi_m2p: key_pins at 0 {
allwinner,pins = "PL3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
wifi_en_bpi_m2p: wifi_en_pin {
allwinner,pins = "PL7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 277935e10543..1c6e96e8ec98 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -99,7 +99,6 @@
leds_opc: led-pins {
allwinner,pins = "PA10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -107,7 +106,6 @@
leds_r_opc: led-pins {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index e44af3446514..dfd9bc2008fd 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -147,7 +147,6 @@
leds_opc: led_pins at 0 {
allwinner,pins = "PA15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -155,19 +154,16 @@
leds_r_opc: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_opc: key_pins at 0 {
allwinner,pins = "PL3", "PL4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin at 0 {
allwinner,pins = "PL7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
index ce5b1086b580..77d29bae7739 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
@@ -145,7 +145,6 @@
leds_opc: led_pins at 0 {
allwinner,pins = "PA15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -153,13 +152,11 @@
leds_r_opc: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_opc: key_pins at 0 {
allwinner,pins = "PL3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index fbdd239175d4..49529d9ca26d 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -112,7 +112,6 @@
leds_opc: led_pins at 0 {
allwinner,pins = "PA15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -120,13 +119,11 @@
leds_r_opc: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_opc: key_pins at 0 {
allwinner,pins = "PL3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 638720c3d04e..0d56d33d43ea 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -134,7 +134,6 @@
leds_opc: led_pins at 0 {
allwinner,pins = "PA15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -142,13 +141,11 @@
leds_r_opc: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_opc: key_pins at 0 {
allwinner,pins = "PL3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 1236583caf64..ab8593d1d3df 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -85,7 +85,6 @@
usb3_vbus_pin_a: usb3_vbus_pin at 0 {
allwinner,pins = "PG11";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 4d10f8ad89da..cd02058dc8db 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -330,19 +330,16 @@
i2c0_pins: i2c0 {
allwinner,pins = "PA11", "PA12";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins: i2c1 {
allwinner,pins = "PA18", "PA19";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins: i2c2 {
allwinner,pins = "PE12", "PE13";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -350,7 +347,6 @@
"PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin: mmc0_cd_pin at 0 {
@@ -364,7 +360,6 @@
"PG4", "PG5";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_8bit_pins: mmc2_8bit {
@@ -374,37 +369,31 @@
"PC15", "PC16";
allwinner,function = "mmc2";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PA4", "PA5";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins: uart1 {
allwinner,pins = "PG6", "PG7";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_rts_cts_pins: uart1_rts_cts {
allwinner,pins = "PG8", "PG9";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart2_pins: uart2 {
allwinner,pins = "PA0", "PA1";
allwinner,function = "uart2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins: uart3 {
allwinner,pins = "PG13", "PG14";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -569,7 +558,6 @@
ir_pins_a: ir at 0 {
allwinner,pins = "PL11";
allwinner,function = "s_cir_rx";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
};
diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts
index 6161ec441df5..0588fceb0636 100644
--- a/arch/arm/boot/dts/sun8i-r16-parrot.dts
+++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts
@@ -167,7 +167,6 @@
led_pins_parrot: led_pins at 0 {
allwinner,pins = "PE16", "PE17";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_det: usb0_id_detect_pin at 0 {
@@ -179,7 +178,6 @@
usb1_vbus_pin_parrot: usb1_vbus_pin at 0 {
allwinner,pins = "PD12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -187,7 +185,6 @@
wifi_reset_pin_parrot: wifi_reset_pin at 0 {
allwinner,pins = "PL6";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
index ae95e5969681..dea852b2a4f3 100644
--- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
@@ -96,7 +96,6 @@
bl_en_pin: bl_en_pin at 0 {
allwinner,pins = "PH6";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin: mmc0_cd_pin at 0 {
@@ -108,7 +107,6 @@
ts_power_pin: ts_power_pin at 0 {
allwinner,pins = "PH1";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index e1be9fca86c7..e0ae76088f7e 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -112,7 +112,6 @@
led_pins_cubieboard4: led-pins at 0 {
allwinner,pins = "PH6", "PH17";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_cubieboard4: mmc0_cd_pin at 0 {
diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts
index 0b2f7042bddf..a2e540fc5725 100644
--- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
@@ -162,7 +162,6 @@
led_pins_optimus: led-pins at 0 {
allwinner,pins = "PH0", "PH1";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_optimus: mmc0_cd_pin at 0 {
@@ -174,13 +173,11 @@
usb1_vbus_pin_optimus: usb1_vbus_pin at 1 {
allwinner,pins = "PH4";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb3_vbus_pin_optimus: usb3_vbus_pin at 1 {
allwinner,pins = "PH5";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -192,7 +189,6 @@
led_r_pins_optimus: led-pins at 1 {
allwinner,pins = "PM15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 293b41ac8e37..d03f7481401c 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -688,7 +688,6 @@
i2c3_pins_a: i2c3 at 0 {
allwinner,pins = "PG10", "PG11";
allwinner,function = "i2c3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins: mmc0 {
@@ -696,7 +695,6 @@
"PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_8bit_pins: mmc2_8bit {
@@ -706,19 +704,16 @@
"PC16";
allwinner,function = "mmc2";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PH12", "PH13";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart4_pins_a: uart4 at 0 {
allwinner,pins = "PG12", "PG13", "PG14", "PG15";
allwinner,function = "uart4";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -901,7 +896,6 @@
r_ir_pins: r_ir {
allwinner,pins = "PL6";
allwinner,function = "s_cir_rx";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
r_rsb_pins: r_rsb {
diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi b/arch/arm/boot/dts/sunxi-common-regulators.dtsi
index 7809e18d30bd..358b8d9b4703 100644
--- a/arch/arm/boot/dts/sunxi-common-regulators.dtsi
+++ b/arch/arm/boot/dts/sunxi-common-regulators.dtsi
@@ -49,25 +49,21 @@
ahci_pwr_pin_a: ahci_pwr_pin at 0 {
allwinner,pins = "PB8";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_pin_a: usb0_vbus_pin at 0 {
allwinner,pins = "PB9";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_a: usb1_vbus_pin at 0 {
allwinner,pins = "PH6";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb2_vbus_pin_a: usb2_vbus_pin at 0 {
allwinner,pins = "PH3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH v2 6/9] dt-bindings: pinctrl: Deprecate sunxi pinctrl bindings
From: Maxime Ripard @ 2016-10-11 15:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.7edc6c25be8a5e2efdda6a82e102dbf7ece6aa64.1476200742.git-series.maxime.ripard@free-electrons.com>
The generic pin configuration and multiplexing should be preferred now,
even though we still support the old one.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
index 69617220c5d6..ff351493be47 100644
--- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
@@ -36,6 +36,22 @@ pins it needs, and how they should be configured, with regard to muxer
configuration, drive strength and pullups. If one of these options is
not set, its actual value will be unspecified.
+This driver supports the generic pin multiplexing and configuration
+bindings. For details on each properties, you can refer to
+./pinctrl-bindings.txt.
+
+Required sub-node properties:
+ - pins
+ - function
+
+Optional sub-node properties:
+ - bias-disable
+ - bias-pull-up
+ - bias-pull-down
+ - drive-strength
+
+*** Deprecated pin configuration and multiplexing binding
+
Required subnode-properties:
- allwinner,pins: List of strings containing the pin name.
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH v2 5/9] pinctrl: sunxi: Support generic binding
From: Maxime Ripard @ 2016-10-11 15:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.7edc6c25be8a5e2efdda6a82e102dbf7ece6aa64.1476200742.git-series.maxime.ripard@free-electrons.com>
Our bindings are mostly irrelevant now that we have generic pinctrl
bindings that cover exactly the same uses cases.
Add support for the new ones, and obviously keep our old binding support in
order to keep the ABI stable.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 48 ++++++++++++++++++++++++++--
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 2ee8d48ed5d3..71b78566e871 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -150,18 +150,33 @@ static int sunxi_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
static bool sunxi_pctrl_has_bias_prop(struct device_node *node)
{
- return of_find_property(node, "allwinner,pull", NULL);
+ return of_find_property(node, "bias-pull-up", NULL) ||
+ of_find_property(node, "bias-pull-down", NULL) ||
+ of_find_property(node, "bias-disable", NULL) ||
+ of_find_property(node, "allwinner,pull", NULL);
}
static bool sunxi_pctrl_has_drive_prop(struct device_node *node)
{
- return of_find_property(node, "allwinner,drive", NULL);
+ return of_find_property(node, "drive-strength", NULL) ||
+ of_find_property(node, "allwinner,drive", NULL);
}
static int sunxi_pctrl_parse_bias_prop(struct device_node *node)
{
u32 val;
+ /* Try the new style binding */
+ if (of_find_property(node, "bias-pull-up", NULL))
+ return PIN_CONFIG_BIAS_PULL_UP;
+
+ if (of_find_property(node, "bias-pull-down", NULL))
+ return PIN_CONFIG_BIAS_PULL_DOWN;
+
+ if (of_find_property(node, "bias-disable", NULL))
+ return PIN_CONFIG_BIAS_DISABLE;
+
+ /* And fall back to the old binding */
if (of_property_read_u32(node, "allwinner,pull", &val))
return -EINVAL;
@@ -181,6 +196,21 @@ static int sunxi_pctrl_parse_drive_prop(struct device_node *node)
{
u32 val;
+ /* Try the new style binding */
+ if (!of_property_read_u32(node, "drive-strength", &val)) {
+ /* We can't go below 10mA ... */
+ if (val < 10)
+ return -EINVAL;
+
+ /* ... and only up to 40 mA ... */
+ if (val > 40)
+ val = 40;
+
+ /* by steps of 10 mA */
+ return rounddown(val, 10);
+ }
+
+ /* And then fall back to the old binding */
if (of_property_read_u32(node, "allwinner,drive", &val))
return -EINVAL;
@@ -192,6 +222,12 @@ static const char *sunxi_pctrl_parse_function_prop(struct device_node *node)
const char *function;
int ret;
+ /* Try the generic binding */
+ ret = of_property_read_string(node, "function", &function);
+ if (!ret)
+ return function;
+
+ /* And fall back to our legacy one */
ret = of_property_read_string(node, "allwinner,function", &function);
if (!ret)
return function;
@@ -204,6 +240,14 @@ static const char *sunxi_pctrl_find_pins_prop(struct device_node *node,
{
int count;
+ /* Try the generic binding */
+ count = of_property_count_strings(node, "pins");
+ if (count > 0) {
+ *npins = count;
+ return "pins";
+ }
+
+ /* And fall back to our legacy one */
count = of_property_count_strings(node, "allwinner,pins");
if (count > 0) {
*npins = count;
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH v2 4/9] pinctrl: sunxi: Deal with configless pins
From: Maxime Ripard @ 2016-10-11 15:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.7edc6c25be8a5e2efdda6a82e102dbf7ece6aa64.1476200742.git-series.maxime.ripard@free-electrons.com>
Even though the our binding had the assumption that the allwinner,pull and
allwinner,drive properties were optional, the code never took that into
account.
Fix that.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 53 ++++++++++++++++++++--------
1 file changed, 39 insertions(+), 14 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 6f6f1e0011e2..2ee8d48ed5d3 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -218,20 +218,29 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
{
unsigned long *pinconfig;
unsigned int configlen = 0, idx = 0;
+ int ret;
if (sunxi_pctrl_has_drive_prop(node))
configlen++;
if (sunxi_pctrl_has_bias_prop(node))
configlen++;
+ /*
+ * If we don't have any configuration, bail out
+ */
+ if (!configlen)
+ return NULL;
+
pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
if (!pinconfig)
- return NULL;
+ return ERR_PTR(-ENOMEM);
if (sunxi_pctrl_has_drive_prop(node)) {
int drive = sunxi_pctrl_parse_drive_prop(node);
- if (drive < 0)
+ if (drive < 0) {
+ ret = drive;
goto err_free;
+ }
pinconfig[idx++] = pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
drive);
@@ -239,8 +248,10 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
if (sunxi_pctrl_has_bias_prop(node)) {
int pull = sunxi_pctrl_parse_bias_prop(node);
- if (pull < 0)
+ if (pull < 0) {
+ ret = pull;
goto err_free;
+ }
pinconfig[idx++] = pinconf_to_config_packed(pull, 0);
}
@@ -251,7 +262,7 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
err_free:
kfree(pinconfig);
- return NULL;
+ return ERR_PTR(ret);
}
static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
@@ -285,7 +296,10 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
/*
* We have two maps for each pin: one for the function, one
- * for the configuration (bias, strength, etc)
+ * for the configuration (bias, strength, etc).
+ *
+ * We might be slightly overshooting, since we might not have
+ * any configuration.
*/
nmaps = npins * 2;
*map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL);
@@ -293,8 +307,8 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
return -ENOMEM;
pinconfig = sunxi_pctrl_build_pin_config(node, &configlen);
- if (!pinconfig) {
- ret = -EINVAL;
+ if (IS_ERR(pinconfig)) {
+ ret = PTR_ERR(pinconfig);
goto err_free_map;
}
@@ -321,15 +335,24 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
i++;
- (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
- (*map)[i].data.configs.group_or_pin = group;
- (*map)[i].data.configs.configs = pinconfig;
- (*map)[i].data.configs.num_configs = configlen;
-
- i++;
+ if (pinconfig) {
+ (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
+ (*map)[i].data.configs.group_or_pin = group;
+ (*map)[i].data.configs.configs = pinconfig;
+ (*map)[i].data.configs.num_configs = configlen;
+ i++;
+ }
}
- *num_maps = nmaps;
+ *num_maps = i;
+
+ /*
+ * We know have the number of maps we need, we can resize our
+ * map array
+ */
+ *map = krealloc(*map, i * sizeof(struct pinctrl_map), GFP_KERNEL);
+ if (!map)
+ return -ENOMEM;
return 0;
@@ -342,6 +365,8 @@ static void sunxi_pctrl_dt_free_map(struct pinctrl_dev *pctldev,
struct pinctrl_map *map,
unsigned num_maps)
{
+ unsigned long *pinconfig;
+
/* All the maps have the same pin config, free only the first one */
kfree(map[0].data.configs.configs);
kfree(map);
--
git-series 0.8.10
^ permalink raw reply related
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