* [PATCH v3 2/2] clk: imx: improve precision of AV PLL to 1 Hz
From: Fabio Estevam @ 2016-10-14 13:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <66f5967187f915fe7039f4dbfb77db88a2423094.1476267249.git.emil@limesaudio.com>
On Wed, Oct 12, 2016 at 7:31 AM, Emil Lundmark <emil@limesaudio.com> wrote:
> The audio and video PLLs are designed to have a precision of 1 Hz if some
> conditions are met. The current implementation only allows a precision that
> depends on the rate of the parent clock. E.g., if the parent clock is 24
> MHz, the precision will be 24 Hz; or more generally the precision will be
...
> I reckon this is the intention by the design of the clock rate formula.
>
> Signed-off-by: Emil Lundmark <emil@limesaudio.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH v3 1/2] clk: imx: fix integer overflow in AV PLL round rate
From: Fabio Estevam @ 2016-10-14 13:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4d2e3a91dfb74209735c940b51d7efc9ba2ed69b.1476267249.git.emil@limesaudio.com>
On Wed, Oct 12, 2016 at 7:31 AM, Emil Lundmark <emil@limesaudio.com> wrote:
> Since 'parent_rate * mfn' may overflow 32 bits, the result should be
> stored using 64 bits.
>
> The problem was discovered when trying to set the rate of the audio PLL
> (pll4_post_div) on an i.MX6Q. The desired rate was 196.608 MHz, but
> the actual rate returned was 192.000570 MHz. The round rate function should
> have been able to return 196.608 MHz, i.e., the desired rate.
>
> Fixes: ba7f4f557eb6 ("clk: imx: correct AV PLL rate formula")
> Cc: Anson Huang <b20788@freescale.com>
> Signed-off-by: Emil Lundmark <emil@limesaudio.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH v2 0/2] Assign RK3066 clocks at boot time
From: Heiko Stuebner @ 2016-10-14 13:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1476447057.git.paweljarosz3691@gmail.com>
Am Freitag, 14. Oktober 2016, 14:16:21 CEST schrieb Pawe? Jarosz:
> This patchset sets rk3066 PLL, CPU and PERI clocks while kernel init.
>
> Pawe? Jarosz (2):
> clk: rockchip: Add bindings for cpu and peri clocks on rk3066
> ARM: dts: rockchip: initialize rk3066 PLL clock rate
changes look good. One thing to keep in mind is that we need clock-id
additions in a separate patch (as they need to be on a shared branch).
I can do this split of patch1 on my own here, so no need to resend the series
and will do that after 4.9-rc1 (probably somewhere after sunday) as I need a
stable base for that shared branch.
Heiko
^ permalink raw reply
* aarch64 ACPI boot regressed by commit 7ba5f605f3a0 ("arm64/numa: remove the limitation that cpu0 must bind to node0")
From: Laszlo Ersek @ 2016-10-14 13:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014080524.4hm2b4p373r7rhel@hawk.localdomain>
On 10/14/16 10:05, Andrew Jones wrote:
> On Fri, Oct 14, 2016 at 12:50:29AM +0200, Laszlo Ersek wrote:
>> (4) Analysis (well, a lame attempt at that, because I have zero
>> familiarity with this code). Let me quote the patch:
>>
>>> commit 7ba5f605f3a0d9495aad539eeb8346d726dfc183
>>> Author: Zhen Lei <thunder.leizhen@huawei.com>
>>> Date: Thu Sep 1 14:55:04 2016 +0800
>>>
>>> arm64/numa: remove the limitation that cpu0 must bind to node0
>>>
>>> 1. Remove the old binding code.
>>> 2. Read the nid of cpu0 from dts.
>>> 3. Fallback the nid of cpu0 to 0 when numa=off is set in bootargs.
>>>
>>> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
>>> Signed-off-by: Will Deacon <will.deacon@arm.com>
>>>
>>> diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
>>> index c3c08368a685..8b048e6ec34a 100644
>>> --- a/arch/arm64/kernel/smp.c
>>> +++ b/arch/arm64/kernel/smp.c
>>> @@ -624,6 +624,7 @@ static void __init of_parse_and_init_cpus(void)
>>> }
>>>
>>> bootcpu_valid = true;
>>> + early_map_cpu_to_node(0, of_node_to_nid(dn));
>>>
>>> /*
>>> * cpu_logical_map has already been
>>> diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
>>> index 0a15f010b64a..778a985c8a70 100644
>>> --- a/arch/arm64/mm/numa.c
>>> +++ b/arch/arm64/mm/numa.c
>>> @@ -116,16 +116,24 @@ static void __init setup_node_to_cpumask_map(void)
>>> */
>>> void numa_store_cpu_info(unsigned int cpu)
>>> {
>>> - map_cpu_to_node(cpu, numa_off ? 0 : cpu_to_node_map[cpu]);
>>> + map_cpu_to_node(cpu, cpu_to_node_map[cpu]);
>>> }
>>>
>>> void __init early_map_cpu_to_node(unsigned int cpu, int nid)
>>> {
>>> /* fallback to node 0 */
>>> - if (nid < 0 || nid >= MAX_NUMNODES)
>>> + if (nid < 0 || nid >= MAX_NUMNODES || numa_off)
>>> nid = 0;
>
> The ACPI equivalent code must be missing (at least) the above, because,
> even with DT, mach-virt won't have cpu to node mappings unless numa
> is configured on the command line. Can you try adding something like
>
> -m 512 -smp 4 \
> -numa node,mem=256M,cpus=0-1,nodeid=0 \
> -numa node,mem=256M,cpus=2-3,nodeid=1
>
> to your QEMU command line?
I added the following to my domain XML, under <cpu>:
<numa>
<cell id='0' cpus='0-1' memory='2097152' unit='KiB'/>
<cell id='1' cpus='2-3' memory='2097152' unit='KiB'/>
</numa>
(See <http://libvirt.org/formatdomain.html#elementsCPU>.)
With that, each NUMA node gets half of the VCPUs and half of the guest RAM.
(This is in a different guest now, one that has a bleeding edge Fedora kernel -- I didn't want to rebuild the upstream kernel yet again, just for this test. So, "4.9.0-0.rc0.git7.1.fc26.aarch64" is based on upstream v4.8-14109-g1573d2c, and it reproduces the problem too.)
> Then when you boot with ACPI you'll get a
> SRAT.
Yes, that's confirmed by the guest kernel log (see below).
> If that works, then we're just missing the "no SRAT, nid = 0"
> code (that should have been added with this patch)
It still crashes with the SRAT, with the following log:
> EFI stub: Booting Linux Kernel...
> ConvertPages: Incompatible memory types
> EFI stub: Using DTB from configuration table
> EFI stub: Exiting boot services and installing virtual address map...
> [ 0.000000] Booting Linux on physical CPU 0x0
> [ 0.000000] Linux version 4.9.0-0.rc0.git7.1.fc26.aarch64 (mockbuild at buildvm-aarch64-01.arm.fedoraproject.org) (gcc version 6.2.1 20160916 (Red Hat 6.2.1-2) (GCC) ) #1 SMP Wed Oct 12 17:44:54 UTC 2016
> [ 0.000000] Boot CPU: AArch64 Processor [500f0000]
> [ 0.000000] efi: Getting EFI parameters from FDT:
> [ 0.000000] efi: EFI v2.60 by EDK II
> [ 0.000000] efi: SMBIOS 3.0=0xbbdb0000 ACPI 2.0=0xb86d0000 MEMATTR=0xb936b018
> [ 0.000000] cma: Reserved 512 MiB at 0x00000000e0000000
> [ 0.000000] ACPI: Early table checksum verification disabled
> [ 0.000000] ACPI: RSDP 0x00000000B86D0000 000024 (v02 BOCHS )
> [ 0.000000] ACPI: XSDT 0x00000000B86C0000 000054 (v01 BOCHS BXPCFACP 00000001 01000013)
> [ 0.000000] ACPI: FACP 0x00000000B83E0000 00010C (v05 BOCHS BXPCFACP 00000001 BXPC 00000001)
> [ 0.000000] ACPI: DSDT 0x00000000B83F0000 0010E5 (v02 BOCHS BXPCDSDT 00000001 BXPC 00000001)
> [ 0.000000] ACPI: APIC 0x00000000B83D0000 00018C (v03 BOCHS BXPCAPIC 00000001 BXPC 00000001)
> [ 0.000000] ACPI: GTDT 0x00000000B83C0000 000060 (v02 BOCHS BXPCGTDT 00000001 BXPC 00000001)
> [ 0.000000] ACPI: MCFG 0x00000000B83B0000 00003C (v01 BOCHS BXPCMCFG 00000001 BXPC 00000001)
> [ 0.000000] ACPI: SPCR 0x00000000B83A0000 000050 (v02 BOCHS BXPCSPCR 00000001 BXPC 00000001)
> [ 0.000000] ACPI: SRAT 0x00000000B8390000 0000C8 (v03 BOCHS BXPCSRAT 00000001 BXPC 00000001)
> [ 0.000000] ACPI: SPCR: console: pl011,mmio,0x9000000,9600
> [ 0.000000] earlycon: pl11 at MMIO 0x0000000009000000 (options '9600')
> [ 0.000000] bootconsole [pl11] enabled
> [ 0.000000] ACPI: NUMA: SRAT: PXM 0 -> MPIDR 0x0 -> Node 0
> [ 0.000000] ACPI: NUMA: SRAT: PXM 0 -> MPIDR 0x1 -> Node 0
> [ 0.000000] ACPI: NUMA: SRAT: PXM 1 -> MPIDR 0x2 -> Node 1
> [ 0.000000] ACPI: NUMA: SRAT: PXM 1 -> MPIDR 0x3 -> Node 1
> [ 0.000000] NUMA: Adding memblock [0x40000000 - 0xbfffffff] on node 0
> [ 0.000000] ACPI: SRAT: Node 0 PXM 0 [mem 0x40000000-0xbfffffff]
> [ 0.000000] NUMA: Adding memblock [0xc0000000 - 0x13fffffff] on node 1
> [ 0.000000] ACPI: SRAT: Node 1 PXM 1 [mem 0xc0000000-0x13fffffff]
> [ 0.000000] NUMA: Initmem setup node 0 [mem 0x40000000-0xbfffffff]
> [ 0.000000] NUMA: NODE_DATA [mem 0xbfff2580-0xbfffffff]
> [ 0.000000] NUMA: Initmem setup node 1 [mem 0xc0000000-0x13fffffff]
> [ 0.000000] NUMA: NODE_DATA [mem 0x13fff2580-0x13fffffff]
> [ 0.000000] Zone ranges:
> [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
> [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
> [ 0.000000] Movable zone start for each node
> [ 0.000000] Early memory node ranges
> [ 0.000000] node 0: [mem 0x0000000040000000-0x00000000b838ffff]
> [ 0.000000] node 0: [mem 0x00000000b8390000-0x00000000b83fffff]
> [ 0.000000] node 0: [mem 0x00000000b8400000-0x00000000b841ffff]
> [ 0.000000] node 0: [mem 0x00000000b8420000-0x00000000b874ffff]
> [ 0.000000] node 0: [mem 0x00000000b8750000-0x00000000bbc1ffff]
> [ 0.000000] node 0: [mem 0x00000000bbc20000-0x00000000bbffffff]
> [ 0.000000] node 0: [mem 0x00000000bc000000-0x00000000bfffffff]
> [ 0.000000] node 1: [mem 0x00000000c0000000-0x000000013fffffff]
> [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x00000000bfffffff]
> [ 0.000000] Initmem setup node 1 [mem 0x00000000c0000000-0x000000013fffffff]
> [ 0.000000] psci: probing for conduit method from ACPI.
> [ 0.000000] psci: PSCIv0.2 detected in firmware.
> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
> [ 0.000000] psci: Trusted OS migration not required
> [ 0.000000] percpu: Embedded 3 pages/cpu @fffffe007fda0000 s117832 r8192 d70584 u196608
> [ 0.000000] Detected PIPT I-cache on CPU0
> [ 0.000000] Built 2 zonelists in Node order, mobility grouping on. Total pages: 65472
> [ 0.000000] Policy zone: Normal
> [ 0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz-4.9.0-0.rc0.git7.1.fc26.aarch64 root=/dev/mapper/fedora-root ro rd.lvm.lv=fedora/root rd.lvm.lv=fedora/swap LANG=en_US.UTF-8 earlycon acpi=force
> [ 0.000000] PID hash table entries: 4096 (order: -1, 32768 bytes)
> [ 0.000000] software IO TLB [mem 0xdbff0000-0xdfff0000] (64MB) mapped at [fffffe009bff0000-fffffe009ffeffff]
> [ 0.000000] Memory: 3542976K/4194304K available (9148K kernel code, 1612K rwdata, 3776K rodata, 1600K init, 15899K bss, 127040K reserved, 524288K cma-reserved)
> [ 0.000000] Virtual kernel memory layout:
> [ 0.000000] modules : 0xfffffc0000000000 - 0xfffffc0008000000 ( 128 MB)
> vmalloc : 0xfffffc0008000000 - 0xfffffdff5fff0000 ( 2045 GB)
> .text : 0xfffffc0008080000 - 0xfffffc0008970000 ( 9152 KB)
> .rodata : 0xfffffc0008970000 - 0xfffffc0008d30000 ( 3840 KB)
> .init : 0xfffffc0008d30000 - 0xfffffc0008ec0000 ( 1600 KB)
> .data : 0xfffffc0008ec0000 - 0xfffffc0009053200 ( 1613 KB)
> .bss : 0xfffffc0009053200 - 0xfffffc0009fda058 ( 15900 KB)
> fixed : 0xfffffdff7e7d0000 - 0xfffffdff7ec00000 ( 4288 KB)
> PCI I/O : 0xfffffdff7ee00000 - 0xfffffdff7fe00000 ( 16 MB)
> vmemmap : 0xfffffdff80000000 - 0xfffffe0000000000 ( 2 GB maximum)
> 0xfffffdff80000000 - 0xfffffdff80400000 ( 4 MB actual)
> memory : 0xfffffe0000000000 - 0xfffffe0100000000 ( 4096 MB)
> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=2
> [ 0.000000] Running RCU self tests
> [ 0.000000] Hierarchical RCU implementation.
> [ 0.000000] RCU lockdep checking is enabled.
> [ 0.000000] Build-time adjustment of leaf fanout to 64.
> [ 0.000000] RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=4.
> [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=4
> [ 0.000000] kmemleak: Kernel memory leak detector disabled
> [ 0.000000] NR_IRQS:64 nr_irqs:64 0
> [ 0.000000] GICv2m: ACPI overriding V2M MSI_TYPER (base:80, num:64)
> [ 0.000000] GICv2m: range[mem 0x08020000-0x08020fff], SPI[80:143]
> [ 0.000000] GIC: PPI11 is secure or misconfigured
> [ 0.000000] arm_arch_timer: WARNING: Invalid trigger for IRQ3, assuming level low
> [ 0.000000] arm_arch_timer: WARNING: Please fix your firmware
> [ 0.000000] arm_arch_timer: Architected cp15 timer(s) running at 50.00MHz (virt).
> [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xb8812736b, max_idle_ns: 440795202655 ns
> [ 0.000003] sched_clock: 56 bits at 50MHz, resolution 20ns, wraps every 4398046511100ns
> [ 0.002198] Console: colour dummy device 80x25
> [ 0.003319] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
> [ 0.005236] ... MAX_LOCKDEP_SUBCLASSES: 8
> [ 0.006183] ... MAX_LOCK_DEPTH: 48
> [ 0.007273] ... MAX_LOCKDEP_KEYS: 8191
> [ 0.008287] ... CLASSHASH_SIZE: 4096
> [ 0.009296] ... MAX_LOCKDEP_ENTRIES: 32768
> [ 0.010327] ... MAX_LOCKDEP_CHAINS: 65536
> [ 0.011318] ... CHAINHASH_SIZE: 32768
> [ 0.012453] memory used by lock dependency info: 8159 kB
> [ 0.013736] per task-struct memory footprint: 1920 bytes
> [ 0.015742] mempolicy: Enabling automatic NUMA balancing. Configure with numa_balancing= or the kernel.numa_balancing sysctl
> [ 0.018710] Calibrating delay loop (skipped), value calculated using timer frequency.. 100.00 BogoMIPS (lpj=50000)
> [ 0.021221] pid_max: default: 32768 minimum: 301
> [ 0.022806] ACPI: Core revision 20160831
> [ 0.027885] ACPI: 1 ACPI AML tables successfully acquired and loaded
>
> [ 0.030252] Security Framework initialized
> [ 0.031355] Yama: becoming mindful.
> [ 0.032176] SELinux: Initializing.
> [ 0.033925] Dentry cache hash table entries: 524288 (order: 6, 4194304 bytes)
> [ 0.037039] Inode-cache hash table entries: 262144 (order: 5, 2097152 bytes)
> [ 0.039383] Mount-cache hash table entries: 8192 (order: 0, 65536 bytes)
> [ 0.041135] Mountpoint-cache hash table entries: 8192 (order: 0, 65536 bytes)
> [ 0.044725] ftrace: allocating 29596 entries in 8 pages
> [ 0.080467] ASID allocator initialised with 65536 entries
> [ 0.082070] ------------[ cut here ]------------
> [ 0.083227] WARNING: CPU: 0 PID: 1 at kernel/workqueue.c:5458 wq_numa_init+0x178/0x21c
> [ 0.085304] Modules linked in:
> [ 0.086102]
> [ 0.086499] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.0-0.rc0.git7.1.fc26.aarch64 #1
> [ 0.088611] Hardware name: linux,dummy-virt (DT)
> [ 0.089816] task: fffffe00700aac00 task.stack: fffffe00f8044000
> [ 0.091375] PC is at wq_numa_init+0x178/0x21c
> [ 0.092514] LR is at wq_numa_init+0x14c/0x21c
> [ 0.093654] pc : [<fffffc0008d3f434>] lr : [<fffffc0008d3f408>] pstate: 60000045
> [ 0.095589] sp : fffffe00f8047cb0
> [ 0.096457] x29: fffffe00f8047cb0 [ 0.097311] x28: 0000000000000000
> [ 0.098201]
> [ 0.098601] x27: 0000000000000000 [ 0.099450] x26: fffffc0008ef4a28
> [ 0.100342]
> [ 0.100730] x25: fffffc0008ef3000 [ 0.101576] x24: fffffc0008ef3574
> [ 0.102466]
> [ 0.102853] x23: 0000000000000000 [ 0.103700] x22: fffffe007937de00
> [ 0.104593]
> [ 0.104982] x21: fffffc0008e887f8 [ 0.105829] x20: fffffc0009091000
> [ 0.106723]
> [ 0.107111] x19: 0000000000000000 [ 0.107956] x18: 0000000050642c6a
> [ 0.108847]
> [ 0.109234] x17: 0000000000000000 [ 0.110078] x16: 0000000000000000
> [ 0.110968]
> [ 0.111363] x15: 00000000fcacdc89 [ 0.112199] x14: 0000000000000000
> [ 0.113087]
> [ 0.113481] x13: 0000000000000000 [ 0.114324] x12: 00000000fe2ce6e0
> [ 0.115204]
> [ 0.115597] x11: 0000000000000001 [ 0.116439] x10: 0000000000000048
> [ 0.117328]
> [ 0.117716] x9 : 0000000000000000 [ 0.118563] x8 : fffffe00f4010080
> [ 0.119453]
> [ 0.119833] x7 : 0000000000000000 [ 0.120678] x6 : 0000000000000000
> [ 0.121571]
> [ 0.121959] x5 : 000000000000000f [ 0.122804] x4 : 0000000000000000
> [ 0.123695]
> [ 0.124084] x3 : 0000000000000000 [ 0.124922] x2 : 0000000000000000
> [ 0.125815]
> [ 0.126204] x1 : 0000000000000004 [ 0.127055] x0 : 00000000ffffffff
> [ 0.127966]
> [ 0.128361]
> [ 0.128767] ---[ end trace 0000000000000000 ]---
> [ 0.129983] Call trace:
> [ 0.130629] Exception stack(0xfffffe00f8047ad0 to 0xfffffe00f8047c00)
> [ 0.132316] 7ac0: 0000000000000000 0000040000000000
> [ 0.134360] 7ae0: fffffe00f8047cb0 fffffc0008d3f434 0000000060000045 000000000000003d
> [ 0.136405] 7b00: fffffc0008ef4000 fffffe007937df00 0000000000000000 0000000000000000
> [ 0.138446] 7b20: fffffc0008bf4110 0000000000000189 0000000000000018 0000000000000028
> [ 0.140498] 7b40: fffffe00f8047b80 0000000000000000 fffffe0000000000 fffffc000848af30
> [ 0.142541] 7b60: fffffe00f8047ba0 fffffc0008134d24 fffffe00f8044000 0000000000000040
> [ 0.144558] 7b80: 00000000ffffffff 0000000000000004 0000000000000000 0000000000000000
> [ 0.146607] 7ba0: 0000000000000000 000000000000000f 0000000000000000 0000000000000000
> [ 0.148664] 7bc0: fffffe00f4010080 0000000000000000 0000000000000048 0000000000000001
> [ 0.150704] 7be0: 00000000fe2ce6e0 0000000000000000 0000000000000000 00000000fcacdc89
> [ 0.152752] [<fffffc0008d3f434>] wq_numa_init+0x178/0x21c
> [ 0.154160] [<fffffc0008d3f578>] init_workqueues+0xa0/0x4b8
> [ 0.155596] [<fffffc0008083594>] do_one_initcall+0x44/0x138
> [ 0.157059] [<fffffc0008d30d28>] kernel_init_freeable+0x178/0x2dc
> [ 0.158670] [<fffffc0008956f48>] kernel_init+0x18/0x110
> [ 0.160036] [<fffffc0008083330>] ret_from_fork+0x10/0x20
> [ 0.161440] workqueue: NUMA node mapping not available for cpu0, disabling NUMA support
> [ 0.165296] Remapping and enabling EFI services.
> [ 0.166586] Unable to handle kernel paging request at virtual address b91000006be8
> [ 0.168448] pgd = fffffc000a010000
> [ 0.169341] [b91000006be8] *pgd=0000000000000000[ 0.170505] , *pud=0000000000000000
> , *pmd=0000000000000000[ 0.171942]
> [ 0.172332] Internal error: Oops: 96000004 [#1] SMP
> [ 0.173600] Modules linked in:
> [ 0.174407] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 4.9.0-0.rc0.git7.1.fc26.aarch64 #1
> [ 0.176836] Hardware name: linux,dummy-virt (DT)
> [ 0.178038] task: fffffe00700aac00 task.stack: fffffe00f8044000
> [ 0.179579] PC is at __ll_sc_atomic_add+0x20/0x40
> [ 0.180800] LR is at __lock_acquire+0xe8/0x698
> [ 0.181961] pc : [<fffffc0008487390>] lr : [<fffffc0008138c08>] pstate: 800000c5
> [ 0.183895] sp : fffffe00f8047820
> [ 0.184755] x29: fffffe00f8047820 [ 0.185588] x28: fffffc0008ef3000
> [ 0.186479]
> [ 0.186868] x27: fffffc0008ef2358 [ 0.187713] x26: fffffc0009ce6000
> [ 0.188606]
> [ 0.188997] x25: 0000000000000001 [ 0.189857] x24: 0000000000000000
> [ 0.190731]
> [ 0.191115] x23: fffffe00700aac00 [ 0.191951] x22: 0000000000000000
> [ 0.192843]
> [ 0.193231] x21: fffffe007fd9a018 [ 0.194074] x20: 0000000000000000
> [ 0.194966]
> [ 0.195361] x19: fffffe007fd9a018 [ 0.196192] x18: 0000000000000010
> [ 0.197077]
> [ 0.197476] x17: 0000000057181979 [ 0.198325] x16: 0000000000000000
> [ 0.199209]
> [ 0.199604] x15: 0000000000000000 [ 0.200450] x14: 0000000000000000
> [ 0.201337]
> [ 0.201723] x13: 0000000000000001 [ 0.202555] x12: fffffe007fff2580
> [ 0.203432]
> [ 0.203819] x11: 0000000000000000 [ 0.204664] x10: 0000000000000011
> [ 0.205550]
> [ 0.205937] x9 : 0000000000000001 [ 0.206784] x8 : 0000b91000006be8
> [ 0.207678]
> [ 0.208062] x7 : fffffc0008299fcc [ 0.208899] x6 : 0000000000000000
> [ 0.209787]
> [ 0.210176] x5 : 0000000000000080 [ 0.211022] x4 : 0000b91000006a50
> [ 0.211913]
> [ 0.212307] x3 : 0000000000000000 [ 0.213147] x2 : 000022c80000f420
> [ 0.214034]
> [ 0.214421] x1 : 0000b91000006be8 [ 0.215251] x0 : fffffc0008138c08
> [ 0.216134]
> [ 0.216527]
> [ 0.216916] Process swapper/0 (pid: 1, stack limit = 0xfffffe00f8044020)
> [ 0.218671] Stack: (0xfffffe00f8047820 to 0xfffffe00f8048000)
> [ 0.220167] 7820: fffffe00f8047840 fffffc0008138c08 fffffe00f8044000 0000000000000001
> [ 0.222190] 7840: fffffe00f80478c0 fffffc0008139590 fffffe007fd9a018 0000000000000000
> [ 0.224238] 7860: 0000000000000000 0000000000000000 0000000000000001 0000000000000000
> [ 0.226284] 7880: fffffc0008299fcc 00000000000000c0 fffffc0008ef2358 fffffc0008ef3000
> [ 0.228318] 78a0: 0000000000000001 fffffc0009ce6000 0000000000000000 fffffe0000000000
> [ 0.230362] 78c0: fffffe00f8047930 fffffc000895f2c4 fffffe007fd9a000 fffffc0008299fcc
> [ 0.232394] 78e0: fffffe007fd9a000 fffffc000829ad94 fffffe007001db00 000000000000e8e8
> [ 0.234435] 7900: fffffe007001db00 fffffe007001dbf8 fffffe00fff3ef50 0000000000000000
> [ 0.236481] 7920: fffffe00f8047a20 fffffc0008ef2000 fffffe00f8047950 fffffc0008299fcc
> [ 0.238516] 7940: 00000000ffffffff fffffe007fd9a000 fffffe00f8047a70 fffffc000829aa68
> [ 0.240560] 7960: 00000000ffffffff 0000000000000001 00000000024000c0 fffffc000829ad94
> [ 0.242604] 7980: 0000000000210d00 000000000000e8e8 fffffe007001db00 fffffe007001dbf8
> [ 0.244634] 79a0: fffffe00fff3ef50 0000000000000000 fffffe00f8044000 0000000000000040
> [ 0.246678] 79c0: fffffc000828d620 fffffc0008ef3000 00000000026080c0 fffffe00fff3ef60
> [ 0.248733] 79e0: fffffe00f8047a00 fffffc00024000c0 fffffc0008f89000 0000000000000000
> [ 0.250783] 7a00: fffffe00f8047a20 fffffc000822f62c fffffc0009016b30 fffffe00f8047b40
> [ 0.252896] 7a20: fffffe00f8047ba0 fffffc000828d620 0000000000000000 fffffc0008ef0b28
> [ 0.255009] 7a40: fffffe007fff3c00 0000000000000000 0000000000000000 0000000000000000
> [ 0.257121] 7a60: fffffe00f8044000 0000000000000000 fffffe00f8047b90 fffffc000829ad94
> [ 0.259240] 7a80: 0000000000000040 fffffe007001db00 00000000024000c0 00000000ffffffff
> [ 0.261358] 7aa0: fffffc0008266284 fffffe00fff3ef50 0000000020000000 00e8000000000f07
> [ 0.263472] 7ac0: 0000000000000000 0000000000000400 fffffc0008f89000 0000000000000000
> [ 0.265662] 7ae0: fffffe00f8047b00 fffffc000822f62c fffffe00fff3ef60 0000000000000000
> [ 0.267787] 7b00: 0000001000000000 fffffc0008266284 fffffe00f8047b50 fffffc0008134d24
> [ 0.269905] 7b20: fffffe00f8044000 0000000000000040 fffffc0008bf4110 0000000000000189
> [ 0.272020] 7b40: fffffc0008ef4000 0000000000000000 fffffe00f8047b70 fffffc000810267c
> [ 0.274136] 7b60: fffffc0009016893 0000000000000000 fffffe00f8047ba0 fffffc0008102784
> [ 0.276250] 7b80: fffffe00f8047b90 fffffc000829ad7c fffffe00f8047bd0 fffffc000829b13c
> [ 0.278371] 7ba0: fffffe007001db00 00000000024000c0 fffffc0008266284 fffffe007001db00
> [ 0.280484] 7bc0: fffffc0008ef4000 0000000000000000 fffffe00f8047c30 fffffc0008266284
> [ 0.282600] 7be0: fffffdff801b0200 fffffe006c080000 000000006c080000 0000000020000000
> [ 0.284715] 7c00: fffffe00f0010008 0000000004000000 0000000020000000 00e8000000000f07
> [ 0.286831] 7c20: 0000000000000000 0000000000000000 fffffe00f8047c50 fffffc0008098e24
> [ 0.288948] 7c40: fffffdff801b0200 0000000000000001 fffffe00f8047c80 fffffc00080991d0
> [ 0.291062] 7c60: 0000000024000000 0000000000000001 0000000024000000 fffffc0008ef0b28
> [ 0.293178] 7c80: fffffe00f8047d00 fffffc0008d361cc fffffe0078416018 00e8000000000707
> [ 0.295296] 7ca0: fffffc0008ff6410 fffffc0008ef7000 0000000000000000 fffffc0008ff6410
> [ 0.297408] 7cc0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.299523] 7ce0: 0000000000000000 00e8000000000f05 fffffc0008098dd0 0000000023ffffff
> [ 0.301636] 7d00: fffffe00f8047d10 fffffc0008d35020 fffffe00f8047d40 fffffc0008d88284
> [ 0.303748] 7d20: fffffe0078416018 fffffc0008ff6000 fffffc0008c87348 fffffc0008d8821c
> [ 0.305863] 7d40: fffffe00f8047d90 fffffc0008083594 fffffc0008d88154 fffffe00f8044000
> [ 0.307987] 7d60: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.310099] 7d80: 0000000000000000 0000000004000000 fffffe00f8047e00 fffffc0008d30d28
> [ 0.312217] 7da0: fffffc0008e622d8 fffffc0008e622e0 0000000000000040 0000000000000000
> [ 0.314333] 7dc0: fffffe00f8047e00 fffffc0008d30d18 fffffc0008e62220 fffffc0008e622e0
> [ 0.316445] 7de0: 0000000000000040 0000000000000000 0000000000000000 fffffc0008e622e0
> [ 0.318572] 7e00: fffffe00f8047ea0 fffffc0008956f48 fffffc0008956f30 0000000000000000
> [ 0.320692] 7e20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.322805] 7e40: 0000000000000000 0000000000000000 0000000000000000 0000000000000001
> [ 0.324914] 7e60: 0000000000000003 0000000000000000 0000000000000000 0000000000000000
> [ 0.327027] 7e80: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.329139] 7ea0: 0000000000000000 fffffc0008083330 fffffc0008956f30 0000000000000000
> [ 0.331248] 7ec0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.333361] 7ee0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.335470] 7f00: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.337585] 7f20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.339695] 7f40: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.341810] 7f60: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.343923] 7f80: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.346037] 7fa0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.348154] 7fc0: 0000000000000000 0000000000000005 0000000000000000 0000000000000000
> [ 0.350272] 7fe0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 0.352392] Call trace:
> [ 0.353049] Exception stack(0xfffffe00f8047650 to 0xfffffe00f8047780)
> [ 0.354792] 7640: fffffe007fd9a018 0000040000000000
> [ 0.356910] 7660: fffffe00f8047820 fffffc0008487390 fffffe00f80476e0 fffffc0008131290
> [ 0.359025] 7680: fffffc000901690b fffffc0008f1e000 0000000000000001 fffffe00700aac00
> [ 0.361140] 76a0: fffffc000901690b fffffc0008f27a28 fffffe00fff3b700 fffffc0008e8b700
> [ 0.363255] 76c0: fffffe00fff3b700 fffffc0008ef1000 fffffe00f80476e0 00000000000000c0
> [ 0.365373] 76e0: fffffe00f8047720 fffffc000811a374 fffffc0008138c08 0000b91000006be8
> [ 0.367483] 7700: 000022c80000f420 0000000000000000 0000b91000006a50 0000000000000080
> [ 0.369593] 7720: 0000000000000000 fffffc0008299fcc 0000b91000006be8 0000000000000001
> [ 0.371702] 7740: 0000000000000011 0000000000000000 fffffe007fff2580 0000000000000001
> [ 0.373817] 7760: 0000000000000000 0000000000000000 0000000000000000 0000000057181979
> [ 0.375935] [<fffffc0008487390>] __ll_sc_atomic_add+0x20/0x40
> [ 0.377489] [<fffffc0008138c08>] __lock_acquire+0xe8/0x698
> [ 0.378960] [<fffffc0008139590>] lock_acquire+0xd8/0x2c0
> [ 0.380394] [<fffffc000895f2c4>] _raw_spin_lock+0x4c/0x60
> [ 0.381843] [<fffffc0008299fcc>] get_partial_node.isra.23+0x4c/0x440
> [ 0.383559] [<fffffc000829aa68>] ___slab_alloc+0x438/0x710
> [ 0.385031] [<fffffc000829ad94>] __slab_alloc+0x54/0xa0
> [ 0.386441] [<fffffc000829b13c>] kmem_cache_alloc+0x35c/0x428
> [ 0.387983] [<fffffc0008266284>] ptlock_alloc+0x2c/0x58
> [ 0.389394] [<fffffc0008098e24>] pgd_pgtable_alloc+0x54/0xd8
> [ 0.390912] [<fffffc00080991d0>] __create_pgd_mapping+0x158/0x2a8
> [ 0.392556] [<fffffc0008d361cc>] create_pgd_mapping+0x30/0x38
> [ 0.394100] [<fffffc0008d35020>] efi_create_mapping+0xfc/0x110
> [ 0.395682] [<fffffc0008d88284>] arm_enable_runtime_services+0x130/0x204
> [ 0.397501] [<fffffc0008083594>] do_one_initcall+0x44/0x138
> [ 0.399001] [<fffffc0008d30d28>] kernel_init_freeable+0x178/0x2dc
> [ 0.400646] [<fffffc0008956f48>] kernel_init+0x18/0x110
> [ 0.402053] [<fffffc0008083330>] ret_from_fork+0x10/0x20
> [ 0.403488] Code: aa1e03e0 aa0103e8 d503201f f9800111 (885f7d00)
> [ 0.405145] ---[ end trace f6be31446b0a9526 ]---
> [ 0.406286] note: swapper/0[1] exited with preempt_count 1
> [ 0.407687] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
> [ 0.407687]
> [ 0.410047] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
> [ 0.410047]
>
This log contains two call traces. The first is a WARNING in wq_numa_init(). The second is the unhandled page fault.
Note the warning message (from wq_numa_init()):
workqueue: NUMA node mapping not available for cpu0, disabling NUMA support
Something looks genuinely broken with the cpu <-> numa-node associations in the ACPI case -- it even seems to fail when the SRAT does exist.
So, perhaps, commit 7ba5f605f3a0 may not have introduced the bug, only exposed one in the ACPI code?...
Thanks
Laszlo
^ permalink raw reply
* [RESEND PATCH 3/3] ARM: dts: artpec: add pcie support
From: Niklas Cassel @ 2016-10-14 13:09 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas Cassel <niklas.cassel@axis.com>
Add PCIe support to the ARTPEC-6 SoC. This uses the existing
pcie-artpec6 driver.
So, all that is needed is device tree entries in the DTS.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
---
arch/arm/boot/dts/artpec6-devboard.dts | 4 ++++
arch/arm/boot/dts/artpec6.dtsi | 29 ++++++++++++++++++++++++++++-
2 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/artpec6-devboard.dts b/arch/arm/boot/dts/artpec6-devboard.dts
index f823ed3..9dfe845 100644
--- a/arch/arm/boot/dts/artpec6-devboard.dts
+++ b/arch/arm/boot/dts/artpec6-devboard.dts
@@ -46,6 +46,10 @@
status = "okay";
};
+&pcie {
+ status = "okay";
+};
+
ðernet {
status = "okay";
diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi
index 3fac4c4..effaa4a 100644
--- a/arch/arm/boot/dts/artpec6.dtsi
+++ b/arch/arm/boot/dts/artpec6.dtsi
@@ -66,7 +66,7 @@
};
};
- syscon {
+ syscon: syscon at f8000000 {
compatible = "axis,artpec6-syscon", "syscon";
reg = <0xf8000000 0x48>;
};
@@ -145,6 +145,33 @@
interrupt-parent = <&intc>;
};
+ pcie: pcie at f8050000 {
+ compatible = "axis,artpec6-pcie", "snps,dw-pcie";
+ reg = <0xf8050000 0x2000
+ 0xf8040000 0x1000
+ 0xc0000000 0x2000>;
+ reg-names = "dbi", "phy", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ /* downstream I/O */
+ ranges = <0x81000000 0 0 0xc0002000 0 0x00010000
+ /* non-prefetchable memory */
+ 0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>;
+ num-lanes = <2>;
+ bus-range = <0x00 0xff>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ axis,syscon-pcie = <&syscon>;
+ status = "disabled";
+ };
+
amba at 0 {
compatible = "simple-bus";
#address-cells = <0x1>;
--
2.1.4
^ permalink raw reply related
* [RESEND PATCH 2/3] ARM: ARTPEC-6: add pcie related options
From: Niklas Cassel @ 2016-10-14 13:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas Cassel <niklas.cassel@axis.com>
Now that the ARTPEC-6 PCIe controller is merged, add pcie related options
by default for MACH_ARTPEC6 so that the driver can be enabled in the build.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
---
arch/arm/mach-artpec/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-artpec/Kconfig b/arch/arm/mach-artpec/Kconfig
index 85a962a..f158890 100644
--- a/arch/arm/mach-artpec/Kconfig
+++ b/arch/arm/mach-artpec/Kconfig
@@ -15,6 +15,8 @@ config MACH_ARTPEC6
select HAVE_ARM_SCU
select HAVE_ARM_TWD if SMP
select MFD_SYSCON
+ select MIGHT_HAVE_PCI
+ select PCI_DOMAINS if PCI
help
Support for Axis ARTPEC-6 ARM Cortex A9 Platform
--
2.1.4
^ permalink raw reply related
* [RESEND PATCH 1/3] ARM: ARTPEC-6: add select MFD_SYSCON to MACH_ARTPEC6
From: Niklas Cassel @ 2016-10-14 13:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas Cassel <niklas.cassel@axis.com>
Since the ARTPEC-6 machine port already uses syscon,
MACH_ARTPEC6 should select MFD_SYSCON.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
---
arch/arm/mach-artpec/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-artpec/Kconfig b/arch/arm/mach-artpec/Kconfig
index 6cbe5a2..85a962a 100644
--- a/arch/arm/mach-artpec/Kconfig
+++ b/arch/arm/mach-artpec/Kconfig
@@ -14,6 +14,7 @@ config MACH_ARTPEC6
select HAVE_ARM_ARCH_TIMER
select HAVE_ARM_SCU
select HAVE_ARM_TWD if SMP
+ select MFD_SYSCON
help
Support for Axis ARTPEC-6 ARM Cortex A9 Platform
--
2.1.4
^ permalink raw reply related
* [PATCH 9/9] ARM: omap2plus_defconfig: Enable LP873X support
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014130033.14172-1-lokeshvutla@ti.com>
LP873X family of PMICs are used in dra71x-evm, So enable the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/configs/omap2plus_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 5695cff..e3fdf4d 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -267,11 +267,13 @@ CONFIG_TWL4030_WATCHDOG=m
CONFIG_MFD_TI_AM335X_TSCADC=m
CONFIG_MFD_PALMAS=y
CONFIG_MFD_TPS65217=y
+CONFIG_MFD_TI_LP873X=y
CONFIG_MFD_TPS65218=y
CONFIG_MFD_TPS65910=y
CONFIG_TWL6040_CORE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_LP872X=y
+CONFIG_REGULATOR_LP873X=y
CONFIG_REGULATOR_PALMAS=y
CONFIG_REGULATOR_PBIAS=y
CONFIG_REGULATOR_TI_ABB=y
--
2.9.3
^ permalink raw reply related
* [PATCH 8/9] ARM: omap2plus_defconfig: Enable REGULATOR_GPIO
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014130033.14172-1-lokeshvutla@ti.com>
GPIO regulator is used on dra71-evm platform to control MMCSD IO
voltage
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/configs/omap2plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 53e1a88..5695cff 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -270,6 +270,7 @@ CONFIG_MFD_TPS65217=y
CONFIG_MFD_TPS65218=y
CONFIG_MFD_TPS65910=y
CONFIG_TWL6040_CORE=y
+CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_LP872X=y
CONFIG_REGULATOR_PALMAS=y
CONFIG_REGULATOR_PBIAS=y
--
2.9.3
^ permalink raw reply related
* [PATCH 7/9] ARM: dts: Add support for dra718-evm
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014130033.14172-1-lokeshvutla@ti.com>
From: Nishanth Menon <nm@ti.com>
The DRA718-evm is a board based on TI's DRA718 processor targeting
BOM-optimized entry infotainment systems and is a reduced pin and
software compatible derivative of the DRA72 ES2.0 processor.
This platform features:
- 2GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI,
- uSD
- 8GB eMMC
- CAN
- PCIe
- USB3.0
- Video Input Port
- LP873x PMIC
More information can be found here[1].
Adding support for this board while reusing the data available in
dra72-evm-common.dtsi.
[1] http://www.ti.com/product/dra718
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/dra71-evm.dts | 230 ++++++++++++++++++++++++++++++++
arch/arm/boot/dts/dra72-evm-common.dtsi | 6 +-
3 files changed, 236 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/dra71-evm.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index befcd26..b92d501 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -590,7 +590,8 @@ dtb-$(CONFIG_SOC_DRA7XX) += \
am572x-idk.dtb \
dra7-evm.dtb \
dra72-evm.dtb \
- dra72-evm-revc.dtb
+ dra72-evm-revc.dtb \
+ dra71-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += \
orion5x-kuroboxpro.dtb \
orion5x-lacie-d2-network.dtb \
diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts
new file mode 100644
index 0000000..2b9a5a8
--- /dev/null
+++ b/arch/arm/boot/dts/dra71-evm.dts
@@ -0,0 +1,230 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "dra72-evm-common.dtsi"
+#include <dt-bindings/net/ti-dp83867.h>
+
+/ {
+ compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
+ model = "TI DRA718 EVM";
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
+ };
+
+ vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "vddshv8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-boot-on;
+ vin-supply = <&evm_5v0>;
+
+ gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x0
+ 3000000 0x1>;
+ };
+
+ poweroff: gpio-poweroff {
+ compatible = "gpio-poweroff";
+ gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
+ input;
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ lp8733: lp8733 at 60 {
+ compatible = "ti,lp8733";
+ reg = <0x60>;
+
+ buck0-in-supply =<&vsys_3v3>;
+ buck1-in-supply =<&vsys_3v3>;
+ ldo0-in-supply =<&evm_5v0>;
+ ldo1-in-supply =<&evm_5v0>;
+
+ lp8733_regulators: regulators {
+ lp8733_buck0_reg: buck0 {
+ /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
+ regulator-name = "lp8733-buck0";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ lp8733_buck1_reg: buck1 {
+ /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
+ regulator-name = "lp8733-buck1";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ lp8733_ldo0_reg: ldo0 {
+ /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
+ regulator-name = "lp8733-ldo0";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ lp8733_ldo1_reg: ldo1 {
+ /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
+ regulator-name = "lp8733-ldo1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+ };
+
+ lp8732: lp8732 at 61 {
+ compatible = "ti,lp8732";
+ reg = <0x61>;
+
+ buck0-in-supply =<&vsys_3v3>;
+ buck1-in-supply =<&vsys_3v3>;
+ ldo0-in-supply =<&vsys_3v3>;
+ ldo1-in-supply =<&vsys_3v3>;
+
+ lp8732_regulators: regulators {
+ lp8732_buck0_reg: buck0 {
+ /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
+ regulator-name = "lp8732-buck0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ lp8732_buck1_reg: buck1 {
+ /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
+ regulator-name = "lp8732-buck1";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ lp8732_ldo0_reg: ldo0 {
+ /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
+ regulator-name = "lp8732-ldo0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ lp8732_ldo1_reg: ldo1 {
+ /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
+ regulator-name = "lp8732-ldo1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+ };
+};
+
+&pcf_gpio_21 {
+ interrupt-parent = <&gpio7>;
+ interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
+};
+
+&pcf_hdmi {
+ p0 {
+ /*
+ * PM_OEn to High: Disable routing I2C3 to PM_I2C
+ * With this PM_SEL(p3) should not matter
+ */
+ gpio-hog;
+ gpios = <0 GPIO_ACTIVE_LOW>;
+ output-high;
+ line-name = "pm_oe_n";
+ };
+};
+
+&mmc1 {
+ vmmc_aux-supply = <&vpo_sd_1v8_3v3>;
+};
+
+&mac {
+ mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
+ <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
+ <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
+ dual_emac;
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <2>;
+ phy-mode = "rgmii-id";
+ dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <3>;
+ phy-mode = "rgmii-id";
+ dual_emac_res_vlan = <2>;
+};
+
+&davinci_mdio {
+ dp83867_0: ethernet-phy at 2 {
+ reg = <2>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+ ti,impedance-control = <0x1f>;
+ };
+
+ dp83867_1: ethernet-phy at 3 {
+ reg = <3>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+ ti,impedance-control = <0x1f>;
+ };
+};
+
+/* No Sata on this device */
+&sata_phy {
+ status = "disabled";
+};
+
+&sata {
+ status = "disabled";
+};
+
+/* No RTC on this device */
+&rtc {
+ status = "disabled";
+};
+
+&usb2_phy1 {
+ phy-supply = <&lp8733_ldo1_reg>;
+};
+
+&usb2_phy2 {
+ phy-supply = <&lp8733_ldo1_reg>;
+};
+
+&dss {
+ /* Supplied by VDA_1V8_PLL */
+ vdda_video-supply = <&lp8732_ldo0_reg>;
+};
+
+&hdmi {
+ /* Supplied by VDA_1V8_PHY */
+ vdda_video-supply = <&lp8732_ldo1_reg>;
+};
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index 9903ac7..e50fbee 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -29,7 +29,8 @@
};
evm_5v0: fixedregulator-evm5v0 {
- /* Output 1 of TPS43351QDAPRQ1 */
+ /* Output 1 of TPS43351QDAPRQ1 on dra72-evm */
+ /* Output 1 of LM5140QRWGTQ1 on dra71-evm */
compatible = "regulator-fixed";
regulator-name = "evm_5v0";
regulator-min-microvolt = <5000000>;
@@ -40,7 +41,8 @@
};
vsys_3v3: fixedregulator-vsys3v3 {
- /* Output 2 of TPS43351QDAPRQ1 */
+ /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
+ /* Output 2 of LM5140QRWGTQ1 on dra71-evm */
compatible = "regulator-fixed";
regulator-name = "vsys_3v3";
regulator-min-microvolt = <3300000>;
--
2.9.3
^ permalink raw reply related
* [PATCH 6/9] ARM: DRA7: hwmod: Do not register RTC on DRA71
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014130033.14172-1-lokeshvutla@ti.com>
From: Nishanth Menon <nm@ti.com>
RTC is not available on DRA71x, so accessing any of the RTC
register or clkctrl register will lead to a crash. So, do not
register RTC hwmod for DRA71x.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 1ab7096..7f48577 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -3845,7 +3845,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l3_main_1__pciess2,
&dra7xx_l4_cfg__pciess2,
&dra7xx_l3_main_1__qspi,
- &dra7xx_l4_per3__rtcss,
&dra7xx_l4_cfg__sata,
&dra7xx_l4_cfg__smartreflex_core,
&dra7xx_l4_cfg__smartreflex_mpu,
@@ -3905,6 +3904,11 @@ static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = {
NULL,
};
+static struct omap_hwmod_ocp_if *dra74x_dra72x_hwmod_ocp_ifs[] __initdata = {
+ &dra7xx_l4_per3__rtcss,
+ NULL,
+};
+
int __init dra7xx_hwmod_init(void)
{
int ret;
@@ -3920,5 +3924,9 @@ int __init dra7xx_hwmod_init(void)
if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP)
ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs);
+ /* now for the IPs *NOT* in dra71 */
+ if (!ret && !of_machine_is_compatible("ti,dra718"))
+ ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs);
+
return ret;
}
--
2.9.3
^ permalink raw reply related
* [PATCH 5/9] ARM: OMAP2+: board-generic: add support for DRA71x family
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014130033.14172-1-lokeshvutla@ti.com>
DRA71x processor family is a derivative of DRA722 ES2.0 targeted for
infotainment systems.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Documentation/devicetree/bindings/arm/omap/omap.txt | 6 ++++++
arch/arm/mach-omap2/board-generic.c | 1 +
2 files changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index f53e2ee..454b1be 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -86,6 +86,9 @@ SoCs:
- DRA722
compatible = "ti,dra722", "ti,dra72", "ti,dra7"
+- DRA718
+ compatible = "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"
+
- AM5728
compatible = "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"
@@ -181,6 +184,9 @@ Boards:
- DRA722 EVM: Software Development Board for DRA722
compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"
+- DRA718 EVM: Software Development Board for DRA718
+ compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"
+
- DM3730 Logic PD Torpedo + Wireless: Commercial System on Module with WiFi and Bluetooth
compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3"
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index bab814d..981b23a 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -341,6 +341,7 @@ static const char *const dra72x_boards_compat[] __initconst = {
"ti,am5718",
"ti,am5716",
"ti,dra722",
+ "ti,dra718",
NULL,
};
--
2.9.3
^ permalink raw reply related
* [PATCH 4/9] regulator: lp873x: Add support for populating input supply
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014130033.14172-1-lokeshvutla@ti.com>
In order to have a proper topology of regulators for a platform, each
registering regulator needs to populate supply_name field for identifying
its supply's name. Add supply_name field for lp873x regulators.
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Documentation/devicetree/bindings/mfd/lp873x.txt | 8 ++++++++
drivers/regulator/lp873x-regulator.c | 1 +
2 files changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/lp873x.txt b/Documentation/devicetree/bindings/mfd/lp873x.txt
index 52766c2..936cba3 100644
--- a/Documentation/devicetree/bindings/mfd/lp873x.txt
+++ b/Documentation/devicetree/bindings/mfd/lp873x.txt
@@ -7,6 +7,9 @@ Required properties:
- #gpio-cells: Should be two. The first cell is the pin number and
the second cell is used to specify flags.
See ../gpio/gpio.txt for more information.
+ - xxx-supply: Phandle to parent supply node of each regulator
+ populated under regulators node. xxx should match
+ the supply_name populated in driver.
- regulators: List of child nodes that specify the regulator
initialization data.
Example:
@@ -17,6 +20,11 @@ pmic: lp8733 at 60 {
gpio-controller;
#gpio-cells = <2>;
+ buck0-in-supply = <&vsys_3v3>;
+ buck1-in-supply = <&vsys_3v3>;
+ ldo0-in-supply = <&vsys_3v3>;
+ ldo1-in-supply = <&vsys_3v3>;
+
regulators {
lp8733_buck0: buck0 {
regulator-name = "lp8733-buck0";
diff --git a/drivers/regulator/lp873x-regulator.c b/drivers/regulator/lp873x-regulator.c
index e504b91..70e3df6 100644
--- a/drivers/regulator/lp873x-regulator.c
+++ b/drivers/regulator/lp873x-regulator.c
@@ -24,6 +24,7 @@
[_id] = { \
.desc = { \
.name = _name, \
+ .supply_name = _of "-in", \
.id = _id, \
.of_match = of_match_ptr(_of), \
.regulators_node = of_match_ptr("regulators"),\
--
2.9.3
^ permalink raw reply related
* [PATCH 3/9] ARM: dts: dra72: Add separate dtsi for tps65917
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014130033.14172-1-lokeshvutla@ti.com>
dra72-evm-common.dtsi consolidates dra72-evm.dts and dra72-evm-revc.dts
which also include tps65917 pmic support as both the evms uses the same
pmic. But, dra71-evm has mostly similar features with a different pmic.
In order to exploit dra72-evm-common.dtsi, creating a separate dtsi
for tps65915 support and including it in respective board files.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/boot/dts/dra72-evm-common.dtsi | 128 ----------------------------
arch/arm/boot/dts/dra72-evm-revc.dts | 21 +++--
arch/arm/boot/dts/dra72-evm-tps65917.dtsi | 134 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/dra72-evm.dts | 14 ++--
4 files changed, 154 insertions(+), 143 deletions(-)
create mode 100644 arch/arm/boot/dts/dra72-evm-tps65917.dtsi
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index 8537b6a..9903ac7 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -214,123 +214,6 @@
status = "okay";
clock-frequency = <400000>;
- tps65917: tps65917 at 58 {
- compatible = "ti,tps65917";
- reg = <0x58>;
-
- interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
- interrupt-controller;
- #interrupt-cells = <2>;
-
- ti,system-power-controller;
-
- tps65917_pmic {
- compatible = "ti,tps65917-pmic";
-
- smps1-in-supply = <&vsys_3v3>;
- smps2-in-supply = <&vsys_3v3>;
- smps3-in-supply = <&vsys_3v3>;
- smps4-in-supply = <&vsys_3v3>;
- smps5-in-supply = <&vsys_3v3>;
- ldo1-in-supply = <&vsys_3v3>;
- ldo2-in-supply = <&vsys_3v3>;
- ldo3-in-supply = <&vsys_3v3>;
- ldo4-in-supply = <&evm_5v0>;
- ldo5-in-supply = <&vsys_3v3>;
-
- tps65917_regulators: regulators {
- smps1_reg: smps1 {
- /* VDD_MPU */
- regulator-name = "smps1";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps2_reg: smps2 {
- /* VDD_CORE */
- regulator-name = "smps2";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1150000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- smps3_reg: smps3 {
- /* VDD_GPU IVA DSPEVE */
- regulator-name = "smps3";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- smps4_reg: smps4 {
- /* VDDS1V8 */
- regulator-name = "smps4";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps5_reg: smps5 {
- /* VDD_DDR */
- regulator-name = "smps5";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1_reg: ldo1 {
- /* LDO1_OUT --> SDIO */
- regulator-name = "ldo1";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-allow-bypass;
- };
-
- ldo3_reg: ldo3 {
- /* VDDA_1V8_PHY */
- regulator-name = "ldo3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo5_reg: ldo5 {
- /* VDDA_1V8_PLL */
- regulator-name = "ldo5";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldo4_reg: ldo4 {
- /* VDDA_3V_USB: VDDA_USBHS33 */
- regulator-name = "ldo4";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- };
- };
- };
-
- tps65917_power_button {
- compatible = "ti,palmas-pwrbutton";
- interrupt-parent = <&tps65917>;
- interrupts = <1 IRQ_TYPE_NONE>;
- wakeup-source;
- ti,palmas-long-press-seconds = <6>;
- };
- };
-
pcf_gpio_21: gpio at 21 {
compatible = "ti,pcf8575", "nxp,pcf8575";
reg = <0x21>;
@@ -480,14 +363,6 @@
};
};
-&usb2_phy1 {
- phy-supply = <&ldo4_reg>;
-};
-
-&usb2_phy2 {
- phy-supply = <&ldo4_reg>;
-};
-
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
@@ -509,7 +384,6 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_default>;
vmmc-supply = <&evm_3v3_sd>;
- vmmc_aux-supply = <&ldo1_reg>;
bus-width = <4>;
/*
* SDCD signal is not being used here - using the fact that GPIO mode
@@ -606,8 +480,6 @@
&dss {
status = "ok";
-
- vdda_video-supply = <&ldo5_reg>;
};
&hdmi {
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
index 064b322..4ea2a0c 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -17,17 +17,22 @@
};
};
-&tps65917_regulators {
- ldo2_reg: ldo2 {
- /* LDO2_OUT --> VDDA_1V8_PHY2 */
- regulator-name = "ldo2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
+&i2c1 {
+ tps65917: tps65917 at 58 {
+ reg = <0x58>;
+
+ interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
};
};
+#include "dra72-evm-tps65917.dtsi"
+
+&ldo2_reg {
+ /* LDO2_OUT --> VDDA_1V8_PHY2 */
+ regulator-always-on;
+ regulator-boot-on;
+};
+
&hdmi {
vdda-supply = <&ldo2_reg>;
};
diff --git a/arch/arm/boot/dts/dra72-evm-tps65917.dtsi b/arch/arm/boot/dts/dra72-evm-tps65917.dtsi
new file mode 100644
index 0000000..ee6dac4
--- /dev/null
+++ b/arch/arm/boot/dts/dra72-evm-tps65917.dtsi
@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Integrated Power Management Chip
+ * http://www.ti.com/lit/ds/symlink/tps65917-q1.pdf
+ */
+
+&tps65917 {
+ compatible = "ti,tps65917";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ ti,system-power-controller;
+
+ tps65917_pmic {
+ compatible = "ti,tps65917-pmic";
+
+ smps1-in-supply = <&vsys_3v3>;
+ smps2-in-supply = <&vsys_3v3>;
+ smps3-in-supply = <&vsys_3v3>;
+ smps4-in-supply = <&vsys_3v3>;
+ smps5-in-supply = <&vsys_3v3>;
+ ldo1-in-supply = <&vsys_3v3>;
+ ldo2-in-supply = <&vsys_3v3>;
+ ldo3-in-supply = <&vsys_3v3>;
+ ldo4-in-supply = <&evm_5v0>;
+ ldo5-in-supply = <&vsys_3v3>;
+
+ tps65917_regulators: regulators {
+ smps1_reg: smps1 {
+ /* VDD_MPU */
+ regulator-name = "smps1";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps2_reg: smps2 {
+ /* VDD_CORE */
+ regulator-name = "smps2";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ smps3_reg: smps3 {
+ /* VDD_GPU IVA DSPEVE */
+ regulator-name = "smps3";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ smps4_reg: smps4 {
+ /* VDDS1V8 */
+ regulator-name = "smps4";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps5_reg: smps5 {
+ /* VDD_DDR */
+ regulator-name = "smps5";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: ldo1 {
+ /* LDO1_OUT --> SDIO */
+ regulator-name = "ldo1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-allow-bypass;
+ };
+
+ ldo2_reg: ldo2 {
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-allow-bypass;
+ };
+
+ ldo3_reg: ldo3 {
+ /* VDDA_1V8_PHY */
+ regulator-name = "ldo3";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5_reg: ldo5 {
+ /* VDDA_1V8_PLL */
+ regulator-name = "ldo5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo4_reg: ldo4 {
+ /* VDDA_3V_USB: VDDA_USBHS33 */
+ regulator-name = "ldo4";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ };
+ };
+ };
+
+ tps65917_power_button {
+ compatible = "ti,palmas-pwrbutton";
+ interrupt-parent = <&tps65917>;
+ interrupts = <1 IRQ_TYPE_NONE>;
+ wakeup-source;
+ ti,palmas-long-press-seconds = <6>;
+ };
+};
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index e3a9b69..cd9c4ff 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -15,16 +15,16 @@
};
};
-&tps65917_regulators {
- ldo2_reg: ldo2 {
- /* LDO2_OUT --> TP1017 (UNUSED) */
- regulator-name = "ldo2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-allow-bypass;
+&i2c1 {
+ tps65917: tps65917 at 58 {
+ reg = <0x58>;
+
+ interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
};
};
+#include "dra72-evm-tps65917.dtsi"
+
&hdmi {
vdda-supply = <&ldo3_reg>;
};
--
2.9.3
^ permalink raw reply related
* [PATCH 2/9] ARM: dra72-evm: Fix modelling of regulators
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014130033.14172-1-lokeshvutla@ti.com>
Add proper description of input voltage regulators and update the voltage
rail map for all the regulators.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/boot/dts/dra72-evm-common.dtsi | 48 +++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index 3c02612..8537b6a 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -18,11 +18,47 @@
display0 = &hdmi0;
};
+ evm_12v0: fixedregulator-evm12v0 {
+ /* main supply */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_12v0";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ evm_5v0: fixedregulator-evm5v0 {
+ /* Output 1 of TPS43351QDAPRQ1 */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_3v3: fixedregulator-vsys3v3 {
+ /* Output 2 of TPS43351QDAPRQ1 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
evm_3v3_sw: fixedregulator-evm_3v3 {
+ /* TPS22965DSG */
compatible = "regulator-fixed";
regulator-name = "evm_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ vin-supply = <&vsys_3v3>;
+ regulator-always-on;
+ regulator-boot-on;
};
aic_dvdd: fixedregulator-aic_dvdd {
@@ -39,6 +75,7 @@
regulator-name = "evm_3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ vin-supply = <&evm_3v3_sw>;
enable-active-high;
gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
};
@@ -190,6 +227,17 @@
tps65917_pmic {
compatible = "ti,tps65917-pmic";
+ smps1-in-supply = <&vsys_3v3>;
+ smps2-in-supply = <&vsys_3v3>;
+ smps3-in-supply = <&vsys_3v3>;
+ smps4-in-supply = <&vsys_3v3>;
+ smps5-in-supply = <&vsys_3v3>;
+ ldo1-in-supply = <&vsys_3v3>;
+ ldo2-in-supply = <&vsys_3v3>;
+ ldo3-in-supply = <&vsys_3v3>;
+ ldo4-in-supply = <&evm_5v0>;
+ ldo5-in-supply = <&vsys_3v3>;
+
tps65917_regulators: regulators {
smps1_reg: smps1 {
/* VDD_MPU */
--
2.9.3
^ permalink raw reply related
* [PATCH 1/9] ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161014130033.14172-1-lokeshvutla@ti.com>
Pinmuxing for DRA7x/AM57x family of processors need to be done in IO
isolation as part of initial bootloader executed from SRAM. This is
done as part of iodelay configuration sequence and is required due
to the limitations introduced by erratum ID: i869[1] (IO Glitches
can occur when changing IO settings) and elaborated in the Technical
Reference Manual[2] 18.4.6.1.7 Isolation Requirements.
Only peripheral that is permitted for dynamic pin mux configuration
is MMC and DCAN. MMC is permitted to change to accommodate the
requirements for varied speeds (which require IO-delay support in
kernel as well). DCAN is a result of i893[1] (DCAN initialization
sequence). With the exception of DCAN and MMC, all other pin mux
configurations are removed from the dts.
[1] http://www.ti.com/lit/er/sprz436a/sprz436a.pdf
[2] http://www.ti.com/lit/ug/spruhz7c/spruhz7c.pdf
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/boot/dts/dra72-evm-common.dtsi | 192 --------------------------------
1 file changed, 192 deletions(-)
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index c94d8d64..3c02612 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -69,9 +69,6 @@
tpd12s015: encoder {
compatible = "ti,tpd12s015";
- pinctrl-names = "default";
- pinctrl-0 = <&tpd12s015_pins>;
-
gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */
<&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */
<&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
@@ -134,72 +131,6 @@
};
&dra7_pmx_core {
- i2c1_pins: pinmux_i2c1_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
- DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
- >;
- };
-
- i2c5_pins: pinmux_i2c5_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
- DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
- >;
- };
-
- i2c5_pins: pinmux_i2c5_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
- DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
- >;
- };
-
- nand_default: nand_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
- DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
- DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
- DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
- DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
- DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
- DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
- DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
- DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
- DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
- DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
- DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
- DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
- DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
- DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
- DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
- DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
- DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
- DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
- DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
- DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
- DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
- >;
- };
-
- usb1_pins: pinmux_usb1_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
- >;
- };
-
- usb2_pins: pinmux_usb2_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
- >;
- };
-
- tps65917_pins_default: tps65917_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
- >;
- };
-
mmc1_pins_default: mmc1_pins_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
@@ -240,59 +171,16 @@
DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
>;
};
-
- hdmi_pins: pinmux_hdmi_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
- DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
- >;
- };
-
- tpd12s015_pins: pinmux_tpd12s015_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
- >;
- };
-
- atl_pins: pinmux_atl_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
- DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
- >;
- };
-
- mcasp3_pins: pinmux_mcasp3_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
- DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
- DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
- DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
- >;
- };
-
- mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT_PULLDOWN | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE15)
- >;
- };
};
&i2c1 {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
clock-frequency = <400000>;
tps65917: tps65917 at 58 {
compatible = "ti,tps65917";
reg = <0x58>;
- pinctrl-names = "default";
- pinctrl-0 = <&tps65917_pins_default>;
-
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
interrupt-controller;
#interrupt-cells = <2>;
@@ -423,8 +311,6 @@
&i2c5 {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c5_pins>;
clock-frequency = <400000>;
pcf_hdmi: pcf8575 at 26 {
@@ -462,8 +348,6 @@
&gpmc {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&nand_default>;
ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
nand at 0,0 {
/* To use NAND, DIP switch SW5 must be set like so:
@@ -566,14 +450,10 @@
&usb1 {
dr_mode = "peripheral";
- pinctrl-names = "default";
- pinctrl-0 = <&usb1_pins>;
};
&usb2 {
dr_mode = "host";
- pinctrl-names = "default";
- pinctrl-0 = <&usb2_pins>;
};
&mmc1 {
@@ -603,71 +483,8 @@
max-frequency = <192000000>;
};
-&dra7_pmx_core {
- cpsw_default: cpsw_default {
- pinctrl-single,pins = <
- /* Slave 2 */
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
- DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
- DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
- DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
- DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
- DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
- DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
- DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
- DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
- DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
- DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
- DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
- >;
-
- };
-
- cpsw_sleep: cpsw_sleep {
- pinctrl-single,pins = <
- /* Slave 2 */
- DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15)
- >;
- };
-
- davinci_mdio_default: davinci_mdio_default {
- pinctrl-single,pins = <
- /* MDIO */
- DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
- DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
- >;
- };
-
- davinci_mdio_sleep: davinci_mdio_sleep {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15)
- >;
- };
-};
-
&mac {
status = "okay";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&cpsw_default>;
- pinctrl-1 = <&cpsw_sleep>;
-};
-
-&davinci_mdio {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&davinci_mdio_default>;
- pinctrl-1 = <&davinci_mdio_sleep>;
};
&dcan1 {
@@ -748,9 +565,6 @@
&hdmi {
status = "ok";
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_pins>;
-
port {
hdmi_out: endpoint {
remote-endpoint = <&tpd12s015_in>;
@@ -759,9 +573,6 @@
};
&atl {
- pinctrl-names = "default";
- pinctrl-0 = <&atl_pins>;
-
assigned-clocks = <&abe_dpll_sys_clk_mux>,
<&atl_gfclk_mux>,
<&dpll_abe_ck>,
@@ -780,9 +591,6 @@
&mcasp3 {
#sound-dai-cells = <0>;
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&mcasp3_pins>;
- pinctrl-1 = <&mcasp3_sleep_pins>;
assigned-clocks = <&mcasp3_ahclkx_mux>;
assigned-clock-parents = <&atl_clkin2_ck>;
--
2.9.3
^ permalink raw reply related
* [PATCH 0/9] ARM: DRA7: Add support for DRA718-evm
From: Lokesh Vutla @ 2016-10-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
This series does minor dts cleanup for dra72-evm and adds support for
DRA718-evm.
Logs:
DRA718-evm: http://pastebin.ubuntu.com/23323331/
DRA72-evm-revc: http://pastebin.ubuntu.com/23323356/
Lokesh Vutla (7):
ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
ARM: dra72-evm: Fix modelling of regulators
ARM: dts: dra72: Add separate dtsi for tps65917
regulator: lp873x: Add support for populating input supply
ARM: OMAP2+: board-generic: add support for DRA71x family
ARM: omap2plus_defconfig: Enable REGULATOR_GPIO
ARM: omap2plus_defconfig: Enable LP873X support
Nishanth Menon (2):
ARM: DRA7: hwmod: Do not register RTC on DRA71
ARM: dts: Add support for dra718-evm
.../devicetree/bindings/arm/omap/omap.txt | 6 +
Documentation/devicetree/bindings/mfd/lp873x.txt | 8 +
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/dra71-evm.dts | 230 ++++++++++++++
arch/arm/boot/dts/dra72-evm-common.dtsi | 348 +++------------------
arch/arm/boot/dts/dra72-evm-revc.dts | 21 +-
arch/arm/boot/dts/dra72-evm-tps65917.dtsi | 134 ++++++++
arch/arm/boot/dts/dra72-evm.dts | 14 +-
arch/arm/configs/omap2plus_defconfig | 3 +
arch/arm/mach-omap2/board-generic.c | 1 +
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 10 +-
drivers/regulator/lp873x-regulator.c | 1 +
12 files changed, 453 insertions(+), 326 deletions(-)
create mode 100644 arch/arm/boot/dts/dra71-evm.dts
create mode 100644 arch/arm/boot/dts/dra72-evm-tps65917.dtsi
--
2.9.3
^ permalink raw reply
* [arm-soc:to-build 7/7] include/asm-generic/memory_model.h:33:53: warning: 'buddy' may be used uninitialized in this function
From: kbuild test robot @ 2016-10-14 12:51 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git to-build
head: 3f5089cbac8f9e64f3f0b37fae0f15ac542c8d4a
commit: 3f5089cbac8f9e64f3f0b37fae0f15ac542c8d4a [7/7] Revert "Disable "maybe-uninitialized" warning globally"
config: ia64-tiger_defconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 6.2.0
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 3f5089cbac8f9e64f3f0b37fae0f15ac542c8d4a
# save the attached .config to linux build tree
make.cross ARCH=ia64
Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings
All warnings (new ones prefixed by >>):
In file included from arch/ia64/include/asm/page.h:110:0,
from arch/ia64/include/asm/ptrace.h:45,
from arch/ia64/include/asm/processor.h:19,
from arch/ia64/include/asm/thread_info.h:11,
from include/linux/thread_info.h:69,
from include/asm-generic/preempt.h:4,
from ./arch/ia64/include/generated/asm/preempt.h:1,
from include/linux/preempt.h:59,
from include/linux/spinlock.h:50,
from include/linux/mmzone.h:7,
from include/linux/gfp.h:5,
from include/linux/mm.h:9,
from mm/page_alloc.c:18:
mm/page_alloc.c: In function '__free_pages_ok':
>> include/asm-generic/memory_model.h:33:53: warning: 'buddy' may be used uninitialized in this function [-Wmaybe-uninitialized]
#define __page_to_pfn(page) ((unsigned long)((page) - mem_map) + \
^
mm/page_alloc.c:788:15: note: 'buddy' was declared here
struct page *buddy;
^~~~~
In file included from arch/ia64/include/asm/page.h:110:0,
from arch/ia64/include/asm/ptrace.h:45,
from arch/ia64/include/asm/processor.h:19,
from arch/ia64/include/asm/thread_info.h:11,
from include/linux/thread_info.h:69,
from include/asm-generic/preempt.h:4,
from ./arch/ia64/include/generated/asm/preempt.h:1,
from include/linux/preempt.h:59,
from include/linux/spinlock.h:50,
from include/linux/mmzone.h:7,
from include/linux/gfp.h:5,
from include/linux/mm.h:9,
from mm/page_alloc.c:18:
mm/page_alloc.c: In function 'free_pcppages_bulk':
>> include/asm-generic/memory_model.h:33:53: warning: 'buddy' may be used uninitialized in this function [-Wmaybe-uninitialized]
#define __page_to_pfn(page) ((unsigned long)((page) - mem_map) + \
^
mm/page_alloc.c:788:15: note: 'buddy' was declared here
struct page *buddy;
^~~~~
vim +/buddy +33 include/asm-generic/memory_model.h
a117e66e KAMEZAWA Hiroyuki 2006-03-27 17 #define arch_pfn_to_nid(pfn) pfn_to_nid(pfn)
a117e66e KAMEZAWA Hiroyuki 2006-03-27 18 #endif
a117e66e KAMEZAWA Hiroyuki 2006-03-27 19
a117e66e KAMEZAWA Hiroyuki 2006-03-27 20 #ifndef arch_local_page_offset
a117e66e KAMEZAWA Hiroyuki 2006-03-27 21 #define arch_local_page_offset(pfn, nid) \
a117e66e KAMEZAWA Hiroyuki 2006-03-27 22 ((pfn) - NODE_DATA(nid)->node_start_pfn)
a117e66e KAMEZAWA Hiroyuki 2006-03-27 23 #endif
a117e66e KAMEZAWA Hiroyuki 2006-03-27 24
a117e66e KAMEZAWA Hiroyuki 2006-03-27 25 #endif /* CONFIG_DISCONTIGMEM */
a117e66e KAMEZAWA Hiroyuki 2006-03-27 26
a117e66e KAMEZAWA Hiroyuki 2006-03-27 27 /*
a117e66e KAMEZAWA Hiroyuki 2006-03-27 28 * supports 3 memory models.
a117e66e KAMEZAWA Hiroyuki 2006-03-27 29 */
a117e66e KAMEZAWA Hiroyuki 2006-03-27 30 #if defined(CONFIG_FLATMEM)
a117e66e KAMEZAWA Hiroyuki 2006-03-27 31
67de6482 Andy Whitcroft 2006-06-23 32 #define __pfn_to_page(pfn) (mem_map + ((pfn) - ARCH_PFN_OFFSET))
67de6482 Andy Whitcroft 2006-06-23 @33 #define __page_to_pfn(page) ((unsigned long)((page) - mem_map) + \
a117e66e KAMEZAWA Hiroyuki 2006-03-27 34 ARCH_PFN_OFFSET)
a117e66e KAMEZAWA Hiroyuki 2006-03-27 35 #elif defined(CONFIG_DISCONTIGMEM)
a117e66e KAMEZAWA Hiroyuki 2006-03-27 36
67de6482 Andy Whitcroft 2006-06-23 37 #define __pfn_to_page(pfn) \
a117e66e KAMEZAWA Hiroyuki 2006-03-27 38 ({ unsigned long __pfn = (pfn); \
c5d71243 Rafael J. Wysocki 2008-11-08 39 unsigned long __nid = arch_pfn_to_nid(__pfn); \
a117e66e KAMEZAWA Hiroyuki 2006-03-27 40 NODE_DATA(__nid)->node_mem_map + arch_local_page_offset(__pfn, __nid);\
a117e66e KAMEZAWA Hiroyuki 2006-03-27 41 })
:::::: The code at line 33 was first introduced by commit
:::::: 67de648211fa041fe08a0c25241a4980bbb90698 [PATCH] squash duplicate page_to_pfn and pfn_to_page
:::::: TO: Andy Whitcroft <apw@shadowen.org>
:::::: CC: Linus Torvalds <torvalds@g5.osdl.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH v2 2/2] ARM: dts: rockchip: initialize rk3066 PLL clock rate
From: Paweł Jarosz @ 2016-10-14 12:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1476447057.git.paweljarosz3691@gmail.com>
Initialize PLL, cpu bus and peripherial bus rate while kernel init.
No other module does than.
This gives us performance boost observable for example in mmc transfers.
Signed-off-by: Pawe? Jarosz <paweljarosz3691@gmail.com>
---
Changes in v2:
- added peripherial and cpu bus
- removed PLL_DPLL, PLL_APLL
arch/arm/boot/dts/rk3066a.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 0d0dae3..29dd434 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -151,6 +151,15 @@
#clock-cells = <1>;
#reset-cells = <1>;
+ assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
+ <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+ <&cru PCLK_CPU>, <&cru ACLK_PERI>,
+ <&cru HCLK_PERI>, <&cru PCLK_PERI>;
+
+ assigned-clock-rates = <400000000>, <594000000>,
+ <300000000>, <150000000>,
+ <75000000>, <300000000>,
+ <150000000>, <75000000>;
};
timer at 2000e000 {
--
2.7.4
^ permalink raw reply related
* [PATCH v2 1/2] clk: rockchip: Add bindings for cpu and peri clocks on rk3066
From: Paweł Jarosz @ 2016-10-14 12:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1476447057.git.paweljarosz3691@gmail.com>
Add bindings for ACLK_CPU, HCLK_CPU, PCLK_CPU, ACLK_PERI, HCLK_PERI, PCLK_PERI.
We need this to init it's rate at boot time.
Signed-off-by: Pawe? Jarosz <paweljarosz3691@gmail.com>
---
Changes in v2:
- none
drivers/clk/rockchip/clk-rk3188.c | 12 ++++++------
include/dt-bindings/clock/rk3188-cru-common.h | 8 +++++++-
2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index d0e722a..a6d398f 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -306,14 +306,14 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK2928_CLKGATE_CON(0), 2, GFLAGS),
- GATE(0, "aclk_cpu", "aclk_cpu_pre", 0,
+ GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_pre", 0,
RK2928_CLKGATE_CON(0), 3, GFLAGS),
GATE(0, "atclk_cpu", "pclk_cpu_pre", 0,
RK2928_CLKGATE_CON(0), 6, GFLAGS),
- GATE(0, "pclk_cpu", "pclk_cpu_pre", 0,
+ GATE(PCLK_CPU, "pclk_cpu", "pclk_cpu_pre", 0,
RK2928_CLKGATE_CON(0), 5, GFLAGS),
- GATE(0, "hclk_cpu", "hclk_cpu_pre", CLK_IGNORE_UNUSED,
+ GATE(HCLK_CPU, "hclk_cpu", "hclk_cpu_pre", CLK_IGNORE_UNUSED,
RK2928_CLKGATE_CON(0), 4, GFLAGS),
COMPOSITE(0, "aclk_lcdc0_pre", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
@@ -323,12 +323,12 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
RK2928_CLKSEL_CON(31), 15, 1, MFLAGS, 8, 5, DFLAGS,
RK2928_CLKGATE_CON(1), 4, GFLAGS),
- GATE(0, "aclk_peri", "aclk_peri_pre", 0,
+ GATE(ACLK_PERI, "aclk_peri", "aclk_peri_pre", 0,
RK2928_CLKGATE_CON(2), 1, GFLAGS),
- COMPOSITE_NOMUX(0, "hclk_peri", "aclk_peri_pre", 0,
+ COMPOSITE_NOMUX(HCLK_PERI, "hclk_peri", "aclk_peri_pre", 0,
RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK2928_CLKGATE_CON(2), 2, GFLAGS),
- COMPOSITE_NOMUX(0, "pclk_peri", "aclk_peri_pre", 0,
+ COMPOSITE_NOMUX(PCLK_PERI, "pclk_peri", "aclk_peri_pre", 0,
RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK2928_CLKGATE_CON(2), 3, GFLAGS),
diff --git a/include/dt-bindings/clock/rk3188-cru-common.h b/include/dt-bindings/clock/rk3188-cru-common.h
index 4f53e70..d141c1f 100644
--- a/include/dt-bindings/clock/rk3188-cru-common.h
+++ b/include/dt-bindings/clock/rk3188-cru-common.h
@@ -72,6 +72,8 @@
#define ACLK_IPP 200
#define ACLK_RGA 201
#define ACLK_CIF0 202
+#define ACLK_CPU 203
+#define ACLK_PERI 204
/* pclk gates */
#define PCLK_GRF 320
@@ -104,6 +106,8 @@
#define PCLK_EFUSE 347
#define PCLK_TZPC 348
#define PCLK_TSADC 349
+#define PCLK_CPU 350
+#define PCLK_PERI 351
/* hclk gates */
#define HCLK_SDMMC 448
@@ -126,8 +130,10 @@
#define HCLK_IPP 465
#define HCLK_RGA 466
#define HCLK_NANDC0 467
+#define HCLK_CPU 468
+#define HCLK_PERI 469
-#define CLK_NR_CLKS (HCLK_NANDC0 + 1)
+#define CLK_NR_CLKS (HCLK_PERI + 1)
/* soft-reset indices */
#define SRST_MCORE 2
--
2.7.4
^ permalink raw reply related
* [PATCH v2 0/2] Assign RK3066 clocks at boot time
From: Paweł Jarosz @ 2016-10-14 12:16 UTC (permalink / raw)
To: linux-arm-kernel
This patchset sets rk3066 PLL, CPU and PERI clocks while kernel init.
Pawe? Jarosz (2):
clk: rockchip: Add bindings for cpu and peri clocks on rk3066
ARM: dts: rockchip: initialize rk3066 PLL clock rate
arch/arm/boot/dts/rk3066a.dtsi | 9 +++++++++
drivers/clk/rockchip/clk-rk3188.c | 12 ++++++------
include/dt-bindings/clock/rk3188-cru-common.h | 8 +++++++-
3 files changed, 22 insertions(+), 7 deletions(-)
--
2.7.4
^ permalink raw reply
* [PATCH v8 0/8] power: add power sequence library
From: Rafael J. Wysocki @ 2016-10-14 12:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476413995-20361-1-git-send-email-peter.chen@nxp.com>
On Friday, October 14, 2016 10:59:47 AM Peter Chen wrote:
> Hi all,
>
> This is a follow-up for my last power sequence framework patch set [1].
> According to Rob Herring and Ulf Hansson's comments[2]. The kinds of
> power sequence instances will be added at postcore_initcall, the match
> criteria is compatible string first, if the compatible string is not
> matched between dts and library, it will try to use generic power sequence.
>
> The host driver just needs to call of_pwrseq_on/of_pwrseq_off
> if only one power sequence instance is needed, for more power sequences
> are used, using of_pwrseq_on_list/of_pwrseq_off_list instead (eg, USB hub driver).
>
> In future, if there are special power sequence requirements, the special
> power sequence library can be created.
>
> This patch set is tested on i.mx6 sabresx evk using a dts change, I use
> two hot-plug devices to simulate this use case, the related binding
> change is updated at patch [1/6], The udoo board changes were tested
> using my last power sequence patch set.[3]
>
> Except for hard-wired MMC and USB devices, I find the USB ULPI PHY also
> need to power on itself before it can be found by ULPI bus.
>
> [1] http://www.spinics.net/lists/linux-usb/msg142755.html
> [2] http://www.spinics.net/lists/linux-usb/msg143106.html
> [3] http://www.spinics.net/lists/linux-usb/msg142815.html
>
> Changes for v8:
> - Allocate one extra pwrseq instance if pwrseq_get has succeed, it can avoid
> preallocate instances problem which the number of instance is decided at
> compile time, thanks for Heiko Stuebner's suggestion [Patch 2/8]
> - Delete pwrseq_compatible_sample.c which is the demo purpose to show compatible
> match method. [Patch 2/8]
> - Add Maciej S. Szmigiero's tested-by. [Patch 7/8]
>
> Changes for v7:
> - Create kinds of power sequence instance at postcore_initcall, and match
> the instance with node using compatible string, the beneit of this is
> the host driver doesn't need to consider which pwrseq instance needs
> to be used, and pwrseq core will match it, however, it eats some memories
> if less power sequence instances are used. [Patch 2/8]
> - Add pwrseq_compatible_sample.c to test match pwrseq using device_id. [Patch 2/8]
> - Fix the comments Vaibhav Hiremath adds for error path for clock and do not
> use device_node for parameters at pwrseq_on. [Patch 2/8]
> - Simplify the caller to use power sequence, follows Alan's commnets [Patch 4/8]
> - Tested three pwrseq instances together using both specific compatible string and
> generic libraries.
>
> Changes for v6:
> - Add Matthias Kaehlcke's Reviewed-by and Tested-by. (patch [2/6])
> - Change chipidea core of_node assignment for coming user. (patch [5/6])
> - Applies Joshua Clayton's three dts changes for two boards,
> the USB device's reg has only #address-cells, but without #size-cells.
>
> Changes for v5:
> - Delete pwrseq_register/pwrseq_unregister, which is useless currently
> - Fix the linker error when the pwrseq user is compiled as module
>
> Changes for v4:
> - Create the patch on next-20160722
> - Fix the of_node is not NULL after chipidea driver is unbinded [Patch 5/6]
> - Using more friendly wait method for reset gpio [Patch 2/6]
> - Support multiple input clocks [Patch 2/6]
> - Add Rob Herring's ack for DT changes
> - Add Joshua Clayton's Tested-by
>
> Changes for v3:
> - Delete "power-sequence" property at binding-doc, and change related code
> at both library and user code.
> - Change binding-doc example node name with Rob's comments
> - of_get_named_gpio_flags only gets the gpio, but without setting gpio flags,
> add additional code request gpio with proper gpio flags
> - Add Philipp Zabel's Ack and MAINTAINER's entry
>
> Changes for v2:
> - Delete "pwrseq" prefix and clock-names for properties at dt binding
> - Should use structure not but its pointer for kzalloc
> - Since chipidea core has no of_node, let core's of_node equals glue
> layer's at core's probe
>
> Joshua Clayton (2):
> ARM: dts: imx6qdl: Enable usb node children with <reg>
> ARM: dts: imx6q-evi: Fix onboard hub reset line
>
> Peter Chen (6):
> binding-doc: power: pwrseq-generic: add binding doc for generic power
> sequence library
> power: add power sequence library
> binding-doc: usb: usb-device: add optional properties for power
> sequence
> usb: core: add power sequence handling for USB devices
> usb: chipidea: let chipidea core device of_node equal's glue layer
> device of_node
> ARM: dts: imx6qdl-udoo.dtsi: fix onboard USB HUB property
>
> .../bindings/power/pwrseq/pwrseq-generic.txt | 48 ++++++
> .../devicetree/bindings/usb/usb-device.txt | 10 +-
> MAINTAINERS | 9 +
> arch/arm/boot/dts/imx6q-evi.dts | 25 +--
> arch/arm/boot/dts/imx6qdl-udoo.dtsi | 26 ++-
> arch/arm/boot/dts/imx6qdl.dtsi | 6 +
> drivers/power/Kconfig | 1 +
> drivers/power/Makefile | 1 +
> drivers/power/pwrseq/Kconfig | 19 ++
> drivers/power/pwrseq/Makefile | 2 +
> drivers/power/pwrseq/core.c | 191 +++++++++++++++++++++
> drivers/power/pwrseq/pwrseq_generic.c | 183 ++++++++++++++++++++
> drivers/usb/chipidea/core.c | 27 ++-
> drivers/usb/core/hub.c | 41 ++++-
> drivers/usb/core/hub.h | 1 +
> include/linux/power/pwrseq.h | 72 ++++++++
> 16 files changed, 621 insertions(+), 41 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt
> create mode 100644 drivers/power/pwrseq/Kconfig
> create mode 100644 drivers/power/pwrseq/Makefile
> create mode 100644 drivers/power/pwrseq/core.c
> create mode 100644 drivers/power/pwrseq/pwrseq_generic.c
> create mode 100644 include/linux/power/pwrseq.h
Meta question: Who's the maintainer you are targetting this at?
Thanks,
Rafael
^ permalink raw reply
* [PATCH v14 04/16] iommu/dma: MSI doorbell alloc/free
From: Punit Agrawal @ 2016-10-14 11:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476278544-3397-5-git-send-email-eric.auger@redhat.com>
Hi Eric,
One query and a comment below.
Eric Auger <eric.auger@redhat.com> writes:
> We introduce the capability to (un)register MSI doorbells.
>
> A doorbell region is characterized by its physical address base, size,
> and whether it its safe (ie. it implements IRQ remapping). A doorbell
> can be per-cpu or global. We currently only care about global doorbells.
>
> A function returns whether all registered doorbells are safe.
>
> MSI controllers likely to work along with IOMMU that translate MSI
> transaction must register their doorbells to allow device assignment
> with MSI support. Otherwise the MSI transactions will cause IOMMU faults.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
>
> v13 -> v14:
> - previously in msi-doorbell.h/c
> ---
> drivers/iommu/dma-iommu.c | 75 +++++++++++++++++++++++++++++++++++++++++++++++
> include/linux/dma-iommu.h | 41 ++++++++++++++++++++++++++
> 2 files changed, 116 insertions(+)
>
> diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
> index d45f9a0..d8a7d86 100644
> --- a/drivers/iommu/dma-iommu.c
> +++ b/drivers/iommu/dma-iommu.c
> @@ -43,6 +43,38 @@ struct iommu_dma_cookie {
> spinlock_t msi_lock;
> };
>
> +/**
> + * struct iommu_msi_doorbell_info - MSI doorbell region descriptor
> + * @percpu_doorbells: per cpu doorbell base address
> + * @global_doorbell: base address of the doorbell
> + * @doorbell_is_percpu: is the doorbell per cpu or global?
> + * @safe: true if irq remapping is implemented
> + * @size: size of the doorbell
> + */
> +struct iommu_msi_doorbell_info {
> + union {
> + phys_addr_t __percpu *percpu_doorbells;
Out of curiosity, have you come across systems that have per-cpu
doorbells? I couldn't find a system that'd help solidify my
understanding on it's usage.
> + phys_addr_t global_doorbell;
> + };
> + bool doorbell_is_percpu;
> + bool safe;
Although you've got the comment above, 'safe' doesn't quite convey it's
purpose. Can this be renamed to something more descriptive -
'intr_remapping' or 'intr_isolation' perhaps?
Thanks,
Punit
[...]
^ permalink raw reply
* [PATCH v14 00/16] KVM PCIe/MSI passthrough on ARM/ARM64
From: Punit Agrawal @ 2016-10-14 11:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476278544-3397-1-git-send-email-eric.auger@redhat.com>
Hi Eric,
I am a bit late in joining, but I've tried to familiarise
myself with earlier discussions on the series.
Eric Auger <eric.auger@redhat.com> writes:
> This is the second respin on top of Robin's series [1], addressing Alex' comments.
>
> Major changes are:
> - MSI-doorbell API now is moved to DMA IOMMU API following Alex suggestion
> to put all API pieces at the same place (so eventually in the IOMMU
> subsystem)
IMHO, this is headed in the opposite direction, i.e., away from the
owner of the information - the doorbells are the property of the MSI
controller. The MSI controllers know the location, size and interrupt
remapping capability as well. On the consumer side, VFIO needs access to
the doorbells to allow userspace to carve out a region in the IOVA.
I quite liked what you had in v13, though I think you can go further
though. Instead of adding new doorbell API [un]registration calls, how
about adding a callback to the irq_domain_ops? The callback will be
populated for irqdomains registered by MSI controllers.
>From VFIO, we can calculate the required aperture reservation by
iterating over the irqdomains (something like irq_domain_for_each). The
same callback can also provide information about support for interrupt
remapping.
For systems where there are no separate MSI controllers, i.e., the IOMMU
has a fixed reservation, no MSI callbacks will be populated - which
tells userspace that no separate MSI reservation is required. IIUC, this
was one of Alex' concerns on the prior version.
Thoughts, opinions?
Punit
> - new iommu_domain_msi_resv struct and accessor through DOMAIN_ATTR_MSI_RESV
> domain with mirror VFIO capability
> - more robustness I think in the VFIO layer
> - added "iommu/iova: fix __alloc_and_insert_iova_range" since with the current
> code I failed allocating an IOVA page in a single page domain with upper part
> reserved
>
> IOVA range exclusion will be handled in a separate series
>
> The priority really is to discuss and freeze the API and especially the MSI
> doorbell's handling. Do we agree to put that in DMA IOMMU?
>
> Note: the size computation does not take into account possible page overlaps
> between doorbells but it would add quite a lot of complexity i think.
>
> Tested on AMD Overdrive (single GICv2m frame) with I350 VF assignment.
>
> dependency:
> the series depends on Robin's generic-v7 branch:
> [1] [PATCH v7 00/22] Generic DT bindings for PCI IOMMUs and ARM SMMU
> http://www.spinics.net/lists/arm-kernel/msg531110.html
>
> Best Regards
>
> Eric
>
> Git: complete series available at
> https://github.com/eauger/linux/tree/generic-v7-pcie-passthru-v14
>
> the above branch includes a temporary patch to work around a ThunderX pci
> bus reset crash (which I think unrelated to this series):
> "vfio: pci: HACK! workaround thunderx pci_try_reset_bus crash"
> Do not take this one for other platforms.
>
>
> Eric Auger (15):
> iommu/iova: fix __alloc_and_insert_iova_range
> iommu: Introduce DOMAIN_ATTR_MSI_RESV
> iommu/dma: MSI doorbell alloc/free
> iommu/dma: Introduce iommu_calc_msi_resv
> iommu/arm-smmu: Implement domain_get_attr for DOMAIN_ATTR_MSI_RESV
> irqchip/gic-v2m: Register the MSI doorbell
> irqchip/gicv3-its: Register the MSI doorbell
> vfio: Introduce a vfio_dma type field
> vfio/type1: vfio_find_dma accepting a type argument
> vfio/type1: Implement recursive vfio_find_dma_from_node
> vfio/type1: Handle unmap/unpin and replay for VFIO_IOVA_RESERVED slots
> vfio: Allow reserved msi iova registration
> vfio/type1: Check doorbell safety
> iommu/arm-smmu: Do not advertise IOMMU_CAP_INTR_REMAP
> vfio/type1: Introduce MSI_RESV capability
>
> Robin Murphy (1):
> iommu/dma: Allow MSI-only cookies
>
> drivers/iommu/Kconfig | 4 +-
> drivers/iommu/arm-smmu-v3.c | 10 +-
> drivers/iommu/arm-smmu.c | 10 +-
> drivers/iommu/dma-iommu.c | 184 ++++++++++++++++++++++++++
> drivers/iommu/iova.c | 2 +-
> drivers/irqchip/irq-gic-v2m.c | 10 +-
> drivers/irqchip/irq-gic-v3-its.c | 13 ++
> drivers/vfio/vfio_iommu_type1.c | 279 +++++++++++++++++++++++++++++++++++++--
> include/linux/dma-iommu.h | 59 +++++++++
> include/linux/iommu.h | 8 ++
> include/uapi/linux/vfio.h | 30 ++++-
> 11 files changed, 587 insertions(+), 22 deletions(-)
^ permalink raw reply
* [PATCH v4 2/2] crypto: marvell - Don't break chain for computable last ahash requests
From: Boris Brezillon @ 2016-10-14 10:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161005075633.12711-3-romain.perier@free-electrons.com>
On Wed, 5 Oct 2016 09:56:33 +0200
Romain Perier <romain.perier@free-electrons.com> wrote:
> Currently, the driver breaks chain for all kind of hash requests in order to
> don't override intermediate states of partial ahash updates. However, some final
> ahash requests can be directly processed by the engine, and so without
> intermediate state. This is typically the case for most for the HMAC requests
> processed via IPSec.
>
> This commits adds a TDMA descriptor to copy context for these of requests
> into the "op" dma pool, then it allow to chain these requests at the DMA level.
> The 'complete' operation is also updated to retrieve the MAC digest from the
> right location.
>
> Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Minor comments below, otherwise it looks good.
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>
> Changes in v4:
> - Remove the dummy descriptor at the end of the chain, when a TDMA_RESULT
> is present. So, we re-wrote a bit the code of ahash_complete accordingly.
>
> Changes in v3:
> - Copy the whole context back to RAM and not just the digest. Also
> fixed a rebase issue ^^ (whoops)
>
> Changes in v2:
> - Replaced BUG_ON by an error
> - Add a variable "break_chain", with "type" to break the chain
>
> drivers/crypto/marvell/hash.c | 65 ++++++++++++++++++++++++++++++++-----------
> 1 file changed, 49 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
> index 9f28468..2a92605 100644
> --- a/drivers/crypto/marvell/hash.c
> +++ b/drivers/crypto/marvell/hash.c
> @@ -312,24 +312,40 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
> int i;
>
> digsize = crypto_ahash_digestsize(crypto_ahash_reqtfm(ahashreq));
> - for (i = 0; i < digsize / 4; i++)
> - creq->state[i] = readl_relaxed(engine->regs + CESA_IVDIG(i));
>
> - if (creq->last_req) {
> + if (mv_cesa_req_get_type(&creq->base) == CESA_DMA_REQ &&
> + (creq->base.chain.last->flags & CESA_TDMA_TYPE_MSK) == CESA_TDMA_RESULT) {
Maybe it's time to create an helper to extract the TDMA desc type (as
you did for the CESA req type with mv_cesa_req_get_type()).
> + __le32 *data = NULL;
> +
> /*
> - * Hardware's MD5 digest is in little endian format, but
> - * SHA in big endian format
> + * Result is already in the correct endianess when the SA is
> + * used
> */
> - if (creq->algo_le) {
> - __le32 *result = (void *)ahashreq->result;
> + data = creq->base.chain.last->op->ctx.hash.hash;
> + for (i = 0; i < digsize / 4; i++)
> + creq->state[i] = cpu_to_le32(data[i]);
>
> - for (i = 0; i < digsize / 4; i++)
> - result[i] = cpu_to_le32(creq->state[i]);
> - } else {
> - __be32 *result = (void *)ahashreq->result;
> + memcpy(ahashreq->result, data, digsize);
> + } else {
> + for (i = 0; i < digsize / 4; i++)
> + creq->state[i] = readl_relaxed(engine->regs +
> + CESA_IVDIG(i));
> + if (creq->last_req) {
> + /*
> + * Hardware's MD5 digest is in little endian format, but
> + * SHA in big endian format
> + */
> + if (creq->algo_le) {
> + __le32 *result = (void *)ahashreq->result;
> +
> + for (i = 0; i < digsize / 4; i++)
> + result[i] = cpu_to_le32(creq->state[i]);
> + } else {
> + __be32 *result = (void *)ahashreq->result;
>
> - for (i = 0; i < digsize / 4; i++)
> - result[i] = cpu_to_be32(creq->state[i]);
> + for (i = 0; i < digsize / 4; i++)
> + result[i] = cpu_to_be32(creq->state[i]);
> + }
> }
> }
>
> @@ -504,6 +520,12 @@ mv_cesa_ahash_dma_last_req(struct mv_cesa_tdma_chain *chain,
> CESA_SA_DESC_CFG_LAST_FRAG,
> CESA_SA_DESC_CFG_FRAG_MSK);
>
> + ret = mv_cesa_dma_add_result_op(chain,
> + CESA_SA_CFG_SRAM_OFFSET,
> + CESA_SA_DATA_SRAM_OFFSET,
> + CESA_TDMA_SRC_IN_SRAM, flags);
> + if (ret)
> + return ERR_PTR(-ENOMEM);
> return op;
> }
>
> @@ -564,6 +586,7 @@ static int mv_cesa_ahash_dma_req_init(struct ahash_request *req)
> struct mv_cesa_op_ctx *op = NULL;
> unsigned int frag_len;
> int ret;
> + u32 type;
>
> basereq->chain.first = NULL;
> basereq->chain.last = NULL;
> @@ -635,7 +658,15 @@ static int mv_cesa_ahash_dma_req_init(struct ahash_request *req)
> goto err_free_tdma;
> }
>
> - if (op) {
> + /*
> + * If results are copied via DMA, this means that this
> + * request can be directly processed by the engine,
> + * without partial updates. So we can chain it at the
> + * DMA level with other requests.
> + */
Can you move this comment where it really belongs: when you
conditionally set the CESA_TDMA_BREAK_CHAIN flag.
> + type = basereq->chain.last->flags & CESA_TDMA_TYPE_MSK;
> +
> + if (op && type != CESA_TDMA_RESULT) {
> /* Add dummy desc to wait for crypto operation end */
> ret = mv_cesa_dma_add_dummy_end(&basereq->chain, flags);
> if (ret)
> @@ -648,8 +679,10 @@ static int mv_cesa_ahash_dma_req_init(struct ahash_request *req)
> else
> creq->cache_ptr = 0;
>
> - basereq->chain.last->flags |= (CESA_TDMA_END_OF_REQ |
> - CESA_TDMA_BREAK_CHAIN);
> + basereq->chain.last->flags |= CESA_TDMA_END_OF_REQ;
> +
> + if (type != CESA_TDMA_RESULT)
> + basereq->chain.last->flags |= CESA_TDMA_BREAK_CHAIN;
>
> return 0;
>
^ permalink raw reply
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