* [PATCH v4 9/9] MAINTAINERS: Update HISILICON DRM entries
From: Rongrong Zou @ 2016-10-18 4:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476763284-100508-1-git-send-email-zourongrong@gmail.com>
Signed-off-by: Rongrong Zou <zourongrong@gmail.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1cd38a7..c063c9b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4117,6 +4117,7 @@ F: drivers/gpu/drm/gma500/
DRM DRIVERS FOR HISILICON
M: Xinliang Liu <z.liuxinliang@hisilicon.com>
+M: Rongrong Zou <zourongrong@gmail.com>
R: Xinwei Kong <kong.kongxinwei@hisilicon.com>
R: Chen Feng <puck.chen@hisilicon.com>
L: dri-devel at lists.freedesktop.org
--
1.9.1
^ permalink raw reply related
* Bunch of CRC errors in next with arm: move exports to definitions
From: Sebastian Reichel @ 2016-10-18 4:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160822162512.mptzbiaozx2fz42l@atomide.com>
Hi,
On Mon, Aug 22, 2016 at 09:25:13AM -0700, Tony Lindgren wrote:
> Looks like starting with next-20160818 I'm now getting close to
> 800 lines of WARNINGs on ARM with omap2plus_defconfig while doing
> make modules:
>
> Building modules, stage 2.
> MODPOST 399 modules
> WARNING: "__memzero" [sound/usb/snd-usbmidi-lib.ko] has no CRC!
> WARNING: "memset" [sound/usb/snd-usbmidi-lib.ko] has no CRC!
> WARNING: "memcpy" [sound/usb/snd-usbmidi-lib.ko] has no CRC!
> WARNING: "_set_bit" [sound/usb/snd-usbmidi-lib.ko] has no CRC!
> WARNING: "_test_and_set_bit" [sound/usb/snd-usbmidi-lib.ko] has no CRC!
> WARNING: "_clear_bit" [sound/usb/snd-usbmidi-lib.ko] has no CRC!
> WARNING: "__aeabi_uidivmod" [sound/usb/snd-usb-audio.ko] has no CRC!
> WARNING: "_test_and_clear_bit" [sound/usb/snd-usb-audio.ko] has no CRC!
> WARNING: "arm_copy_to_user" [sound/usb/snd-usb-audio.ko] has no CRC!
> WARNING: "__aeabi_uidiv" [sound/usb/snd-usb-audio.ko] has no CRC!
> ...
> WARNING: "memset" [crypto/drbg.ko] has no CRC!
> WARNING: "memcpy" [crypto/ctr.ko] has no CRC!
> WARNING: "memcpy" [crypto/cmac.ko] has no CRC!
> WARNING: "__memzero" [crypto/cmac.ko] has no CRC!
> WARNING: "memcpy" [crypto/ccm.ko] has no CRC!
> WARNING: "__memzero" [crypto/ccm.ko] has no CRC!
Any update on this one? I just updated my power-supply next branch
to v4.9-rc1 and now get almost 18000 CRC warnings for allmodconfig.
(I use arm-linux-gnueabihf-gcc (Debian 6.1.1-9) 6.1.1 20160705)
-- Sebastian
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^ permalink raw reply
* [PATCH 02/28] [v2] mtd: mtk: avoid warning in mtk_ecc_encode
From: Boris Brezillon @ 2016-10-18 5:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161017220557.1688282-2-arnd@arndb.de>
On Tue, 18 Oct 2016 00:05:31 +0200
Arnd Bergmann <arnd@arndb.de> wrote:
> When building with -Wmaybe-uninitialized, gcc produces a silly false positive
> warning for the mtk_ecc_encode function:
>
> drivers/mtd/nand/mtk_ecc.c: In function 'mtk_ecc_encode':
> drivers/mtd/nand/mtk_ecc.c:402:15: error: 'val' may be used uninitialized in this function [-Werror=maybe-uninitialized]
>
> The function for some reason contains a double byte swap on big-endian
> builds to get the OOB data into the correct order again, and is written
> in a slightly confusing way.
>
> Using a simple memcpy32_fromio() to read the data simplifies it a lot
> so it becomes more readable and produces no warning. However, the
> output might not have 32-bit alignment, so we have to use another
> memcpy to avoid taking alignment faults or writing beyond the end
> of the array.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Jorge, RogerCC, can I have an Acked-by and/or Tested-by for this patch?
> ---
> v2: move temporary buffer into struct mtk_ecc instead of having it
> on the stack, as suggested by Boris Brezillon
> ---
> drivers/mtd/nand/mtk_ecc.c | 19 +++++++++----------
> 1 file changed, 9 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/mtd/nand/mtk_ecc.c b/drivers/mtd/nand/mtk_ecc.c
> index d54f666..dbf2562 100644
> --- a/drivers/mtd/nand/mtk_ecc.c
> +++ b/drivers/mtd/nand/mtk_ecc.c
> @@ -86,6 +86,8 @@ struct mtk_ecc {
> struct completion done;
> struct mutex lock;
> u32 sectors;
> +
> + u8 eccdata[112];
> };
>
> static inline void mtk_ecc_wait_idle(struct mtk_ecc *ecc,
> @@ -366,9 +368,8 @@ int mtk_ecc_encode(struct mtk_ecc *ecc, struct mtk_ecc_config *config,
> u8 *data, u32 bytes)
> {
> dma_addr_t addr;
> - u8 *p;
> - u32 len, i, val;
> - int ret = 0;
> + u32 len;
> + int ret;
>
> addr = dma_map_single(ecc->dev, data, bytes, DMA_TO_DEVICE);
> ret = dma_mapping_error(ecc->dev, addr);
> @@ -393,14 +394,12 @@ int mtk_ecc_encode(struct mtk_ecc *ecc, struct mtk_ecc_config *config,
>
> /* Program ECC bytes to OOB: per sector oob = FDM + ECC + SPARE */
> len = (config->strength * ECC_PARITY_BITS + 7) >> 3;
> - p = data + bytes;
>
> - /* write the parity bytes generated by the ECC back to the OOB region */
> - for (i = 0; i < len; i++) {
> - if ((i % 4) == 0)
> - val = readl(ecc->regs + ECC_ENCPAR(i / 4));
> - p[i] = (val >> ((i % 4) * 8)) & 0xff;
> - }
> + /* write the parity bytes generated by the ECC back to temp buffer */
> + __ioread32_copy(ecc->eccdata, ecc->regs + ECC_ENCPAR(0), round_up(len, 4));
> +
> + /* copy into possibly unaligned OOB region with actual length */
> + memcpy(data + bytes, ecc->eccdata, len);
> timeout:
>
> dma_unmap_single(ecc->dev, addr, bytes, DMA_TO_DEVICE);
^ permalink raw reply
* [PATCH v5 02/23] of: device: Export of_device_{get_modalias, uvent_modalias} to modules
From: Chen-Yu Tsai @ 2016-10-18 5:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018015636.11701-3-stephen.boyd@linaro.org>
On Tue, Oct 18, 2016 at 9:56 AM, Stephen Boyd <stephen.boyd@linaro.org> wrote:
> The ULPI bus can be built as a module, and it will soon be
> calling these functions when it supports probing devices from DT.
> Export them so they can be used by the ULPI module.
>
> Acked-by: Rob Herring <robh@kernel.org>
> Cc: <devicetree@vger.kernel.org>
> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
I'm interested in this as well. The sunxi-rsb bus is non-enumerable
and DT only, and existing slave device drivers can be built as modules.
We'd need this to support modalias loading of drivers.
ChenYu
^ permalink raw reply
* [PATCH] mfd: axp20x-i2c: Add i2c-ids to fix module auto-loading
From: Chen-Yu Tsai @ 2016-10-18 5:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161005155112.13774-2-hdegoede@redhat.com>
On Wed, Oct 5, 2016 at 11:51 PM, Hans de Goede <hdegoede@redhat.com> wrote:
> The i2c subsys does not load modules by compatible, only by
> i2c-id, with e.g. a modalias of: "i2c:axp209".
>
> Populate the axp20x_i2c_id[] table with supported ids, so that
> module auto-loading will work.
>
> Reported-by: Dennis Gilmore <dennis@ausil.us>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Even though axp20x-i2c seems to be the only "DT only" i2c client,
would it make sense to add DT-based module autoloading to the i2c
core?
This also made me realize we probably don't have module auto-loading
for sunxi-rsb either.
Both should be doable with Stephen Boyd's "of: device: Export
of_device_{get_modalias, uvent_modalias} to modules" patch.
Regards
ChenYu
^ permalink raw reply
* [PATCH] clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent
From: Chen-Yu Tsai @ 2016-10-18 5:42 UTC (permalink / raw)
To: linux-arm-kernel
On the A31, the DMA engine only works if AHB1 is clocked from PLL6.
In addition, the hstimer is clocked from AHB1, and if AHB1 is clocked
from the CPU clock, and cpufreq is working, we get an unstable timer.
Force the AHB1 clock to use PLL6 as its parent. Previously this was done
in the device tree with the assigned-clocks and assigned-clocks-parent
bindings. However with this new monolithic driver, the system critical
clocks aren't exported through the device tree. The alternative is to
force this setting in the driver before the clocks are registered.
This is also done in newer versions of mainline U-boot. But people still
using an older version, or even the vendor version, can still hit this
issue. Hence the need to do it in the kernel as well.
Reported-by: Hans de Goede <hdegoede@redhat.com>
Reported-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
Hi,
This fix is for 4.9. This should fix issues with hstimer and DMA when
booting with an old bootloader.
ChenYu
---
drivers/clk/sunxi-ng/ccu-sun6i-a31.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
index 79596463e0d9..4a82a49cff5e 100644
--- a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
+++ b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
@@ -191,6 +191,8 @@ static struct clk_div_table axi_div_table[] = {
static SUNXI_CCU_DIV_TABLE(axi_clk, "axi", "cpu",
0x050, 0, 3, axi_div_table, 0);
+#define SUN6I_A31_AHB1_REG 0x054
+
static const char * const ahb1_parents[] = { "osc32k", "osc24M",
"axi", "pll-periph" };
@@ -1230,6 +1232,16 @@ static void __init sun6i_a31_ccu_setup(struct device_node *node)
val &= BIT(16);
writel(val, reg + SUN6I_A31_PLL_MIPI_REG);
+ /* Force AHB1 to PLL6 / 3 */
+ val = readl(reg + SUN6I_A31_AHB1_REG);
+ /* set PLL6 pre-div = 3 */
+ val &= ~GENMASK(7, 6);
+ val |= 0x2 << 6;
+ /* select PLL6 / pre-div */
+ val &= ~GENMASK(13, 12);
+ val |= 0x3 << 12;
+ writel(val, reg + SUN6I_A31_AHB1_REG);
+
sunxi_ccu_probe(node, reg, &sun6i_a31_ccu_desc);
ccu_mux_notifier_register(pll_cpu_clk.common.hw.clk,
--
2.9.3
^ permalink raw reply related
* [PATCH] Revert "clocksource/drivers/timer_sun5i: Replace code by clocksource_mmio_init"
From: Chen-Yu Tsai @ 2016-10-18 5:49 UTC (permalink / raw)
To: linux-arm-kernel
This reverts commit 157dfadef832 ("clocksource/drivers/timer_sun5i:
Replace code by clocksource_mmio_init").
struct clocksource is also used by the clk notifier callback, to
unregister and re-register the clocksource with a different clock rate.
clocksource_mmio_init does not pass back a pointer to the struct used,
and the clk notifier callback fixed assumed the struct clocksource in
struct sun5i_timer_clksrc was valid. This results in a kernel NULL
pointer dereference when the hstimer clock is changed:
Unable to handle kernel NULL pointer dereference at virtual address 00000004
pgd = c0204000
[00000004] *pgd=00000000
Internal error: Oops: 805 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 44 Comm: kworker/0:1 Not tainted 4.8.0-14234-g346c22e #1
Hardware name: Allwinner sun6i (A31) Family
Workqueue: events dbs_work_handler
task: ee1e0a80 task.stack: ee282000
PC is at clocksource_unbind+0x2c/0x5c
LR is at clocksource_unregister+0x2c/0x44
pc : [<c03a4678>] lr : [<c03a46d4>] psr: 20000013
sp : ee283d38 ip : ee019288 fp : 00124f80
r10: 00000000 r9 : ffffffff r8 : ee007808
r7 : 00000000 r6 : 00000001 r5 : c1442b50 r4 : ee019298
r3 : ee0192cc r2 : 00000000 r1 : 00000000 r0 : 00000000
Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
Control: 10c5387d Table: 4020406a DAC: 00000051
Process kworker/0:1 (pid: 44, stack limit = 0xee282220)
Stack: (0xee283d38 to 0xee284000)
3d20: ee019298 ee283dac
3d40: 00000001 c03a46d4 ffffffff c0a6f350 ffffffff c035ea50 ee01a0dc ee01a0c4
3d60: 00000000 00000001 ee283dac c035edc0 00000000 c066fb7c ee01a0c0 c1388890
3d80: ee00f480 00000001 fffffffa 00124f80 00124f80 c035edf4 00000000 c13ab624
3da0: 00000001 c0670174 ffffffff ee0188c0 0501bd00 044aa200 ee01a01c ee00f480
3dc0: ee00f480 00000000 00000001 c06702c0 ee00f480 ee00cd00 00000000 00000001
3de0: fffffffa c0670288 ee00cd00 ee00cc80 00000000 00000001 fffffffa c0670288
3e00: ee00cc80 ee00cc00 00000000 00000001 fffffffa c0670288 ee00cc00 ee00c300
3e20: 00000000 00000001 fffffffa c0670288 ee00cc00 337f9800 eefa8050 ee00c300
3e40: fffffffa c0672020 ee686940 337f9800 eefa8050 ee6868c0 fffffffa c0672098
3e60: ee686940 ee663400 eefa8050 c07eea64 000d2f00 c0a216fc 337f9800 3c14dc00
3e80: c1302514 ee57ac00 00000000 00000002 c1462434 00000000 00000000 000d2f00
3ea0: ee22d680 c0a21cb8 00000010 000f6180 000d2f00 00000021 ee68cc00 ee57ac00
3ec0: 0092a180 00a79400 ee68cc80 ee686c40 eefad900 c0a25344 ee68cc40 00000000
3ee0: ee68cc04 ee57ac00 c1408bac 00000000 eefad900 c0a2588c ee68cc40 ee22d680
3f00: eefad900 00000000 eefb0e00 c0357d84 c1302100 eefad918 eefad900 ee22d698
3f20: 00000008 c1302100 eefad918 ee282000 eefad900 c0358a00 ee22bc00 ee22d680
3f40: c03589c8 00000000 ee22bc00 ee22d680 c03589c8 00000000 00000000 00000000
3f60: 00000000 c035d66c 00000000 00000000 ffffffff ee22d680 00000000 00000000
3f80: ee283f80 ee283f80 00000000 00000000 ee283f90 ee283f90 ee22bc00 ee22bc00
3fa0: c035d590 00000000 00000000 c0307d38 00000000 00000000 00000000 00000000
3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 ffffffff ffffffff
[<c03a4678>] (clocksource_unbind) from [<c03a46d4>] (clocksource_unregister+0x2c/0x44)
[<c03a46d4>] (clocksource_unregister) from [<c0a6f350>] (sun5i_rate_cb_clksrc+0x34/0x3c)
[<c0a6f350>] (sun5i_rate_cb_clksrc) from [<c035ea50>] (notifier_call_chain+0x44/0x84)
[<c035ea50>] (notifier_call_chain) from [<c035edc0>] (__srcu_notifier_call_chain+0x44/0x60)
[<c035edc0>] (__srcu_notifier_call_chain) from [<c035edf4>] (srcu_notifier_call_chain+0x18/0x20)
[<c035edf4>] (srcu_notifier_call_chain) from [<c0670174>] (__clk_notify+0x70/0x7c)
[<c0670174>] (__clk_notify) from [<c06702c0>] (clk_propagate_rate_change+0xa4/0xc4)
[<c06702c0>] (clk_propagate_rate_change) from [<c0670288>] (clk_propagate_rate_change+0x6c/0xc4)
Code: e5942038 e2843034 e5941034 e3a00000 (e5812004)
---[ end trace c5149f92effb19a4 ]---
Revert the commit for now. clocksource_mmio_init can be made to pass back
a pointer, but the code churn and usage of an inner struct might not be
worth it.
Reported-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Fixes: 157dfadef832 ("clocksource/drivers/timer_sun5i: Replace code by
clocksource_mmio_init")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
drivers/clocksource/timer-sun5i.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
index c184eb84101e..4f87f3e76d83 100644
--- a/drivers/clocksource/timer-sun5i.c
+++ b/drivers/clocksource/timer-sun5i.c
@@ -152,6 +152,13 @@ static irqreturn_t sun5i_timer_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
+static cycle_t sun5i_clksrc_read(struct clocksource *clksrc)
+{
+ struct sun5i_timer_clksrc *cs = to_sun5i_timer_clksrc(clksrc);
+
+ return ~readl(cs->timer.base + TIMER_CNTVAL_LO_REG(1));
+}
+
static int sun5i_rate_cb_clksrc(struct notifier_block *nb,
unsigned long event, void *data)
{
@@ -210,8 +217,13 @@ static int __init sun5i_setup_clocksource(struct device_node *node,
writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
base + TIMER_CTL_REG(1));
- ret = clocksource_mmio_init(base + TIMER_CNTVAL_LO_REG(1), node->name,
- rate, 340, 32, clocksource_mmio_readl_down);
+ cs->clksrc.name = node->name;
+ cs->clksrc.rating = 340;
+ cs->clksrc.read = sun5i_clksrc_read;
+ cs->clksrc.mask = CLOCKSOURCE_MASK(32);
+ cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+ ret = clocksource_register_hz(&cs->clksrc, rate);
if (ret) {
pr_err("Couldn't register clock source.\n");
goto err_remove_notifier;
--
2.9.3
^ permalink raw reply related
* [RESEND][PATCH] [media] atmel-isc: start dma in some scenario
From: Songjun Wu @ 2016-10-18 6:12 UTC (permalink / raw)
To: linux-arm-kernel
If a new vb buf is added to vb queue, the queue is
empty and steaming, dma should be started.
Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
---
drivers/media/platform/atmel/atmel-isc.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/atmel/atmel-isc.c b/drivers/media/platform/atmel/atmel-isc.c
index ccfe13b..ff403d5 100644
--- a/drivers/media/platform/atmel/atmel-isc.c
+++ b/drivers/media/platform/atmel/atmel-isc.c
@@ -617,7 +617,14 @@ static void isc_buffer_queue(struct vb2_buffer *vb)
unsigned long flags;
spin_lock_irqsave(&isc->dma_queue_lock, flags);
- list_add_tail(&buf->list, &isc->dma_queue);
+ if (!isc->cur_frm && list_empty(&isc->dma_queue) &&
+ vb2_is_streaming(vb->vb2_queue)) {
+ isc->cur_frm = buf;
+ isc_start_dma(isc->regmap, isc->cur_frm,
+ isc->current_fmt->reg_dctrl_dview);
+ } else {
+ list_add_tail(&buf->list, &isc->dma_queue);
+ }
spin_unlock_irqrestore(&isc->dma_queue_lock, flags);
}
--
2.7.4
^ permalink raw reply related
* [PATCH v26 0/7] arm64: add kdump support
From: AKASHI Takahiro @ 2016-10-18 6:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3400bddc-9c6e-b69a-b57d-62921197bef9@cisco.com>
Ruslan,
On Mon, Oct 17, 2016 at 06:41:01PM +0300, Ruslan Bilovol wrote:
> Hi,
>
> On 09/07/2016 07:29 AM, AKASHI Takahiro wrote:
> > v26-specific note: After a comment from Rob[0], an idea of adding
> > "linux,usable-memory-range" was dropped. Instead, an existing
> > "reserved-memory" node will be used to limit usable memory ranges
> > on crash dump kernel.
> > This works not only on UEFI/ACPI systems but also on DT-only systems,
> > but if he really insists on using DT-specific "usable-memory" property,
> > I will post additional patches for kexec-tools. Those would be
> > redundant, though.
> > Even in that case, the kernel will not have to be changed.
> >
> >This patch series adds kdump support on arm64.
> >There are some prerequisite patches [1],[2].
> >
> >To load a crash-dump kernel to the systems, a series of patches to
> >kexec-tools, which have not yet been merged upstream, are needed.
> >Please always use my latest kdump patches, v3 [3].
> >
> >To examine vmcore (/proc/vmcore) on a crash-dump kernel, you can use
> > - crash utility (coming v7.1.6 or later) [4]
> > (Necessary patches have already been queued in the master.)
> >
> >
> >[0] http://lists.infradead.org/pipermail/linux-arm-kernel/2016-August/452582.html
> >[1] "arm64: mark reserved memblock regions explicitly in iomem"
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2016-August/450433.html
> >[2] "efi: arm64: treat regions with WT/WC set but WB cleared as memory"
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2016-August/451491.html
> >[3] T.B.D.
> >[4] https://github.com/crash-utility/crash.git
>
> Are you going to rebase your patch series onto v4.9-rc1 tag soon? I see
Yes, definitely as soon as possible! (actually I've done it.)
But before submitting a new version, I need to convince Rob (Herring)
that he would accept my old approach (v25) regarding specifying usable
memory for crash dump kernel:
http://lists.infradead.org/pipermail/linux-arm-kernel/2016-September/459379.html
> that patches [1] and [2] are already in v4.9-rc1, but when tried to apply
> this series, I've got conflict on first patch of the series ("arm64: kdump:
> reserve memory for crash dump kernel"). I want to try arm64 kdump
> patches again on my board, so I'm interested in this. The question is
> whether I need to rebase it myself or you will do the same (and address
> comments) soon.
Thank you for your interests and sorry for any inconvenience.
-Takahiro AKASHI
> Also I see Geoff published v6 of arm64 kexec-tools patches, so same
> question is applicable to "(kexec-tools) arm64: add kdump support"
> patch series.
>
> Thanks,
> Ruslan
>
^ permalink raw reply
* [PATCH 2/5] staging/vchi: Fix build warnings when formatting pointers on aarch64.
From: Greg Kroah-Hartman @ 2016-10-18 6:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87d1iyr1g3.fsf@eliezer.anholt.net>
On Mon, Oct 17, 2016 at 04:38:20PM -0700, Eric Anholt wrote:
> Greg Kroah-Hartman <gregkh@linuxfoundation.org> writes:
>
> > On Mon, Oct 17, 2016 at 12:44:03PM -0700, Eric Anholt wrote:
> >> The code was generally using "%x" to print and "(unsigned int)" to
> >> cast the pointers, but we have %p for printing pointers in the same
> >> format without any broken casts.
> >
> > I already did this work, it's all checked into my tree, and is in
> > linux-next now. You were cc:ed on the patches as well.
>
> I actually haven't seen any of those messages about the patches. It
> looks like it's actually that notmuch is still failing to parse some
> mails (they apparently disagree with postfix on how maildir files should
> be formatted, so they just drop some mail on the floor).
>
> I did check the staging-testing branch before I started, since that's
> where things were last I knew, and didn't know it had moved to -next.
But staging-testing has those fixes in it (it gets pulled into -next).
So I don't see how we got out of sync here...
thanks,
greg k-h
^ permalink raw reply
* [PATCH] Revert "dmaengine: pxa_dma: add support for legacy transition"
From: Robert Jarzmik @ 2016-10-18 6:46 UTC (permalink / raw)
To: linux-arm-kernel
This reverts commit c91134d9194478144ba579ca6efeddf628055650.
The conversion of the pxa architecture is now finished for all
drivers, so this functions has fullfilled its purpose and can
now be removed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
drivers/dma/pxa_dma.c | 28 ----------------------------
1 file changed, 28 deletions(-)
diff --git a/drivers/dma/pxa_dma.c b/drivers/dma/pxa_dma.c
index 3f56f9ca4482..b53fb618bbf6 100644
--- a/drivers/dma/pxa_dma.c
+++ b/drivers/dma/pxa_dma.c
@@ -413,15 +413,6 @@ static inline void pxad_init_debugfs(struct pxad_device *pdev) {}
static inline void pxad_cleanup_debugfs(struct pxad_device *pdev) {}
#endif
-/*
- * In the transition phase where legacy pxa handling is done at the same time as
- * mmp_dma, the DMA physical channel split between the 2 DMA providers is done
- * through legacy_reserved. Legacy code reserves DMA channels by settings
- * corresponding bits in legacy_reserved.
- */
-static u32 legacy_reserved;
-static u32 legacy_unavailable;
-
static struct pxad_phy *lookup_phy(struct pxad_chan *pchan)
{
int prio, i;
@@ -442,14 +433,10 @@ static struct pxad_phy *lookup_phy(struct pxad_chan *pchan)
for (i = 0; i < pdev->nr_chans; i++) {
if (prio != (i & 0xf) >> 2)
continue;
- if ((i < 32) && (legacy_reserved & BIT(i)))
- continue;
phy = &pdev->phys[i];
if (!phy->vchan) {
phy->vchan = pchan;
found = phy;
- if (i < 32)
- legacy_unavailable |= BIT(i);
goto out_unlock;
}
}
@@ -469,7 +456,6 @@ static void pxad_free_phy(struct pxad_chan *chan)
struct pxad_device *pdev = to_pxad_dev(chan->vc.chan.device);
unsigned long flags;
u32 reg;
- int i;
dev_dbg(&chan->vc.chan.dev->device,
"%s(): freeing\n", __func__);
@@ -483,9 +469,6 @@ static void pxad_free_phy(struct pxad_chan *chan)
}
spin_lock_irqsave(&pdev->phy_lock, flags);
- for (i = 0; i < 32; i++)
- if (chan->phy == &pdev->phys[i])
- legacy_unavailable &= ~BIT(i);
chan->phy->vchan = NULL;
chan->phy = NULL;
spin_unlock_irqrestore(&pdev->phy_lock, flags);
@@ -739,8 +722,6 @@ static irqreturn_t pxad_int_handler(int irq, void *dev_id)
i = __ffs(dint);
dint &= (dint - 1);
phy = &pdev->phys[i];
- if ((i < 32) && (legacy_reserved & BIT(i)))
- continue;
if (pxad_chan_handler(irq, phy) == IRQ_HANDLED)
ret = IRQ_HANDLED;
}
@@ -1522,15 +1503,6 @@ bool pxad_filter_fn(struct dma_chan *chan, void *param)
}
EXPORT_SYMBOL_GPL(pxad_filter_fn);
-int pxad_toggle_reserved_channel(int legacy_channel)
-{
- if (legacy_unavailable & (BIT(legacy_channel)))
- return -EBUSY;
- legacy_reserved ^= BIT(legacy_channel);
- return 0;
-}
-EXPORT_SYMBOL_GPL(pxad_toggle_reserved_channel);
-
module_platform_driver(pxad_driver);
MODULE_DESCRIPTION("Marvell PXA Peripheral DMA Driver");
--
2.1.4
^ permalink raw reply related
* [PATCH] ARM: pxa: fix pxa25x interrupt init
From: Robert Jarzmik @ 2016-10-18 6:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474874511-26617-1-git-send-email-robert.jarzmik@free.fr>
Robert Jarzmik <robert.jarzmik@free.fr> writes:
> In the device-tree case, the root interrupt controller cannot be
> accessed through the 6th coprocessor, contrary to pxa27x and pxa3xx
> architectures.
>
> Fix it to behave as in non-devicetree builds.
>
> Fixes: 32f17997c130 ("ARM: pxa: remove irq init from dt machines")
> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Applied to pxa/fixes.
--
Robert
^ permalink raw reply
* [PATCH] pinctrl: st: don't specify default interrupt trigger
From: patrice.chotard at st.com @ 2016-10-18 7:16 UTC (permalink / raw)
To: linux-arm-kernel
From: Patrice Chotard <patrice.chotard@st.com>
Thanks to 332e99d5ae4 which now alerts of default
trigger usage when configuring interrupts.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
drivers/pinctrl/pinctrl-st.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c
index 99da4cf..b7bb371 100644
--- a/drivers/pinctrl/pinctrl-st.c
+++ b/drivers/pinctrl/pinctrl-st.c
@@ -1512,7 +1512,7 @@ static int st_gpiolib_register_bank(struct st_pinctrl *info,
if (info->irqmux_base || gpio_irq > 0) {
err = gpiochip_irqchip_add(&bank->gpio_chip, &st_gpio_irqchip,
0, handle_simple_irq,
- IRQ_TYPE_LEVEL_LOW);
+ IRQ_TYPE_NONE);
if (err) {
gpiochip_remove(&bank->gpio_chip);
dev_info(dev, "could not add irqchip\n");
--
1.9.1
^ permalink raw reply related
* [PATCH 1/2] ARM: dts: add EBI2 to the Qualcomm MSM8660 DTSI
From: Linus Walleij @ 2016-10-18 7:25 UTC (permalink / raw)
To: linux-arm-kernel
This adds the external bus interface EBI2 to the MSM8660 device
tree, albeit with status = "disabled" so that devices actually
using EBI2 can turn it on if needed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v3->v4:
- Rebase on kernel v4.9-rc1
- Bindings and driver are merged so should be clear to apply.
ChangeLog v2->v3:
- Use the new #address-cells = <2> for indicating the CS in the
first address cell
- Use the ranges property properly for defining the six different
CS address windows
- Define CS3 to properly map over 128MB
- The EBI2 bindings are now ACKed by Rob Herring and a pull request
to ARM SoC for both binding and driver is pending.
- This should be safe to merge for v4.9
---
arch/arm/boot/dts/qcom-msm8660.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 8c65e0d82559..0b6348544598 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -141,6 +141,23 @@
};
};
+ ebi2 at 1a100000 {
+ compatible = "qcom,msm8660-ebi2";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x1a800000 0x00800000>,
+ <1 0x0 0x1b000000 0x00800000>,
+ <2 0x0 0x1b800000 0x00800000>,
+ <3 0x0 0x1d000000 0x08000000>,
+ <4 0x0 0x1c800000 0x00800000>,
+ <5 0x0 0x1c000000 0x00800000>;
+ reg = <0x1a100000 0x1000>, <0x1a110000 0x1000>;
+ reg-names = "ebi2", "xmem";
+ clocks = <&gcc EBI2_2X_CLK>, <&gcc EBI2_CLK>;
+ clock-names = "ebi2x", "ebi2";
+ status = "disabled";
+ };
+
qcom,ssbi at 500000 {
compatible = "qcom,ssbi";
reg = <0x500000 0x1000>;
--
2.7.4
^ permalink raw reply related
* [PATCH 2/2] ARM: dts: add SMSC ethernet on the APQ8060 Dragonboard
From: Linus Walleij @ 2016-10-18 7:25 UTC (permalink / raw)
To: linux-arm-kernel
The SMSC9112 ethernet controller is connected to chip select 2
on the EBI2 bus on the APQ8060 Dragonboard. We set this up by
activating EBI2, creating a chipselect entry as a subnode, and then
putting the ethernet controller in a subnode of the chipselect.
After the chipselect is configured, the SMSC device will be
instantiated.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v3->v4:
- Rebase on kernel v4.9-rc1
- Bindings and driver are merged so should be clear to apply.
ChangeLog v2->v3:
- Name chipselected device to ethernet-ebi2 at 2,0
- Update to the latest (v5) version of the bindings and what
the EBI2 driver expects.
- The SMSC911x bindings were ACKed by Arnd Bergmann and are merged
to the netdev tree by David Miller.
- The EBI2 bindings were ACKed by Rob Herring and a pull request
for both bindings and driver is pending for ARM SoC.
- This should be safe to merge for v4.9.
ChangeLog v1->v2:
- Use the new bindings with the first address cell indicating
the chipselect
- Use offset zero into the range in the EBI2 node (the range
defines the base address of the chipselect)
- Move all the XMEM setup to arrays in the EBI2 node
---
arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 124 +++++++++++++++++++++++++
1 file changed, 124 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
index 6c0038398ef2..7848e4c8bdb9 100644
--- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
@@ -51,6 +51,29 @@
regulator-boot-on;
};
+ /* GPIO controlled ethernet power regulator */
+ dragon_veth: xc622a331mrg {
+ compatible = "regulator-fixed";
+ regulator-name = "XC6222A331MR-G";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vph>;
+ gpio = <&pm8058_gpio 40 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&dragon_veth_gpios>;
+ regulator-always-on;
+ };
+
+ /* VDDvario fixed regulator */
+ dragon_vario: nds332p {
+ compatible = "regulator-fixed";
+ regulator-name = "NDS332P";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&pm8058_s3>;
+ };
+
/* This is a levelshifter for SDCC5 */
dragon_vio_txb: txb0104rgyr {
compatible = "regulator-fixed";
@@ -167,6 +190,41 @@
bias-pull-up;
};
};
+
+ dragon_ebi2_pins: ebi2 {
+ /*
+ * Pins used by EBI2 on the Dragonboard, actually only
+ * only CS2 is used by a real peripheral. CS0 is just
+ * routed to a test point.
+ */
+ mux0 {
+ /*
+ * Pins used by EBI2 on the Dragonboard, actually only
+ * only CS2 is used by a real peripheral. CS0 is just
+ * routed to a test point.
+ */
+ pins =
+ /* "gpio39", CS1A_N this is not good to mux */
+ "gpio40", /* CS2A_N */
+ "gpio134"; /* CS0_N testpoint TP29 */
+ function = "ebi2cs";
+ };
+ mux1 {
+ pins =
+ /* EBI2_ADDR_7 downto EBI2_ADDR_0 address bus */
+ "gpio123", "gpio124", "gpio125", "gpio126",
+ "gpio127", "gpio128", "gpio129", "gpio130",
+ /* EBI2_DATA_15 downto EBI2_DATA_0 data bus */
+ "gpio135", "gpio136", "gpio137", "gpio138",
+ "gpio139", "gpio140", "gpio141", "gpio142",
+ "gpio143", "gpio144", "gpio145", "gpio146",
+ "gpio147", "gpio148", "gpio149", "gpio150",
+ "gpio151", /* EBI2_OE_N */
+ "gpio153", /* EBI2_ADV */
+ "gpio157"; /* EBI2_WE_N */
+ function = "ebi2";
+ };
+ };
};
qcom,ssbi at 500000 {
@@ -201,6 +259,15 @@
};
gpio at 150 {
+ dragon_ethernet_gpios: ethernet-gpios {
+ pinconf {
+ pins = "gpio7";
+ function = "normal";
+ input-enable;
+ bias-disable;
+ power-source = <PM8058_GPIO_S3>;
+ };
+ };
dragon_bmp085_gpios: bmp085-gpios {
pinconf {
pins = "gpio16";
@@ -238,6 +305,14 @@
power-source = <PM8058_GPIO_S3>;
};
};
+ dragon_veth_gpios: veth-gpios {
+ pinconf {
+ pins = "gpio40";
+ function = "normal";
+ bias-disable;
+ drive-push-pull;
+ };
+ };
};
led at 48 {
@@ -322,6 +397,55 @@
};
};
+ ebi2 at 1a100000 {
+ /* The EBI2 will instantiate first, then populate its children */
+ status = "ok";
+ pinctrl-names = "default";
+ pinctrl-0 = <&dragon_ebi2_pins>;
+
+ /*
+ * An on-board SMSC LAN9221 chip for "debug ethernet",
+ * which is actually just an ordinary ethernet on the
+ * EBI2. This has a 25MHz chrystal next to it, so no
+ * clocking is needed.
+ */
+ ethernet-ebi2 at 2,0 {
+ compatible = "smsc,lan9221", "smsc,lan9115";
+ reg = <2 0x0 0x100>;
+ /*
+ * GPIO7 has interrupt 198 on the PM8058
+ * The second interrupt is the PME interrupt
+ * for network wakeup, connected to the TLMM.
+ */
+ interrupts-extended = <&pmicintc 198 IRQ_TYPE_EDGE_FALLING>,
+ <&tlmm 29 IRQ_TYPE_EDGE_RISING>;
+ reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
+ vdd33a-supply = <&dragon_veth>;
+ vddvario-supply = <&dragon_vario>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&dragon_ethernet_gpios>;
+ phy-mode = "mii";
+ reg-io-width = <2>;
+ smsc,force-external-phy;
+ /* IRQ on edge falling = active low */
+ smsc,irq-active-low;
+ smsc,irq-push-pull;
+
+ /*
+ * SLOW chipselect config
+ * Delay 9 cycles (140ns at 64MHz) between SMSC
+ * LAN9221 Ethernet controller reads and writes
+ * on CS2.
+ */
+ qcom,xmem-recovery-cycles = <0>;
+ qcom,xmem-write-hold-cycles = <3>;
+ qcom,xmem-write-delta-cycles = <31>;
+ qcom,xmem-read-delta-cycles = <28>;
+ qcom,xmem-write-wait-cycles = <9>;
+ qcom,xmem-read-wait-cycles = <9>;
+ };
+ };
+
rpm at 104000 {
/*
* Set up of the PMIC RPM regulators for this board
--
2.7.4
^ permalink raw reply related
* [PATCH v2 6/9] dt-bindings: pinctrl: Deprecate sunxi pinctrl bindings
From: Chen-Yu Tsai @ 2016-10-18 7:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ee6d214a14ed31689c5f70fc6ee5736c3d26737b.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The generic pin configuration and multiplexing should be preferred now,
> even though we still support the old one.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v2 7/9] ARM: sunxi: Remove useless allwinner, drive property
From: Chen-Yu Tsai @ 2016-10-18 7:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <076406072c137a50df41c4acb0c582a688792976.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The allwinner,drive property set to 10mA was really considered as our
> default. Remove all those properties entirely to make that obvious.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v2 8/9] ARM: sunxi: Remove useless allwinner, pull property
From: Chen-Yu Tsai @ 2016-10-18 7:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <b643d1e525835365a6ae63bcd065cb3650a839d6.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The allwinner,pull property set to NO_PULL was really considered our
> default (and wasn't even changing the default value in the code).
>
> Remove these properties to make it obvious that we do not set anything in
> such a case.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v2 9/9] ARM: sunxi: Convert pinctrl nodes to generic bindings
From: Chen-Yu Tsai @ 2016-10-18 7:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <e32d044d2d967f24f12d83eea50e7f14f2ae1073.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Now that we can handle the generic pinctrl bindings, convert our DT to it.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH 1/3] ARM: socfpga: dtsi: add qspi node
From: Steffen Trumtrar @ 2016-10-18 7:43 UTC (permalink / raw)
To: linux-arm-kernel
Add the qspi node to the socfpga dtsi file.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 9f48141270b8..0dc96d2248a6 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -705,6 +705,20 @@
reg = <0xffff0000 0x10000>;
};
+ qspi: spi at ff705000 {
+ compatible = "cdns,qspi-nor";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xff705000 0x1000>,
+ <0xffa00000 0x1000>;
+ interrupts = <0 151 4>;
+ cdns,fifo-depth = <128>;
+ cdns,fifo-width = <4>;
+ cdns,trigger-address = <0x00000000>;
+ clocks = <&qspi_clk>;
+ status = "disabled";
+ };
+
rst: rstmgr at ffd05000 {
#reset-cells = <1>;
compatible = "altr,rst-mgr";
--
2.9.3
^ permalink raw reply related
* [PATCH 2/3] ARM: socfpga: socrates: enable qspi
From: Steffen Trumtrar @ 2016-10-18 7:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018074304.6744-1-s.trumtrar@pengutronix.de>
Enable the qspi controller on the socrates and add the flash chip.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
arch/arm/boot/dts/socfpga_cyclone5_socrates.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
index d79853775061..c3d52f27b21e 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
@@ -80,3 +80,22 @@
&mmc {
status = "okay";
};
+
+&qspi {
+ status = "okay";
+
+ flash: flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q256a";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ m25p,fast-read;
+ cdns,read-delay = <4>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+ status = "okay";
+ };
+};
--
2.9.3
^ permalink raw reply related
* [PATCH 3/3] ARM: socfpga: defconfig: enable qspi
From: Steffen Trumtrar @ 2016-10-18 7:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018074304.6744-1-s.trumtrar@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
arch/arm/configs/socfpga_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
index 9f84be5b3ac5..466050663c86 100644
--- a/arch/arm/configs/socfpga_defconfig
+++ b/arch/arm/configs/socfpga_defconfig
@@ -50,6 +50,9 @@ CONFIG_CAN_DEBUG_DEVICES=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_CADENCE_QUADSPI=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=2
CONFIG_BLK_DEV_RAM_SIZE=8192
--
2.9.3
^ permalink raw reply related
* [PATCH v2 4/9] pinctrl: sunxi: Deal with configless pins
From: Chen-Yu Tsai @ 2016-10-18 7:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d707c657502b87a7f8e70c7b44492bc95939f9f6.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Even though the our binding had the assumption that the allwinner,pull and
> allwinner,drive properties were optional, the code never took that into
> account.
>
> Fix that.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> drivers/pinctrl/sunxi/pinctrl-sunxi.c | 53 ++++++++++++++++++++--------
> 1 file changed, 39 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> index 6f6f1e0011e2..2ee8d48ed5d3 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> @@ -218,20 +218,29 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
> {
> unsigned long *pinconfig;
> unsigned int configlen = 0, idx = 0;
> + int ret;
>
> if (sunxi_pctrl_has_drive_prop(node))
> configlen++;
> if (sunxi_pctrl_has_bias_prop(node))
> configlen++;
>
> + /*
> + * If we don't have any configuration, bail out
> + */
> + if (!configlen)
> + return NULL;
> +
> pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
> if (!pinconfig)
> - return NULL;
> + return ERR_PTR(-ENOMEM);
>
> if (sunxi_pctrl_has_drive_prop(node)) {
> int drive = sunxi_pctrl_parse_drive_prop(node);
> - if (drive < 0)
> + if (drive < 0) {
> + ret = drive;
> goto err_free;
> + }
>
> pinconfig[idx++] = pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
> drive);
> @@ -239,8 +248,10 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
>
> if (sunxi_pctrl_has_bias_prop(node)) {
> int pull = sunxi_pctrl_parse_bias_prop(node);
> - if (pull < 0)
> + if (pull < 0) {
> + ret = pull;
> goto err_free;
> + }
>
> pinconfig[idx++] = pinconf_to_config_packed(pull, 0);
> }
> @@ -251,7 +262,7 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
>
> err_free:
> kfree(pinconfig);
> - return NULL;
> + return ERR_PTR(ret);
> }
>
> static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
> @@ -285,7 +296,10 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
>
> /*
> * We have two maps for each pin: one for the function, one
> - * for the configuration (bias, strength, etc)
> + * for the configuration (bias, strength, etc).
> + *
> + * We might be slightly overshooting, since we might not have
> + * any configuration.
> */
> nmaps = npins * 2;
> *map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL);
> @@ -293,8 +307,8 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
> return -ENOMEM;
>
> pinconfig = sunxi_pctrl_build_pin_config(node, &configlen);
> - if (!pinconfig) {
> - ret = -EINVAL;
> + if (IS_ERR(pinconfig)) {
> + ret = PTR_ERR(pinconfig);
> goto err_free_map;
> }
>
> @@ -321,15 +335,24 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
>
> i++;
>
> - (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
> - (*map)[i].data.configs.group_or_pin = group;
> - (*map)[i].data.configs.configs = pinconfig;
> - (*map)[i].data.configs.num_configs = configlen;
> -
> - i++;
> + if (pinconfig) {
> + (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
> + (*map)[i].data.configs.group_or_pin = group;
> + (*map)[i].data.configs.configs = pinconfig;
> + (*map)[i].data.configs.num_configs = configlen;
> + i++;
> + }
> }
>
> - *num_maps = nmaps;
> + *num_maps = i;
> +
> + /*
> + * We know have the number of maps we need, we can resize our
> + * map array
> + */
> + *map = krealloc(*map, i * sizeof(struct pinctrl_map), GFP_KERNEL);
> + if (!map)
> + return -ENOMEM;
>
> return 0;
>
> @@ -342,6 +365,8 @@ static void sunxi_pctrl_dt_free_map(struct pinctrl_dev *pctldev,
> struct pinctrl_map *map,
> unsigned num_maps)
> {
> + unsigned long *pinconfig;
This looks out of place and context?
Otherwise,
Acked-by: Chen-Yu Tsai <wens@csie.org>
> +
> /* All the maps have the same pin config, free only the first one */
> kfree(map[0].data.configs.configs);
> kfree(map);
> --
> git-series 0.8.10
^ permalink raw reply
* [PATCH 01/19] phy: phy-miphy365x: Remove miphy365 driver and dt binding documentation.
From: Patrice Chotard @ 2016-10-18 7:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160923150636.GA9176@rob-hp-laptop>
Hi
On 09/23/2016 05:06 PM, Rob Herring wrote:
> On Wed, Sep 14, 2016 at 02:27:39PM +0100, Peter Griffin wrote:
>> This phy is only used on STiH415/6 based silicon, and support for
>> these SoC's is being removed from the kernel.
>>
>> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
>> Cc: <kishon@ti.com>
>> ---
>> .../devicetree/bindings/phy/phy-miphy365x.txt | 77 ---
>
> Acked-by: Rob Herring <robh@kernel.org>
Applied on sti-dt-for-4.10 branch
Thanks
>
>> drivers/phy/Kconfig | 10 -
>> drivers/phy/Makefile | 1 -
>> drivers/phy/phy-miphy365x.c | 625 ---------------------
>> 4 files changed, 713 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/phy/phy-miphy365x.txt
>> delete mode 100644 drivers/phy/phy-miphy365x.c
^ permalink raw reply
* [PATCH 02/19] phy: stih41x-usb: Remove usb phy driver and dt binding documentation.
From: Patrice Chotard @ 2016-10-18 7:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160923150656.GB9176@rob-hp-laptop>
Hi
On 09/23/2016 05:06 PM, Rob Herring wrote:
> On Wed, Sep 14, 2016 at 02:27:40PM +0100, Peter Griffin wrote:
>> This phy is only used on STiH415/6 based silicon, and support for
>> these SoC's is being removed from the kernel.
>>
>> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
>> Cc: <kishon@ti.com>
>> ---
>> .../devicetree/bindings/phy/phy-stih41x-usb.txt | 24 ---
>
> Acked-by: Rob Herring <robh@kernel.org>
Applied on sti-dt-for-4.10 branch
Thanks
>
>> drivers/phy/Kconfig | 8 -
>> drivers/phy/Makefile | 1 -
>> drivers/phy/phy-stih41x-usb.c | 188 ---------------------
>> 4 files changed, 221 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt
>> delete mode 100644 drivers/phy/phy-stih41x-usb.c
^ permalink raw reply
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