* [PATCH 06/19] ARM: multi_v7_defconfig: Remove stih41x phy Kconfig symbol.
From: Patrice Chotard @ 2016-10-18 7:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473859677-9231-7-git-send-email-peter.griffin@linaro.org>
Hi
On 09/14/2016 03:27 PM, Peter Griffin wrote:
> This IP is only found on STiH415/6 silicon and support
> for these SoCs is being removed from the kernel.
>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> Cc: <kishon@ti.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Applied on sti-defconfig-for-4.10 branch
Thanks
> ---
> arch/arm/configs/multi_v7_defconfig | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
> index 949ab7f..b26a541 100644
> --- a/arch/arm/configs/multi_v7_defconfig
> +++ b/arch/arm/configs/multi_v7_defconfig
> @@ -855,7 +855,6 @@ CONFIG_PHY_ROCKCHIP_USB=m
> CONFIG_PHY_QCOM_APQ8064_SATA=m
> CONFIG_PHY_MIPHY28LP=y
> CONFIG_PHY_RCAR_GEN2=m
> -CONFIG_PHY_STIH41X_USB=y
> CONFIG_PHY_STIH407_USB=y
> CONFIG_PHY_SUN4I_USB=y
> CONFIG_PHY_SUN9I_USB=y
>
^ permalink raw reply
* [PATCH 05/19] ARM: multi_v7_defconfig: Remove miphy365 phy.
From: Patrice Chotard @ 2016-10-18 7:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473859677-9231-6-git-send-email-peter.griffin@linaro.org>
Hi
On 09/14/2016 03:27 PM, Peter Griffin wrote:
> This IP is only found on STiH415/6 silicon and support
> for these SoCs is being removed from the kernel.
>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> Cc: <kishon@ti.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Applied on sti-defconfig-for-4.10 branch
Thanks
> ---
> arch/arm/configs/multi_v7_defconfig | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
> index 2c8665c..949ab7f 100644
> --- a/arch/arm/configs/multi_v7_defconfig
> +++ b/arch/arm/configs/multi_v7_defconfig
> @@ -854,7 +854,6 @@ CONFIG_PHY_ROCKCHIP_DP=m
> CONFIG_PHY_ROCKCHIP_USB=m
> CONFIG_PHY_QCOM_APQ8064_SATA=m
> CONFIG_PHY_MIPHY28LP=y
> -CONFIG_PHY_MIPHY365X=y
> CONFIG_PHY_RCAR_GEN2=m
> CONFIG_PHY_STIH41X_USB=y
> CONFIG_PHY_STIH407_USB=y
>
^ permalink raw reply
* [PATCH] clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent
From: Jean-Francois Moine @ 2016-10-18 7:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018054209.24546-1-wens@csie.org>
On Tue, 18 Oct 2016 13:42:09 +0800
Chen-Yu Tsai <wens@csie.org> wrote:
> On the A31, the DMA engine only works if AHB1 is clocked from PLL6.
> In addition, the hstimer is clocked from AHB1, and if AHB1 is clocked
> from the CPU clock, and cpufreq is working, we get an unstable timer.
>
> Force the AHB1 clock to use PLL6 as its parent. Previously this was done
> in the device tree with the assigned-clocks and assigned-clocks-parent
> bindings. However with this new monolithic driver, the system critical
> clocks aren't exported through the device tree. The alternative is to
> force this setting in the driver before the clocks are registered.
It should be simpler to export the constant (CLK_AHB1) instead of
adding code...
--
Ken ar c'henta? | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
^ permalink raw reply
* [PATCH 04/19] MAINTAINERS: Remove phy-stih41x-usb.c entry from STi arch
From: Patrice Chotard @ 2016-10-18 7:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473859677-9231-5-git-send-email-peter.griffin@linaro.org>
Hi
On 09/14/2016 03:27 PM, Peter Griffin wrote:
> Remove this driver as the IP is only found on STiH415/6
> silicon, and support for these SoC's is being removed
> from the kernel.
>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> Cc: <kishon@ti.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Applied on sti-dt-for-4.10 branch
Thanks
> ---
> MAINTAINERS | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 12c271c..6a278b9 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1755,7 +1755,6 @@ F: drivers/media/platform/sti/c8sectpfe/
> F: drivers/mmc/host/sdhci-st.c
> F: drivers/phy/phy-miphy28lp.c
> F: drivers/phy/phy-stih407-usb.c
> -F: drivers/phy/phy-stih41x-usb.c
> F: drivers/pinctrl/pinctrl-st.c
> F: drivers/remoteproc/st_remoteproc.c
> F: drivers/reset/sti/
>
^ permalink raw reply
* [PATCH 0/7] ARM: AMx3xx/DRA7: crypto IP support data
From: Tero Kristo @ 2016-10-18 7:50 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
This series finalizes the crypto support for amx3xx / dra7 socs,
adding the hwmod data and fixing one issue with l4sec clockdomain
on dra7.
Branch against 4.9-rc1 available here:
tree: https://github.com/t-kristo/linux-pm.git
branch: 4.9-rc1-crypto-data
-Tero
^ permalink raw reply
* [PATCH v4 3/9] drm/hisilicon/hibmc: Add support for frame buffer
From: Daniel Vetter @ 2016-10-18 7:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476763284-100508-4-git-send-email-zourongrong@gmail.com>
On Tue, Oct 18, 2016 at 12:01:18PM +0800, Rongrong Zou wrote:
> Add support for fbdev and framebuffer.
>
> Signed-off-by: Rongrong Zou <zourongrong@gmail.com>
> ---
> drivers/gpu/drm/hisilicon/hibmc/Makefile | 2 +-
> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 25 +++
> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 25 +++
> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c | 257 ++++++++++++++++++++++
> drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 67 ++++++
> 5 files changed, 375 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c
>
> diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile b/drivers/gpu/drm/hisilicon/hibmc/Makefile
> index d5c40b8..810a37e 100644
> --- a/drivers/gpu/drm/hisilicon/hibmc/Makefile
> +++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile
> @@ -1,5 +1,5 @@
> ccflags-y := -Iinclude/drm
> -hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_power.o hibmc_ttm.o
> +hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_fbdev.o hibmc_drm_power.o hibmc_ttm.o
>
> obj-$(CONFIG_DRM_HISI_HIBMC) +=hibmc-drm.o
> #obj-y += hibmc-drm.o
> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
> index e118f3b..8ddb763 100644
> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
> @@ -66,11 +66,31 @@ static void hibmc_disable_vblank(struct drm_device *dev, unsigned int pipe)
>
> static int hibmc_pm_suspend(struct device *dev)
> {
> + struct pci_dev *pdev = to_pci_dev(dev);
> + struct drm_device *drm_dev = pci_get_drvdata(pdev);
> + struct hibmc_drm_device *hidev = drm_dev->dev_private;
> +
> + if (hidev->fbdev.initialized) {
What do you need these checks for? This looks a bit fishy tbh ...
> + console_lock();
> + drm_fb_helper_set_suspend(&hidev->fbdev.helper, 1);
> + console_unlock();
drm_fb_helper_set_suspend_unlocked is the new fancy one. Please use that
one instead. Also, that has the check you might need already included,
which means you can nuke this entire function here and just call it
directly.
-Daniel
> + }
> +
> return 0;
> }
>
> static int hibmc_pm_resume(struct device *dev)
> {
> + struct pci_dev *pdev = to_pci_dev(dev);
> + struct drm_device *drm_dev = pci_get_drvdata(pdev);
> + struct hibmc_drm_device *hidev = drm_dev->dev_private;
> +
> + if (hidev->fbdev.initialized) {
> + console_lock();
> + drm_fb_helper_set_suspend(&hidev->fbdev.helper, 0);
> + console_unlock();
> + }
> +
> return 0;
> }
>
> @@ -170,6 +190,7 @@ static int hibmc_unload(struct drm_device *dev)
> {
> struct hibmc_drm_device *hidev = dev->dev_private;
>
> + hibmc_fbdev_fini(hidev);
> hibmc_hw_fini(hidev);
> dev->dev_private = NULL;
> return 0;
> @@ -194,6 +215,10 @@ static int hibmc_load(struct drm_device *dev, unsigned long flags)
> if (ret)
> goto err;
>
> + ret = hibmc_fbdev_init(hidev);
> + if (ret)
> + goto err;
> +
> return 0;
>
> err:
> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
> index 00bb153..4f5887f 100644
> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
> @@ -20,9 +20,23 @@
> #define HIBMC_DRM_DRV_H
>
> #include <drm/drmP.h>
> +#include <drm/drm_fb_helper.h>
> #include <drm/ttm/ttm_bo_driver.h>
> #include <drm/drm_gem.h>
>
> +struct hibmc_framebuffer {
> + struct drm_framebuffer fb;
> + struct drm_gem_object *obj;
> + bool is_fbdev_fb;
> +};
> +
> +struct hibmc_fbdev {
> + struct drm_fb_helper helper;
> + struct hibmc_framebuffer fb;
> + int size;
> + bool initialized;
> +};
> +
> struct hibmc_drm_device {
> /* hw */
> void __iomem *mmio;
> @@ -41,9 +55,13 @@ struct hibmc_drm_device {
> bool initialized;
> } ttm;
>
> + /* fbdev */
> + struct hibmc_fbdev fbdev;
> bool mm_inited;
> };
>
> +#define to_hibmc_framebuffer(x) container_of(x, struct hibmc_framebuffer, fb)
> +
> struct hibmc_bo {
> struct ttm_buffer_object bo;
> struct ttm_placement placement;
> @@ -65,8 +83,15 @@ static inline struct hibmc_bo *gem_to_hibmc_bo(struct drm_gem_object *gem)
>
> #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
>
> +int hibmc_fbdev_init(struct hibmc_drm_device *hidev);
> +void hibmc_fbdev_fini(struct hibmc_drm_device *hidev);
> +
> int hibmc_gem_create(struct drm_device *dev, u32 size, bool iskernel,
> struct drm_gem_object **obj);
> +int hibmc_framebuffer_init(struct drm_device *dev,
> + struct hibmc_framebuffer *gfb,
> + const struct drm_mode_fb_cmd2 *mode_cmd,
> + struct drm_gem_object *obj);
>
> int hibmc_mm_init(struct hibmc_drm_device *hibmc);
> int hibmc_bo_pin(struct hibmc_bo *bo, u32 pl_flag, u64 *gpu_addr);
> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c
> new file mode 100644
> index 0000000..ea2d86a
> --- /dev/null
> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c
> @@ -0,0 +1,257 @@
> +/* Hisilicon Hibmc SoC drm driver
> + *
> + * Based on the bochs drm driver.
> + *
> + * Copyright (c) 2016 Huawei Limited.
> + *
> + * Author:
> + * Rongrong Zou <zourongrong@huawei.com>
> + * Rongrong Zou <zourongrong@gmail.com>
> + * Jianhua Li <lijianhua@huawei.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + */
> +
> +#include <drm/drm_crtc.h>
> +#include <drm/drm_crtc_helper.h>
> +#include <drm/drm_fb_helper.h>
> +
> +#include "hibmc_drm_drv.h"
> +
> +/* ---------------------------------------------------------------------- */
> +
> +static int hibmcfb_create_object(
> + struct hibmc_drm_device *hidev,
> + const struct drm_mode_fb_cmd2 *mode_cmd,
> + struct drm_gem_object **gobj_p)
> +{
> + struct drm_gem_object *gobj;
> + struct drm_device *dev = hidev->dev;
> + u32 size;
> + int ret = 0;
> +
> + size = mode_cmd->pitches[0] * mode_cmd->height;
> + ret = hibmc_gem_create(dev, size, true, &gobj);
> + if (ret)
> + return ret;
> +
> + *gobj_p = gobj;
> + return ret;
> +}
> +
> +static struct fb_ops hibmc_drm_fb_ops = {
> + .owner = THIS_MODULE,
> + .fb_check_var = drm_fb_helper_check_var,
> + .fb_set_par = drm_fb_helper_set_par,
> + .fb_fillrect = drm_fb_helper_sys_fillrect,
> + .fb_copyarea = drm_fb_helper_sys_copyarea,
> + .fb_imageblit = drm_fb_helper_sys_imageblit,
> + .fb_pan_display = drm_fb_helper_pan_display,
> + .fb_blank = drm_fb_helper_blank,
> + .fb_setcmap = drm_fb_helper_setcmap,
> +};
> +
> +static int hibmc_drm_fb_create(struct drm_fb_helper *helper,
> + struct drm_fb_helper_surface_size *sizes)
> +{
> + struct hibmc_fbdev *gfbdev =
> + container_of(helper, struct hibmc_fbdev, helper);
> + struct hibmc_drm_device *hidev =
> + container_of(helper, struct hibmc_drm_device, fbdev.helper);
> + struct fb_info *info;
> + struct drm_framebuffer *fb;
> + struct drm_mode_fb_cmd2 mode_cmd;
> + struct drm_gem_object *gobj = NULL;
> + int ret = 0;
> + size_t size;
> + unsigned int bytes_per_pixel;
> + struct hibmc_bo *bo = NULL;
> +
> + DRM_DEBUG_DRIVER("surface width(%d), height(%d) and bpp(%d)\n",
> + sizes->surface_width, sizes->surface_height,
> + sizes->surface_bpp);
> + sizes->surface_depth = 32;
> +
> + bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8);
> +
> + mode_cmd.width = sizes->surface_width;
> + mode_cmd.height = sizes->surface_height;
> + mode_cmd.pitches[0] = mode_cmd.width * bytes_per_pixel;
> + mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
> + sizes->surface_depth);
> +
> + size = roundup(mode_cmd.pitches[0] * mode_cmd.height, PAGE_SIZE);
> +
> + ret = hibmcfb_create_object(hidev, &mode_cmd, &gobj);
> + if (ret) {
> + DRM_ERROR("failed to create fbcon backing object %d\r\n", ret);
> + return -ENOMEM;
> + }
> +
> + bo = gem_to_hibmc_bo(gobj);
> +
> + ret = ttm_bo_reserve(&bo->bo, true, false, NULL);
> + if (ret)
> + return ret;
> +
> + ret = hibmc_bo_pin(bo, TTM_PL_FLAG_VRAM, NULL);
> + if (ret) {
> + DRM_ERROR("failed to pin fbcon\n");
> + return ret;
> + }
> +
> + ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap);
> +
> + if (ret) {
> + DRM_ERROR("failed to kmap fbcon\n");
> + ttm_bo_unreserve(&bo->bo);
> + return ret;
> + }
> +
> + ttm_bo_unreserve(&bo->bo);
> +
> + info = drm_fb_helper_alloc_fbi(helper);
> + if (IS_ERR(info))
> + ret = PTR_ERR(info);
> +
> + info->par = gfbdev;
> +
> + ret = hibmc_framebuffer_init(hidev->dev, &hidev->fbdev.fb,
> + &mode_cmd, gobj);
> + if (ret) {
> + drm_fb_helper_release_fbi(helper);
> + return ret;
> + }
> +
> + hidev->fbdev.size = size;
> + fb = &gfbdev->fb.fb;
> + if (!fb) {
> + DRM_INFO("fb is NULL\n");
> + return -EINVAL;
> + }
> +
> + gfbdev->helper.fb = fb;
> +
> + strcpy(info->fix.id, "hibmcdrmfb");
> +
> + info->flags = FBINFO_DEFAULT;
> + info->fbops = &hibmc_drm_fb_ops;
> +
> + drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
> + drm_fb_helper_fill_var(info, &hidev->fbdev.helper, sizes->fb_width,
> + sizes->fb_height);
> +
> + info->screen_base = bo->kmap.virtual;
> + info->screen_size = size;
> +
> + info->fix.smem_start = bo->bo.mem.bus.offset + bo->bo.mem.bus.base;
> + info->fix.smem_len = size;
> +
> + return 0;
> +}
> +
> +static int hibmc_fbdev_destroy(struct drm_device *dev,
> + struct hibmc_fbdev *fbdev)
> +{
> + struct hibmc_framebuffer *gfb = &fbdev->fb;
> + struct drm_fb_helper *fbh = &fbdev->helper;
> +
> + DRM_DEBUG_DRIVER("hibmc_fbdev_destroy\n");
> +
> + drm_fb_helper_unregister_fbi(fbh);
> + drm_fb_helper_release_fbi(fbh);
> +
> + if (gfb->obj) {
> + drm_gem_object_unreference_unlocked(gfb->obj);
> + gfb->obj = NULL;
> + }
> +
> + drm_fb_helper_fini(fbh);
> +
> + drm_framebuffer_unregister_private(&gfb->fb);
> + drm_framebuffer_cleanup(&gfb->fb);
> +
> + return 0;
> +}
> +
> +static const struct drm_fb_helper_funcs hibmc_fbdev_helper_funcs = {
> + .fb_probe = hibmc_drm_fb_create,
> +};
> +
> +int hibmc_fbdev_init(struct hibmc_drm_device *hidev)
> +{
> + int ret;
> + struct fb_var_screeninfo *var;
> + struct fb_fix_screeninfo *fix;
> +
> + drm_fb_helper_prepare(hidev->dev, &hidev->fbdev.helper,
> + &hibmc_fbdev_helper_funcs);
> +
> + /* Now just one crtc and one channel */
> + ret = drm_fb_helper_init(hidev->dev,
> + &hidev->fbdev.helper, 1, 1);
> +
> + if (ret)
> + return ret;
> +
> + ret = drm_fb_helper_single_add_all_connectors(&hidev->fbdev.helper);
> + if (ret)
> + goto fini;
> +
> + ret = drm_fb_helper_initial_config(&hidev->fbdev.helper, 16);
> + if (ret)
> + goto fini;
> +
> + hidev->fbdev.initialized = true;
> +
> + var = &hidev->fbdev.helper.fbdev->var;
> + fix = &hidev->fbdev.helper.fbdev->fix;
> +
> + DRM_DEBUG("Member of info->var is :\n"
> + "xres=%d\n"
> + "yres=%d\n"
> + "xres_virtual=%d\n"
> + "yres_virtual=%d\n"
> + "xoffset=%d\n"
> + "yoffset=%d\n"
> + "bits_per_pixel=%d\n"
> + "...\n", var->xres, var->yres, var->xres_virtual,
> + var->yres_virtual, var->xoffset, var->yoffset,
> + var->bits_per_pixel);
> + DRM_DEBUG("Member of info->fix is :\n"
> + "smem_start=%lx\n"
> + "smem_len=%d\n"
> + "type=%d\n"
> + "type_aux=%d\n"
> + "visual=%d\n"
> + "xpanstep=%d\n"
> + "ypanstep=%d\n"
> + "ywrapstep=%d\n"
> + "line_length=%d\n"
> + "accel=%d\n"
> + "capabilities=%d\n"
> + "...\n", fix->smem_start, fix->smem_len, fix->type,
> + fix->type_aux, fix->visual, fix->xpanstep,
> + fix->ypanstep, fix->ywrapstep, fix->line_length,
> + fix->accel, fix->capabilities);
> +
> + return 0;
> +
> +fini:
> + drm_fb_helper_fini(&hidev->fbdev.helper);
> + return ret;
> +}
> +
> +void hibmc_fbdev_fini(struct hibmc_drm_device *hidev)
> +{
> + if (!hidev->fbdev.initialized)
> + return;
> +
> + hibmc_fbdev_destroy(hidev->dev, &hidev->fbdev);
> + hidev->fbdev.initialized = false;
> +}
> +
> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
> index 2dbef04..c8f7f6c 100644
> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
> @@ -489,3 +489,70 @@ int hibmc_dumb_mmap_offset(struct drm_file *file, struct drm_device *dev,
> return 0;
> }
>
> +/* ---------------------------------------------------------------------- */
> +
> +static void hibmc_user_framebuffer_destroy(struct drm_framebuffer *fb)
> +{
> + struct hibmc_framebuffer *hibmc_fb = to_hibmc_framebuffer(fb);
> +
> + drm_gem_object_unreference_unlocked(hibmc_fb->obj);
> + drm_framebuffer_cleanup(fb);
> + kfree(fb);
> +}
> +
> +static const struct drm_framebuffer_funcs hibmc_fb_funcs = {
> + .destroy = hibmc_user_framebuffer_destroy,
> +};
> +
> +int hibmc_framebuffer_init(struct drm_device *dev,
> + struct hibmc_framebuffer *gfb,
> + const struct drm_mode_fb_cmd2 *mode_cmd,
> + struct drm_gem_object *obj)
> +{
> + int ret;
> +
> + drm_helper_mode_fill_fb_struct(&gfb->fb, mode_cmd);
> + gfb->obj = obj;
> + ret = drm_framebuffer_init(dev, &gfb->fb, &hibmc_fb_funcs);
> + if (ret) {
> + DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);
> + return ret;
> + }
> + return 0;
> +}
> +
> +static struct drm_framebuffer *
> +hibmc_user_framebuffer_create(struct drm_device *dev,
> + struct drm_file *filp,
> + const struct drm_mode_fb_cmd2 *mode_cmd)
> +{
> + struct drm_gem_object *obj;
> + struct hibmc_framebuffer *hibmc_fb;
> + int ret;
> +
> + DRM_DEBUG_DRIVER("%dx%d, format %c%c%c%c\n",
> + mode_cmd->width, mode_cmd->height,
> + (mode_cmd->pixel_format) & 0xff,
> + (mode_cmd->pixel_format >> 8) & 0xff,
> + (mode_cmd->pixel_format >> 16) & 0xff,
> + (mode_cmd->pixel_format >> 24) & 0xff);
> +
> + obj = drm_gem_object_lookup(filp, mode_cmd->handles[0]);
> + if (!obj)
> + return ERR_PTR(-ENOENT);
> +
> + hibmc_fb = kzalloc(sizeof(*hibmc_fb), GFP_KERNEL);
> + if (!hibmc_fb) {
> + drm_gem_object_unreference_unlocked(obj);
> + return ERR_PTR(-ENOMEM);
> + }
> +
> + ret = hibmc_framebuffer_init(dev, hibmc_fb, mode_cmd, obj);
> + if (ret) {
> + drm_gem_object_unreference_unlocked(obj);
> + kfree(hibmc_fb);
> + return ERR_PTR(ret);
> + }
> + return &hibmc_fb->fb;
> +}
> +
> --
> 1.9.1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply
* [PATCH 03/19] MAINTAINERS: Remove phy-miphy365x.c entry from STi arch
From: Patrice Chotard @ 2016-10-18 7:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473859677-9231-4-git-send-email-peter.griffin@linaro.org>
Hi
On 09/14/2016 03:27 PM, Peter Griffin wrote:
> Remove this driver as the IP is only found on STiH415/6
> silicon, and support for these SoC's is being removed
> from the kernel.
>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> Cc: <kishon@ti.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Applied on sti-dt-for-4.10 branch
Thanks
> ---
> MAINTAINERS | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index db814a8..12c271c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1754,7 +1754,6 @@ F: drivers/media/rc/st_rc.c
> F: drivers/media/platform/sti/c8sectpfe/
> F: drivers/mmc/host/sdhci-st.c
> F: drivers/phy/phy-miphy28lp.c
> -F: drivers/phy/phy-miphy365x.c
> F: drivers/phy/phy-stih407-usb.c
> F: drivers/phy/phy-stih41x-usb.c
> F: drivers/pinctrl/pinctrl-st.c
>
^ permalink raw reply
* [PATCH 02/19] phy: stih41x-usb: Remove usb phy driver and dt binding documentation.
From: Patrice Chotard @ 2016-10-18 7:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160923150656.GB9176@rob-hp-laptop>
Hi
On 09/23/2016 05:06 PM, Rob Herring wrote:
> On Wed, Sep 14, 2016 at 02:27:40PM +0100, Peter Griffin wrote:
>> This phy is only used on STiH415/6 based silicon, and support for
>> these SoC's is being removed from the kernel.
>>
>> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
>> Cc: <kishon@ti.com>
>> ---
>> .../devicetree/bindings/phy/phy-stih41x-usb.txt | 24 ---
>
> Acked-by: Rob Herring <robh@kernel.org>
Applied on sti-dt-for-4.10 branch
Thanks
>
>> drivers/phy/Kconfig | 8 -
>> drivers/phy/Makefile | 1 -
>> drivers/phy/phy-stih41x-usb.c | 188 ---------------------
>> 4 files changed, 221 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt
>> delete mode 100644 drivers/phy/phy-stih41x-usb.c
^ permalink raw reply
* [PATCH 01/19] phy: phy-miphy365x: Remove miphy365 driver and dt binding documentation.
From: Patrice Chotard @ 2016-10-18 7:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160923150636.GA9176@rob-hp-laptop>
Hi
On 09/23/2016 05:06 PM, Rob Herring wrote:
> On Wed, Sep 14, 2016 at 02:27:39PM +0100, Peter Griffin wrote:
>> This phy is only used on STiH415/6 based silicon, and support for
>> these SoC's is being removed from the kernel.
>>
>> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
>> Cc: <kishon@ti.com>
>> ---
>> .../devicetree/bindings/phy/phy-miphy365x.txt | 77 ---
>
> Acked-by: Rob Herring <robh@kernel.org>
Applied on sti-dt-for-4.10 branch
Thanks
>
>> drivers/phy/Kconfig | 10 -
>> drivers/phy/Makefile | 1 -
>> drivers/phy/phy-miphy365x.c | 625 ---------------------
>> 4 files changed, 713 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/phy/phy-miphy365x.txt
>> delete mode 100644 drivers/phy/phy-miphy365x.c
^ permalink raw reply
* [PATCH v2 4/9] pinctrl: sunxi: Deal with configless pins
From: Chen-Yu Tsai @ 2016-10-18 7:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d707c657502b87a7f8e70c7b44492bc95939f9f6.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Even though the our binding had the assumption that the allwinner,pull and
> allwinner,drive properties were optional, the code never took that into
> account.
>
> Fix that.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> drivers/pinctrl/sunxi/pinctrl-sunxi.c | 53 ++++++++++++++++++++--------
> 1 file changed, 39 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> index 6f6f1e0011e2..2ee8d48ed5d3 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> @@ -218,20 +218,29 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
> {
> unsigned long *pinconfig;
> unsigned int configlen = 0, idx = 0;
> + int ret;
>
> if (sunxi_pctrl_has_drive_prop(node))
> configlen++;
> if (sunxi_pctrl_has_bias_prop(node))
> configlen++;
>
> + /*
> + * If we don't have any configuration, bail out
> + */
> + if (!configlen)
> + return NULL;
> +
> pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
> if (!pinconfig)
> - return NULL;
> + return ERR_PTR(-ENOMEM);
>
> if (sunxi_pctrl_has_drive_prop(node)) {
> int drive = sunxi_pctrl_parse_drive_prop(node);
> - if (drive < 0)
> + if (drive < 0) {
> + ret = drive;
> goto err_free;
> + }
>
> pinconfig[idx++] = pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
> drive);
> @@ -239,8 +248,10 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
>
> if (sunxi_pctrl_has_bias_prop(node)) {
> int pull = sunxi_pctrl_parse_bias_prop(node);
> - if (pull < 0)
> + if (pull < 0) {
> + ret = pull;
> goto err_free;
> + }
>
> pinconfig[idx++] = pinconf_to_config_packed(pull, 0);
> }
> @@ -251,7 +262,7 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
>
> err_free:
> kfree(pinconfig);
> - return NULL;
> + return ERR_PTR(ret);
> }
>
> static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
> @@ -285,7 +296,10 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
>
> /*
> * We have two maps for each pin: one for the function, one
> - * for the configuration (bias, strength, etc)
> + * for the configuration (bias, strength, etc).
> + *
> + * We might be slightly overshooting, since we might not have
> + * any configuration.
> */
> nmaps = npins * 2;
> *map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL);
> @@ -293,8 +307,8 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
> return -ENOMEM;
>
> pinconfig = sunxi_pctrl_build_pin_config(node, &configlen);
> - if (!pinconfig) {
> - ret = -EINVAL;
> + if (IS_ERR(pinconfig)) {
> + ret = PTR_ERR(pinconfig);
> goto err_free_map;
> }
>
> @@ -321,15 +335,24 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
>
> i++;
>
> - (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
> - (*map)[i].data.configs.group_or_pin = group;
> - (*map)[i].data.configs.configs = pinconfig;
> - (*map)[i].data.configs.num_configs = configlen;
> -
> - i++;
> + if (pinconfig) {
> + (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
> + (*map)[i].data.configs.group_or_pin = group;
> + (*map)[i].data.configs.configs = pinconfig;
> + (*map)[i].data.configs.num_configs = configlen;
> + i++;
> + }
> }
>
> - *num_maps = nmaps;
> + *num_maps = i;
> +
> + /*
> + * We know have the number of maps we need, we can resize our
> + * map array
> + */
> + *map = krealloc(*map, i * sizeof(struct pinctrl_map), GFP_KERNEL);
> + if (!map)
> + return -ENOMEM;
>
> return 0;
>
> @@ -342,6 +365,8 @@ static void sunxi_pctrl_dt_free_map(struct pinctrl_dev *pctldev,
> struct pinctrl_map *map,
> unsigned num_maps)
> {
> + unsigned long *pinconfig;
This looks out of place and context?
Otherwise,
Acked-by: Chen-Yu Tsai <wens@csie.org>
> +
> /* All the maps have the same pin config, free only the first one */
> kfree(map[0].data.configs.configs);
> kfree(map);
> --
> git-series 0.8.10
^ permalink raw reply
* [PATCH 3/3] ARM: socfpga: defconfig: enable qspi
From: Steffen Trumtrar @ 2016-10-18 7:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018074304.6744-1-s.trumtrar@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
arch/arm/configs/socfpga_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
index 9f84be5b3ac5..466050663c86 100644
--- a/arch/arm/configs/socfpga_defconfig
+++ b/arch/arm/configs/socfpga_defconfig
@@ -50,6 +50,9 @@ CONFIG_CAN_DEBUG_DEVICES=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_CADENCE_QUADSPI=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=2
CONFIG_BLK_DEV_RAM_SIZE=8192
--
2.9.3
^ permalink raw reply related
* [PATCH 2/3] ARM: socfpga: socrates: enable qspi
From: Steffen Trumtrar @ 2016-10-18 7:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018074304.6744-1-s.trumtrar@pengutronix.de>
Enable the qspi controller on the socrates and add the flash chip.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
arch/arm/boot/dts/socfpga_cyclone5_socrates.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
index d79853775061..c3d52f27b21e 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
@@ -80,3 +80,22 @@
&mmc {
status = "okay";
};
+
+&qspi {
+ status = "okay";
+
+ flash: flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q256a";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ m25p,fast-read;
+ cdns,read-delay = <4>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+ status = "okay";
+ };
+};
--
2.9.3
^ permalink raw reply related
* [PATCH 1/3] ARM: socfpga: dtsi: add qspi node
From: Steffen Trumtrar @ 2016-10-18 7:43 UTC (permalink / raw)
To: linux-arm-kernel
Add the qspi node to the socfpga dtsi file.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 9f48141270b8..0dc96d2248a6 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -705,6 +705,20 @@
reg = <0xffff0000 0x10000>;
};
+ qspi: spi at ff705000 {
+ compatible = "cdns,qspi-nor";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xff705000 0x1000>,
+ <0xffa00000 0x1000>;
+ interrupts = <0 151 4>;
+ cdns,fifo-depth = <128>;
+ cdns,fifo-width = <4>;
+ cdns,trigger-address = <0x00000000>;
+ clocks = <&qspi_clk>;
+ status = "disabled";
+ };
+
rst: rstmgr at ffd05000 {
#reset-cells = <1>;
compatible = "altr,rst-mgr";
--
2.9.3
^ permalink raw reply related
* [PATCH v2 9/9] ARM: sunxi: Convert pinctrl nodes to generic bindings
From: Chen-Yu Tsai @ 2016-10-18 7:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <e32d044d2d967f24f12d83eea50e7f14f2ae1073.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Now that we can handle the generic pinctrl bindings, convert our DT to it.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v2 8/9] ARM: sunxi: Remove useless allwinner, pull property
From: Chen-Yu Tsai @ 2016-10-18 7:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <b643d1e525835365a6ae63bcd065cb3650a839d6.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The allwinner,pull property set to NO_PULL was really considered our
> default (and wasn't even changing the default value in the code).
>
> Remove these properties to make it obvious that we do not set anything in
> such a case.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v2 7/9] ARM: sunxi: Remove useless allwinner, drive property
From: Chen-Yu Tsai @ 2016-10-18 7:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <076406072c137a50df41c4acb0c582a688792976.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The allwinner,drive property set to 10mA was really considered as our
> default. Remove all those properties entirely to make that obvious.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v2 6/9] dt-bindings: pinctrl: Deprecate sunxi pinctrl bindings
From: Chen-Yu Tsai @ 2016-10-18 7:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ee6d214a14ed31689c5f70fc6ee5736c3d26737b.1476200742.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 11:46 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The generic pin configuration and multiplexing should be preferred now,
> even though we still support the old one.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH 2/2] ARM: dts: add SMSC ethernet on the APQ8060 Dragonboard
From: Linus Walleij @ 2016-10-18 7:25 UTC (permalink / raw)
To: linux-arm-kernel
The SMSC9112 ethernet controller is connected to chip select 2
on the EBI2 bus on the APQ8060 Dragonboard. We set this up by
activating EBI2, creating a chipselect entry as a subnode, and then
putting the ethernet controller in a subnode of the chipselect.
After the chipselect is configured, the SMSC device will be
instantiated.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v3->v4:
- Rebase on kernel v4.9-rc1
- Bindings and driver are merged so should be clear to apply.
ChangeLog v2->v3:
- Name chipselected device to ethernet-ebi2 at 2,0
- Update to the latest (v5) version of the bindings and what
the EBI2 driver expects.
- The SMSC911x bindings were ACKed by Arnd Bergmann and are merged
to the netdev tree by David Miller.
- The EBI2 bindings were ACKed by Rob Herring and a pull request
for both bindings and driver is pending for ARM SoC.
- This should be safe to merge for v4.9.
ChangeLog v1->v2:
- Use the new bindings with the first address cell indicating
the chipselect
- Use offset zero into the range in the EBI2 node (the range
defines the base address of the chipselect)
- Move all the XMEM setup to arrays in the EBI2 node
---
arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 124 +++++++++++++++++++++++++
1 file changed, 124 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
index 6c0038398ef2..7848e4c8bdb9 100644
--- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
@@ -51,6 +51,29 @@
regulator-boot-on;
};
+ /* GPIO controlled ethernet power regulator */
+ dragon_veth: xc622a331mrg {
+ compatible = "regulator-fixed";
+ regulator-name = "XC6222A331MR-G";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vph>;
+ gpio = <&pm8058_gpio 40 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&dragon_veth_gpios>;
+ regulator-always-on;
+ };
+
+ /* VDDvario fixed regulator */
+ dragon_vario: nds332p {
+ compatible = "regulator-fixed";
+ regulator-name = "NDS332P";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&pm8058_s3>;
+ };
+
/* This is a levelshifter for SDCC5 */
dragon_vio_txb: txb0104rgyr {
compatible = "regulator-fixed";
@@ -167,6 +190,41 @@
bias-pull-up;
};
};
+
+ dragon_ebi2_pins: ebi2 {
+ /*
+ * Pins used by EBI2 on the Dragonboard, actually only
+ * only CS2 is used by a real peripheral. CS0 is just
+ * routed to a test point.
+ */
+ mux0 {
+ /*
+ * Pins used by EBI2 on the Dragonboard, actually only
+ * only CS2 is used by a real peripheral. CS0 is just
+ * routed to a test point.
+ */
+ pins =
+ /* "gpio39", CS1A_N this is not good to mux */
+ "gpio40", /* CS2A_N */
+ "gpio134"; /* CS0_N testpoint TP29 */
+ function = "ebi2cs";
+ };
+ mux1 {
+ pins =
+ /* EBI2_ADDR_7 downto EBI2_ADDR_0 address bus */
+ "gpio123", "gpio124", "gpio125", "gpio126",
+ "gpio127", "gpio128", "gpio129", "gpio130",
+ /* EBI2_DATA_15 downto EBI2_DATA_0 data bus */
+ "gpio135", "gpio136", "gpio137", "gpio138",
+ "gpio139", "gpio140", "gpio141", "gpio142",
+ "gpio143", "gpio144", "gpio145", "gpio146",
+ "gpio147", "gpio148", "gpio149", "gpio150",
+ "gpio151", /* EBI2_OE_N */
+ "gpio153", /* EBI2_ADV */
+ "gpio157"; /* EBI2_WE_N */
+ function = "ebi2";
+ };
+ };
};
qcom,ssbi at 500000 {
@@ -201,6 +259,15 @@
};
gpio at 150 {
+ dragon_ethernet_gpios: ethernet-gpios {
+ pinconf {
+ pins = "gpio7";
+ function = "normal";
+ input-enable;
+ bias-disable;
+ power-source = <PM8058_GPIO_S3>;
+ };
+ };
dragon_bmp085_gpios: bmp085-gpios {
pinconf {
pins = "gpio16";
@@ -238,6 +305,14 @@
power-source = <PM8058_GPIO_S3>;
};
};
+ dragon_veth_gpios: veth-gpios {
+ pinconf {
+ pins = "gpio40";
+ function = "normal";
+ bias-disable;
+ drive-push-pull;
+ };
+ };
};
led at 48 {
@@ -322,6 +397,55 @@
};
};
+ ebi2 at 1a100000 {
+ /* The EBI2 will instantiate first, then populate its children */
+ status = "ok";
+ pinctrl-names = "default";
+ pinctrl-0 = <&dragon_ebi2_pins>;
+
+ /*
+ * An on-board SMSC LAN9221 chip for "debug ethernet",
+ * which is actually just an ordinary ethernet on the
+ * EBI2. This has a 25MHz chrystal next to it, so no
+ * clocking is needed.
+ */
+ ethernet-ebi2 at 2,0 {
+ compatible = "smsc,lan9221", "smsc,lan9115";
+ reg = <2 0x0 0x100>;
+ /*
+ * GPIO7 has interrupt 198 on the PM8058
+ * The second interrupt is the PME interrupt
+ * for network wakeup, connected to the TLMM.
+ */
+ interrupts-extended = <&pmicintc 198 IRQ_TYPE_EDGE_FALLING>,
+ <&tlmm 29 IRQ_TYPE_EDGE_RISING>;
+ reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
+ vdd33a-supply = <&dragon_veth>;
+ vddvario-supply = <&dragon_vario>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&dragon_ethernet_gpios>;
+ phy-mode = "mii";
+ reg-io-width = <2>;
+ smsc,force-external-phy;
+ /* IRQ on edge falling = active low */
+ smsc,irq-active-low;
+ smsc,irq-push-pull;
+
+ /*
+ * SLOW chipselect config
+ * Delay 9 cycles (140ns at 64MHz) between SMSC
+ * LAN9221 Ethernet controller reads and writes
+ * on CS2.
+ */
+ qcom,xmem-recovery-cycles = <0>;
+ qcom,xmem-write-hold-cycles = <3>;
+ qcom,xmem-write-delta-cycles = <31>;
+ qcom,xmem-read-delta-cycles = <28>;
+ qcom,xmem-write-wait-cycles = <9>;
+ qcom,xmem-read-wait-cycles = <9>;
+ };
+ };
+
rpm at 104000 {
/*
* Set up of the PMIC RPM regulators for this board
--
2.7.4
^ permalink raw reply related
* [PATCH 1/2] ARM: dts: add EBI2 to the Qualcomm MSM8660 DTSI
From: Linus Walleij @ 2016-10-18 7:25 UTC (permalink / raw)
To: linux-arm-kernel
This adds the external bus interface EBI2 to the MSM8660 device
tree, albeit with status = "disabled" so that devices actually
using EBI2 can turn it on if needed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v3->v4:
- Rebase on kernel v4.9-rc1
- Bindings and driver are merged so should be clear to apply.
ChangeLog v2->v3:
- Use the new #address-cells = <2> for indicating the CS in the
first address cell
- Use the ranges property properly for defining the six different
CS address windows
- Define CS3 to properly map over 128MB
- The EBI2 bindings are now ACKed by Rob Herring and a pull request
to ARM SoC for both binding and driver is pending.
- This should be safe to merge for v4.9
---
arch/arm/boot/dts/qcom-msm8660.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 8c65e0d82559..0b6348544598 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -141,6 +141,23 @@
};
};
+ ebi2 at 1a100000 {
+ compatible = "qcom,msm8660-ebi2";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x1a800000 0x00800000>,
+ <1 0x0 0x1b000000 0x00800000>,
+ <2 0x0 0x1b800000 0x00800000>,
+ <3 0x0 0x1d000000 0x08000000>,
+ <4 0x0 0x1c800000 0x00800000>,
+ <5 0x0 0x1c000000 0x00800000>;
+ reg = <0x1a100000 0x1000>, <0x1a110000 0x1000>;
+ reg-names = "ebi2", "xmem";
+ clocks = <&gcc EBI2_2X_CLK>, <&gcc EBI2_CLK>;
+ clock-names = "ebi2x", "ebi2";
+ status = "disabled";
+ };
+
qcom,ssbi at 500000 {
compatible = "qcom,ssbi";
reg = <0x500000 0x1000>;
--
2.7.4
^ permalink raw reply related
* [PATCH] pinctrl: st: don't specify default interrupt trigger
From: patrice.chotard at st.com @ 2016-10-18 7:16 UTC (permalink / raw)
To: linux-arm-kernel
From: Patrice Chotard <patrice.chotard@st.com>
Thanks to 332e99d5ae4 which now alerts of default
trigger usage when configuring interrupts.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
drivers/pinctrl/pinctrl-st.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c
index 99da4cf..b7bb371 100644
--- a/drivers/pinctrl/pinctrl-st.c
+++ b/drivers/pinctrl/pinctrl-st.c
@@ -1512,7 +1512,7 @@ static int st_gpiolib_register_bank(struct st_pinctrl *info,
if (info->irqmux_base || gpio_irq > 0) {
err = gpiochip_irqchip_add(&bank->gpio_chip, &st_gpio_irqchip,
0, handle_simple_irq,
- IRQ_TYPE_LEVEL_LOW);
+ IRQ_TYPE_NONE);
if (err) {
gpiochip_remove(&bank->gpio_chip);
dev_info(dev, "could not add irqchip\n");
--
1.9.1
^ permalink raw reply related
* [PATCH] ARM: pxa: fix pxa25x interrupt init
From: Robert Jarzmik @ 2016-10-18 6:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474874511-26617-1-git-send-email-robert.jarzmik@free.fr>
Robert Jarzmik <robert.jarzmik@free.fr> writes:
> In the device-tree case, the root interrupt controller cannot be
> accessed through the 6th coprocessor, contrary to pxa27x and pxa3xx
> architectures.
>
> Fix it to behave as in non-devicetree builds.
>
> Fixes: 32f17997c130 ("ARM: pxa: remove irq init from dt machines")
> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Applied to pxa/fixes.
--
Robert
^ permalink raw reply
* [PATCH] Revert "dmaengine: pxa_dma: add support for legacy transition"
From: Robert Jarzmik @ 2016-10-18 6:46 UTC (permalink / raw)
To: linux-arm-kernel
This reverts commit c91134d9194478144ba579ca6efeddf628055650.
The conversion of the pxa architecture is now finished for all
drivers, so this functions has fullfilled its purpose and can
now be removed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
drivers/dma/pxa_dma.c | 28 ----------------------------
1 file changed, 28 deletions(-)
diff --git a/drivers/dma/pxa_dma.c b/drivers/dma/pxa_dma.c
index 3f56f9ca4482..b53fb618bbf6 100644
--- a/drivers/dma/pxa_dma.c
+++ b/drivers/dma/pxa_dma.c
@@ -413,15 +413,6 @@ static inline void pxad_init_debugfs(struct pxad_device *pdev) {}
static inline void pxad_cleanup_debugfs(struct pxad_device *pdev) {}
#endif
-/*
- * In the transition phase where legacy pxa handling is done at the same time as
- * mmp_dma, the DMA physical channel split between the 2 DMA providers is done
- * through legacy_reserved. Legacy code reserves DMA channels by settings
- * corresponding bits in legacy_reserved.
- */
-static u32 legacy_reserved;
-static u32 legacy_unavailable;
-
static struct pxad_phy *lookup_phy(struct pxad_chan *pchan)
{
int prio, i;
@@ -442,14 +433,10 @@ static struct pxad_phy *lookup_phy(struct pxad_chan *pchan)
for (i = 0; i < pdev->nr_chans; i++) {
if (prio != (i & 0xf) >> 2)
continue;
- if ((i < 32) && (legacy_reserved & BIT(i)))
- continue;
phy = &pdev->phys[i];
if (!phy->vchan) {
phy->vchan = pchan;
found = phy;
- if (i < 32)
- legacy_unavailable |= BIT(i);
goto out_unlock;
}
}
@@ -469,7 +456,6 @@ static void pxad_free_phy(struct pxad_chan *chan)
struct pxad_device *pdev = to_pxad_dev(chan->vc.chan.device);
unsigned long flags;
u32 reg;
- int i;
dev_dbg(&chan->vc.chan.dev->device,
"%s(): freeing\n", __func__);
@@ -483,9 +469,6 @@ static void pxad_free_phy(struct pxad_chan *chan)
}
spin_lock_irqsave(&pdev->phy_lock, flags);
- for (i = 0; i < 32; i++)
- if (chan->phy == &pdev->phys[i])
- legacy_unavailable &= ~BIT(i);
chan->phy->vchan = NULL;
chan->phy = NULL;
spin_unlock_irqrestore(&pdev->phy_lock, flags);
@@ -739,8 +722,6 @@ static irqreturn_t pxad_int_handler(int irq, void *dev_id)
i = __ffs(dint);
dint &= (dint - 1);
phy = &pdev->phys[i];
- if ((i < 32) && (legacy_reserved & BIT(i)))
- continue;
if (pxad_chan_handler(irq, phy) == IRQ_HANDLED)
ret = IRQ_HANDLED;
}
@@ -1522,15 +1503,6 @@ bool pxad_filter_fn(struct dma_chan *chan, void *param)
}
EXPORT_SYMBOL_GPL(pxad_filter_fn);
-int pxad_toggle_reserved_channel(int legacy_channel)
-{
- if (legacy_unavailable & (BIT(legacy_channel)))
- return -EBUSY;
- legacy_reserved ^= BIT(legacy_channel);
- return 0;
-}
-EXPORT_SYMBOL_GPL(pxad_toggle_reserved_channel);
-
module_platform_driver(pxad_driver);
MODULE_DESCRIPTION("Marvell PXA Peripheral DMA Driver");
--
2.1.4
^ permalink raw reply related
* [PATCH 2/5] staging/vchi: Fix build warnings when formatting pointers on aarch64.
From: Greg Kroah-Hartman @ 2016-10-18 6:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87d1iyr1g3.fsf@eliezer.anholt.net>
On Mon, Oct 17, 2016 at 04:38:20PM -0700, Eric Anholt wrote:
> Greg Kroah-Hartman <gregkh@linuxfoundation.org> writes:
>
> > On Mon, Oct 17, 2016 at 12:44:03PM -0700, Eric Anholt wrote:
> >> The code was generally using "%x" to print and "(unsigned int)" to
> >> cast the pointers, but we have %p for printing pointers in the same
> >> format without any broken casts.
> >
> > I already did this work, it's all checked into my tree, and is in
> > linux-next now. You were cc:ed on the patches as well.
>
> I actually haven't seen any of those messages about the patches. It
> looks like it's actually that notmuch is still failing to parse some
> mails (they apparently disagree with postfix on how maildir files should
> be formatted, so they just drop some mail on the floor).
>
> I did check the staging-testing branch before I started, since that's
> where things were last I knew, and didn't know it had moved to -next.
But staging-testing has those fixes in it (it gets pulled into -next).
So I don't see how we got out of sync here...
thanks,
greg k-h
^ permalink raw reply
* [PATCH v26 0/7] arm64: add kdump support
From: AKASHI Takahiro @ 2016-10-18 6:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3400bddc-9c6e-b69a-b57d-62921197bef9@cisco.com>
Ruslan,
On Mon, Oct 17, 2016 at 06:41:01PM +0300, Ruslan Bilovol wrote:
> Hi,
>
> On 09/07/2016 07:29 AM, AKASHI Takahiro wrote:
> > v26-specific note: After a comment from Rob[0], an idea of adding
> > "linux,usable-memory-range" was dropped. Instead, an existing
> > "reserved-memory" node will be used to limit usable memory ranges
> > on crash dump kernel.
> > This works not only on UEFI/ACPI systems but also on DT-only systems,
> > but if he really insists on using DT-specific "usable-memory" property,
> > I will post additional patches for kexec-tools. Those would be
> > redundant, though.
> > Even in that case, the kernel will not have to be changed.
> >
> >This patch series adds kdump support on arm64.
> >There are some prerequisite patches [1],[2].
> >
> >To load a crash-dump kernel to the systems, a series of patches to
> >kexec-tools, which have not yet been merged upstream, are needed.
> >Please always use my latest kdump patches, v3 [3].
> >
> >To examine vmcore (/proc/vmcore) on a crash-dump kernel, you can use
> > - crash utility (coming v7.1.6 or later) [4]
> > (Necessary patches have already been queued in the master.)
> >
> >
> >[0] http://lists.infradead.org/pipermail/linux-arm-kernel/2016-August/452582.html
> >[1] "arm64: mark reserved memblock regions explicitly in iomem"
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2016-August/450433.html
> >[2] "efi: arm64: treat regions with WT/WC set but WB cleared as memory"
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2016-August/451491.html
> >[3] T.B.D.
> >[4] https://github.com/crash-utility/crash.git
>
> Are you going to rebase your patch series onto v4.9-rc1 tag soon? I see
Yes, definitely as soon as possible! (actually I've done it.)
But before submitting a new version, I need to convince Rob (Herring)
that he would accept my old approach (v25) regarding specifying usable
memory for crash dump kernel:
http://lists.infradead.org/pipermail/linux-arm-kernel/2016-September/459379.html
> that patches [1] and [2] are already in v4.9-rc1, but when tried to apply
> this series, I've got conflict on first patch of the series ("arm64: kdump:
> reserve memory for crash dump kernel"). I want to try arm64 kdump
> patches again on my board, so I'm interested in this. The question is
> whether I need to rebase it myself or you will do the same (and address
> comments) soon.
Thank you for your interests and sorry for any inconvenience.
-Takahiro AKASHI
> Also I see Geoff published v6 of arm64 kexec-tools patches, so same
> question is applicable to "(kexec-tools) arm64: add kdump support"
> patch series.
>
> Thanks,
> Ruslan
>
^ permalink raw reply
* [RESEND][PATCH] [media] atmel-isc: start dma in some scenario
From: Songjun Wu @ 2016-10-18 6:12 UTC (permalink / raw)
To: linux-arm-kernel
If a new vb buf is added to vb queue, the queue is
empty and steaming, dma should be started.
Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
---
drivers/media/platform/atmel/atmel-isc.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/atmel/atmel-isc.c b/drivers/media/platform/atmel/atmel-isc.c
index ccfe13b..ff403d5 100644
--- a/drivers/media/platform/atmel/atmel-isc.c
+++ b/drivers/media/platform/atmel/atmel-isc.c
@@ -617,7 +617,14 @@ static void isc_buffer_queue(struct vb2_buffer *vb)
unsigned long flags;
spin_lock_irqsave(&isc->dma_queue_lock, flags);
- list_add_tail(&buf->list, &isc->dma_queue);
+ if (!isc->cur_frm && list_empty(&isc->dma_queue) &&
+ vb2_is_streaming(vb->vb2_queue)) {
+ isc->cur_frm = buf;
+ isc_start_dma(isc->regmap, isc->cur_frm,
+ isc->current_fmt->reg_dctrl_dview);
+ } else {
+ list_add_tail(&buf->list, &isc->dma_queue);
+ }
spin_unlock_irqrestore(&isc->dma_queue_lock, flags);
}
--
2.7.4
^ permalink raw reply related
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