* [PATCH 7/8] ARM: gr8: Add UART3 pins
From: Chen-Yu Tsai @ 2016-10-20 14:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cc81030de43c26dfc15ad9a9e525188ad8fb8ec9.1476951078.git-series.maxime.ripard@free-electrons.com>
On Thu, Oct 20, 2016 at 4:12 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The UART3 pins were missing from the DTSI. Add them.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v2] drivers: psci: PSCI checker module
From: Sudeep Holla @ 2016-10-20 14:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <613e4387-0ed5-ad58-7b74-a31b648f81e7@arm.com>
On 20/10/16 14:38, Kevin Brodsky wrote:
[...]
>
> Thanks for the heads-up! I'll rebase on 4.9-rc1 and see what needs to be
> done.
>
Just be aware that v4.9-rc1 doesn't have commit 9cfb38a7ba5a
("sched/fair: Fix sched domains NULL dereference in
select_idle_sibling()") which fixes the cpuhotplug issue you would
observe.
--
Regards,
Sudeep
^ permalink raw reply
* [PATCH 8/8] ARM: gr8: Add CHIP Pro support
From: Chen-Yu Tsai @ 2016-10-20 14:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d3f91b731f944fe0e23b4532f6e83a1c2fc345f0.1476951078.git-series.maxime.ripard@free-electrons.com>
On Thu, Oct 20, 2016 at 4:12 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The CHIP Pro is a small embeddable board. It features a GR8, an AXP209
> PMIC, a 512MB SLC NAND and a WiFi/BT chip.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [GIT PULL] STi DT update for v4.10 round 1
From: Patrice Chotard @ 2016-10-20 14:27 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Kevin, Olof
PLease consider this first round of STi dts update for v4.10 :
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti.git
for you to fetch changes up to 97a0b97f9e8197429eee5f87ce14373f73dbd9d3:
ARM: dts: stih410-clocks: Add PROC_STFE as a critical clock (2016-10-20 16:20:26 +0200)
----------------------------------------------------------------
STi dts update:
Remove deprecated STiH415/416 DTS files
Add DT part associated to following ASoC patchset:
http://www.spinics.net/lists/alsa-devel/msg54782.html
Enable hdmi audio card on b2120 board
Clean STi sound card field for STiH407 family socs
Add PROC_STFE as a critical clock for STiH410
----------------------------------------------------------------
Arnaud Pouliquen (5):
ARM: dts: STiH407-family: sti sound card field cleaning
ARM: dts: STiH407: Add label for sti-hdmi node
ARM: dts: STiH410: Add label for sti-hdmi node
ARM: dts: STiHxxx-b2120: Add support of HDMI audio
ARM: dts: STiH410-B2260: clean unnecessary hdmi node overlay
Patrice Chotard (15):
ARM: dts: remove STiH416-b2020e.dts
ARM: dts: remove STiH416-b2020.dts
ARM: dts: remove STiH416-b2000.dts
ARM: dts: remove STiH416-clock.dtsi
ARM: dts: remove STiH416-pinctrl.dtsi
ARM: dts: remove STiH415-b2020.dts
ARM: dts: remove STiH415-b2000.dts
ARM: dts: remove STiH415-clock.dtsi
ARM: dts: remove STiH415-pinctrl.dtsi
ARM: dts: remove STiH415.dtsi
ARM: dts: remove STiH416.dtsi
ARM: dts: remove STiH41x.dtsi
ARM: dts: remove STiH41x-b2020.dtsi
ARM: dts: remove STiH41x-b2000.dtsi
ARM: dts: remove STiH41x-b2020.dtsi
Peter Griffin (7):
MAINTAINERS: Remove phy-miphy365x.c entry from STi arch
MAINTAINERS: Remove phy-stih41x-usb.c entry from STi arch
ahci: st: Remove STiH416 dt example
thermal: sti: Remove obsolete platforms from the DT doc.
reset: sti: Remove obsolete platforms from dt binding doc.
reset: sti: softreset: Remove obsolete platforms from dt binding doc.
ARM: dts: stih410-clocks: Add PROC_STFE as a critical clock
Documentation/devicetree/bindings/ata/ahci-st.txt | 15 -
.../devicetree/bindings/reset/st,sti-powerdown.txt | 12 +-
.../devicetree/bindings/reset/st,sti-softreset.txt | 8 +-
.../devicetree/bindings/thermal/st-thermal.txt | 28 +-
MAINTAINERS | 2 -
arch/arm/boot/dts/Makefile | 5 -
arch/arm/boot/dts/stih407-family.dtsi | 32 +-
arch/arm/boot/dts/stih407.dtsi | 2 +-
arch/arm/boot/dts/stih410-b2260.dts | 6 -
arch/arm/boot/dts/stih410-clock.dtsi | 3 +-
arch/arm/boot/dts/stih410.dtsi | 2 +-
arch/arm/boot/dts/stih415-b2000.dts | 15 -
arch/arm/boot/dts/stih415-b2020.dts | 15 -
arch/arm/boot/dts/stih415-clock.dtsi | 533 ---------------
arch/arm/boot/dts/stih415-pinctrl.dtsi | 545 ---------------
arch/arm/boot/dts/stih415.dtsi | 234 -------
arch/arm/boot/dts/stih416-b2000.dts | 15 -
arch/arm/boot/dts/stih416-b2020.dts | 37 -
arch/arm/boot/dts/stih416-b2020e.dts | 65 --
arch/arm/boot/dts/stih416-clock.dtsi | 756 ---------------------
arch/arm/boot/dts/stih416-pinctrl.dtsi | 692 -------------------
arch/arm/boot/dts/stih416.dtsi | 517 --------------
arch/arm/boot/dts/stih41x-b2000.dtsi | 96 ---
arch/arm/boot/dts/stih41x-b2020.dtsi | 82 ---
arch/arm/boot/dts/stih41x-b2020x.dtsi | 32 -
arch/arm/boot/dts/stih41x.dtsi | 47 --
arch/arm/boot/dts/stihxxx-b2120.dtsi | 19 +-
27 files changed, 45 insertions(+), 3770 deletions(-)
delete mode 100644 arch/arm/boot/dts/stih415-b2000.dts
delete mode 100644 arch/arm/boot/dts/stih415-b2020.dts
delete mode 100644 arch/arm/boot/dts/stih415-clock.dtsi
delete mode 100644 arch/arm/boot/dts/stih415-pinctrl.dtsi
delete mode 100644 arch/arm/boot/dts/stih415.dtsi
delete mode 100644 arch/arm/boot/dts/stih416-b2000.dts
delete mode 100644 arch/arm/boot/dts/stih416-b2020.dts
delete mode 100644 arch/arm/boot/dts/stih416-b2020e.dts
delete mode 100644 arch/arm/boot/dts/stih416-clock.dtsi
delete mode 100644 arch/arm/boot/dts/stih416-pinctrl.dtsi
delete mode 100644 arch/arm/boot/dts/stih416.dtsi
delete mode 100644 arch/arm/boot/dts/stih41x-b2000.dtsi
delete mode 100644 arch/arm/boot/dts/stih41x-b2020.dtsi
delete mode 100644 arch/arm/boot/dts/stih41x-b2020x.dtsi
delete mode 100644 arch/arm/boot/dts/stih41x.dtsi
^ permalink raw reply
* [linux-sunxi] [PATCH v4 1/9] clk: sunxi-ng: Rename the internal structures
From: Chen-Yu Tsai @ 2016-10-20 14:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <28e6628786497633eea8cd8522d89284414a7c4c.1476196031.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Rename the structures meant to be embedded in other structures to make it
> consistent with the mux structure name
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v4 2/9] clk: sunxi-ng: Remove the use of rational computations
From: Chen-Yu Tsai @ 2016-10-20 14:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50a2c9fe665c794dc97f524cacb63dc83d3efaa2.1476196031.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> While the rational library works great, it doesn't really allow us to add
> more constraints, like the minimum.
>
> Remove that in order to be able to deal with the constraints we'll need.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> drivers/clk/sunxi-ng/Kconfig | 3 +--
> drivers/clk/sunxi-ng/ccu_nkm.c | 31 +++++++++-----------
> drivers/clk/sunxi-ng/ccu_nkmp.c | 45 +++++++++++++---------------
> drivers/clk/sunxi-ng/ccu_nm.c | 54 +++++++++++++++++++++++++---------
> 4 files changed, 78 insertions(+), 55 deletions(-)
>
[...]
> diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.c b/drivers/clk/sunxi-ng/ccu_nkmp.c
> index 9769dee99511..4b457d8cce11 100644
> --- a/drivers/clk/sunxi-ng/ccu_nkmp.c
> +++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
> @@ -9,16 +9,15 @@
> */
>
> #include <linux/clk-provider.h>
> -#include <linux/rational.h>
>
> #include "ccu_gate.h"
> #include "ccu_nkmp.h"
>
> struct _ccu_nkmp {
> - unsigned long n, max_n;
> - unsigned long k, max_k;
> - unsigned long m, max_m;
> - unsigned long p, max_p;
> + unsigned long n, min_n, max_n;
> + unsigned long k, min_k, max_k;
> + unsigned long m, min_m, max_m;
> + unsigned long p, min_p, max_p;
Wrong patch? Otherwise,
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v14 0/9] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer
From: Mark Rutland @ 2016-10-20 14:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475086637-1914-1-git-send-email-fu.wei@linaro.org>
Hi,
On Thu, Sep 29, 2016 at 02:17:08AM +0800, fu.wei at linaro.org wrote:
> From: Fu Wei <fu.wei@linaro.org>
> This patchset depends on the following patchset:
> [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support
> https://lkml.org/lkml/2016/9/12/949
Is there a branch with these anywhere? I wasn't Cc'd on those and it's
rather difficult to get at the series from an LKML link.
Thanks,
Mark.
^ permalink raw reply
* [PATCH] arm64/kprobes: Tidy up sign-extension usage
From: Will Deacon @ 2016-10-20 14:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <f25b75bf250827113d4269614ba7936e870b0646.1476794661.git.robin.murphy@arm.com>
On Tue, Oct 18, 2016 at 01:46:27PM +0100, Robin Murphy wrote:
> Kprobes does not need its own homebrewed (and frankly inscrutable) sign
> extension macro; just use the standard kernel functions instead. Since
> the compiler actually recognises the sign-extension idiom of the latter,
> we also get the small bonus of some nicer codegen, as each displacement
> calculation helper then compiles to a single optimal SBFX instruction.
>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
> arch/arm64/kernel/probes/simulate-insn.c | 16 +++++++---------
> 1 file changed, 7 insertions(+), 9 deletions(-)
Acked-by: Will Deacon <will.deacon@arm.com>
Will
^ permalink raw reply
* [PATCH v4 3/9] clk: sunxi-ng: Finish to convert to structures for arguments
From: Chen-Yu Tsai @ 2016-10-20 14:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <67333887b86b7fd838dd9d6523dc7e3d9a9ddeb4.1476196031.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Some clocks still use an explicit list of arguments, which make it a bit
> more tedious to add new parameters.
>
> Convert those over to a structure pointer argument to add as many
> arguments as possible without having to many noise in our patches, or a
> very long list of arguments.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v14 1/9] clocksource/drivers/arm_arch_timer: Move enums and defines to header file
From: Mark Rutland @ 2016-10-20 14:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475086637-1914-2-git-send-email-fu.wei@linaro.org>
Hi,
On Thu, Sep 29, 2016 at 02:17:09AM +0800, fu.wei at linaro.org wrote:
> diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
> index caedb74..6f06481 100644
> --- a/include/clocksource/arm_arch_timer.h
> +++ b/include/clocksource/arm_arch_timer.h
> @@ -19,6 +19,9 @@
Please add:
#include <linux/bitops.h>
... immediately before the includes below; it's needed to ensure that
BIT() is defined in all cases. Previously we were relying on implicit
header includes, which is not good practice.
> #include <linux/timecounter.h>
> #include <linux/types.h>
>
> +#define ARCH_CP15_TIMER BIT(0)
> +#define ARCH_MEM_TIMER BIT(1)
If we're going to expose these in a header, it would be better to rename
them to something that makes their usage/meaning clear. These should
probably be ARCH_TIMER_TYPE_{CP15,MEM}.
I guess this can wait for subsequent cleanup.
> +enum ppi_nr {
> + PHYS_SECURE_PPI,
> + PHYS_NONSECURE_PPI,
> + VIRT_PPI,
> + HYP_PPI,
> + MAX_TIMER_PPI
> +};
Please rename this to arch_timer_ppi_nr (updating the single user in
drivers/clocksource/arm_arch_timer.c). That'll avoid the potential for
name clashes in files this happens to get included in (potentially
transitively via other headers).
With those changes (regardless of the ARCH_TIMER_TYPE_* bits):
Acked-by: Mark Rutland <mark.rutland@arm.com>
Thanks,
Mark.
> +
> #define ARCH_TIMER_PHYS_ACCESS 0
> #define ARCH_TIMER_VIRT_ACCESS 1
> #define ARCH_TIMER_MEM_PHYS_ACCESS 2
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH v3] drivers: psci: PSCI checker module
From: Kevin Brodsky @ 2016-10-20 14:51 UTC (permalink / raw)
To: linux-arm-kernel
On arm and arm64, PSCI is one of the possible firmware interfaces
used for power management. This includes both turning CPUs on and off,
and suspending them (entering idle states).
This patch adds a PSCI checker module that enables basic testing of
PSCI operations during startup. There are two main tests: CPU
hotplugging and suspending.
In the hotplug tests, the hotplug API is used to turn off and on again
all CPUs in the system, and then all CPUs in each cluster, checking
the consistency of the return codes.
In the suspend tests, a high-priority thread is created on each core
and uses low-level cpuidle functionalities to enter suspend, in all
the possible states and multiple times. This should allow a maximum
number of CPUs to enter the same sleep state at the same or slightly
different time.
In essence, the suspend tests use a principle similar to that of the
intel_powerclamp driver (drivers/thermal/intel_powerclamp.c), but the
threads are only kept for the duration of the test (they are already
gone when userspace is started).
While in theory power management PSCI functions (CPU_{ON,OFF,SUSPEND})
could be directly called, this proved too difficult as it would imply
the duplication of all the logic used by the kernel to allow for a
clean shutdown/bringup/suspend of the CPU (the deepest sleep states
implying potentially the shutdown of the CPU).
Note that this file cannot be compiled as a loadable module, since it
uses a number of non-exported identifiers (essentially for
PSCI-specific checks and direct use of cpuidle) and relies on the
absence of userspace to avoid races when calling hotplug and cpuidle
functions.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com>
---
Changelog v2..v3:
* Rebase on 4.9-rc1. a65d40961dc7 ("kthread/smpboot: do not park in
kthread_create_on_cpu()") modified the behavior of
kthread_create_on_cpu(), so that the created kthread is not parked
anymore. Using wake_up_process() instead of kthread_unpark() should
work. Thanks Jean-Philippe Brucker for reporting the issue!
* s/suspend_stress/suspend_test/, this is not really a stress test.
Cheers,
Kevin
drivers/firmware/Kconfig | 7 +
drivers/firmware/Makefile | 1 +
drivers/firmware/psci_checker.c | 487 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 495 insertions(+)
create mode 100644 drivers/firmware/psci_checker.c
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index bca172d42c74..904dd4942993 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig
@@ -206,6 +206,13 @@ config QCOM_SCM_64
config HAVE_ARM_SMCCC
bool
+config PSCI_CHECKER
+ bool "PSCI checker"
+ depends on ARM_PSCI_FW && HOTPLUG_CPU
+ help
+ Run the PSCI checker during startup. This checks that hotplug and
+ suspend operations work correctly when using PSCI.
+
source "drivers/firmware/broadcom/Kconfig"
source "drivers/firmware/google/Kconfig"
source "drivers/firmware/efi/Kconfig"
diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
index 898ac41fa8b3..e7248eacc796 100644
--- a/drivers/firmware/Makefile
+++ b/drivers/firmware/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_QCOM_SCM) += qcom_scm.o
obj-$(CONFIG_QCOM_SCM_64) += qcom_scm-64.o
obj-$(CONFIG_QCOM_SCM_32) += qcom_scm-32.o
CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch armv7-a\n.arch_extension sec,-DREQUIRES_SEC=1) -march=armv7-a
+obj-$(CONFIG_PSCI_CHECKER) += psci_checker.o
obj-y += broadcom/
obj-y += meson/
diff --git a/drivers/firmware/psci_checker.c b/drivers/firmware/psci_checker.c
new file mode 100644
index 000000000000..c1bf961d13ce
--- /dev/null
+++ b/drivers/firmware/psci_checker.c
@@ -0,0 +1,487 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Copyright (C) 2016 ARM Limited
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/atomic.h>
+#include <linux/completion.h>
+#include <linux/cpu.h>
+#include <linux/cpuidle.h>
+#include <linux/cpu_pm.h>
+#include <linux/kernel.h>
+#include <linux/kthread.h>
+#include <linux/module.h>
+#include <linux/preempt.h>
+#include <linux/psci.h>
+#include <linux/slab.h>
+#include <linux/tick.h>
+#include <linux/topology.h>
+
+#include <asm/cpuidle.h>
+
+#include <uapi/linux/psci.h>
+
+#define NUM_SUSPEND_CYCLE (10)
+
+static unsigned int nb_available_cpus;
+static int tos_resident_cpu = -1;
+
+static atomic_t nb_active_threads;
+static struct completion suspend_threads_started =
+ COMPLETION_INITIALIZER(suspend_threads_started);
+static struct completion suspend_threads_done =
+ COMPLETION_INITIALIZER(suspend_threads_done);
+
+/*
+ * We assume that PSCI operations are used if they are available. This is not
+ * necessarily true on arm64, since the decision is based on the
+ * "enable-method" property of each CPU in the DT, but given that there is no
+ * arch-specific way to check this, we assume that the DT is sensible.
+ */
+static int psci_ops_check(void)
+{
+ int migrate_type = -1;
+ int cpu;
+
+ if (!(psci_ops.cpu_off && psci_ops.cpu_on && psci_ops.cpu_suspend)) {
+ pr_warn("Missing PSCI operations, aborting tests\n");
+ return -EOPNOTSUPP;
+ }
+
+ if (psci_ops.migrate_info_type)
+ migrate_type = psci_ops.migrate_info_type();
+
+ if (migrate_type == PSCI_0_2_TOS_UP_MIGRATE ||
+ migrate_type == PSCI_0_2_TOS_UP_NO_MIGRATE) {
+ /* There is a UP Trusted OS, find on which core it resides. */
+ for_each_online_cpu(cpu)
+ if (psci_tos_resident_on(cpu)) {
+ tos_resident_cpu = cpu;
+ break;
+ }
+ if (tos_resident_cpu == -1)
+ pr_warn("UP Trusted OS resides on no online CPU\n");
+ }
+
+ return 0;
+}
+
+static int find_clusters(const struct cpumask *cpus,
+ const struct cpumask **clusters)
+{
+ unsigned int nb = 0;
+ cpumask_var_t tmp;
+
+ if (!alloc_cpumask_var(&tmp, GFP_KERNEL))
+ return -ENOMEM;
+ cpumask_copy(tmp, cpus);
+
+ while (!cpumask_empty(tmp)) {
+ const struct cpumask *cluster =
+ topology_core_cpumask(cpumask_any(tmp));
+
+ clusters[nb++] = cluster;
+ cpumask_andnot(tmp, tmp, cluster);
+ }
+
+ free_cpumask_var(tmp);
+ return nb;
+}
+
+/*
+ * offlined_cpus is a temporary array but passing it as an argument avoids
+ * multiple allocations.
+ */
+static unsigned int down_and_up_cpus(const struct cpumask *cpus,
+ struct cpumask *offlined_cpus)
+{
+ int cpu;
+ int err = 0;
+
+ cpumask_clear(offlined_cpus);
+
+ /* Try to power down all CPUs in the mask. */
+ for_each_cpu(cpu, cpus) {
+ int ret = cpu_down(cpu);
+
+ /*
+ * cpu_down() checks the number of online CPUs before the TOS
+ * resident CPU.
+ */
+ if (cpumask_weight(offlined_cpus) + 1 == nb_available_cpus) {
+ if (ret != -EBUSY) {
+ pr_err("Unexpected return code %d while trying "
+ "to power down last online CPU %d\n",
+ ret, cpu);
+ ++err;
+ }
+ } else if (cpu == tos_resident_cpu) {
+ if (ret != -EPERM) {
+ pr_err("Unexpected return code %d while trying "
+ "to power down TOS resident CPU %d\n",
+ ret, cpu);
+ ++err;
+ }
+ } else if (ret != 0) {
+ pr_err("Error occurred (%d) while trying "
+ "to power down CPU %d\n", ret, cpu);
+ ++err;
+ }
+
+ if (ret == 0)
+ cpumask_set_cpu(cpu, offlined_cpus);
+ }
+
+ /* Try to power up all the CPUs that have been offlined. */
+ for_each_cpu(cpu, offlined_cpus) {
+ int ret = cpu_up(cpu);
+
+ if (ret != 0) {
+ pr_err("Error occurred (%d) while trying "
+ "to power up CPU %d\n", ret, cpu);
+ ++err;
+ } else {
+ cpumask_clear_cpu(cpu, offlined_cpus);
+ }
+ }
+
+ /*
+ * Something went bad at some point and some CPUs could not be turned
+ * back on.
+ */
+ WARN_ON(!cpumask_empty(offlined_cpus) ||
+ num_online_cpus() != nb_available_cpus);
+
+ return err;
+}
+
+static int hotplug_tests(void)
+{
+ int err;
+ cpumask_var_t offlined_cpus;
+ int i, nb_cluster;
+ const struct cpumask **clusters;
+ char *page_buf;
+
+ err = -ENOMEM;
+ if (!alloc_cpumask_var(&offlined_cpus, GFP_KERNEL))
+ return err;
+ /* We may have up to nb_available_cpus clusters. */
+ clusters = kmalloc_array(nb_available_cpus, sizeof(*clusters),
+ GFP_KERNEL);
+ if (!clusters)
+ goto out_free_cpus;
+ page_buf = (char *)__get_free_page(GFP_KERNEL);
+ if (!page_buf)
+ goto out_free_clusters;
+
+ err = 0;
+ nb_cluster = find_clusters(cpu_online_mask, clusters);
+
+ /*
+ * Of course the last CPU cannot be powered down and cpu_down() should
+ * refuse doing that.
+ */
+ pr_info("Trying to turn off and on again all CPUs\n");
+ err += down_and_up_cpus(cpu_online_mask, offlined_cpus);
+
+ /*
+ * Take down CPUs by cluster this time. When the last CPU is turned
+ * off, the cluster itself should shut down.
+ */
+ for (i = 0; i < nb_cluster; ++i) {
+ int cluster_id =
+ topology_physical_package_id(cpumask_any(clusters[i]));
+ ssize_t len = cpumap_print_to_pagebuf(true, page_buf,
+ clusters[i]);
+ /* Remove trailing newline. */
+ page_buf[len - 1] = '\0';
+ pr_info("Trying to turn off and on again cluster %d "
+ "(CPUs %s)\n", cluster_id, page_buf);
+ err += down_and_up_cpus(clusters[i], offlined_cpus);
+ }
+
+ free_page((unsigned long)page_buf);
+out_free_clusters:
+ kfree(clusters);
+out_free_cpus:
+ free_cpumask_var(offlined_cpus);
+ return err;
+}
+
+static void dummy_callback(unsigned long ignored) {}
+
+static int suspend_cpu(int index, bool broadcast)
+{
+ int ret;
+
+ arch_cpu_idle_enter();
+
+ if (broadcast) {
+ /*
+ * The local timer will be shut down, we need to enter tick
+ * broadcast.
+ */
+ ret = tick_broadcast_enter();
+ if (ret) {
+ /*
+ * In the absence of hardware broadcast mechanism,
+ * this CPU might be used to broadcast wakeups, which
+ * may be why entering tick broadcast has failed.
+ * There is little the kernel can do to work around
+ * that, so enter WFI instead (idle state 0).
+ */
+ cpu_do_idle();
+ ret = 0;
+ goto out_arch_exit;
+ }
+ }
+
+ /*
+ * Replicate the common ARM cpuidle enter function
+ * (arm_enter_idle_state).
+ */
+ ret = CPU_PM_CPU_IDLE_ENTER(arm_cpuidle_suspend, index);
+
+ if (broadcast)
+ tick_broadcast_exit();
+
+out_arch_exit:
+ arch_cpu_idle_exit();
+
+ return ret;
+}
+
+static int suspend_test_thread(void *arg)
+{
+ int cpu = (long)arg;
+ int i, nb_suspend = 0, nb_shallow_sleep = 0, nb_err = 0;
+ struct sched_param sched_priority = { .sched_priority = MAX_RT_PRIO-1 };
+ struct cpuidle_device *dev;
+ struct cpuidle_driver *drv;
+ /* No need for an actual callback, we just want to wake up the CPU. */
+ struct timer_list wakeup_timer =
+ TIMER_INITIALIZER(dummy_callback, 0, 0);
+
+ /* Wait for the main thread to give the start signal. */
+ wait_for_completion(&suspend_threads_started);
+
+ /* Set maximum priority to preempt all other threads on this CPU. */
+ if (sched_setscheduler_nocheck(current, SCHED_FIFO, &sched_priority))
+ pr_warn("Failed to set suspend thread scheduler on CPU %d\n",
+ cpu);
+
+ dev = this_cpu_read(cpuidle_devices);
+ drv = cpuidle_get_cpu_driver(dev);
+
+ pr_info("CPU %d entering suspend cycles, states 1 through %d\n",
+ cpu, drv->state_count - 1);
+
+ for (i = 0; i < NUM_SUSPEND_CYCLE; ++i) {
+ int index;
+ /*
+ * Test all possible states, except 0 (which is usually WFI and
+ * doesn't use PSCI).
+ */
+ for (index = 1; index < drv->state_count; ++index) {
+ struct cpuidle_state *state = &drv->states[index];
+ bool broadcast = state->flags & CPUIDLE_FLAG_TIMER_STOP;
+ int ret;
+
+ /*
+ * Set the timer to wake this CPU up in some time (which
+ * should be largely sufficient for entering suspend).
+ * If the local tick is disabled when entering suspend,
+ * suspend_cpu() takes care of switching to a broadcast
+ * tick, so the timer will still wake us up.
+ */
+ mod_timer(&wakeup_timer, jiffies +
+ usecs_to_jiffies(state->target_residency));
+
+ /* IRQs must be disabled during suspend operations. */
+ local_irq_disable();
+
+ ret = suspend_cpu(index, broadcast);
+
+ /*
+ * We have woken up. Re-enable IRQs to handle any
+ * pending interrupt, do not wait until the end of the
+ * loop.
+ */
+ local_irq_enable();
+
+ if (ret == index) {
+ ++nb_suspend;
+ } else if (ret >= 0) {
+ /* We did not enter the expected state. */
+ ++nb_shallow_sleep;
+ } else {
+ pr_err("Failed to suspend CPU %d: error %d "
+ "(requested state %d, cycle %d)\n",
+ cpu, ret, index, i);
+ ++nb_err;
+ }
+ }
+ }
+
+ /*
+ * Disable the timer to make sure that the timer will not trigger
+ * later.
+ */
+ del_timer(&wakeup_timer);
+
+ if (atomic_dec_return_relaxed(&nb_active_threads) == 0)
+ complete(&suspend_threads_done);
+
+ /* Give up on RT scheduling and wait for termination. */
+ sched_priority.sched_priority = 0;
+ if (sched_setscheduler_nocheck(current, SCHED_NORMAL, &sched_priority))
+ pr_warn("Failed to set suspend thread scheduler on CPU %d\n",
+ cpu);
+ for (;;) {
+ /* Needs to be set first to avoid missing a wakeup. */
+ set_current_state(TASK_INTERRUPTIBLE);
+ if (kthread_should_stop()) {
+ __set_current_state(TASK_RUNNING);
+ break;
+ }
+ schedule();
+ }
+
+ pr_info("CPU %d suspend test results: success %d, shallow states %d, errors %d\n",
+ cpu, nb_suspend, nb_shallow_sleep, nb_err);
+
+ return nb_err;
+}
+
+static int suspend_tests(void)
+{
+ int i, cpu, err = 0;
+ struct task_struct **threads;
+ int nb_threads = 0;
+
+ threads = kmalloc_array(nb_available_cpus, sizeof(*threads),
+ GFP_KERNEL);
+ if (!threads)
+ return -ENOMEM;
+
+ for_each_online_cpu(cpu) {
+ struct task_struct *thread;
+ /* Check that cpuidle is available on that CPU. */
+ struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu);
+ struct cpuidle_driver *drv = cpuidle_get_cpu_driver(dev);
+
+ if (cpuidle_not_available(drv, dev)) {
+ pr_warn("cpuidle not available on CPU %d, ignoring\n",
+ cpu);
+ continue;
+ }
+
+ thread = kthread_create_on_cpu(suspend_test_thread,
+ (void *)(long)cpu, cpu,
+ "psci_suspend_test");
+ if (IS_ERR(thread))
+ pr_err("Failed to create kthread on CPU %d\n", cpu);
+ else
+ threads[nb_threads++] = thread;
+ }
+ if (nb_threads < 1) {
+ kfree(threads);
+ return -ENODEV;
+ }
+
+ atomic_set(&nb_active_threads, nb_threads);
+
+ /*
+ * Stop cpuidle to prevent the idle tasks from entering a deep sleep
+ * mode, as it might interfere with the suspend threads on other CPUs.
+ * This does not prevent the suspend threads from using cpuidle (only
+ * the idle tasks check this status).
+ */
+ cpuidle_pause();
+
+ /*
+ * Wake up the suspend threads. To avoid the main thread being preempted
+ * before all the threads have been unparked, the suspend threads will
+ * wait for the completion of suspend_threads_started.
+ */
+ for (i = 0; i < nb_threads; ++i)
+ wake_up_process(threads[i]);
+ complete_all(&suspend_threads_started);
+
+ wait_for_completion(&suspend_threads_done);
+
+ cpuidle_resume();
+
+ /* Stop and destroy all threads, get return status. */
+ for (i = 0; i < nb_threads; ++i)
+ err += kthread_stop(threads[i]);
+
+ kfree(threads);
+ return err;
+}
+
+static int __init psci_checker(void)
+{
+ int ret;
+
+ /*
+ * Since we're in an initcall, we assume that all the CPUs that all
+ * CPUs that can be onlined have been onlined.
+ *
+ * The tests assume that hotplug is enabled but nobody else is using it,
+ * otherwise the results will be unpredictable. However, since there
+ * is no userspace yet in initcalls, that should be fine.
+ */
+ nb_available_cpus = num_online_cpus();
+
+ /* Check PSCI operations are set up and working. */
+ ret = psci_ops_check();
+ if (ret)
+ return ret;
+
+ pr_info("PSCI checker started using %u CPUs\n", nb_available_cpus);
+
+ pr_info("Starting hotplug tests\n");
+ ret = hotplug_tests();
+ if (ret == 0)
+ pr_info("Hotplug tests passed OK\n");
+ else if (ret > 0)
+ pr_err("%d error(s) encountered in hotplug tests\n", ret);
+ else {
+ pr_err("Out of memory\n");
+ return ret;
+ }
+
+ pr_info("Starting suspend tests (%d cycles per state)\n",
+ NUM_SUSPEND_CYCLE);
+ ret = suspend_tests();
+ if (ret == 0)
+ pr_info("Suspend tests passed OK\n");
+ else if (ret > 0)
+ pr_err("%d error(s) encountered in suspend tests\n", ret);
+ else {
+ switch (ret) {
+ case -ENOMEM:
+ pr_err("Out of memory\n");
+ break;
+ case -ENODEV:
+ pr_warn("Could not start suspend tests on any CPU\n");
+ break;
+ }
+ }
+
+ pr_info("PSCI checker completed\n");
+ return ret < 0 ? ret : 0;
+}
+late_initcall(psci_checker);
--
2.10.0
^ permalink raw reply related
* [PATCH v14 0/9] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer
From: Lorenzo Pieralisi @ 2016-10-20 14:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020143101.GI10234@leverpostej>
On Thu, Oct 20, 2016 at 03:31:01PM +0100, Mark Rutland wrote:
> Hi,
>
> On Thu, Sep 29, 2016 at 02:17:08AM +0800, fu.wei at linaro.org wrote:
> > From: Fu Wei <fu.wei@linaro.org>
>
> > This patchset depends on the following patchset:
> > [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support
> > https://lkml.org/lkml/2016/9/12/949
>
> Is there a branch with these anywhere? I wasn't Cc'd on those and it's
> rather difficult to get at the series from an LKML link.
For the records, the dependency above has now been merged and it was
just a directory creation dependency (drivers/acpi/arm64, where some of
the code in this series will live). So basically this means that at
present this series is self-contained, probably it would have been
better to wait for -rc1 before posting it (so that dependencies were
settled) but anyway I think it can be reviewed as-is.
Thanks for having a look,
Lorenzo
^ permalink raw reply
* [PATCH v4 4/9] clk: sunxi-ng: Add minimums for all the relevant structures and clocks
From: Chen-Yu Tsai @ 2016-10-20 15:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a96b56fb7bda849e087b63a04ff76d1396c44d72.1476196031.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Modify the current clocks we have to be able to specify the minimum for
> each clocks we support, just like we support the max.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Including the bits from patch 2.
^ permalink raw reply
* [PATCH v4 5/9] clk: sunxi-ng: Implement minimum for multipliers
From: Chen-Yu Tsai @ 2016-10-20 15:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <dc2601d4f35d9921ec50ed443cdd413f699fa270.1476196031.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Allow the CCU drivers to specify a multiplier for their clocks.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> drivers/clk/sunxi-ng/ccu_mult.c | 2 +-
> drivers/clk/sunxi-ng/ccu_mult.h | 13 +++++++++----
> drivers/clk/sunxi-ng/ccu_nk.c | 8 ++++----
> drivers/clk/sunxi-ng/ccu_nkm.c | 8 ++++----
> drivers/clk/sunxi-ng/ccu_nkmp.c | 4 ++--
> drivers/clk/sunxi-ng/ccu_nm.c | 2 +-
> 6 files changed, 21 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu_mult.c b/drivers/clk/sunxi-ng/ccu_mult.c
> index 6a02ffee5386..678b6cb49f01 100644
> --- a/drivers/clk/sunxi-ng/ccu_mult.c
> +++ b/drivers/clk/sunxi-ng/ccu_mult.c
> @@ -105,7 +105,7 @@ static int ccu_mult_set_rate(struct clk_hw *hw, unsigned long rate,
> ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
> &parent_rate);
>
> - _cm.min = 1;
> + _cm.min = cm->mult.min;
> _cm.max = 1 << cm->mult.width;
> ccu_mult_find_best(parent_rate, rate, &_cm);
>
> diff --git a/drivers/clk/sunxi-ng/ccu_mult.h b/drivers/clk/sunxi-ng/ccu_mult.h
> index 113780b7558e..c1a2134bdc71 100644
> --- a/drivers/clk/sunxi-ng/ccu_mult.h
> +++ b/drivers/clk/sunxi-ng/ccu_mult.h
> @@ -7,14 +7,19 @@
> struct ccu_mult_internal {
> u8 shift;
> u8 width;
> + u8 min;
> };
>
> -#define _SUNXI_CCU_MULT(_shift, _width) \
> - { \
> - .shift = _shift, \
> - .width = _width, \
> +#define _SUNXI_CCU_MULT_MIN(_shift, _width, _min) \
> + { \
> + .shift = _shift, \
> + .width = _width, \
> + .min = _min, \
> }
>
> +#define _SUNXI_CCU_MULT(_shift, _width) \
> + _SUNXI_CCU_MULT_MIN(_shift, _width, 1)
> +
> struct ccu_mult {
> u32 enable;
>
> diff --git a/drivers/clk/sunxi-ng/ccu_nk.c b/drivers/clk/sunxi-ng/ccu_nk.c
> index a42d870ba0ef..eaf0fdf78d2b 100644
> --- a/drivers/clk/sunxi-ng/ccu_nk.c
> +++ b/drivers/clk/sunxi-ng/ccu_nk.c
> @@ -97,9 +97,9 @@ static long ccu_nk_round_rate(struct clk_hw *hw, unsigned long rate,
> if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
> rate *= nk->fixed_post_div;
>
> - _nk.min_n = 1;
> + _nk.min_n = nk->n.min;
> _nk.max_n = 1 << nk->n.width;
> - _nk.min_k = 1;
> + _nk.min_k = nk->k.min;
> _nk.max_k = 1 << nk->k.width;
>
> ccu_nk_find_best(*parent_rate, rate, &_nk);
> @@ -122,9 +122,9 @@ static int ccu_nk_set_rate(struct clk_hw *hw, unsigned long rate,
> if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
> rate = rate * nk->fixed_post_div;
>
> - _nk.min_n = 1;
> + _nk.min_n = nk->n.min;
> _nk.max_n = 1 << nk->n.width;
> - _nk.min_k = 1;
> + _nk.min_k = nk->k.min;
> _nk.max_k = 1 << nk->k.width;
>
> ccu_nk_find_best(parent_rate, rate, &_nk);
> diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
> index b2a5fccf2f8c..715b49211ddb 100644
> --- a/drivers/clk/sunxi-ng/ccu_nkm.c
> +++ b/drivers/clk/sunxi-ng/ccu_nkm.c
> @@ -100,9 +100,9 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
> struct ccu_nkm *nkm = data;
> struct _ccu_nkm _nkm;
>
> - _nkm.min_n = 1;
> + _nkm.min_n = nkm->n.min;
> _nkm.max_n = 1 << nkm->n.width;
> - _nkm.min_k = 1;
> + _nkm.min_n = nkm->k.min;
Typo here.
> _nkm.max_k = 1 << nkm->k.width;
> _nkm.min_m = 1;
> _nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
> @@ -129,9 +129,9 @@ static int ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate,
> unsigned long flags;
> u32 reg;
>
> - _nkm.min_n = 1;
> + _nkm.min_n = nkm->n.min;
> _nkm.max_n = 1 << nkm->n.width;
> - _nkm.min_k = 1;
> + _nkm.min_n = nkm->k.min;
And here.
> _nkm.max_k = 1 << nkm->k.width;
> _nkm.min_m = 1;
> _nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
> diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.c b/drivers/clk/sunxi-ng/ccu_nkmp.c
> index 2c1398192e48..7968e0bac5db 100644
> --- a/drivers/clk/sunxi-ng/ccu_nkmp.c
> +++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
> @@ -107,9 +107,9 @@ static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate,
> struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw);
> struct _ccu_nkmp _nkmp;
>
> - _nkmp.min_n = 1;
> + _nkmp.min_n = nkmp->n.min;
> _nkmp.max_n = 1 << nkmp->n.width;
> - _nkmp.min_k = 1;
> + _nkmp.min_n = nkmp->k.min;
And here.
> _nkmp.max_k = 1 << nkmp->k.width;
> _nkmp.min_m = 1;
> _nkmp.max_m = nkmp->m.max ?: 1 << nkmp->m.width;
> diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
> index 2a190bc032a9..b1f3f0e8899d 100644
> --- a/drivers/clk/sunxi-ng/ccu_nm.c
> +++ b/drivers/clk/sunxi-ng/ccu_nm.c
> @@ -93,7 +93,7 @@ static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
> struct ccu_nm *nm = hw_to_ccu_nm(hw);
> struct _ccu_nm _nm;
>
> - _nm.min_n = 1;
> + _nm.min_n = nm->n.min;
> _nm.max_n = 1 << nm->n.width;
> _nm.min_m = 1;
> _nm.max_m = nm->m.max ?: 1 << nm->m.width;
> --
> git-series 0.8.10
Otherwise,
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [PATCH v14 2/9] clocksource/drivers/arm_arch_timer: Add a new enum for spi type
From: Mark Rutland @ 2016-10-20 15:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475086637-1914-3-git-send-email-fu.wei@linaro.org>
On Thu, Sep 29, 2016 at 02:17:10AM +0800, fu.wei at linaro.org wrote:
> diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
> index 6f06481..16dcd10 100644
> --- a/include/clocksource/arm_arch_timer.h
> +++ b/include/clocksource/arm_arch_timer.h
> @@ -45,6 +45,12 @@ enum ppi_nr {
> MAX_TIMER_PPI
> };
>
> +enum spi_nr {
> + PHYS_SPI,
> + VIRT_SPI,
> + MAX_TIMER_SPI
> +};
Please rename this to arch_timer_spi_nr (as with patch 1 for
s/ppi_nr/arch_timer_ppi_nr/). With that:
Acked-by: Mark Rutland <mark.rutland@arm.com>
Thanks,
Mark.
^ permalink raw reply
* [linux-sunxi] [PATCH v4 7/9] arm64: dts: add Allwinner A64 SoC .dtsi
From: Chen-Yu Tsai @ 2016-10-20 15:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <41ac6bd7d95fcabcae23ed4356f5f72b3aaf282d.1476196031.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> From: Andre Przywara <andre.przywara@arm.com>
>
> The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores
> and the typical tablet / TV box peripherals.
> The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of
> the peripherals and the memory map.
> Although the cores are proper 64-bit ones, the whole SoC is actually
> limited to 4GB (including all the supported DRAM), so we use 32-bit
> address and size cells. This has the nice feature of us being able to
> reuse the DT for 32-bit kernels as well.
> This .dtsi lists the hardware that we support so far.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Acked-by: Rob Herring <robh@kernel.org>
> Acked-by: Chen-Yu Tsai <wens@csie.org>
> [Maxime: Convert to CCU binding, drop the MMC support for now]
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> Documentation/devicetree/bindings/arm/sunxi.txt | 1 +-
> MAINTAINERS | 1 +-
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 263 +++++++++++++++++-
> 3 files changed, 265 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>
> diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt
> index 3975d0a0e4c2..4d6467cc2aa2 100644
> --- a/Documentation/devicetree/bindings/arm/sunxi.txt
> +++ b/Documentation/devicetree/bindings/arm/sunxi.txt
> @@ -14,4 +14,5 @@ using one of the following compatible strings:
> allwinner,sun8i-a83t
> allwinner,sun8i-h3
> allwinner,sun9i-a80
> + allwinner,sun50i-a64
> nextthing,gr8
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 7be47efb2159..926879c05dc6 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -983,6 +983,7 @@ L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
> S: Maintained
> N: sun[x456789]i
> F: arch/arm/boot/dts/ntc-gr8*
> +F: arch/arm64/boot/dts/allwinner/
>
> ARM/Allwinner SoC Clock Support
> M: Emilio L?pez <emilio@elopez.com.ar>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> new file mode 100644
> index 000000000000..0f75fec23dc9
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -0,0 +1,263 @@
> +/*
> + * Copyright (C) 2016 ARM Ltd.
> + * based on the Allwinner H3 dtsi:
> + * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/clock/sun50i-a64-ccu.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/pinctrl/sun4i-a10.h>
> +#include <dt-bindings/reset/sun50i-a64-ccu.h>
> +
> +/ {
> + interrupt-parent = <&gic>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu0: cpu at 0 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu at 1 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu at 2 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu at 3 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <3>;
> + enable-method = "psci";
> + };
> + };
> +
> + osc24M: osc24M_clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <24000000>;
> + clock-output-names = "osc24M";
> + };
> +
> + osc32k: osc32k_clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <32768>;
> + clock-output-names = "osc32k";
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13
> + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
> + <GIC_PPI 14
> + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
> + <GIC_PPI 11
> + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
> + <GIC_PPI 10
> + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + ccu: clock at 01c20000 {
> + compatible = "allwinner,sun50i-a64-ccu";
> + reg = <0x01c20000 0x400>;
> + clocks = <&osc24M>, <&osc32k>;
> + clock-names = "hosc", "losc";
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> + pio: pinctrl at 1c20800 {
> + compatible = "allwinner,sun50i-a64-pinctrl";
> + reg = <0x01c20800 0x400>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_PIO>;
> + gpio-controller;
> + #gpio-cells = <3>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
I think this should be 3? <bank index flags>?
> +
> + i2c1_pins: i2c1_pins {
> + allwinner,pins = "PH2", "PH3";
> + allwinner,function = "i2c1";
> + };
> +
> + uart0_pins_a: uart0 at 0 {
> + allwinner,pins = "PB8", "PB9";
> + allwinner,function = "uart0";
> + };
> + };
> +
> + uart0: serial at 1c28000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x01c28000 0x400>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + clocks = <&ccu CLK_BUS_UART0>;
> + resets = <&ccu RST_BUS_UART0>;
> + status = "disabled";
> + };
> +
> + uart1: serial at 1c28400 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x01c28400 0x400>;
> + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + clocks = <&ccu CLK_BUS_UART1>;
> + resets = <&ccu RST_BUS_UART1>;
> + status = "disabled";
> + };
> +
> + uart2: serial at 1c28800 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x01c28800 0x400>;
> + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + clocks = <&ccu CLK_BUS_UART2>;
> + resets = <&ccu RST_BUS_UART2>;
> + status = "disabled";
> + };
> +
> + uart3: serial at 1c28c00 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x01c28c00 0x400>;
> + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + clocks = <&ccu CLK_BUS_UART3>;
> + resets = <&ccu RST_BUS_UART3>;
> + status = "disabled";
> + };
> +
> + uart4: serial at 1c29000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x01c29000 0x400>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + clocks = <&ccu CLK_BUS_UART4>;
> + resets = <&ccu RST_BUS_UART4>;
> + status = "disabled";
> + };
> +
> + rtc: rtc at 1f00000 {
> + compatible = "allwinner,sun6i-a31-rtc";
> + reg = <0x01f00000 0x54>;
> + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> + };
Should sort by address.
You can keep my Ack after fixing these.
ChenYu
> +
> + i2c0: i2c at 1c2ac00 {
> + compatible = "allwinner,sun6i-a31-i2c";
> + reg = <0x01c2ac00 0x400>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_I2C0>;
> + resets = <&ccu RST_BUS_I2C0>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c1: i2c at 1c2b000 {
> + compatible = "allwinner,sun6i-a31-i2c";
> + reg = <0x01c2b000 0x400>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_I2C1>;
> + resets = <&ccu RST_BUS_I2C1>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c2: i2c at 1c2b400 {
> + compatible = "allwinner,sun6i-a31-i2c";
> + reg = <0x01c2b400 0x400>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_I2C2>;
> + resets = <&ccu RST_BUS_I2C2>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + gic: interrupt-controller at 1c81000 {
> + compatible = "arm,gic-400";
> + reg = <0x01c81000 0x1000>,
> + <0x01c82000 0x2000>,
> + <0x01c84000 0x2000>,
> + <0x01c86000 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + };
> + };
> +};
> --
> git-series 0.8.10
>
> --
> You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe at googlegroups.com.
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^ permalink raw reply
* [PATCH v14 0/9] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer
From: Mark Rutland @ 2016-10-20 15:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020145752.GC8731@red-moon>
On Thu, Oct 20, 2016 at 03:57:52PM +0100, Lorenzo Pieralisi wrote:
> On Thu, Oct 20, 2016 at 03:31:01PM +0100, Mark Rutland wrote:
> > Hi,
> >
> > On Thu, Sep 29, 2016 at 02:17:08AM +0800, fu.wei at linaro.org wrote:
> > > From: Fu Wei <fu.wei@linaro.org>
> >
> > > This patchset depends on the following patchset:
> > > [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support
> > > https://lkml.org/lkml/2016/9/12/949
> >
> > Is there a branch with these anywhere? I wasn't Cc'd on those and it's
> > rather difficult to get at the series from an LKML link.
>
> For the records, the dependency above has now been merged and it was
> just a directory creation dependency (drivers/acpi/arm64, where some of
> the code in this series will live).
Ah, I see. That saves us all some trouble, then. :)
Thanks,
Mark.
^ permalink raw reply
* [linux-sunxi] [PATCH v4 9/9] arm64: dts: add Pine64 support
From: Chen-Yu Tsai @ 2016-10-20 15:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <0ceb2e4d03b16b3c7edf1550ba4a79fbbfac925b.1476196031.git-series.maxime.ripard@free-electrons.com>
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> From: Andre Przywara <andre.przywara@arm.com>
>
> The Pine64 is a cost-efficient development board based on the
> Allwinner A64 SoC.
> There are three models: the basic version with Fast Ethernet and
> 512 MB of DRAM (Pine64) and two Pine64+ versions, which both
> feature Gigabit Ethernet and additional connectors for touchscreens
> and a camera. Or as my son put it: "Those are smaller and these are
> missing." ;-)
> The two Pine64+ models just differ in the amount of DRAM
> (1GB vs. 2GB). Since U-Boot will figure out the right size for us and
> patches the DT accordingly we just need to provide one DT for the
> Pine64+.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> [Maxime: Removed the common DTSI and include directly the pine64 DTS]
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply
* [GIT PULL] STi defconfig updates for v4.10
From: Patrice Chotard @ 2016-10-20 15:20 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Arnd and Kevin,
Please consider this first round of multi_v7_defconfig updates for v4.10 :
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti.git tags/sti-defconfig-for-4.10
for you to fetch changes up to 620c52f4db4d47e1f33c64e641392fe575d5397f:
ARM: multi_v7_defconfig: Remove stih41x phy Kconfig symbol. (2016-10-20 17:05:08 +0200)
----------------------------------------------------------------
Remove STiH415/416 specific IPs
As STiH415/416 have been removed from kernel, remove IPs only found
on these socs, remove CONFIG_PHY_MIPHY365X and CONFIG_PHY_STIH41X_USB.
----------------------------------------------------------------
Peter Griffin (2):
ARM: multi_v7_defconfig: Remove miphy365 phy Kconfig symbol.
ARM: multi_v7_defconfig: Remove stih41x phy Kconfig symbol.
arch/arm/configs/multi_v7_defconfig | 2 --
1 file changed, 2 deletions(-)
^ permalink raw reply
* [PATCH 0/4] STM32F429: Add Ethernet fixes
From: Alexandre TORGUE @ 2016-10-20 15:21 UTC (permalink / raw)
To: linux-arm-kernel
This series adds several fixes for Ethernet for stm32f429 MCU.
First 2 patches have already been reviewed some months ago when
stm32 Ethernet glue has been pushed (I added in this series to keep
history). Fixes are:
-Change DT to be compliant to stm32 ethernet glue binding
-Add phy-handle to correctly use mdio subnode
-Remove WoL support
Regards
Alex
Alexandre TORGUE (4):
ARM: dts: stm32f429: Align Ethernet node with new bindings properties
ARM: dts: stm32f429: Update Ethernet node on Eval board
ARM: dts: stm32f429: Fix Ethernet node on Eval Board
ARM: dts: stm32f429: remove Ethernet wake on Lan support
arch/arm/boot/dts/stm32429i-eval.dts | 7 ++++---
arch/arm/boot/dts/stm32f429.dtsi | 10 +++++-----
2 files changed, 9 insertions(+), 8 deletions(-)
--
1.9.1
^ permalink raw reply
* [PATCH 1/4] ARM: dts: stm32f429: Align Ethernet node with new bindings properties
From: Alexandre TORGUE @ 2016-10-20 15:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476976886-23781-1-git-send-email-alexandre.torgue@st.com>
This patch aligns clocks names and node reference according to new
stm32-dwmac glue binding. It also renames Ethernet pinctrl phandle
(indeed there is no need to add 0 as Ethernet instance as there is only
one IP in SOC).
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 336ee4f..6350117b 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -313,7 +313,7 @@
};
};
- ethernet0_mii: mii at 0 {
+ ethernet_mii: mii at 0 {
pins {
pinmux = <STM32F429_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
<STM32F429_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
@@ -373,13 +373,13 @@
st,mem2mem;
};
- ethernet0: dwmac at 40028000 {
+ mac: ethernet at 40028000 {
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
interrupts = <61>, <62>;
interrupt-names = "macirq", "eth_wake_irq";
- clock-names = "stmmaceth", "tx-clk", "rx-clk";
+ clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
st,syscon = <&syscfg 0x4>;
snps,pbl = <8>;
--
1.9.1
^ permalink raw reply related
* [PATCH 2/4] ARM: dts: stm32f429: Update Ethernet node on Eval board
From: Alexandre TORGUE @ 2016-10-20 15:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476976886-23781-1-git-send-email-alexandre.torgue@st.com>
Update new pinctrl phandle name and use new node name.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts
index 13c7cd2..fa30bf1 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -94,11 +94,12 @@
clock-frequency = <25000000>;
};
-ðernet0 {
+&mac {
status = "okay";
- pinctrl-0 = <ðernet0_mii>;
+ pinctrl-0 = <ðernet_mii>;
pinctrl-names = "default";
- phy-mode = "mii-id";
+ phy-mode = "mii";
+
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
--
1.9.1
^ permalink raw reply related
* [PATCH 3/4] ARM: dts: stm32f429: Fix Ethernet node on Eval Board
From: Alexandre TORGUE @ 2016-10-20 15:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476976886-23781-1-git-send-email-alexandre.torgue@st.com>
"phy-handle" entry is mandatory when mdio subnode is used in
Ethernet node.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts
index fa30bf1..a11b108 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -99,7 +99,7 @@
pinctrl-0 = <ðernet_mii>;
pinctrl-names = "default";
phy-mode = "mii";
-
+ phy-handle = <&phy1>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
--
1.9.1
^ permalink raw reply related
* [PATCH 4/4] ARM: dts: stm32f429: remove Ethernet wake on Lan support
From: Alexandre TORGUE @ 2016-10-20 15:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476976886-23781-1-git-send-email-alexandre.torgue@st.com>
This patch removes WoL (Wake on Lan) support as it is not yet
fully supported and tested.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 6350117b..ad0bc6a 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -377,8 +377,8 @@
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
- interrupts = <61>, <62>;
- interrupt-names = "macirq", "eth_wake_irq";
+ interrupts = <61>;
+ interrupt-names = "macirq";
clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
st,syscon = <&syscfg 0x4>;
--
1.9.1
^ permalink raw reply related
* [PATCH v14 3/9] clocksource/drivers/arm_arch_timer: Improve printk relevant code
From: Mark Rutland @ 2016-10-20 15:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475086637-1914-4-git-send-email-fu.wei@linaro.org>
On Thu, Sep 29, 2016 at 02:17:11AM +0800, fu.wei at linaro.org wrote:
> static void arch_timer_banner(unsigned type)
> {
> - pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
> - type & ARCH_CP15_TIMER ? "cp15" : "",
> - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "",
> - type & ARCH_MEM_TIMER ? "mmio" : "",
> - (unsigned long)arch_timer_rate / 1000000,
> - (unsigned long)(arch_timer_rate / 10000) % 100,
> - type & ARCH_CP15_TIMER ?
> - (arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" :
> - "",
> - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "",
> - type & ARCH_MEM_TIMER ?
> - arch_timer_mem_use_virtual ? "virt" : "phys" :
> - "");
> + pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
> + type & ARCH_CP15_TIMER ? "cp15" : "",
> + type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "",
> + type & ARCH_MEM_TIMER ? "mmio" : "",
> + (unsigned long)arch_timer_rate / 1000000,
> + (unsigned long)(arch_timer_rate / 10000) % 100,
> + type & ARCH_CP15_TIMER ?
> + (arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" :
> + "",
Please restore the additional indent on this line...
> + type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "",
> + type & ARCH_MEM_TIMER ?
> + arch_timer_mem_use_virtual ? "virt" : "phys" :
> + "");
... and these two.
No matter what checkpatch says, I prefer the code that way so as to keep
the ternary clear.
[...]
> @@ -768,7 +769,7 @@ static int __init arch_timer_init(void)
> return ret;
>
> arch_timer_kvm_info.virtual_irq = arch_timer_ppi[VIRT_PPI];
> -
> +
Please mention the whitespace fixup in the commit message. It's
surprising otherwise.
With all that:
Acked-by: Mark Rutland <mark.rutland@arm.com>
Thanks,
Mark.
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