* [PATCH v2 2/9] ARM: dra72-evm: Fix modelling of regulators
From: Lokesh Vutla @ 2016-10-21 10:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021103841.8044-1-lokeshvutla@ti.com>
Add proper description of input voltage regulators and update the voltage
rail map for all the regulators.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/boot/dts/dra72-evm-common.dtsi | 48 +++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index 3c02612..8537b6a 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -18,11 +18,47 @@
display0 = &hdmi0;
};
+ evm_12v0: fixedregulator-evm12v0 {
+ /* main supply */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_12v0";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ evm_5v0: fixedregulator-evm5v0 {
+ /* Output 1 of TPS43351QDAPRQ1 */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_3v3: fixedregulator-vsys3v3 {
+ /* Output 2 of TPS43351QDAPRQ1 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
evm_3v3_sw: fixedregulator-evm_3v3 {
+ /* TPS22965DSG */
compatible = "regulator-fixed";
regulator-name = "evm_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ vin-supply = <&vsys_3v3>;
+ regulator-always-on;
+ regulator-boot-on;
};
aic_dvdd: fixedregulator-aic_dvdd {
@@ -39,6 +75,7 @@
regulator-name = "evm_3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ vin-supply = <&evm_3v3_sw>;
enable-active-high;
gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
};
@@ -190,6 +227,17 @@
tps65917_pmic {
compatible = "ti,tps65917-pmic";
+ smps1-in-supply = <&vsys_3v3>;
+ smps2-in-supply = <&vsys_3v3>;
+ smps3-in-supply = <&vsys_3v3>;
+ smps4-in-supply = <&vsys_3v3>;
+ smps5-in-supply = <&vsys_3v3>;
+ ldo1-in-supply = <&vsys_3v3>;
+ ldo2-in-supply = <&vsys_3v3>;
+ ldo3-in-supply = <&vsys_3v3>;
+ ldo4-in-supply = <&evm_5v0>;
+ ldo5-in-supply = <&vsys_3v3>;
+
tps65917_regulators: regulators {
smps1_reg: smps1 {
/* VDD_MPU */
--
2.10.1
^ permalink raw reply related
* [PATCH v2 3/9] ARM: dts: dra72: Add separate dtsi for tps65917
From: Lokesh Vutla @ 2016-10-21 10:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021103841.8044-1-lokeshvutla@ti.com>
dra72-evm-common.dtsi consolidates dra72-evm.dts and dra72-evm-revc.dts
which also include tps65917 pmic support as both the evms uses the same
pmic. But, dra71-evm has mostly similar features with a different pmic.
In order to exploit dra72-evm-common.dtsi, creating a separate dtsi
for tps65915 support and including it in respective board files.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/boot/dts/dra72-evm-common.dtsi | 128 ----------------------------
arch/arm/boot/dts/dra72-evm-revc.dts | 21 +++--
arch/arm/boot/dts/dra72-evm-tps65917.dtsi | 134 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/dra72-evm.dts | 14 ++--
4 files changed, 154 insertions(+), 143 deletions(-)
create mode 100644 arch/arm/boot/dts/dra72-evm-tps65917.dtsi
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index 8537b6a..9903ac7 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -214,123 +214,6 @@
status = "okay";
clock-frequency = <400000>;
- tps65917: tps65917 at 58 {
- compatible = "ti,tps65917";
- reg = <0x58>;
-
- interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
- interrupt-controller;
- #interrupt-cells = <2>;
-
- ti,system-power-controller;
-
- tps65917_pmic {
- compatible = "ti,tps65917-pmic";
-
- smps1-in-supply = <&vsys_3v3>;
- smps2-in-supply = <&vsys_3v3>;
- smps3-in-supply = <&vsys_3v3>;
- smps4-in-supply = <&vsys_3v3>;
- smps5-in-supply = <&vsys_3v3>;
- ldo1-in-supply = <&vsys_3v3>;
- ldo2-in-supply = <&vsys_3v3>;
- ldo3-in-supply = <&vsys_3v3>;
- ldo4-in-supply = <&evm_5v0>;
- ldo5-in-supply = <&vsys_3v3>;
-
- tps65917_regulators: regulators {
- smps1_reg: smps1 {
- /* VDD_MPU */
- regulator-name = "smps1";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps2_reg: smps2 {
- /* VDD_CORE */
- regulator-name = "smps2";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1150000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- smps3_reg: smps3 {
- /* VDD_GPU IVA DSPEVE */
- regulator-name = "smps3";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- smps4_reg: smps4 {
- /* VDDS1V8 */
- regulator-name = "smps4";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps5_reg: smps5 {
- /* VDD_DDR */
- regulator-name = "smps5";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1_reg: ldo1 {
- /* LDO1_OUT --> SDIO */
- regulator-name = "ldo1";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-allow-bypass;
- };
-
- ldo3_reg: ldo3 {
- /* VDDA_1V8_PHY */
- regulator-name = "ldo3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo5_reg: ldo5 {
- /* VDDA_1V8_PLL */
- regulator-name = "ldo5";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldo4_reg: ldo4 {
- /* VDDA_3V_USB: VDDA_USBHS33 */
- regulator-name = "ldo4";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- };
- };
- };
-
- tps65917_power_button {
- compatible = "ti,palmas-pwrbutton";
- interrupt-parent = <&tps65917>;
- interrupts = <1 IRQ_TYPE_NONE>;
- wakeup-source;
- ti,palmas-long-press-seconds = <6>;
- };
- };
-
pcf_gpio_21: gpio at 21 {
compatible = "ti,pcf8575", "nxp,pcf8575";
reg = <0x21>;
@@ -480,14 +363,6 @@
};
};
-&usb2_phy1 {
- phy-supply = <&ldo4_reg>;
-};
-
-&usb2_phy2 {
- phy-supply = <&ldo4_reg>;
-};
-
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
@@ -509,7 +384,6 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_default>;
vmmc-supply = <&evm_3v3_sd>;
- vmmc_aux-supply = <&ldo1_reg>;
bus-width = <4>;
/*
* SDCD signal is not being used here - using the fact that GPIO mode
@@ -606,8 +480,6 @@
&dss {
status = "ok";
-
- vdda_video-supply = <&ldo5_reg>;
};
&hdmi {
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
index 064b322..4ea2a0c 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -17,17 +17,22 @@
};
};
-&tps65917_regulators {
- ldo2_reg: ldo2 {
- /* LDO2_OUT --> VDDA_1V8_PHY2 */
- regulator-name = "ldo2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
+&i2c1 {
+ tps65917: tps65917 at 58 {
+ reg = <0x58>;
+
+ interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
};
};
+#include "dra72-evm-tps65917.dtsi"
+
+&ldo2_reg {
+ /* LDO2_OUT --> VDDA_1V8_PHY2 */
+ regulator-always-on;
+ regulator-boot-on;
+};
+
&hdmi {
vdda-supply = <&ldo2_reg>;
};
diff --git a/arch/arm/boot/dts/dra72-evm-tps65917.dtsi b/arch/arm/boot/dts/dra72-evm-tps65917.dtsi
new file mode 100644
index 0000000..ee6dac4
--- /dev/null
+++ b/arch/arm/boot/dts/dra72-evm-tps65917.dtsi
@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Integrated Power Management Chip
+ * http://www.ti.com/lit/ds/symlink/tps65917-q1.pdf
+ */
+
+&tps65917 {
+ compatible = "ti,tps65917";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ ti,system-power-controller;
+
+ tps65917_pmic {
+ compatible = "ti,tps65917-pmic";
+
+ smps1-in-supply = <&vsys_3v3>;
+ smps2-in-supply = <&vsys_3v3>;
+ smps3-in-supply = <&vsys_3v3>;
+ smps4-in-supply = <&vsys_3v3>;
+ smps5-in-supply = <&vsys_3v3>;
+ ldo1-in-supply = <&vsys_3v3>;
+ ldo2-in-supply = <&vsys_3v3>;
+ ldo3-in-supply = <&vsys_3v3>;
+ ldo4-in-supply = <&evm_5v0>;
+ ldo5-in-supply = <&vsys_3v3>;
+
+ tps65917_regulators: regulators {
+ smps1_reg: smps1 {
+ /* VDD_MPU */
+ regulator-name = "smps1";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps2_reg: smps2 {
+ /* VDD_CORE */
+ regulator-name = "smps2";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ smps3_reg: smps3 {
+ /* VDD_GPU IVA DSPEVE */
+ regulator-name = "smps3";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ smps4_reg: smps4 {
+ /* VDDS1V8 */
+ regulator-name = "smps4";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps5_reg: smps5 {
+ /* VDD_DDR */
+ regulator-name = "smps5";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: ldo1 {
+ /* LDO1_OUT --> SDIO */
+ regulator-name = "ldo1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-allow-bypass;
+ };
+
+ ldo2_reg: ldo2 {
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-allow-bypass;
+ };
+
+ ldo3_reg: ldo3 {
+ /* VDDA_1V8_PHY */
+ regulator-name = "ldo3";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5_reg: ldo5 {
+ /* VDDA_1V8_PLL */
+ regulator-name = "ldo5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo4_reg: ldo4 {
+ /* VDDA_3V_USB: VDDA_USBHS33 */
+ regulator-name = "ldo4";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ };
+ };
+ };
+
+ tps65917_power_button {
+ compatible = "ti,palmas-pwrbutton";
+ interrupt-parent = <&tps65917>;
+ interrupts = <1 IRQ_TYPE_NONE>;
+ wakeup-source;
+ ti,palmas-long-press-seconds = <6>;
+ };
+};
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index e3a9b69..cd9c4ff 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -15,16 +15,16 @@
};
};
-&tps65917_regulators {
- ldo2_reg: ldo2 {
- /* LDO2_OUT --> TP1017 (UNUSED) */
- regulator-name = "ldo2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-allow-bypass;
+&i2c1 {
+ tps65917: tps65917 at 58 {
+ reg = <0x58>;
+
+ interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
};
};
+#include "dra72-evm-tps65917.dtsi"
+
&hdmi {
vdda-supply = <&ldo3_reg>;
};
--
2.10.1
^ permalink raw reply related
* [PATCH v2 4/9] regulator: lp873x: Add support for populating input supply
From: Lokesh Vutla @ 2016-10-21 10:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021103841.8044-1-lokeshvutla@ti.com>
In order to have a proper topology of regulators for a platform, each
registering regulator needs to populate supply_name field for identifying
its supply's name. Add supply_name field for lp873x regulators.
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Documentation/devicetree/bindings/mfd/lp873x.txt | 8 ++++++++
drivers/regulator/lp873x-regulator.c | 1 +
2 files changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/lp873x.txt b/Documentation/devicetree/bindings/mfd/lp873x.txt
index 52766c2..998837a 100644
--- a/Documentation/devicetree/bindings/mfd/lp873x.txt
+++ b/Documentation/devicetree/bindings/mfd/lp873x.txt
@@ -7,6 +7,9 @@ Required properties:
- #gpio-cells: Should be two. The first cell is the pin number and
the second cell is used to specify flags.
See ../gpio/gpio.txt for more information.
+ - xxx-in-supply: Phandle to parent supply node of each regulator
+ populated under regulators node. xxx should match
+ the supply_name populated in driver.
- regulators: List of child nodes that specify the regulator
initialization data.
Example:
@@ -17,6 +20,11 @@ pmic: lp8733 at 60 {
gpio-controller;
#gpio-cells = <2>;
+ buck0-in-supply = <&vsys_3v3>;
+ buck1-in-supply = <&vsys_3v3>;
+ ldo0-in-supply = <&vsys_3v3>;
+ ldo1-in-supply = <&vsys_3v3>;
+
regulators {
lp8733_buck0: buck0 {
regulator-name = "lp8733-buck0";
diff --git a/drivers/regulator/lp873x-regulator.c b/drivers/regulator/lp873x-regulator.c
index e504b91..70e3df6 100644
--- a/drivers/regulator/lp873x-regulator.c
+++ b/drivers/regulator/lp873x-regulator.c
@@ -24,6 +24,7 @@
[_id] = { \
.desc = { \
.name = _name, \
+ .supply_name = _of "-in", \
.id = _id, \
.of_match = of_match_ptr(_of), \
.regulators_node = of_match_ptr("regulators"),\
--
2.10.1
^ permalink raw reply related
* [PATCH v2 5/9] ARM: OMAP2+: board-generic: add support for DRA71x family
From: Lokesh Vutla @ 2016-10-21 10:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021103841.8044-1-lokeshvutla@ti.com>
DRA71x processor family is a derivative of DRA722 ES2.0 targetted for
infotainment systems.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Documentation/devicetree/bindings/arm/omap/omap.txt | 6 ++++++
arch/arm/mach-omap2/board-generic.c | 1 +
2 files changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index f53e2ee..454b1be 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -86,6 +86,9 @@ SoCs:
- DRA722
compatible = "ti,dra722", "ti,dra72", "ti,dra7"
+- DRA718
+ compatible = "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"
+
- AM5728
compatible = "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"
@@ -181,6 +184,9 @@ Boards:
- DRA722 EVM: Software Development Board for DRA722
compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"
+- DRA718 EVM: Software Development Board for DRA718
+ compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"
+
- DM3730 Logic PD Torpedo + Wireless: Commercial System on Module with WiFi and Bluetooth
compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3"
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index bab814d..981b23a 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -341,6 +341,7 @@ static const char *const dra72x_boards_compat[] __initconst = {
"ti,am5718",
"ti,am5716",
"ti,dra722",
+ "ti,dra718",
NULL,
};
--
2.10.1
^ permalink raw reply related
* [PATCH v2 6/9] ARM: DRA7: hwmod: Do not register RTC on DRA71
From: Lokesh Vutla @ 2016-10-21 10:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021103841.8044-1-lokeshvutla@ti.com>
From: Nishanth Menon <nm@ti.com>
RTC is not available on DRA71x, so accessing any of the RTC
register or clkctrl register will lead to a crash. So, do not
register RTC hwmod for DRA71x.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 1ab7096..7f48577 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -3845,7 +3845,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l3_main_1__pciess2,
&dra7xx_l4_cfg__pciess2,
&dra7xx_l3_main_1__qspi,
- &dra7xx_l4_per3__rtcss,
&dra7xx_l4_cfg__sata,
&dra7xx_l4_cfg__smartreflex_core,
&dra7xx_l4_cfg__smartreflex_mpu,
@@ -3905,6 +3904,11 @@ static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = {
NULL,
};
+static struct omap_hwmod_ocp_if *dra74x_dra72x_hwmod_ocp_ifs[] __initdata = {
+ &dra7xx_l4_per3__rtcss,
+ NULL,
+};
+
int __init dra7xx_hwmod_init(void)
{
int ret;
@@ -3920,5 +3924,9 @@ int __init dra7xx_hwmod_init(void)
if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP)
ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs);
+ /* now for the IPs *NOT* in dra71 */
+ if (!ret && !of_machine_is_compatible("ti,dra718"))
+ ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs);
+
return ret;
}
--
2.10.1
^ permalink raw reply related
* [PATCH v2 7/9] ARM: dts: Add support for dra718-evm
From: Lokesh Vutla @ 2016-10-21 10:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021103841.8044-1-lokeshvutla@ti.com>
From: Nishanth Menon <nm@ti.com>
The DRA718-evm is a board based on TI's DRA718 processor targeting
BOM-optimized entry infotainment systems and is a reduced pin and
software compatible derivative of the DRA72 ES2.0 processor.
This platform features:
- 2GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI,
- uSD
- 8GB eMMC
- CAN
- PCIe
- USB3.0
- Video Input Port
- LP873x PMIC
More information can be found here[1].
Adding support for this board while reusing the data available in
dra72-evm-common.dtsi.
[1] http://www.ti.com/product/dra718
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/dra71-evm.dts | 230 ++++++++++++++++++++++++++++++++
arch/arm/boot/dts/dra72-evm-common.dtsi | 6 +-
3 files changed, 236 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/dra71-evm.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index befcd26..b92d501 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -590,7 +590,8 @@ dtb-$(CONFIG_SOC_DRA7XX) += \
am572x-idk.dtb \
dra7-evm.dtb \
dra72-evm.dtb \
- dra72-evm-revc.dtb
+ dra72-evm-revc.dtb \
+ dra71-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += \
orion5x-kuroboxpro.dtb \
orion5x-lacie-d2-network.dtb \
diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts
new file mode 100644
index 0000000..2b9a5a8
--- /dev/null
+++ b/arch/arm/boot/dts/dra71-evm.dts
@@ -0,0 +1,230 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "dra72-evm-common.dtsi"
+#include <dt-bindings/net/ti-dp83867.h>
+
+/ {
+ compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
+ model = "TI DRA718 EVM";
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
+ };
+
+ vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "vddshv8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-boot-on;
+ vin-supply = <&evm_5v0>;
+
+ gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x0
+ 3000000 0x1>;
+ };
+
+ poweroff: gpio-poweroff {
+ compatible = "gpio-poweroff";
+ gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
+ input;
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ lp8733: lp8733 at 60 {
+ compatible = "ti,lp8733";
+ reg = <0x60>;
+
+ buck0-in-supply =<&vsys_3v3>;
+ buck1-in-supply =<&vsys_3v3>;
+ ldo0-in-supply =<&evm_5v0>;
+ ldo1-in-supply =<&evm_5v0>;
+
+ lp8733_regulators: regulators {
+ lp8733_buck0_reg: buck0 {
+ /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
+ regulator-name = "lp8733-buck0";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ lp8733_buck1_reg: buck1 {
+ /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
+ regulator-name = "lp8733-buck1";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ lp8733_ldo0_reg: ldo0 {
+ /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
+ regulator-name = "lp8733-ldo0";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ lp8733_ldo1_reg: ldo1 {
+ /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
+ regulator-name = "lp8733-ldo1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+ };
+
+ lp8732: lp8732 at 61 {
+ compatible = "ti,lp8732";
+ reg = <0x61>;
+
+ buck0-in-supply =<&vsys_3v3>;
+ buck1-in-supply =<&vsys_3v3>;
+ ldo0-in-supply =<&vsys_3v3>;
+ ldo1-in-supply =<&vsys_3v3>;
+
+ lp8732_regulators: regulators {
+ lp8732_buck0_reg: buck0 {
+ /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
+ regulator-name = "lp8732-buck0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ lp8732_buck1_reg: buck1 {
+ /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
+ regulator-name = "lp8732-buck1";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ lp8732_ldo0_reg: ldo0 {
+ /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
+ regulator-name = "lp8732-ldo0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ lp8732_ldo1_reg: ldo1 {
+ /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
+ regulator-name = "lp8732-ldo1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+ };
+};
+
+&pcf_gpio_21 {
+ interrupt-parent = <&gpio7>;
+ interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
+};
+
+&pcf_hdmi {
+ p0 {
+ /*
+ * PM_OEn to High: Disable routing I2C3 to PM_I2C
+ * With this PM_SEL(p3) should not matter
+ */
+ gpio-hog;
+ gpios = <0 GPIO_ACTIVE_LOW>;
+ output-high;
+ line-name = "pm_oe_n";
+ };
+};
+
+&mmc1 {
+ vmmc_aux-supply = <&vpo_sd_1v8_3v3>;
+};
+
+&mac {
+ mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
+ <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
+ <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
+ dual_emac;
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <2>;
+ phy-mode = "rgmii-id";
+ dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <3>;
+ phy-mode = "rgmii-id";
+ dual_emac_res_vlan = <2>;
+};
+
+&davinci_mdio {
+ dp83867_0: ethernet-phy at 2 {
+ reg = <2>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+ ti,impedance-control = <0x1f>;
+ };
+
+ dp83867_1: ethernet-phy at 3 {
+ reg = <3>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+ ti,impedance-control = <0x1f>;
+ };
+};
+
+/* No Sata on this device */
+&sata_phy {
+ status = "disabled";
+};
+
+&sata {
+ status = "disabled";
+};
+
+/* No RTC on this device */
+&rtc {
+ status = "disabled";
+};
+
+&usb2_phy1 {
+ phy-supply = <&lp8733_ldo1_reg>;
+};
+
+&usb2_phy2 {
+ phy-supply = <&lp8733_ldo1_reg>;
+};
+
+&dss {
+ /* Supplied by VDA_1V8_PLL */
+ vdda_video-supply = <&lp8732_ldo0_reg>;
+};
+
+&hdmi {
+ /* Supplied by VDA_1V8_PHY */
+ vdda_video-supply = <&lp8732_ldo1_reg>;
+};
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index 9903ac7..e50fbee 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -29,7 +29,8 @@
};
evm_5v0: fixedregulator-evm5v0 {
- /* Output 1 of TPS43351QDAPRQ1 */
+ /* Output 1 of TPS43351QDAPRQ1 on dra72-evm */
+ /* Output 1 of LM5140QRWGTQ1 on dra71-evm */
compatible = "regulator-fixed";
regulator-name = "evm_5v0";
regulator-min-microvolt = <5000000>;
@@ -40,7 +41,8 @@
};
vsys_3v3: fixedregulator-vsys3v3 {
- /* Output 2 of TPS43351QDAPRQ1 */
+ /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
+ /* Output 2 of LM5140QRWGTQ1 on dra71-evm */
compatible = "regulator-fixed";
regulator-name = "vsys_3v3";
regulator-min-microvolt = <3300000>;
--
2.10.1
^ permalink raw reply related
* [PATCH v2 8/9] ARM: omap2plus_defconfig: Enable REGULATOR_GPIO
From: Lokesh Vutla @ 2016-10-21 10:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021103841.8044-1-lokeshvutla@ti.com>
GPIO regulator is used on dra71-evm platform to control MMCSD IO
voltage
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/configs/omap2plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 53e1a88..5695cff 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -270,6 +270,7 @@ CONFIG_MFD_TPS65217=y
CONFIG_MFD_TPS65218=y
CONFIG_MFD_TPS65910=y
CONFIG_TWL6040_CORE=y
+CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_LP872X=y
CONFIG_REGULATOR_PALMAS=y
CONFIG_REGULATOR_PBIAS=y
--
2.10.1
^ permalink raw reply related
* [PATCH v2 9/9] ARM: omap2plus_defconfig: Enable LP873X support
From: Lokesh Vutla @ 2016-10-21 10:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021103841.8044-1-lokeshvutla@ti.com>
LP873X family of PMICs are used in dra71x-evm, So enable the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/configs/omap2plus_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 5695cff..e3fdf4d 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -267,11 +267,13 @@ CONFIG_TWL4030_WATCHDOG=m
CONFIG_MFD_TI_AM335X_TSCADC=m
CONFIG_MFD_PALMAS=y
CONFIG_MFD_TPS65217=y
+CONFIG_MFD_TI_LP873X=y
CONFIG_MFD_TPS65218=y
CONFIG_MFD_TPS65910=y
CONFIG_TWL6040_CORE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_LP872X=y
+CONFIG_REGULATOR_LP873X=y
CONFIG_REGULATOR_PALMAS=y
CONFIG_REGULATOR_PBIAS=y
CONFIG_REGULATOR_TI_ABB=y
--
2.10.1
^ permalink raw reply related
* [PATCH v3 5/6] ARM: sunxi: Remove useless allwinner, pull property
From: Maxime Ripard @ 2016-10-21 10:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020173848.be9cf97854f8933b3ce90d55@free.fr>
Hi,
On Thu, Oct 20, 2016 at 05:38:48PM +0200, Jean-Francois Moine wrote:
> On Thu, 20 Oct 2016 15:49:06 +0200
> Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
>
> > The allwinner,pull property set to NO_PULL was really considered our
> > default (and wasn't even changing the default value in the code).
> >
> > Remove these properties to make it obvious that we do not set anything in
> > such a case.
> >
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > Acked-by: Chen-Yu Tsai <wens@csie.org>
> > Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> > ---
> > arch/arm/boot/dts/ntc-gr8-evb.dts | 4 +-
> > arch/arm/boot/dts/ntc-gr8.dtsi | 14 +-----
> > arch/arm/boot/dts/sun4i-a10-a1000.dts | 2 +-
> > arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 1 +-
> > arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts | 4 +-
> > arch/arm/boot/dts/sun4i-a10-gemei-g9.dts | 1 +-
> > arch/arm/boot/dts/sun4i-a10-hackberry.dts | 2 +-
> > arch/arm/boot/dts/sun4i-a10-inet1.dts | 2 +-
> > arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts | 2 +-
> > arch/arm/boot/dts/sun4i-a10-marsboard.dts | 1 +-
> > arch/arm/boot/dts/sun4i-a10-mk802.dts | 3 +-
> > arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 2 +-
> > arch/arm/boot/dts/sun4i-a10-pcduino.dts | 2 +-
> > arch/arm/boot/dts/sun4i-a10-pcduino2.dts | 1 +-
> > arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts | 3 +-
> > arch/arm/boot/dts/sun4i-a10.dtsi | 24 +--------
> > arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts | 1 +-
> > arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts | 2 +-
> > arch/arm/boot/dts/sun5i-a10s-mk802.dts | 2 +-
> > arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 2 +-
> > arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts | 2 +-
> > arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts | 2 +-
> > arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +--
> > arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 1 +-
> > arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 3 +-
> > arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 2 +-
> > arch/arm/boot/dts/sun5i-a13-utoo-p66.dts | 1 +-
> > arch/arm/boot/dts/sun5i-a13.dtsi | 3 +-
> > arch/arm/boot/dts/sun5i-r8-chip.dts | 2 +-
> > arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi | 2 +-
> > arch/arm/boot/dts/sun5i.dtsi | 7 +--
> > arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 1 +-
> > arch/arm/boot/dts/sun6i-a31-colombus.dts | 1 +-
> > arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
> > arch/arm/boot/dts/sun6i-a31-i7.dts | 2 +-
> > arch/arm/boot/dts/sun6i-a31-m9.dts | 2 +-
> > arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 2 +-
> > arch/arm/boot/dts/sun6i-a31.dtsi | 13 +----
> > arch/arm/boot/dts/sun6i-a31s-primo81.dts | 1 +-
> > arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 1 +-
> > arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 3 +-
> > arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 3 +-
> > arch/arm/boot/dts/sun7i-a20-bananapi.dts | 2 +-
> > arch/arm/boot/dts/sun7i-a20-bananapro.dts | 5 +--
> > arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 1 +-
> > arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 6 +--
> > arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 4 +-
> > arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 4 +-
> > arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 1 +-
> > arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 2 +-
> > arch/arm/boot/dts/sun7i-a20-m3.dts | 1 +-
> > arch/arm/boot/dts/sun7i-a20-mk808c.dts | 2 +-
> > arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 4 +-
> > arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 2 +-
> > arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts | 1 +-
> > arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 3 +-
> > arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 1 +-
> > arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 4 +-
> > arch/arm/boot/dts/sun7i-a20-orangepi.dts | 4 +-
> > arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 3 +-
> > arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 2 +-
> > arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts | 3 +-
> > arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 1 +-
> > arch/arm/boot/dts/sun7i-a20.dtsi | 37 +------------
> > arch/arm/boot/dts/sun8i-a23-a33.dtsi | 10 +---
> > arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 1 +-
> > arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 1 +-
> > arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 1 +-
> > arch/arm/boot/dts/sun8i-a33-olinuxino.dts | 3 +-
> > arch/arm/boot/dts/sun8i-a33.dtsi | 1 +-
> > arch/arm/boot/dts/sun8i-a83t.dtsi | 3 +-
> > arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 3 +-
> > arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 2 +-
> > arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 4 +-
> > arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 3 +-
> > arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 3 +-
> > arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 3 +-
> > arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 1 +-
> > arch/arm/boot/dts/sun8i-h3.dtsi | 12 +----
> > arch/arm/boot/dts/sun8i-r16-parrot.dts | 3 +-
> > arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 2 +-
> > arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 1 +-
> > arch/arm/boot/dts/sun9i-a80-optimus.dts | 4 +-
> > arch/arm/boot/dts/sun9i-a80.dtsi | 6 +--
> > arch/arm/boot/dts/sunxi-common-regulators.dtsi | 4 +-
> > 85 files changed, 0 insertions(+), 302 deletions(-)
> [snip]
>
> Is it really usefull to change all these files while in a previous
> patch you were writing:
> > The generic pin configuration and multiplexing should be preferred now,
> > even though we still support the old one.
> ?
I assume you wanted to comment on the sixth patch.
Yes, it's useful, because that way we avoid using a deprecated
binding, that we would have to mix the newer binding which would be
completely inconsistent, and that way we use the generic binding that
everyone uses everywhere.
The backward compatibility is just here to avoid breaking the ABI.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [RFC PATCH 8/8] ARM: KVM: Support vGICv3 ITS
From: Andre Przywara @ 2016-10-21 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477042601-15227-9-git-send-email-vladimir.murzin@arm.com>
Hi,
On 21/10/16 10:36, Vladimir Murzin wrote:
> This patch allows to build and use vGICv3 ITS in 32-bit mode.
Ah, what a relief to see that config option go. Thanks for that!
I quickly booted an ITS guest on a (64-bit) model and couldn't spot any
regressions.
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre.
> ---
> Documentation/virtual/kvm/api.txt | 2 +-
> arch/arm/include/uapi/asm/kvm.h | 2 ++
> arch/arm/kvm/Kconfig | 1 +
> arch/arm/kvm/Makefile | 1 +
> arch/arm/kvm/arm.c | 6 ++++++
> arch/arm64/kvm/Kconfig | 4 ----
> arch/arm64/kvm/reset.c | 6 ------
> virt/kvm/arm/vgic/vgic-kvm-device.c | 2 --
> virt/kvm/arm/vgic/vgic-mmio-v3.c | 2 --
> virt/kvm/arm/vgic/vgic.h | 26 --------------------------
> 10 files changed, 11 insertions(+), 41 deletions(-)
>
> diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
> index 739db9a..2feeae6 100644
> --- a/Documentation/virtual/kvm/api.txt
> +++ b/Documentation/virtual/kvm/api.txt
> @@ -2198,7 +2198,7 @@ after pausing the vcpu, but before it is resumed.
> 4.71 KVM_SIGNAL_MSI
>
> Capability: KVM_CAP_SIGNAL_MSI
> -Architectures: x86 arm64
> +Architectures: x86 arm arm64
> Type: vm ioctl
> Parameters: struct kvm_msi (in)
> Returns: >0 on delivery, 0 if guest blocked the MSI, and -1 on error
> diff --git a/arch/arm/include/uapi/asm/kvm.h b/arch/arm/include/uapi/asm/kvm.h
> index b38c10c..af05f8e 100644
> --- a/arch/arm/include/uapi/asm/kvm.h
> +++ b/arch/arm/include/uapi/asm/kvm.h
> @@ -87,9 +87,11 @@ struct kvm_regs {
> /* Supported VGICv3 address types */
> #define KVM_VGIC_V3_ADDR_TYPE_DIST 2
> #define KVM_VGIC_V3_ADDR_TYPE_REDIST 3
> +#define KVM_VGIC_ITS_ADDR_TYPE 4
>
> #define KVM_VGIC_V3_DIST_SIZE SZ_64K
> #define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K)
> +#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K)
>
> #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
> #define KVM_ARM_VCPU_PSCI_0_2 1 /* CPU uses PSCI v0.2 */
> diff --git a/arch/arm/kvm/Kconfig b/arch/arm/kvm/Kconfig
> index 3e1cd04..90d0176 100644
> --- a/arch/arm/kvm/Kconfig
> +++ b/arch/arm/kvm/Kconfig
> @@ -34,6 +34,7 @@ config KVM
> select HAVE_KVM_IRQFD
> select HAVE_KVM_IRQCHIP
> select HAVE_KVM_IRQ_ROUTING
> + select HAVE_KVM_MSI
> depends on ARM_VIRT_EXT && ARM_LPAE && ARM_ARCH_TIMER
> ---help---
> Support hosting virtualized guest machines.
> diff --git a/arch/arm/kvm/Makefile b/arch/arm/kvm/Makefile
> index f19842e..d571243 100644
> --- a/arch/arm/kvm/Makefile
> +++ b/arch/arm/kvm/Makefile
> @@ -32,5 +32,6 @@ obj-y += $(KVM)/arm/vgic/vgic-mmio.o
> obj-y += $(KVM)/arm/vgic/vgic-mmio-v2.o
> obj-y += $(KVM)/arm/vgic/vgic-mmio-v3.o
> obj-y += $(KVM)/arm/vgic/vgic-kvm-device.o
> +obj-y += $(KVM)/arm/vgic/vgic-its.o
> obj-y += $(KVM)/irqchip.o
> obj-y += $(KVM)/arm/arch_timer.o
> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
> index 03e9273..8b13448 100644
> --- a/arch/arm/kvm/arm.c
> +++ b/arch/arm/kvm/arm.c
> @@ -209,6 +209,12 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
> case KVM_CAP_MAX_VCPUS:
> r = KVM_MAX_VCPUS;
> break;
> + case KVM_CAP_MSI_DEVID:
> + if (!kvm)
> + r = -EINVAL;
> + else
> + r = kvm->arch.vgic.msis_require_devid;
> + break;
> default:
> r = kvm_arch_dev_ioctl_check_extension(kvm, ext);
> break;
> diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
> index 6eaf12c..52cb7ad 100644
> --- a/arch/arm64/kvm/Kconfig
> +++ b/arch/arm64/kvm/Kconfig
> @@ -16,9 +16,6 @@ menuconfig VIRTUALIZATION
>
> if VIRTUALIZATION
>
> -config KVM_ARM_VGIC_V3_ITS
> - bool
> -
> config KVM
> bool "Kernel-based Virtual Machine (KVM) support"
> depends on OF
> @@ -34,7 +31,6 @@ config KVM
> select KVM_VFIO
> select HAVE_KVM_EVENTFD
> select HAVE_KVM_IRQFD
> - select KVM_ARM_VGIC_V3_ITS
> select KVM_ARM_PMU if HW_PERF_EVENTS
> select HAVE_KVM_MSI
> select HAVE_KVM_IRQCHIP
> diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
> index 5bc4608..e95d4f6 100644
> --- a/arch/arm64/kvm/reset.c
> +++ b/arch/arm64/kvm/reset.c
> @@ -86,12 +86,6 @@ int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
> case KVM_CAP_VCPU_ATTRIBUTES:
> r = 1;
> break;
> - case KVM_CAP_MSI_DEVID:
> - if (!kvm)
> - r = -EINVAL;
> - else
> - r = kvm->arch.vgic.msis_require_devid;
> - break;
> default:
> r = 0;
> }
> diff --git a/virt/kvm/arm/vgic/vgic-kvm-device.c b/virt/kvm/arm/vgic/vgic-kvm-device.c
> index ce1f4ed..fbe87a6 100644
> --- a/virt/kvm/arm/vgic/vgic-kvm-device.c
> +++ b/virt/kvm/arm/vgic/vgic-kvm-device.c
> @@ -221,11 +221,9 @@ int kvm_register_vgic_device(unsigned long type)
> ret = kvm_register_device_ops(&kvm_arm_vgic_v3_ops,
> KVM_DEV_TYPE_ARM_VGIC_V3);
>
> -#ifdef CONFIG_KVM_ARM_VGIC_V3_ITS
> if (ret)
> break;
> ret = kvm_vgic_register_its_device();
> -#endif
> break;
> }
>
> diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c
> index 0d3c76a..50f42f0 100644
> --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c
> +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c
> @@ -42,7 +42,6 @@ u64 update_64bit_reg(u64 reg, unsigned int offset, unsigned int len,
> return reg | ((u64)val << lower);
> }
>
> -#ifdef CONFIG_KVM_ARM_VGIC_V3_ITS
> bool vgic_has_its(struct kvm *kvm)
> {
> struct vgic_dist *dist = &kvm->arch.vgic;
> @@ -52,7 +51,6 @@ bool vgic_has_its(struct kvm *kvm)
>
> return dist->has_its;
> }
> -#endif
>
> static unsigned long vgic_mmio_read_v3_misc(struct kvm_vcpu *vcpu,
> gpa_t addr, unsigned int len)
> diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
> index 9d9e014..859f65c 100644
> --- a/virt/kvm/arm/vgic/vgic.h
> +++ b/virt/kvm/arm/vgic/vgic.h
> @@ -84,37 +84,11 @@ static inline void vgic_get_irq_kref(struct vgic_irq *irq)
> int vgic_v3_map_resources(struct kvm *kvm);
> int vgic_register_redist_iodevs(struct kvm *kvm, gpa_t dist_base_address);
>
> -#ifdef CONFIG_KVM_ARM_VGIC_V3_ITS
> int vgic_register_its_iodevs(struct kvm *kvm);
> bool vgic_has_its(struct kvm *kvm);
> int kvm_vgic_register_its_device(void);
> void vgic_enable_lpis(struct kvm_vcpu *vcpu);
> int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi);
> -#else
> -static inline int vgic_register_its_iodevs(struct kvm *kvm)
> -{
> - return -ENODEV;
> -}
> -
> -static inline bool vgic_has_its(struct kvm *kvm)
> -{
> - return false;
> -}
> -
> -static inline int kvm_vgic_register_its_device(void)
> -{
> - return -ENODEV;
> -}
> -
> -static inline void vgic_enable_lpis(struct kvm_vcpu *vcpu)
> -{
> -}
> -
> -static inline int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
> -{
> - return -ENODEV;
> -}
> -#endif
>
> int kvm_register_vgic_device(unsigned long type);
> int vgic_lazy_init(struct kvm *kvm);
>
^ permalink raw reply
* [PATCH v2] dt/bindings: arm-boards: Remove skeleton.dtsi inclusion from example
From: Javier Martinez Canillas @ 2016-10-21 11:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477045693-6820-1-git-send-email-geert+renesas@glider.be>
Hello Geert,
On Fri, Oct 21, 2016 at 7:28 AM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
> as deprecated"), including skeleton.dtsi is deprecated.
> Hence remove it from the example.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Acked-by: Mark Rutland <mark.rutland@arm.com>
> ---
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Best regards,
Javier
^ permalink raw reply
* [PATCH v14 5/9] clocksource/drivers/arm_arch_timer: Simplify ACPI support code.
From: Mark Rutland @ 2016-10-21 11:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020165747.GD27598@leverpostej>
On Thu, Oct 20, 2016 at 05:58:17PM +0100, Mark Rutland wrote:
> On Thu, Sep 29, 2016 at 02:17:13AM +0800, fu.wei at linaro.org wrote:
> > + arch_timer_ppi[PHYS_NONSECURE_PPI] = acpi_gtdt_map_ppi(PHYS_NONSECURE_PPI);
> > + arch_timer_ppi[VIRT_PPI] = acpi_gtdt_map_ppi(VIRT_PPI);
> > + arch_timer_ppi[HYP_PPI] = acpi_gtdt_map_ppi(HYP_PPI);
> > + /* Always-on capability */
> > + arch_timer_c3stop = acpi_gtdt_c3stop();
>
> ... I think we should check the flag on the relevant interrupt, though
> that's worth clarifying.
I see I misread the spec; this is part of the common flags.
Please ignore this point; sorry for the noise.
Thanks,
Mark.
^ permalink raw reply
* [PATCH v2 0/2] ARM: oxnas: Add SMP support for OX820
From: Arnd Bergmann @ 2016-10-21 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021085848.1754-1-narmstrong@baylibre.com>
On Friday, October 21, 2016 10:58:46 AM CEST Neil Armstrong wrote:
> In order to support the SMP feature of the Oxford Semiconductor OX820 SoC,
> add the necessary code to handle the wake-up, hotplug and cpu entry.
>
> The OX820 has an ARM11MPCORE cluster with 2 cores and has proper hardware
> support for secondary core booting.
>
> Changes since v1 at http://lkml.kernel.org/r/20161017084303.20078-1-narmstrong at baylibre.com
> - Remove useless holding pen loops and spinlock in boot_secondary
>
Thanks for the update, much nicer!
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply
* [PATCH v14 6/9] acpi/arm64: Add memory-mapped timer support in GTDT driver
From: Mark Rutland @ 2016-10-21 11:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475086637-1914-7-git-send-email-fu.wei@linaro.org>
On Thu, Sep 29, 2016 at 02:17:14AM +0800, fu.wei at linaro.org wrote:
> From: Fu Wei <fu.wei@linaro.org>
>
> On platforms booting with ACPI, architected memory-mapped timers'
> configuration data is provided by firmware through the ACPI GTDT
> static table.
>
> The clocksource architected timer kernel driver requires a firmware
> interface to collect timer configuration and configure its driver.
> this infrastructure is present for device tree systems, but it is
> missing on systems booting with ACPI.
>
> Implement the kernel infrastructure required to parse the static
> ACPI GTDT table so that the architected timer clocksource driver can
> make use of it on systems booting with ACPI, therefore enabling
> the corresponding timers configuration.
>
> Signed-off-by: Fu Wei <fu.wei@linaro.org>
> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> ---
> drivers/acpi/arm64/gtdt.c | 70 ++++++++++++++++++++++++++++++++++++
> include/clocksource/arm_arch_timer.h | 15 ++++++++
> include/linux/acpi.h | 1 +
> 3 files changed, 86 insertions(+)
>
> diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
> index b24844d..b6021db 100644
> --- a/drivers/acpi/arm64/gtdt.c
> +++ b/drivers/acpi/arm64/gtdt.c
> @@ -150,3 +150,73 @@ int __init acpi_gtdt_init(struct acpi_table_header *table)
>
> return gtdt->platform_timer_count;
> }
> +
> +static int __init gtdt_parse_gt_block(struct acpi_gtdt_timer_block *block,
> + struct gt_block_data *data)
> +{
> + struct acpi_gtdt_timer_entry *frame;
> + int i;
> +
> + if (!block || !data)
> + return -EINVAL;
As far as I can see, the !block case cannot happen; if it can, we'd
already have derferenced it with the is_timer_block() check in
gtdt_arch_timer_mem_init().
Why do we not handle the !data check in gtdt_arch_timer_mem_init()? It
seems fragile, given we add an index there...
> +
> + if (!block->block_address || !block->timer_count)
> + return -EINVAL;
Looking at Table 5-120 in the ACPI 6.1 spec, zero is not called out as
an invalid physical address for the block...
Surely if you don't have an MMIO timer, you don't have a GT Block
Structure, rather than an invalid one!?
The block->timer_count check should be more thorough, e.g.
if (!block->timer_count) {
pr_warn("GTDT present, but frame count is zero");
return -ENODEV:
}
if (block->timer_count > 8) {
pr_warn(FW_BUG "GTDT lists %d frames, ACPI spec only allows 8\n",
block->timer_count);
}
... note that without the latter we could go off the end of the array...
> + data->cntctlbase_phy = (phys_addr_t)block->block_address;
> + data->timer_count = block->timer_count;
> +
> + frame = (void *)block + block->timer_offset;
> + if (frame + block->timer_count != (void *)block + block->header.length)
> + return -EINVAL;
> +
> + /*
> + * Get the GT timer Frame data for every GT Block Timer
> + */
> + for (i = 0; i < block->timer_count; i++, frame++) {
> + if (!frame->base_address || !frame->timer_interrupt)
> + return -EINVAL;
> +
> + data->timer[i].irq = map_gt_gsi(frame->timer_interrupt,
> + frame->timer_flags);
> + if (data->timer[i].irq <= 0)
> + return -EINVAL;
Can we please print something describing the failure, e.g.
pr_warn("failed to map GTDT frame %d, physical timer interrupt\n",
i);
> +
> + if (frame->virtual_timer_interrupt) {
Same comment as previously about GSIV zero being valid; this is arguably
a spec bug that should be reported...
> + data->timer[i].virtual_irq =
> + map_gt_gsi(frame->virtual_timer_interrupt,
> + frame->virtual_timer_flags);
> + if (data->timer[i].virtual_irq <= 0)
> + return -EINVAL;
Likewise, a message here would be useful, e.g.
pr_warn("failed to map GTDT frame %d, virtual timer interrupt\n",
i);
> + }
> +
> + data->timer[i].frame_nr = frame->frame_number;
> + data->timer[i].cntbase_phy = frame->base_address;
What about CntEL0BaseX?
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * Get the GT block info for memory-mapped timer from GTDT table.
> + */
> +int __init gtdt_arch_timer_mem_init(struct gt_block_data *data)
> +{
> + void *platform_timer;
> + int index = 0;
> + int ret;
> +
> + for_each_platform_timer(platform_timer) {
> + if (!is_timer_block(platform_timer))
> + continue;
> + ret = gtdt_parse_gt_block(platform_timer, data + index);
> + if (ret)
> + return ret;
> + index++;
> + }
> +
> + if (index)
> + pr_info("found %d memory-mapped timer block(s).\n", index);
> +
> + return index;
> +}
> diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
> index 16dcd10..94a5d14 100644
> --- a/include/clocksource/arm_arch_timer.h
> +++ b/include/clocksource/arm_arch_timer.h
> @@ -56,6 +56,8 @@ enum spi_nr {
> #define ARCH_TIMER_MEM_PHYS_ACCESS 2
> #define ARCH_TIMER_MEM_VIRT_ACCESS 3
>
> +#define ARCH_TIMER_MEM_MAX_FRAME 8
Nit: please call this ARCH_TIMER_MEM_MAX_FRAMES, so it's clear that the
maximum index is 7.
> #define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */
> #define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */
> #define ARCH_TIMER_VIRT_EVT_EN (1 << 2)
> @@ -71,6 +73,19 @@ struct arch_timer_kvm_info {
> int virtual_irq;
> };
>
> +struct gt_timer_data {
s/gt_timer_data/arch_timer_mem_frame/
> + int frame_nr;
> + phys_addr_t cntbase_phy;
Please get rid of the '_phy' suffix; it clashes with other terminology,
'phys' is generally preferable, and given the name and type it's obvious
that it's a physical address anyhow.
Just call this 'cntbase'.
> + int irq;
> + int virtual_irq;
Call these phys_irq and virt_irq.
> +};
> +
> +struct gt_block_data {
s/gt_block_data/arch_timer_mem/
> + phys_addr_t cntctlbase_phy;
Same comment w.r.t. the '_phy' suffix. Likewise, just call this
'cntctlbase_phy'
> + int timer_count;
s/timer_count/num_frames/
> + struct gt_timer_data timer[ARCH_TIMER_MEM_MAX_FRAME];
> +};
Please split this part out into a patch which moves the existing driver
over to this new abstraction, *then* introduce the ACPI parser for it in
a subsequent patch.
Thanks,
Mark.
^ permalink raw reply
* [RFC PATCH 7/8] KVM: arm64: vgic-its: fix compatability with 32-bit
From: Vladimir Murzin @ 2016-10-21 11:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5ea0ecc0-edb1-f770-16f3-7c48dbdb5c29@arm.com>
On 21/10/16 10:49, Andre Przywara wrote:
> Hi,
>
> On 21/10/16 10:36, Vladimir Murzin wrote:
>> Evaluate GITS_BASER_ENTRY_SIZE once as an int data (GITS_BASER<n>'s
>> Entry Size is 5-bit wide only), so when used as divider no reference
>> to __aeabi_uldivmod is generated when build for AArch32.
>>
>> Use unsigned long long for GITS_BASER_PAGE_SIZE_* since they are
>> used in conjunction with 64-bit data.
>>
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>
> Looks good to me, thanks for fixing this!
>
> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Thanks!
Vladimir
>
> Cheers,
> Andre.
>
>> ---
>> include/linux/irqchip/arm-gic-v3.h | 8 ++++----
>> virt/kvm/arm/vgic/vgic-its.c | 11 ++++++-----
>> 2 files changed, 10 insertions(+), 9 deletions(-)
>>
>> diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
>> index 5118d3a..e808f8a 100644
>> --- a/include/linux/irqchip/arm-gic-v3.h
>> +++ b/include/linux/irqchip/arm-gic-v3.h
>> @@ -295,10 +295,10 @@
>> #define GITS_BASER_InnerShareable \
>> GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable)
>> #define GITS_BASER_PAGE_SIZE_SHIFT (8)
>> -#define GITS_BASER_PAGE_SIZE_4K (0UL << GITS_BASER_PAGE_SIZE_SHIFT)
>> -#define GITS_BASER_PAGE_SIZE_16K (1UL << GITS_BASER_PAGE_SIZE_SHIFT)
>> -#define GITS_BASER_PAGE_SIZE_64K (2UL << GITS_BASER_PAGE_SIZE_SHIFT)
>> -#define GITS_BASER_PAGE_SIZE_MASK (3UL << GITS_BASER_PAGE_SIZE_SHIFT)
>> +#define GITS_BASER_PAGE_SIZE_4K (0ULL << GITS_BASER_PAGE_SIZE_SHIFT)
>> +#define GITS_BASER_PAGE_SIZE_16K (1ULL << GITS_BASER_PAGE_SIZE_SHIFT)
>> +#define GITS_BASER_PAGE_SIZE_64K (2ULL << GITS_BASER_PAGE_SIZE_SHIFT)
>> +#define GITS_BASER_PAGE_SIZE_MASK (3ULL << GITS_BASER_PAGE_SIZE_SHIFT)
>> #define GITS_BASER_PAGES_MAX 256
>> #define GITS_BASER_PAGES_SHIFT (0)
>> #define GITS_BASER_NR_PAGES(r) (((r) & 0xff) + 1)
>> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
>> index 4660a7d..8c2b3cd 100644
>> --- a/virt/kvm/arm/vgic/vgic-its.c
>> +++ b/virt/kvm/arm/vgic/vgic-its.c
>> @@ -632,21 +632,22 @@ static bool vgic_its_check_id(struct vgic_its *its, u64 baser, int id)
>> int index;
>> u64 indirect_ptr;
>> gfn_t gfn;
>> + int esz = GITS_BASER_ENTRY_SIZE(baser);
>>
>> if (!(baser & GITS_BASER_INDIRECT)) {
>> phys_addr_t addr;
>>
>> - if (id >= (l1_tbl_size / GITS_BASER_ENTRY_SIZE(baser)))
>> + if (id >= (l1_tbl_size / esz))
>> return false;
>>
>> - addr = BASER_ADDRESS(baser) + id * GITS_BASER_ENTRY_SIZE(baser);
>> + addr = BASER_ADDRESS(baser) + id * esz;
>> gfn = addr >> PAGE_SHIFT;
>>
>> return kvm_is_visible_gfn(its->dev->kvm, gfn);
>> }
>>
>> /* calculate and check the index into the 1st level */
>> - index = id / (SZ_64K / GITS_BASER_ENTRY_SIZE(baser));
>> + index = id / (SZ_64K / esz);
>> if (index >= (l1_tbl_size / sizeof(u64)))
>> return false;
>>
>> @@ -670,8 +671,8 @@ static bool vgic_its_check_id(struct vgic_its *its, u64 baser, int id)
>> indirect_ptr &= GENMASK_ULL(51, 16);
>>
>> /* Find the address of the actual entry */
>> - index = id % (SZ_64K / GITS_BASER_ENTRY_SIZE(baser));
>> - indirect_ptr += index * GITS_BASER_ENTRY_SIZE(baser);
>> + index = id % (SZ_64K / esz);
>> + indirect_ptr += index * esz;
>> gfn = indirect_ptr >> PAGE_SHIFT;
>>
>> return kvm_is_visible_gfn(its->dev->kvm, gfn);
>>
>
^ permalink raw reply
* [RFC PATCH 8/8] ARM: KVM: Support vGICv3 ITS
From: Vladimir Murzin @ 2016-10-21 11:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <857fb7fd-b8eb-7a44-2a6c-be2ec41927ec@arm.com>
On 21/10/16 12:02, Andre Przywara wrote:
> Hi,
>
> On 21/10/16 10:36, Vladimir Murzin wrote:
>> This patch allows to build and use vGICv3 ITS in 32-bit mode.
>
> Ah, what a relief to see that config option go. Thanks for that!
>
> I quickly booted an ITS guest on a (64-bit) model and couldn't spot any
> regressions.
Awesome!
>
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>
> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Thanks for your time!
Cheers
Vladimir
>
> Cheers,
> Andre.
>
>> ---
>> Documentation/virtual/kvm/api.txt | 2 +-
>> arch/arm/include/uapi/asm/kvm.h | 2 ++
>> arch/arm/kvm/Kconfig | 1 +
>> arch/arm/kvm/Makefile | 1 +
>> arch/arm/kvm/arm.c | 6 ++++++
>> arch/arm64/kvm/Kconfig | 4 ----
>> arch/arm64/kvm/reset.c | 6 ------
>> virt/kvm/arm/vgic/vgic-kvm-device.c | 2 --
>> virt/kvm/arm/vgic/vgic-mmio-v3.c | 2 --
>> virt/kvm/arm/vgic/vgic.h | 26 --------------------------
>> 10 files changed, 11 insertions(+), 41 deletions(-)
>>
>> diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
>> index 739db9a..2feeae6 100644
>> --- a/Documentation/virtual/kvm/api.txt
>> +++ b/Documentation/virtual/kvm/api.txt
>> @@ -2198,7 +2198,7 @@ after pausing the vcpu, but before it is resumed.
>> 4.71 KVM_SIGNAL_MSI
>>
>> Capability: KVM_CAP_SIGNAL_MSI
>> -Architectures: x86 arm64
>> +Architectures: x86 arm arm64
>> Type: vm ioctl
>> Parameters: struct kvm_msi (in)
>> Returns: >0 on delivery, 0 if guest blocked the MSI, and -1 on error
>> diff --git a/arch/arm/include/uapi/asm/kvm.h b/arch/arm/include/uapi/asm/kvm.h
>> index b38c10c..af05f8e 100644
>> --- a/arch/arm/include/uapi/asm/kvm.h
>> +++ b/arch/arm/include/uapi/asm/kvm.h
>> @@ -87,9 +87,11 @@ struct kvm_regs {
>> /* Supported VGICv3 address types */
>> #define KVM_VGIC_V3_ADDR_TYPE_DIST 2
>> #define KVM_VGIC_V3_ADDR_TYPE_REDIST 3
>> +#define KVM_VGIC_ITS_ADDR_TYPE 4
>>
>> #define KVM_VGIC_V3_DIST_SIZE SZ_64K
>> #define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K)
>> +#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K)
>>
>> #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
>> #define KVM_ARM_VCPU_PSCI_0_2 1 /* CPU uses PSCI v0.2 */
>> diff --git a/arch/arm/kvm/Kconfig b/arch/arm/kvm/Kconfig
>> index 3e1cd04..90d0176 100644
>> --- a/arch/arm/kvm/Kconfig
>> +++ b/arch/arm/kvm/Kconfig
>> @@ -34,6 +34,7 @@ config KVM
>> select HAVE_KVM_IRQFD
>> select HAVE_KVM_IRQCHIP
>> select HAVE_KVM_IRQ_ROUTING
>> + select HAVE_KVM_MSI
>> depends on ARM_VIRT_EXT && ARM_LPAE && ARM_ARCH_TIMER
>> ---help---
>> Support hosting virtualized guest machines.
>> diff --git a/arch/arm/kvm/Makefile b/arch/arm/kvm/Makefile
>> index f19842e..d571243 100644
>> --- a/arch/arm/kvm/Makefile
>> +++ b/arch/arm/kvm/Makefile
>> @@ -32,5 +32,6 @@ obj-y += $(KVM)/arm/vgic/vgic-mmio.o
>> obj-y += $(KVM)/arm/vgic/vgic-mmio-v2.o
>> obj-y += $(KVM)/arm/vgic/vgic-mmio-v3.o
>> obj-y += $(KVM)/arm/vgic/vgic-kvm-device.o
>> +obj-y += $(KVM)/arm/vgic/vgic-its.o
>> obj-y += $(KVM)/irqchip.o
>> obj-y += $(KVM)/arm/arch_timer.o
>> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
>> index 03e9273..8b13448 100644
>> --- a/arch/arm/kvm/arm.c
>> +++ b/arch/arm/kvm/arm.c
>> @@ -209,6 +209,12 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
>> case KVM_CAP_MAX_VCPUS:
>> r = KVM_MAX_VCPUS;
>> break;
>> + case KVM_CAP_MSI_DEVID:
>> + if (!kvm)
>> + r = -EINVAL;
>> + else
>> + r = kvm->arch.vgic.msis_require_devid;
>> + break;
>> default:
>> r = kvm_arch_dev_ioctl_check_extension(kvm, ext);
>> break;
>> diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
>> index 6eaf12c..52cb7ad 100644
>> --- a/arch/arm64/kvm/Kconfig
>> +++ b/arch/arm64/kvm/Kconfig
>> @@ -16,9 +16,6 @@ menuconfig VIRTUALIZATION
>>
>> if VIRTUALIZATION
>>
>> -config KVM_ARM_VGIC_V3_ITS
>> - bool
>> -
>> config KVM
>> bool "Kernel-based Virtual Machine (KVM) support"
>> depends on OF
>> @@ -34,7 +31,6 @@ config KVM
>> select KVM_VFIO
>> select HAVE_KVM_EVENTFD
>> select HAVE_KVM_IRQFD
>> - select KVM_ARM_VGIC_V3_ITS
>> select KVM_ARM_PMU if HW_PERF_EVENTS
>> select HAVE_KVM_MSI
>> select HAVE_KVM_IRQCHIP
>> diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
>> index 5bc4608..e95d4f6 100644
>> --- a/arch/arm64/kvm/reset.c
>> +++ b/arch/arm64/kvm/reset.c
>> @@ -86,12 +86,6 @@ int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
>> case KVM_CAP_VCPU_ATTRIBUTES:
>> r = 1;
>> break;
>> - case KVM_CAP_MSI_DEVID:
>> - if (!kvm)
>> - r = -EINVAL;
>> - else
>> - r = kvm->arch.vgic.msis_require_devid;
>> - break;
>> default:
>> r = 0;
>> }
>> diff --git a/virt/kvm/arm/vgic/vgic-kvm-device.c b/virt/kvm/arm/vgic/vgic-kvm-device.c
>> index ce1f4ed..fbe87a6 100644
>> --- a/virt/kvm/arm/vgic/vgic-kvm-device.c
>> +++ b/virt/kvm/arm/vgic/vgic-kvm-device.c
>> @@ -221,11 +221,9 @@ int kvm_register_vgic_device(unsigned long type)
>> ret = kvm_register_device_ops(&kvm_arm_vgic_v3_ops,
>> KVM_DEV_TYPE_ARM_VGIC_V3);
>>
>> -#ifdef CONFIG_KVM_ARM_VGIC_V3_ITS
>> if (ret)
>> break;
>> ret = kvm_vgic_register_its_device();
>> -#endif
>> break;
>> }
>>
>> diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c
>> index 0d3c76a..50f42f0 100644
>> --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c
>> +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c
>> @@ -42,7 +42,6 @@ u64 update_64bit_reg(u64 reg, unsigned int offset, unsigned int len,
>> return reg | ((u64)val << lower);
>> }
>>
>> -#ifdef CONFIG_KVM_ARM_VGIC_V3_ITS
>> bool vgic_has_its(struct kvm *kvm)
>> {
>> struct vgic_dist *dist = &kvm->arch.vgic;
>> @@ -52,7 +51,6 @@ bool vgic_has_its(struct kvm *kvm)
>>
>> return dist->has_its;
>> }
>> -#endif
>>
>> static unsigned long vgic_mmio_read_v3_misc(struct kvm_vcpu *vcpu,
>> gpa_t addr, unsigned int len)
>> diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
>> index 9d9e014..859f65c 100644
>> --- a/virt/kvm/arm/vgic/vgic.h
>> +++ b/virt/kvm/arm/vgic/vgic.h
>> @@ -84,37 +84,11 @@ static inline void vgic_get_irq_kref(struct vgic_irq *irq)
>> int vgic_v3_map_resources(struct kvm *kvm);
>> int vgic_register_redist_iodevs(struct kvm *kvm, gpa_t dist_base_address);
>>
>> -#ifdef CONFIG_KVM_ARM_VGIC_V3_ITS
>> int vgic_register_its_iodevs(struct kvm *kvm);
>> bool vgic_has_its(struct kvm *kvm);
>> int kvm_vgic_register_its_device(void);
>> void vgic_enable_lpis(struct kvm_vcpu *vcpu);
>> int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi);
>> -#else
>> -static inline int vgic_register_its_iodevs(struct kvm *kvm)
>> -{
>> - return -ENODEV;
>> -}
>> -
>> -static inline bool vgic_has_its(struct kvm *kvm)
>> -{
>> - return false;
>> -}
>> -
>> -static inline int kvm_vgic_register_its_device(void)
>> -{
>> - return -ENODEV;
>> -}
>> -
>> -static inline void vgic_enable_lpis(struct kvm_vcpu *vcpu)
>> -{
>> -}
>> -
>> -static inline int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
>> -{
>> - return -ENODEV;
>> -}
>> -#endif
>>
>> int kvm_register_vgic_device(unsigned long type);
>> int vgic_lazy_init(struct kvm *kvm);
>>
>
^ permalink raw reply
* [PATCH v14 5/9] clocksource/drivers/arm_arch_timer: Simplify ACPI support code.
From: Mark Rutland @ 2016-10-21 11:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021111352.GA16630@leverpostej>
On Fri, Oct 21, 2016 at 12:14:01PM +0100, Mark Rutland wrote:
> On Thu, Oct 20, 2016 at 05:58:17PM +0100, Mark Rutland wrote:
> > On Thu, Sep 29, 2016 at 02:17:13AM +0800, fu.wei at linaro.org wrote:
> > > + arch_timer_ppi[PHYS_NONSECURE_PPI] = acpi_gtdt_map_ppi(PHYS_NONSECURE_PPI);
> > > + arch_timer_ppi[VIRT_PPI] = acpi_gtdt_map_ppi(VIRT_PPI);
> > > + arch_timer_ppi[HYP_PPI] = acpi_gtdt_map_ppi(HYP_PPI);
> > > + /* Always-on capability */
> > > + arch_timer_c3stop = acpi_gtdt_c3stop();
> >
> > ... I think we should check the flag on the relevant interrupt, though
> > that's worth clarifying.
>
> I see I misread the spec; this is part of the common flags.
>
> Please ignore this point; sorry for the noise.
Actually, I misread the spec this time around; the flag *can* differ per
interrupt for the sysreg/cp15 timer, but not for the MMIO timers where
the flag is in a common field.
So please *do* consider the above.
Thanks,
Mark.
^ permalink raw reply
* [PATCH v4 0/3] arm64/mm: use the contiguous attribute for kernel mappings
From: Ard Biesheuvel @ 2016-10-21 11:22 UTC (permalink / raw)
To: linux-arm-kernel
Back to a 3-piece series.
Changes in v4:
- dropped handling of contiguous PUDs and folded PMDs, given that the hardware
is likely to ignore the contiguous bit at this level anyway
- factor out the pte/pmd/pgd attribute BUG check (#1)
Changes in v3 [0]:
- add support for contiguous PMDs for all granule sizes (not just 16k)
- add a separate patch to deal with contiguous PUDs (4k granule only), and
contiguous PMDs for 2 levels of translation (which requires special handling)
- avoid pmd_none/pud_none in the BUG() statements in patch #1, since they
may resolve in unexpected ways with folded PMDs/PUDs
Version v2 [1] addressed the following issues:
- the contiguous attribute is also useful for contigous PMD mappings on 16k
granule kernels (i.e., 1 GB blocks)
- the function parameter 'block_mappings_allowed' does not clearly convey
whether contiguous page mappings should be used, so it is renamed to
'page_mappings_only', and its meaning inverted
- instead of BUGging on changes in the PTE_CONT attribute in PMD or PTE entries
that have been populated already, BUG on any modification except for
permission attributes, which don't require break-before-make when changed.
[0] http://marc.info/?l=linux-arm-kernel&m=147627155206982
[1] http://marc.info/?l=linux-arm-kernel&m=147618975314593
Ard Biesheuvel (3):
arm64: mm: BUG on unsupported manipulations of live kernel mappings
arm64: mm: replace 'block_mappings_allowed' with 'page_mappings_only'
arm64: mm: set the contiguous bit for kernel mappings where
appropriate
arch/arm64/include/asm/mmu.h | 2 +-
arch/arm64/kernel/efi.c | 8 +-
arch/arm64/mm/mmu.c | 134 +++++++++++++-------
3 files changed, 93 insertions(+), 51 deletions(-)
--
2.7.4
^ permalink raw reply
* [PATCH v4 1/3] arm64: mm: BUG on unsupported manipulations of live kernel mappings
From: Ard Biesheuvel @ 2016-10-21 11:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477048978-4140-1-git-send-email-ard.biesheuvel@linaro.org>
Now that we take care not manipulate the live kernel page tables in a
way that may lead to TLB conflicts, the case where a table mapping is
replaced by a block mapping can no longer occur. So remove the handling
of this at the PUD and PMD levels, and instead, BUG() on any occurrence
of live kernel page table manipulations that modify anything other than
the permission bits.
Since mark_rodata_ro() is the only caller where the kernel mappings that
are being manipulated are actually live, drop the various conditional
flush_tlb_all() invocations, and add a single call to mark_rodata_ro()
instead.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/mm/mmu.c | 70 ++++++++++++--------
1 file changed, 43 insertions(+), 27 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 05615a3fdc6f..27dc0e5012a8 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -28,8 +28,6 @@
#include <linux/memblock.h>
#include <linux/fs.h>
#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/stop_machine.h>
#include <asm/barrier.h>
#include <asm/cputype.h>
@@ -95,6 +93,17 @@ static phys_addr_t __init early_pgtable_alloc(void)
return phys;
}
+static bool pgattr_change_is_safe(u64 old, u64 new)
+{
+ /*
+ * The following mapping attributes may be updated in live
+ * kernel mappings without the need for break-before-make.
+ */
+ static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE;
+
+ return old == 0 || new == 0 || ((old ^ new) & ~mask) == 0;
+}
+
static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
unsigned long end, unsigned long pfn,
pgprot_t prot,
@@ -115,8 +124,17 @@ static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
pte = pte_set_fixmap_offset(pmd, addr);
do {
+ pte_t old_pte = *pte;
+
set_pte(pte, pfn_pte(pfn, prot));
pfn++;
+
+ /*
+ * After the PTE entry has been populated once, we
+ * only allow updates to the permission attributes.
+ */
+ BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte)));
+
} while (pte++, addr += PAGE_SIZE, addr != end);
pte_clear_fixmap();
@@ -146,27 +164,27 @@ static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
pmd = pmd_set_fixmap_offset(pud, addr);
do {
+ pmd_t old_pmd = *pmd;
+
next = pmd_addr_end(addr, end);
+
/* try section mapping first */
if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
allow_block_mappings) {
- pmd_t old_pmd =*pmd;
pmd_set_huge(pmd, phys, prot);
+
/*
- * Check for previous table entries created during
- * boot (__create_page_tables) and flush them.
+ * After the PMD entry has been populated once, we
+ * only allow updates to the permission attributes.
*/
- if (!pmd_none(old_pmd)) {
- flush_tlb_all();
- if (pmd_table(old_pmd)) {
- phys_addr_t table = pmd_page_paddr(old_pmd);
- if (!WARN_ON_ONCE(slab_is_available()))
- memblock_free(table, PAGE_SIZE);
- }
- }
+ BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
+ pmd_val(*pmd)));
} else {
alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys),
prot, pgtable_alloc);
+
+ BUG_ON(pmd_val(old_pmd) != 0 &&
+ pmd_val(old_pmd) != pmd_val(*pmd));
}
phys += next - addr;
} while (pmd++, addr = next, addr != end);
@@ -204,33 +222,28 @@ static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
pud = pud_set_fixmap_offset(pgd, addr);
do {
+ pud_t old_pud = *pud;
+
next = pud_addr_end(addr, end);
/*
* For 4K granule only, attempt to put down a 1GB block
*/
if (use_1G_block(addr, next, phys) && allow_block_mappings) {
- pud_t old_pud = *pud;
pud_set_huge(pud, phys, prot);
/*
- * If we have an old value for a pud, it will
- * be pointing to a pmd table that we no longer
- * need (from swapper_pg_dir).
- *
- * Look up the old pmd table and free it.
+ * After the PUD entry has been populated once, we
+ * only allow updates to the permission attributes.
*/
- if (!pud_none(old_pud)) {
- flush_tlb_all();
- if (pud_table(old_pud)) {
- phys_addr_t table = pud_page_paddr(old_pud);
- if (!WARN_ON_ONCE(slab_is_available()))
- memblock_free(table, PAGE_SIZE);
- }
- }
+ BUG_ON(!pgattr_change_is_safe(pud_val(old_pud),
+ pud_val(*pud)));
} else {
alloc_init_pmd(pud, addr, next, phys, prot,
pgtable_alloc, allow_block_mappings);
+
+ BUG_ON(pud_val(old_pud) != 0 &&
+ pud_val(old_pud) != pud_val(*pud));
}
phys += next - addr;
} while (pud++, addr = next, addr != end);
@@ -396,6 +409,9 @@ void mark_rodata_ro(void)
section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
create_mapping_late(__pa(__start_rodata), (unsigned long)__start_rodata,
section_size, PAGE_KERNEL_RO);
+
+ /* flush the TLBs after updating live kernel mappings */
+ flush_tlb_all();
}
static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end,
--
2.7.4
^ permalink raw reply related
* [PATCH v4 2/3] arm64: mm: replace 'block_mappings_allowed' with 'page_mappings_only'
From: Ard Biesheuvel @ 2016-10-21 11:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477048978-4140-1-git-send-email-ard.biesheuvel@linaro.org>
In preparation of adding support for contiguous PTE and PMD mappings,
let's replace 'block_mappings_allowed' with 'page_mappings_only', which
will be a more accurate description of the nature of the setting once we
add such contiguous mappings into the mix.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/include/asm/mmu.h | 2 +-
arch/arm64/kernel/efi.c | 8 ++---
arch/arm64/mm/mmu.c | 32 ++++++++++----------
3 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h
index 8d9fce037b2f..a81454ad5455 100644
--- a/arch/arm64/include/asm/mmu.h
+++ b/arch/arm64/include/asm/mmu.h
@@ -34,7 +34,7 @@ extern void __iomem *early_io_map(phys_addr_t phys, unsigned long virt);
extern void init_mem_pgprot(void);
extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
unsigned long virt, phys_addr_t size,
- pgprot_t prot, bool allow_block_mappings);
+ pgprot_t prot, bool page_mappings_only);
extern void *fixmap_remap_fdt(phys_addr_t dt_phys);
#endif
diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c
index ba9bee389fd5..5d17f377d905 100644
--- a/arch/arm64/kernel/efi.c
+++ b/arch/arm64/kernel/efi.c
@@ -62,8 +62,8 @@ struct screen_info screen_info __section(.data);
int __init efi_create_mapping(struct mm_struct *mm, efi_memory_desc_t *md)
{
pteval_t prot_val = create_mapping_protection(md);
- bool allow_block_mappings = (md->type != EFI_RUNTIME_SERVICES_CODE &&
- md->type != EFI_RUNTIME_SERVICES_DATA);
+ bool page_mappings_only = (md->type == EFI_RUNTIME_SERVICES_CODE ||
+ md->type == EFI_RUNTIME_SERVICES_DATA);
if (!PAGE_ALIGNED(md->phys_addr) ||
!PAGE_ALIGNED(md->num_pages << EFI_PAGE_SHIFT)) {
@@ -76,12 +76,12 @@ int __init efi_create_mapping(struct mm_struct *mm, efi_memory_desc_t *md)
* from the MMU routines. So avoid block mappings altogether in
* that case.
*/
- allow_block_mappings = false;
+ page_mappings_only = true;
}
create_pgd_mapping(mm, md->phys_addr, md->virt_addr,
md->num_pages << EFI_PAGE_SHIFT,
- __pgprot(prot_val | PTE_NG), allow_block_mappings);
+ __pgprot(prot_val | PTE_NG), page_mappings_only);
return 0;
}
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 27dc0e5012a8..7b0dd07212ae 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -143,7 +143,7 @@ static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
phys_addr_t phys, pgprot_t prot,
phys_addr_t (*pgtable_alloc)(void),
- bool allow_block_mappings)
+ bool page_mappings_only)
{
pmd_t *pmd;
unsigned long next;
@@ -170,7 +170,7 @@ static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
/* try section mapping first */
if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
- allow_block_mappings) {
+ !page_mappings_only) {
pmd_set_huge(pmd, phys, prot);
/*
@@ -207,7 +207,7 @@ static inline bool use_1G_block(unsigned long addr, unsigned long next,
static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
phys_addr_t phys, pgprot_t prot,
phys_addr_t (*pgtable_alloc)(void),
- bool allow_block_mappings)
+ bool page_mappings_only)
{
pud_t *pud;
unsigned long next;
@@ -229,7 +229,7 @@ static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
/*
* For 4K granule only, attempt to put down a 1GB block
*/
- if (use_1G_block(addr, next, phys) && allow_block_mappings) {
+ if (use_1G_block(addr, next, phys) && !page_mappings_only) {
pud_set_huge(pud, phys, prot);
/*
@@ -240,7 +240,7 @@ static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
pud_val(*pud)));
} else {
alloc_init_pmd(pud, addr, next, phys, prot,
- pgtable_alloc, allow_block_mappings);
+ pgtable_alloc, page_mappings_only);
BUG_ON(pud_val(old_pud) != 0 &&
pud_val(old_pud) != pud_val(*pud));
@@ -255,7 +255,7 @@ static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
unsigned long virt, phys_addr_t size,
pgprot_t prot,
phys_addr_t (*pgtable_alloc)(void),
- bool allow_block_mappings)
+ bool page_mappings_only)
{
unsigned long addr, length, end, next;
pgd_t *pgd = pgd_offset_raw(pgdir, virt);
@@ -275,7 +275,7 @@ static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
do {
next = pgd_addr_end(addr, end);
alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc,
- allow_block_mappings);
+ page_mappings_only);
phys += next - addr;
} while (pgd++, addr = next, addr != end);
}
@@ -304,17 +304,17 @@ static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt,
&phys, virt);
return;
}
- __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, true);
+ __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false);
}
void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
unsigned long virt, phys_addr_t size,
- pgprot_t prot, bool allow_block_mappings)
+ pgprot_t prot, bool page_mappings_only)
{
BUG_ON(mm == &init_mm);
__create_pgd_mapping(mm->pgd, phys, virt, size, prot,
- pgd_pgtable_alloc, allow_block_mappings);
+ pgd_pgtable_alloc, page_mappings_only);
}
static void create_mapping_late(phys_addr_t phys, unsigned long virt,
@@ -327,7 +327,7 @@ static void create_mapping_late(phys_addr_t phys, unsigned long virt,
}
__create_pgd_mapping(init_mm.pgd, phys, virt, size, prot,
- NULL, !debug_pagealloc_enabled());
+ NULL, debug_pagealloc_enabled());
}
static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end)
@@ -345,7 +345,7 @@ static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end
__create_pgd_mapping(pgd, start, __phys_to_virt(start),
end - start, PAGE_KERNEL,
early_pgtable_alloc,
- !debug_pagealloc_enabled());
+ debug_pagealloc_enabled());
return;
}
@@ -358,13 +358,13 @@ static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end
__phys_to_virt(start),
kernel_start - start, PAGE_KERNEL,
early_pgtable_alloc,
- !debug_pagealloc_enabled());
+ debug_pagealloc_enabled());
if (kernel_end < end)
__create_pgd_mapping(pgd, kernel_end,
__phys_to_virt(kernel_end),
end - kernel_end, PAGE_KERNEL,
early_pgtable_alloc,
- !debug_pagealloc_enabled());
+ debug_pagealloc_enabled());
/*
* Map the linear alias of the [_text, __init_begin) interval as
@@ -374,7 +374,7 @@ static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end
*/
__create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start),
kernel_end - kernel_start, PAGE_KERNEL_RO,
- early_pgtable_alloc, !debug_pagealloc_enabled());
+ early_pgtable_alloc, debug_pagealloc_enabled());
}
static void __init map_mem(pgd_t *pgd)
@@ -424,7 +424,7 @@ static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end,
BUG_ON(!PAGE_ALIGNED(size));
__create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot,
- early_pgtable_alloc, !debug_pagealloc_enabled());
+ early_pgtable_alloc, debug_pagealloc_enabled());
vma->addr = va_start;
vma->phys_addr = pa_start;
--
2.7.4
^ permalink raw reply related
* [PATCH v4 3/3] arm64: mm: set the contiguous bit for kernel mappings where appropriate
From: Ard Biesheuvel @ 2016-10-21 11:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477048978-4140-1-git-send-email-ard.biesheuvel@linaro.org>
Now that we no longer allow live kernel PMDs to be split, it is safe to
start using the contiguous bit for kernel mappings. So set the contiguous
bit in the kernel page mappings for regions whose size and alignment are
suitable for this.
This enables the following contiguous range sizes for the virtual mapping
of the kernel image, and for the linear mapping:
granule size | cont PTE | cont PMD |
-------------+------------+------------+
4 KB | 64 KB | 32 MB |
16 KB | 2 MB | 1 GB* |
64 KB | 2 MB | 16 GB* |
* Only when built for 3 or more levels of translation. This is due to the
fact that a 2 level configuration only consists of PGDs and PTEs, and the
added complexity of dealing with folded PMDs is not justified considering
that 16 GB contiguous ranges are likely to be ignored by the hardware (and
16k/2 levels is a niche configuration)
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/mm/mmu.c | 34 +++++++++++++++++---
1 file changed, 30 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 7b0dd07212ae..dd5f12d0959e 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -107,8 +107,10 @@ static bool pgattr_change_is_safe(u64 old, u64 new)
static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
unsigned long end, unsigned long pfn,
pgprot_t prot,
- phys_addr_t (*pgtable_alloc)(void))
+ phys_addr_t (*pgtable_alloc)(void),
+ bool page_mappings_only)
{
+ pgprot_t __prot = prot;
pte_t *pte;
BUG_ON(pmd_sect(*pmd));
@@ -126,7 +128,18 @@ static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
do {
pte_t old_pte = *pte;
- set_pte(pte, pfn_pte(pfn, prot));
+ /*
+ * Set the contiguous bit for the subsequent group of PTEs if
+ * its size and alignment are appropriate.
+ */
+ if (((addr | PFN_PHYS(pfn)) & ~CONT_PTE_MASK) == 0) {
+ if (end - addr >= CONT_PTE_SIZE && !page_mappings_only)
+ __prot = __pgprot(pgprot_val(prot) | PTE_CONT);
+ else
+ __prot = prot;
+ }
+
+ set_pte(pte, pfn_pte(pfn, __prot));
pfn++;
/*
@@ -145,6 +158,7 @@ static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
phys_addr_t (*pgtable_alloc)(void),
bool page_mappings_only)
{
+ pgprot_t __prot = prot;
pmd_t *pmd;
unsigned long next;
@@ -171,7 +185,18 @@ static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
/* try section mapping first */
if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
!page_mappings_only) {
- pmd_set_huge(pmd, phys, prot);
+ /*
+ * Set the contiguous bit for the subsequent group of
+ * PMDs if its size and alignment are appropriate.
+ */
+ if (((addr | phys) & ~CONT_PMD_MASK) == 0) {
+ if (end - addr >= CONT_PMD_SIZE)
+ __prot = __pgprot(pgprot_val(prot) |
+ PTE_CONT);
+ else
+ __prot = prot;
+ }
+ pmd_set_huge(pmd, phys, __prot);
/*
* After the PMD entry has been populated once, we
@@ -181,7 +206,8 @@ static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
pmd_val(*pmd)));
} else {
alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys),
- prot, pgtable_alloc);
+ prot, pgtable_alloc,
+ page_mappings_only);
BUG_ON(pmd_val(old_pmd) != 0 &&
pmd_val(old_pmd) != pmd_val(*pmd));
--
2.7.4
^ permalink raw reply related
* [PATCH v14 7/9] clocksource/drivers/arm_arch_timer: Refactor the timer init code to prepare for GTDT
From: Mark Rutland @ 2016-10-21 11:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475086637-1914-8-git-send-email-fu.wei@linaro.org>
On Thu, Sep 29, 2016 at 02:17:15AM +0800, fu.wei at linaro.org wrote:
> From: Fu Wei <fu.wei@linaro.org>
>
> The patch refactor original memory-mapped timer init code:
> (1) extract some subfunction for reusing some common code
> a. get_cnttidr
> b. is_best_frame
> (2) move base address and irq code for arch_timer_mem to
> arch_timer_mem_register
>
> Signed-off-by: Fu Wei <fu.wei@linaro.org>
> ---
> drivers/clocksource/arm_arch_timer.c | 159 +++++++++++++++++++++--------------
> 1 file changed, 96 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index c7b0040..e78095f 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -57,6 +57,7 @@
> static unsigned arch_timers_present __initdata;
>
> static void __iomem *arch_counter_base;
> +static void __iomem *cntctlbase __initdata;
>
> struct arch_timer {
> void __iomem *base;
> @@ -656,15 +657,49 @@ out:
> return err;
> }
>
> -static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq)
> +static int __init arch_timer_mem_register(struct device_node *np, void *frame)
> {
> - int ret;
> - irq_handler_t func;
> + struct device_node *frame_node = NULL;
> struct arch_timer *t;
> + void __iomem *base;
> + irq_handler_t func;
> + unsigned int irq;
> + int ret;
> +
> + if (!frame)
> + return -EINVAL;
Why would we call this without a frame?
> +
> + if (np) {
... or without a node?
> + frame_node = (struct device_node *)frame;
> + base = of_iomap(frame_node, 0);
> + arch_timer_detect_rate(base, np);
... BANG! (we check base too late, below).
Please as Marc requested several versions ago: split the FW parsing
(ACPI and DT) so that happens first, *then* once we have the data in a
common format, use that to drive poking the HW, requesting IRQs, etc,
completely independent of the source.
In patches, do this by:
(1) adding the data structures
(2) splitting the existing DT probing to use them
(3) Adding ACPI functionality atop
> -static int __init arch_timer_mem_init(struct device_node *np)
> +static int __init get_cnttidr(struct device_node *np, u32 *cnttidr)
> {
> - struct device_node *frame, *best_frame = NULL;
> - void __iomem *cntctlbase, *base;
> - unsigned int irq, ret = -EINVAL;
> - u32 cnttidr;
> + if (!cnttidr)
> + return -EINVAL;
> +
> + if (np)
> + cntctlbase = of_iomap(np, 0);
> + else
> + return -EINVAL;
We want to check this for ACPI too, no?
Thanks,
Mark.
^ permalink raw reply
* [PATCH] arm64: fix show_regs fallout from KERN_CONT changes
From: Robin Murphy @ 2016-10-21 11:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476962596-21046-1-git-send-email-mark.rutland@arm.com>
Hi Mark,
On 20/10/16 12:23, Mark Rutland wrote:
> Recently in commit 4bcc595ccd80decb ("printk: reinstate KERN_CONT for
> printing continuation lines"), the behaviour of printk changed w.r.t.
> KERN_CONT. Now, KERN_CONT is mandatory to continue existing lines.
> Without this, prefixes are inserted, making output illegible, e.g.
>
> [ 1007.069010] pc : [<ffff00000871898c>] lr : [<ffff000008718948>] pstate: 40000145
> [ 1007.076329] sp : ffff000008d53ec0
> [ 1007.079606] x29: ffff000008d53ec0 [ 1007.082797] x28: 0000000080c50018
> [ 1007.086160]
> [ 1007.087630] x27: ffff000008e0c7f8 [ 1007.090820] x26: ffff80097631ca00
> [ 1007.094183]
> [ 1007.095653] x25: 0000000000000001 [ 1007.098843] x24: 000000ea68b61cac
> [ 1007.102206]
>
> ... or when dumped with the userpace dmesg tool, which has slightly
> different implicit newline behaviour. e.g.
>
> [ 1007.069010] pc : [<ffff00000871898c>] lr : [<ffff000008718948>] pstate: 40000145
> [ 1007.076329] sp : ffff000008d53ec0
> [ 1007.079606] x29: ffff000008d53ec0
> [ 1007.082797] x28: 0000000080c50018
> [ 1007.086160]
> [ 1007.087630] x27: ffff000008e0c7f8
> [ 1007.090820] x26: ffff80097631ca00
> [ 1007.094183]
> [ 1007.095653] x25: 0000000000000001
> [ 1007.098843] x24: 000000ea68b61cac
> [ 1007.102206]
>
> We can't simply always use KERN_CONT for lines which may or may not be
> continuations. That causes line prefixes (e.g. timestamps) to be
> supressed, and the alignment of all but the first line will be broken.
>
> For even more fun, we can't simply insert some dummy empty-string printk
> calls, as GCC warns for an empty printk string, and even if we pass
> KERN_DEFAULT explcitly to silence the warning, the prefix gets swallowed
> unless there is an additional part to the string.
>
> Instead, we must manually iterate over pairs of registers, which gives
> us the legible output we want in either case, e.g.
>
> [ 169.771790] pc : [<ffff00000871898c>] lr : [<ffff000008718948>] pstate: 40000145
> [ 169.779109] sp : ffff000008d53ec0
> [ 169.782386] x29: ffff000008d53ec0 x28: 0000000080c50018
> [ 169.787650] x27: ffff000008e0c7f8 x26: ffff80097631de00
> [ 169.792913] x25: 0000000000000001 x24: 00000027827b2cf4
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will.deacon@arm.com>
> ---
> arch/arm64/kernel/process.c | 15 ++++++++++++---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
> index ddce61b..3f31cf93 100644
> --- a/arch/arm64/kernel/process.c
> +++ b/arch/arm64/kernel/process.c
> @@ -187,10 +187,19 @@ void __show_regs(struct pt_regs *regs)
> printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
> regs->pc, lr, regs->pstate);
> printk("sp : %016llx\n", sp);
> - for (i = top_reg; i >= 0; i--) {
> +
> + i = top_reg;
> +
> + while (i >= 0) {
> printk("x%-2d: %016llx ", i, regs->regs[i]);
> - if (i % 2 == 0)
> - printk("\n");
> + i--;
> +
> + if (i % 2 == 0) {
> + pr_cont("x%-2d: %016llx ", i, regs->regs[i]);
> + i--;
> + }
> +
> + pr_cont("\n");
> }
Might it be nicer to simply do this (or thereabouts)?
for (i = top_reg; i > 1; i -= 2)
printk("x%-2d: %016llx x%-2d: %016llx\n", i-1,
regs->regs[i-1], i, regs->regs[i]);
if (i > 0)
printk("x%-2d: %016llx\n", i-1, regs->regs[i-1]);
Robin.
> printk("\n");
> }
>
^ permalink raw reply
* [PATCH] PM / Domains: Restrict "samsung, power-domain" checks to ARCH_EXYNOS
From: Geert Uytterhoeven @ 2016-10-21 11:34 UTC (permalink / raw)
To: linux-arm-kernel
Currently the generic PM Domain code code checks for the presence of
both (generic) "power-domains" and (Samsung Exynos legacy)
"samsung,power-domain" properties in all device tree nodes representing
devices.
There are two issues with this:
1. This imposes a small boot-time penalty on all platforms using DT,
2. Platform-specific checks do not really belong in core framework
code.
While moving the check from platform-agnostic code to Samsung-specific
code is non-trivial, the runtime overhead can be restricted to kernels
including support for 32-bit Samsung Exynos platforms.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
"samsung,power-domain" was only ever used in:
- arch/arm/boot/dts/exynos4415.dtsi: Unused?
- arch/arm/boot/dts/exynos3250.dtsi: CONFIG_ARCH_EXYNOS3
- arch/arm/boot/dts/exynos4.dtsi: CONFIG_ARCH_EXYNOS4
- arch/arm/boot/dts/exynos4x12.dtsi: CONFIG_ARCH_EXYNOS4
exynos4212.dtsi is unused?
- arch/arm/boot/dts/exynos5250.dtsi: CONFIG_ARCH_EXYNOS5
- arch/arm/boot/dts/exynos5420.dtsi: CONFIG_ARCH_EXYNOS5
---
drivers/base/power/domain.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index e023066e421547c5..d94d6a4b9b527108 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -1853,7 +1853,8 @@ int genpd_dev_pm_attach(struct device *dev)
ret = of_parse_phandle_with_args(dev->of_node, "power-domains",
"#power-domain-cells", 0, &pd_args);
if (ret < 0) {
- if (ret != -ENOENT)
+ if (ret != -ENOENT || !IS_ENABLED(CONFIG_ARCH_EXYNOS) ||
+ IS_ENABLED(CONFIG_64BIT))
return ret;
/*
--
1.9.1
^ permalink raw reply related
* [STLinux Kernel] [PATCH v2 1/6] ARM: dts: STiH407: DT fix s/interrupts-names/interrupt-names/
From: Patrice Chotard @ 2016-10-21 11:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021101156.GA32234@griffinp-ThinkPad-X1-Carbon-2nd>
On 10/21/2016 12:11 PM, Peter Griffin wrote:
> On Fri, 21 Oct 2016, Geert Uytterhoeven wrote:
>
>> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> Acked-by: Rob Herring <robh@kernel.org>
>> ---
>> v2:
>> - Add Acked-by.
>> ---
>
> Acked-by: Peter Griffin <peter.griffin@linaro.org>
>
applied with Peter Acked-by
Thanks Geert
^ permalink raw reply
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