* [PATCH 6/7] ARM: dts: add support for remaining members of Duckbill series
From: Michael Heimpold @ 2016-10-22 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477164150-13553-1-git-send-email-mhei@heimpold.de>
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
---
arch/arm/boot/dts/Makefile | 3 +
arch/arm/boot/dts/imx28-duckbill-485.dts | 60 +++++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-enocean.dts | 90 ++++++++++++++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-spi.dts | 64 ++++++++++++++++++++
4 files changed, 217 insertions(+)
create mode 100644 arch/arm/boot/dts/imx28-duckbill-485.dts
create mode 100644 arch/arm/boot/dts/imx28-duckbill-enocean.dts
create mode 100644 arch/arm/boot/dts/imx28-duckbill-spi.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index befcd26..5a366c4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -459,7 +459,10 @@ dtb-$(CONFIG_ARCH_MXS) += \
imx28-cfa10056.dtb \
imx28-cfa10057.dtb \
imx28-cfa10058.dtb \
+ imx28-duckbill-485.dtb \
imx28-duckbill.dtb \
+ imx28-duckbill-enocean.dtb \
+ imx28-duckbill-spi.dtb \
imx28-eukrea-mbmx283lc.dtb \
imx28-eukrea-mbmx287lc.dtb \
imx28-evk.dtb \
diff --git a/arch/arm/boot/dts/imx28-duckbill-485.dts b/arch/arm/boot/dts/imx28-duckbill-485.dts
new file mode 100644
index 0000000..a60d78a
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-duckbill-485.dts
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2015 I2SE GmbH <info@i2se.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include "imx28-duckbill-common.dtsi"
+
+/ {
+ model = "I2SE Duckbill 485";
+ compatible = "i2se,duckbill", "fsl,imx28";
+
+ apb at 80000000 {
+ apbh at 80000000 {
+ pinctrl at 80018000 {
+ rs485_led_pins: rs485_led_pins at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_SSP2_SCK__GPIO_2_16
+ MX28_PAD_SSP2_MISO__GPIO_2_18
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+ };
+ };
+
+ apbx at 80040000 {
+ auart0: serial at 8006a000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&auart0_2pins_a>;
+ status = "okay";
+ };
+ };
+ };
+
+ rs485_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rs485_led_pins>;
+
+ rs485_red {
+ label = "duckbill:red:rs485";
+ gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
+ };
+
+ rs485_green {
+ label = "duckbill:green:rs485";
+ gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx28-duckbill-enocean.dts b/arch/arm/boot/dts/imx28-duckbill-enocean.dts
new file mode 100644
index 0000000..4602d13
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-duckbill-enocean.dts
@@ -0,0 +1,90 @@
+/*
+ * Copyright (C) 2015 I2SE GmbH <info@i2se.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "imx28-duckbill-common.dtsi"
+
+/ {
+ model = "I2SE Duckbill EnOcean";
+ compatible = "i2se,duckbill", "fsl,imx28";
+
+ apb at 80000000 {
+ apbh at 80000000 {
+ pinctrl at 80018000 {
+ enocean_led_pins: enocean_led_pins at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_SSP2_SCK__GPIO_2_16
+ MX28_PAD_SSP2_MISO__GPIO_2_18
+ MX28_PAD_SSP2_SS0__GPIO_2_19
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+
+ enocean_button: enocean_button at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_SSP2_SS2__GPIO_2_21
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+ };
+ };
+
+ apbx at 80040000 {
+ auart0: serial at 8006a000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&auart0_2pins_a>;
+ status = "okay";
+ };
+ };
+ };
+
+ enocean_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&enocean_led_pins>;
+
+ enocean_blue {
+ label = "duckbill:blue:enocean";
+ gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
+ };
+
+ enocean_red {
+ label = "duckbill:red:enocean";
+ gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
+ };
+
+ enocean_green {
+ label = "duckbill:green:enocean";
+ gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&enocean_button>;
+
+ enocean {
+ label = "EnOcean";
+ linux,code = <KEY_NEW>;
+ gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx28-duckbill-spi.dts b/arch/arm/boot/dts/imx28-duckbill-spi.dts
new file mode 100644
index 0000000..5248d84
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-duckbill-spi.dts
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2013-2014 Michael Heimpold <mhei@heimpold.de>
+ * Copyright (C) 2015 I2SE GmbH <info@i2se.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx28-duckbill-common.dtsi"
+
+/ {
+ model = "I2SE Duckbill SPI";
+ compatible = "i2se,duckbill", "fsl,imx28";
+
+ aliases {
+ ethernet1 = &qca7000;
+ };
+
+ apb at 80000000 {
+ apbh at 80000000 {
+ ssp2: ssp at 80014000 {
+ compatible = "fsl,imx28-spi";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins_a>;
+ status = "okay";
+
+ qca7000: ethernet at 0 {
+ compatible = "qca,qca7000";
+ pinctrl-names = "default";
+ pinctrl-0 = <&qca7000_pins>;
+ reg = <0>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+ spi-cpha;
+ spi-cpol;
+ spi-max-frequency = <8000000>;
+ };
+ };
+
+ pinctrl at 80018000 {
+ qca7000_pins: qca7000-pins at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */
+ MX28_PAD_LCD_D13__GPIO_1_13 /* QCA7K reset */
+ MX28_PAD_LCD_D14__GPIO_1_14 /* GPIO 0 */
+ MX28_PAD_LCD_D15__GPIO_1_15 /* GPIO 1 */
+ MX28_PAD_LCD_D18__GPIO_1_18 /* GPIO 2 */
+ MX28_PAD_LCD_D21__GPIO_1_21 /* GPIO 3 */
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+ };
+ };
+ };
+};
--
2.7.4
^ permalink raw reply related
* [PATCH 5/7] ARM: dts: duckbill: simplify DT and use common definitions
From: Michael Heimpold @ 2016-10-22 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477164150-13553-1-git-send-email-mhei@heimpold.de>
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
---
arch/arm/boot/dts/imx28-duckbill.dts | 99 ++++--------------------------------
1 file changed, 11 insertions(+), 88 deletions(-)
diff --git a/arch/arm/boot/dts/imx28-duckbill.dts b/arch/arm/boot/dts/imx28-duckbill.dts
index ce1a7ef..c3d1ce1 100644
--- a/arch/arm/boot/dts/imx28-duckbill.dts
+++ b/arch/arm/boot/dts/imx28-duckbill.dts
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2013 Michael Heimpold <mhei@heimpold.de>
+ * Copyright (C) 2013-2014,2016 Michael Heimpold <mhei@heimpold.de>
+ * Copyright (C) 2015 I2SE GmbH <info@i2se.com>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
@@ -10,112 +11,34 @@
*/
/dts-v1/;
-#include "imx28.dtsi"
+#include "imx28-duckbill-common.dtsi"
/ {
model = "I2SE Duckbill";
compatible = "i2se,duckbill", "fsl,imx28";
- memory {
- reg = <0x40000000 0x08000000>;
- };
-
apb at 80000000 {
apbh at 80000000 {
- ssp0: ssp at 80010000 {
- compatible = "fsl,imx28-mmc";
+ ssp2: ssp at 80014000 {
+ compatible = "fsl,imx28-spi";
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_4bit_pins_a
- &mmc0_cd_cfg &mmc0_sck_cfg>;
- bus-width = <4>;
- vmmc-supply = <®_3p3v>;
+ pinctrl-0 = <&spi2_pins_a>;
status = "okay";
};
-
- pinctrl at 80018000 {
- pinctrl-names = "default";
- pinctrl-0 = <&hog_pins_a>;
-
- hog_pins_a: hog at 0 {
- reg = <0>;
- fsl,pinmux-ids = <
- MX28_PAD_SSP0_DATA7__GPIO_2_7 /* PHY Reset */
- >;
- fsl,drive-strength = <MXS_DRIVE_4mA>;
- fsl,voltage = <MXS_VOLTAGE_HIGH>;
- fsl,pull-up = <MXS_PULL_DISABLE>;
- };
-
- led_pins_a: led_gpio at 0 {
- reg = <0>;
- fsl,pinmux-ids = <
- MX28_PAD_AUART1_RX__GPIO_3_4
- MX28_PAD_AUART1_TX__GPIO_3_5
- >;
- fsl,drive-strength = <MXS_DRIVE_4mA>;
- fsl,voltage = <MXS_VOLTAGE_HIGH>;
- fsl,pull-up = <MXS_PULL_DISABLE>;
- };
- };
};
apbx at 80040000 {
- duart: serial at 80074000 {
+ i2c0: i2c at 80058000 {
pinctrl-names = "default";
- pinctrl-0 = <&duart_pins_a>;
+ pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
};
- usbphy0: usbphy at 8007c000 {
+ auart0: serial at 8006a000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&auart0_2pins_a>;
status = "okay";
};
};
};
-
- ahb at 80080000 {
- usb0: usb at 80080000 {
- status = "okay";
- };
-
- mac0: ethernet at 800f0000 {
- phy-mode = "rmii";
- pinctrl-names = "default";
- pinctrl-0 = <&mac0_pins_a>;
- phy-supply = <®_3p3v>;
- phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
- phy-reset-duration = <100>;
- status = "okay";
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- reg_3p3v: regulator at 0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "3P3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_pins_a>;
-
- status {
- label = "duckbill:green:status";
- gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
- };
-
- failure {
- label = "duckbill:red:status";
- gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
- };
- };
};
--
2.7.4
^ permalink raw reply related
* [PATCH 4/7] ARM: dts: add I2SE Duckbill common definitions
From: Michael Heimpold @ 2016-10-22 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477164150-13553-1-git-send-email-mhei@heimpold.de>
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
---
arch/arm/boot/dts/imx28-duckbill-2-common.dtsi | 110 +++++++++++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-base.dtsi | 88 ++++++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-common.dtsi | 80 ++++++++++++++++++
3 files changed, 278 insertions(+)
create mode 100644 arch/arm/boot/dts/imx28-duckbill-2-common.dtsi
create mode 100644 arch/arm/boot/dts/imx28-duckbill-base.dtsi
create mode 100644 arch/arm/boot/dts/imx28-duckbill-common.dtsi
diff --git a/arch/arm/boot/dts/imx28-duckbill-2-common.dtsi b/arch/arm/boot/dts/imx28-duckbill-2-common.dtsi
new file mode 100644
index 0000000..3354f8f
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-duckbill-2-common.dtsi
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2013-2014 Michael Heimpold <mhei@heimpold.de>
+ * Copyright (C) 2015 I2SE GmbH <info@i2se.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "imx28-duckbill-base.dtsi"
+
+/ {
+ model = "I2SE Duckbill 2";
+ compatible = "i2se,duckbill", "fsl,imx28";
+
+ apb at 80000000 {
+ apbh at 80000000 {
+ ssp0: ssp at 80010000 {
+ compatible = "fsl,imx28-mmc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_8bit_pins_a
+ &mmc0_cd_cfg &mmc0_sck_cfg>;
+ bus-width = <8>;
+ vmmc-supply = <®_3p3v>;
+ status = "okay";
+ non-removable;
+ };
+
+ pinctrl at 80018000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hog_pins_a>;
+
+ mac0_phy_reset_pin: mac0_phy_reset_pin at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_GPMI_ALE__GPIO_0_26 /* PHY Reset */
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+
+ mac0_phy_int_pin: mac0_phy_int_pin at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_GPMI_D07__GPIO_0_7 /* PHY Interrupt */
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+
+ status_led_pins: status_led_pins at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_SAIF0_MCLK__GPIO_3_20
+ MX28_PAD_SAIF0_LRCLK__GPIO_3_21
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+ };
+ };
+ };
+
+ ahb at 80080000 {
+ mac0: ethernet at 800f0000 {
+ phy-reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+ phy-handle = <ðphy>;
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy: ethernet-phy at 0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mac0_phy_int_pin>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+ max-speed = <100>;
+ };
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&status_led_pins>;
+
+ status_red {
+ label = "duckbill:red:status";
+ gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+
+ status_green {
+ label = "duckbill:green:status";
+ gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx28-duckbill-base.dtsi b/arch/arm/boot/dts/imx28-duckbill-base.dtsi
new file mode 100644
index 0000000..b64efd5
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-duckbill-base.dtsi
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2013-2014 Michael Heimpold <mhei@heimpold.de>
+ * Copyright (C) 2015 I2SE GmbH <info@i2se.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx28.dtsi"
+
+/ {
+ model = "I2SE Duckbill";
+ compatible = "i2se,duckbill", "fsl,imx28";
+
+ memory {
+ reg = <0x40000000 0x08000000>;
+ };
+
+ apb at 80000000 {
+ apbh at 80000000 {
+ pinctrl at 80018000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hog_pins_a>;
+
+ hog_pins_a: hog_pins at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_LCD_D17__GPIO_1_17 /* Revision detection */
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+ };
+ };
+
+ apbx at 80040000 {
+ lradc at 80050000 {
+ status = "okay";
+ };
+
+ duart: serial at 80074000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&duart_pins_a>;
+ status = "okay";
+ };
+
+ usbphy0: usbphy at 8007c000 {
+ status = "okay";
+ };
+ };
+ };
+
+ ahb at 80080000 {
+ usb0: usb at 80080000 {
+ status = "okay";
+ dr_mode = "peripheral";
+ };
+
+ mac0: ethernet at 800f0000 {
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mac0_pins_a>, <&mac0_phy_reset_pin>;
+ phy-supply = <®_3p3v>;
+ phy-reset-duration = <25>;
+ status = "okay";
+ };
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_3p3v: regulator at 0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx28-duckbill-common.dtsi b/arch/arm/boot/dts/imx28-duckbill-common.dtsi
new file mode 100644
index 0000000..167b53f
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-duckbill-common.dtsi
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2013-2014 Michael Heimpold <mhei@heimpold.de>
+ * Copyright (C) 2015 I2SE GmbH <info@i2se.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "imx28-duckbill-base.dtsi"
+
+/ {
+ model = "I2SE Duckbill";
+ compatible = "i2se,duckbill", "fsl,imx28";
+
+ apb at 80000000 {
+ apbh at 80000000 {
+ ssp0: ssp at 80010000 {
+ compatible = "fsl,imx28-mmc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_4bit_pins_a
+ &mmc0_cd_cfg &mmc0_sck_cfg>;
+ bus-width = <4>;
+ vmmc-supply = <®_3p3v>;
+ status = "okay";
+ };
+
+ pinctrl at 80018000 {
+ mac0_phy_reset_pin: mac0_phy_reset_pin at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_SSP0_DATA7__GPIO_2_7 /* PHY Reset */
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+
+ status_led_pins: status_led_pins at 0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX28_PAD_AUART1_RX__GPIO_3_4
+ MX28_PAD_AUART1_TX__GPIO_3_5
+ >;
+ fsl,drive-strength = <MXS_DRIVE_4mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+ };
+ };
+ };
+
+ ahb at 80080000 {
+ mac0: ethernet at 800f0000 {
+ phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&status_led_pins>;
+
+ status_red {
+ label = "duckbill:red:status";
+ gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+
+ status_green {
+ label = "duckbill:green:status";
+ gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
--
2.7.4
^ permalink raw reply related
* [PATCH 3/7] ARM: dts: imx28: add alternative muxing for mmc2_sck_cfg
From: Michael Heimpold @ 2016-10-22 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477164150-13553-1-git-send-email-mhei@heimpold.de>
From: Michael Heimpold <michael.heimpold@i2se.com>
Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
---
arch/arm/boot/dts/imx28.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index e29d797..f7707b4 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -611,6 +611,15 @@
fsl,pull-up = <MXS_PULL_DISABLE>;
};
+ mmc2_sck_cfg_b: mmc2-sck-cfg at 1 {
+ reg = <1>;
+ fsl,pinmux-ids = <
+ MX28_PAD_SSP2_SCK__SSP2_SCK
+ >;
+ fsl,drive-strength = <MXS_DRIVE_12mA>;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+
i2c0_pins_a: i2c0 at 0 {
reg = <0>;
fsl,pinmux-ids = <
--
2.7.4
^ permalink raw reply related
* [PATCH 2/7] ARM: dts: imx28: rename mmc2_sck_cfg to prepare for an alternative muxing setup
From: Michael Heimpold @ 2016-10-22 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477164150-13553-1-git-send-email-mhei@heimpold.de>
From: Michael Heimpold <michael.heimpold@i2se.com>
Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
---
arch/arm/boot/dts/imx28-m28cu3.dts | 2 +-
arch/arm/boot/dts/imx28.dtsi | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx28-m28cu3.dts b/arch/arm/boot/dts/imx28-m28cu3.dts
index 2df63be..bb53294 100644
--- a/arch/arm/boot/dts/imx28-m28cu3.dts
+++ b/arch/arm/boot/dts/imx28-m28cu3.dts
@@ -57,7 +57,7 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc2_4bit_pins_a
&mmc2_cd_cfg
- &mmc2_sck_cfg>;
+ &mmc2_sck_cfg_a>;
bus-width = <4>;
vmmc-supply = <®_vddio_sd1>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index ef6e10d..e29d797 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -602,7 +602,8 @@
fsl,pull-up = <MXS_PULL_DISABLE>;
};
- mmc2_sck_cfg: mmc2-sck-cfg {
+ mmc2_sck_cfg_a: mmc2-sck-cfg at 0 {
+ reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SSP0_DATA7__SSP2_SCK
>;
--
2.7.4
^ permalink raw reply related
* [PATCH 1/7] ARM: dts: imx28: add alternative pinmuxing for mmc2
From: Michael Heimpold @ 2016-10-22 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477164150-13553-1-git-send-email-mhei@heimpold.de>
From: Michael Heimpold <michael.heimpold@i2se.com>
Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
---
arch/arm/boot/dts/imx28.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 0ad893b..ef6e10d 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -579,6 +579,22 @@
fsl,pull-up = <MXS_PULL_ENABLE>;
};
+ mmc2_4bit_pins_b: mmc2-4bit at 1 {
+ reg = <1>;
+ fsl,pinmux-ids = <
+ MX28_PAD_SSP2_SCK__SSP2_SCK
+ MX28_PAD_SSP2_MOSI__SSP2_CMD
+ MX28_PAD_SSP2_MISO__SSP2_D0
+ MX28_PAD_SSP2_SS0__SSP2_D3
+ MX28_PAD_SSP2_SS1__SSP2_D1
+ MX28_PAD_SSP2_SS2__SSP2_D2
+ MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
+ >;
+ fsl,drive-strength = <MXS_DRIVE_8mA>;
+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
+ fsl,pull-up = <MXS_PULL_ENABLE>;
+ };
+
mmc2_cd_cfg: mmc2-cd-cfg {
fsl,pinmux-ids = <
MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
--
2.7.4
^ permalink raw reply related
* [PATCH 0/7] ARM: dts: support I2SE Duckbill device
From: Michael Heimpold @ 2016-10-22 19:22 UTC (permalink / raw)
To: linux-arm-kernel
This series updates/adds Device Tree support for I2SE's Duckbill
device family.
The Duckbill devices are small, pen-drive sized boards based on
NXP's i.MX28 SoC. While the initial variants (Duckbill series) were
equipped with a micro SD card slot only, the latest generation
(Duckbill 2 series) have an additional internal eMMC onboard.
Both device generations consists of four "family members":
- Duckbill/Duckbill 2: generic board, intented to be used as
baseboard for custom designs and/or as development board
- Duckbill EnOcean/Duckbill 2 EnOcean: come with an EnOcean
daugther board equipped with the popular TCM310 module
- Duckbill 485/Duckbill 2 485: as the name implies, these
devices are intended to be used as Ethernet - RS485 converters
- Duckbill SPI/Duckbill 2 SPI: not sold separately, but used
in I2SE's development kits for Green PHY HomePlug Powerline
communication
Since all devices are very similar and only differ in few
aspects, the following patch series introduces first common
device tree snippets which are then included by the real
devices. For better understanding, I tried to illustrate the
hierarchy:
+--------------------+ +----------------------+
| imx28-duckbill.dts | | imx28-duckbill-2.dts |
+--------------------+ +----------------------+
^ ^
| +----------------------------+ | +------------------------------+
| | imx28-duckbill-enocean.dts | | | imx28-duckbill-2-enocean.dts |
| +----------------------------+ | +------------------------------+
| ^ | ^
| | +------------------------+ | | +--------------------------+
| | | imx28-duckbill-485.dts | | | | imx28-duckbill-2-485.dts |
| | +------------------------+ | | +--------------------------+
| | ^ | | ^
| | | +------------------------+ | | | +--------------------------+
| | | | imx28-duckbill-spi.dts | | | | | imx28-duckbill-2-spi.dts |
| | | +------------------------+ | | | +--------------------------+
| | | ^ | | | ^
| | | | | | | |
| | | | | | | |
+---------------------------------------+ +-----------------------------------------+
| imx28-duckbill-common.dtsi | | imx28-duckbill-2-common.dtsi |
+---------------------------------------+ +-----------------------------------------+
^ ^
| |
+----------------------------+
| imx28-duckbill-base.dtsi |
+----------------------------+
^
|
+------------+
| imx28.dtsi |
+------------+
Michael Heimpold (7):
ARM: dts: imx28: add alternative pinmuxing for mmc2
ARM: dts: imx28: rename mmc2_sck_cfg to prepare for an alternative
muxing setup
ARM: dts: imx28: add alternative muxing for mmc2_sck_cfg
ARM: dts: add I2SE Duckbill common definitions
ARM: dts: duckbill: simplify DT and use common definitions
ARM: dts: add support for remaining members of Duckbill series
ARM: dts: add support for Duckbill 2 series devices
arch/arm/boot/dts/Makefile | 7 ++
arch/arm/boot/dts/imx28-duckbill-2-485.dts | 70 ++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-2-common.dtsi | 110 +++++++++++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-2-enocean.dts | 100 ++++++++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-2-spi.dts | 63 ++++++++++++++
arch/arm/boot/dts/imx28-duckbill-2.dts | 46 +++++++++++
arch/arm/boot/dts/imx28-duckbill-485.dts | 60 ++++++++++++++
arch/arm/boot/dts/imx28-duckbill-base.dtsi | 88 ++++++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-common.dtsi | 80 ++++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-enocean.dts | 90 ++++++++++++++++++++
arch/arm/boot/dts/imx28-duckbill-spi.dts | 64 ++++++++++++++
arch/arm/boot/dts/imx28-duckbill.dts | 99 +++-------------------
arch/arm/boot/dts/imx28-m28cu3.dts | 2 +-
arch/arm/boot/dts/imx28.dtsi | 28 ++++++-
14 files changed, 817 insertions(+), 90 deletions(-)
create mode 100644 arch/arm/boot/dts/imx28-duckbill-2-485.dts
create mode 100644 arch/arm/boot/dts/imx28-duckbill-2-common.dtsi
create mode 100644 arch/arm/boot/dts/imx28-duckbill-2-enocean.dts
create mode 100644 arch/arm/boot/dts/imx28-duckbill-2-spi.dts
create mode 100644 arch/arm/boot/dts/imx28-duckbill-2.dts
create mode 100644 arch/arm/boot/dts/imx28-duckbill-485.dts
create mode 100644 arch/arm/boot/dts/imx28-duckbill-base.dtsi
create mode 100644 arch/arm/boot/dts/imx28-duckbill-common.dtsi
create mode 100644 arch/arm/boot/dts/imx28-duckbill-enocean.dts
create mode 100644 arch/arm/boot/dts/imx28-duckbill-spi.dts
--
2.7.4
^ permalink raw reply
* [PATCH] drm/rockchip: analogix_dp: add supports for regulators in edp IP
From: Randy Li @ 2016-10-22 19:18 UTC (permalink / raw)
To: linux-arm-kernel
I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at
RK3288, once trying to enable the pclk clock, the kernel would dead.
This patch would try to enable them first. The eDP_AVDD_1V8 more
likely to be applied to eDP phy, but I have no time to confirmed
it yet.
Signed-off-by: Randy Li <ayaka@soulik.info>
---
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8548e82..6bf0441 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -17,6 +17,7 @@
#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
#include <linux/reset.h>
#include <linux/clk.h>
@@ -70,6 +71,7 @@ struct rockchip_dp_device {
struct clk *grfclk;
struct regmap *grf;
struct reset_control *rst;
+ struct regulator_bulk_data supplies[2];
struct work_struct psr_work;
spinlock_t psr_lock;
@@ -146,6 +148,13 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
cancel_work_sync(&dp->psr_work);
+ ret = regulator_bulk_enable(ARRAY_SIZE(dp->supplies),
+ dp->supplies);
+ if (ret) {
+ dev_err(dp->dev, "failed to enable vdd supply %d\n", ret);
+ return ret;
+ }
+
ret = clk_prepare_enable(dp->pclk);
if (ret < 0) {
dev_err(dp->dev, "failed to enable pclk %d\n", ret);
@@ -168,6 +177,9 @@ static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
clk_disable_unprepare(dp->pclk);
+ regulator_bulk_disable(ARRAY_SIZE(dp->supplies),
+ dp->supplies);
+
return 0;
}
@@ -323,6 +335,19 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp)
return PTR_ERR(dp->rst);
}
+ dp->supplies[0].supply = "vcc";
+ dp->supplies[1].supply = "vccio";
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(dp->supplies),
+ dp->supplies);
+ if (ret < 0) {
+ dev_err(dev, "failed to get regulators: %d\n", ret);
+ }
+ ret = regulator_bulk_enable(ARRAY_SIZE(dp->supplies),
+ dp->supplies);
+ if (ret < 0) {
+ dev_err(dev, "failed to enable regulators: %d\n", ret);
+ }
+
ret = clk_prepare_enable(dp->pclk);
if (ret < 0) {
dev_err(dp->dev, "failed to enable pclk %d\n", ret);
--
2.7.4
^ permalink raw reply related
* [PATCH v3 2/4] drivers: iio: ti_am335x_adc: add dma support
From: Jonathan Cameron @ 2016-10-22 17:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d7dd9a21-51d9-e8f5-a6fe-34653afc9240@ti.com>
On 19/10/16 09:52, Mugunthan V N wrote:
> On Sunday 09 October 2016 02:00 PM, Jonathan Cameron wrote:
>> On 05/10/16 10:04, Mugunthan V N wrote:
>>> This patch adds the required pieces to ti_am335x_adc driver for
>>> DMA support
>>>
>>> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
>> Hi,
>>
>> Just the one question inline. I'll also need an Ack from Lee as
>> this touches code in mfd (as does the previous patch).
>> We have obviously missed this merge window, so no particular rush.
Question answered below. So just need that Ack from Lee.
>>
>> Otherwise, looking very nice indeed. Got to get my BBB out and play
>> with this now ;)
>>
>> Jonathan
>>> ---
>>> drivers/iio/adc/ti_am335x_adc.c | 148 ++++++++++++++++++++++++++++++++++-
>>> include/linux/mfd/ti_am335x_tscadc.h | 7 ++
>>> 2 files changed, 152 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
>>> index c3cfacca..ad9dec3 100644
>>> --- a/drivers/iio/adc/ti_am335x_adc.c
>>> +++ b/drivers/iio/adc/ti_am335x_adc.c
>>> @@ -30,10 +30,28 @@
>>> #include <linux/iio/buffer.h>
>>> #include <linux/iio/kfifo_buf.h>
>>>
>>> +#include <linux/dmaengine.h>
>>> +#include <linux/dma-mapping.h>
>>> +
>>> +#define DMA_BUFFER_SIZE SZ_2K
>>> +
>>> +struct tiadc_dma {
>>> + struct dma_slave_config conf;
>>> + struct dma_chan *chan;
>>> + dma_addr_t addr;
>>> + dma_cookie_t cookie;
>>> + u8 *buf;
>>> + int current_period;
>>> + int period_size;
>>> + u8 fifo_thresh;
>>> +};
>>> +
>>> struct tiadc_device {
>>> struct ti_tscadc_dev *mfd_tscadc;
>>> + struct tiadc_dma dma;
>>> struct mutex fifo1_lock; /* to protect fifo access */
>>> int channels;
>>> + int total_ch_enabled;
>>> u8 channel_line[8];
>>> u8 channel_step[8];
>>> int buffer_en_ch_steps;
>>> @@ -198,6 +216,67 @@ static irqreturn_t tiadc_worker_h(int irq, void *private)
>>> return IRQ_HANDLED;
>>> }
>>>
>>> +static void tiadc_dma_rx_complete(void *param)
>>> +{
>>> + struct iio_dev *indio_dev = param;
>>> + struct tiadc_device *adc_dev = iio_priv(indio_dev);
>>> + struct tiadc_dma *dma = &adc_dev->dma;
>>> + u8 *data;
>>> + int i;
>>> +
>>> + data = dma->buf + dma->current_period * dma->period_size;
>>> + dma->current_period = 1 - dma->current_period; /* swap the buffer ID */
>>> +
>>> + for (i = 0; i < dma->period_size; i += indio_dev->scan_bytes) {
>>> + iio_push_to_buffers(indio_dev, data);
>>> + data += indio_dev->scan_bytes;
>>> + }
>> Hmm. Another case for the mooted iio_push_to_buffers_multi. Guess
>> we should move on with that one ;)
>>> +}
>>> +
>>> +static int tiadc_start_dma(struct iio_dev *indio_dev)
>>> +{
>>> + struct tiadc_device *adc_dev = iio_priv(indio_dev);
>>> + struct tiadc_dma *dma = &adc_dev->dma;
>>> + struct dma_async_tx_descriptor *desc;
>>> +
>>> + dma->current_period = 0; /* We start to fill period 0 */
>>> + /*
>>> + * Make the fifo thresh as the multiple of total number of
>>> + * channels enabled, so make sure that cyclic DMA period
>>> + * length is also a multiple of total number of channels
>>> + * enabled. This ensures that no invalid data is reported
>>> + * to the stack via iio_push_to_buffers().
>>> + */
>>> + dma->fifo_thresh = rounddown(FIFO1_THRESHOLD + 1,
>>> + adc_dev->total_ch_enabled) - 1;
>>> + /* Make sure that period length is multiple of fifo thresh level */
>>> + dma->period_size = rounddown(DMA_BUFFER_SIZE / 2,
>>> + (dma->fifo_thresh + 1) * sizeof(u16));
>>> +
>>> + dma->conf.src_maxburst = dma->fifo_thresh + 1;
>>> + dmaengine_slave_config(dma->chan, &dma->conf);
>>> +
>>> + desc = dmaengine_prep_dma_cyclic(dma->chan, dma->addr,
>>> + dma->period_size * 2,
>>> + dma->period_size, DMA_DEV_TO_MEM,
>>> + DMA_PREP_INTERRUPT);
>>> + if (!desc)
>>> + return -EBUSY;
>>> +
>>> + desc->callback = tiadc_dma_rx_complete;
>>> + desc->callback_param = indio_dev;
>>> +
>>> + dma->cookie = dmaengine_submit(desc);
>>> +
>>> + dma_async_issue_pending(dma->chan);
>>> +
>>> + tiadc_writel(adc_dev, REG_FIFO1THR, dma->fifo_thresh);
>>> + tiadc_writel(adc_dev, REG_DMA1REQ, dma->fifo_thresh);
>>> + tiadc_writel(adc_dev, REG_DMAENABLE_SET, DMA_FIFO1);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
>>> {
>>> struct tiadc_device *adc_dev = iio_priv(indio_dev);
>>> @@ -218,20 +297,30 @@ static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
>>> static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
>>> {
>>> struct tiadc_device *adc_dev = iio_priv(indio_dev);
>>> + struct tiadc_dma *dma = &adc_dev->dma;
>>> + unsigned int irq_enable;
>>> unsigned int enb = 0;
>>> u8 bit;
>>>
>>> tiadc_step_config(indio_dev);
>>> - for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels)
>>> + for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels) {
>>> enb |= (get_adc_step_bit(adc_dev, bit) << 1);
>>> + adc_dev->total_ch_enabled++;
>>> + }
>>> adc_dev->buffer_en_ch_steps = enb;
>>>
>>> + if (dma->chan)
>>> + tiadc_start_dma(indio_dev);
>>> +
>>> am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
>>>
>>> tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
>>> | IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
>>> - tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES
>>> - | IRQENB_FIFO1OVRRUN);
>>> +
>>> + irq_enable = IRQENB_FIFO1OVRRUN;
>>> + if (!dma->chan)
>>> + irq_enable |= IRQENB_FIFO1THRES;
>> This changes the non dma behaviour as we no longer set IRQENB_FIFO1THRES.
>> Why? Was it wrong before?
>
> In non DMA case, dms->chan will be NULL and IRQENB_FIFO1THRES interrupt
> will be enabled to pop the ADC samples.
>
oops. Thanks for pointing out how I'd misread this!
So just after the ack from Lee now.
Jonathan
> Regards
> Mugunthan V N
>
>>> + tiadc_writel(adc_dev, REG_IRQENABLE, irq_enable);
>>>
>>> return 0;
>>> }
>>> @@ -239,12 +328,18 @@ static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
>>> static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
>>> {
>>> struct tiadc_device *adc_dev = iio_priv(indio_dev);
>>> + struct tiadc_dma *dma = &adc_dev->dma;
>>> int fifo1count, i, read;
>>>
>>> tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
>>> IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
>>> am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
>>> adc_dev->buffer_en_ch_steps = 0;
>>> + adc_dev->total_ch_enabled = 0;
>>> + if (dma->chan) {
>>> + tiadc_writel(adc_dev, REG_DMAENABLE_CLEAR, 0x2);
>>> + dmaengine_terminate_async(dma->chan);
>>> + }
>>>
>>> /* Flush FIFO of leftover data in the time it takes to disable adc */
>>> fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
>>> @@ -430,6 +525,41 @@ static const struct iio_info tiadc_info = {
>>> .driver_module = THIS_MODULE,
>>> };
>>>
>>> +static int tiadc_request_dma(struct platform_device *pdev,
>>> + struct tiadc_device *adc_dev)
>>> +{
>>> + struct tiadc_dma *dma = &adc_dev->dma;
>>> + dma_cap_mask_t mask;
>>> +
>>> + /* Default slave configuration parameters */
>>> + dma->conf.direction = DMA_DEV_TO_MEM;
>>> + dma->conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>>> + dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base + REG_FIFO1;
>>> +
>>> + dma_cap_zero(mask);
>>> + dma_cap_set(DMA_CYCLIC, mask);
>>> +
>>> + /* Get a channel for RX */
>>> + dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>>> + if (IS_ERR(dma->chan)) {
>>> + int ret = PTR_ERR(dma->chan);
>>> +
>>> + dma->chan = NULL;
>>> + return ret;
>>> + }
>>> +
>>> + /* RX buffer */
>>> + dma->buf = dma_alloc_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE,
>>> + &dma->addr, GFP_KERNEL);
>>> + if (!dma->buf)
>>> + goto err;
>>> +
>>> + return 0;
>>> +err:
>>> + dma_release_channel(dma->chan);
>>> + return -ENOMEM;
>>> +}
>>> +
>>> static int tiadc_parse_dt(struct platform_device *pdev,
>>> struct tiadc_device *adc_dev)
>>> {
>>> @@ -512,8 +642,14 @@ static int tiadc_probe(struct platform_device *pdev)
>>>
>>> platform_set_drvdata(pdev, indio_dev);
>>>
>>> + err = tiadc_request_dma(pdev, adc_dev);
>>> + if (err && err == -EPROBE_DEFER)
>>> + goto err_dma;
>>> +
>>> return 0;
>>>
>>> +err_dma:
>>> + iio_device_unregister(indio_dev);
>>> err_buffer_unregister:
>>> tiadc_iio_buffered_hardware_remove(indio_dev);
>>> err_free_channels:
>>> @@ -525,8 +661,14 @@ static int tiadc_remove(struct platform_device *pdev)
>>> {
>>> struct iio_dev *indio_dev = platform_get_drvdata(pdev);
>>> struct tiadc_device *adc_dev = iio_priv(indio_dev);
>>> + struct tiadc_dma *dma = &adc_dev->dma;
>>> u32 step_en;
>>>
>>> + if (dma->chan) {
>>> + dma_free_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE,
>>> + dma->buf, dma->addr);
>>> + dma_release_channel(dma->chan);
>>> + }
>>> iio_device_unregister(indio_dev);
>>> tiadc_iio_buffered_hardware_remove(indio_dev);
>>> tiadc_channels_remove(indio_dev);
>>> diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h
>>> index e45a208..b9a53e0 100644
>>> --- a/include/linux/mfd/ti_am335x_tscadc.h
>>> +++ b/include/linux/mfd/ti_am335x_tscadc.h
>>> @@ -23,6 +23,8 @@
>>> #define REG_IRQENABLE 0x02C
>>> #define REG_IRQCLR 0x030
>>> #define REG_IRQWAKEUP 0x034
>>> +#define REG_DMAENABLE_SET 0x038
>>> +#define REG_DMAENABLE_CLEAR 0x03c
>>> #define REG_CTRL 0x040
>>> #define REG_ADCFSM 0x044
>>> #define REG_CLKDIV 0x04C
>>> @@ -36,6 +38,7 @@
>>> #define REG_FIFO0THR 0xE8
>>> #define REG_FIFO1CNT 0xF0
>>> #define REG_FIFO1THR 0xF4
>>> +#define REG_DMA1REQ 0xF8
>>> #define REG_FIFO0 0x100
>>> #define REG_FIFO1 0x200
>>>
>>> @@ -126,6 +129,10 @@
>>> #define FIFOREAD_DATA_MASK (0xfff << 0)
>>> #define FIFOREAD_CHNLID_MASK (0xf << 16)
>>>
>>> +/* DMA ENABLE/CLEAR Register */
>>> +#define DMA_FIFO0 BIT(0)
>>> +#define DMA_FIFO1 BIT(1)
>>> +
>>> /* Sequencer Status */
>>> #define SEQ_STATUS BIT(5)
>>> #define CHARGE_STEP 0x11
>>>
>>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* [PATCH 1/1] arm: dts: imx6ul: 14x14-evk: add the optee node
From: Fabio Estevam @ 2016-10-22 17:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477148229-6940-1-git-send-email-jason.hui.liu@nxp.com>
Hi Jason,
On Sat, Oct 22, 2016 at 12:57 PM, Jason Liu <jason.hui.liu@nxp.com> wrote:
> This patch adds the optee node for the i.MX6UL 14x14 evk board
>
> Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
> ---
> arch/arm/boot/dts/imx6ul-14x14-evk.dts | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dts b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
> index e281d50..e68dc19 100644
> --- a/arch/arm/boot/dts/imx6ul-14x14-evk.dts
> +++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
> @@ -30,6 +30,13 @@
> status = "okay";
> };
>
> + firmware {
> + optee {
> + compatible = "linaro,optee-tz";
> + method = "smc";
It seems we need to wait until the property lands in mainline.
^ permalink raw reply
* [RFC PATCH 0/8] Support GICv3 ITS and vITS in 32-bit mode
From: Marc Zyngier @ 2016-10-22 15:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477042601-15227-1-git-send-email-vladimir.murzin@arm.com>
On Fri, 21 Oct 2016 10:36:33 +0100
Vladimir Murzin <vladimir.murzin@arm.com> wrote:
Hi Vladimir,
> Hi,
>
> This series introduces GICv3 ITS and vITS to 32-bit world. The first
> six patches make it possible to use ITS in a 32-bit guest with vITS on
> 64-bit host. The last two patches extend vITS to 32-bit host.
I quite like this series, mostly because it deletes a bit of code and
fixes a number of shortcomings. My only gripes are than it doesn't
apply to my current tree (see my comment on patch 4), and that this
should effectively be split in two series: one enabling the ITS on
32bit, and the other switching on ITS emulation for 32bit KVM.
Effectively, these series are completely independent.
It also makes it easier for me to merge things as I don't have to
coordinate the merging strategy with... myself. ;-)
Please repost this once the GIC fixes have reached mainline, and this
should be in good shape for a quick merge.
> I used Andrea's its/v8 branch at [1] for testing with the following
> diff on top
>
> diff --git a/arm/aarch32/arm-cpu.c b/arm/aarch32/arm-cpu.c
> index 27a8e17..16bba55 100644
> --- a/arm/aarch32/arm-cpu.c
> +++ b/arm/aarch32/arm-cpu.c
> @@ -12,7 +12,7 @@ static void generate_fdt_nodes(void *fdt, struct kvm *kvm)
> {
> int timer_interrupts[4] = {13, 14, 11, 10};
>
> - gic__generate_fdt_nodes(fdt, IRQCHIP_GICV2);
> + gic__generate_fdt_nodes(fdt, kvm->cfg.arch.irqchip);
> timer__generate_fdt_nodes(fdt, kvm, timer_interrupts);
> }
>
> diff --git a/arm/aarch32/include/kvm/kvm-arch.h b/arm/aarch32/include/kvm/kvm-arch.h
> index 1632e3c..99231f6 100644
> --- a/arm/aarch32/include/kvm/kvm-arch.h
> +++ b/arm/aarch32/include/kvm/kvm-arch.h
> @@ -1,8 +1,8 @@
> #ifndef KVM__KVM_ARCH_H
> #define KVM__KVM_ARCH_H
>
> -#define ARM_GIC_DIST_SIZE 0x1000
> -#define ARM_GIC_CPUI_SIZE 0x2000
> +#define ARM_GIC_DIST_SIZE 0x100000
> +#define ARM_GIC_CPUI_SIZE 0x200000
>
> #define ARM_KERN_OFFSET(...) 0x8000
>
>
> After passing --irqchip=gicv3-its --force-pci to kvmtool I can see
> that MSI is used:
>
> # cat /proc/interrupts
> CPU0
> 18: 1251 GICv3 27 Level arch_timer
> 28: 0 ITS-MSI 49152 Edge virtio3-config
> 29: 0 ITS-MSI 49153 Edge virtio3-input
> 30: 0 ITS-MSI 49154 Edge virtio3-output
> 31: 0 ITS-MSI 32768 Edge virtio2-config
> 32: 2 ITS-MSI 32769 Edge virtio2-input.0
> 33: 1 ITS-MSI 32770 Edge virtio2-output.0
> 34: 0 ITS-MSI 0 Edge virtio0-config
> 35: 303 ITS-MSI 1 Edge virtio0-requests
> 36: 0 ITS-MSI 16384 Edge virtio1-config
> 37: 218 ITS-MSI 16385 Edge virtio1-requests
> IPI0: 0 CPU wakeup interrupts
> IPI1: 0 Timer broadcast interrupts
> IPI2: 0 Rescheduling interrupts
> IPI3: 0 Function call interrupts
> IPI4: 0 CPU stop interrupts
> IPI5: 0 IRQ work interrupts
> IPI6: 0 completion interrupts
> Err: 0
Please also post these patches (I may try it in a model if I feel brave
enough...)!
Thanks,
M.
--
Jazz is not dead. It just smells funny.
^ permalink raw reply
* [RFC PATCH 4/8] irqchip/gicv3-its: specialise readq and writeq accesses
From: Marc Zyngier @ 2016-10-22 15:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477042601-15227-5-git-send-email-vladimir.murzin@arm.com>
On Fri, 21 Oct 2016 10:36:37 +0100
Vladimir Murzin <vladimir.murzin@arm.com> wrote:
Hi Vladimir,
> readq and writeq type of assessors are not supported in AArch32, so we
> need to specialise them and glue later with series of 32-bit accesses
> on AArch32 side.
>
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> ---
> arch/arm64/include/asm/arch_gicv3.h | 16 ++++++++++++++++
> drivers/irqchip/irq-gic-v3-its.c | 30 +++++++++++++++---------------
> 2 files changed, 31 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
> index 4f0402a..e0ada98 100644
> --- a/arch/arm64/include/asm/arch_gicv3.h
> +++ b/arch/arm64/include/asm/arch_gicv3.h
> @@ -190,5 +190,21 @@ static inline void gic_write_bpr1(u32 val)
>
> #define gic_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l))
>
> +#define gits_read_typer(c) readq_relaxed(c)
> +
> +#define gits_read_baser(c) readq_relaxed(c)
> +#define gits_write_baser(v, c) writeq_relaxed(v, c)
> +
> +#define gits_read_cbaser(c) readq_relaxed(c)
> +#define gits_write_cbaser(v, c) writeq_relaxed(v, c)
> +
> +#define gits_write_cwriter(v, c) writeq_relaxed(v, c)
> +
> +#define gicr_read_propbaser(c) readq_relaxed(c)
> +#define gicr_write_propbaser(v, c) writeq_relaxed(v, c)
> +
> +#define gicr_write_pendbaser(v, c) writeq_relaxed(v, c)
> +#define gicr_read_pendbaser(c) readq_relaxed(c)
> +
> #endif /* __ASSEMBLY__ */
> #endif /* __ASM_ARCH_GICV3_H */
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 86efa6e..9f74abc 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -835,7 +835,7 @@ static u64 its_read_baser(struct its_node *its, struct its_baser *baser)
> {
> u32 idx = baser - its->tables;
>
> - return readq_relaxed(its->base + GITS_BASER + (idx << 3));
> + return gits_read_baser(its->base + GITS_BASER + (idx << 3));
> }
>
> static void its_write_baser(struct its_node *its, struct its_baser *baser,
> @@ -843,7 +843,7 @@ static void its_write_baser(struct its_node *its, struct its_baser *baser,
> {
> u32 idx = baser - its->tables;
>
> - writeq_relaxed(val, its->base + GITS_BASER + (idx << 3));
> + gits_write_baser(val, its->base + GITS_BASER + (idx << 3));
> baser->val = its_read_baser(its, baser);
> }
>
> @@ -1022,7 +1022,7 @@ static void its_free_tables(struct its_node *its)
>
> static int its_alloc_tables(struct its_node *its)
> {
> - u64 typer = readq_relaxed(its->base + GITS_TYPER);
> + u64 typer = gits_read_typer(its->base + GITS_TYPER);
This is going to conflict with the irq/irq-fixes-4.9 branch, which is
already on its way to mainline (and will hopefully hit -rc2) Could you
please rebase it once these patches are in mainline?
You'll notice that I didn't bother distinguishing between the various
GI*_TYPER registers, as they all have the same behaviour.
Otherwise looks good to me.
Thanks,
M.
--
Jazz is not dead. It just smells funny.
^ permalink raw reply
* [PATCH v3 1/3] mtd: s3c2410: make ecc mode configurable via platform data
From: Krzysztof Kozlowski @ 2016-10-22 15:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161022142907.08a3eedf@bbrezillon>
On Sat, Oct 22, 2016 at 02:29:07PM +0200, Boris Brezillon wrote:
> Hi Krzysztof,
>
> On Fri, 21 Oct 2016 21:27:10 +0300
> Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> > On Thu, Oct 20, 2016 at 07:42:44PM -0200, Sergio Prado wrote:
> > > Removing CONFIG_MTD_NAND_S3C2410_HWECC option and adding a ecc_mode
> > > field in the drivers's platform data structure so it can be selectable
> > > via platform data.
> > >
> > > Also setting this field to NAND_ECC_SOFT in all boards using this
> > > driver since none of them had CONFIG_MTD_NAND_S3C2410_HWECC enabled.
> > >
> > > Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
> > > ---
> > > arch/arm/mach-s3c24xx/common-smdk.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-anubis.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-at2440evb.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-bast.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-gta02.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-jive.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-mini2440.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-osiris.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-qt2410.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-rx1950.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-rx3715.c | 1 +
> > > arch/arm/mach-s3c24xx/mach-vstms.c | 1 +
> > > arch/arm/mach-s3c64xx/mach-hmt.c | 1 +
> > > arch/arm/mach-s3c64xx/mach-mini6410.c | 1 +
> > > arch/arm/mach-s3c64xx/mach-real6410.c | 1 +
> > > drivers/mtd/nand/Kconfig | 9 --
> > > drivers/mtd/nand/s3c2410.c | 119 +++++++++++++------------
> > > include/linux/platform_data/mtd-nand-s3c2410.h | 6 +-
> > > 18 files changed, 79 insertions(+), 70 deletions(-)
> > >
> >
> > I acked this twice (v1 and v2)... and still you are ignoring them. I am
> > sorry, I am not gonna to ack this third time!
> >
> > For v2 I acked also other patches but it it is not there as well...
>
> I'll collect your acks (and Rob ones) when applying the patches. BTW,
> how should I proceed with patch 1? Do you want an topic branch
> containing this patch?
I don't expect much work around these files so the risk of conflicts is
rather small. You could put it on a topic branch just in case (so I
could pull in if needed) but I am fine with applying these to your tree
as is.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH V4 2/3] Revert "ACPI,PCI,IRQ: remove SCI penalize function"
From: Bjorn Helgaas @ 2016-10-22 14:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2a824792-486a-6251-4931-c5cc6fd67978@codeaurora.org>
On Fri, Oct 21, 2016 at 09:13:06AM -0700, Sinan Kaya wrote:
> On 10/21/2016 7:45 AM, Bjorn Helgaas wrote:
> > [1] http://marc.info/?l=linux-acpi&m=145580159209240&w=2)
> >
> >> > Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> > Wait a minute, I still have a question here: what about other ACPI
> > arches (ia64, arm64)? Don't they need to call acpi_penalize_sci_irq()
> > somewhere?
> >
>
> ACPI ARM64 architecture implements reduced ACPI profile which doesn't
> have GED object. Instead, ARM64 architecture uses onchip peripherals
> for similar functionality. If there is a need to signal interrupts,
> this is done by ACPI Notify in ASL or if absolutely needed using
> ACPI Generic Event Device (GED).
OK. I guess ia64 never did call acpi_penalize_sci_irq(), so while it
could be added someday to unify things, we don't need to add it now.
Same for arm64.
So I'd like it if you updated the changelog, but I'm OK with the
patch:
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
^ permalink raw reply
* [PATCH 1/1] arm: dts: imx6ul: 14x14-evk: add the optee node
From: Jason Liu @ 2016-10-22 14:57 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds the optee node for the i.MX6UL 14x14 evk board
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
---
arch/arm/boot/dts/imx6ul-14x14-evk.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dts b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
index e281d50..e68dc19 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-evk.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
@@ -30,6 +30,13 @@
status = "okay";
};
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
regulators {
compatible = "simple-bus";
#address-cells = <1>;
--
1.9.1
^ permalink raw reply related
* [PATCH -next] phy: meson8b-usb2: fix missing clk_disable_unprepare() on error
From: Wei Yongjun @ 2016-10-22 14:33 UTC (permalink / raw)
To: linux-arm-kernel
From: Wei Yongjun <weiyongjun1@huawei.com>
Fix the missing clk_disable_unprepare() before return from
phy_meson8b_usb2_power_on() in the error handling case.
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
---
drivers/phy/phy-meson8b-usb2.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/phy/phy-meson8b-usb2.c b/drivers/phy/phy-meson8b-usb2.c
index 73bf632..dca3947 100644
--- a/drivers/phy/phy-meson8b-usb2.c
+++ b/drivers/phy/phy-meson8b-usb2.c
@@ -158,6 +158,7 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
ret = clk_prepare_enable(priv->clk_usb);
if (ret) {
dev_err(&phy->dev, "Failed to enable USB DDR clock\n");
+ clk_disable_unprepare(priv->clk_usb_general);
return ret;
}
@@ -190,6 +191,8 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
if (phy_meson8b_usb2_read(priv, REG_ADP_BC) &
REG_ADP_BC_ACA_PIN_FLOAT) {
dev_warn(&phy->dev, "USB ID detect failed!\n");
+ clk_disable_unprepare(priv->clk_usb);
+ clk_disable_unprepare(priv->clk_usb_general);
return -EINVAL;
}
}
^ permalink raw reply related
* [GIT PULL] ARM: uniphier: fixes for v4.9
From: Masahiro Yamada @ 2016-10-22 14:28 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Olof,
Here are some fixes for v4.9.
It is touching a reset controller driver, but Philipp gave me Acked-by
for including it in my pull-request.
Here is a question; do you have a chance to send a pull-request for fixes
to Linus before -rc4? In my understanding, pull requests for the next merge
window are generally required to be based on a tag prior to -rc4.
In the previous development cycle, I remember the fixes pull-request was
sent around v4.8-rc7. In this case, it would be a problem if a fixup commit
and a new-development commit have a conflict with each other.
If the first round of fixes pull-request is sent before -rc4, commits for
the next merge window can be queued up based on -rc4 without any conflicts.
Thanks,
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
tags/uniphier-fixes-v4.9
for you to fetch changes up to 8e68c65d111a57a4cbe41dc886bb2a1e671e0b6e:
arm64: dts: uniphier: change MIO node to SD control node (2016-10-22
21:59:21 +0900)
----------------------------------------------------------------
UniPhier ARM SoC fixes for v4.9
- Add "select ARCH_HAS_RESET_CONTROLLER" in Kconfig
- Rename wrongly-named mioctrl to sdctrl
----------------------------------------------------------------
Masahiro Yamada (5):
ARM: uniphier: select ARCH_HAS_RESET_CONTROLLER
arm64: uniphier: select ARCH_HAS_RESET_CONTROLLER
reset: uniphier: rename MIO reset to SD reset for Pro5, PXs2, LD20 SoCs
ARM: dts: uniphier: change MIO node to SD control node
arm64: dts: uniphier: change MIO node to SD control node
.../devicetree/bindings/reset/uniphier-reset.txt | 62 +++++++++++-----------
arch/arm/boot/dts/uniphier-pro5.dtsi | 4 +-
arch/arm/boot/dts/uniphier-pxs2.dtsi | 4 +-
arch/arm/mach-uniphier/Kconfig | 1 +
arch/arm64/Kconfig.platforms | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 12 ++---
drivers/reset/reset-uniphier.c | 16 +++---
7 files changed, 51 insertions(+), 49 deletions(-)
--
Best Regards
Masahiro Yamada
^ permalink raw reply
* [PATCH] ahci: use pci_alloc_irq_vectors
From: Christoph Hellwig @ 2016-10-22 14:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161021140106.GU25086@rric.localdomain>
Hi Robert,
is this a controller that's using MSI-X?
If so can you try the patch below?
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index ba5f11c..5fe852d 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1617,7 +1617,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
/* legacy intx interrupts */
pci_intx(pdev, 1);
}
- hpriv->irq = pdev->irq;
+ hpriv->irq = pci_irq_vector(pdev, 0);
if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
host->flags |= ATA_HOST_PARALLEL_SCAN;
^ permalink raw reply related
* [PATCH] nvmem: sunxi-sid: SID content is not a valid source of randomness
From: Corentin Labbe @ 2016-10-22 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Since SID's content is constant over reboot, it must not be used
as source of randomness.
This patch remove the use of SID content as source of randomness.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
drivers/nvmem/sunxi_sid.c | 21 ---------------------
1 file changed, 21 deletions(-)
diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
index 1567ccc..c82d5d1 100644
--- a/drivers/nvmem/sunxi_sid.c
+++ b/drivers/nvmem/sunxi_sid.c
@@ -21,8 +21,6 @@
#include <linux/nvmem-provider.h>
#include <linux/of.h>
#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/random.h>
static struct nvmem_config econfig = {
.name = "sunxi-sid",
@@ -70,8 +68,6 @@ static int sunxi_sid_probe(struct platform_device *pdev)
struct resource *res;
struct nvmem_device *nvmem;
struct sunxi_sid *sid;
- int ret, i, size;
- char *randomness;
sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
if (!sid)
@@ -82,7 +78,6 @@ static int sunxi_sid_probe(struct platform_device *pdev)
if (IS_ERR(sid->base))
return PTR_ERR(sid->base);
- size = resource_size(res) - 1;
econfig.size = resource_size(res);
econfig.dev = dev;
econfig.reg_read = sunxi_sid_read;
@@ -91,25 +86,9 @@ static int sunxi_sid_probe(struct platform_device *pdev)
if (IS_ERR(nvmem))
return PTR_ERR(nvmem);
- randomness = kzalloc(sizeof(u8) * (size), GFP_KERNEL);
- if (!randomness) {
- ret = -EINVAL;
- goto err_unreg_nvmem;
- }
-
- for (i = 0; i < size; i++)
- randomness[i] = sunxi_sid_read_byte(sid, i);
-
- add_device_randomness(randomness, size);
- kfree(randomness);
-
platform_set_drvdata(pdev, nvmem);
return 0;
-
-err_unreg_nvmem:
- nvmem_unregister(nvmem);
- return ret;
}
static int sunxi_sid_remove(struct platform_device *pdev)
--
2.7.3
^ permalink raw reply related
* [PATCH v5 0/7] ARM: ASoC: drm: sun8i: Add DE2 HDMI audio and video
From: Jean-Francois Moine @ 2016-10-22 13:28 UTC (permalink / raw)
To: linux-arm-kernel
This patchset series adds HDMI audio and video support to the Allwinner
sun8i SoCs which include the display engine 2 (DE2).
A first submission in January for video on the H3 could not enter into
the mainline kernel due to the lack of license headers in Allwinner's
sources.
Recently, an announce about Tina OS for the R series
https://www.youtube.com/watch?v=h7KD-6HblAU
was followed by the upload of a new linux-3.4 source tree
https://github.com/tinalinux/linux-3.4
with files containing GPL headers.
Well, I don't know if these sources are really from Allwinner, but
anyway, this is the opportunity to propose a new version of my DRM
HDMI driver.
v5:
- add overlay plane
- add audio support
- add support for the A83T
- add back the HDMI driver
- many bug fixes
v4:
- drivers/clk/sunxi/Makefile was missing (Emil Velikov)
v3:
- add the hardware cursor
- simplify and fix the DE2 init sequences
- generation for all SUNXI SoCs (Andre Przywara)
v2:
- remove the HDMI driver
- remarks from Chen-Yu Tsai and Russell King
- DT documentation added
Jean-Francois Moine (7):
drm: sunxi: Add a basic DRM driver for Allwinner DE2
ASoC: sunxi: Add a simple HDMI CODEC
drm: sunxi: add DE2 HDMI support
ASoC: sunxi: Add sun8i I2S driver
ARM: dts: sun8i-h3: add HDMI audio and video nodes
ARM: dts: sun8i-h3: Add HDMI audio and video to the Banana Pi M2+
ARM: dts: sun8i-h3: Add HDMI audio and video to the Orange PI 2
.../devicetree/bindings/display/sunxi/hdmi.txt | 52 ++
.../bindings/display/sunxi/sunxi-de2.txt | 83 ++
.../devicetree/bindings/sound/sun4i-i2s.txt | 38 +-
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 17 +
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 17 +
arch/arm/boot/dts/sun8i-h3.dtsi | 67 ++
drivers/gpu/drm/Kconfig | 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/sunxi/Kconfig | 29 +
drivers/gpu/drm/sunxi/Makefile | 9 +
drivers/gpu/drm/sunxi/de2_crtc.c | 475 +++++++++++
drivers/gpu/drm/sunxi/de2_crtc.h | 63 ++
drivers/gpu/drm/sunxi/de2_de.c | 591 +++++++++++++
drivers/gpu/drm/sunxi/de2_drm.h | 47 ++
drivers/gpu/drm/sunxi/de2_drv.c | 378 +++++++++
drivers/gpu/drm/sunxi/de2_hdmi.c | 396 +++++++++
drivers/gpu/drm/sunxi/de2_hdmi.h | 40 +
drivers/gpu/drm/sunxi/de2_hdmi_io.c | 927 +++++++++++++++++++++
drivers/gpu/drm/sunxi/de2_hdmi_io.h | 25 +
drivers/gpu/drm/sunxi/de2_plane.c | 119 +++
include/sound/sunxi_hdmi.h | 23 +
sound/soc/codecs/Kconfig | 9 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/sunxi-hdmi.c | 106 +++
sound/soc/sunxi/Kconfig | 8 +
sound/soc/sunxi/Makefile | 3 +
sound/soc/sunxi/sun8i-i2s.c | 700 ++++++++++++++++
27 files changed, 4222 insertions(+), 5 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt
create mode 100644 Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt
create mode 100644 drivers/gpu/drm/sunxi/Kconfig
create mode 100644 drivers/gpu/drm/sunxi/Makefile
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h
create mode 100644 drivers/gpu/drm/sunxi/de2_de.c
create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h
create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.c
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.h
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_io.c
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_io.h
create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c
create mode 100644 include/sound/sunxi_hdmi.h
create mode 100644 sound/soc/codecs/sunxi-hdmi.c
create mode 100644 sound/soc/sunxi/sun8i-i2s.c
--
2.10.1
^ permalink raw reply
* [PATCH 2/2] ARM64: dts: rockchip: use pin constants to describe gpios
From: Andy Yan @ 2016-10-22 12:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477140706-6886-1-git-send-email-andy.yan@rock-chips.com>
Use macros to describe gpios will make the dts easier to
read and write.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts | 14 +++++++-------
arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts | 4 ++--
arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 16 ++++++++--------
arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 6 +++---
6 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
index fff8b19..4772917 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
@@ -90,7 +90,7 @@
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <128>;
- enable-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
@@ -101,7 +101,7 @@
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
- reset-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
};
keys: gpio-keys {
@@ -111,7 +111,7 @@
power {
wakeup-source;
- gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
};
@@ -121,7 +121,7 @@
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
@@ -166,7 +166,7 @@
phy-supply = <&vcc_lan>;
phy-mode = "rmii";
clock_in_out = "output";
- snps,reset-gpio = <&gpio3 12 0>;
+ snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
index e5eeca2..e5b92d2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
@@ -66,7 +66,7 @@
ir: ir-receiver {
compatible = "gpio-ir-receiver";
- gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@@ -77,7 +77,7 @@
pinctrl-0 = <&pwr_key>;
power {
- gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
wakeup-source;
@@ -88,13 +88,13 @@
compatible = "gpio-leds";
blue {
- gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
label = "geekbox:blue:led";
default-state = "on";
};
red {
- gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
label = "geekbox:red:led";
default-state = "off";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts
index ea0a8ec..2e431f13 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts
@@ -61,7 +61,7 @@
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
- reset-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
};
ext_gmac: external-gmac-clock {
@@ -78,7 +78,7 @@
power {
wakeup-source;
- gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
};
@@ -88,7 +88,7 @@
compatible = "gpio-leds";
red {
- gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
label = "orion:red:led";
pinctrl-names = "default";
pinctrl-0 = <&led_ctl>;
@@ -96,7 +96,7 @@
};
blue {
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
label = "orion:blue:led";
pinctrl-names = "default";
pinctrl-0 = <&stby_pwren>;
@@ -117,7 +117,7 @@
/* supplies both host and otg */
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
- gpio = <&gpio0 4 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
@@ -149,7 +149,7 @@
vcc_sd: vcc-sd-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sd";
- gpio = <&gpio3 11 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_io>;
@@ -217,7 +217,7 @@
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 12 0>;
+ snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
tx_delay = <0x30>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
index 85f7a24..62919c4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
@@ -63,7 +63,7 @@
pinctrl-0 = <&pwr_key>;
power {
- gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
wakeup-source;
@@ -248,7 +248,7 @@
reg = <0x40>;
interrupt-parent = <&gpio3>;
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
- power-gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
silead,max-fingers = <5>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
index eed1ef6..7134181 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
@@ -61,7 +61,7 @@
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
- reset-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
};
keys: gpio-keys {
@@ -71,7 +71,7 @@
power {
wakeup-source;
- gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
};
@@ -81,7 +81,7 @@
compatible = "gpio-leds";
work {
- gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
label = "r88:green:led";
pinctrl-names = "default";
pinctrl-0 = <&led_ctl>;
@@ -90,7 +90,7 @@
ir: ir-receiver {
compatible = "gpio-ir-receiver";
- gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@@ -104,10 +104,10 @@
reset-gpios =
/* BT_RST_N */
- <&gpio3 5 GPIO_ACTIVE_LOW>,
+ <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>,
/* WL_REG_ON */
- <&gpio3 4 GPIO_ACTIVE_LOW>;
+ <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
};
vcc_18: vcc18-regulator {
@@ -124,7 +124,7 @@
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
@@ -199,7 +199,7 @@
phy-supply = <&vcc_lan>;
phy-mode = "rmii";
clock_in_out = "output";
- snps,reset-gpio = <&gpio3 12 0>;
+ snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
index 8e82497..f00e0d5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
@@ -88,7 +88,7 @@
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
regulator-name = "vcc5v0_host";
@@ -123,7 +123,7 @@
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x28>;
@@ -156,7 +156,7 @@
};
&pcie0 {
- ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+ ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn>;
--
2.7.4
^ permalink raw reply related
* [PATCH 1/2] ARM: dts: rockchip: use pin constants to describe gpios
From: Andy Yan @ 2016-10-22 12:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477140706-6886-1-git-send-email-andy.yan@rock-chips.com>
Use macros to describe gpios will make the dts easier to
read and write.
All the modifications done with sed:
sed -i -e 's/ 0 GPIO_ACTIVE_/ RK_PA0 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
sed -i -e 's/ 1 GPIO_ACTIVE_/ RK_PA1 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
sed -i -e 's/ 2 GPIO_ACTIVE_/ RK_PA2 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
.......
.......
sed -i -e 's/ 30 GPIO_ACTIVE_/ RK_PD6 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
sed -i -e 's/ 31 GPIO_ACTIVE_/ RK_PD7 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
Tested with:
for i in dts-old/*dtb; do scripts/dtc/dtx_diff $i dts-new/$(basename $i); done
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---
arch/arm/boot/dts/rk3036-evb.dts | 2 +-
arch/arm/boot/dts/rk3036-kylin.dts | 10 +++++-----
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 6 +++---
arch/arm/boot/dts/rk3066a-marsboard.dts | 2 +-
arch/arm/boot/dts/rk3066a-mk808.dts | 10 +++++-----
arch/arm/boot/dts/rk3066a-rayeager.dts | 12 ++++++------
arch/arm/boot/dts/rk3188-px3-evb.dts | 4 ++--
arch/arm/boot/dts/rk3188-radxarock.dts | 16 +++++++--------
arch/arm/boot/dts/rk3229-evb.dts | 2 +-
arch/arm/boot/dts/rk3288-evb-act8846.dts | 4 ++--
arch/arm/boot/dts/rk3288-evb.dtsi | 14 ++++++-------
arch/arm/boot/dts/rk3288-fennec.dts | 4 ++--
arch/arm/boot/dts/rk3288-firefly-beta.dts | 2 +-
arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi | 2 +-
arch/arm/boot/dts/rk3288-firefly-reload.dts | 24 +++++++++++------------
arch/arm/boot/dts/rk3288-firefly.dts | 2 +-
arch/arm/boot/dts/rk3288-firefly.dtsi | 16 +++++++--------
arch/arm/boot/dts/rk3288-miqi.dts | 8 ++++----
arch/arm/boot/dts/rk3288-popmetal.dts | 2 +-
arch/arm/boot/dts/rk3288-r89.dts | 12 ++++++------
arch/arm/boot/dts/rk3288-rock2-som.dtsi | 4 ++--
arch/arm/boot/dts/rk3288-rock2-square.dts | 12 ++++++------
arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi | 4 ++--
arch/arm/boot/dts/rk3288-veyron-brain.dts | 8 ++++----
arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 10 +++++-----
arch/arm/boot/dts/rk3288-veyron-jaq.dts | 14 ++++++-------
arch/arm/boot/dts/rk3288-veyron-jerry.dts | 10 +++++-----
arch/arm/boot/dts/rk3288-veyron-mickey.dts | 6 +++---
arch/arm/boot/dts/rk3288-veyron-minnie.dts | 16 +++++++--------
arch/arm/boot/dts/rk3288-veyron-pinky.dts | 4 ++--
arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi | 2 +-
arch/arm/boot/dts/rk3288-veyron-speedy.dts | 10 +++++-----
arch/arm/boot/dts/rk3288-veyron.dtsi | 8 ++++----
33 files changed, 131 insertions(+), 131 deletions(-)
diff --git a/arch/arm/boot/dts/rk3036-evb.dts b/arch/arm/boot/dts/rk3036-evb.dts
index 2f5f155..c095341 100644
--- a/arch/arm/boot/dts/rk3036-evb.dts
+++ b/arch/arm/boot/dts/rk3036-evb.dts
@@ -56,7 +56,7 @@
pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>;
phy = <&phy0>;
- phy-reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* PHY_RST */
+ phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */
phy-reset-duration = <10>; /* millisecond */
status = "okay";
diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index 3de958e..2518259 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -55,7 +55,7 @@
compatible = "gpio-leds";
work {
- gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
label = "kylin:red:led";
pinctrl-names = "default";
pinctrl-0 = <&led_ctl>;
@@ -74,9 +74,9 @@
* - SDIO_RESET_L_WL_RST
* - SDIO_RESET_L_BT_EN
*/
- reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>, /* WL_REG_ON */
- <&gpio0 27 GPIO_ACTIVE_LOW>, /* WL_RST */
- <&gpio2 9 GPIO_ACTIVE_LOW>; /* BT_EN */
+ reset-gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_LOW>, /* WL_REG_ON */
+ <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>, /* WL_RST */
+ <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; /* BT_EN */
};
sound {
@@ -121,7 +121,7 @@
pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>;
phy = <&phy0>;
- phy-reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* PHY_RST */
+ phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */
phy-reset-duration = <10>; /* millisecond */
status = "okay";
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index c0d8b54..9e852c6 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -71,7 +71,7 @@
regulator-name = "sdmmc-supply";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
- gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
@@ -81,7 +81,7 @@
autorepeat;
power {
- gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; /* GPIO6_A2 */
+ gpios = <&gpio6 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO6_A2 */
linux,code = <KEY_POWER>;
label = "GPIO Key Power";
linux,input-type = <1>;
@@ -89,7 +89,7 @@
debounce-interval = <100>;
};
volume-down {
- gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; /* GPIO4_C5 */
+ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_LOW>; /* GPIO4_C5 */
linux,code = <KEY_VOLUMEDOWN>;
label = "GPIO Key Vol-";
linux,input-type = <1>;
diff --git a/arch/arm/boot/dts/rk3066a-marsboard.dts b/arch/arm/boot/dts/rk3066a-marsboard.dts
index 0a54c4b..cdf0a88 100644
--- a/arch/arm/boot/dts/rk3066a-marsboard.dts
+++ b/arch/arm/boot/dts/rk3066a-marsboard.dts
@@ -69,7 +69,7 @@
regulator-name = "sdmmc-supply";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
- gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts b/arch/arm/boot/dts/rk3066a-mk808.dts
index 658eb7d..7ca1cf5 100644
--- a/arch/arm/boot/dts/rk3066a-mk808.dts
+++ b/arch/arm/boot/dts/rk3066a-mk808.dts
@@ -61,7 +61,7 @@
blue {
label = "mk808:blue:power";
- gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "default-on";
};
@@ -77,7 +77,7 @@
vcc_host: usb-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&host_drv>;
pinctrl-names = "default";
regulator-always-on;
@@ -91,7 +91,7 @@
vcc_otg: usb-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&otg_drv>;
pinctrl-names = "default";
regulator-always-on;
@@ -104,7 +104,7 @@
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
- gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&sdmmc_pwr>;
pinctrl-names = "default";
regulator-name = "vcc_sd";
@@ -117,7 +117,7 @@
vcc_wifi: sdio-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio3 24 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&wifi_pwr>;
pinctrl-names = "default";
regulator-name = "vcc_wifi";
diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts
index 82465b6..7c05e8b 100644
--- a/arch/arm/boot/dts/rk3066a-rayeager.dts
+++ b/arch/arm/boot/dts/rk3066a-rayeager.dts
@@ -55,7 +55,7 @@
ir: ir-receiver {
compatible = "gpio-ir-receiver";
- gpios = <&gpio6 1 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio6 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@@ -65,7 +65,7 @@
power {
wakeup-source;
- gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio6 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
pinctrl-names = "default";
@@ -115,7 +115,7 @@
vcc_sata: sata-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sata_pwr>;
regulator-name = "usb_5v";
@@ -127,7 +127,7 @@
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
- gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwr>;
regulator-name = "vcc_sd";
@@ -140,7 +140,7 @@
vcc_host: usb-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_drv>;
regulator-name = "host-pwr";
@@ -153,7 +153,7 @@
vcc_otg: usb-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&otg_drv>;
regulator-name = "vcc_otg";
diff --git a/arch/arm/boot/dts/rk3188-px3-evb.dts b/arch/arm/boot/dts/rk3188-px3-evb.dts
index df727ba..4afd9d8 100644
--- a/arch/arm/boot/dts/rk3188-px3-evb.dts
+++ b/arch/arm/boot/dts/rk3188-px3-evb.dts
@@ -62,7 +62,7 @@
autorepeat;
power {
- gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "GPIO Key Power";
linux,input-type = <1>;
@@ -248,7 +248,7 @@
reg = <0x40>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
- power-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
silead,max-fingers = <5>;
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
index 5e8a235..28a2931 100644
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -58,7 +58,7 @@
autorepeat;
power {
- gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "GPIO Key Power";
linux,input-type = <1>;
@@ -72,19 +72,19 @@
green {
label = "rock:green:user1";
- gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_LOW>;
default-state = "off";
};
blue {
label = "rock:blue:user2";
- gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
default-state = "off";
};
sleep {
label = "rock:red:power";
- gpios = <&gpio0 15 0>;
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
@@ -106,7 +106,7 @@
ir_recv: gpio-ir-receiver {
compatible = "gpio-ir-receiver";
- gpios = <&gpio0 10 1>;
+ gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_recv_pin>;
};
@@ -114,7 +114,7 @@
vcc_otg: usb-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&otg_vbus_drv>;
regulator-name = "otg-vbus";
@@ -129,7 +129,7 @@
regulator-name = "sdmmc-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- gpio = <&gpio3 1 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
@@ -137,7 +137,7 @@
vcc_host: usb-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "host-pwr";
diff --git a/arch/arm/boot/dts/rk3229-evb.dts b/arch/arm/boot/dts/rk3229-evb.dts
index dcdd0ce..275092a 100644
--- a/arch/arm/boot/dts/rk3229-evb.dts
+++ b/arch/arm/boot/dts/rk3229-evb.dts
@@ -77,7 +77,7 @@
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
+ snps,reset-gpio = <&gpio2 RK_PD0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
tx_delay = <0x30>;
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts
index 041dd5d..f4f29fe 100644
--- a/arch/arm/boot/dts/rk3288-evb-act8846.dts
+++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts
@@ -47,7 +47,7 @@
vcc_lcd: vcc-lcd {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio7 3 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PA3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_en>;
regulator-name = "vcc_lcd";
@@ -57,7 +57,7 @@
vcc_wl: vcc-wl {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio7 9 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PB1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&wifi_pwr>;
regulator-name = "vcc_wl";
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index bf7ccfa..0dec94c 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -84,7 +84,7 @@
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <128>;
- enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
@@ -100,7 +100,7 @@
panel: panel {
compatible ="lg,lp079qx1-sp0v", "simple-panel";
backlight = <&backlight>;
- enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio7 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&lcd_cs>;
ports {
@@ -120,7 +120,7 @@
pinctrl-0 = <&pwrbtn>;
power {
- gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "GPIO Key Power";
linux,input-type = <1>;
@@ -133,7 +133,7 @@
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
@@ -144,7 +144,7 @@
vcc_phy: vcc-phy-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <ð_phy_pwr>;
regulator-name = "vcc_phy";
@@ -170,7 +170,7 @@
*/
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
- gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwr>;
regulator-name = "vcc_sd";
@@ -236,7 +236,7 @@
phy-supply = <&vcc_phy>;
phy-mode = "rgmii";
clock_in_out = "input";
- snps,reset-gpio = <&gpio4 7 0>;
+ snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
assigned-clocks = <&cru SCLK_MAC>;
diff --git a/arch/arm/boot/dts/rk3288-fennec.dts b/arch/arm/boot/dts/rk3288-fennec.dts
index 805c0d2..dc00f12 100644
--- a/arch/arm/boot/dts/rk3288-fennec.dts
+++ b/arch/arm/boot/dts/rk3288-fennec.dts
@@ -93,7 +93,7 @@
phy-mode = "rgmii";
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
- snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+ snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
tx_delay = <0x30>;
rx_delay = <0x10>;
status = "okay";
@@ -345,7 +345,7 @@
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&host_drv>;
- vbus_drv-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ vbus_drv-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/rk3288-firefly-beta.dts b/arch/arm/boot/dts/rk3288-firefly-beta.dts
index 75d77e3..0195d97 100644
--- a/arch/arm/boot/dts/rk3288-firefly-beta.dts
+++ b/arch/arm/boot/dts/rk3288-firefly-beta.dts
@@ -49,7 +49,7 @@
};
&ir {
- gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio7 RK_PA5 GPIO_ACTIVE_LOW>;
};
&pinctrl {
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
index d242588..8134966 100644
--- a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
@@ -96,7 +96,7 @@
phy-mode = "rgmii";
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
- snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+ snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
tx_delay = <0x30>;
rx_delay = <0x10>;
status = "ok";
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts
index 751bee8..d28c8c3 100644
--- a/arch/arm/boot/dts/rk3288-firefly-reload.dts
+++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts
@@ -53,7 +53,7 @@
power {
wakeup-source;
- gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
pinctrl-names = "default";
@@ -63,14 +63,14 @@
ir-receiver {
compatible = "gpio-ir-receiver";
- gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
};
leds {
compatible = "gpio-leds";
power {
- gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio8 RK_PA2 GPIO_ACTIVE_LOW>;
label = "firefly:blue:power";
pinctrl-names = "default";
pinctrl-0 = <&power_led>;
@@ -78,7 +78,7 @@
};
work {
- gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>;
label = "firefly:blue:user";
linux,default-trigger = "rc-feedback";
pinctrl-names = "default";
@@ -92,7 +92,7 @@
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable>;
- reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
};
sound {
@@ -112,7 +112,7 @@
vcc_host_5v: usb-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host_5v";
@@ -133,7 +133,7 @@
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
- gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwr>;
regulator-name = "vcc_sd";
@@ -146,7 +146,7 @@
vcc_otg_5v: usb-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&otg_vbus_drv>;
regulator-name = "vcc_otg_5v";
@@ -159,7 +159,7 @@
dovdd_1v8: dovdd-1v8-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&dvp_pwr>;
regulator-name = "dovdd_1v8";
@@ -171,7 +171,7 @@
vcc28_dvp: vcc28-dvp-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&dvp_pwr>;
regulator-name = "vcc28_dvp";
@@ -183,7 +183,7 @@
af_28: af_28-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&dvp_pwr>;
regulator-name = "af_28";
@@ -195,7 +195,7 @@
dvdd_1v2: af_28-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cif_pwr>;
regulator-name = "dvdd_1v2";
diff --git a/arch/arm/boot/dts/rk3288-firefly.dts b/arch/arm/boot/dts/rk3288-firefly.dts
index c07fe92..14271be 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dts
+++ b/arch/arm/boot/dts/rk3288-firefly.dts
@@ -49,7 +49,7 @@
};
&ir {
- gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
};
&pinctrl {
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
index 44935af..e4dd758 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
@@ -75,7 +75,7 @@
power {
wakeup-source;
- gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
pinctrl-names = "default";
@@ -87,7 +87,7 @@
compatible = "gpio-leds";
work {
- gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>;
label = "firefly:blue:user";
linux,default-trigger = "rc-feedback";
pinctrl-names = "default";
@@ -95,7 +95,7 @@
};
power {
- gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio8 RK_PA2 GPIO_ACTIVE_LOW>;
label = "firefly:green:power";
linux,default-trigger = "default-on";
pinctrl-names = "default";
@@ -114,7 +114,7 @@
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
- gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwr>;
regulator-name = "vcc_sd";
@@ -145,7 +145,7 @@
vcc_host_5v: usb-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host_5v";
@@ -158,7 +158,7 @@
vcc_otg_5v: usb-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&otg_vbus_drv>;
regulator-name = "vcc_otg_5v";
@@ -175,7 +175,7 @@
vcc28_dvp: vcc28-dvp-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&dvp_pwr>;
regulator-name = "vcc28_dvp";
@@ -213,7 +213,7 @@
phy-mode = "rgmii";
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
- snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+ snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
tx_delay = <0x30>;
rx_delay = <0x10>;
status = "ok";
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 441d450..21326f3 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -68,7 +68,7 @@
compatible = "gpio-leds";
work {
- gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio7 RK_PA4 GPIO_ACTIVE_LOW>;
label = "miqi:green:user";
linux,default-trigger = "default-on";
pinctrl-names = "default";
@@ -87,7 +87,7 @@
vcc_host: usb-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
@@ -99,7 +99,7 @@
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
- gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwr>;
regulator-name = "vcc_sd";
@@ -146,7 +146,7 @@
phy-mode = "rgmii";
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
- snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+ snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
tx_delay = <0x30>;
rx_delay = <0x10>;
status = "ok";
diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts b/arch/arm/boot/dts/rk3288-popmetal.dts
index bc6d100..e0b5e84 100644
--- a/arch/arm/boot/dts/rk3288-popmetal.dts
+++ b/arch/arm/boot/dts/rk3288-popmetal.dts
@@ -180,7 +180,7 @@
phy-supply = <&vcc_lan>;
phy-mode = "rgmii";
clock_in_out = "input";
- snps,reset-gpio = <&gpio4 RK_PB0 0>;
+ snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
assigned-clocks = <&cru SCLK_MAC>;
diff --git a/arch/arm/boot/dts/rk3288-r89.dts b/arch/arm/boot/dts/rk3288-r89.dts
index 04faa72..54a0fc0 100644
--- a/arch/arm/boot/dts/rk3288-r89.dts
+++ b/arch/arm/boot/dts/rk3288-r89.dts
@@ -68,7 +68,7 @@
pinctrl-0 = <&pwrbtn>;
power {
- gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "GPIO Key Power";
linux,input-type = <1>;
@@ -79,7 +79,7 @@
ir: ir-receiver {
compatible = "gpio-ir-receiver";
- gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@@ -87,7 +87,7 @@
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
@@ -98,7 +98,7 @@
vcc_otg: vcc-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&otg_vbus_drv>;
regulator-name = "vcc_otg";
@@ -111,7 +111,7 @@
regulator-name = "sdmmc-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
@@ -134,7 +134,7 @@
phy-supply = <&vcc_lan>;
phy-mode = "rgmii";
clock_in_out = "input";
- snps,reset-gpio = <&gpio4 7 0>;
+ snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
assigned-clocks = <&cru SCLK_MAC>;
diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
index b25ba80..1c0bbc9 100644
--- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
@@ -51,7 +51,7 @@
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
- reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
};
ext_gmac: external-gmac-clock {
@@ -106,7 +106,7 @@
phy-supply = <&vccio_pmu>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins &phy_rst>;
- snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+ snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 30000>;
rx_delay = <0x10>;
diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts
index dd3ad2e..6cc83fe 100644
--- a/arch/arm/boot/dts/rk3288-rock2-square.dts
+++ b/arch/arm/boot/dts/rk3288-rock2-square.dts
@@ -53,13 +53,13 @@
compatible = "gpio-leds";
heartbeat {
- gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio7 RK_PB7 GPIO_ACTIVE_LOW>;
label = "rock2:green:state1";
linux,default-trigger = "heartbeat";
};
mmc {
- gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>;
label = "rock2:blue:state2";
linux,default-trigger = "mmc0";
};
@@ -67,7 +67,7 @@
ir: ir-receiver {
compatible = "gpio-ir-receiver";
- gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@@ -92,13 +92,13 @@
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable>;
- reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
};
vcc_usb_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
/* Always on as the rockchip usb phy doesn't have a vbus-supply
@@ -110,7 +110,7 @@
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
- gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwr>;
regulator-name = "vcc_sd";
diff --git a/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
index 6d105914..f8c5a47 100644
--- a/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
@@ -17,8 +17,8 @@
rockchip,model = "VEYRON-I2S";
rockchip,i2s-controller = <&i2s>;
rockchip,audio-codec = <&max98090>;
- rockchip,hp-det-gpios = <&gpio6 5 GPIO_ACTIVE_HIGH>;
- rockchip,mic-det-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+ rockchip,hp-det-gpios = <&gpio6 RK_PA5 GPIO_ACTIVE_HIGH>;
+ rockchip,mic-det-gpios = <&gpio6 RK_PB3 GPIO_ACTIVE_LOW>;
rockchip,headset-codec = <&headsetcodec>;
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-brain.dts b/arch/arm/boot/dts/rk3288-veyron-brain.dts
index cf5311d..ed42552 100644
--- a/arch/arm/boot/dts/rk3288-veyron-brain.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-brain.dts
@@ -67,7 +67,7 @@
vcc5_host2: vcc5-host2-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb2_pwr_en>;
regulator-name = "vcc5_host2";
@@ -103,8 +103,8 @@
&rk808 {
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
- dvs-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>,
- <&gpio7 15 GPIO_ACTIVE_HIGH>;
+ dvs-gpios = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>,
+ <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
/delete-property/ vcc6-supply;
@@ -133,7 +133,7 @@
&vcc50_hdmi {
enable-active-high;
- gpio = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc50_hdmi_en>;
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
index ce1f879..9e882f3 100644
--- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
@@ -91,7 +91,7 @@
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <128>;
- enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
backlight-boot-off;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
@@ -102,7 +102,7 @@
gpio-charger {
compatible = "gpio-charger";
charger-type = "mains";
- gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ac_present_ap>;
};
@@ -142,7 +142,7 @@
vcc5_host1: vcc5-host1-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host1_pwr_en>;
regulator-name = "vcc5_host1";
@@ -154,7 +154,7 @@
vcc5v_otg: vcc5v-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usbotg_pwren_h>;
regulator-name = "vcc5_host2";
@@ -190,7 +190,7 @@
pinctrl-0 = <&pwr_key_l &ap_lid_int_l>;
lid {
label = "Lid";
- gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
wakeup-source;
linux,code = <0>; /* SW_LID */
linux,input-type = <5>; /* EV_SW */
diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
index 3748abf..d33f576 100644
--- a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
@@ -57,7 +57,7 @@
panel_regulator: panel-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_enable_h>;
regulator-name = "panel_regulator";
@@ -68,7 +68,7 @@
vcc18_lcd: vcc18-lcd {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&avdd_1v8_disp_en>;
regulator-name = "vcc18_lcd";
@@ -80,7 +80,7 @@
backlight_regulator: backlight-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_pwr_en>;
regulator-name = "backlight_regulator";
@@ -134,8 +134,8 @@
&rk808 {
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
- dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
- <&gpio7 15 GPIO_ACTIVE_HIGH>;
+ dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
+ <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
regulators {
mic_vcc: LDO_REG2 {
@@ -160,14 +160,14 @@
&vcc_5v {
enable-active-high;
- gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&drv_5v>;
};
&vcc50_hdmi {
enable-active-high;
- gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc50_hdmi_en>;
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
index f6b2eaa..6107f76 100644
--- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
@@ -56,7 +56,7 @@
panel_regulator: panel-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_enable_h>;
regulator-name = "panel_regulator";
@@ -67,7 +67,7 @@
vcc18_lcd: vcc18-lcd {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&avdd_1v8_disp_en>;
regulator-name = "vcc18_lcd";
@@ -79,7 +79,7 @@
backlight_regulator: backlight-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_pwr_en>;
regulator-name = "backlight_regulator";
@@ -123,14 +123,14 @@
&vcc_5v {
enable-active-high;
- gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&drv_5v>;
};
&vcc50_hdmi {
enable-active-high;
- gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc50_hdmi_en>;
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-mickey.dts b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
index f36f6f4..f0994f0 100644
--- a/arch/arm/boot/dts/rk3288-veyron-mickey.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
@@ -182,8 +182,8 @@
&rk808 {
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
- dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
- <&gpio7 15 GPIO_ACTIVE_HIGH>;
+ dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
+ <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
/delete-property/ vcc6-supply;
/delete-property/ vcc12-supply;
@@ -244,7 +244,7 @@
&vcc50_hdmi {
enable-active-high;
- gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&power_hdmi_on>;
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
index f72d616d..53c7205 100644
--- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
@@ -55,7 +55,7 @@
backlight_regulator: backlight-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_pwr_en>;
regulator-name = "backlight_regulator";
@@ -66,7 +66,7 @@
panel_regulator: panel-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_enable_h>;
regulator-name = "panel_regulator";
@@ -77,7 +77,7 @@
vcc18_lcd: vcc18-lcd {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&avdd_1v8_disp_en>;
regulator-name = "vcc18_lcd";
@@ -134,14 +134,14 @@
volum_down {
label = "Volum_down";
- gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
debounce-interval = <100>;
};
volum_up {
label = "Volum_up";
- gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
debounce-interval = <100>;
};
@@ -168,7 +168,7 @@
interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&touch_int &touch_rst>;
- reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
vcc33-supply = <&vcc33_touch>;
vccio-supply = <&vcc33_touch>;
};
@@ -211,14 +211,14 @@
&vcc_5v {
enable-active-high;
- gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&drv_5v>;
};
&vcc50_hdmi {
enable-active-high;
- gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc50_hdmi_en>;
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-pinky.dts b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
index d44351e..995cff4 100644
--- a/arch/arm/boot/dts/rk3288-veyron-pinky.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
@@ -76,7 +76,7 @@
pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
power {
- gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
};
};
@@ -126,7 +126,7 @@
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
&sdmmc_wp_gpio &sdmmc_bus4>;
- wp-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio7 RK_PB2 GPIO_ACTIVE_HIGH>;
};
&tsadc {
diff --git a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
index fec076e..aef0710 100644
--- a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
@@ -115,7 +115,7 @@
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
- cd-gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
+ cd-gpios = <&gpio7 RK_PA5 GPIO_ACTIVE_LOW>;
rockchip,default-sample-phase = <90>;
num-slots = <1>;
sd-uhs-sdr12;
diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
index a0d033f..cc0b78c 100644
--- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
@@ -57,7 +57,7 @@
panel_regulator: panel-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_enable_h>;
regulator-name = "panel_regulator";
@@ -68,7 +68,7 @@
vcc18_lcd: vcc18-lcd {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&avdd_1v8_disp_en>;
regulator-name = "vcc18_lcd";
@@ -80,7 +80,7 @@
backlight_regulator: backlight-regulator {
compatible = "regulator-fixed";
enable-active-high;
- gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_pwr_en>;
regulator-name = "backlight_regulator";
@@ -126,14 +126,14 @@
&vcc_5v {
enable-active-high;
- gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&drv_5v>;
};
&vcc50_hdmi {
enable-active-high;
- gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc50_hdmi_en>;
};
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 2251d28..e2ecd57 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -61,7 +61,7 @@
pinctrl-0 = <&pwr_key_l>;
power {
label = "Power";
- gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <100>;
wakeup-source;
@@ -70,7 +70,7 @@
gpio-restart {
compatible = "gpio-restart";
- gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ap_warm_reset_h>;
priority = <200>;
@@ -80,7 +80,7 @@
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
- reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
};
sdio_pwrseq: sdio-pwrseq {
@@ -96,7 +96,7 @@
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
- reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
};
vcc_5v: vcc-5v {
--
2.7.4
^ permalink raw reply related
* [PATCH 0/2] Use macros to describe gpios on rockchip platform
From: Andy Yan @ 2016-10-22 12:51 UTC (permalink / raw)
To: linux-arm-kernel
As patch 150696e2e3a4("Add GPIO pin index definition for rockchip pinctrl") has
been applied, now we can use these macros to describe the corresponding gpio
ranther than hard code numbers, this will make the dts easier to read and
write.
Some ideas from Krzysztof's patch on EXYNOS[0].
[0]https://lkml.org/lkml/2016/9/4/71
Andy Yan (2):
ARM: dts: rockchip: use pin constants to describe gpios
ARM64: dts: rockchip: use pin constants to describe gpios
arch/arm/boot/dts/rk3036-evb.dts | 2 +-
arch/arm/boot/dts/rk3036-kylin.dts | 10 ++++-----
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 6 +++---
arch/arm/boot/dts/rk3066a-marsboard.dts | 2 +-
arch/arm/boot/dts/rk3066a-mk808.dts | 10 ++++-----
arch/arm/boot/dts/rk3066a-rayeager.dts | 12 +++++------
arch/arm/boot/dts/rk3188-px3-evb.dts | 4 ++--
arch/arm/boot/dts/rk3188-radxarock.dts | 16 +++++++--------
arch/arm/boot/dts/rk3229-evb.dts | 2 +-
arch/arm/boot/dts/rk3288-evb-act8846.dts | 4 ++--
arch/arm/boot/dts/rk3288-evb.dtsi | 14 ++++++-------
arch/arm/boot/dts/rk3288-fennec.dts | 4 ++--
arch/arm/boot/dts/rk3288-firefly-beta.dts | 2 +-
arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi | 2 +-
arch/arm/boot/dts/rk3288-firefly-reload.dts | 24 +++++++++++-----------
arch/arm/boot/dts/rk3288-firefly.dts | 2 +-
arch/arm/boot/dts/rk3288-firefly.dtsi | 16 +++++++--------
arch/arm/boot/dts/rk3288-miqi.dts | 8 ++++----
arch/arm/boot/dts/rk3288-popmetal.dts | 2 +-
arch/arm/boot/dts/rk3288-r89.dts | 12 +++++------
arch/arm/boot/dts/rk3288-rock2-som.dtsi | 4 ++--
arch/arm/boot/dts/rk3288-rock2-square.dts | 12 +++++------
arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi | 4 ++--
arch/arm/boot/dts/rk3288-veyron-brain.dts | 8 ++++----
arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 10 ++++-----
arch/arm/boot/dts/rk3288-veyron-jaq.dts | 14 ++++++-------
arch/arm/boot/dts/rk3288-veyron-jerry.dts | 10 ++++-----
arch/arm/boot/dts/rk3288-veyron-mickey.dts | 6 +++---
arch/arm/boot/dts/rk3288-veyron-minnie.dts | 16 +++++++--------
arch/arm/boot/dts/rk3288-veyron-pinky.dts | 4 ++--
arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi | 2 +-
arch/arm/boot/dts/rk3288-veyron-speedy.dts | 10 ++++-----
arch/arm/boot/dts/rk3288-veyron.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi | 10 ++++-----
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 8 ++++----
.../boot/dts/rockchip/rk3368-orion-r68-meta.dts | 14 ++++++-------
arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts | 4 ++--
arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 16 +++++++--------
arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 6 +++---
39 files changed, 160 insertions(+), 160 deletions(-)
--
2.7.4
^ permalink raw reply
* [PATCH v2 1/3] ARM: dts: imx6qdl-apalis: Do not rely on DDC I2C bus bitbang for HDMI
From: Vladimir Zapolskiy @ 2016-10-22 12:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161022032559.GL30578@tiger>
Hi Shawn,
On 10/22/2016 06:25 AM, Shawn Guo wrote:
> On Mon, Sep 19, 2016 at 10:41:51AM +0530, Sanchayan Maity wrote:
>> Remove the use of DDC I2C bus bitbang to support reading of EDID
>> and rely on support from internal HDMI I2C master controller instead.
>> As a result remove the device tree property ddc-i2c-bus.
>>
>> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
>
> I think that the dw-hdmi i2c support [1] is a prerequisite of this
> patch. I do not see it lands on v4.9-rc1. Or am I missing something?
>
> Shawn
>
> [1] https://patchwork.kernel.org/patch/9296883/
>
I'm adding Philipp to Cc, since he is the last one who tested the change
and helped me to push the change to the mainline:
https://lists.freedesktop.org/archives/dri-devel/2016-September/118569.html
The problem is that there is no official DW HDMI bridge maintainer, may be
you can review the change, and if you find it satisfactory push it through
ARM/iMX tree.
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH v2] mtd: nand: Add OX820 NAND Support
From: Boris Brezillon @ 2016-10-22 12:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020084901.6486-1-narmstrong@baylibre.com>
On Thu, 20 Oct 2016 10:49:01 +0200
Neil Armstrong <narmstrong@baylibre.com> wrote:
> Add NAND driver to support the Oxford Semiconductor OX820 NAND Controller.
> This is a simple memory mapped NAND controller with single chip select and
> software ECC.
>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Applied.
Thanks,
Boris
> ---
> .../devicetree/bindings/mtd/oxnas-nand.txt | 41 +++++
> drivers/mtd/nand/Kconfig | 5 +
> drivers/mtd/nand/Makefile | 1 +
> drivers/mtd/nand/oxnas_nand.c | 196 +++++++++++++++++++++
> 4 files changed, 243 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/oxnas-nand.txt
> create mode 100644 drivers/mtd/nand/oxnas_nand.c
>
> Changes since v1 http://lkml.kernel.org/r/20161019145523.6763-1-narmstrong at baylibre.com :
> - Simplify cmd_ctrl command and drop the ctrl address offset
> - Change oxnas_nand struct name to oxnas_nand_ctrl
> - Update DT-Bindings example to reflect the ctrl->chip->partitions hierarchy
>
> Changes since RFC http://lkml.kernel.org/r/20161018090927.1990-1-narmstrong at baylibre.com :
> - Avoid using chip->IO_ADDR*
> - Use new DT structure
> - Assign a chip for the subnode
> - Use the nand_hw_control structure
> - Cleanup probe
> - Cleanup cmd_ctrl by using a context ctrl offset used in write_bytes
>
> diff --git a/Documentation/devicetree/bindings/mtd/oxnas-nand.txt b/Documentation/devicetree/bindings/mtd/oxnas-nand.txt
> new file mode 100644
> index 0000000..33a77b8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/oxnas-nand.txt
> @@ -0,0 +1,41 @@
> +* Oxford Semiconductor OXNAS NAND Controller
> +
> +Please refer to nand.txt for generic information regarding MTD NAND bindings.
> +
> +Required properties:
> + - compatible: "oxsemi,ox820-nand"
> + - reg: Base address and length for NAND mapped memory.
> +
> +Optional Properties:
> + - clocks: phandle to the NAND gate clock if needed.
> + - resets: phandle to the NAND reset control if needed.
> +
> +Example:
> +
> +nand: nand-controller at 41000000 {
> + compatible = "oxsemi,ox820-nand";
> + reg = <0x41000000 0x100000>;
> + clocks = <&stdclk CLK_820_NAND>;
> + resets = <&reset RESET_NAND>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + nand at 0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + nand-ecc-mode = "soft";
> + nand-ecc-algo = "hamming";
> +
> + partition at 0 {
> + label = "boot";
> + reg = <0x00000000 0x00e00000>;
> + read-only;
> + };
> +
> + partition at e00000 {
> + label = "ubi";
> + reg = <0x00e00000 0x07200000>;
> + };
> + };
> +};
> diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> index 7b7a887..c023125 100644
> --- a/drivers/mtd/nand/Kconfig
> +++ b/drivers/mtd/nand/Kconfig
> @@ -426,6 +426,11 @@ config MTD_NAND_ORION
> No board specific support is done by this driver, each board
> must advertise a platform_device for the driver to attach.
>
> +config MTD_NAND_OXNAS
> + tristate "NAND Flash support for Oxford Semiconductor SoC"
> + help
> + This enables the NAND flash controller on Oxford Semiconductor SoCs.
> +
> config MTD_NAND_FSL_ELBC
> tristate "NAND support for Freescale eLBC controllers"
> depends on FSL_SOC
> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> index cafde6f..05fc054 100644
> --- a/drivers/mtd/nand/Makefile
> +++ b/drivers/mtd/nand/Makefile
> @@ -35,6 +35,7 @@ obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
> obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
> obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
> obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
> +obj-$(CONFIG_MTD_NAND_OXNAS) += oxnas_nand.o
> obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o
> obj-$(CONFIG_MTD_NAND_FSL_IFC) += fsl_ifc_nand.o
> obj-$(CONFIG_MTD_NAND_FSL_UPM) += fsl_upm.o
> diff --git a/drivers/mtd/nand/oxnas_nand.c b/drivers/mtd/nand/oxnas_nand.c
> new file mode 100644
> index 0000000..35c94af
> --- /dev/null
> +++ b/drivers/mtd/nand/oxnas_nand.c
> @@ -0,0 +1,196 @@
> +/*
> + * Oxford Semiconductor OXNAS NAND driver
> +
> + * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
> + * Heavily based on plat_nand.c :
> + * Author: Vitaly Wool <vitalywool@gmail.com>
> + * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
> + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + */
> +
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/clk.h>
> +#include <linux/reset.h>
> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/nand.h>
> +#include <linux/mtd/partitions.h>
> +#include <linux/of.h>
> +
> +/* Nand commands */
> +#define OXNAS_NAND_CMD_ALE BIT(18)
> +#define OXNAS_NAND_CMD_CLE BIT(19)
> +
> +#define OXNAS_NAND_MAX_CHIPS 1
> +
> +struct oxnas_nand_ctrl {
> + struct nand_hw_control base;
> + void __iomem *io_base;
> + struct clk *clk;
> + struct nand_chip *chips[OXNAS_NAND_MAX_CHIPS];
> +};
> +
> +static uint8_t oxnas_nand_read_byte(struct mtd_info *mtd)
> +{
> + struct nand_chip *chip = mtd_to_nand(mtd);
> + struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
> +
> + return readb(oxnas->io_base);
> +}
> +
> +static void oxnas_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
> +{
> + struct nand_chip *chip = mtd_to_nand(mtd);
> + struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
> +
> + ioread8_rep(oxnas->io_base, buf, len);
> +}
> +
> +static void oxnas_nand_write_buf(struct mtd_info *mtd,
> + const uint8_t *buf, int len)
> +{
> + struct nand_chip *chip = mtd_to_nand(mtd);
> + struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
> +
> + iowrite8_rep(oxnas->io_base, buf, len);
> +}
> +
> +/* Single CS command control */
> +static void oxnas_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
> + unsigned int ctrl)
> +{
> + struct nand_chip *chip = mtd_to_nand(mtd);
> + struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
> +
> + if (ctrl & NAND_CLE)
> + writeb(cmd, oxnas->io_base + OXNAS_NAND_CMD_CLE);
> + else if (ctrl & NAND_ALE)
> + writeb(cmd, oxnas->io_base + OXNAS_NAND_CMD_ALE);
> +}
> +
> +/*
> + * Probe for the NAND device.
> + */
> +static int oxnas_nand_probe(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct device_node *nand_np;
> + struct oxnas_nand_ctrl *oxnas;
> + struct nand_chip *chip;
> + struct mtd_info *mtd;
> + struct resource *res;
> + int nchips = 0;
> + int count = 0;
> + int err = 0;
> +
> + /* Allocate memory for the device structure (and zero it) */
> + oxnas = devm_kzalloc(&pdev->dev, sizeof(struct nand_chip),
> + GFP_KERNEL);
> + if (!oxnas)
> + return -ENOMEM;
> +
> + nand_hw_control_init(&oxnas->base);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + oxnas->io_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(oxnas->io_base))
> + return PTR_ERR(oxnas->io_base);
> +
> + oxnas->clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(oxnas->clk))
> + oxnas->clk = NULL;
> +
> + /* Only a single chip node is supported */
> + count = of_get_child_count(np);
> + if (count > 1)
> + return -EINVAL;
> +
> + clk_prepare_enable(oxnas->clk);
> + device_reset_optional(&pdev->dev);
> +
> + for_each_child_of_node(np, nand_np) {
> + chip = devm_kzalloc(&pdev->dev, sizeof(struct nand_chip),
> + GFP_KERNEL);
> + if (!chip)
> + return -ENOMEM;
> +
> + chip->controller = &oxnas->base;
> +
> + nand_set_flash_node(chip, nand_np);
> + nand_set_controller_data(chip, oxnas);
> +
> + mtd = nand_to_mtd(chip);
> + mtd->dev.parent = &pdev->dev;
> + mtd->priv = chip;
> +
> + chip->cmd_ctrl = oxnas_nand_cmd_ctrl;
> + chip->read_buf = oxnas_nand_read_buf;
> + chip->read_byte = oxnas_nand_read_byte;
> + chip->write_buf = oxnas_nand_write_buf;
> + chip->chip_delay = 30;
> +
> + /* Scan to find existence of the device */
> + err = nand_scan(mtd, 1);
> + if (err)
> + return err;
> +
> + err = mtd_device_register(mtd, NULL, 0);
> + if (err) {
> + nand_release(mtd);
> + return err;
> + }
> +
> + oxnas->chips[nchips] = chip;
> + ++nchips;
> + }
> +
> + /* Exit if no chips found */
> + if (!nchips)
> + return -ENODEV;
> +
> + platform_set_drvdata(pdev, oxnas);
> +
> + return 0;
> +}
> +
> +static int oxnas_nand_remove(struct platform_device *pdev)
> +{
> + struct oxnas_nand_ctrl *oxnas = platform_get_drvdata(pdev);
> +
> + if (oxnas->chips[0])
> + nand_release(nand_to_mtd(oxnas->chips[0]));
> +
> + clk_disable_unprepare(oxnas->clk);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id oxnas_nand_match[] = {
> + { .compatible = "oxsemi,ox820-nand" },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, oxnas_nand_match);
> +
> +static struct platform_driver oxnas_nand_driver = {
> + .probe = oxnas_nand_probe,
> + .remove = oxnas_nand_remove,
> + .driver = {
> + .name = "oxnas_nand",
> + .of_match_table = oxnas_nand_match,
> + },
> +};
> +
> +module_platform_driver(oxnas_nand_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
> +MODULE_DESCRIPTION("Oxnas NAND driver");
> +MODULE_ALIAS("platform:oxnas_nand");
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