* [RESEND PATCH v1 6/6] ARM: virt: Select ARM_GIC_V3_ITS
From: Vladimir Murzin @ 2016-11-07 9:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478510482-15471-1-git-send-email-vladimir.murzin@arm.com>
This patch allows ARM guests to use GICv3 ITS on an arm64 host
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b5d529f..caef684 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -703,6 +703,7 @@ config ARCH_VIRT
select ARM_GIC
select ARM_GIC_V2M if PCI
select ARM_GIC_V3
+ select ARM_GIC_V3_ITS if PCI
select ARM_PSCI
select HAVE_ARM_ARCH_TIMER
--
1.7.9.5
^ permalink raw reply related
* [linux-sunxi] Re: [RFC PATCH] ARM: dts: add panel and tcon nodes to Allwinner A33 Q8 tablet dts
From: Hans de Goede @ 2016-11-07 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2578261478451207@web24j.yandex.ru>
Hi,
On 06-11-16 17:53, Icenowy Zheng wrote:
>
>
> 06.11.2016, 22:27, "Hans de Goede" <hdegoede@redhat.com>:
>> Hi,
>>
>> On 06-11-16 12:11, Icenowy Zheng wrote:
>>> All A33 Q8 tablets features a LCD panel, with a resolution of either
>>> 800x480 or 1024x600.
>>>
>>> Add "bone" device nodes to the device tree.
>>
>> Bone ?
>>
>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
>>
>> He, as discussed in the other thread since sun8i-a33-q8-tablet.dts
>> is used for both 800x480 and 1024x600 versions we really need to
>> introduce new sun8i-a33-q8-tablet-800x600.dts and
>> sun8i-a33-q8-tablet-1024x600.dts files, which include
>> sun8i-a33-q8-tablet.dts and then add just the panel bits; and patch
>> newer u-boots to use those instead.
>>
>> This way people who stick with an old u-boot will just not get
>> the drm driver, rather then all of a sudden getting a wrong
>> resolution.
>>
>> Icenowy, can you please also submit a matching u-boot patch
>> (both the new dts file, as well as updating the defconfig you
>> use to the new dts file)?
>
> Could you choose a compatible for 1024x600 variant?
Lets just add a sun8i-a33-q8-tablet-800x600.dts now and then
I will add a sun8i-a33-q8-tablet-1024x600.dts file later.
Regards,
Hans
>
> (Since I have never such a Q8 tablet)
>
>>
>> Regards,
>>
>> Hans
>>
>>> ---
>>>
>>> Maybe it will be better to add them to sun8i-q8-reference-tablet.dtsi, as
>>> these pin configurations are part of reference design of both A23 and A33,
>>> not only restricted to Q8.
>>>
>>> The DTS file is tested by me, after cherry-picks this patch from Chen-Yu Tsai:
>>> https://github.com/wens/linux/commit/2823b887a289fbee5f97f3c6b45ed6c74a6368c6
>>>
>>> And add these commands to my U-Boot boot command:
>>>
>>> fdt addr 0x43000000
>>> fdt resize
>>> fdt set /panel compatible "urt,umsh-8596md-t"
>>> fdt set /panel status "okay"
>>> fdt set /display-engine status "okay"
>>> fdt set /soc at 01c00000/lcd-controller at 01c0c000 status "okay"
>>>
>>> arch/arm/boot/dts/sun8i-a33-q8-tablet.dts | 44 +++++++++++++++++++++++++++++++
>>> 1 file changed, 44 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
>>> index b0bc236..871a20c 100644
>>> --- a/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
>>> +++ b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
>>> @@ -47,4 +47,48 @@
>>> / {
>>> model = "Q8 A33 Tablet";
>>> compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
>>> +
>>> + panel: panel {
>>> + /* compatible should be set according to the panel */
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&lcd_en_q8>;
>>> + backlight = <&backlight>;
>>> + enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
>>> + power-supply = <®_dc1sw>;
>>> + status = "disabled";
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port at 0 {
>>> + reg = <0>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + panel_input: endpoint at 0 {
>>> + reg = <0>;
>>> + remote-endpoint = <&tcon0_out_lcd>;
>>> + };
>>> + };
>>> + };
>>> +};
>>> +
>>> +&tcon0 {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&lcd_rgb666_pins>;
>>> +};
>>> +
>>> +&tcon0_out {
>>> + tcon0_out_lcd: endpoint at 0 {
>>> + reg = <0>;
>>> + remote-endpoint = <&panel_input>;
>>> + };
>>> +};
>>> +
>>> +&pio {
>>> + lcd_en_q8: lcd_en at 0 {
>>> + allwinner,pins = "PH7";
>>> + allwinner,function = "gpio_out";
>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
>>> + };
>>> };
>
^ permalink raw reply
* [PATCH v4 00/23] soc: renesas: Add R-Car RST driver for obtaining mode pin state
From: Geert Uytterhoeven @ 2016-11-07 9:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161104194914.GB16026@codeaurora.org>
Hi Stephen,
On Fri, Nov 4, 2016 at 8:49 PM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 11/02, Geert Uytterhoeven wrote:
>> On Tue, Nov 1, 2016 at 12:25 AM, Stephen Boyd <sboyd@codeaurora.org> wrote:
>> >
>> > Would the pull requests for clk also have dts changes at the base
>> > of the tree? Perhaps clk side can just ack the clk patches and
>>
>> Yes they would: this is moving functionality from platform code to DT.
>> Without the DT updates, it will break bisection (except for R-Car Gen2,
>> where we have fallback code to handle old DTBs).
>>
>> > then have it all routed through arm-soc? The only worry I have is
>> > if we need to make some sort of change in clk side that conflicts
>> > with these changes. I don't usually like taking dts changes
>> > through clk tree, so I'd like to avoid that if possible.
>>
>> Everything could go through arm-soc only with your Acked-by.
>> However, there are new clock drivers pending on this series.
>> Either they have to go through arm-soc, too, or this series would
>> be pulled into the clk tree with these new clock drivers.
>>
>> > Part E could happen anytime after everything else happens, so
>> > that doesn't seem like a concern.
>>
>> Part E can indeed by postponed.
>> But if parts A-D are applied together, there's no reason to postpone part E.
>>
>> > Part C could also be made to
>> > only call into the new reset drivers if the reset dts nodes are
>> > present? If that's done then we could merge clk patches anytime
>> > and remove the dead code and the node search at some later time
>> > when everything has settled?
>>
>> That would require adding more backwards compatibility code for
>> old DTBs, even for platform where we're not interested in maintaining
>> that. In addition, Part C depends on the header file for the reset driver
>> to compile the clock driver, even if you would add some DT detection,
>> and on the reset driver to link. So I'm afraid this is not feasible.
>
> TL;DR: Sounds fine, I'll be on the lookout for the PR.
Thank you very much!
> Longer version: Let me step back a bit and actually think about
> this longer than 2 minutes. From what I see
> rcar_rst_read_mode_pins() already returns -ENODEV if the nodes
> aren't present. Great.
>
> So clk tree could be given a pull for the clk patches, part C, on
> top of part A, the reset driver. If the rcar_rst_read_mode_pins()
> returns failure because the node is missing, we fall back to the
> old style of doing things. Some drivers already do that anyway,
For R-Car Gen2, we want to keep backwards compatibility for a while.
But not for the others, and I didn't want to add more code that was going
to be removed again soon.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]
From: Linus Walleij @ 2016-11-07 9:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478097481-14895-2-git-send-email-andrew@aj.id.au>
On Wed, Nov 2, 2016 at 3:37 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> If a pin depending on bit 6 in SCU90 is requested for GPIO, the export
> will succeed but changes to the GPIO's value will not be accepted by the
> hardware. This is because the pinmux driver has misconfigured the SCU by
> writing 1 to the reserved bit.
>
> The description of SCU90[6] from the datasheet is 'Reserved, must keep
> at value ?0?'. The fix is to switch pinmux from the bit-flipping macro
> to explicitly configuring the .enable and .disable values to zero.
>
> The patch has been tested on an AST2500 EVB.
>
> Fixes: 56e57cb6c07f (pinctrl: Add pinctrl-aspeed-g5 driver)
> Reported-by: Uma Yadlapati <yadlapat@us.ibm.com>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> ---
>
> This patch should be applied for 4.9.
Patch applied for fixes, adding Joel's review tag.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]
From: Linus Walleij @ 2016-11-07 9:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACPK8Xcbv5VjE9deETV6zC4cPSfeBSgP96QYqV_ebAgtB9Jwtw@mail.gmail.com>
On Thu, Nov 3, 2016 at 11:59 PM, Joel Stanley <joel@jms.id.au> wrote:
> In the future I think we should send fixes separately from the rest of
> the series, so it's clear to Linus where we expect patches to end up.
>
> Perhaps Linus can share his preference with us?
Just make it clear to me where the patch is headed, if it is
a fix or a new feature.
Also mixing stuff in big series is of course problematic because
all the CC:in on MFD patches and whatnot that I don't apply
makes the picture blurry, but sometimes it is anyways needed
for context so it is a soft requirement.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2 0/7] soc: renesas: Identify SoC and register with the SoC bus
From: Geert Uytterhoeven @ 2016-11-07 9:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477913455-5314-1-git-send-email-geert+renesas@glider.be>
On Mon, Oct 31, 2016 at 12:30 PM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> Some Renesas SoCs may exist in different revisions, providing slightly
> different functionalities (e.g. R-Car H3 ES1.x and ES2.0), and behavior
> (errate and quirks). This needs to be catered for by drivers and/or
> platform code. The recently proposed soc_device_match() API seems like
> a good fit to handle this.
>
> This patch series implements the core infrastructure to provide SoC and
> revision information through the SoC bus for Renesas ARM SoCs. It
> consists of 7 patches:
> - Patches 1-4 provide soc_device_match(), with some related fixes,
> - Patches 5-7 implement identification of Renesas SoCs and
> registration with the SoC bus,
>
> Changes compared to v1:
> - Add Acked-by,
> - New patches:
> - "[4/7] base: soc: Provide a dummy implementation of
> soc_device_match()",
> - "[5/7] ARM: shmobile: Document DT bindings for CCCR and PRR",
> - "[6/7] arm64: dts: r8a7795: Add device node for PRR"
> (more similar patches available, I'm not yet spamming you all
> with them),
> - Drop SoC families and family names; use fixed "Renesas" instead,
> - Drop EMEV2, which doesn't have a chip ID register, and doesn't share
> devices with other SoCs,
> - Drop RZ/A1H and R-CAR M1A, which don't have chip ID registers (for
> M1A: not accessible from the ARM core?),
> - On arm, move "select SOC_BUS" from ARCH_RENESAS to Kconfig symbols
> for SoCs that provide a chip ID register,
> - Build renesas-soc only if SOC_BUS is enabled,
> - Use "renesas,prr" and "renesas,cccr" device nodes in DT if
> available, else fall back to hardcoded addresses for compatibility
> with existing DTBs,
> - Remove verification of product IDs; just print the ID instead,
> - Don't register the SoC bus if the chip ID register is missing,
> - Change R-Mobile APE6 fallback to use PRR instead of CCCR (it has
> both).
>
> Merge strategy:
> - In theory, patches 1-4 should go through Greg's driver core tree.
> But it's a hard dependency for all users.
> If people agree, I can provide an immutable branch in my
> renesas-drivers repository, to be merged by all interested parties.
> So far I'm aware of Freescale/NXP, and Renesas.
And Samsung.
Shall I create the immutable branch now?
Thanks!
> - Patches 5-7 obviously have to go through Simon's Renesas tree (after
> merging the soc_device_match() core), and arm-soc.
>
> Tested on (machine, soc_id, optional revision):
> EMEV2 KZM9D Board, emev2
> Genmai, r7s72100
> APE6EVM, r8a73a4, ES1.0
> armadillo 800 eva, r8a7740, ES2.0
> bockw, r8a7778
> marzen, r8a7779, ES1.0
> Lager, r8a7790, ES1.0
> Koelsch, r8a7791, ES1.0
> Porter, r8a7791, ES3.0
> Blanche, r8a7792, ES1.1
> Gose, r8a7793, ES1.0
> Alt, r8a7794, ES1.0
> Renesas Salvator-X board based on r8a7795, r8a7795, ES1.0
> Renesas Salvator-X board based on r8a7795, r8a7795, ES1.1
> Renesas Salvator-X board based on r8a7796, r8a7796, ES1.0
> KZM-A9-GT, sh73a0, ES2.0
>
> For your convenience, this series (incl. more DT updates to add device
> nodes for CCCR and PRR to all other Renesas ARM SoCs) is also available
> in the topic/renesas-soc-id-v2 branch of my renesas-drivers git
> repository at
> git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
> Its first user is support for R-Car H3 ES2.0 in branch
> topic/r8a7795-es2-v1-rebased2.
>
> Thanks for your comments!
>
> Arnd Bergmann (1):
> base: soc: Introduce soc_device_match() interface
>
> Geert Uytterhoeven (6):
> base: soc: Early register bus when needed
> base: soc: Check for NULL SoC device attributes
> base: soc: Provide a dummy implementation of soc_device_match()
> ARM: shmobile: Document DT bindings for CCCR and PRR
> arm64: dts: r8a7795: Add device node for PRR
> soc: renesas: Identify SoC and register with the SoC bus
>
> Documentation/devicetree/bindings/arm/shmobile.txt | 26 +++++
> arch/arm/mach-shmobile/Kconfig | 3 +
> arch/arm64/Kconfig.platforms | 1 +
> arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 +
> drivers/base/Kconfig | 1 +
> drivers/base/soc.c | 79 +++++++++++++
> drivers/soc/renesas/Makefile | 2 +
> drivers/soc/renesas/renesas-soc.c | 130 +++++++++++++++++++++
> include/linux/sys_soc.h | 9 ++
> 9 files changed, 256 insertions(+)
> create mode 100644 drivers/soc/renesas/renesas-soc.c
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [BUG] pinctrl: sunxi: sunxi-pinctrl fail to load with CONFIG_DEBUG_TEST_DRIVER_REMOVE
From: Chen-Yu Tsai @ 2016-11-07 9:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161107081832.GA23580@Red>
Hi,
On Mon, Nov 7, 2016 at 4:18 PM, LABBE Corentin
<clabbe.montjoie@gmail.com> wrote:
> Hello
>
> With CONFIG_DEBUG_TEST_DRIVER_REMOVE=y pinctrl-sunxi fail to load on the second try.
>
> [ 3.900061] sun8i-h3-pinctrl 1c20800.pinctrl: initialized sunXi PIO driver
> [ 3.916251] gpio gpiochip1: GPIO integer space overlap, cannot add chip
> [ 3.923016] gpiochip_add_data: GPIOs 0..223 (1c20800.pinctrl) failed to register
> [ 3.931099] sun8i-h3-pinctrl: probe of 1c20800.pinctrl failed with error -16
> [ 3.944709] sun8i-h3-r-pinctrl 1f02c00.pinctrl: initialized sunXi PIO driver
> [ 3.960796] gpio gpiochip2: GPIO integer space overlap, cannot add chip
> [ 3.967594] gpiochip_add_data: GPIOs 352..383 (1f02c00.pinctrl) failed to register
> [ 3.975633] sun8i-h3-r-pinctrl: probe of 1f02c00.pinctrl failed with error -16
>
> Without it, all subsequent drivers fail to load.
> Tested on Orange PI PC board.
I don't think the pinctrl drivers were designed to be removed.
And I thought the lack of a .remove callback in the driver blocks
the core from removing the device? Maybe I remember wrong...
ChenYu
>
> Regards
^ permalink raw reply
* [BUG] pinctrl: sunxi: sunxi-pinctrl fail to load with CONFIG_DEBUG_TEST_DRIVER_REMOVE
From: Maxime Ripard @ 2016-11-07 9:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGb2v65MHBUwWzcqwPYDtFNxgGnMECUMjHdZNOv6YPP4HVzwTw@mail.gmail.com>
On Mon, Nov 07, 2016 at 05:48:43PM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Mon, Nov 7, 2016 at 4:18 PM, LABBE Corentin
> <clabbe.montjoie@gmail.com> wrote:
> > Hello
> >
> > With CONFIG_DEBUG_TEST_DRIVER_REMOVE=y pinctrl-sunxi fail to load on the second try.
> >
> > [ 3.900061] sun8i-h3-pinctrl 1c20800.pinctrl: initialized sunXi PIO driver
> > [ 3.916251] gpio gpiochip1: GPIO integer space overlap, cannot add chip
> > [ 3.923016] gpiochip_add_data: GPIOs 0..223 (1c20800.pinctrl) failed to register
> > [ 3.931099] sun8i-h3-pinctrl: probe of 1c20800.pinctrl failed with error -16
> > [ 3.944709] sun8i-h3-r-pinctrl 1f02c00.pinctrl: initialized sunXi PIO driver
> > [ 3.960796] gpio gpiochip2: GPIO integer space overlap, cannot add chip
> > [ 3.967594] gpiochip_add_data: GPIOs 352..383 (1f02c00.pinctrl) failed to register
> > [ 3.975633] sun8i-h3-r-pinctrl: probe of 1f02c00.pinctrl failed with error -16
> >
> > Without it, all subsequent drivers fail to load.
> > Tested on Orange PI PC board.
>
> I don't think the pinctrl drivers were designed to be removed.
> And I thought the lack of a .remove callback in the driver blocks
> the core from removing the device? Maybe I remember wrong...
Using a builtin_platform_driver should be enough to prevent it to be
removed.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [PATCH v8 0/3] ARM, arm64: renesas: Enable UHS-I SDR-104
From: Simon Horman @ 2016-11-07 9:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105114501.GC1581@katana>
On Sat, Nov 05, 2016 at 12:45:02PM +0100, Wolfram Sang wrote:
>
> > To aid review the following git branches are provided:
> > * This patchset:
> > https:://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git topic/sdr104-integration-v8
> > * This patch-set and above dependency
> > https:://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git topic/sdr104-v8
>
> driver-v8 is there, but those two are not. Forgot to push out? :)
Sorry about that, they should be there now.
^ permalink raw reply
* [BUG] pinctrl: sunxi: sunxi-pinctrl fail to load with CONFIG_DEBUG_TEST_DRIVER_REMOVE
From: Chen-Yu Tsai @ 2016-11-07 9:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161107095612.ih5ns24m2qiwujy5@lukather>
On Mon, Nov 7, 2016 at 5:56 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Mon, Nov 07, 2016 at 05:48:43PM +0800, Chen-Yu Tsai wrote:
>> Hi,
>>
>> On Mon, Nov 7, 2016 at 4:18 PM, LABBE Corentin
>> <clabbe.montjoie@gmail.com> wrote:
>> > Hello
>> >
>> > With CONFIG_DEBUG_TEST_DRIVER_REMOVE=y pinctrl-sunxi fail to load on the second try.
>> >
>> > [ 3.900061] sun8i-h3-pinctrl 1c20800.pinctrl: initialized sunXi PIO driver
>> > [ 3.916251] gpio gpiochip1: GPIO integer space overlap, cannot add chip
>> > [ 3.923016] gpiochip_add_data: GPIOs 0..223 (1c20800.pinctrl) failed to register
>> > [ 3.931099] sun8i-h3-pinctrl: probe of 1c20800.pinctrl failed with error -16
>> > [ 3.944709] sun8i-h3-r-pinctrl 1f02c00.pinctrl: initialized sunXi PIO driver
>> > [ 3.960796] gpio gpiochip2: GPIO integer space overlap, cannot add chip
>> > [ 3.967594] gpiochip_add_data: GPIOs 352..383 (1f02c00.pinctrl) failed to register
>> > [ 3.975633] sun8i-h3-r-pinctrl: probe of 1f02c00.pinctrl failed with error -16
>> >
>> > Without it, all subsequent drivers fail to load.
>> > Tested on Orange PI PC board.
>>
>> I don't think the pinctrl drivers were designed to be removed.
>> And I thought the lack of a .remove callback in the driver blocks
>> the core from removing the device? Maybe I remember wrong...
>
> Using a builtin_platform_driver should be enough to prevent it to be
> removed.
Labbe, can you test it again on linux-next? Or at least with this patch
0c8c6ba00cbf pinctrl: sunxi: make bool drivers explicitly non-modular
from linux-pinctrl applied. This should fix it.
ChenYu
^ permalink raw reply
* [BUG] pinctrl: sunxi: sunxi-pinctrl fail to load with CONFIG_DEBUG_TEST_DRIVER_REMOVE
From: Corentin Labbe @ 2016-11-07 9:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161107095612.ih5ns24m2qiwujy5@lukather>
On Mon, Nov 07, 2016 at 10:56:12AM +0100, Maxime Ripard wrote:
> On Mon, Nov 07, 2016 at 05:48:43PM +0800, Chen-Yu Tsai wrote:
> > Hi,
> >
> > On Mon, Nov 7, 2016 at 4:18 PM, LABBE Corentin
> > <clabbe.montjoie@gmail.com> wrote:
> > > Hello
> > >
> > > With CONFIG_DEBUG_TEST_DRIVER_REMOVE=y pinctrl-sunxi fail to load on the second try.
> > >
> > > [ 3.900061] sun8i-h3-pinctrl 1c20800.pinctrl: initialized sunXi PIO driver
> > > [ 3.916251] gpio gpiochip1: GPIO integer space overlap, cannot add chip
> > > [ 3.923016] gpiochip_add_data: GPIOs 0..223 (1c20800.pinctrl) failed to register
> > > [ 3.931099] sun8i-h3-pinctrl: probe of 1c20800.pinctrl failed with error -16
> > > [ 3.944709] sun8i-h3-r-pinctrl 1f02c00.pinctrl: initialized sunXi PIO driver
> > > [ 3.960796] gpio gpiochip2: GPIO integer space overlap, cannot add chip
> > > [ 3.967594] gpiochip_add_data: GPIOs 352..383 (1f02c00.pinctrl) failed to register
> > > [ 3.975633] sun8i-h3-r-pinctrl: probe of 1f02c00.pinctrl failed with error -16
> > >
> > > Without it, all subsequent drivers fail to load.
> > > Tested on Orange PI PC board.
> >
> > I don't think the pinctrl drivers were designed to be removed.
> > And I thought the lack of a .remove callback in the driver blocks
> > the core from removing the device? Maybe I remember wrong...
>
> Using a builtin_platform_driver should be enough to prevent it to be
> removed.
>
The problem is that it is already builtin_platform_driver()
^ permalink raw reply
* [PATCH] staging: vc04_services: add vchiq_pagelist_info structure
From: Greg KH @ 2016-11-07 10:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161031081035.22677-1-mzoran@crowfest.net>
On Mon, Oct 31, 2016 at 01:10:35AM -0700, Michael Zoran wrote:
> The current dma_map_sg based implementation for bulk messages
> computes many offsets into a single allocation multiple times in
> both the create and free code paths. This is inefficient,
> error prone and in fact still has a few lingering issues
> with arm64.
>
> This change replaces a small portion of that inplementation with
> new code that uses a new struct vchiq_pagelist_info to store the
> needed information rather then complex offset calculations.
>
> This improved implementation should be more efficient and easier
> to understand and maintain.
>
> Tests Run(Both Pass):
> vchiq_test -p 1
> vchiq_test -f 10
>
> Signed-off-by: Michael Zoran <mzoran@crowfest.net>
> ---
> .../interface/vchiq_arm/vchiq_2835_arm.c | 223 +++++++++++----------
> 1 file changed, 113 insertions(+), 110 deletions(-)
This doesn't apply to the tree anymore because of your previous patch :(
Can you refresh it and resend?
thanks,
greg k-h
^ permalink raw reply
* [PATCH v3 0/6] ASoC: sun4i-codec: Add support for A31 Codec
From: Chen-Yu Tsai @ 2016-11-07 10:06 UTC (permalink / raw)
To: linux-arm-kernel
Hi everyone,
This is v3 of my Allwinner A31 audio codec support series. These are
the remaining driver patches not yet merged, with 1 new fix, and the
dts file patches.
The A31's internal codec is similar (in terms of DMA, interface and
control layouts) to the one found in the A10/A13/A20 SoCs. However
it has more external inputs and outputs, the mixer controls are now
stereo (left/right separated), and it also has some audio processing
features (not supported yet).
Changes since v2:
- Added patch """ASoC: sun4i-codec: Add "Right Mixer" to "Line Out
Mono Diff." route""" which fixes line out when all the sources
have their left channel muted.
- Dropped unused codec_pa_pin from A31 hummingbird dts patch.
In the past we always provided a pinmux setting for GPIOs used, to
avoid accidentally muxing a pin that was already used for GPIO, or
vice versa. The pinctrl subsystem now supports exclusive use of a
pin for GPIO, which the sunxi platform wants to migrate to. This
drops the requirement of the explicit pinmux setting for GPIOs.
- Added Maxime's Acked-by for the two existing patches from v2.
After these are merged I plan to submit patches to support the audio
codec found in Allwinner's A23 and H3 SoCs.
Regards
ChenYu
Chen-Yu Tsai (6):
ASoC: sun4i-codec: Add support for optional reset control to quirks
ASoC: sun4i-codec: Add support for A31 ADC capture path
ASoC: sun4i-codec: Add "Right Mixer" to "Line Out Mono Diff." route
ARM: dts: sun6i: Add audio codec device node
ARM: dts: sun6i: hummingbird: Enable internal audio codec
ARM: dts: sun6i: sina31s: Enable internal audio codec
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 13 ++++
arch/arm/boot/dts/sun6i-a31.dtsi | 13 ++++
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 8 +++
sound/soc/sunxi/sun4i-codec.c | 94 ++++++++++++++++++++++++++++-
4 files changed, 127 insertions(+), 1 deletion(-)
--
2.10.2
^ permalink raw reply
* [PATCH v3 1/6] ASoC: sun4i-codec: Add support for optional reset control to quirks
From: Chen-Yu Tsai @ 2016-11-07 10:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161107100703.5586-1-wens@csie.org>
The later Allwinner SoCs have a dedicated reset controller, and
peripherals have dedicated reset controls which need to be deasserted
before the associated peripheral can be used.
Add support for this to the quirks structure and probe/remove functions.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
sound/soc/sunxi/sun4i-codec.c | 28 +++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 1934db29b2b5..b28b82a5ec62 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -30,6 +30,7 @@
#include <linux/of_platform.h>
#include <linux/clk.h>
#include <linux/regmap.h>
+#include <linux/reset.h>
#include <linux/gpio/consumer.h>
#include <sound/core.h>
@@ -217,6 +218,7 @@ struct sun4i_codec {
struct regmap *regmap;
struct clk *clk_apb;
struct clk *clk_module;
+ struct reset_control *rst;
struct gpio_desc *gpio_pa;
/* ADC_FIFOC register is at different offset on different SoCs */
@@ -1167,6 +1169,7 @@ struct sun4i_codec_quirks {
struct reg_field reg_adc_fifoc; /* used for regmap_field */
unsigned int reg_dac_txdata; /* TX FIFO offset for DMA config */
unsigned int reg_adc_rxdata; /* RX FIFO offset for DMA config */
+ bool has_reset;
};
static const struct sun4i_codec_quirks sun4i_codec_quirks = {
@@ -1262,6 +1265,14 @@ static int sun4i_codec_probe(struct platform_device *pdev)
return PTR_ERR(scodec->clk_module);
}
+ if (quirks->has_reset) {
+ scodec->rst = devm_reset_control_get(&pdev->dev, NULL);
+ if (IS_ERR(scodec->rst)) {
+ dev_err(&pdev->dev, "Failed to get reset control\n");
+ return PTR_ERR(scodec->rst);
+ }
+ };
+
scodec->gpio_pa = devm_gpiod_get_optional(&pdev->dev, "allwinner,pa",
GPIOD_OUT_LOW);
if (IS_ERR(scodec->gpio_pa)) {
@@ -1288,6 +1299,16 @@ static int sun4i_codec_probe(struct platform_device *pdev)
return -EINVAL;
}
+ /* Deassert the reset control */
+ if (scodec->rst) {
+ ret = reset_control_deassert(scodec->rst);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "Failed to deassert the reset control\n");
+ goto err_clk_disable;
+ }
+ }
+
/* DMA configuration for TX FIFO */
scodec->playback_dma_data.addr = res->start + quirks->reg_dac_txdata;
scodec->playback_dma_data.maxburst = 8;
@@ -1302,7 +1323,7 @@ static int sun4i_codec_probe(struct platform_device *pdev)
&sun4i_codec_dai, 1);
if (ret) {
dev_err(&pdev->dev, "Failed to register our codec\n");
- goto err_clk_disable;
+ goto err_assert_reset;
}
ret = devm_snd_soc_register_component(&pdev->dev,
@@ -1339,6 +1360,9 @@ static int sun4i_codec_probe(struct platform_device *pdev)
err_unregister_codec:
snd_soc_unregister_codec(&pdev->dev);
+err_assert_reset:
+ if (scodec->rst)
+ reset_control_assert(scodec->rst);
err_clk_disable:
clk_disable_unprepare(scodec->clk_apb);
return ret;
@@ -1351,6 +1375,8 @@ static int sun4i_codec_remove(struct platform_device *pdev)
snd_soc_unregister_card(card);
snd_soc_unregister_codec(&pdev->dev);
+ if (scodec->rst)
+ reset_control_assert(scodec->rst);
clk_disable_unprepare(scodec->clk_apb);
return 0;
--
2.10.2
^ permalink raw reply related
* [PATCH v3 2/6] ASoC: sun4i-codec: Add support for A31 ADC capture path
From: Chen-Yu Tsai @ 2016-11-07 10:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161107100703.5586-1-wens@csie.org>
The A31's internal codec capture path has a mixer in front of the ADC
for each channel, capable of selecting various inputs, including
microphones, line in, phone in, and the main output mixer.
This patch adds the various controls, widgets and routes needed for
audio capture from the already supported inputs on the A31.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
sound/soc/sunxi/sun4i-codec.c | 65 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index b28b82a5ec62..6379efd21f00 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -788,6 +788,30 @@ static const struct snd_kcontrol_new sun6i_codec_mixer_controls[] = {
SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2, 1, 0),
};
+/* ADC mixer controls */
+static const struct snd_kcontrol_new sun6i_codec_adc_mixer_controls[] = {
+ SOC_DAPM_DOUBLE("Mixer Capture Switch",
+ SUN6I_CODEC_ADC_ACTL,
+ SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL,
+ SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR, 1, 0),
+ SOC_DAPM_DOUBLE("Mixer Reversed Capture Switch",
+ SUN6I_CODEC_ADC_ACTL,
+ SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR,
+ SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL, 1, 0),
+ SOC_DAPM_DOUBLE("Line In Capture Switch",
+ SUN6I_CODEC_ADC_ACTL,
+ SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL,
+ SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR, 1, 0),
+ SOC_DAPM_DOUBLE("Mic1 Capture Switch",
+ SUN6I_CODEC_ADC_ACTL,
+ SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1,
+ SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1, 1, 0),
+ SOC_DAPM_DOUBLE("Mic2 Capture Switch",
+ SUN6I_CODEC_ADC_ACTL,
+ SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2,
+ SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2, 1, 0),
+};
+
/* headphone controls */
static const char * const sun6i_codec_hp_src_enum_text[] = {
"DAC", "Mixer",
@@ -887,6 +911,10 @@ static const struct snd_kcontrol_new sun6i_codec_codec_widgets[] = {
SOC_SINGLE_TLV("Mic2 Boost Volume", SUN6I_CODEC_MIC_CTRL,
SUN6I_CODEC_MIC_CTRL_MIC2BOOST, 0x7, 0,
sun6i_codec_mic_gain_scale),
+ SOC_DOUBLE_TLV("ADC Capture Volume",
+ SUN6I_CODEC_ADC_ACTL, SUN6I_CODEC_ADC_ACTL_ADCLG,
+ SUN6I_CODEC_ADC_ACTL_ADCRG, 0x7, 0,
+ sun6i_codec_out_mixer_pregain_scale),
};
static const struct snd_soc_dapm_widget sun6i_codec_codec_dapm_widgets[] = {
@@ -912,6 +940,23 @@ static const struct snd_soc_dapm_widget sun6i_codec_codec_dapm_widgets[] = {
/* Line In */
SND_SOC_DAPM_INPUT("LINEIN"),
+ /* Digital parts of the ADCs */
+ SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
+ SUN6I_CODEC_ADC_FIFOC_EN_AD, 0,
+ NULL, 0),
+
+ /* Analog parts of the ADCs */
+ SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
+ SUN6I_CODEC_ADC_ACTL_ADCLEN, 0),
+ SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
+ SUN6I_CODEC_ADC_ACTL_ADCREN, 0),
+
+ /* ADC Mixers */
+ SOC_MIXER_ARRAY("Left ADC Mixer", SND_SOC_NOPM, 0, 0,
+ sun6i_codec_adc_mixer_controls),
+ SOC_MIXER_ARRAY("Right ADC Mixer", SND_SOC_NOPM, 0, 0,
+ sun6i_codec_adc_mixer_controls),
+
/* Digital parts of the DACs */
SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
SUN4I_CODEC_DAC_DPC_EN_DA, 0,
@@ -975,6 +1020,20 @@ static const struct snd_soc_dapm_route sun6i_codec_codec_dapm_routes[] = {
{ "Right Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
{ "Right Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
+ /* Left ADC Mixer Routes */
+ { "Left ADC Mixer", "Mixer Capture Switch", "Left Mixer" },
+ { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
+ { "Left ADC Mixer", "Line In Capture Switch", "LINEIN" },
+ { "Left ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
+ { "Left ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
+
+ /* Right ADC Mixer Routes */
+ { "Right ADC Mixer", "Mixer Capture Switch", "Right Mixer" },
+ { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
+ { "Right ADC Mixer", "Line In Capture Switch", "LINEIN" },
+ { "Right ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
+ { "Right ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
+
/* Headphone Routes */
{ "Headphone Source Playback Route", "DAC", "Left DAC" },
{ "Headphone Source Playback Route", "DAC", "Right DAC" },
@@ -989,6 +1048,12 @@ static const struct snd_soc_dapm_route sun6i_codec_codec_dapm_routes[] = {
{ "Line Out Source Playback Route", "Stereo", "Right Mixer" },
{ "Line Out Source Playback Route", "Mono Differential", "Left Mixer" },
{ "LINEOUT", NULL, "Line Out Source Playback Route" },
+
+ /* ADC Routes */
+ { "Left ADC", NULL, "ADC Enable" },
+ { "Right ADC", NULL, "ADC Enable" },
+ { "Left ADC", NULL, "Left ADC Mixer" },
+ { "Right ADC", NULL, "Right ADC Mixer" },
};
static struct snd_soc_codec_driver sun6i_codec_codec = {
--
2.10.2
^ permalink raw reply related
* [PATCH v3 3/6] ASoC: sun4i-codec: Add "Right Mixer" to "Line Out Mono Diff." route
From: Chen-Yu Tsai @ 2016-11-07 10:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161107100703.5586-1-wens@csie.org>
The mono differential output for "Line Out" downmixes the stereo audio
from the mixer, instead of just taking the left channel.
Add a route from the "Right Mixer" to "Line Out Source Playback Route"
through the "Mono Differential" path, so DAPM doesn't shut down
everything if the left channel is muted.
Fixes: 0f909f98d7cb ("ASoC: sun4i-codec: Add support for A31 Line Out
playback")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
sound/soc/sunxi/sun4i-codec.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 6379efd21f00..006ca3c17e80 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -1047,6 +1047,7 @@ static const struct snd_soc_dapm_route sun6i_codec_codec_dapm_routes[] = {
{ "Line Out Source Playback Route", "Stereo", "Left Mixer" },
{ "Line Out Source Playback Route", "Stereo", "Right Mixer" },
{ "Line Out Source Playback Route", "Mono Differential", "Left Mixer" },
+ { "Line Out Source Playback Route", "Mono Differential", "Right Mixer" },
{ "LINEOUT", NULL, "Line Out Source Playback Route" },
/* ADC Routes */
--
2.10.2
^ permalink raw reply related
* [PATCH v3 4/6] ARM: dts: sun6i: Add audio codec device node
From: Chen-Yu Tsai @ 2016-11-07 10:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161107100703.5586-1-wens@csie.org>
The A31 SoC includes the Allwinner audio codec, capable of 24-bit
playback up to 192 kHz and 24-bit capture up to 48 kHz.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun6i-a31.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 2e8bf93dcfb2..f68e6102b01b 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -784,6 +784,19 @@
reset-names = "ahb";
};
+ codec: codec at 01c22c00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun6i-a31-codec";
+ reg = <0x01c22c00 0x98>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1_CODEC>, <&ccu CLK_CODEC>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_APB1_CODEC>;
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
timer at 01c60000 {
compatible = "allwinner,sun6i-a31-hstimer",
"allwinner,sun7i-a20-hstimer";
--
2.10.2
^ permalink raw reply related
* [PATCH v3 5/6] ARM: dts: sun6i: hummingbird: Enable internal audio codec
From: Chen-Yu Tsai @ 2016-11-07 10:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161107100703.5586-1-wens@csie.org>
The Hummingbird A31 has headset and line in audio jacks and an onboard
mic routed to the pins for the SoC's internal codec. The line out pins
are routed to an onboard speaker amp, whose output is available on a
pin header.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index 9a74637f677f..4e0516026596 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -69,6 +69,19 @@
};
};
+&codec {
+ allwinner,audio-routing =
+ "Headphone", "HP",
+ "Speaker", "LINEOUT",
+ "LINEIN", "Line In",
+ "MIC1", "Mic",
+ "MIC2", "Headset Mic",
+ "Mic", "MBIAS",
+ "Headset Mic", "HBIAS";
+ allwinner,pa-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <®_dcdc3>;
};
--
2.10.2
^ permalink raw reply related
* [PATCH v3 6/6] ARM: dts: sun6i: sina31s: Enable internal audio codec
From: Chen-Yu Tsai @ 2016-11-07 10:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161107100703.5586-1-wens@csie.org>
The SinA31s routes the SoC's LINEOUT pins to a line out jack, and MIC1
to a microphone jack, with MBIAS providing phantom power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
index 6ead2f5c847a..c35ec112f5a0 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
@@ -65,6 +65,14 @@
};
};
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
&ehci0 {
/* USB 2.0 4 port hub IC */
status = "okay";
--
2.10.2
^ permalink raw reply related
* [PATCH 0/6] Add support for MAX8997 Clock Driver
From: Pankaj Dubey @ 2016-11-07 10:09 UTC (permalink / raw)
To: linux-arm-kernel
During recent test on Exynos4210 based Origen board, I observed
RTC1 probe is failing giving following error message:
[ 2.195817] s3c-rtc 10070000.rtc: failed to find rtc source clock
[ 2.200475] s3c-rtc: probe of 10070000.rtc failed with error -2
[ 2.206597] i2c /dev entries driver
This is mainly because S3C-RTC expects two clocks "rtc" and "rtc_src".
In case of Origen board this second clock is supplied by MAX8997 clock
oscillator.
This patch series modified MAX8997 MFD driver for supporting regmap, and
adds max8997-clk driver. Also it documentation where-ever required and
extends RTC node in exynos4210-origen.dts for supporting both clocks.
After this patch series, RTC is getting probed properly on Origen board.
This patch series is tested for SMP boot on Origen board.
Pankaj Dubey (6):
mfd: max8997: Initialize max8997 register map
dt-bindings: clk: max8997: Add DT binding documentation
clk: Add driver for Maxim-8997 PMIC clocks
ARM: dts: Add clock provider specific properties to max8997 node
mfd: max8997: Add max8997-clk name in mfd_cell
ARM: dts: Extend the S3C RTC node with rtc_src clock
.../devicetree/bindings/clock/maxim,max8997.txt | 44 +++++++++++++
.../bindings/regulator/max8997-regulator.txt | 3 +
arch/arm/boot/dts/exynos4210-origen.dts | 6 +-
arch/arm/boot/dts/exynos4210-trats.dts | 3 +-
drivers/clk/Kconfig | 10 +++
drivers/clk/Makefile | 1 +
drivers/clk/clk-max8997.c | 76 ++++++++++++++++++++++
drivers/mfd/max8997.c | 15 +++++
include/dt-bindings/clock/maxim,max8997.h | 23 +++++++
include/linux/mfd/max8997-private.h | 3 +
10 files changed, 182 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/maxim,max8997.txt
create mode 100644 drivers/clk/clk-max8997.c
create mode 100644 include/dt-bindings/clock/maxim,max8997.h
--
2.7.4
^ permalink raw reply
* [PATCH 1/6] mfd: max8997: Initialize max8997 register map
From: Pankaj Dubey @ 2016-11-07 10:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478513376-14307-1-git-send-email-pankaj.dubey@samsung.com>
This patch add regmap initialization to use register map
in max8997-clk device driver
CC: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
drivers/mfd/max8997.c | 14 ++++++++++++++
include/linux/mfd/max8997-private.h | 3 +++
2 files changed, 17 insertions(+)
diff --git a/drivers/mfd/max8997.c b/drivers/mfd/max8997.c
index 2d6e2c3..bda9ec8 100644
--- a/drivers/mfd/max8997.c
+++ b/drivers/mfd/max8997.c
@@ -175,11 +175,17 @@ static inline unsigned long max8997_i2c_get_driver_data(struct i2c_client *i2c,
return id->driver_data;
}
+static const struct regmap_config max8997_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+};
+
static int max8997_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct max8997_dev *max8997;
struct max8997_platform_data *pdata = dev_get_platdata(&i2c->dev);
+ const struct regmap_config *config = &max8997_regmap_config;
int ret = 0;
max8997 = devm_kzalloc(&i2c->dev, sizeof(struct max8997_dev),
@@ -202,6 +208,14 @@ static int max8997_i2c_probe(struct i2c_client *i2c,
if (!pdata)
return ret;
+ max8997->regmap = devm_regmap_init_i2c(i2c, config);
+ if (IS_ERR(max8997->regmap)) {
+ ret = PTR_ERR(max8997->regmap);
+ dev_err(max8997->dev, "Failed to allocate register map: %d\n",
+ ret);
+ return ret;
+ }
+
max8997->pdata = pdata;
max8997->ono = pdata->ono;
diff --git a/include/linux/mfd/max8997-private.h b/include/linux/mfd/max8997-private.h
index 78c76cd..50c7129 100644
--- a/include/linux/mfd/max8997-private.h
+++ b/include/linux/mfd/max8997-private.h
@@ -25,6 +25,7 @@
#include <linux/i2c.h>
#include <linux/export.h>
#include <linux/irqdomain.h>
+#include <linux/regmap.h>
#define MAX8997_REG_INVALID (0xff)
@@ -388,6 +389,8 @@ struct max8997_dev {
struct mutex iolock;
unsigned long type;
+
+ struct regmap *regmap;
struct platform_device *battery; /* battery control (not fuel gauge) */
int irq;
--
2.7.4
^ permalink raw reply related
* [PATCH 2/6] dt-bindings: clk: max8997: Add DT binding documentation
From: Pankaj Dubey @ 2016-11-07 10:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478513376-14307-1-git-send-email-pankaj.dubey@samsung.com>
Add Device Tree binding documentation for the clocks
outputs in the Maxim-8997 Power Management IC.
CC: Michael Turquette <mturquette@baylibre.com>
CC: Rob Herring <robh+dt@kernel.org>
CC: devicetree at vger.kernel.org
CC: linux-clk at vger.kernel.org
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
.../devicetree/bindings/clock/maxim,max8997.txt | 44 ++++++++++++++++++++++
.../bindings/regulator/max8997-regulator.txt | 3 ++
2 files changed, 47 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/maxim,max8997.txt
diff --git a/Documentation/devicetree/bindings/clock/maxim,max8997.txt b/Documentation/devicetree/bindings/clock/maxim,max8997.txt
new file mode 100644
index 0000000..d2e2a74
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/maxim,max8997.txt
@@ -0,0 +1,44 @@
+Binding for Maxim MAX8997 32k clock generator block
+
+This is a part of device tree bindings of MAX8997 multi-function device.
+More information can be found in bindings/regulator/max8997-regulator.txt file.
+
+The MAX8997 contains two 32.768khz clock outputs that can be controlled
+(gated/ungated) over I2C.
+
+Following properties should be presend in main device node of the MFD chip.
+
+Required properties:
+
+- #clock-cells: from common clock binding; shall be set to 1.
+
+Optional properties:
+- clock-output-names: From common clock binding.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. Following indices are allowed:
+ - 0: 32khz_ap clock,
+ - 1: 32khz_cp clock,
+
+Clocks are defined as preprocessor macros in dt-bindings/clock/maxim,max8997.h
+header and can be used in device tree sources.
+
+Example: Node of the MFD chip
+
+ max8997: max8997_pmic at 66 {
+ compatible = "maxim,max8997-pmic";
+ reg = <0x66>;
+ interrupt-parent = <&gpx0>;
+ interrupts = <4 0>, <3 0>;
+ #clock-cells = <1>;
+ /* ... */
+ };
+
+Example: Clock consumer node
+
+ foo at 0 {
+ compatible = "bar,foo";
+ /* ... */
+ clocks = <&max8997 MAX8997_CLK_AP>;
+ clock-names = "my-clock";
+ };
diff --git a/Documentation/devicetree/bindings/regulator/max8997-regulator.txt b/Documentation/devicetree/bindings/regulator/max8997-regulator.txt
index 5c186a7..af1f9c0 100644
--- a/Documentation/devicetree/bindings/regulator/max8997-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/max8997-regulator.txt
@@ -6,6 +6,9 @@ interfaced to the host controller using a i2c interface. Each sub-block is
addressed by the host system using different i2c slave address. This document
describes the bindings for 'pmic' sub-block of max8997.
+Binding for the built-in 32k clock generator block is defined separately
+in bindings/clk/maxim,max8997.txt file
+
Required properties:
- compatible: Should be "maxim,max8997-pmic".
- reg: Specifies the i2c slave address of the pmic block. It should be 0x66.
--
2.7.4
^ permalink raw reply related
* [PATCH 3/6] clk: Add driver for Maxim-8997 PMIC clocks
From: Pankaj Dubey @ 2016-11-07 10:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478513376-14307-1-git-send-email-pankaj.dubey@samsung.com>
The MAX8997 PMIC has 32.786kHz crystal oscillator which provides an
accurate low frequency clock for MAX8997 internal circuit as well as
external circuit. This patch adds support for these two clocks.
CC: Michael Turquette <mturquette@baylibre.com>
CC: Rob Herring <robh+dt@kernel.org>
CC: devicetree at vger.kernel.org
CC: linux-clk at vger.kernel.org
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
drivers/clk/Kconfig | 10 ++++
drivers/clk/Makefile | 1 +
drivers/clk/clk-max8997.c | 76 +++++++++++++++++++++++++++++++
include/dt-bindings/clock/maxim,max8997.h | 23 ++++++++++
4 files changed, 110 insertions(+)
create mode 100644 drivers/clk/clk-max8997.c
create mode 100644 include/dt-bindings/clock/maxim,max8997.h
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index e2d9bd7..5339cbe 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -48,6 +48,16 @@ config COMMON_CLK_MAX77802
---help---
This driver supports Maxim 77802 crystal oscillator clock.
+config COMMON_CLK_MAX8997
+ tristate "Clock driver for Maxim 8997 MFD"
+ depends on MFD_MAX8997
+ select COMMON_CLK_MAX_GEN
+ ---help---
+ This driver supports Maxim 8997 crystal oscillator clock.
+ The 32.768kHz crystal oscillator clock provides an accurate
+ low frequency clock for MAX8997 internal circuit as well as
+ external circuit.
+
config COMMON_CLK_RK808
tristate "Clock driver for RK808/RK818"
depends on MFD_RK808
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 3b6f9cf..1cfa9ab 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_MACH_LOONGSON32) += clk-ls1x.o
obj-$(CONFIG_COMMON_CLK_MAX_GEN) += clk-max-gen.o
obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
obj-$(CONFIG_COMMON_CLK_MAX77802) += clk-max77802.o
+obj-$(CONFIG_COMMON_CLK_MAX8997) += clk-max8997.o
obj-$(CONFIG_ARCH_MB86S7X) += clk-mb86s7x.o
obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
diff --git a/drivers/clk/clk-max8997.c b/drivers/clk/clk-max8997.c
new file mode 100644
index 0000000..9158354
--- /dev/null
+++ b/drivers/clk/clk-max8997.c
@@ -0,0 +1,76 @@
+/*
+ * clk-max8997.c - Clock driver for Maxim 8997
+ *
+ * Copyright (C) 2016 Samsung Electornics
+ * Pankaj Dubey <pankaj.dubey@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/max8997.h>
+#include <linux/mfd/max8997-private.h>
+#include <linux/clk-provider.h>
+#include <linux/mutex.h>
+#include <linux/clkdev.h>
+
+#include <dt-bindings/clock/maxim,max8997.h>
+#include "clk-max-gen.h"
+
+static struct clk_init_data max8997_clks_init[MAX8997_CLKS_NUM] = {
+ [MAX8997_CLK_AP] = {
+ .name = "32khz_ap",
+ .ops = &max_gen_clk_ops,
+ },
+ [MAX8997_CLK_CP] = {
+ .name = "32khz_cp",
+ .ops = &max_gen_clk_ops,
+ },
+};
+
+static int max8997_clk_probe(struct platform_device *pdev)
+{
+ struct max8997_dev *iodev = dev_get_drvdata(pdev->dev.parent);
+
+ return max_gen_clk_probe(pdev, iodev->regmap, MAX8997_REG_MAINCON1,
+ max8997_clks_init, MAX8997_CLKS_NUM);
+}
+
+static int max8997_clk_remove(struct platform_device *pdev)
+{
+ return max_gen_clk_remove(pdev, MAX8997_CLKS_NUM);
+}
+
+static const struct platform_device_id max8997_clk_id[] = {
+ { "max8997-clk", 0},
+ { },
+};
+MODULE_DEVICE_TABLE(platform, max8997_clk_id);
+
+static struct platform_driver max8997_clk_driver = {
+ .driver = {
+ .name = "max8997-clk",
+ },
+ .probe = max8997_clk_probe,
+ .remove = max8997_clk_remove,
+ .id_table = max8997_clk_id,
+};
+
+module_platform_driver(max8997_clk_driver);
+
+MODULE_DESCRIPTION("MAXIM 8997 Clock Driver");
+MODULE_AUTHOR("Pankaj Dubey <pankaj.dubey@samsung.com>");
+MODULE_LICENSE("GPL");
diff --git a/include/dt-bindings/clock/maxim,max8997.h b/include/dt-bindings/clock/maxim,max8997.h
new file mode 100644
index 0000000..f2dd972
--- /dev/null
+++ b/include/dt-bindings/clock/maxim,max8997.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * Author: Pankaj Dubey <pankaj.dubey@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clocks for the Maxim 8997 PMIC.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_MAXIM_MAX8997_CLOCK_H
+#define _DT_BINDINGS_CLOCK_MAXIM_MAX8997_CLOCK_H
+
+/* Fixed rate clocks. */
+
+#define MAX8997_CLK_AP 0
+#define MAX8997_CLK_CP 1
+
+/* Total number of clocks. */
+#define MAX8997_CLKS_NUM (MAX8997_CLK_CP + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_MAXIM_MAX8997_CLOCK_H */
--
2.7.4
^ permalink raw reply related
* [PATCH 4/6] ARM: dts: Add clock provider specific properties to max8997 node
From: Pankaj Dubey @ 2016-11-07 10:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478513376-14307-1-git-send-email-pankaj.dubey@samsung.com>
This patch adds a label and #clock-cells property to device node of
max8997 PMIC to allow using it as a clock provider.
CC: Rob Herring <robh+dt@kernel.org>
CC: devicetree at vger.kernel.org
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/boot/dts/exynos4210-origen.dts | 3 ++-
arch/arm/boot/dts/exynos4210-trats.dts | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index cb3a255..6c7ef4e 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -147,11 +147,12 @@
pinctrl-0 = <&i2c0_bus>;
pinctrl-names = "default";
- max8997_pmic at 66 {
+ max8997: max8997_pmic at 66 {
compatible = "maxim,max8997-pmic";
reg = <0x66>;
interrupt-parent = <&gpx0>;
interrupts = <4 0>, <3 0>;
+ #clock-cells = <1>;
max8997,pmic-buck1-dvs-voltage = <1350000>;
max8997,pmic-buck2-dvs-voltage = <1100000>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 0ca1b4d..74a9d39 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -295,12 +295,13 @@
pinctrl-names = "default";
status = "okay";
- max8997_pmic at 66 {
+ max8997: max8997_pmic at 66 {
compatible = "maxim,max8997-pmic";
reg = <0x66>;
interrupt-parent = <&gpx0>;
interrupts = <7 0>;
+ #clock-cells = <1>;
max8997,pmic-buck1-uses-gpio-dvs;
max8997,pmic-buck2-uses-gpio-dvs;
--
2.7.4
^ permalink raw reply related
* [PATCH 5/6] mfd: max8997: Add max8997-clk name in mfd_cell
From: Pankaj Dubey @ 2016-11-07 10:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478513376-14307-1-git-send-email-pankaj.dubey@samsung.com>
This patch add max8997-clk in mfd_cell max8997_devs in order to probe
max8997-clk device driver.
CC: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
drivers/mfd/max8997.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mfd/max8997.c b/drivers/mfd/max8997.c
index bda9ec8..4b809f8 100644
--- a/drivers/mfd/max8997.c
+++ b/drivers/mfd/max8997.c
@@ -48,6 +48,7 @@ static const struct mfd_cell max8997_devs[] = {
{ .name = "max8997-muic", },
{ .name = "max8997-led", .id = 1 },
{ .name = "max8997-led", .id = 2 },
+ { .name = "max8997-clk",},
};
#ifdef CONFIG_OF
--
2.7.4
^ permalink raw reply related
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