* [PATCH RFC] mm: Add debug_virt_to_phys()
From: Nicolas Pitre @ 2016-11-12 1:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161112004449.30566-1-f.fainelli@gmail.com>
On Fri, 11 Nov 2016, Florian Fainelli wrote:
> When CONFIG_DEBUG_VM is turned on, virt_to_phys() maps to
> debug_virt_to_phys() which helps catch vmalloc space addresses being
> passed. This is helpful in debugging bogus drivers that just assume
> linear mappings all over the place.
>
> For ARM, ARM64, Unicore32 and Microblaze, the architectures define
> __virt_to_phys() as being the functional implementation of the address
> translation, so we special case the debug stub to call into
> __virt_to_phys directly.
>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
> arch/arm/include/asm/memory.h | 4 ++++
> arch/arm64/include/asm/memory.h | 4 ++++
> include/asm-generic/memory_model.h | 4 ++++
> mm/debug.c | 15 +++++++++++++++
> 4 files changed, 27 insertions(+)
>
> diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
> index 76cbd9c674df..448dec9b8b00 100644
> --- a/arch/arm/include/asm/memory.h
> +++ b/arch/arm/include/asm/memory.h
> @@ -260,11 +260,15 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
> * translation for translating DMA addresses. Use the driver
> * DMA support - see dma-mapping.h.
> */
> +#ifndef CONFIG_DEBUG_VM
> #define virt_to_phys virt_to_phys
> static inline phys_addr_t virt_to_phys(const volatile void *x)
> {
> return __virt_to_phys((unsigned long)(x));
> }
> +#else
> +#define virt_to_phys debug_virt_to_phys
> +#endif
[...]
Why don't you do something more like:
static inline phys_addr_t virt_to_phys(const volatile void *x)
{
+ debug_virt_to_phys(x);
return __virt_to_phys((unsigned long)(x));
}
[...]
static inline void debug_virt_to_phys(const void *address)
{
#ifdef CONFIG_DEBUG_VM
BUG_ON(is_vmalloc_addr(address));
#endif
}
?
Nicolas
^ permalink raw reply
* [PATCH] PCI: enable extended tags support for PCIe endpoints
From: Sinan Kaya @ 2016-11-12 1:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161111205801.GC9868@bhelgaas-glaptop.roam.corp.google.com>
On 11/11/2016 3:58 PM, Bjorn Helgaas wrote:
>> I should have checked the capability here before trying to enable it.
>> > I'll post a follow up patch on this.
>> >
>> > Is there any other feedback?
> If this were completely safe to enable for every device that supported
> it, why would there be an enable bit in Device Control?
reading from the ECN here.
https://pcisig.com/sites/default/files/specification_documents/ECN_Extended_Tag_Enable_Default_05Sept2008_final.pdf
The initial value is implementation specific and functions are allowed
to set it to 1 by default.
>
> I don't know anything about extended tags, but it worries me a little
> when there's a "go-fast" switch and no explanation about when and why
> we might need to go slo
Based on my observation, extended tags increase the number of reads that
can be queued up back to back downstream. Otherwise, the requests will not
make progress until 1 tag out of 32 gets available.
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH RFC] mm: Add debug_virt_to_phys()
From: Florian Fainelli @ 2016-11-12 0:44 UTC (permalink / raw)
To: linux-arm-kernel
When CONFIG_DEBUG_VM is turned on, virt_to_phys() maps to
debug_virt_to_phys() which helps catch vmalloc space addresses being
passed. This is helpful in debugging bogus drivers that just assume
linear mappings all over the place.
For ARM, ARM64, Unicore32 and Microblaze, the architectures define
__virt_to_phys() as being the functional implementation of the address
translation, so we special case the debug stub to call into
__virt_to_phys directly.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/include/asm/memory.h | 4 ++++
arch/arm64/include/asm/memory.h | 4 ++++
include/asm-generic/memory_model.h | 4 ++++
mm/debug.c | 15 +++++++++++++++
4 files changed, 27 insertions(+)
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 76cbd9c674df..448dec9b8b00 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -260,11 +260,15 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
* translation for translating DMA addresses. Use the driver
* DMA support - see dma-mapping.h.
*/
+#ifndef CONFIG_DEBUG_VM
#define virt_to_phys virt_to_phys
static inline phys_addr_t virt_to_phys(const volatile void *x)
{
return __virt_to_phys((unsigned long)(x));
}
+#else
+#define virt_to_phys debug_virt_to_phys
+#endif
#define phys_to_virt phys_to_virt
static inline void *phys_to_virt(phys_addr_t x)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index b71086d25195..c9e436b28523 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -186,11 +186,15 @@ extern u64 kimage_voffset;
* translation for translating DMA addresses. Use the driver
* DMA support - see dma-mapping.h.
*/
+#ifndef CONFIG_DEBUG_VM
#define virt_to_phys virt_to_phys
static inline phys_addr_t virt_to_phys(const volatile void *x)
{
return __virt_to_phys((unsigned long)(x));
}
+#else
+#define virt_to_phys debug_virt_to_phys
+#endif
#define phys_to_virt phys_to_virt
static inline void *phys_to_virt(phys_addr_t x)
diff --git a/include/asm-generic/memory_model.h b/include/asm-generic/memory_model.h
index 5148150cc80b..426085757258 100644
--- a/include/asm-generic/memory_model.h
+++ b/include/asm-generic/memory_model.h
@@ -80,6 +80,10 @@
#define page_to_pfn __page_to_pfn
#define pfn_to_page __pfn_to_page
+#ifdef CONFIG_DEBUG_VM
+unsigned long debug_virt_to_phys(volatile void *address);
+#endif /* CONFIG_DEBUG_VM */
+
#endif /* __ASSEMBLY__ */
#endif
diff --git a/mm/debug.c b/mm/debug.c
index 9feb699c5d25..72b2ca9b11f4 100644
--- a/mm/debug.c
+++ b/mm/debug.c
@@ -161,4 +161,19 @@ void dump_mm(const struct mm_struct *mm)
);
}
+#include <asm/memory.h>
+#include <linux/mm.h>
+
+unsigned long debug_virt_to_phys(volatile void *address)
+{
+ BUG_ON(is_vmalloc_addr((const void *)address));
+#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) || defined(CONFIG_UNICORE32) || \
+ defined(CONFIG_MICROBLAZE)
+ return __virt_to_phys(address);
+#else
+ return virt_to_phys(address);
+#endif
+}
+EXPORT_SYMBOL(debug_virt_to_phys);
+
#endif /* CONFIG_DEBUG_VM */
--
2.9.3
^ permalink raw reply related
* [PATCH] pci: layerscape: add LS1046a support
From: Bjorn Helgaas @ 2016-11-11 22:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477399016-22826-1-git-send-email-Minghuan.Lian@nxp.com>
On Tue, Oct 25, 2016 at 08:36:56PM +0800, Minghuan Lian wrote:
> From: "mingkai.hu at nxp.com" <mingkai.hu@nxp.com>
>
> 1. LS1046a PCIe controller has a different LUT_DBG offset.
> Available "lut_dbg" is added to ls_pcie_drvdata to describe
> this difference.
> 2. Match LS1046 PCIe compatible
>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Applied to pci/host-layerscape for v4.10, thanks!
I removed the now-unused PCIE_LUT_DBG definition for you.
> ---
> Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
> drivers/pci/host/pci-layerscape.c | 13 ++++++++++++-
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> index 41e9f55..ee1c72d5 100644
> --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> @@ -15,6 +15,7 @@ Required properties:
> - compatible: should contain the platform identifier such as:
> "fsl,ls1021a-pcie", "snps,dw-pcie"
> "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"
> + "fsl,ls1046a-pcie"
> - reg: base addresses and lengths of the PCIe controller
> - interrupts: A list of interrupt outputs of the controller. Must contain an
> entry for each entry in the interrupt-names property.
> diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c
> index 958187f..8cebf9a 100644
> --- a/drivers/pci/host/pci-layerscape.c
> +++ b/drivers/pci/host/pci-layerscape.c
> @@ -41,6 +41,7 @@
> struct ls_pcie_drvdata {
> u32 lut_offset;
> u32 ltssm_shift;
> + u32 lut_dbg;
> struct pcie_host_ops *ops;
> };
>
> @@ -134,7 +135,7 @@ static int ls_pcie_link_up(struct pcie_port *pp)
> struct ls_pcie *pcie = to_ls_pcie(pp);
> u32 state;
>
> - state = (ioread32(pcie->lut + PCIE_LUT_DBG) >>
> + state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
> pcie->drvdata->ltssm_shift) &
> LTSSM_STATE_MASK;
>
> @@ -196,18 +197,28 @@ static int ls_pcie_msi_host_init(struct pcie_port *pp,
> static struct ls_pcie_drvdata ls1043_drvdata = {
> .lut_offset = 0x10000,
> .ltssm_shift = 24,
> + .lut_dbg = 0x7fc,
> + .ops = &ls_pcie_host_ops,
> +};
> +
> +static struct ls_pcie_drvdata ls1046_drvdata = {
> + .lut_offset = 0x80000,
> + .ltssm_shift = 24,
> + .lut_dbg = 0x407fc,
> .ops = &ls_pcie_host_ops,
> };
>
> static struct ls_pcie_drvdata ls2080_drvdata = {
> .lut_offset = 0x80000,
> .ltssm_shift = 0,
> + .lut_dbg = 0x7fc,
> .ops = &ls_pcie_host_ops,
> };
>
> static const struct of_device_id ls_pcie_of_match[] = {
> { .compatible = "fsl,ls1021a-pcie", .data = &ls1021_drvdata },
> { .compatible = "fsl,ls1043a-pcie", .data = &ls1043_drvdata },
> + { .compatible = "fsl,ls1046a-pcie", .data = &ls1046_drvdata },
> { .compatible = "fsl,ls2080a-pcie", .data = &ls2080_drvdata },
> { .compatible = "fsl,ls2085a-pcie", .data = &ls2080_drvdata },
> { },
> --
> 1.9.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH] ARM: dts: vfxxx: Enable DMA for DSPI2 and DSPI3
From: Fabio Estevam @ 2016-11-11 22:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161110114505.17618-1-maitysanchayan@gmail.com>
On Thu, Nov 10, 2016 at 9:45 AM, Sanchayan Maity
<maitysanchayan@gmail.com> wrote:
> Enable DMA for DSPI2 and DSPI3 on Vybrid.
You missed your Signed-off-by line.
^ permalink raw reply
* [PATCH] i.MX: Kconfig: Drop errata 769419 for Vybrid
From: Fabio Estevam @ 2016-11-11 22:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478709850-9361-1-git-send-email-andrew.smirnov@gmail.com>
On Wed, Nov 9, 2016 at 2:44 PM, Andrey Smirnov <andrew.smirnov@gmail.com> wrote:
> According to the datasheet, VF610 uses revision r3p2 of the L2C-310
> block, same as i.MX6Q+, which does not require a software workaround for
> ARM errata 769419.
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* PM regression with LED changes in next-20161109
From: Pavel Machek @ 2016-11-11 22:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d7ddbbb0-b99c-14a3-f462-3534b5ec67e6@redhat.com>
Hi!
Reason #1:
> >>Hmm. So userland can read the LED state, and it can get _some_ value
> >>back, but it can not know if it is current state or not.
> Why a dedicated file? Are we going to mirror brightness here
> wrt r/w (show/store) behavior ? If not userspace now needs
> 2 open fds which is not really nice. If we are and we are
> not going to use poll for something else on brightness itself
> then why not just poll directly on brightness ?
Reason #1 is above.
Reason #2 is "if userspace sees brightness file, it can not know if
the notifications on change actually work or not".
Reason #3 is that you broke Tony's system. Polling does not make sense
when trigger such as "CPU in use" is active.
Reason #4 is that there are really two brightnesses:
1) maximum brightness trigger is going to use
2) current brightness
Currently writing to "brightness" file changes 1), but reading returns
2) when available.
So, feel free to propose better interface. One that solves #1..#4
above.
Thanks,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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^ permalink raw reply
* PM regression with LED changes in next-20161109
From: Pavel Machek @ 2016-11-11 22:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <f7c9b2be-0003-f342-a4c7-802532faa424@gmail.com>
Hi!
> >Hmm. So userland can read the LED state, and it can get _some_ value
> >back, but it can not know if it is current state or not.
> >
> >I don't think that's a good interface. I see it is from 2008... is
> >someone using it? Maybe it is too late for revert.
>
> I can imagine it being used in flash LED use case. E.g. one
> could use oneshot trigger to trigger flash strobe, and then
> he could periodically read brightness file to check, for whatever
> reason, whether the flash is strobing.
I'm pretty sure nobody does that for flah strobe.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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^ permalink raw reply
* [PATCH v7] soc: qcom: add l2 cache perf events driver
From: Leeder, Neil @ 2016-11-11 21:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161109181652.GK17771@arm.com>
Hi Will,
On 11/9/2016 1:16 PM, Will Deacon wrote:
> On Wed, Nov 09, 2016 at 05:54:13PM +0000, Mark Rutland wrote:
>> On Fri, Oct 28, 2016 at 04:50:13PM -0400, Neil Leeder wrote:
>>> + struct perf_event *events[MAX_L2_CTRS];
>>> + struct l2cache_pmu *l2cache_pmu;
>>> + DECLARE_BITMAP(used_counters, MAX_L2_CTRS);
>>> + DECLARE_BITMAP(used_groups, L2_EVT_GROUP_MAX + 1);
>>> + int group_to_counter[L2_EVT_GROUP_MAX + 1];
>>> + int irq;
>>> + /* The CPU that is used for collecting events on this cluster */
>>> + int on_cpu;
>>> + /* All the CPUs associated with this cluster */
>>> + cpumask_t cluster_cpus;
>>
>> I'm still uncertain about aggregating all cluster PMUs into a larger
>> PMU, given the cluster PMUs are logically independent (at least in terms
>> of the programming model).
>>
>> However, from what I understand the x86 uncore PMU drivers aggregate
>> symmetric instances of uncore PMUs (and also aggregate across packages
>> to the same logical PMU).
>>
>> Whatever we do, it would be nice for the uncore drivers to align on a
>> common behaviour (and I think we're currently going the oppposite route
>> with Cavium's uncore PMU). Will, thoughts?
>
> I'm not a big fan of aggregating this stuff. Ultimately, the user in the
> driving seat of perf is going to need some knowledge about the toplogy of
> the system in order to perform sensible profiling using an uncore PMU.
> If the kernel tries to present a single, unified PMU then we paint ourselves
> into a corner when the hardware isn't as symmetric as we want it to be
> (big/little on the CPU side is the extreme example of this). If we want
> to be consistent, then exposing each uncore unit as a separate PMU is
> the way to go. That doesn't mean we can't aggregate the components of a
> distributed PMU (e.g. the CCN or the SMMU), but we don't want to aggregate
> at the programming interface/IP block level.
>
> We could consider exposing some topology information in sysfs if that's
> seen as an issue with the non-aggregated case.
>
> Will
So is there a use-case for individual uncore PMUs when they can't be
used in task mode or per-cpu?
The main (only?) use will be in system mode, in which case surely it
makes sense to provide a single aggregated count?
With individual PMUs exposed there will be potentially dozens of nodes
for userspace to collect from which would make perf command-line usage
unwieldy at best.
Neil
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH -next] PCI: xilinx-nwl: Add missing of_node_put() in nwl_pcie_init_irq_domain()
From: Bjorn Helgaas @ 2016-11-11 21:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476716297-31808-1-git-send-email-weiyj.lk@gmail.com>
On Mon, Oct 17, 2016 at 02:58:17PM +0000, Wei Yongjun wrote:
> From: Wei Yongjun <weiyongjun1@huawei.com>
>
> This node pointer is returned by of_get_next_child() with refcount
> incremented in this function. of_node_put() on it before exitting
> this function on error.
>
> This is detected by Coccinelle semantic patch.
>
> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Applied to pci/host-xilinx for v.10, thanks!
> ---
> drivers/pci/host/pcie-xilinx-nwl.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c
> index 43eaa4a..c16b26c 100644
> --- a/drivers/pci/host/pcie-xilinx-nwl.c
> +++ b/drivers/pci/host/pcie-xilinx-nwl.c
> @@ -535,6 +535,7 @@ static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie)
>
> if (!pcie->legacy_irq_domain) {
> dev_err(dev, "failed to create IRQ domain\n");
> + of_node_put(legacy_intc_node);
> return -ENOMEM;
> }
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH -next] PCI: xilinx: Add missing of_node_put() in xilinx_pcie_init_irq_domain()
From: Bjorn Helgaas @ 2016-11-11 21:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476716344-1050-1-git-send-email-weiyj.lk@gmail.com>
On Mon, Oct 17, 2016 at 02:59:04PM +0000, Wei Yongjun wrote:
> From: Wei Yongjun <weiyongjun1@huawei.com>
>
> This node pointer is returned by of_get_next_child() with refcount
> incremented in this function. of_node_put() on it before exitting
> this function on error.
>
> This is detected by Coccinelle semantic patch.
>
> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Applied to pci/host-xilinx for v4.10, thanks!
See below for another possible issue.
> ---
> drivers/pci/host/pcie-xilinx.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
> index c8616fa..7100ee5 100644
> --- a/drivers/pci/host/pcie-xilinx.c
> +++ b/drivers/pci/host/pcie-xilinx.c
> @@ -529,6 +529,7 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie_port *port)
> port);
> if (!port->leg_domain) {
> dev_err(dev, "Failed to get a INTx IRQ domain\n");
> + of_node_put(pcie_intc_node);
> return -ENODEV;
> }
>
> @@ -540,6 +541,7 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie_port *port)
> &xilinx_pcie_msi_chip);
> if (!port->msi_domain) {
> dev_err(dev, "Failed to get a MSI IRQ domain\n");
> + of_node_put(pcie_intc_node);
We also leak port->leg_domain here, don't we?
> return -ENODEV;
> }
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH -next] PCI: rockchip: Add missing of_node_put() in rockchip_pcie_init_irq_domain()
From: Bjorn Helgaas @ 2016-11-11 21:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476716242-31684-1-git-send-email-weiyj.lk@gmail.com>
On Mon, Oct 17, 2016 at 02:57:22PM +0000, Wei Yongjun wrote:
> From: Wei Yongjun <weiyongjun1@huawei.com>
>
> This node pointer is returned by of_get_next_child() with refcount
> incremented in this function. of_node_put() on it before exitting
> this function on error.
>
> This is detected by Coccinelle semantic patch.
>
> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Applied with Shawn's ack to pci/host-rockchip for v4.10, thanks!
> ---
> drivers/pci/host/pcie-rockchip.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
> index e0b22da..ab88859 100644
> --- a/drivers/pci/host/pcie-rockchip.c
> +++ b/drivers/pci/host/pcie-rockchip.c
> @@ -949,6 +949,7 @@ static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip)
> &intx_domain_ops, rockchip);
> if (!rockchip->irq_domain) {
> dev_err(dev, "failed to get a INTx IRQ domain\n");
> + of_node_put(intc);
> return -EINVAL;
> }
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH -next] PCI: layerscape: Remove redundant dev_err call in ls_pcie_probe()
From: Bjorn Helgaas @ 2016-11-11 21:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476716140-30608-1-git-send-email-weiyj.lk@gmail.com>
On Mon, Oct 17, 2016 at 02:55:40PM +0000, Wei Yongjun wrote:
> From: Wei Yongjun <weiyongjun1@huawei.com>
>
> There is a error message within devm_ioremap_resource
> already, so remove the dev_err call to avoid redundant
> error message.
>
> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Applied to pci/host-layerscape for v4.10, thanks!
> ---
> drivers/pci/host/pci-layerscape.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c
> index 2cb7315..bbd3d23 100644
> --- a/drivers/pci/host/pci-layerscape.c
> +++ b/drivers/pci/host/pci-layerscape.c
> @@ -251,10 +251,8 @@ static int __init ls_pcie_probe(struct platform_device *pdev)
>
> dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
> pcie->pp.dbi_base = devm_ioremap_resource(dev, dbi_base);
> - if (IS_ERR(pcie->pp.dbi_base)) {
> - dev_err(dev, "missing *regs* space\n");
> + if (IS_ERR(pcie->pp.dbi_base))
> return PTR_ERR(pcie->pp.dbi_base);
> - }
>
> pcie->drvdata = match->data;
> pcie->lut = pcie->pp.dbi_base + pcie->drvdata->lut_offset;
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [GIT PULL 2/2] SoCFPGA defconfig updates for v4.10
From: Dinh Nguyen @ 2016-11-11 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161111205915.22173-1-dinguyen@kernel.org>
Hi Arnd, Kevin, and Olof:
Please pull these defconfig updates for v4.10.
Thanks,
Dinh
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_defconfig_updates_for_v4.10
for you to fetch changes up to cab004fa972f06b236ba6b592bbb0512d5c6c158:
ARM: socfpga_defconfig: enable FS configs to support Angstrom filesystem (2016-11-09 08:11:31 -0600)
----------------------------------------------------------------
SoCFPGA defconfig updates for v4.10
- enable QSPI, HIGHMEM, FPGA bridge and device-tree overlays
- enable AUTOFS4 and NFS file system support
----------------------------------------------------------------
Alan Tull (1):
ARM: socfpga: updates for socfpga_defconfig
Dinh Nguyen (2):
ARM: socfpga_defconfig: Enable HIGHMEM
ARM: socfpga_defconfig: enable FS configs to support Angstrom filesystem
Steffen Trumtrar (1):
ARM: socfpga: defconfig: enable qspi
arch/arm/configs/socfpga_defconfig | 15 +++++++++++++++
1 file changed, 15 insertions(+)
^ permalink raw reply
* [GIT PULL 1/2] SoCFPGA DTS updates for v4.10
From: Dinh Nguyen @ 2016-11-11 20:59 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Kevin, and Olof:
Please pull in part 2 of these DTS updates for v4.10.
Thanks,
Dinh
The following changes since commit c96f5919e6b0d132aa9afe9f1adc872fc107d5bb:
ARM: dts: socfpga: socrates: enable qspi (2016-10-18 22:18:14 -0500)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_for_v4.10_part_2
for you to fetch changes up to d837a80d19505d74ee5941eebf9dd53fed6f36a6:
ARM: dts: socfpga: add nand controller nodes (2016-11-09 12:40:52 -0600)
----------------------------------------------------------------
SoCFPGA DTS update for v4.10, part 2
- Add specific compatible strings for variants of Cyclone5 boards
- Add QSPI node on Arria10
- Enable QSPI on Arria5 and Arria10 devkit, and Cyclone5 SoCKit
- Add NAND controller node on Cyclone5
----------------------------------------------------------------
Dinh Nguyen (6):
ARM: dts: socfpga: add specific compatible strings for boards
ARM: dts: socfpga: enable qspi on the Cyclone5 devkit
ARM: dts: socfpga: Add QSPI node for the Arria10
ARM: dts: socfpga: Enable QSPI in Arria10 devkit
ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit
ARM: dts: socfpga: Enable QSPI on the Arria5 devkit
Steffen Trumtrar (1):
ARM: dts: socfpga: add nand controller nodes
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/socfpga.dtsi | 13 ++++++
arch/arm/boot/dts/socfpga_arria10.dtsi | 14 +++++++
arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts | 49 ++++++++++++++++++++++
arch/arm/boot/dts/socfpga_arria5_socdk.dts | 33 +++++++++++++++
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts | 2 +-
arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts | 2 +-
arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 35 +++++++++++++++-
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 23 +++++++++-
arch/arm/boot/dts/socfpga_cyclone5_sodia.dts | 2 +-
arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts | 2 +-
11 files changed, 170 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
^ permalink raw reply
* [PATCH] PCI: enable extended tags support for PCIe endpoints
From: Bjorn Helgaas @ 2016-11-11 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <420a9a23-79f8-41d8-c44f-b53f5000c957@codeaurora.org>
On Thu, Nov 10, 2016 at 01:35:41PM -0500, Sinan Kaya wrote:
> On 9/24/2016 10:10 PM, Sinan Kaya wrote:
> > Each PCIe device can issue up to 32 transactions at a time by default.
> > Each transaction is tracked by a tag number on the bus. 32 outstanding
> > transactions is not enough for some performance critical applications
> > especially when a lot of small sized frames are transmitted.
> >
> > Extended tags support increases this number to 256. Devices not
> > supporting extended tags tie-off this field to 0. According to ECN, it
> > is safe to enable this feature for all PCIe endpoints.
> >
> > Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
> > ---
> > drivers/pci/probe.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > index 93f280d..2424f38 100644
> > --- a/drivers/pci/probe.c
> > +++ b/drivers/pci/probe.c
> > @@ -1505,12 +1505,19 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
> > */
> > }
> >
> > +static int pci_configure_extended_tags(struct pci_dev *dev)
> > +{
>
> I should have checked the capability here before trying to enable it.
> I'll post a follow up patch on this.
>
> Is there any other feedback?
If this were completely safe to enable for every device that supported
it, why would there be an enable bit in Device Control?
I don't know anything about extended tags, but it worries me a little
when there's a "go-fast" switch and no explanation about when and why
we might need to go slow.
> > + return pcie_capability_set_word(dev, PCI_EXP_DEVCTL,
> > + PCI_EXP_DEVCTL_EXT_TAG);
> > +}
> > +
> > static void pci_configure_device(struct pci_dev *dev)
> > {
> > struct hotplug_params hpp;
> > int ret;
> >
> > pci_configure_mps(dev);
> > + pci_configure_extended_tags(dev);
> >
> > memset(&hpp, 0, sizeof(hpp));
> > ret = pci_get_hp_params(dev, &hpp);
> >
>
>
> --
> Sinan Kaya
> Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
> Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH] clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
From: Maxime Ripard @ 2016-11-11 20:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161111100558.14629-2-wens@csie.org>
On Fri, Nov 11, 2016 at 06:05:58PM +0800, Chen-Yu Tsai wrote:
> The audio module clocks are supposed to be set according to the sample
> rate of the audio stream. The audio PLL provides the clock signal for
> thees module clocks, and only it is freely tunable.
>
> Set CLK_SET_RATE_PARENT for the audio module clocks so their users can
> properly tune the clock rate.
>
> Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Fixed the typo and applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [PATCH v2 2/2] pinctrl: single: search for the bits property when parsing bits
From: Linus Walleij @ 2016-11-11 20:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161109145401.25327-3-ahaslam@baylibre.com>
On Wed, Nov 9, 2016 at 3:54 PM, Axel Haslam <ahaslam@baylibre.com> wrote:
> The pcs_parse_bits_in_pinctrl_entry function should search
> for the "pinctrl-single,bits" and not "pinctrl-single,pins"
>
> Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Patch applied with Tony's ACK.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2 1/2] pinctrl: single: check for any error when getting rows
From: Linus Walleij @ 2016-11-11 20:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161109145401.25327-2-ahaslam@baylibre.com>
On Wed, Nov 9, 2016 at 3:54 PM, Axel Haslam <ahaslam@baylibre.com> wrote:
> pinctrl_count_index_with_args returns -ENOENT not
> -EINVAL. The return check would pass, and we would
> try to kzalloc with a negative error size throwing
> a warning.
>
> Instead of checking for -EINVAL specifically, lets
> check for any error and avoid negative size allocations.
>
> Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Patch applied with Tony's ACK.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH] crypto: arm64/sha2: integrate OpenSSL implementations of SHA256/SHA512
From: Will Deacon @ 2016-11-11 19:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478872273-16382-1-git-send-email-ard.biesheuvel@linaro.org>
On Fri, Nov 11, 2016 at 09:51:13PM +0800, Ard Biesheuvel wrote:
> This integrates both the accelerated scalar and the NEON implementations
> of SHA-224/256 as well as SHA-384/512 from the OpenSSL project.
>
> Relative performance compared to the respective generic C versions:
>
> | SHA256-scalar | SHA256-NEON* | SHA512 |
> ------------+-----------------+--------------+----------+
> Cortex-A53 | 1.63x | 1.63x | 2.34x |
> Cortex-A57 | 1.43x | 1.59x | 1.95x |
> Cortex-A73 | 1.26x | 1.56x | ? |
>
> The core crypto code was authored by Andy Polyakov of the OpenSSL
> project, in collaboration with whom the upstream code was adapted so
> that this module can be built from the same version of sha512-armv8.pl.
>
> The version in this patch was taken from OpenSSL commit
>
> 866e505e0d66 sha/asm/sha512-armv8.pl: add NEON version of SHA256.
>
> * The core SHA algorithm is fundamentally sequential, but there is a
> secondary transformation involved, called the schedule update, which
> can be performed independently. The NEON version of SHA-224/SHA-256
> only implements this part of the algorithm using NEON instructions,
> the sequential part is always done using scalar instructions.
>
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
>
> This supersedes the SHA-256-NEON-only patch I sent out about 6 weeks ago.
>
> Will, Catalin: note that this pulls in a .pl script, and adds a build rule
> locally in arch/arm64/crypto to generate .S files on the fly from Perl
> scripts. I will leave it to you to decide whether you are ok with this as
> is, or whether you prefer .S_shipped files, in which case the Perl script
> is only included as a reference (this is how we did it for arch/arm in the
> past, but given that it adds about 3000 lines of generated code to the patch,
> I think we may want to simply keep it as below)
I think we should include the shipped files too. 3000 lines isn't that much
in the grand scheme of things, and there will be people who complain about
the unconditional perl dependency.
Will
^ permalink raw reply
* PM regression with LED changes in next-20161109
From: Hans de Goede @ 2016-11-11 19:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <f7c9b2be-0003-f342-a4c7-802532faa424@gmail.com>
Hi,
On 11-11-16 18:03, Jacek Anaszewski wrote:
> On 11/11/2016 01:01 PM, Pavel Machek wrote:
>> On Thu 2016-11-10 22:34:07, Jacek Anaszewski wrote:
>>> Hi,
>>>
>>> On 11/10/2016 09:29 PM, Pavel Machek wrote:
>>>> On Thu 2016-11-10 10:55:37, Tony Lindgren wrote:
>>>>> * Pavel Machek <pavel@ucw.cz> [161110 09:29]:
>>>>>> Hi!
>>>>>>
>>>>>>>>>> Looks like commit 883d32ce3385 ("leds: core: Add support for poll()ing
>>>>>>>>>> the sysfs brightness attr for changes.") breaks runtime PM for me.
>>>>>>>>>>
>>>>>>>>>> On my omap dm3730 based test system, idle power consumption is over 70
>>>>>>>>>> times higher now with this patch! It goes from about 6mW for the core
>>>>>>>>>> system to over 440mW during idle meaning there's some busy timer now
>>>>>>>>>> active.
>>>>>>>>>>
>>>>>>>>>> Reverting this patch fixes the issue. Any ideas?
>>>>>>
>>>>>> Are you using any LED that toggles with high frequency? Like perhaps
>>>>>> LED that is lit when CPU is active?
>>>>>
>>>>> Yeah one of them seems to have cpu0 as the default trigger.
>>>>
>>>> Aha. Its quite obvious we don't want to notify sysfs each time that
>>>> one is toggled, right?
>>>>
>>>> IMO brightness should display max brightness for the trigger, as Hans
>>>> suggested, anything else is madness for trigger such as cpu activity.
>>>
>>> Are you suggesting that we should revert changes introduced
>>> by below patch?
>>>
>>> commit 29d76dfa29fe22583aefddccda0bc56aa81035dc
>>> Author: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
>>> Date: Tue Mar 18 09:47:48 2008 +0000
>>>
>>> leds: Add support to leds with readable status
>>>
>>> Some led hardware allows drivers to query the led state, and this patch
>>> adds a hook to let the led class take advantage of that information when
>>> available.
>>>
>>> Without this functionality, when access to the led hardware is not
>>> exclusive (i.e. firmware or hardware might change its state behind the
>>> kernel's back), reality goes out of sync with the led class' idea of
>>> what
>>> the led is doing, which is annoying at best.
>>
>> Hmm. So userland can read the LED state, and it can get _some_ value
>> back, but it can not know if it is current state or not.
>>
>> I don't think that's a good interface. I see it is from 2008... is
>> someone using it? Maybe it is too late for revert.
>
> I can imagine it being used in flash LED use case. E.g. one
> could use oneshot trigger to trigger flash strobe, and then
> he could periodically read brightness file to check, for whatever
> reason, whether the flash is strobing.
>
>> But I'd certainly not extend it with poll.
>
> We could add a dedicated file e.g. hw_brightness_change for that
> (maybe someone will have a better candidate for the file name).
Why a dedicated file? Are we going to mirror brightness here
wrt r/w (show/store) behavior ? If not userspace now needs
2 open fds which is not really nice. If we are and we are
not going to use poll for something else on brightness itself
then why not just poll directly on brightness ?
Thinking more about this, I'm strongly against having to do
poll on /sys/.../bar to detect changes on /sys/.../foo that
is something which no other interface does. So my vote on this
is NACK for the having a separate file for this.
Regards,
Hans
>
> This way it would be semantically consistent to report only
> hardware originating brightness changes on it, which was the
> initial reason for adding the brightness change notification
> feature.
>
> Moreover, LED class drivers could report on this file the
> brightness level which was set by the firmware, which wouldn't
> affect current LED class device brightness setting, unless
> brightness file is read (and brightness_get op is supported).
>
>> IMO reading/polling should only be available with some triggers. It
>> does not make sense with "CPU load" trigger. It makes sense with
>> "keyboard light changeable by hardware" trigger.
>
>
^ permalink raw reply
* [PATCH 14/14] ARM: OMAP2+: Drop legacy sdram timings
From: Tony Lindgren @ 2016-11-11 19:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161111191711.5079-1-tony@atomide.com>
These are no longer used. If somebody needs to configure
memory timings for various idle modes, they should be
implemented as a device driver callbacks from the PM
code.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h | 51 ----
arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h | 55 ----
arch/arm/mach-omap2/sdram-nokia.c | 299 ---------------------
arch/arm/mach-omap2/sdram-nokia.h | 12 -
arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h | 51 ----
.../mach-omap2/sdram-qimonda-hyb18m512160af-6.h | 54 ----
6 files changed, 522 deletions(-)
delete mode 100644 arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
delete mode 100644 arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
delete mode 100644 arch/arm/mach-omap2/sdram-nokia.c
delete mode 100644 arch/arm/mach-omap2/sdram-nokia.h
delete mode 100644 arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
delete mode 100644 arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
diff --git a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
deleted file mode 100644
--- a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * SDRC register values for the Hynix H8MBX00U0MER-0EM
- *
- * Copyright (C) 2009 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
-#define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
-
-#include "sdrc.h"
-
-/* Hynix H8MBX00U0MER-0EM */
-static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = {
- [0] = {
- .rate = 200000000,
- .actim_ctrla = 0xa2e1b4c6,
- .actim_ctrlb = 0x0002131c,
- .rfr_ctrl = 0x0005e601,
- .mr = 0x00000032,
- },
- [1] = {
- .rate = 166000000,
- .actim_ctrla = 0x629db4c6,
- .actim_ctrlb = 0x00012214,
- .rfr_ctrl = 0x0004dc01,
- .mr = 0x00000032,
- },
- [2] = {
- .rate = 100000000,
- .actim_ctrla = 0x51912284,
- .actim_ctrlb = 0x0002120e,
- .rfr_ctrl = 0x0002d101,
- .mr = 0x00000022,
- },
- [3] = {
- .rate = 83000000,
- .actim_ctrla = 0x31512283,
- .actim_ctrlb = 0x0001220a,
- .rfr_ctrl = 0x00025501,
- .mr = 0x00000022,
- },
- [4] = {
- .rate = 0
- },
-};
-
-#endif
diff --git a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
deleted file mode 100644
--- a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * SDRC register values for the Micron MT46H32M32LF-6
- *
- * Copyright (C) 2008 Texas Instruments, Inc.
- * Copyright (C) 2008-2009 Nokia Corporation
- *
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF
-#define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF
-
-#include "sdrc.h"
-
-/* Micron MT46H32M32LF-6 */
-/* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */
-static struct omap_sdrc_params mt46h32m32lf6_sdrc_params[] = {
- [0] = {
- .rate = 166000000,
- .actim_ctrla = 0x9a9db4c6,
- .actim_ctrlb = 0x00011217,
- .rfr_ctrl = 0x0004dc01,
- .mr = 0x00000032,
- },
- [1] = {
- .rate = 165941176,
- .actim_ctrla = 0x9a9db4c6,
- .actim_ctrlb = 0x00011217,
- .rfr_ctrl = 0x0004dc01,
- .mr = 0x00000032,
- },
- [2] = {
- .rate = 83000000,
- .actim_ctrla = 0x51512283,
- .actim_ctrlb = 0x0001120c,
- .rfr_ctrl = 0x00025501,
- .mr = 0x00000032,
- },
- [3] = {
- .rate = 82970588,
- .actim_ctrla = 0x51512283,
- .actim_ctrlb = 0x0001120c,
- .rfr_ctrl = 0x00025501,
- .mr = 0x00000032,
- },
- [4] = {
- .rate = 0
- },
-};
-
-#endif
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
deleted file mode 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ /dev/null
@@ -1,299 +0,0 @@
-/*
- * SDRC register values for Nokia boards
- *
- * Copyright (C) 2008, 2010-2011 Nokia Corporation
- *
- * Lauri Leukkunen <lauri.leukkunen@nokia.com>
- *
- * Original code by Juha Yrjola <juha.yrjola@solidboot.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
-#include "common.h"
-#include "sdram-nokia.h"
-#include "sdrc.h"
-
-/* In picoseconds, except for tREF (ns), tXP, tCKE, tWTR (clks) */
-struct sdram_timings {
- u32 casl;
- u32 tDAL;
- u32 tDPL;
- u32 tRRD;
- u32 tRCD;
- u32 tRP;
- u32 tRAS;
- u32 tRC;
- u32 tRFC;
- u32 tXSR;
-
- u32 tREF; /* in ns */
-
- u32 tXP;
- u32 tCKE;
- u32 tWTR;
-};
-
-static const struct sdram_timings nokia_97dot6mhz_timings[] = {
- {
- .casl = 3,
- .tDAL = 30725,
- .tDPL = 15362,
- .tRRD = 10241,
- .tRCD = 20483,
- .tRP = 15362,
- .tRAS = 40967,
- .tRC = 56330,
- .tRFC = 138266,
- .tXSR = 204839,
-
- .tREF = 7798,
-
- .tXP = 2,
- .tCKE = 4,
- .tWTR = 2,
- },
-};
-
-static const struct sdram_timings nokia_166mhz_timings[] = {
- {
- .casl = 3,
- .tDAL = 33000,
- .tDPL = 15000,
- .tRRD = 12000,
- .tRCD = 22500,
- .tRP = 18000,
- .tRAS = 42000,
- .tRC = 66000,
- .tRFC = 138000,
- .tXSR = 200000,
-
- .tREF = 7800,
-
- .tXP = 2,
- .tCKE = 2,
- .tWTR = 2
- },
-};
-
-static const struct sdram_timings nokia_195dot2mhz_timings[] = {
- {
- .casl = 3,
- .tDAL = 30725,
- .tDPL = 15362,
- .tRRD = 10241,
- .tRCD = 20483,
- .tRP = 15362,
- .tRAS = 40967,
- .tRC = 56330,
- .tRFC = 138266,
- .tXSR = 204839,
-
- .tREF = 7752,
-
- .tXP = 2,
- .tCKE = 4,
- .tWTR = 2,
- },
-};
-
-static const struct sdram_timings nokia_200mhz_timings[] = {
- {
- .casl = 3,
- .tDAL = 30000,
- .tDPL = 15000,
- .tRRD = 10000,
- .tRCD = 20000,
- .tRP = 15000,
- .tRAS = 40000,
- .tRC = 55000,
- .tRFC = 140000,
- .tXSR = 200000,
-
- .tREF = 7800,
-
- .tXP = 2,
- .tCKE = 4,
- .tWTR = 2
- },
-};
-
-static const struct {
- long rate;
- struct sdram_timings const *data;
-} nokia_timings[] = {
- { 83000000, nokia_166mhz_timings },
- { 97600000, nokia_97dot6mhz_timings },
- { 100000000, nokia_200mhz_timings },
- { 166000000, nokia_166mhz_timings },
- { 195200000, nokia_195dot2mhz_timings },
- { 200000000, nokia_200mhz_timings },
-};
-static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1];
-
-static unsigned long sdrc_get_fclk_period(long rate)
-{
- /* In picoseconds */
- return 1000000000 / rate;
-}
-
-static unsigned int sdrc_ps_to_ticks(unsigned int time_ps, long rate)
-{
- unsigned long tick_ps;
-
- /* Calculate in picosecs to yield more exact results */
- tick_ps = sdrc_get_fclk_period(rate);
-
- return (time_ps + tick_ps - 1) / tick_ps;
-}
-#undef DEBUG
-#ifdef DEBUG
-static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit,
- int ticks, long rate, const char *name)
-#else
-static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit,
- int ticks)
-#endif
-{
- int mask, nr_bits;
-
- nr_bits = end_bit - st_bit + 1;
- if (ticks >= 1 << nr_bits)
- return -1;
- mask = (1 << nr_bits) - 1;
- *regval &= ~(mask << st_bit);
- *regval |= ticks << st_bit;
-#ifdef DEBUG
- printk(KERN_INFO "SDRC %s: %i ticks %i ns\n", name, ticks,
- (unsigned int)sdrc_get_fclk_period(rate) * ticks /
- 1000);
-#endif
-
- return 0;
-}
-
-#ifdef DEBUG
-#define SDRC_SET_ONE(reg, st, end, field, rate) \
- if (set_sdrc_timing_regval((reg), (st), (end), \
- memory_timings->field, (rate), #field) < 0) \
- err = -1;
-#else
-#define SDRC_SET_ONE(reg, st, end, field, rate) \
- if (set_sdrc_timing_regval((reg), (st), (end), \
- memory_timings->field) < 0) \
- err = -1;
-#endif
-
-#ifdef DEBUG
-static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit,
- int time, long rate, const char *name)
-#else
-static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit,
- int time, long rate)
-#endif
-{
- int ticks, ret;
- ret = 0;
-
- if (time == 0)
- ticks = 0;
- else
- ticks = sdrc_ps_to_ticks(time, rate);
-
-#ifdef DEBUG
- ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks,
- rate, name);
-#else
- ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks);
-#endif
-
- return ret;
-}
-
-#ifdef DEBUG
-#define SDRC_SET_ONE_PS(reg, st, end, field, rate) \
- if (set_sdrc_timing_regval_ps((reg), (st), (end), \
- memory_timings->field, \
- (rate), #field) < 0) \
- err = -1;
-
-#else
-#define SDRC_SET_ONE_PS(reg, st, end, field, rate) \
- if (set_sdrc_timing_regval_ps((reg), (st), (end), \
- memory_timings->field, (rate)) < 0) \
- err = -1;
-#endif
-
-static int sdrc_timings(int id, long rate,
- const struct sdram_timings *memory_timings)
-{
- u32 ticks_per_ms;
- u32 rfr, l;
- u32 actim_ctrla = 0, actim_ctrlb = 0;
- u32 rfr_ctrl;
- int err = 0;
- long l3_rate = rate / 1000;
-
- SDRC_SET_ONE_PS(&actim_ctrla, 0, 4, tDAL, l3_rate);
- SDRC_SET_ONE_PS(&actim_ctrla, 6, 8, tDPL, l3_rate);
- SDRC_SET_ONE_PS(&actim_ctrla, 9, 11, tRRD, l3_rate);
- SDRC_SET_ONE_PS(&actim_ctrla, 12, 14, tRCD, l3_rate);
- SDRC_SET_ONE_PS(&actim_ctrla, 15, 17, tRP, l3_rate);
- SDRC_SET_ONE_PS(&actim_ctrla, 18, 21, tRAS, l3_rate);
- SDRC_SET_ONE_PS(&actim_ctrla, 22, 26, tRC, l3_rate);
- SDRC_SET_ONE_PS(&actim_ctrla, 27, 31, tRFC, l3_rate);
-
- SDRC_SET_ONE_PS(&actim_ctrlb, 0, 7, tXSR, l3_rate);
-
- SDRC_SET_ONE(&actim_ctrlb, 8, 10, tXP, l3_rate);
- SDRC_SET_ONE(&actim_ctrlb, 12, 14, tCKE, l3_rate);
- SDRC_SET_ONE(&actim_ctrlb, 16, 17, tWTR, l3_rate);
-
- ticks_per_ms = l3_rate;
- rfr = memory_timings[0].tREF * ticks_per_ms / 1000000;
- if (rfr > 65535 + 50)
- rfr = 65535;
- else
- rfr -= 50;
-
-#ifdef DEBUG
- printk(KERN_INFO "SDRC tREF: %i ticks\n", rfr);
-#endif
-
- l = rfr << 8;
- rfr_ctrl = l | 0x1; /* autorefresh, reload counter with 1xARCV */
-
- nokia_sdrc_params[id].rate = rate;
- nokia_sdrc_params[id].actim_ctrla = actim_ctrla;
- nokia_sdrc_params[id].actim_ctrlb = actim_ctrlb;
- nokia_sdrc_params[id].rfr_ctrl = rfr_ctrl;
- nokia_sdrc_params[id].mr = 0x32;
-
- nokia_sdrc_params[id + 1].rate = 0;
-
- return err;
-}
-
-struct omap_sdrc_params *nokia_get_sdram_timings(void)
-{
- int err = 0;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(nokia_timings); i++) {
- err |= sdrc_timings(i, nokia_timings[i].rate,
- nokia_timings[i].data);
- if (err)
- pr_err("%s: error with rate %ld: %d\n", __func__,
- nokia_timings[i].rate, err);
- }
-
- return err ? NULL : nokia_sdrc_params;
-}
-
diff --git a/arch/arm/mach-omap2/sdram-nokia.h b/arch/arm/mach-omap2/sdram-nokia.h
deleted file mode 100644
--- a/arch/arm/mach-omap2/sdram-nokia.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * SDRC register values for Nokia boards
- *
- * Copyright (C) 2010 Nokia
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-struct omap_sdrc_params *nokia_get_sdram_timings(void);
-
diff --git a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
deleted file mode 100644
--- a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * SDRC register values for the Numonyx M65KXXXXAM
- *
- * Copyright (C) 2009 Integration Software and Electronic Engineering.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM
-#define __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM
-
-#include "sdrc.h"
-
-/* Numonyx M65KXXXXAM */
-static struct omap_sdrc_params m65kxxxxam_sdrc_params[] = {
- [0] = {
- .rate = 200000000,
- .actim_ctrla = 0xe321d4c6,
- .actim_ctrlb = 0x00022328,
- .rfr_ctrl = 0x0005e601,
- .mr = 0x00000032,
- },
- [1] = {
- .rate = 166000000,
- .actim_ctrla = 0xba9dc485,
- .actim_ctrlb = 0x00022321,
- .rfr_ctrl = 0x0004dc01,
- .mr = 0x00000032,
- },
- [2] = {
- .rate = 133000000,
- .actim_ctrla = 0x9a19b485,
- .actim_ctrlb = 0x0002231b,
- .rfr_ctrl = 0x0003de01,
- .mr = 0x00000032,
- },
- [3] = {
- .rate = 83000000,
- .actim_ctrla = 0x594ca242,
- .actim_ctrlb = 0x00022310,
- .rfr_ctrl = 0x00025501,
- .mr = 0x00000032,
- },
- [4] = {
- .rate = 0
- },
-};
-
-#endif
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
deleted file mode 100644
--- a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * SDRC register values for the Qimonda HYB18M512160AF-6
- *
- * Copyright (C) 2008-2009 Texas Instruments, Inc.
- * Copyright (C) 2008-2009 Nokia Corporation
- *
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
-#define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
-
-#include "sdrc.h"
-
-/* Qimonda HYB18M512160AF-6 */
-static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
- [0] = {
- .rate = 166000000,
- .actim_ctrla = 0x629db4c6,
- .actim_ctrlb = 0x00012214,
- .rfr_ctrl = 0x0004dc01,
- .mr = 0x00000032,
- },
- [1] = {
- .rate = 165941176,
- .actim_ctrla = 0x629db4c6,
- .actim_ctrlb = 0x00012214,
- .rfr_ctrl = 0x0004dc01,
- .mr = 0x00000032,
- },
- [2] = {
- .rate = 83000000,
- .actim_ctrla = 0x31512283,
- .actim_ctrlb = 0x0001220a,
- .rfr_ctrl = 0x00025501,
- .mr = 0x00000022,
- },
- [3] = {
- .rate = 82970588,
- .actim_ctrla = 0x31512283,
- .actim_ctrlb = 0x0001220a,
- .rfr_ctrl = 0x00025501,
- .mr = 0x00000022,
- },
- [4] = {
- .rate = 0
- },
-};
-
-#endif
--
2.10.2
^ permalink raw reply
* [PATCH 13/14] ARM: OMAP2+: Drop legacy ads7846 init
From: Tony Lindgren @ 2016-11-11 19:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161111191711.5079-1-tony@atomide.com>
---
arch/arm/mach-omap2/Makefile | 3 -
arch/arm/mach-omap2/common-board-devices.c | 102 -----------------------------
arch/arm/mach-omap2/common-board-devices.h | 7 --
arch/arm/mach-omap2/dss-common.c | 36 ----------
arch/arm/mach-omap2/dss-common.h | 13 ----
arch/arm/mach-omap2/pdata-quirks.c | 1 -
6 files changed, 162 deletions(-)
delete mode 100644 arch/arm/mach-omap2/common-board-devices.c
delete mode 100644 arch/arm/mach-omap2/dss-common.c
delete mode 100644 arch/arm/mach-omap2/dss-common.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -244,6 +244,3 @@ obj-y += $(onenand-m) $(onenand-y)
nand-$(CONFIG_MTD_NAND_OMAP2) := gpmc-nand.o
obj-y += $(nand-m) $(nand-y)
-
-
-obj-y += common-board-devices.o dss-common.o
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
deleted file mode 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * common-board-devices.c
- *
- * Copyright (C) 2011 CompuLab, Ltd.
- * Author: Mike Rapoport <mike@compulab.co.il>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
- * 02110-1301 USA
- *
- */
-
-#include <linux/gpio.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/ads7846.h>
-
-#include <linux/platform_data/spi-omap2-mcspi.h>
-
-#include "common.h"
-#include "common-board-devices.h"
-
-#if IS_ENABLED(CONFIG_TOUCHSCREEN_ADS7846)
-static struct omap2_mcspi_device_config ads7846_mcspi_config = {
- .turbo_mode = 0,
-};
-
-static struct ads7846_platform_data ads7846_config = {
- .x_max = 0x0fff,
- .y_max = 0x0fff,
- .x_plate_ohms = 180,
- .pressure_max = 255,
- .debounce_max = 10,
- .debounce_tol = 3,
- .debounce_rep = 1,
- .gpio_pendown = -EINVAL,
- .keep_vref_on = 1,
-};
-
-static struct spi_board_info ads7846_spi_board_info __initdata = {
- .modalias = "ads7846",
- .bus_num = -EINVAL,
- .chip_select = 0,
- .max_speed_hz = 1500000,
- .controller_data = &ads7846_mcspi_config,
- .irq = -EINVAL,
- .platform_data = &ads7846_config,
-};
-
-void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
- struct ads7846_platform_data *board_pdata)
-{
- struct spi_board_info *spi_bi = &ads7846_spi_board_info;
- int err;
-
- /*
- * If a board defines get_pendown_state() function, request the pendown
- * GPIO and set the GPIO debounce time.
- * If a board does not define the get_pendown_state() function, then
- * the ads7846 driver will setup the pendown GPIO itself.
- */
- if (board_pdata && board_pdata->get_pendown_state) {
- err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
- if (err) {
- pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
- return;
- }
-
- if (gpio_debounce)
- gpio_set_debounce(gpio_pendown, gpio_debounce);
-
- gpio_export(gpio_pendown, 0);
- }
-
- spi_bi->bus_num = bus_num;
- spi_bi->irq = gpio_to_irq(gpio_pendown);
-
- ads7846_config.gpio_pendown = gpio_pendown;
-
- if (board_pdata) {
- board_pdata->gpio_pendown = gpio_pendown;
- board_pdata->gpio_pendown_debounce = gpio_debounce;
- spi_bi->platform_data = board_pdata;
- }
-
- spi_register_board_info(&ads7846_spi_board_info, 1);
-}
-#else
-void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
- struct ads7846_platform_data *board_pdata)
-{
-}
-#endif
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -4,13 +4,6 @@
#include <sound/tlv320aic3x.h>
#include <linux/mfd/menelaus.h>
-#define NAND_BLOCK_SIZE SZ_128K
-
-struct mtd_partition;
-struct ads7846_platform_data;
-
-void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
- struct ads7846_platform_data *board_pdata);
void *n8x0_legacy_init(void);
extern struct menelaus_platform_data n8x0_menelaus_platform_data;
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
deleted file mode 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (C) 2012 Texas Instruments, Inc..
- * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
- * 02110-1301 USA
- *
- */
-
-/*
- * NOTE: this is a transitional file to help with DT adaptation.
- * This file will be removed when DSS supports DT.
- */
-
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-#include <linux/platform_device.h>
-
-#include <linux/platform_data/omapdss.h>
-#include <video/omap-panel-data.h>
-
-#include "soc.h"
-#include "dss-common.h"
-#include "display.h"
-
diff --git a/arch/arm/mach-omap2/dss-common.h b/arch/arm/mach-omap2/dss-common.h
deleted file mode 100644
--- a/arch/arm/mach-omap2/dss-common.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __OMAP_DSS_COMMON__
-#define __OMAP_DSS_COMMON__
-
-/*
- * NOTE: this is a transitional file to help with DT adaptation.
- * This file will be removed when DSS supports DT.
- */
-
-void __init omap4_panda_display_init_of(void);
-void __init omap_4430sdp_display_init_of(void);
-void __init omap3_igep2_display_init_of(void);
-
-#endif
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -31,7 +31,6 @@
#include "common.h"
#include "common-board-devices.h"
-#include "dss-common.h"
#include "control.h"
#include "omap_device.h"
#include "omap-pm.h"
--
2.10.2
^ permalink raw reply
* [PATCH 12/14] ARM: OMAP2+: Remove legacy board-flash.c
From: Tony Lindgren @ 2016-11-11 19:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161111191711.5079-1-tony@atomide.com>
From: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Legacy board files in mach-omap2 used the helper functions
board_{nor,nand,onenand}_init() to initialize the flash
devices attached to the GPMC.
With Device Tree booting the initialization is handled by
the GPMC driver gpmc_probe_*_child() functions so this
code is not needed anymore now that OMAP2+ is DT-only.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/Makefile | 4 -
arch/arm/mach-omap2/board-flash.c | 242 --------------------------------------
arch/arm/mach-omap2/board-flash.h | 56 ---------
3 files changed, 302 deletions(-)
delete mode 100644 arch/arm/mach-omap2/board-flash.c
delete mode 100644 arch/arm/mach-omap2/board-flash.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -232,10 +232,6 @@ obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
# Platform specific device init code
-omap-flash-$(CONFIG_MTD_NAND_OMAP2) := board-flash.o
-omap-flash-$(CONFIG_MTD_ONENAND_OMAP2) := board-flash.o
-obj-y += $(omap-flash-y) $(omap-flash-m)
-
omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o
obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y)
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
deleted file mode 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ /dev/null
@@ -1,242 +0,0 @@
-/*
- * board-flash.c
- * Modified from mach-omap2/board-3430sdp-flash.c
- *
- * Copyright (C) 2009 Nokia Corporation
- * Copyright (C) 2009 Texas Instruments
- *
- * Vimal Singh <vimalsingh@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/omap-gpmc.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
-#include <linux/io.h>
-
-#include <linux/platform_data/mtd-nand-omap2.h>
-#include <linux/platform_data/mtd-onenand-omap2.h>
-
-#include "soc.h"
-#include "common.h"
-#include "board-flash.h"
-
-#define REG_FPGA_REV 0x10
-#define REG_FPGA_DIP_SWITCH_INPUT2 0x60
-#define MAX_SUPPORTED_GPMC_CONFIG 3
-
-#define DEBUG_BASE 0x08000000 /* debug board */
-
-/* various memory sizes */
-#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */
-#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */
-
-static struct physmap_flash_data board_nor_data = {
- .width = 2,
-};
-
-static struct resource board_nor_resource = {
- .flags = IORESOURCE_MEM,
-};
-
-static struct platform_device board_nor_device = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &board_nor_data,
- },
- .num_resources = 1,
- .resource = &board_nor_resource,
-};
-
-static void
-__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
-{
- int err;
-
- board_nor_data.parts = nor_parts;
- board_nor_data.nr_parts = nr_parts;
-
- /* Configure start address and size of NOR device */
- if (omap_rev() >= OMAP3430_REV_ES1_0) {
- err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
- (unsigned long *)&board_nor_resource.start);
- board_nor_resource.end = board_nor_resource.start
- + FLASH_SIZE_SDPV2 - 1;
- } else {
- err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
- (unsigned long *)&board_nor_resource.start);
- board_nor_resource.end = board_nor_resource.start
- + FLASH_SIZE_SDPV1 - 1;
- }
- if (err < 0) {
- pr_err("NOR: Can't request GPMC CS\n");
- return;
- }
- if (platform_device_register(&board_nor_device) < 0)
- pr_err("Unable to register NOR device\n");
-}
-
-#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2)
-static struct omap_onenand_platform_data board_onenand_data = {
- .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
-};
-
-void
-__init board_onenand_init(struct mtd_partition *onenand_parts,
- u8 nr_parts, u8 cs)
-{
- board_onenand_data.cs = cs;
- board_onenand_data.parts = onenand_parts;
- board_onenand_data.nr_parts = nr_parts;
-
- gpmc_onenand_init(&board_onenand_data);
-}
-#endif /* IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2) */
-
-#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2)
-
-/* Note that all values in this struct are in nanoseconds */
-struct gpmc_timings nand_default_timings[1] = {
- {
- .sync_clk = 0,
-
- .cs_on = 0,
- .cs_rd_off = 36,
- .cs_wr_off = 36,
-
- .we_on = 6,
- .oe_on = 6,
-
- .adv_on = 6,
- .adv_rd_off = 24,
- .adv_wr_off = 36,
-
- .we_off = 30,
- .oe_off = 48,
-
- .access = 54,
- .rd_cycle = 72,
- .wr_cycle = 72,
-
- .wr_access = 30,
- .wr_data_mux_bus = 0,
- },
-};
-
-static struct omap_nand_platform_data board_nand_data;
-
-void
-__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
- int nand_type, struct gpmc_timings *gpmc_t)
-{
- board_nand_data.cs = cs;
- board_nand_data.parts = nand_parts;
- board_nand_data.nr_parts = nr_parts;
- board_nand_data.devsize = nand_type;
-
- board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_SW;
- gpmc_nand_init(&board_nand_data, gpmc_t);
-}
-#endif /* IS_ENABLED(CONFIG_MTD_NAND_OMAP2) */
-
-/**
- * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
- * the various cs values.
- */
-static u8 get_gpmc0_type(void)
-{
- u8 cs = 0;
- void __iomem *fpga_map_addr;
-
- fpga_map_addr = ioremap(DEBUG_BASE, 4096);
- if (!fpga_map_addr)
- return -ENOMEM;
-
- if (!(readw_relaxed(fpga_map_addr + REG_FPGA_REV)))
- /* we dont have an DEBUG FPGA??? */
- /* Depend on #defines!! default to strata boot return param */
- goto unmap;
-
- /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
- cs = readw_relaxed(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
-
- /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
- if (omap_rev() >= OMAP3430_REV_ES1_0)
- /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
- cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
- ((cs & 2) << 1) | ((cs & 1) << 3);
- else
- /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
- cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
-unmap:
- iounmap(fpga_map_addr);
- return cs;
-}
-
-/**
- * board_flash_init - Identify devices connected to GPMC and register.
- *
- * @return - void.
- */
-void __init board_flash_init(struct flash_partitions partition_info[],
- char chip_sel_board[][GPMC_CS_NUM], int nand_type)
-{
- u8 cs = 0;
- u8 norcs = GPMC_CS_NUM + 1;
- u8 nandcs = GPMC_CS_NUM + 1;
- u8 onenandcs = GPMC_CS_NUM + 1;
- u8 idx;
- unsigned char *config_sel = NULL;
-
- /* REVISIT: Is this return correct idx for 2430 SDP?
- * for which cs configuration matches for 2430 SDP?
- */
- idx = get_gpmc0_type();
- if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
- pr_err("%s: Invalid chip select: %d\n", __func__, cs);
- return;
- }
- config_sel = (unsigned char *)(chip_sel_board[idx]);
-
- while (cs < GPMC_CS_NUM) {
- switch (config_sel[cs]) {
- case PDC_NOR:
- if (norcs > GPMC_CS_NUM)
- norcs = cs;
- break;
- case PDC_NAND:
- if (nandcs > GPMC_CS_NUM)
- nandcs = cs;
- break;
- case PDC_ONENAND:
- if (onenandcs > GPMC_CS_NUM)
- onenandcs = cs;
- break;
- }
- cs++;
- }
-
- if (norcs > GPMC_CS_NUM)
- pr_err("NOR: Unable to find configuration in GPMC\n");
- else
- board_nor_init(partition_info[0].parts,
- partition_info[0].nr_parts, norcs);
-
- if (onenandcs > GPMC_CS_NUM)
- pr_err("OneNAND: Unable to find configuration in GPMC\n");
- else
- board_onenand_init(partition_info[1].parts,
- partition_info[1].nr_parts, onenandcs);
-
- if (nandcs > GPMC_CS_NUM)
- pr_err("NAND: Unable to find configuration in GPMC\n");
- else
- board_nand_init(partition_info[2].parts,
- partition_info[2].nr_parts, nandcs,
- nand_type, nand_default_timings);
-}
diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h
deleted file mode 100644
--- a/arch/arm/mach-omap2/board-flash.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * board-sdp.h
- *
- * Information structures for SDP-specific board config data
- *
- * Copyright (C) 2009 Nokia Corporation
- * Copyright (C) 2009 Texas Instruments
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-
-#define PDC_NOR 1
-#define PDC_NAND 2
-#define PDC_ONENAND 3
-#define DBG_MPDB 4
-
-struct flash_partitions {
- struct mtd_partition *parts;
- int nr_parts;
-};
-
-#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2) || IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2)
-extern void board_flash_init(struct flash_partitions [],
- char chip_sel[][GPMC_CS_NUM], int nand_type);
-#else
-static inline void board_flash_init(struct flash_partitions part[],
- char chip_sel[][GPMC_CS_NUM], int nand_type)
-{
-}
-#endif
-
-#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2)
-extern void board_nand_init(struct mtd_partition *nand_parts,
- u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t);
-extern struct gpmc_timings nand_default_timings[];
-#else
-static inline void board_nand_init(struct mtd_partition *nand_parts,
- u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t)
-{
-}
-#define nand_default_timings NULL
-#endif
-
-#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2)
-extern void board_onenand_init(struct mtd_partition *nand_parts,
- u8 nr_parts, u8 cs);
-#else
-static inline void board_onenand_init(struct mtd_partition *nand_parts,
- u8 nr_parts, u8 cs)
-{
-}
-#endif
--
2.10.2
^ permalink raw reply
* [PATCH 11/14] ARM: OMAP2+: Remove legacy smsc911x and smc91x GPMC support
From: Tony Lindgren @ 2016-11-11 19:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161111191711.5079-1-tony@atomide.com>
From: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
When connecting an ethernet chip to the GPMC, such as smc91x
or smsc911x, a GPIO has to be requested to be used as an IRQ
and also the IO memory for a GPMC chip-select.
When booting with DT the chip-select allocation is handled
in a generic manner in the GPMC driver and the GPIO to IRQ
mapping is made by the DT core so this code is not needed
anymore now that mach-omap2 related boards are DT-only.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/Makefile | 2 -
arch/arm/mach-omap2/gpmc-smsc911x.c | 100 ------------------------------------
arch/arm/mach-omap2/gpmc-smsc911x.h | 35 -------------
3 files changed, 137 deletions(-)
delete mode 100644 arch/arm/mach-omap2/gpmc-smsc911x.c
delete mode 100644 arch/arm/mach-omap2/gpmc-smsc911x.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -249,7 +249,5 @@ obj-y += $(onenand-m) $(onenand-y)
nand-$(CONFIG_MTD_NAND_OMAP2) := gpmc-nand.o
obj-y += $(nand-m) $(nand-y)
-smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o
-obj-y += $(smsc911x-m) $(smsc911x-y)
obj-y += common-board-devices.o dss-common.o
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
deleted file mode 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * linux/arch/arm/mach-omap2/gpmc-smsc911x.c
- *
- * Copyright (C) 2009 Li-Pro.Net
- * Stephan Linz <linz@li-pro.net>
- *
- * Modified from linux/arch/arm/mach-omap2/gpmc-smc91x.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#define pr_fmt(fmt) "%s: " fmt, __func__
-
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/smsc911x.h>
-
-#include "gpmc.h"
-#include "gpmc-smsc911x.h"
-
-static struct resource gpmc_smsc911x_resources[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
- },
-};
-
-static struct smsc911x_platform_config gpmc_smsc911x_config = {
- .phy_interface = PHY_INTERFACE_MODE_MII,
- .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
- .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
-};
-
-/*
- * Initialize smsc911x device connected to the GPMC. Note that we
- * assume that pin multiplexing is done in the board-*.c file,
- * or in the bootloader.
- */
-void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
-{
- struct platform_device *pdev;
- unsigned long cs_mem_base;
- int ret;
-
- if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
- pr_err("Failed to request GPMC mem region\n");
- return;
- }
-
- gpmc_smsc911x_resources[0].start = cs_mem_base + 0x0;
- gpmc_smsc911x_resources[0].end = cs_mem_base + 0xff;
-
- if (gpio_request_one(gpmc_cfg->gpio_irq, GPIOF_IN, "smsc911x irq")) {
- pr_err("Failed to request IRQ GPIO%d\n", gpmc_cfg->gpio_irq);
- goto free1;
- }
-
- gpmc_smsc911x_resources[1].start = gpio_to_irq(gpmc_cfg->gpio_irq);
-
- if (gpio_is_valid(gpmc_cfg->gpio_reset)) {
- ret = gpio_request_one(gpmc_cfg->gpio_reset,
- GPIOF_OUT_INIT_HIGH, "smsc911x reset");
- if (ret) {
- pr_err("Failed to request reset GPIO%d\n",
- gpmc_cfg->gpio_reset);
- goto free2;
- }
-
- gpio_set_value(gpmc_cfg->gpio_reset, 0);
- msleep(100);
- gpio_set_value(gpmc_cfg->gpio_reset, 1);
- }
-
- gpmc_smsc911x_config.flags = gpmc_cfg->flags ? : SMSC911X_USE_16BIT;
-
- pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id,
- gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources),
- &gpmc_smsc911x_config, sizeof(gpmc_smsc911x_config));
- if (IS_ERR(pdev)) {
- pr_err("Unable to register platform device\n");
- gpio_free(gpmc_cfg->gpio_reset);
- goto free2;
- }
-
- return;
-
-free2:
- gpio_free(gpmc_cfg->gpio_irq);
-free1:
- gpmc_cs_free(gpmc_cfg->cs);
-
- pr_err("Could not initialize smsc911x device\n");
-}
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.h b/arch/arm/mach-omap2/gpmc-smsc911x.h
deleted file mode 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * arch/arm/plat-omap/include/plat/gpmc-smsc911x.h
- *
- * Copyright (C) 2009 Li-Pro.Net
- * Stephan Linz <linz@li-pro.net>
- *
- * Modified from arch/arm/plat-omap/include/plat/gpmc-smc91x.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_OMAP_GPMC_SMSC911X_H__
-
-struct omap_smsc911x_platform_data {
- int id;
- int cs;
- int gpio_irq;
- int gpio_reset;
- u32 flags;
-};
-
-#if IS_ENABLED(CONFIG_SMSC911X)
-
-extern void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d);
-
-#else
-
-static inline void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d)
-{
-}
-
-#endif
-#endif
--
2.10.2
^ permalink raw reply
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