* [PATCH v2 2/3] ARM: dts: sunxi: add support for Orange Pi Zero board
From: Chen-Yu Tsai @ 2016-12-02 16:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <324c8820-aeea-3fad-0e02-1bdb8f675677@arm.com>
On Sat, Dec 3, 2016 at 12:10 AM, Andre Przywara <andre.przywara@arm.com> wrote:
> Hi,
>
> On 02/12/16 14:32, Icenowy Zheng wrote:
>>
>>
>> 02.12.2016, 22:30, "Hans de Goede" <hdegoede@redhat.com>:
>>> Hi,
>>>
>>> On 02-12-16 15:22, Icenowy Zheng wrote:
>>>> 01.12.2016, 17:36, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
>>>>> On Mon, Nov 28, 2016 at 12:29:07AM +0000, Andr? Przywara wrote:
>>>>>> > Something more interesting happened.
>>>>>> >
>>>>>> > Xunlong made a add-on board for Orange Pi Zero, which exposes the
>>>>>> > two USB Controllers exported at expansion bus as USB Type-A
>>>>>> > connectors.
>>>>>> >
>>>>>> > Also it exposes a analog A/V jack and a microphone.
>>>>>> >
>>>>>> > Should I enable {e,o}hci{2.3} in the device tree?
>>>>>>
>>>>>> Actually we should do this regardless of this extension board. The USB
>>>>>> pins are not multiplexed and are exposed on user accessible pins (just
>>>>>> not soldered, but that's a detail), so I think they qualify for DT
>>>>>> enablement. And even if a user can't use them, it doesn't hurt to have
>>>>>> them (since they are not multiplexed).
>>>>>
>>>>> My main concern about this is that we'll leave regulators enabled by
>>>>> default, for a minority of users. And that minority will prevent to do
>>>>> a proper power management when the times come since we'll have to keep
>>>>> that behaviour forever.
>>>>
>>>> I think these users can add a 'fdt set /xxx/xxx status "disabled" ' .
>>>
>>> I don't think that will be necessary I'm pretty sure these extra usb
>>> ports do not have a regulator for the Vbus, they just hook directly
>>> to the 5V rail, can someone with a schematic check ?
>>
>> We seems to have still no schematics for the add-on board.
>
> From looking at the picture of that expansion board on the Aliexpress
> page and chasing the tracks, there is clearly no voltage regulator on
> there, it's just passive components. The 5V pin from the headers is
> routed forth and back between the two layers via some vias directly to
> the 5V pins of the USB sockets.
>
>> But something is sure is that there's no any regulator-related pins
>> on the add-on pinout. There's only USB DM and DP pins.
>>
>> So the Vbus must be directly connected to +5V.
>
> So yes, it is.
>
> But I think the question is moot anyways, since we don't provide DT
> support for that add-on board at that point anyways.
> One could imagine another board, though, which has regulators switched
> by GPIOs, but that would be their problem and they would have regulators
> specified in their specific DT snippet, then.
>
> So to summarize:
> - For that specific Orange Pi Zero board which we discuss the DT for
> there is no regulator support for the additional USB ports. Thus nothing
> we could turn off to save power.
> - A user could just take these USB brackets with pin headers that are so
> common in PCs to connect additional USB ports to the back of the box.
> One just needs to re-sort the pins, which is a matter of a minute.
> - As long as we don't provide any easy way of handling DT changes, we
> should enable the USB ports for the sake of the users of either those
> brackets or the expansion board. Any more sophisticated USB expansion
> board with regulators would need to amend the DT anyway.
>
> Does that make sense?
Sounds good to me.
ChenYu
^ permalink raw reply
* [RFC PATCH 00/29] arm64: Scalable Vector Extension core support
From: Florian Weimer @ 2016-12-02 16:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161202114850.GQ1574@e103592.cambridge.arm.com>
On 12/02/2016 12:48 PM, Dave Martin wrote:
> On Wed, Nov 30, 2016 at 01:38:28PM +0100, Florian Weimer wrote:
>
> [...]
>
>> We could add a system call to get the right stack size. But as it depends
>> on VL, I'm not sure what it looks like. Particularly if you need determine
>> the stack size before creating a thread that uses a specific VL setting.
>
> I missed this point previously -- apologies for that.
>
> What would you think of:
>
> set_vl(vl_for_new_thread);
> minsigstksz = get_minsigstksz();
> set_vl(my_vl);
>
> This avoids get_minsigstksz() requiring parameters -- which is mainly a
> concern because the parameters tomorrow might be different from the
> parameters today.
>
> If it is possible to create the new thread without any SVE-dependent code,
> then we could
>
> set_vl(vl_for_new_thread);
> new_thread_stack = malloc(get_minsigstksz());
> new_thread = create_thread(..., new_thread_stack);
> set_vl(my_vl);
>
> which has the nice property that the new thread directly inherits the
> configuration that was used for get_minsigstksz().
Because all SVE registers are caller-saved, it's acceptable to
temporarily reduce the VL value, I think. So this should work.
One complication is that both the kernel and the libc need to reserve
stack space, so the kernel-returned value and the one which has to be
used in reality will be different.
> However, it would be necessary to prevent GCC from moving any code
> across these statements -- in particular, SVE code that access VL-
> dependent data spilled on the stack is liable to go wrong if reordered
> with the above. So the sequence would need to go in an external
> function (or a single asm...)
I would talk to GCC folks?we have similar issues with changing the FPU
rounding mode, I assume.
Thanks,
Florian
^ permalink raw reply
* [PATCH 2/2] arm64: dts: juno: fix cluster sleep state entry latency on all SoC versions
From: Arnd Bergmann @ 2016-12-02 16:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ed75f674-feaf-9c4b-a995-3e815054918d@arm.com>
On Thursday, December 1, 2016 10:11:24 AM CET Sudeep Holla wrote:
> On 16/11/16 17:31, Sudeep Holla wrote:
> > The core and the cluster sleep state entry latencies can't be same as
> > cluster sleep involves more work compared to core level e.g. shared
> > cache maintenance.
> >
> > Experiments have shown on an average about 100us more latency for the
> > cluster sleep state compared to the core level sleep. This patch fixes
> > the entry latency for the cluster sleep state.
> >
> > Fixes: 28e10a8f3a03 ("arm64: dts: juno: Add idle-states to device tree")
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: "Jon Medhurst (Tixy)" <tixy@linaro.org>
> > Reviewed-by: Liviu Dudau <Liviu.Dudau@arm.com>
> > Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
>
> You missed to pick up this, I posted this along with vexpress config bus
> fix. Sorry for the confusion, I feel pull request are better/easier to
> track than single patches. I will send PR from next time if also prefer
> that. Let me know.
Ok, I've applied that to the 4.9-fixes branch. Thanks for double-checking.
Arnd
^ permalink raw reply
* [Linaro-acpi] [PATCH V1 1/2] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version
From: Bjorn Helgaas @ 2016-12-02 16:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161202104500.GE10776@rric.localdomain>
On Fri, Dec 02, 2016 at 11:45:00AM +0100, Robert Richter wrote:
> On 02.12.16 11:06:24, Tomasz Nowicki wrote:
> > On 02.12.2016 07:42, Duc Dang wrote:
>
> > >@@ -98,16 +98,16 @@ struct mcfg_fixup {
> > > { "CAVIUM", "THUNDERX", rev, seg, MCFG_BUS_ANY, \
> > > &pci_thunder_ecam_ops }
> > > /* SoC pass1.x */
> > >- THUNDER_PEM_QUIRK(2, 0), /* off-chip devices */
> > >- THUNDER_PEM_QUIRK(2, 1), /* off-chip devices */
> > >- THUNDER_ECAM_QUIRK(2, 0),
> > >- THUNDER_ECAM_QUIRK(2, 1),
> > >- THUNDER_ECAM_QUIRK(2, 2),
> > >- THUNDER_ECAM_QUIRK(2, 3),
> > >- THUNDER_ECAM_QUIRK(2, 10),
> > >- THUNDER_ECAM_QUIRK(2, 11),
> > >- THUNDER_ECAM_QUIRK(2, 12),
> > >- THUNDER_ECAM_QUIRK(2, 13),
> > >+ THUNDER_PEM_QUIRK(2, 0UL), /* off-chip devices */
> > >+ THUNDER_PEM_QUIRK(2, 1UL), /* off-chip devices */
> > >+ THUNDER_ECAM_QUIRK(2, 0UL),
> > >+ THUNDER_ECAM_QUIRK(2, 1UL),
> > >+ THUNDER_ECAM_QUIRK(2, 2UL),
> > >+ THUNDER_ECAM_QUIRK(2, 3UL),
> > >+ THUNDER_ECAM_QUIRK(2, 10UL),
> > >+ THUNDER_ECAM_QUIRK(2, 11UL),
> > >+ THUNDER_ECAM_QUIRK(2, 12UL),
> > >+ THUNDER_ECAM_QUIRK(2, 13UL),
> > >
> >
> > The UL suffix is needed for *THUNDER_PEM_QUIRK* only. THUNDER_ECAM_QUIRK is
> > fine.
>
> We should better make the type cast part of the macro.
>
> + this:
>
> ---
> #define THUNDER_MCFG_RES(addr, node) \
> DEFINE_RES_MEM(addr + (node << 44), 0x39 * SZ_16M)
> ---
>
> The args in the macro need parentheses.
Would you mind sending me a little incremental patch doing what you
want? I could try myself, but since I don't have an arm64 cross-build
setup, I'm working in the dark.
^ permalink raw reply
* ACPI namespace details for ARM64
From: Bjorn Helgaas @ 2016-12-02 16:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1d7424da-f9f8-68e3-5571-b9fc46f13a7f@redhat.com>
On Thu, Dec 01, 2016 at 11:52:00PM -0500, Jon Masters wrote:
> On 11/09/2016 05:05 PM, Bjorn Helgaas wrote:
> > The basic requirement is that the ACPI namespace should describe
> > *everything* that consumes address space unless there's another
> > standard way for the OS to find it [1, 2].
>
> ...and by the way, this was a key lesson for me, too. I had not
> fully internalized before that you don't just want to describe the
> ECAM region in the MCFG but you also need to ensure it's properly
> described in the ACPI namespace. Lots of good things learned.
I wish the ACPI spec contained explicit language to this effect, but
if it does, I haven't found it. There might be firmware people who
would disagree with it.
My rationale is that the OS may receive a device with no address
space assigned, and for the OS to safely assign space, it has to know
everything to avoid. The devil's advocate might argue that the OS
doesn't need full knowledge as long as firmware constrains every
device's _PRS to avoid the possibility of conflict. But that seems
like it would be impractical for non-trivial systems.
Bjorn
^ permalink raw reply
* [PATCH] usb: gadget: udc: atmel: used managed kasprintf
From: Alexandre Belloni @ 2016-12-02 16:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <063D6719AE5E284EB5DD2968C1650D6DB0232C0D@AcuExch.aculab.com>
On 02/12/2016 at 15:59:57 +0000, David Laight wrote :
> From: Alexandre Belloni
> > Sent: 01 December 2016 10:27
> > Use devm_kasprintf instead of simple kasprintf to free the allocated memory
> > when needed.
>
> s/when needed/when the device is freed/
>
> > Suggested-by: Peter Rosin <peda@axentia.se>
> > Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> > ---
> > drivers/usb/gadget/udc/atmel_usba_udc.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.c b/drivers/usb/gadget/udc/atmel_usba_udc.c
> > index 45bc997d0711..aec72fe8273c 100644
> > --- a/drivers/usb/gadget/udc/atmel_usba_udc.c
> > +++ b/drivers/usb/gadget/udc/atmel_usba_udc.c
> > @@ -1978,7 +1978,8 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
> > dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
> > goto err;
> > }
> > - ep->ep.name = kasprintf(GFP_KERNEL, "ep%d", ep->index);
> > + ep->ep.name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "ep%d",
> > + ep->index);
>
> Acually why bother mallocing such a small string at all.
> The maximum length is 12 bytes even if 'index' are unrestricted.
>
IIRC, using statically allocated string is failing somewhere is the USB
core but I don't remember all the details.
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* [RESEND PATCH V6 0/6] Add support for privileged mappings
From: Robin Murphy @ 2016-12-02 16:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480690509-13490-1-git-send-email-sricharan@codeaurora.org>
Hi Sricharan,
On 02/12/16 14:55, Sricharan R wrote:
> This series is a resend of the V5 that Mitch sent sometime back [2]
> All the patches are the same and i have just rebased. Not sure why this
> finally did not make it last time. The last patch in the previous
> series does not apply now [3], so just redid that. Also Copied the tags
> that he had from last time as well.
Heh, I was assuming this would be down to me to pick up. Vinod did have
some complaints last time about the commit message on the PL330 patch -
I did get as far as rewriting that and reworking onto my SMMU
changes[1], I just hadn't got round to sending it, so it fell onto the
"after the next merge window" pile.
I'd give some review comments, but they'd essentially be a diff against
that branch :)
Robin.
[1]:http://www.linux-arm.org/git?p=linux-rm.git;a=shortlog;h=refs/heads/mh/dma-priv
> The following patch to the ARM SMMU driver:
>
> commit d346180e70b91b3d5a1ae7e5603e65593d4622bc
> Author: Robin Murphy <robin.murphy@arm.com>
> Date: Tue Jan 26 18:06:34 2016 +0000
>
> iommu/arm-smmu: Treat all device transactions as unprivileged
>
> started forcing all SMMU transactions to come through as "unprivileged".
> The rationale given was that:
>
> (1) There is no way in the IOMMU API to even request privileged
> mappings.
>
> (2) It's difficult to implement a DMA mapper that correctly models the
> ARM VMSAv8 behavior of unprivileged-writeable =>
> privileged-execute-never.
>
> This series rectifies (1) by introducing an IOMMU API for privileged
> mappings and implements it in io-pgtable-arm.
>
> This series rectifies (2) by introducing a new dma attribute
> (DMA_ATTR_PRIVILEGED) for users of the DMA API that need privileged
> mappings which are inaccessible to lesser-privileged execution levels, and
> implements it in the arm64 IOMMU DMA mapper. The one known user (pl330.c)
> is converted over to the new attribute.
>
> Jordan and Jeremy can provide more info on the use case if needed, but the
> high level is that it's a security feature to prevent attacks such as [1].
>
> [1] https://github.com/robclark/kilroy
> [2] https://lkml.org/lkml/2016/7/27/590
> [3] https://patchwork.kernel.org/patch/9250493/
>
> Changelog:
>
> v5..v6
> - Rebased all the patches and redid 6/6 as it does not apply in
> this code base.
>
> v4..v5
>
> - Simplified patch 4/6 (suggested by Robin Murphy).
>
> v3..v4
>
> - Rebased and reworked on linux next due to the dma attrs rework going
> on over there. Patches changed: 3/6, 4/6, and 5/6.
>
> v2..v3
>
> - Incorporated feedback from Robin:
> * Various comments and re-wordings.
> * Use existing bit definitions for IOMMU_PRIV implementation
> in io-pgtable-arm.
> * Renamed and redocumented dma_direction_to_prot.
> * Don't worry about executability in new DMA attr.
>
> v1..v2
>
> - Added a new DMA attribute to make executable privileged mappings
> work, and use that in the pl330 driver (suggested by Will).
>
> Jeremy Gebben (1):
> iommu/io-pgtable-arm: add support for the IOMMU_PRIV flag
>
> Mitchel Humpherys (4):
> iommu: add IOMMU_PRIV attribute
> common: DMA-mapping: add DMA_ATTR_PRIVILEGED attribute
> arm64/dma-mapping: Implement DMA_ATTR_PRIVILEGED
> dmaengine: pl330: Make sure microcode is privileged
>
> Sricharan R (1):
> iommu/arm-smmu: Set privileged attribute to 'default' instead of
> 'unprivileged'
>
> Documentation/DMA-attributes.txt | 10 ++++++++++
> arch/arm64/mm/dma-mapping.c | 6 +++---
> drivers/dma/pl330.c | 6 ++++--
> drivers/iommu/arm-smmu.c | 2 +-
> drivers/iommu/dma-iommu.c | 10 ++++++++--
> drivers/iommu/io-pgtable-arm.c | 5 ++++-
> include/linux/dma-iommu.h | 3 ++-
> include/linux/dma-mapping.h | 7 +++++++
> include/linux/iommu.h | 1 +
> 9 files changed, 40 insertions(+), 10 deletions(-)
>
^ permalink raw reply
* [PATCH] imx_v6_v7_defconfig: enable SPIDEV module
From: Gary Bisson @ 2016-12-02 16:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CABxcv=nSUfDT-bqHBm2e0XY55Qp4nH+66PriMqnix2RTsN0BNQ@mail.gmail.com>
Hi Javier,
Thanks for the quick feedback on the matter.
On Fri, Dec 02, 2016 at 12:44:42PM -0300, Javier Martinez Canillas wrote:
> Hello Gary,
>
> On Fri, Dec 2, 2016 at 12:27 PM, Gary Bisson
> <gary.bisson@boundarydevices.com> wrote:
> > Hi Fabio,
> >
> > On Fri, Dec 02, 2016 at 01:18:42PM -0200, Fabio Estevam wrote:
> >> Hi Gary,
> >>
> >> On Fri, Dec 2, 2016 at 12:56 PM, Gary Bisson
> >> <gary.bisson@boundarydevices.com> wrote:
> >> > Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
> >> > ---
> >> > Hi,
> >> >
> >> > Seems that this configuration is missing, especially since many
> >> > device trees are already using "spidev" nodes.
> >>
>
> This seems to have been added just because people weren't looking that
> closer to DT patches at the beginning, but now is forbidden. That's
> why the kernel now warns about it.
>
> >> Then they will trigger the following warning below (from the spidev
> >> probe function):
> >>
> >> /*
> >> * spidev should never be referenced in DT without a specific
> >> * compatible string, it is a Linux implementation thing
> >> * rather than a description of the hardware.
> >> */
> >> if (spi->dev.of_node && !of_match_device(spidev_dt_ids, &spi->dev)) {
> >> dev_err(&spi->dev, "buggy DT: spidev listed directly in DT\n");
> >> WARN_ON(spi->dev.of_node &&
> >> !of_match_device(spidev_dt_ids, &spi->dev));
> >> }
> >
> > Yes I've seen this WARN_ON when doing the dt-overlay testing. But is
> > disabling the SPIDEV configuration a solution?
> >
> > To be honest I disagree with that WARN_ON. Ok it means that the hardware
> > isn't fully described in the device tree but for development platforms
> > (such as ours or any rpi-like boards) the user can design his own
> > daugher board with whatever SPI device on it. Then using the spidev
> > interface is very convenient, so I don't understand what we are trying
> > to forbid here.
> >
>
> AFAICT, what we are trying to forbid is to have a Linux implementation
> detail to creep into a Device Tree.
>
> It's OK to use the spidev interface but that's orthogonal on how the
> device is instantiated from the DT. If you want to do that, the
> correct approach is AFAIU to add a OF device ID entry in
> drivers/spi/spidev.c and use that compatible string in your DT.
I understand that the device tree isn't supposed to describe such
generic "spidev" concept.
And that argument to me is ok for final products where the hardware is
fully defined. However I still believe that for development platforms
this cannot be applied. My customers want to use the SPI bus to connect
any device they want, and most of those customers don't want to mess
with the kernel. For them, having a spidev node, just like it exists for
i2cdev nodes, is ideal.
> That way, the DT will describe the hardware instead of just a "spidev"
> but you could use the spidev interface to access your SPI device.
But then aren't you afraid that the person will use the first compatible
that shows up (let's say "rohm,dh2228fv") and use it for all his spidev?
In that case the driver is happy although the fact remains that any hw
will be plugged behind. Or at the opposite, if everybody that uses
spidev adds its own compatible I'm not sure it will benefit the drive
code.
Anyway, I appreciate your feedback.
Regards,
Gary
^ permalink raw reply
* [PATCH v2 2/3] ARM: dts: sunxi: add support for Orange Pi Zero board
From: Andre Przywara @ 2016-12-02 16:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <11535601480689127@web2g.yandex.ru>
Hi,
On 02/12/16 14:32, Icenowy Zheng wrote:
>
>
> 02.12.2016, 22:30, "Hans de Goede" <hdegoede@redhat.com>:
>> Hi,
>>
>> On 02-12-16 15:22, Icenowy Zheng wrote:
>>> 01.12.2016, 17:36, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
>>>> On Mon, Nov 28, 2016 at 12:29:07AM +0000, Andr? Przywara wrote:
>>>>> > Something more interesting happened.
>>>>> >
>>>>> > Xunlong made a add-on board for Orange Pi Zero, which exposes the
>>>>> > two USB Controllers exported at expansion bus as USB Type-A
>>>>> > connectors.
>>>>> >
>>>>> > Also it exposes a analog A/V jack and a microphone.
>>>>> >
>>>>> > Should I enable {e,o}hci{2.3} in the device tree?
>>>>>
>>>>> Actually we should do this regardless of this extension board. The USB
>>>>> pins are not multiplexed and are exposed on user accessible pins (just
>>>>> not soldered, but that's a detail), so I think they qualify for DT
>>>>> enablement. And even if a user can't use them, it doesn't hurt to have
>>>>> them (since they are not multiplexed).
>>>>
>>>> My main concern about this is that we'll leave regulators enabled by
>>>> default, for a minority of users. And that minority will prevent to do
>>>> a proper power management when the times come since we'll have to keep
>>>> that behaviour forever.
>>>
>>> I think these users can add a 'fdt set /xxx/xxx status "disabled" ' .
>>
>> I don't think that will be necessary I'm pretty sure these extra usb
>> ports do not have a regulator for the Vbus, they just hook directly
>> to the 5V rail, can someone with a schematic check ?
>
> We seems to have still no schematics for the add-on board.
>From looking at the picture of that expansion board on the Aliexpress
page and chasing the tracks, there is clearly no voltage regulator on
there, it's just passive components. The 5V pin from the headers is
routed forth and back between the two layers via some vias directly to
the 5V pins of the USB sockets.
> But something is sure is that there's no any regulator-related pins
> on the add-on pinout. There's only USB DM and DP pins.
>
> So the Vbus must be directly connected to +5V.
So yes, it is.
But I think the question is moot anyways, since we don't provide DT
support for that add-on board at that point anyways.
One could imagine another board, though, which has regulators switched
by GPIOs, but that would be their problem and they would have regulators
specified in their specific DT snippet, then.
So to summarize:
- For that specific Orange Pi Zero board which we discuss the DT for
there is no regulator support for the additional USB ports. Thus nothing
we could turn off to save power.
- A user could just take these USB brackets with pin headers that are so
common in PCs to connect additional USB ports to the back of the box.
One just needs to re-sort the pins, which is a matter of a minute.
- As long as we don't provide any easy way of handling DT changes, we
should enable the USB ports for the sake of the users of either those
brackets or the expansion board. Any more sophisticated USB expansion
board with regulators would need to amend the DT anyway.
Does that make sense?
Cheers,
Andre.
^ permalink raw reply
* [PATCH] imx_v6_v7_defconfig: enable SPIDEV module
From: Fabio Estevam @ 2016-12-02 16:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CABxcv=myE8V2+=ZT6CJR_ZVVDy7aOLL6D10PADAqDz5XMjeoww@mail.gmail.com>
On Fri, Dec 2, 2016 at 1:50 PM, Javier Martinez Canillas
<javier@dowhile0.org> wrote:
> I guess I didn't make clear on my previous email, but I'm not against
> $SUBJECT. I think that the platforms that currently have nodes using
> "spidev" as compatible need to be cleaned up, and so I find it
> valuable to have this option enabled so people are aware of the issue.
Yes, agreed.
^ permalink raw reply
* [PATCH] usb: gadget: udc: atmel: used managed kasprintf
From: David Laight @ 2016-12-02 15:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161201102656.29041-1-alexandre.belloni@free-electrons.com>
From: Alexandre Belloni
> Sent: 01 December 2016 10:27
> Use devm_kasprintf instead of simple kasprintf to free the allocated memory
> when needed.
s/when needed/when the device is freed/
> Suggested-by: Peter Rosin <peda@axentia.se>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
> drivers/usb/gadget/udc/atmel_usba_udc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.c b/drivers/usb/gadget/udc/atmel_usba_udc.c
> index 45bc997d0711..aec72fe8273c 100644
> --- a/drivers/usb/gadget/udc/atmel_usba_udc.c
> +++ b/drivers/usb/gadget/udc/atmel_usba_udc.c
> @@ -1978,7 +1978,8 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
> dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
> goto err;
> }
> - ep->ep.name = kasprintf(GFP_KERNEL, "ep%d", ep->index);
> + ep->ep.name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "ep%d",
> + ep->index);
Acually why bother mallocing such a small string at all.
The maximum length is 12 bytes even if 'index' are unrestricted.
David
^ permalink raw reply
* [PATCH 2/2] arm64: PMU: Reset PMSELR_EL0 to a sane value at boot time
From: Marc Zyngier @ 2016-12-02 15:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480693859-27249-1-git-send-email-marc.zyngier@arm.com>
In order to avoid any ugly surprise, let's reset PMSELR_EL0 to the
first valid value (avoiding the cycle counter which has been proven
to be troublesome) at CPU boot time. This ensures that no guest will
be faced with some odd value which it cannot modify (due to
MDCR_EL2.TPM being set).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm64/kernel/perf_event.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index a65b757..42d1840 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -910,6 +910,14 @@ static void armv8pmu_reset(void *info)
*/
armv8pmu_pmcr_write(ARMV8_PMU_PMCR_P | ARMV8_PMU_PMCR_C |
ARMV8_PMU_PMCR_LC);
+
+ /*
+ * If we have at least one available counter, reset to that
+ * one so that no illegal value is left in PMSELR_EL0, which
+ * could have an impact on a guest.
+ */
+ if (armv8pmu_counter_valid(cpu_pmu, ARMV8_IDX_COUNTER0))
+ armv8pmu_select_counter(ARMV8_IDX_COUNTER0);
}
static int armv8_pmuv3_map_event(struct perf_event *event)
--
2.1.4
^ permalink raw reply related
* [PATCH 1/2] arm64: PMU: Do not use PMSELR_EL0 to access PMCCFILTR_EL0
From: Marc Zyngier @ 2016-12-02 15:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480693859-27249-1-git-send-email-marc.zyngier@arm.com>
The ARMv8 architecture allows the cycle counter to be configured
by setting PMSELR_EL0.SEL==0x1f and then accessing PMXEVTYPER_EL0,
hence accessing PMCCFILTR_EL0. But it disallows the use of
PMSELR_EL0.SEL==0x1f to access the cycle counter itself through
PMXEVCNTR_EL0.
Linux itself doesn't violate this rule, but we may end up with
PMSELR_EL0.SEL being set to 0x1f when we enter a guest. If that
guest accesses PMXEVCNTR_EL0, the access may UNDEF at EL1,
despite the guest not having done anything wrong.
In order to avoid this unfortunate course of events (haha!), let's
apply the same method armv8pmu_write_counter and co are using,
explicitely checking for the cycle counter and writing to
PMCCFILTR_EL0 directly. This prevents writing 0x1f to PMSELR_EL0,
and saves a Linux guest an extra trap.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm64/kernel/perf_event.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 57ae9d9..a65b757 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -632,7 +632,10 @@ static inline void armv8pmu_write_counter(struct perf_event *event, u32 value)
static inline void armv8pmu_write_evtype(int idx, u32 val)
{
- if (armv8pmu_select_counter(idx) == idx) {
+ if (idx == ARMV8_IDX_CYCLE_COUNTER) {
+ val &= ARMV8_PMU_EVTYPE_MASK & ~ARMV8_PMU_EVTYPE_EVENT;
+ write_sysreg(val, pmccfiltr_el0);
+ } else if (armv8pmu_select_counter(idx) == idx) {
val &= ARMV8_PMU_EVTYPE_MASK;
write_sysreg(val, pmxevtyper_el0);
}
--
2.1.4
^ permalink raw reply related
* [PATCH 0/2] arm64: PMU: Sanitize usage of PMSELR_EL0.SEL
From: Marc Zyngier @ 2016-12-02 15:50 UTC (permalink / raw)
To: linux-arm-kernel
An ugly interaction between the use of PMSELR_EL0 in a host kernel and
the use of PMXEVCNTR_EL0 in a guest has recently come to light [1],
leading to the guest taking an UNDEF exception in EL1 when using the
PMU.
The fix is pretty simple ("don't do that!"), making the PMU useable on
X-Gene, which seems to have a stricter (but nonetheless valid)
interpretation of the architecture.
Patches against 4.9-rc6.
[1] https://lists.cs.columbia.edu/pipermail/kvmarm/2016-November/022545.html
Marc Zyngier (2):
arm64: PMU: Do not use PMSELR_EL0 to access PMCCFILTR_EL0
arm64: PMU: Reset PMSELR_EL0 to a sane value at boot time
arch/arm64/kernel/perf_event.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
--
2.1.4
^ permalink raw reply
* [PATCH] imx_v6_v7_defconfig: enable SPIDEV module
From: Javier Martinez Canillas @ 2016-12-02 15:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CABxcv=nSUfDT-bqHBm2e0XY55Qp4nH+66PriMqnix2RTsN0BNQ@mail.gmail.com>
Hello Gary,
On Fri, Dec 2, 2016 at 12:44 PM, Javier Martinez Canillas
<javier@dowhile0.org> wrote:
[snip]
>
> This seems to have been added just because people weren't looking that
> closer to DT patches at the beginning, but now is forbidden. That's
> why the kernel now warns about it.
>
>>> Then they will trigger the following warning below (from the spidev
>>> probe function):
>>>
I guess I didn't make clear on my previous email, but I'm not against
$SUBJECT. I think that the platforms that currently have nodes using
"spidev" as compatible need to be cleaned up, and so I find it
valuable to have this option enabled so people are aware of the issue.
Best regards,
Javier
^ permalink raw reply
* [PATCH] imx_v6_v7_defconfig: enable SPIDEV module
From: Javier Martinez Canillas @ 2016-12-02 15:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161202152718.o4xv2ru5r7xw7t5e@t450s.lan>
Hello Gary,
On Fri, Dec 2, 2016 at 12:27 PM, Gary Bisson
<gary.bisson@boundarydevices.com> wrote:
> Hi Fabio,
>
> On Fri, Dec 02, 2016 at 01:18:42PM -0200, Fabio Estevam wrote:
>> Hi Gary,
>>
>> On Fri, Dec 2, 2016 at 12:56 PM, Gary Bisson
>> <gary.bisson@boundarydevices.com> wrote:
>> > Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
>> > ---
>> > Hi,
>> >
>> > Seems that this configuration is missing, especially since many
>> > device trees are already using "spidev" nodes.
>>
This seems to have been added just because people weren't looking that
closer to DT patches at the beginning, but now is forbidden. That's
why the kernel now warns about it.
>> Then they will trigger the following warning below (from the spidev
>> probe function):
>>
>> /*
>> * spidev should never be referenced in DT without a specific
>> * compatible string, it is a Linux implementation thing
>> * rather than a description of the hardware.
>> */
>> if (spi->dev.of_node && !of_match_device(spidev_dt_ids, &spi->dev)) {
>> dev_err(&spi->dev, "buggy DT: spidev listed directly in DT\n");
>> WARN_ON(spi->dev.of_node &&
>> !of_match_device(spidev_dt_ids, &spi->dev));
>> }
>
> Yes I've seen this WARN_ON when doing the dt-overlay testing. But is
> disabling the SPIDEV configuration a solution?
>
> To be honest I disagree with that WARN_ON. Ok it means that the hardware
> isn't fully described in the device tree but for development platforms
> (such as ours or any rpi-like boards) the user can design his own
> daugher board with whatever SPI device on it. Then using the spidev
> interface is very convenient, so I don't understand what we are trying
> to forbid here.
>
AFAICT, what we are trying to forbid is to have a Linux implementation
detail to creep into a Device Tree.
It's OK to use the spidev interface but that's orthogonal on how the
device is instantiated from the DT. If you want to do that, the
correct approach is AFAIU to add a OF device ID entry in
drivers/spi/spidev.c and use that compatible string in your DT.
That way, the DT will describe the hardware instead of just a "spidev"
but you could use the spidev interface to access your SPI device.
> Regards,
> Gary
>
Best regards,
Javier
^ permalink raw reply
* [PATCH v2 3/3] ARM: da850: fix da850_set_pll0rate()
From: Bartosz Golaszewski @ 2016-12-02 15:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480693134-31324-1-git-send-email-bgolaszewski@baylibre.com>
This function is broken - its second argument is an index to the freq
table, not the requested clock rate in Hz. It leads to an oops when
called from clk_set_rate() since this argument isn't bounds checked
either.
Fix it by iterating over the array of supported frequencies and
selecting a one that matches or returning -EINVAL for unsupported
rates.
Also: update the davinci cpufreq driver. It's the only user of this
clock and currently it passes the cpufreq table index to
clk_set_rate(), which is confusing. Make it pass the requested clock
rate in Hz.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da850.c | 22 ++++++++++++++++++----
drivers/cpufreq/davinci-cpufreq.c | 2 +-
2 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index a55101c..92e3303 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1179,14 +1179,28 @@ static int da850_set_armrate(struct clk *clk, unsigned long index)
return clk_set_rate(pllclk, index);
}
-static int da850_set_pll0rate(struct clk *clk, unsigned long index)
+static int da850_set_pll0rate(struct clk *clk, unsigned long rate)
{
- unsigned int prediv, mult, postdiv;
- struct da850_opp *opp;
struct pll_data *pll = clk->pll_data;
+ struct cpufreq_frequency_table *freq;
+ unsigned int prediv, mult, postdiv;
+ struct da850_opp *opp = NULL;
int ret;
- opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;
+ for (freq = da850_freq_table;
+ freq->frequency != CPUFREQ_TABLE_END; freq++) {
+ /* requested_rate is in Hz, freq->frequency is in KHz */
+ unsigned long freq_rate = freq->frequency * 1000;
+
+ if (freq_rate == rate) {
+ opp = (struct da850_opp *)freq->driver_data;
+ break;
+ }
+ }
+
+ if (opp == NULL)
+ return -EINVAL;
+
prediv = opp->prediv;
mult = opp->mult;
postdiv = opp->postdiv;
diff --git a/drivers/cpufreq/davinci-cpufreq.c b/drivers/cpufreq/davinci-cpufreq.c
index b95a872..d54a27c 100644
--- a/drivers/cpufreq/davinci-cpufreq.c
+++ b/drivers/cpufreq/davinci-cpufreq.c
@@ -55,7 +55,7 @@ static int davinci_target(struct cpufreq_policy *policy, unsigned int idx)
return ret;
}
- ret = clk_set_rate(armclk, idx);
+ ret = clk_set_rate(armclk, new_freq * 1000);
if (ret)
return ret;
--
2.9.3
^ permalink raw reply related
* [PATCH v2 2/3] ARM: da850: coding style fix
From: Bartosz Golaszewski @ 2016-12-02 15:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480693134-31324-1-git-send-email-bgolaszewski@baylibre.com>
Fix alignment of the clock lookup table entries.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da850.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 1fcc986..a55101c 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -548,7 +548,7 @@ static struct clk_lookup da850_clks[] = {
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
CLK("vpif", NULL, &vpif_clk),
- CLK("ahci_da850", NULL, &sata_clk),
+ CLK("ahci_da850", NULL, &sata_clk),
CLK("davinci-rproc.0", NULL, &dsp_clk),
CLK(NULL, NULL, &ehrpwm_clk),
CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
--
2.9.3
^ permalink raw reply related
* [PATCH v2 1/3] ARM: da850: fix infinite loop in clk_set_rate()
From: Bartosz Golaszewski @ 2016-12-02 15:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480693134-31324-1-git-send-email-bgolaszewski@baylibre.com>
The aemif clock is added twice to the lookup table in da850.c. This
breaks the children list of pll0_sysclk3 as we're using the same list
links in struct clk. When calling clk_set_rate(), we get stuck in
propagate_rate().
Create a separate clock for nand, inheriting the rate of the aemif
clock and retrieve it in the davinci_nand module.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da850.c | 7 ++++++-
drivers/mtd/nand/davinci_nand.c | 2 +-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index e770c97..1fcc986 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -367,6 +367,11 @@ static struct clk aemif_clk = {
.flags = ALWAYS_ENABLED,
};
+static struct clk nand_clk = {
+ .name = "nand",
+ .parent = &aemif_clk,
+};
+
static struct clk usb11_clk = {
.name = "usb11",
.parent = &pll0_sysclk4,
@@ -537,7 +542,7 @@ static struct clk_lookup da850_clks[] = {
CLK("da830-mmc.0", NULL, &mmcsd0_clk),
CLK("da830-mmc.1", NULL, &mmcsd1_clk),
CLK("ti-aemif", NULL, &aemif_clk),
- CLK(NULL, "aemif", &aemif_clk),
+ CLK(NULL, "nand", &nand_clk),
CLK("ohci-da8xx", "usb11", &usb11_clk),
CLK("musb-da8xx", "usb20", &usb20_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 27fa8b8..5857d06 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -694,7 +694,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
ret = -EINVAL;
- info->clk = devm_clk_get(&pdev->dev, "aemif");
+ info->clk = devm_clk_get(&pdev->dev, "nand");
if (IS_ERR(info->clk)) {
ret = PTR_ERR(info->clk);
dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret);
--
2.9.3
^ permalink raw reply related
* [PATCH v2 0/3] ARM: da850: fix pll0 rate setting
From: Bartosz Golaszewski @ 2016-12-02 15:38 UTC (permalink / raw)
To: linux-arm-kernel
While trying to set the pll0 rate from the kernel I noticed there are
two issues with da850 clocks. The first patch fixes an infinite loop
in propagate_rate(). The third fixes an oops in da850_set_pll0rate().
The second patch is just a coding style fix, while we're at it.
v1 -> v2:
- change the approach in 1/3: create a new clock for nand inheriting
the rate from the aemif clock (verified that nand still works on
da850-lcdk)
- patch 3/3: also update the davinci_cpufreq driver - the only
(indirect) user of da850_set_pll0rate()
- s/requested_rate/rate in 3/3
Bartosz Golaszewski (3):
ARM: da850: fix infinite loop in clk_set_rate()
ARM: da850: coding style fix
ARM: da850: fix da850_set_pll0rate()
arch/arm/mach-davinci/da850.c | 31 +++++++++++++++++++++++++------
drivers/cpufreq/davinci-cpufreq.c | 2 +-
drivers/mtd/nand/davinci_nand.c | 2 +-
3 files changed, 27 insertions(+), 8 deletions(-)
--
2.9.3
^ permalink raw reply
* [PATCH v9 07/16] drivers: acpi: implement acpi_dma_configure
From: Lorenzo Pieralisi @ 2016-12-02 15:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161121100148.24769-8-lorenzo.pieralisi@arm.com>
Rafael, Mark, Suravee,
On Mon, Nov 21, 2016 at 10:01:39AM +0000, Lorenzo Pieralisi wrote:
> On DT based systems, the of_dma_configure() API implements DMA
> configuration for a given device. On ACPI systems an API equivalent to
> of_dma_configure() is missing which implies that it is currently not
> possible to set-up DMA operations for devices through the ACPI generic
> kernel layer.
>
> This patch fills the gap by introducing acpi_dma_configure/deconfigure()
> calls that for now are just wrappers around arch_setup_dma_ops() and
> arch_teardown_dma_ops() and also updates ACPI and PCI core code to use
> the newly introduced acpi_dma_configure/acpi_dma_deconfigure functions.
>
> Since acpi_dma_configure() is used to configure DMA operations, the
> function initializes the dma/coherent_dma masks to sane default values
> if the current masks are uninitialized (also to keep the default values
> consistent with DT systems) to make sure the device has a complete
> default DMA set-up.
I spotted a niggle that unfortunately was hard to spot (and should not
be a problem per se but better safe than sorry) and I am not comfortable
with it.
Following commit d0562674838c ("ACPI / scan: Parse _CCA and setup
device coherency") in acpi_bind_one() we check if the acpi_device
associated with a device just added supports DMA, first it was
done with acpi_check_dma() and then commit 1831eff876bd ("device
property: ACPI: Make use of the new DMA Attribute APIs") changed
it to acpi_get_dma_attr().
The subsequent check (attr != DEV_DMA_NOT_SUPPORTED) is always true
on _any_ acpi device we pass to acpi_bind_one() on x86, which was
fine because we used it to call arch_setup_dma_ops(), which is a nop
on x86. On ARM64 a _CCA method is required to define if a device
supports DMA so (attr != DEV_DMA_NOT_SUPPORTED) may well be false.
Now, acpi_bind_one() is used to bind an acpi_device to its physical
node also for pseudo-devices like cpus and memory nodes. For those
objects, on x86, attr will always be != DEV_DMA_NOT_SUPPORTED.
So far so good, because on x86 arch_setup_dma_ops() is empty code.
With this patch, I use the (attr != DEV_DMA_NOT_SUPPORTED) check
to call acpi_dma_configure() which is basically a nop on x86 except
that it sets up the dma_mask/coherent_dma_mask to a sane default value
(after all we are setting up DMA for the device so it makes sense to
initialize the masks there if they were unset since we are configuring
DMA for the device in question) for the given device.
Problem is, as per the explanation above, we are also setting the
default dma masks for pseudo-devices (eg CPUs) that were previously
untouched, it should not be a problem per-se but I am not comfortable
with that, honestly it does not make much sense.
An easy "fix" would be to move the default dma masks initialization out
of acpi_dma_configure() (as it was in previous patch versions of this
series - I moved it to acpi_dma_configure() just a consolidation point
for initializing the masks instead of scattering them in every
acpi_dma_configure caller) I can send this as a fix-up patch to Joerg if
we think that's the right thing to do (or I can send it to Rafael later
when the code is in the merged depending on the timing) just let me
know please.
Thanks !
Lorenzo
> The DMA range size passed to arch_setup_dma_ops() is sized according
> to the device coherent_dma_mask (starting at address 0x0), mirroring the
> DT probing path behaviour when a dma-ranges property is not provided
> for the device being probed; this changes the current arch_setup_dma_ops()
> call parameters in the ACPI probing case, but since arch_setup_dma_ops()
> is a NOP on all architectures but ARM/ARM64 this patch does not change
> the current kernel behaviour on them.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com> [pci]
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
> Tested-by: Hanjun Guo <hanjun.guo@linaro.org>
> Tested-by: Tomasz Nowicki <tn@semihalf.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Robin Murphy <robin.murphy@arm.com>
> Cc: Tomasz Nowicki <tn@semihalf.com>
> Cc: Joerg Roedel <joro@8bytes.org>
> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
> ---
> drivers/acpi/glue.c | 4 ++--
> drivers/acpi/scan.c | 40 ++++++++++++++++++++++++++++++++++++++++
> drivers/pci/probe.c | 3 +--
> include/acpi/acpi_bus.h | 2 ++
> include/linux/acpi.h | 5 +++++
> 5 files changed, 50 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c
> index 5ea5dc2..f8d6564 100644
> --- a/drivers/acpi/glue.c
> +++ b/drivers/acpi/glue.c
> @@ -227,8 +227,7 @@ int acpi_bind_one(struct device *dev, struct acpi_device *acpi_dev)
>
> attr = acpi_get_dma_attr(acpi_dev);
> if (attr != DEV_DMA_NOT_SUPPORTED)
> - arch_setup_dma_ops(dev, 0, 0, NULL,
> - attr == DEV_DMA_COHERENT);
> + acpi_dma_configure(dev, attr);
>
> acpi_physnode_link_name(physical_node_name, node_id);
> retval = sysfs_create_link(&acpi_dev->dev.kobj, &dev->kobj,
> @@ -251,6 +250,7 @@ int acpi_bind_one(struct device *dev, struct acpi_device *acpi_dev)
> return 0;
>
> err:
> + acpi_dma_deconfigure(dev);
> ACPI_COMPANION_SET(dev, NULL);
> put_device(dev);
> put_device(&acpi_dev->dev);
> diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
> index 3d1856f..45b5710 100644
> --- a/drivers/acpi/scan.c
> +++ b/drivers/acpi/scan.c
> @@ -1370,6 +1370,46 @@ enum dev_dma_attr acpi_get_dma_attr(struct acpi_device *adev)
> return DEV_DMA_NON_COHERENT;
> }
>
> +/**
> + * acpi_dma_configure - Set-up DMA configuration for the device.
> + * @dev: The pointer to the device
> + * @attr: device dma attributes
> + */
> +void acpi_dma_configure(struct device *dev, enum dev_dma_attr attr)
> +{
> + /*
> + * Set default coherent_dma_mask to 32 bit. Drivers are expected to
> + * setup the correct supported mask.
> + */
> + if (!dev->coherent_dma_mask)
> + dev->coherent_dma_mask = DMA_BIT_MASK(32);
> +
> + /*
> + * Set it to coherent_dma_mask by default if the architecture
> + * code has not set it.
> + */
> + if (!dev->dma_mask)
> + dev->dma_mask = &dev->coherent_dma_mask;
> +
> + /*
> + * Assume dma valid range starts at 0 and covers the whole
> + * coherent_dma_mask.
> + */
> + arch_setup_dma_ops(dev, 0, dev->coherent_dma_mask + 1, NULL,
> + attr == DEV_DMA_COHERENT);
> +}
> +EXPORT_SYMBOL_GPL(acpi_dma_configure);
> +
> +/**
> + * acpi_dma_deconfigure - Tear-down DMA configuration for the device.
> + * @dev: The pointer to the device
> + */
> +void acpi_dma_deconfigure(struct device *dev)
> +{
> + arch_teardown_dma_ops(dev);
> +}
> +EXPORT_SYMBOL_GPL(acpi_dma_deconfigure);
> +
> static void acpi_init_coherency(struct acpi_device *adev)
> {
> unsigned long long cca = 0;
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index ab00267..c29e07a 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -1738,8 +1738,7 @@ static void pci_dma_configure(struct pci_dev *dev)
> if (attr == DEV_DMA_NOT_SUPPORTED)
> dev_warn(&dev->dev, "DMA not supported.\n");
> else
> - arch_setup_dma_ops(&dev->dev, 0, 0, NULL,
> - attr == DEV_DMA_COHERENT);
> + acpi_dma_configure(&dev->dev, attr);
> }
>
> pci_put_host_bridge_device(bridge);
> diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h
> index c1a524d..4242c31 100644
> --- a/include/acpi/acpi_bus.h
> +++ b/include/acpi/acpi_bus.h
> @@ -573,6 +573,8 @@ struct acpi_pci_root {
>
> bool acpi_dma_supported(struct acpi_device *adev);
> enum dev_dma_attr acpi_get_dma_attr(struct acpi_device *adev);
> +void acpi_dma_configure(struct device *dev, enum dev_dma_attr attr);
> +void acpi_dma_deconfigure(struct device *dev);
>
> struct acpi_device *acpi_find_child_device(struct acpi_device *parent,
> u64 address, bool check_children);
> diff --git a/include/linux/acpi.h b/include/linux/acpi.h
> index 996a29c..8d15fc5 100644
> --- a/include/linux/acpi.h
> +++ b/include/linux/acpi.h
> @@ -765,6 +765,11 @@ static inline enum dev_dma_attr acpi_get_dma_attr(struct acpi_device *adev)
> return DEV_DMA_NOT_SUPPORTED;
> }
>
> +static inline void acpi_dma_configure(struct device *dev,
> + enum dev_dma_attr attr) { }
> +
> +static inline void acpi_dma_deconfigure(struct device *dev) { }
> +
> #define ACPI_PTR(_ptr) (NULL)
>
> static inline void acpi_device_set_enumerated(struct acpi_device *adev)
> --
> 2.10.0
>
^ permalink raw reply
* [PATCH] imx_v6_v7_defconfig: enable SPIDEV module
From: Gary Bisson @ 2016-12-02 15:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOMZO5C8OH6obRn_8zh5HA9zoanRXUpoqk=vEBx+fW3wraNS6Q@mail.gmail.com>
Hi Fabio,
On Fri, Dec 02, 2016 at 01:18:42PM -0200, Fabio Estevam wrote:
> Hi Gary,
>
> On Fri, Dec 2, 2016 at 12:56 PM, Gary Bisson
> <gary.bisson@boundarydevices.com> wrote:
> > Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
> > ---
> > Hi,
> >
> > Seems that this configuration is missing, especially since many
> > device trees are already using "spidev" nodes.
>
> Then they will trigger the following warning below (from the spidev
> probe function):
>
> /*
> * spidev should never be referenced in DT without a specific
> * compatible string, it is a Linux implementation thing
> * rather than a description of the hardware.
> */
> if (spi->dev.of_node && !of_match_device(spidev_dt_ids, &spi->dev)) {
> dev_err(&spi->dev, "buggy DT: spidev listed directly in DT\n");
> WARN_ON(spi->dev.of_node &&
> !of_match_device(spidev_dt_ids, &spi->dev));
> }
Yes I've seen this WARN_ON when doing the dt-overlay testing. But is
disabling the SPIDEV configuration a solution?
To be honest I disagree with that WARN_ON. Ok it means that the hardware
isn't fully described in the device tree but for development platforms
(such as ours or any rpi-like boards) the user can design his own
daugher board with whatever SPI device on it. Then using the spidev
interface is very convenient, so I don't understand what we are trying
to forbid here.
Regards,
Gary
^ permalink raw reply
* [PATCH 2/2] arm: dts: sun8i: reuse the uart1 node of iNet D978 rev2 board
From: Icenowy Zheng @ 2016-12-02 15:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161202151913.38892-1-icenowy@aosc.xyz>
As a uart1 node is added into sun8i-reference-design-tablet.dtsi, simply
use it in iNet D978 rev2 device tree.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
index fb46655..7335461 100644
--- a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
+++ b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
@@ -49,15 +49,6 @@
model = "INet-D978 Rev 02";
compatible = "primux,inet-d978-rev2", "allwinner,sun8i-a33";
- aliases {
- serial0 = &uart1;
- };
-
- chosen {
- /* Delete debug UART as serial0 is the UART for bluetooth */
- /delete-property/stdout-path;
- };
-
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -96,13 +87,6 @@
};
};
-&r_uart {
- status = "disabled";
-};
-
&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_pins_a>,
- <&uart1_pins_cts_rts_a>;
status = "okay";
};
--
2.10.2
^ permalink raw reply related
* [PATCH 1/2] arm: dts: sun8i: add uart1 node to reference design tablet
From: Icenowy Zheng @ 2016-12-02 15:19 UTC (permalink / raw)
To: linux-arm-kernel
In the A23/A33 tablet reference design, the UART1 at PG is used to
connect to the UART-connected bluetooth.
Add a disabled uart1 node for it in the reference design tablet dtsi,
contains the pinctrl info.
If a tablet uses the UART bluetooth, simply set the status of this node
to "okay".
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
index 08cd001..2d9cf0d 100644
--- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
@@ -46,6 +46,7 @@
/ {
aliases {
serial0 = &r_uart;
+ serial1 = &uart1;
};
backlight: backlight {
@@ -223,6 +224,13 @@
vcc-lcd-supply = <®_dc1sw>;
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins_a>,
+ <&uart1_pins_cts_rts_a>;
+ status = "disabled";
+};
+
&usb_otg {
dr_mode = "otg";
status = "okay";
--
2.10.2
^ permalink raw reply related
* [PATCH] imx_v6_v7_defconfig: enable SPIDEV module
From: Fabio Estevam @ 2016-12-02 15:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161202145631.19292-1-gary.bisson@boundarydevices.com>
Hi Gary,
On Fri, Dec 2, 2016 at 12:56 PM, Gary Bisson
<gary.bisson@boundarydevices.com> wrote:
> Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
> ---
> Hi,
>
> Seems that this configuration is missing, especially since many
> device trees are already using "spidev" nodes.
Then they will trigger the following warning below (from the spidev
probe function):
/*
* spidev should never be referenced in DT without a specific
* compatible string, it is a Linux implementation thing
* rather than a description of the hardware.
*/
if (spi->dev.of_node && !of_match_device(spidev_dt_ids, &spi->dev)) {
dev_err(&spi->dev, "buggy DT: spidev listed directly in DT\n");
WARN_ON(spi->dev.of_node &&
!of_match_device(spidev_dt_ids, &spi->dev));
}
^ permalink raw reply
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