* [PATCH 5/8] linux: drop __bitwise__ everywhere
From: Michael S. Tsirkin @ 2016-12-15 5:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481778865-27667-1-git-send-email-mst@redhat.com>
__bitwise__ used to mean "yes, please enable sparse checks
unconditionally", but now that we dropped __CHECK_ENDIAN__
__bitwise is exactly the same.
There aren't many users, replace it by __bitwise everywhere.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
arch/arm/plat-samsung/include/plat/gpio-cfg.h | 2 +-
drivers/md/dm-cache-block-types.h | 6 +++---
drivers/net/ethernet/sun/sunhme.h | 2 +-
drivers/net/wireless/intel/iwlwifi/iwl-fw-file.h | 4 ++--
include/linux/mmzone.h | 2 +-
include/linux/serial_core.h | 4 ++--
include/linux/types.h | 4 ++--
include/scsi/iscsi_proto.h | 2 +-
include/target/target_core_base.h | 2 +-
include/uapi/linux/virtio_types.h | 6 +++---
net/ieee802154/6lowpan/6lowpan_i.h | 2 +-
net/mac80211/ieee80211_i.h | 4 ++--
12 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 21391fa..e55d1f5 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -26,7 +26,7 @@
#include <linux/types.h>
-typedef unsigned int __bitwise__ samsung_gpio_pull_t;
+typedef unsigned int __bitwise samsung_gpio_pull_t;
/* forward declaration if gpio-core.h hasn't been included */
struct samsung_gpio_chip;
diff --git a/drivers/md/dm-cache-block-types.h b/drivers/md/dm-cache-block-types.h
index bed4ad4..389c9e8 100644
--- a/drivers/md/dm-cache-block-types.h
+++ b/drivers/md/dm-cache-block-types.h
@@ -17,9 +17,9 @@
* discard bitset.
*/
-typedef dm_block_t __bitwise__ dm_oblock_t;
-typedef uint32_t __bitwise__ dm_cblock_t;
-typedef dm_block_t __bitwise__ dm_dblock_t;
+typedef dm_block_t __bitwise dm_oblock_t;
+typedef uint32_t __bitwise dm_cblock_t;
+typedef dm_block_t __bitwise dm_dblock_t;
static inline dm_oblock_t to_oblock(dm_block_t b)
{
diff --git a/drivers/net/ethernet/sun/sunhme.h b/drivers/net/ethernet/sun/sunhme.h
index f430765..4a8d5b1 100644
--- a/drivers/net/ethernet/sun/sunhme.h
+++ b/drivers/net/ethernet/sun/sunhme.h
@@ -302,7 +302,7 @@
* Always write the address first before setting the ownership
* bits to avoid races with the hardware scanning the ring.
*/
-typedef u32 __bitwise__ hme32;
+typedef u32 __bitwise hme32;
struct happy_meal_rxd {
hme32 rx_flags;
diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-fw-file.h b/drivers/net/wireless/intel/iwlwifi/iwl-fw-file.h
index 1ad0ec1..84813b5 100644
--- a/drivers/net/wireless/intel/iwlwifi/iwl-fw-file.h
+++ b/drivers/net/wireless/intel/iwlwifi/iwl-fw-file.h
@@ -228,7 +228,7 @@ enum iwl_ucode_tlv_flag {
IWL_UCODE_TLV_FLAGS_BCAST_FILTERING = BIT(29),
};
-typedef unsigned int __bitwise__ iwl_ucode_tlv_api_t;
+typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
/**
* enum iwl_ucode_tlv_api - ucode api
@@ -258,7 +258,7 @@ enum iwl_ucode_tlv_api {
#endif
};
-typedef unsigned int __bitwise__ iwl_ucode_tlv_capa_t;
+typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
/**
* enum iwl_ucode_tlv_capa - ucode capabilities
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 0f088f3..36d9896 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -246,7 +246,7 @@ struct lruvec {
#define ISOLATE_UNEVICTABLE ((__force isolate_mode_t)0x8)
/* LRU Isolation modes. */
-typedef unsigned __bitwise__ isolate_mode_t;
+typedef unsigned __bitwise isolate_mode_t;
enum zone_watermarks {
WMARK_MIN,
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 5d49488..5def8e8 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -111,8 +111,8 @@ struct uart_icount {
__u32 buf_overrun;
};
-typedef unsigned int __bitwise__ upf_t;
-typedef unsigned int __bitwise__ upstat_t;
+typedef unsigned int __bitwise upf_t;
+typedef unsigned int __bitwise upstat_t;
struct uart_port {
spinlock_t lock; /* port lock */
diff --git a/include/linux/types.h b/include/linux/types.h
index baf7183..d501ad3 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -154,8 +154,8 @@ typedef u64 dma_addr_t;
typedef u32 dma_addr_t;
#endif
-typedef unsigned __bitwise__ gfp_t;
-typedef unsigned __bitwise__ fmode_t;
+typedef unsigned __bitwise gfp_t;
+typedef unsigned __bitwise fmode_t;
#ifdef CONFIG_PHYS_ADDR_T_64BIT
typedef u64 phys_addr_t;
diff --git a/include/scsi/iscsi_proto.h b/include/scsi/iscsi_proto.h
index c1260d8..df156f1 100644
--- a/include/scsi/iscsi_proto.h
+++ b/include/scsi/iscsi_proto.h
@@ -74,7 +74,7 @@ static inline int iscsi_sna_gte(u32 n1, u32 n2)
#define zero_data(p) {p[0]=0;p[1]=0;p[2]=0;}
/* initiator tags; opaque for target */
-typedef uint32_t __bitwise__ itt_t;
+typedef uint32_t __bitwise itt_t;
/* below makes sense only for initiator that created this tag */
#define build_itt(itt, age) ((__force itt_t)\
((itt) | ((age) << ISCSI_AGE_SHIFT)))
diff --git a/include/target/target_core_base.h b/include/target/target_core_base.h
index c211900..0055828 100644
--- a/include/target/target_core_base.h
+++ b/include/target/target_core_base.h
@@ -149,7 +149,7 @@ enum se_cmd_flags_table {
* Used by transport_send_check_condition_and_sense()
* to signal which ASC/ASCQ sense payload should be built.
*/
-typedef unsigned __bitwise__ sense_reason_t;
+typedef unsigned __bitwise sense_reason_t;
enum tcm_sense_reason_table {
#define R(x) (__force sense_reason_t )(x)
diff --git a/include/uapi/linux/virtio_types.h b/include/uapi/linux/virtio_types.h
index e845e8c..55c3b73 100644
--- a/include/uapi/linux/virtio_types.h
+++ b/include/uapi/linux/virtio_types.h
@@ -39,8 +39,8 @@
* - __le{16,32,64} for standard-compliant virtio devices
*/
-typedef __u16 __bitwise__ __virtio16;
-typedef __u32 __bitwise__ __virtio32;
-typedef __u64 __bitwise__ __virtio64;
+typedef __u16 __bitwise __virtio16;
+typedef __u32 __bitwise __virtio32;
+typedef __u64 __bitwise __virtio64;
#endif /* _UAPI_LINUX_VIRTIO_TYPES_H */
diff --git a/net/ieee802154/6lowpan/6lowpan_i.h b/net/ieee802154/6lowpan/6lowpan_i.h
index 5ac7789..ac7c96b 100644
--- a/net/ieee802154/6lowpan/6lowpan_i.h
+++ b/net/ieee802154/6lowpan/6lowpan_i.h
@@ -7,7 +7,7 @@
#include <net/inet_frag.h>
#include <net/6lowpan.h>
-typedef unsigned __bitwise__ lowpan_rx_result;
+typedef unsigned __bitwise lowpan_rx_result;
#define RX_CONTINUE ((__force lowpan_rx_result) 0u)
#define RX_DROP_UNUSABLE ((__force lowpan_rx_result) 1u)
#define RX_DROP ((__force lowpan_rx_result) 2u)
diff --git a/net/mac80211/ieee80211_i.h b/net/mac80211/ieee80211_i.h
index d37a577..b2069fb 100644
--- a/net/mac80211/ieee80211_i.h
+++ b/net/mac80211/ieee80211_i.h
@@ -159,7 +159,7 @@ enum ieee80211_bss_valid_data_flags {
IEEE80211_BSS_VALID_ERP = BIT(3)
};
-typedef unsigned __bitwise__ ieee80211_tx_result;
+typedef unsigned __bitwise ieee80211_tx_result;
#define TX_CONTINUE ((__force ieee80211_tx_result) 0u)
#define TX_DROP ((__force ieee80211_tx_result) 1u)
#define TX_QUEUED ((__force ieee80211_tx_result) 2u)
@@ -180,7 +180,7 @@ struct ieee80211_tx_data {
};
-typedef unsigned __bitwise__ ieee80211_rx_result;
+typedef unsigned __bitwise ieee80211_rx_result;
#define RX_CONTINUE ((__force ieee80211_rx_result) 0u)
#define RX_DROP_UNUSABLE ((__force ieee80211_rx_result) 1u)
#define RX_DROP_MONITOR ((__force ieee80211_rx_result) 2u)
--
MST
^ permalink raw reply related
* [PATCH 8/8] Makefile: drop -D__CHECK_ENDIAN__ from cflags
From: Michael S. Tsirkin @ 2016-12-15 5:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481778865-27667-1-git-send-email-mst@redhat.com>
That's the default now, no need for makefiles to set it.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
drivers/bluetooth/Makefile | 2 --
drivers/net/can/Makefile | 1 -
drivers/net/ethernet/altera/Makefile | 1 -
drivers/net/ethernet/atheros/alx/Makefile | 1 -
drivers/net/ethernet/freescale/Makefile | 2 --
drivers/net/wireless/ath/Makefile | 2 --
drivers/net/wireless/ath/wil6210/Makefile | 2 --
drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile | 2 --
drivers/net/wireless/broadcom/brcm80211/brcmsmac/Makefile | 1 -
drivers/net/wireless/intel/iwlegacy/Makefile | 2 --
drivers/net/wireless/intel/iwlwifi/Makefile | 2 +-
drivers/net/wireless/intel/iwlwifi/dvm/Makefile | 2 +-
drivers/net/wireless/intel/iwlwifi/mvm/Makefile | 2 +-
drivers/net/wireless/intersil/orinoco/Makefile | 3 ---
drivers/net/wireless/mediatek/mt7601u/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/btcoexist/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8192c/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8192ce/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8192de/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8192se/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8723be/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8723com/Makefile | 2 --
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/Makefile | 2 --
drivers/net/wireless/ti/wl1251/Makefile | 2 --
drivers/net/wireless/ti/wlcore/Makefile | 2 --
drivers/staging/rtl8188eu/Makefile | 2 +-
drivers/staging/rtl8192e/Makefile | 2 --
drivers/staging/rtl8192e/rtl8192e/Makefile | 2 --
net/bluetooth/Makefile | 2 --
net/ieee802154/Makefile | 2 --
net/mac80211/Makefile | 2 +-
net/mac802154/Makefile | 2 --
net/wireless/Makefile | 2 --
38 files changed, 5 insertions(+), 68 deletions(-)
diff --git a/drivers/bluetooth/Makefile b/drivers/bluetooth/Makefile
index b1fc29a..8062718 100644
--- a/drivers/bluetooth/Makefile
+++ b/drivers/bluetooth/Makefile
@@ -40,5 +40,3 @@ hci_uart-$(CONFIG_BT_HCIUART_QCA) += hci_qca.o
hci_uart-$(CONFIG_BT_HCIUART_AG6XX) += hci_ag6xx.o
hci_uart-$(CONFIG_BT_HCIUART_MRVL) += hci_mrvl.o
hci_uart-objs := $(hci_uart-y)
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile
index 26ba4b7..7a85495 100644
--- a/drivers/net/can/Makefile
+++ b/drivers/net/can/Makefile
@@ -31,5 +31,4 @@ obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o
obj-$(CONFIG_CAN_XILINXCAN) += xilinx_can.o
obj-$(CONFIG_PCH_CAN) += pch_can.o
-subdir-ccflags-y += -D__CHECK_ENDIAN__
subdir-ccflags-$(CONFIG_CAN_DEBUG_DEVICES) += -DDEBUG
diff --git a/drivers/net/ethernet/altera/Makefile b/drivers/net/ethernet/altera/Makefile
index 3eff2fd..d4a187e 100644
--- a/drivers/net/ethernet/altera/Makefile
+++ b/drivers/net/ethernet/altera/Makefile
@@ -5,4 +5,3 @@
obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
altera_tse-objs := altera_tse_main.o altera_tse_ethtool.o \
altera_msgdma.o altera_sgdma.o altera_utils.o
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/ethernet/atheros/alx/Makefile b/drivers/net/ethernet/atheros/alx/Makefile
index 5901fa4..ed4a605 100644
--- a/drivers/net/ethernet/atheros/alx/Makefile
+++ b/drivers/net/ethernet/atheros/alx/Makefile
@@ -1,3 +1,2 @@
obj-$(CONFIG_ALX) += alx.o
alx-objs := main.o ethtool.o hw.o
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/ethernet/freescale/Makefile b/drivers/net/ethernet/freescale/Makefile
index 4a13115..c46df5c 100644
--- a/drivers/net/ethernet/freescale/Makefile
+++ b/drivers/net/ethernet/freescale/Makefile
@@ -4,8 +4,6 @@
obj-$(CONFIG_FEC) += fec.o
fec-objs :=fec_main.o fec_ptp.o
-CFLAGS_fec_main.o := -D__CHECK_ENDIAN__
-CFLAGS_fec_ptp.o := -D__CHECK_ENDIAN__
obj-$(CONFIG_FEC_MPC52xx) += fec_mpc52xx.o
ifeq ($(CONFIG_FEC_MPC52xx_MDIO),y)
diff --git a/drivers/net/wireless/ath/Makefile b/drivers/net/wireless/ath/Makefile
index 89f8d59..4cdebc7 100644
--- a/drivers/net/wireless/ath/Makefile
+++ b/drivers/net/wireless/ath/Makefile
@@ -19,6 +19,4 @@ ath-objs := main.o \
ath-$(CONFIG_ATH_DEBUG) += debug.o
ath-$(CONFIG_ATH_TRACEPOINTS) += trace.o
-ccflags-y += -D__CHECK_ENDIAN__
-
CFLAGS_trace.o := -I$(src)
diff --git a/drivers/net/wireless/ath/wil6210/Makefile b/drivers/net/wireless/ath/wil6210/Makefile
index 11b544b..89bf2f9 100644
--- a/drivers/net/wireless/ath/wil6210/Makefile
+++ b/drivers/net/wireless/ath/wil6210/Makefile
@@ -22,5 +22,3 @@ wil6210-y += p2p.o
# for tracing framework to find trace.h
CFLAGS_trace.o := -I$(src)
-
-subdir-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile
index d1568be..0383ba5 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile
@@ -19,8 +19,6 @@ ccflags-y += \
-Idrivers/net/wireless/broadcom/brcm80211/brcmfmac \
-Idrivers/net/wireless/broadcom/brcm80211/include
-ccflags-y += -D__CHECK_ENDIAN__
-
obj-$(CONFIG_BRCMFMAC) += brcmfmac.o
brcmfmac-objs += \
cfg80211.o \
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/Makefile b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/Makefile
index 960e6b8..ed83f33 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/Makefile
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/Makefile
@@ -16,7 +16,6 @@
# CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
ccflags-y := \
- -D__CHECK_ENDIAN__ \
-Idrivers/net/wireless/broadcom/brcm80211/brcmsmac \
-Idrivers/net/wireless/broadcom/brcm80211/brcmsmac/phy \
-Idrivers/net/wireless/broadcom/brcm80211/include
diff --git a/drivers/net/wireless/intel/iwlegacy/Makefile b/drivers/net/wireless/intel/iwlegacy/Makefile
index c985a01..c826a6b 100644
--- a/drivers/net/wireless/intel/iwlegacy/Makefile
+++ b/drivers/net/wireless/intel/iwlegacy/Makefile
@@ -13,5 +13,3 @@ iwl4965-$(CONFIG_IWLEGACY_DEBUGFS) += 4965-debug.o
obj-$(CONFIG_IWL3945) += iwl3945.o
iwl3945-objs := 3945-mac.o 3945.o 3945-rs.o
iwl3945-$(CONFIG_IWLEGACY_DEBUGFS) += 3945-debug.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/intel/iwlwifi/Makefile b/drivers/net/wireless/intel/iwlwifi/Makefile
index 6e7ed90..92e6118 100644
--- a/drivers/net/wireless/intel/iwlwifi/Makefile
+++ b/drivers/net/wireless/intel/iwlwifi/Makefile
@@ -15,7 +15,7 @@ iwlwifi-objs += $(iwlwifi-m)
iwlwifi-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o
-ccflags-y += -D__CHECK_ENDIAN__ -I$(src)
+ccflags-y += -I$(src)
obj-$(CONFIG_IWLDVM) += dvm/
obj-$(CONFIG_IWLMVM) += mvm/
diff --git a/drivers/net/wireless/intel/iwlwifi/dvm/Makefile b/drivers/net/wireless/intel/iwlwifi/dvm/Makefile
index 4d19685..b256a354 100644
--- a/drivers/net/wireless/intel/iwlwifi/dvm/Makefile
+++ b/drivers/net/wireless/intel/iwlwifi/dvm/Makefile
@@ -10,4 +10,4 @@ iwldvm-objs += rxon.o devices.o
iwldvm-$(CONFIG_IWLWIFI_LEDS) += led.o
iwldvm-$(CONFIG_IWLWIFI_DEBUGFS) += debugfs.o
-ccflags-y += -D__CHECK_ENDIAN__ -I$(src)/../
+ccflags-y += -I$(src)/../
diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/Makefile b/drivers/net/wireless/intel/iwlwifi/mvm/Makefile
index 2e06dfc..83ac807 100644
--- a/drivers/net/wireless/intel/iwlwifi/mvm/Makefile
+++ b/drivers/net/wireless/intel/iwlwifi/mvm/Makefile
@@ -9,4 +9,4 @@ iwlmvm-$(CONFIG_IWLWIFI_LEDS) += led.o
iwlmvm-y += tof.o fw-dbg.o
iwlmvm-$(CONFIG_PM) += d3.o
-ccflags-y += -D__CHECK_ENDIAN__ -I$(src)/../
+ccflags-y += -I$(src)/../
diff --git a/drivers/net/wireless/intersil/orinoco/Makefile b/drivers/net/wireless/intersil/orinoco/Makefile
index bfdefb8..b7ecef8 100644
--- a/drivers/net/wireless/intersil/orinoco/Makefile
+++ b/drivers/net/wireless/intersil/orinoco/Makefile
@@ -12,6 +12,3 @@ obj-$(CONFIG_TMD_HERMES) += orinoco_tmd.o
obj-$(CONFIG_NORTEL_HERMES) += orinoco_nortel.o
obj-$(CONFIG_PCMCIA_SPECTRUM) += spectrum_cs.o
obj-$(CONFIG_ORINOCO_USB) += orinoco_usb.o
-
-# Orinoco should be endian clean.
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/mediatek/mt7601u/Makefile b/drivers/net/wireless/mediatek/mt7601u/Makefile
index ea9ed8a..08fc802 100644
--- a/drivers/net/wireless/mediatek/mt7601u/Makefile
+++ b/drivers/net/wireless/mediatek/mt7601u/Makefile
@@ -1,5 +1,3 @@
-ccflags-y += -D__CHECK_ENDIAN__
-
obj-$(CONFIG_MT7601U) += mt7601u.o
mt7601u-objs = \
diff --git a/drivers/net/wireless/realtek/rtlwifi/Makefile b/drivers/net/wireless/realtek/rtlwifi/Makefile
index ad6d3c5..84c2e82 100644
--- a/drivers/net/wireless/realtek/rtlwifi/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/Makefile
@@ -30,5 +30,3 @@ obj-$(CONFIG_RTLBTCOEXIST) += btcoexist/
obj-$(CONFIG_RTL8723_COMMON) += rtl8723com/
obj-$(CONFIG_RTL8821AE) += rtl8821ae/
obj-$(CONFIG_RTL8192EE) += rtl8192ee/
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/btcoexist/Makefile b/drivers/net/wireless/realtek/rtlwifi/btcoexist/Makefile
index 47ceecf..d1454d4 100644
--- a/drivers/net/wireless/realtek/rtlwifi/btcoexist/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/btcoexist/Makefile
@@ -3,5 +3,3 @@ btcoexist-objs := halbtc8723b2ant.o \
rtl_btc.o
obj-$(CONFIG_RTLBTCOEXIST) += btcoexist.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/Makefile
index 676e7de..dae4f0f 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/Makefile
@@ -11,5 +11,3 @@ rtl8188ee-objs := \
trx.o
obj-$(CONFIG_RTL8188EE) += rtl8188ee.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192c/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8192c/Makefile
index aee42d7..0546b75 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192c/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192c/Makefile
@@ -5,5 +5,3 @@ rtl8192c-common-objs := \
phy_common.o
obj-$(CONFIG_RTL8192C_COMMON) += rtl8192c-common.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/Makefile
index c0cb0cf..577c7ad 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/Makefile
@@ -9,5 +9,3 @@ rtl8192ce-objs := \
trx.o
obj-$(CONFIG_RTL8192CE) += rtl8192ce.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/Makefile
index ad2de6b..97437da 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/Makefile
@@ -10,5 +10,3 @@ rtl8192cu-objs := \
trx.o
obj-$(CONFIG_RTL8192CU) += rtl8192cu.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192de/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8192de/Makefile
index e3213c8..d0703f2 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192de/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192de/Makefile
@@ -10,5 +10,3 @@ rtl8192de-objs := \
trx.o
obj-$(CONFIG_RTL8192DE) += rtl8192de.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/Makefile
index 0315eed..f254b9f 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/Makefile
@@ -12,5 +12,3 @@ rtl8192ee-objs := \
obj-$(CONFIG_RTL8192EE) += rtl8192ee.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192se/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8192se/Makefile
index b7eb138..dfa9dbb 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192se/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192se/Makefile
@@ -11,5 +11,3 @@ rtl8192se-objs := \
obj-$(CONFIG_RTL8192SE) += rtl8192se.o
-ccflags-y += -D__CHECK_ENDIAN__
-
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/Makefile
index 6220672..e7607d2 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/Makefile
@@ -14,5 +14,3 @@ rtl8723ae-objs := \
obj-$(CONFIG_RTL8723AE) += rtl8723ae.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/Makefile
index a77c341..a841cbd 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/Makefile
@@ -12,5 +12,3 @@ rtl8723be-objs := \
obj-$(CONFIG_RTL8723BE) += rtl8723be.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8723com/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8723com/Makefile
index 345a68a..73da755 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8723com/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8723com/Makefile
@@ -5,5 +5,3 @@ rtl8723-common-objs := \
phy_common.o
obj-$(CONFIG_RTL8723_COMMON) += rtl8723-common.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/Makefile b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/Makefile
index f7a26f7..8ca406b 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/Makefile
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/Makefile
@@ -12,5 +12,3 @@ rtl8821ae-objs := \
obj-$(CONFIG_RTL8821AE) += rtl8821ae.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/ti/wl1251/Makefile b/drivers/net/wireless/ti/wl1251/Makefile
index a5c6328..58b4f93 100644
--- a/drivers/net/wireless/ti/wl1251/Makefile
+++ b/drivers/net/wireless/ti/wl1251/Makefile
@@ -6,5 +6,3 @@ wl1251_sdio-objs += sdio.o
obj-$(CONFIG_WL1251) += wl1251.o
obj-$(CONFIG_WL1251_SPI) += wl1251_spi.o
obj-$(CONFIG_WL1251_SDIO) += wl1251_sdio.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/ti/wlcore/Makefile b/drivers/net/wireless/ti/wlcore/Makefile
index 0a69c13..e286713 100644
--- a/drivers/net/wireless/ti/wlcore/Makefile
+++ b/drivers/net/wireless/ti/wlcore/Makefile
@@ -8,5 +8,3 @@ wlcore-$(CONFIG_NL80211_TESTMODE) += testmode.o
obj-$(CONFIG_WLCORE) += wlcore.o
obj-$(CONFIG_WLCORE_SPI) += wlcore_spi.o
obj-$(CONFIG_WLCORE_SDIO) += wlcore_sdio.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/staging/rtl8188eu/Makefile b/drivers/staging/rtl8188eu/Makefile
index 29b9834..27af86e 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -53,4 +53,4 @@ r8188eu-y := \
obj-$(CONFIG_R8188EU) := r8188eu.o
-ccflags-y += -D__CHECK_ENDIAN__ -I$(srctree)/$(src)/include
+ccflags-y += -I$(srctree)/$(src)/include
diff --git a/drivers/staging/rtl8192e/Makefile b/drivers/staging/rtl8192e/Makefile
index cb18db7..7101fcc 100644
--- a/drivers/staging/rtl8192e/Makefile
+++ b/drivers/staging/rtl8192e/Makefile
@@ -17,5 +17,3 @@ obj-$(CONFIG_RTLLIB_CRYPTO_TKIP) += rtllib_crypt_tkip.o
obj-$(CONFIG_RTLLIB_CRYPTO_WEP) += rtllib_crypt_wep.o
obj-$(CONFIG_RTL8192E) += rtl8192e/
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/staging/rtl8192e/rtl8192e/Makefile b/drivers/staging/rtl8192e/rtl8192e/Makefile
index a2c4fb4..176a4a2 100644
--- a/drivers/staging/rtl8192e/rtl8192e/Makefile
+++ b/drivers/staging/rtl8192e/rtl8192e/Makefile
@@ -16,5 +16,3 @@ r8192e_pci-objs := \
rtl_wx.o \
obj-$(CONFIG_RTL8192E) += r8192e_pci.o
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/net/bluetooth/Makefile b/net/bluetooth/Makefile
index b3ff12e..4bfaa19 100644
--- a/net/bluetooth/Makefile
+++ b/net/bluetooth/Makefile
@@ -20,5 +20,3 @@ bluetooth-$(CONFIG_BT_HS) += a2mp.o amp.o
bluetooth-$(CONFIG_BT_LEDS) += leds.o
bluetooth-$(CONFIG_BT_DEBUGFS) += hci_debugfs.o
bluetooth-$(CONFIG_BT_SELFTEST) += selftest.o
-
-subdir-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/net/ieee802154/Makefile b/net/ieee802154/Makefile
index 4adfd4d..9b92ade 100644
--- a/net/ieee802154/Makefile
+++ b/net/ieee802154/Makefile
@@ -7,5 +7,3 @@ ieee802154-y := netlink.o nl-mac.o nl-phy.o nl_policy.o core.o \
ieee802154_socket-y := socket.o
CFLAGS_trace.o := -I$(src)
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/net/mac80211/Makefile b/net/mac80211/Makefile
index 0b202b3..2829122 100644
--- a/net/mac80211/Makefile
+++ b/net/mac80211/Makefile
@@ -61,4 +61,4 @@ rc80211_minstrel_ht-$(CONFIG_MAC80211_DEBUGFS) += rc80211_minstrel_ht_debugfs.o
mac80211-$(CONFIG_MAC80211_RC_MINSTREL) += $(rc80211_minstrel-y)
mac80211-$(CONFIG_MAC80211_RC_MINSTREL_HT) += $(rc80211_minstrel_ht-y)
-ccflags-y += -D__CHECK_ENDIAN__ -DDEBUG
+ccflags-y += -DDEBUG
diff --git a/net/mac802154/Makefile b/net/mac802154/Makefile
index 17a51e8..5857bb1 100644
--- a/net/mac802154/Makefile
+++ b/net/mac802154/Makefile
@@ -3,5 +3,3 @@ mac802154-objs := main.o rx.o tx.o mac_cmd.o mib.o \
iface.o llsec.o util.o cfg.o trace.o
CFLAGS_trace.o := -I$(src)
-
-ccflags-y += -D__CHECK_ENDIAN__
diff --git a/net/wireless/Makefile b/net/wireless/Makefile
index 4c9e39f..816c933 100644
--- a/net/wireless/Makefile
+++ b/net/wireless/Makefile
@@ -17,8 +17,6 @@ cfg80211-$(CONFIG_CFG80211_INTERNAL_REGDB) += regdb.o
CFLAGS_trace.o := -I$(src)
-ccflags-y += -D__CHECK_ENDIAN__
-
$(obj)/regdb.c: $(src)/db.txt $(src)/genregdb.awk
@$(AWK) -f $(srctree)/$(src)/genregdb.awk < $< > $@
--
MST
^ permalink raw reply related
* [PATCH 01/37] ARM: dts: imx6dl-aristainetos2: Correct license text
From: Heiko Schocher @ 2016-12-15 5:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214235746.7108-2-alexandre.belloni@free-electrons.com>
Hello Alexandre,
Am 15.12.2016 um 00:57 schrieb Alexandre Belloni:
> The license test has been mangled at some point then copy pasted across
> multiple files. Restore it to what it should be.
> Note that this is not intended as a license change.
>
> Cc: Dong Aisheng <aisheng.dong@freescale.com>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Heiko Schocher <hs@denx.de>
> Cc: Rafa? Mi?ecki <zajec5@gmail.com>
> Cc: Ulf Hansson <ulf.hansson@linaro.org>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
> arch/arm/boot/dts/imx6dl-aristainetos2_4.dts | 10 +++++-----
> arch/arm/boot/dts/imx6dl-aristainetos2_7.dts | 10 +++++-----
> arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi | 10 +++++-----
> 3 files changed, 15 insertions(+), 15 deletions(-)
Thanks!
Reviewed-by: Heiko Schocher <hs@denx.de>
Hmm.. BTW ... is this copy and paste not boring? Should we not
use "SPDX-License-Identifier" [1] like for example in U-Boot ?
bye,
Heiko
[1] https://spdx.org/licenses/
>
> diff --git a/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts b/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts
> index bb92f309c191..0677625463d6 100644
> --- a/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts
> +++ b/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts
> @@ -12,17 +12,17 @@
> * modify it under the terms of the GNU General Public License
> * version 2 as published by the Free Software Foundation.
> *
> - * This file is distributed in the hope that it will be useful
> + * This file is distributed in the hope that it will be useful,
> * but WITHOUT ANY WARRANTY; without even the implied warranty of
> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> * GNU General Public License for more details.
> *
> - * Or, alternatively
> + * Or, alternatively,
> *
> * b) Permission is hereby granted, free of charge, to any person
> * obtaining a copy of this software and associated documentation
> * files (the "Software"), to deal in the Software without
> - * restriction, including without limitation the rights to use
> + * restriction, including without limitation the rights to use,
> * copy, modify, merge, publish, distribute, sublicense, and/or
> * sell copies of the Software, and to permit persons to whom the
> * Software is furnished to do so, subject to the following
> @@ -31,11 +31,11 @@
> * The above copyright notice and this permission notice shall be
> * included in all copies or substantial portions of the Software.
> *
> - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> * OTHER DEALINGS IN THE SOFTWARE.
> diff --git a/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts b/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts
> index 3d5ad2cc7e22..805b1318b7f7 100644
> --- a/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts
> +++ b/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts
> @@ -12,17 +12,17 @@
> * modify it under the terms of the GNU General Public License
> * version 2 as published by the Free Software Foundation.
> *
> - * This file is distributed in the hope that it will be useful
> + * This file is distributed in the hope that it will be useful,
> * but WITHOUT ANY WARRANTY; without even the implied warranty of
> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> * GNU General Public License for more details.
> *
> - * Or, alternatively
> + * Or, alternatively,
> *
> * b) Permission is hereby granted, free of charge, to any person
> * obtaining a copy of this software and associated documentation
> * files (the "Software"), to deal in the Software without
> - * restriction, including without limitation the rights to use
> + * restriction, including without limitation the rights to use,
> * copy, modify, merge, publish, distribute, sublicense, and/or
> * sell copies of the Software, and to permit persons to whom the
> * Software is furnished to do so, subject to the following
> @@ -31,11 +31,11 @@
> * The above copyright notice and this permission notice shall be
> * included in all copies or substantial portions of the Software.
> *
> - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> * OTHER DEALINGS IN THE SOFTWARE.
> diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
> index 7fff02c406f2..6450699859ce 100644
> --- a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
> @@ -12,17 +12,17 @@
> * modify it under the terms of the GNU General Public License
> * version 2 as published by the Free Software Foundation.
> *
> - * This file is distributed in the hope that it will be useful
> + * This file is distributed in the hope that it will be useful,
> * but WITHOUT ANY WARRANTY; without even the implied warranty of
> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> * GNU General Public License for more details.
> *
> - * Or, alternatively
> + * Or, alternatively,
> *
> * b) Permission is hereby granted, free of charge, to any person
> * obtaining a copy of this software and associated documentation
> * files (the "Software"), to deal in the Software without
> - * restriction, including without limitation the rights to use
> + * restriction, including without limitation the rights to use,
> * copy, modify, merge, publish, distribute, sublicense, and/or
> * sell copies of the Software, and to permit persons to whom the
> * Software is furnished to do so, subject to the following
> @@ -31,11 +31,11 @@
> * The above copyright notice and this permission notice shall be
> * included in all copies or substantial portions of the Software.
> *
> - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> * OTHER DEALINGS IN THE SOFTWARE.
>
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply
* [PATCH 0/2] add clk-hi3660
From: Zhangfei Gao @ 2016-12-15 5:58 UTC (permalink / raw)
To: linux-arm-kernel
Zhangfei Gao (2):
dt-bindings: Document the hi3660 clock bindings
clk: hi3660: Clock driver support for Hisilicon hi3660 SoC
.../devicetree/bindings/clock/hi3660-clock.txt | 25 +
drivers/clk/hisilicon/Kconfig | 7 +
drivers/clk/hisilicon/Makefile | 1 +
drivers/clk/hisilicon/clk-hi3660.c | 601 +++++++++++++++++++++
include/dt-bindings/clock/hi3660-clock.h | 194 +++++++
5 files changed, 828 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/hi3660-clock.txt
create mode 100644 drivers/clk/hisilicon/clk-hi3660.c
create mode 100644 include/dt-bindings/clock/hi3660-clock.h
--
2.7.4
^ permalink raw reply
* [PATCH 1/2] dt-bindings: Document the hi3660 clock bindings
From: Zhangfei Gao @ 2016-12-15 5:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481781493-6188-1-git-send-email-zhangfei.gao@linaro.org>
Add DT bindings documentation for hi3660 SoC clock.
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
.../devicetree/bindings/clock/hi3660-clock.txt | 42 ++++++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/hi3660-clock.txt
diff --git a/Documentation/devicetree/bindings/clock/hi3660-clock.txt b/Documentation/devicetree/bindings/clock/hi3660-clock.txt
new file mode 100644
index 0000000..7296fd7
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/hi3660-clock.txt
@@ -0,0 +1,42 @@
+* Hisilicon Hi3660 Clock Controller
+
+The Hi3660 clock controller generates and supplies clock to various
+controllers within the Hi3660 SoC.
+
+Required Properties:
+
+- compatible: the compatible should be one of the following strings to
+ indicate the clock controller functionality.
+
+ - "hisilicon,hi3660-crgctrl"
+ - "hisilicon,hi3660-pctrl"
+ - "hisilicon,hi3660-pmuctrl"
+ - "hisilicon,hi3660-sctrl"
+ - "hisilicon,hi3660-iomcu"
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- #clock-cells: should be 1.
+
+Each clock is assigned an identifier and client nodes use this identifier
+to specify the clock which they consume.
+
+All these identifier could be found in <dt-bindings/clock/hi3660-clock.h>.
+
+Examples:
+ crg_ctrl: crg_ctrl at fff35000 {
+ compatible = "hisilicon,hi3660-crgctrl", "syscon";
+ reg = <0x0 0xfff35000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ uart0: uart at fdf02000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xfdf02000 0x0 0x1000>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
+ <&crg_ctrl HI3660_PCLK>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
--
2.7.4
^ permalink raw reply related
* [PATCH 2/2] clk: hi3660: Clock driver support for Hisilicon hi3660 SoC
From: Zhangfei Gao @ 2016-12-15 5:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481781493-6188-1-git-send-email-zhangfei.gao@linaro.org>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
drivers/clk/hisilicon/Kconfig | 7 +
drivers/clk/hisilicon/Makefile | 1 +
drivers/clk/hisilicon/clk-hi3660.c | 601 +++++++++++++++++++++++++++++++
include/dt-bindings/clock/hi3660-clock.h | 194 ++++++++++
4 files changed, 803 insertions(+)
create mode 100644 drivers/clk/hisilicon/clk-hi3660.c
create mode 100644 include/dt-bindings/clock/hi3660-clock.h
diff --git a/drivers/clk/hisilicon/Kconfig b/drivers/clk/hisilicon/Kconfig
index 3f537a0..36759b7 100644
--- a/drivers/clk/hisilicon/Kconfig
+++ b/drivers/clk/hisilicon/Kconfig
@@ -6,6 +6,13 @@ config COMMON_CLK_HI3519
help
Build the clock driver for hi3519.
+config COMMON_CLK_HI3660
+ bool "Hi3660 Clock Driver"
+ depends on ARCH_HISI || COMPILE_TEST
+ default ARCH_HISI
+ help
+ Build the Hisilicon Hi3660 clock driver based on the common clock framework.
+
config COMMON_CLK_HI6220
bool "Hi6220 Clock Driver"
depends on ARCH_HISI || COMPILE_TEST
diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
index e169ec7..c872587 100644
--- a/drivers/clk/hisilicon/Makefile
+++ b/drivers/clk/hisilicon/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o
obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o
obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o
obj-$(CONFIG_COMMON_CLK_HI3519) += clk-hi3519.o
+obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o
obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o
obj-$(CONFIG_RESET_HISI) += reset.o
obj-$(CONFIG_STUB_CLK_HI6220) += clk-hi6220-stub.o
diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c
new file mode 100644
index 0000000..42ca47d
--- /dev/null
+++ b/drivers/clk/hisilicon/clk-hi3660.c
@@ -0,0 +1,601 @@
+/*
+ * Copyright (c) 2016-2017 Linaro Ltd.
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <dt-bindings/clock/hi3660-clock.h>
+#include <linux/clk-provider.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include "clk.h"
+
+enum hi3660_clk_type {
+ HI3660_CRGCTRL = 1,
+ HI3660_PCTRL,
+ HI3660_PMUCTRL,
+ HI3660_SCTRL,
+ HI3660_IOMCU,
+};
+
+static const struct hisi_fixed_rate_clock hi3660_fixed_rate_clks[] = {
+ { HI3660_CLKIN_SYS, "clkin_sys", NULL, 0, 19200000, },
+ { HI3660_CLKIN_REF, "clkin_ref", NULL, 0, 32764, },
+ { HI3660_CLK_FLL_SRC, "clk_fll_src", NULL, 0, 128000000, },
+ { HI3660_CLK_PPLL0, "clk_ppll0", NULL, 0, 1600000000, },
+ { HI3660_CLK_PPLL1, "clk_ppll1", NULL, 0, 1866000000, },
+ { HI3660_CLK_PPLL2, "clk_ppll2", NULL, 0, 960000000, },
+ { HI3660_CLK_PPLL3, "clk_ppll3", NULL, 0, 1290000000, },
+ { HI3660_CLK_SCPLL, "clk_scpll", NULL, 0, 245760000, },
+ { HI3660_PCLK, "pclk", NULL, 0, 20000000, },
+ { HI3660_CLK_UART0_DBG, "clk_uart0_dbg", NULL, 0, 19200000, },
+ { HI3660_CLK_UART6, "clk_uart6", NULL, 0, 19200000, },
+ { HI3660_OSC32K, "osc32k", NULL, 0, 32764, },
+ { HI3660_OSC19M, "osc19m", NULL, 0, 19200000, },
+ { HI3660_CLK_480M, "clk_480m", NULL, 0, 480000000, },
+ { HI3660_CLK_INV, "clk_inv", NULL, 0, 10000000, },
+};
+
+/* crgctrl */
+static const struct hisi_fixed_factor_clock hi3660_crg_fixed_factor_clks[] = {
+ { HI3660_FACTOR_UART3, "clk_factor_uart3", "iomcu_peri0", 1, 8, 0, },
+ { HI3660_CLK_FACTOR_MMC, "clk_factor_mmc", "clkin_sys", 1, 6, 0, },
+ { HI3660_CLK_GATE_I2C0, "clk_gate_i2c0", "clk_i2c0_iomcu", 1, 4, 0, },
+ { HI3660_CLK_GATE_I2C1, "clk_gate_i2c1", "clk_i2c1_iomcu", 1, 4, 0, },
+ { HI3660_CLK_GATE_I2C2, "clk_gate_i2c2", "clk_i2c2_iomcu", 1, 4, 0, },
+ { HI3660_CLK_GATE_I2C6, "clk_gate_i2c6", "clk_i2c6_iomcu", 1, 4, 0, },
+ { HI3660_CLK_DIV_SYSBUS, "clk_div_sysbus", "clk_mux_sysbus", 1, 7, 0, },
+ { HI3660_CLK_DIV_320M, "clk_div_320m", "clk_320m_pll_gt", 1, 5, 0, },
+ { HI3660_CLK_DIV_A53, "clk_div_a53hpm", "clk_a53hpm_andgt", 1, 2, 0, },
+ { HI3660_CLK_GATE_SPI0, "clk_gate_spi0", "clk_ppll0", 1, 8, 0, },
+ { HI3660_CLK_GATE_SPI2, "clk_gate_spi2", "clk_ppll0", 1, 8, 0, },
+ { HI3660_PCIEPHY_REF, "clk_pciephy_ref", "clk_div_pciephy", 1, 1, 0, },
+ { HI3660_CLK_ABB_USB, "clk_abb_usb", "clk_gate_usb_tcxo_en", 1, 1, 0 },
+};
+
+static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = {
+ { HI3660_HCLK_GATE_SDIO0, "hclk_gate_sdio0", "clk_div_sysbus",
+ CLK_SET_RATE_PARENT, 0x0, 21, 0, },
+ { HI3660_HCLK_GATE_SD, "hclk_gate_sd", "clk_div_sysbus",
+ CLK_SET_RATE_PARENT, 0x0, 30, 0, },
+ { HI3660_CLK_GATE_AOMM, "clk_gate_aomm", "clk_div_aomm",
+ CLK_SET_RATE_PARENT, 0x0, 31, 0, },
+ { HI3660_PCLK_GPIO0, "pclk_gpio0", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 0, 0, },
+ { HI3660_PCLK_GPIO1, "pclk_gpio1", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 1, 0, },
+ { HI3660_PCLK_GPIO2, "pclk_gpio2", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 2, 0, },
+ { HI3660_PCLK_GPIO3, "pclk_gpio3", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 3, 0, },
+ { HI3660_PCLK_GPIO4, "pclk_gpio4", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 4, 0, },
+ { HI3660_PCLK_GPIO5, "pclk_gpio5", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 5, 0, },
+ { HI3660_PCLK_GPIO6, "pclk_gpio6", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 6, 0, },
+ { HI3660_PCLK_GPIO7, "pclk_gpio7", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 7, 0, },
+ { HI3660_PCLK_GPIO8, "pclk_gpio8", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 8, 0, },
+ { HI3660_PCLK_GPIO9, "pclk_gpio9", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 9, 0, },
+ { HI3660_PCLK_GPIO10, "pclk_gpio10", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 10, 0, },
+ { HI3660_PCLK_GPIO11, "pclk_gpio11", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 11, 0, },
+ { HI3660_PCLK_GPIO12, "pclk_gpio12", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 12, 0, },
+ { HI3660_PCLK_GPIO13, "pclk_gpio13", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 13, 0, },
+ { HI3660_PCLK_GPIO14, "pclk_gpio14", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 14, 0, },
+ { HI3660_PCLK_GPIO15, "pclk_gpio15", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 15, 0, },
+ { HI3660_PCLK_GPIO16, "pclk_gpio16", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 16, 0, },
+ { HI3660_PCLK_GPIO17, "pclk_gpio17", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 17, 0, },
+ { HI3660_PCLK_GPIO18, "pclk_gpio18", "clk_div_ioperi",
+ CLK_SET_RATE_PARENT, 0x10, 18, 0, },
+ { HI3660_PCLK_GPIO19, "pclk_gpio19", "clk_div_ioperi",
+ CLK_SET_RATE_PARENT, 0x10, 19, 0, },
+ { HI3660_PCLK_GPIO20, "pclk_gpio20", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 20, 0, },
+ { HI3660_PCLK_GPIO21, "pclk_gpio21", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x10, 21, 0, },
+ { HI3660_CLK_GATE_SPI3, "clk_gate_spi3", "clk_div_ioperi",
+ CLK_SET_RATE_PARENT, 0x10, 30, 0, },
+ { HI3660_CLK_GATE_I2C7, "clk_gate_i2c7", "clk_mux_i2c",
+ CLK_SET_RATE_PARENT, 0x10, 31, 0, },
+ { HI3660_CLK_GATE_I2C3, "clk_gate_i2c3", "clk_mux_i2c",
+ CLK_SET_RATE_PARENT, 0x20, 7, 0, },
+ { HI3660_CLK_GATE_SPI1, "clk_gate_spi1", "clk_mux_spi",
+ CLK_SET_RATE_PARENT, 0x20, 9, 0, },
+ { HI3660_CLK_GATE_UART1, "clk_gate_uart1", "clk_mux_uarth",
+ CLK_SET_RATE_PARENT, 0x20, 11, 0, },
+ { HI3660_CLK_GATE_UART2, "clk_gate_uart2", "clk_mux_uart1",
+ CLK_SET_RATE_PARENT, 0x20, 12, 0, },
+ { HI3660_CLK_GATE_UART4, "clk_gate_uart4", "clk_mux_uarth",
+ CLK_SET_RATE_PARENT, 0x20, 14, 0, },
+ { HI3660_CLK_GATE_UART5, "clk_gate_uart5", "clk_mux_uart1",
+ CLK_SET_RATE_PARENT, 0x20, 15, 0, },
+ { HI3660_CLK_GATE_I2C4, "clk_gate_i2c4", "clk_mux_i2c",
+ CLK_SET_RATE_PARENT, 0x20, 27, 0, },
+ { HI3660_CLK_GATE_DMAC, "clk_gate_dmac", "clk_div_sysbus",
+ CLK_SET_RATE_PARENT, 0x30, 1, 0, },
+ { HI3660_PCLK_GATE_DSS, "pclk_gate_dss", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x30, 12, 0, },
+ { HI3660_ACLK_GATE_DSS, "aclk_gate_dss", "clk_gate_vivobus",
+ CLK_SET_RATE_PARENT, 0x30, 13, 0, },
+ { HI3660_CLK_GATE_LDI1, "clk_gate_ldi1", "clk_div_ldi1",
+ CLK_SET_RATE_PARENT, 0x30, 14, 0, },
+ { HI3660_CLK_GATE_LDI0, "clk_gate_ldi0", "clk_div_ldi0",
+ CLK_SET_RATE_PARENT, 0x30, 15, 0, },
+ { HI3660_CLK_GATE_VIVOBUS, "clk_gate_vivobus", "clk_div_vivobus",
+ CLK_SET_RATE_PARENT, 0x30, 16, 0, },
+ { HI3660_CLK_GATE_EDC0, "clk_gate_edc0", "clk_div_edc0",
+ CLK_SET_RATE_PARENT, 0x30, 17, 0, },
+ { HI3660_CLK_GATE_TXDPHY0_CFG, "clk_gate_txdphy0_cfg", "clkin_sys",
+ CLK_SET_RATE_PARENT, 0x30, 28, 0, },
+ { HI3660_CLK_GATE_TXDPHY0_REF, "clk_gate_txdphy0_ref", "clkin_sys",
+ CLK_SET_RATE_PARENT, 0x30, 29, 0, },
+ { HI3660_CLK_GATE_TXDPHY1_CFG, "clk_gate_txdphy1_cfg", "clkin_sys",
+ CLK_SET_RATE_PARENT, 0x30, 30, 0, },
+ { HI3660_CLK_GATE_TXDPHY1_REF, "clk_gate_txdphy1_ref", "clkin_sys",
+ CLK_SET_RATE_PARENT, 0x30, 31, 0, },
+ { HI3660_ACLK_GATE_USB3OTG, "aclk_gate_usb3otg", "clk_div_mmc0bus",
+ CLK_SET_RATE_PARENT, 0x40, 1, 0, },
+ { HI3660_CLK_GATE_SPI4, "clk_gate_spi4", "clk_mux_spi",
+ CLK_SET_RATE_PARENT, 0x40, 4, 0, },
+ { HI3660_CLK_GATE_SD, "clk_gate_sd", "clk_mux_sd_sys",
+ CLK_SET_RATE_PARENT, 0x40, 17, 0, },
+ { HI3660_CLK_GATE_SDIO0, "clk_gate_sdio0", "clk_mux_sdio_sys",
+ CLK_SET_RATE_PARENT, 0x40, 19, 0, },
+ { HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus",
+ CLK_SET_RATE_PARENT, 0x50, 21, 0, },
+ { HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x50, 28, 0, },
+ { HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus",
+ CLK_SET_RATE_PARENT, 0x50, 29, 0, },
+ { HI3660_ACLK_GATE_PCIE, "aclk_gate_pcie", "clk_div_mmc1bus",
+ CLK_SET_RATE_PARENT, 0x420, 5, 0, },
+ { HI3660_PCLK_GATE_PCIE_SYS, "pclk_gate_pcie_sys", "clk_div_mmc1bus",
+ CLK_SET_RATE_PARENT, 0x420, 7, 0, },
+ { HI3660_CLK_GATE_PCIEAUX, "clk_gate_pcieaux", "clkin_sys",
+ CLK_SET_RATE_PARENT, 0x420, 8, 0, },
+ { HI3660_PCLK_GATE_PCIE_PHY, "pclk_gate_pcie_phy", "clk_div_mmc1bus",
+ CLK_SET_RATE_PARENT, 0x420, 9, 0, },
+};
+
+static const struct hisi_gate_clock hi3660_crgctrl_gate_clks[] = {
+ { HI3660_CLK_ANDGT_LDI0, "clk_andgt_ldi0", "clk_mux_ldi0",
+ CLK_SET_RATE_PARENT, 0xf0, 6, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_ANDGT_LDI1, "clk_andgt_ldi1", "clk_mux_ldi1",
+ CLK_SET_RATE_PARENT, 0xf0, 7, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_ANDGT_EDC0, "clk_andgt_edc0", "clk_mux_edc0",
+ CLK_SET_RATE_PARENT, 0xf0, 8, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_GATE_UFSPHY_GT, "clk_gate_ufsphy_gt", "clk_div_ufsperi",
+ CLK_SET_RATE_PARENT, 0xf4, 1, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_ANDGT_MMC, "clk_andgt_mmc", "clk_mux_mmc_pll",
+ CLK_SET_RATE_PARENT, 0xf4, 2, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_ANDGT_SD, "clk_andgt_sd", "clk_mux_sd_pll",
+ CLK_SET_RATE_PARENT, 0xf4, 3, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_A53HPM_ANDGT, "clk_a53hpm_andgt", "clk_mux_a53hpm",
+ CLK_SET_RATE_PARENT, 0xf4, 7, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_ANDGT_SDIO, "clk_andgt_sdio", "clk_mux_sdio_pll",
+ CLK_SET_RATE_PARENT, 0xf4, 8, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_ANDGT_UART0, "clk_andgt_uart0", "clk_div_320m",
+ CLK_SET_RATE_PARENT, 0xf4, 9, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_ANDGT_UART1, "clk_andgt_uart1", "clk_div_320m",
+ CLK_SET_RATE_PARENT, 0xf4, 10, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_ANDGT_UARTH, "clk_andgt_uarth", "clk_div_320m",
+ CLK_SET_RATE_PARENT, 0xf4, 11, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_ANDGT_SPI, "clk_andgt_spi", "clk_div_320m",
+ CLK_SET_RATE_PARENT, 0xf4, 13, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_VIVOBUS_ANDGT, "clk_vivobus_andgt", "clk_mux_vivobus",
+ CLK_SET_RATE_PARENT, 0xf8, 1, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_AOMM_ANDGT, "clk_aomm_andgt", "clk_ppll2",
+ CLK_SET_RATE_PARENT, 0xf8, 3, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_320M_PLL_GT, "clk_320m_pll_gt", "clk_mux_320m",
+ CLK_SET_RATE_PARENT, 0xf8, 10, 0, },
+ { HI3660_AUTODIV_EMMC0BUS, "autodiv_emmc0bus", "autodiv_sysbus",
+ CLK_SET_RATE_PARENT, 0x404, 1, CLK_GATE_HIWORD_MASK, },
+ { HI3660_AUTODIV_SYSBUS, "autodiv_sysbus", "clk_div_sysbus",
+ CLK_SET_RATE_PARENT, 0x404, 5, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_GATE_UFSPHY_CFG, "clk_gate_ufsphy_cfg",
+ "clk_div_ufsphy_cfg", CLK_SET_RATE_PARENT, 0x420, 12, 0, },
+ { HI3660_CLK_GATE_UFSIO_REF, "clk_gate_ufsio_ref",
+ "clk_gate_ufs_tcxo_en", CLK_SET_RATE_PARENT, 0x420, 14, 0, },
+};
+
+static const char *const
+clk_mux_sdio_sys_p[] = {"clk_factor_mmc", "clk_div_sdio",};
+static const char *const
+clk_mux_sd_sys_p[] = {"clk_factor_mmc", "clk_div_sd",};
+static const char *const
+clk_mux_pll_p[] = {"clk_ppll0", "clk_ppll1", "clk_ppll2", "clk_ppll2",};
+static const char *const
+clk_mux_pll0123_p[] = {"clk_ppll0", "clk_ppll1", "clk_ppll2", "clk_ppll3",};
+static const char *const
+clk_mux_edc0_p[] = {"clk_inv", "clk_ppll0", "clk_ppll1", "clk_inv",
+ "clk_ppll2", "clk_inv", "clk_inv", "clk_inv",
+ "clk_ppll3", "clk_inv", "clk_inv", "clk_inv",
+ "clk_inv", "clk_inv", "clk_inv", "clk_inv",};
+static const char *const
+clk_mux_ldi0_p[] = {"clk_inv", "clk_ppll0", "clk_ppll2", "clk_inv",
+ "clk_ppll1", "clk_inv", "clk_inv", "clk_inv",
+ "clk_ppll3", "clk_inv", "clk_inv", "clk_inv",
+ "clk_inv", "clk_inv", "clk_inv", "clk_inv",};
+static const char *const
+clk_mux_uart0_p[] = {"clkin_sys", "clk_div_uart0",};
+static const char *const
+clk_mux_uart1_p[] = {"clkin_sys", "clk_div_uart1",};
+static const char *const
+clk_mux_uarth_p[] = {"clkin_sys", "clk_div_uarth",};
+static const char *const
+clk_mux_pll02p[] = {"clk_ppll0", "clk_ppll2",};
+static const char *const
+clk_mux_ioperi_p[] = {"clk_div_320m", "clk_div_a53hpm",};
+static const char *const
+clk_mux_spi_p[] = {"clkin_sys", "clk_div_spi",};
+static const char *const
+clk_mux_i2c_p[] = {"clkin_sys", "clk_div_i2c",};
+
+static const struct hisi_mux_clock hi3660_crgctrl_mux_clks[] = {
+ { HI3660_CLK_MUX_SYSBUS, "clk_mux_sysbus", clk_mux_sdio_sys_p,
+ ARRAY_SIZE(clk_mux_sdio_sys_p), CLK_SET_RATE_PARENT, 0xac, 0, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_UART0, "clk_mux_uart0", clk_mux_uart0_p,
+ ARRAY_SIZE(clk_mux_uart0_p), CLK_SET_RATE_PARENT, 0xac, 2, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_UART1, "clk_mux_uart1", clk_mux_uart1_p,
+ ARRAY_SIZE(clk_mux_uart1_p), CLK_SET_RATE_PARENT, 0xac, 3, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_UARTH, "clk_mux_uarth", clk_mux_uarth_p,
+ ARRAY_SIZE(clk_mux_uarth_p), CLK_SET_RATE_PARENT, 0xac, 4, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_SPI, "clk_mux_spi", clk_mux_spi_p,
+ ARRAY_SIZE(clk_mux_spi_p), CLK_SET_RATE_PARENT, 0xac, 8, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_I2C, "clk_mux_i2c", clk_mux_i2c_p,
+ ARRAY_SIZE(clk_mux_i2c_p), CLK_SET_RATE_PARENT, 0xac, 13, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_MMC_PLL, "clk_mux_mmc_pll", clk_mux_pll02p,
+ ARRAY_SIZE(clk_mux_pll02p), CLK_SET_RATE_PARENT, 0xb4, 0, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_LDI1, "clk_mux_ldi1", clk_mux_ldi0_p,
+ ARRAY_SIZE(clk_mux_ldi0_p), CLK_SET_RATE_PARENT, 0xb4, 8, 4,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_LDI0, "clk_mux_ldi0", clk_mux_ldi0_p,
+ ARRAY_SIZE(clk_mux_ldi0_p), CLK_SET_RATE_PARENT, 0xb4, 12, 4,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_SD_PLL, "clk_mux_sd_pll", clk_mux_pll_p,
+ ARRAY_SIZE(clk_mux_pll_p), CLK_SET_RATE_PARENT, 0xb8, 4, 2,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_SD_SYS, "clk_mux_sd_sys", clk_mux_sd_sys_p,
+ ARRAY_SIZE(clk_mux_sd_sys_p), CLK_SET_RATE_PARENT, 0xb8, 6, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_EDC0, "clk_mux_edc0", clk_mux_edc0_p,
+ ARRAY_SIZE(clk_mux_edc0_p), CLK_SET_RATE_PARENT, 0xbc, 6, 4,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_SDIO_SYS, "clk_mux_sdio_sys", clk_mux_sdio_sys_p,
+ ARRAY_SIZE(clk_mux_sdio_sys_p), CLK_SET_RATE_PARENT, 0xc0, 6, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_SDIO_PLL, "clk_mux_sdio_pll", clk_mux_pll_p,
+ ARRAY_SIZE(clk_mux_pll_p), CLK_SET_RATE_PARENT, 0xc0, 4, 2,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_VIVOBUS, "clk_mux_vivobus", clk_mux_pll0123_p,
+ ARRAY_SIZE(clk_mux_pll0123_p), CLK_SET_RATE_PARENT, 0xd0, 12, 2,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_A53HPM, "clk_mux_a53hpm", clk_mux_pll02p,
+ ARRAY_SIZE(clk_mux_pll02p), CLK_SET_RATE_PARENT, 0xd4, 9, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_320M, "clk_mux_320m", clk_mux_pll02p,
+ ARRAY_SIZE(clk_mux_pll02p), CLK_SET_RATE_PARENT, 0x100, 0, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_MUX_IOPERI, "clk_mux_ioperi", clk_mux_ioperi_p,
+ ARRAY_SIZE(clk_mux_ioperi_p), CLK_SET_RATE_PARENT, 0x108, 10, 1,
+ CLK_MUX_HIWORD_MASK, },
+};
+
+static const struct hisi_divider_clock hi3660_crgctrl_divider_clks[] = {
+ { HI3660_CLK_DIV_UART0, "clk_div_uart0", "clk_andgt_uart0",
+ CLK_SET_RATE_PARENT, 0xb0, 4, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_UART1, "clk_div_uart1", "clk_andgt_uart1",
+ CLK_SET_RATE_PARENT, 0xb0, 8, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_UARTH, "clk_div_uarth", "clk_andgt_uarth",
+ CLK_SET_RATE_PARENT, 0xb0, 12, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_MMC, "clk_div_mmc", "clk_andgt_mmc",
+ CLK_SET_RATE_PARENT, 0xb4, 3, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_SD, "clk_div_sd", "clk_andgt_sd",
+ CLK_SET_RATE_PARENT, 0xb8, 0, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_EDC0, "clk_div_edc0", "clk_andgt_edc0",
+ CLK_SET_RATE_PARENT, 0xbc, 0, 6, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_LDI0, "clk_div_ldi0", "clk_andgt_ldi0",
+ CLK_SET_RATE_PARENT, 0xbc, 10, 6, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_SDIO, "clk_div_sdio", "clk_andgt_sdio",
+ CLK_SET_RATE_PARENT, 0xc0, 0, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_LDI1, "clk_div_ldi1", "clk_andgt_ldi1",
+ CLK_SET_RATE_PARENT, 0xc0, 8, 6, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_SPI, "clk_div_spi", "clk_andgt_spi",
+ CLK_SET_RATE_PARENT, 0xc4, 12, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_VIVOBUS, "clk_div_vivobus", "clk_vivobus_andgt",
+ CLK_SET_RATE_PARENT, 0xd0, 7, 5, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_I2C, "clk_div_i2c", "clk_div_320m",
+ CLK_SET_RATE_PARENT, 0xe8, 4, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_UFSPHY, "clk_div_ufsphy_cfg", "clk_gate_ufsphy_gt",
+ CLK_SET_RATE_PARENT, 0xe8, 9, 2, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_CFGBUS, "clk_div_cfgbus", "clk_div_sysbus",
+ CLK_SET_RATE_PARENT, 0xec, 0, 2, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_MMC0BUS, "clk_div_mmc0bus", "autodiv_emmc0bus",
+ CLK_SET_RATE_PARENT, 0xec, 2, 1, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_MMC1BUS, "clk_div_mmc1bus", "clk_div_sysbus",
+ CLK_SET_RATE_PARENT, 0xec, 3, 1, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_UFSPERI, "clk_div_ufsperi", "clk_gate_ufs_subsys",
+ CLK_SET_RATE_PARENT, 0xec, 14, 1, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_AOMM, "clk_div_aomm", "clk_aomm_andgt",
+ CLK_SET_RATE_PARENT, 0x100, 7, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_IOPERI, "clk_div_ioperi", "clk_mux_ioperi",
+ CLK_SET_RATE_PARENT, 0x108, 11, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+};
+
+/* clk_pmuctrl */
+/* pmu register need shift 2 bits */
+static const struct hisi_gate_clock hi3660_pmu_gate_clks[] = {
+ { HI3660_GATE_ABB_192, "clk_gate_abb_192", "clkin_sys",
+ CLK_SET_RATE_PARENT, (0x10a << 2), 3, 0, },
+};
+
+/* clk_pctrl */
+static const struct hisi_gate_clock hi3660_pctrl_gate_clks[] = {
+ { HI3660_GATE_UFS_TCXO_EN, "clk_gate_ufs_tcxo_en",
+ "clk_gate_abb_192", CLK_SET_RATE_PARENT, 0x10, 0,
+ CLK_GATE_HIWORD_MASK, },
+ { HI3660_GATE_USB_TCXO_EN, "clk_gate_usb_tcxo_en", "clk_gate_abb_192",
+ CLK_SET_RATE_PARENT, 0x10, 1, CLK_GATE_HIWORD_MASK, },
+};
+
+/* clk_sctrl */
+static const struct hisi_gate_clock hi3660_sctrl_gate_sep_clks[] = {
+ { HI3660_PCLK_AO_GPIO0, "pclk_ao_gpio0", "clk_div_aobus",
+ CLK_SET_RATE_PARENT, 0x160, 11, 0, },
+ { HI3660_PCLK_AO_GPIO1, "pclk_ao_gpio1", "clk_div_aobus",
+ CLK_SET_RATE_PARENT, 0x160, 12, 0, },
+ { HI3660_PCLK_AO_GPIO2, "pclk_ao_gpio2", "clk_div_aobus",
+ CLK_SET_RATE_PARENT, 0x160, 13, 0, },
+ { HI3660_PCLK_AO_GPIO3, "pclk_ao_gpio3", "clk_div_aobus",
+ CLK_SET_RATE_PARENT, 0x160, 14, 0, },
+ { HI3660_PCLK_AO_GPIO4, "pclk_ao_gpio4", "clk_div_aobus",
+ CLK_SET_RATE_PARENT, 0x160, 21, 0, },
+ { HI3660_PCLK_AO_GPIO5, "pclk_ao_gpio5", "clk_div_aobus",
+ CLK_SET_RATE_PARENT, 0x160, 22, 0, },
+ { HI3660_PCLK_AO_GPIO6, "pclk_ao_gpio6", "clk_div_aobus",
+ CLK_SET_RATE_PARENT, 0x160, 25, 0, },
+ { HI3660_PCLK_GATE_MMBUF, "pclk_gate_mmbuf", "pclk_div_mmbuf",
+ CLK_SET_RATE_PARENT, 0x170, 23, 0, },
+ { HI3660_CLK_GATE_DSS_AXI_MM, "clk_gate_dss_axi_mm", "aclk_mux_mmbuf",
+ CLK_SET_RATE_PARENT, 0x170, 24, 0, },
+};
+
+static const struct hisi_gate_clock hi3660_sctrl_gate_clks[] = {
+ { HI3660_PCLK_MMBUF_ANDGT, "pclk_mmbuf_andgt", "clk_sw_mmbuf",
+ CLK_SET_RATE_PARENT, 0x258, 7, CLK_GATE_HIWORD_MASK, },
+ { HI3660_CLK_MMBUF_PLL_ANDGT, "clk_mmbuf_pll_andgt", "clk_ppll0",
+ CLK_SET_RATE_PARENT, 0x260, 11, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_FLL_MMBUF_ANDGT, "clk_fll_mmbuf_andgt", "clk_fll_src",
+ CLK_SET_RATE_PARENT, 0x260, 12, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_SYS_MMBUF_ANDGT, "clk_sys_mmbuf_andgt", "clkin_sys",
+ CLK_SET_RATE_PARENT, 0x260, 13, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_GATE_PCIEPHY_GT, "clk_gate_pciephy_gt", "clk_ppll0",
+ CLK_SET_RATE_PARENT, 0x268, 11, CLK_DIVIDER_HIWORD_MASK, 0, },
+};
+
+static const char *const
+aclk_mux_mmbuf_p[] = {"aclk_div_mmbuf", "clk_gate_aomm",};
+static const char *const
+clk_sw_mmbuf_p[] = {"clk_sys_mmbuf_andgt", "clk_fll_mmbuf_andgt",
+ "aclk_mux_mmbuf", "aclk_mux_mmbuf"};
+
+static const struct hisi_mux_clock hi3660_sctrl_mux_clks[] = {
+ { HI3660_ACLK_MUX_MMBUF, "aclk_mux_mmbuf", aclk_mux_mmbuf_p,
+ ARRAY_SIZE(aclk_mux_mmbuf_p), CLK_SET_RATE_PARENT, 0x250, 12, 1,
+ CLK_MUX_HIWORD_MASK, },
+ { HI3660_CLK_SW_MMBUF, "clk_sw_mmbuf", clk_sw_mmbuf_p,
+ ARRAY_SIZE(clk_sw_mmbuf_p), CLK_SET_RATE_PARENT, 0x258, 8, 2,
+ CLK_MUX_HIWORD_MASK, },
+};
+
+static const struct hisi_divider_clock hi3660_sctrl_divider_clks[] = {
+ { HI3660_CLK_DIV_AOBUS, "clk_div_aobus", "clk_ppll0",
+ CLK_SET_RATE_PARENT, 0x254, 0, 6, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_PCLK_DIV_MMBUF, "pclk_div_mmbuf", "pclk_mmbuf_andgt",
+ CLK_SET_RATE_PARENT, 0x258, 10, 2, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_ACLK_DIV_MMBUF, "aclk_div_mmbuf", "clk_mmbuf_pll_andgt",
+ CLK_SET_RATE_PARENT, 0x258, 12, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+ { HI3660_CLK_DIV_PCIEPHY, "clk_div_pciephy", "clk_gate_pciephy_gt",
+ CLK_SET_RATE_PARENT, 0x268, 12, 4, CLK_DIVIDER_HIWORD_MASK, 0, },
+};
+
+/* clk_iomcu */
+static const struct hisi_gate_clock hi3660_iomcu_gate_sep_clks[] = {
+ { HI3660_CLK_I2C0_IOMCU, "clk_i2c0_iomcu", "clk_fll_src",
+ CLK_SET_RATE_PARENT, 0x10, 3, 0, },
+ { HI3660_CLK_I2C1_IOMCU, "clk_i2c1_iomcu", "clk_fll_src",
+ CLK_SET_RATE_PARENT, 0x10, 4, 0, },
+ { HI3660_CLK_I2C2_IOMCU, "clk_i2c2_iomcu", "clk_fll_src",
+ CLK_SET_RATE_PARENT, 0x10, 5, 0, },
+ { HI3660_CLK_I2C6_IOMCU, "clk_i2c6_iomcu", "clk_fll_src",
+ CLK_SET_RATE_PARENT, 0x10, 27, 0, },
+ { HI3660_CLK_IOMCU_PERI0, "iomcu_peri0", "clk_ppll0",
+ CLK_SET_RATE_PARENT, 0x90, 0, 0, },
+};
+
+static void hi3660_clk_iomcu_init(struct device_node *np)
+{
+ struct hisi_clock_data *clk_data;
+ int nr = ARRAY_SIZE(hi3660_iomcu_gate_sep_clks);
+
+ clk_data = hisi_clk_init(np, nr);
+ if (!clk_data)
+ return;
+
+ hisi_clk_register_gate_sep(hi3660_iomcu_gate_sep_clks,
+ ARRAY_SIZE(hi3660_iomcu_gate_sep_clks),
+ clk_data);
+}
+
+static void hi3660_clk_pmuctrl_init(struct device_node *np)
+{
+ struct hisi_clock_data *clk_data;
+ int nr = ARRAY_SIZE(hi3660_pmu_gate_clks);
+
+ clk_data = hisi_clk_init(np, nr);
+ if (!clk_data)
+ return;
+
+ hisi_clk_register_gate(hi3660_pmu_gate_clks,
+ ARRAY_SIZE(hi3660_pmu_gate_clks), clk_data);
+}
+
+static void hi3660_clk_pctrl_init(struct device_node *np)
+{
+ struct hisi_clock_data *clk_data;
+ int nr = ARRAY_SIZE(hi3660_pctrl_gate_clks);
+
+ clk_data = hisi_clk_init(np, nr);
+ if (!clk_data)
+ return;
+ hisi_clk_register_gate(hi3660_pctrl_gate_clks,
+ ARRAY_SIZE(hi3660_pctrl_gate_clks), clk_data);
+}
+
+static void hi3660_clk_sctrl_init(struct device_node *np)
+{
+ struct hisi_clock_data *clk_data;
+ int nr = ARRAY_SIZE(hi3660_sctrl_gate_clks) +
+ ARRAY_SIZE(hi3660_sctrl_gate_sep_clks) +
+ ARRAY_SIZE(hi3660_sctrl_mux_clks) +
+ ARRAY_SIZE(hi3660_sctrl_divider_clks);
+
+ clk_data = hisi_clk_init(np, nr);
+ if (!clk_data)
+ return;
+ hisi_clk_register_gate(hi3660_sctrl_gate_clks,
+ ARRAY_SIZE(hi3660_sctrl_gate_clks), clk_data);
+ hisi_clk_register_gate_sep(hi3660_sctrl_gate_sep_clks,
+ ARRAY_SIZE(hi3660_sctrl_gate_sep_clks),
+ clk_data);
+ hisi_clk_register_mux(hi3660_sctrl_mux_clks,
+ ARRAY_SIZE(hi3660_sctrl_mux_clks), clk_data);
+ hisi_clk_register_divider(hi3660_sctrl_divider_clks,
+ ARRAY_SIZE(hi3660_sctrl_divider_clks),
+ clk_data);
+}
+
+static void hi3660_clk_crgctrl_init(struct device_node *np)
+{
+ struct hisi_clock_data *clk_data;
+ int nr = ARRAY_SIZE(hi3660_fixed_rate_clks) +
+ ARRAY_SIZE(hi3660_crgctrl_gate_sep_clks) +
+ ARRAY_SIZE(hi3660_crgctrl_gate_clks) +
+ ARRAY_SIZE(hi3660_crgctrl_mux_clks) +
+ ARRAY_SIZE(hi3660_crg_fixed_factor_clks) +
+ ARRAY_SIZE(hi3660_crgctrl_divider_clks);
+
+ clk_data = hisi_clk_init(np, nr);
+ if (!clk_data)
+ return;
+
+ hisi_clk_register_fixed_rate(hi3660_fixed_rate_clks,
+ ARRAY_SIZE(hi3660_fixed_rate_clks),
+ clk_data);
+ hisi_clk_register_gate_sep(hi3660_crgctrl_gate_sep_clks,
+ ARRAY_SIZE(hi3660_crgctrl_gate_sep_clks),
+ clk_data);
+ hisi_clk_register_gate(hi3660_crgctrl_gate_clks,
+ ARRAY_SIZE(hi3660_crgctrl_gate_clks),
+ clk_data);
+ hisi_clk_register_mux(hi3660_crgctrl_mux_clks,
+ ARRAY_SIZE(hi3660_crgctrl_mux_clks),
+ clk_data);
+ hisi_clk_register_fixed_factor(hi3660_crg_fixed_factor_clks,
+ ARRAY_SIZE(hi3660_crg_fixed_factor_clks),
+ clk_data);
+ hisi_clk_register_divider(hi3660_crgctrl_divider_clks,
+ ARRAY_SIZE(hi3660_crgctrl_divider_clks),
+ clk_data);
+}
+
+static const struct of_device_id hi3660_clk_match_table[] = {
+ { .compatible = "hisilicon,hi3660-crgctrl",
+ .data = (void *)HI3660_CRGCTRL },
+ { .compatible = "hisilicon,hi3660-pctrl",
+ .data = (void *)HI3660_PCTRL },
+ { .compatible = "hisilicon,hi3660-pmuctrl",
+ .data = (void *)HI3660_PMUCTRL },
+ { .compatible = "hisilicon,hi3660-sctrl",
+ .data = (void *)HI3660_SCTRL },
+ { .compatible = "hisilicon,hi3660-iomcu",
+ .data = (void *)HI3660_IOMCU },
+ { }
+};
+MODULE_DEVICE_TABLE(of, hi3660_clk_match_table);
+
+static int hi3660_clk_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = pdev->dev.of_node;
+ const struct of_device_id *of_id;
+ enum hi3660_clk_type type;
+
+ of_id = of_match_device(hi3660_clk_match_table, dev);
+ if (!of_id)
+ return -EINVAL;
+
+ type = (enum hi3660_clk_type)of_id->data;
+
+ switch (type) {
+ case HI3660_CRGCTRL:
+ hi3660_clk_crgctrl_init(np);
+ break;
+ case HI3660_PCTRL:
+ hi3660_clk_pctrl_init(np);
+ break;
+ case HI3660_PMUCTRL:
+ hi3660_clk_pmuctrl_init(np);
+ break;
+ case HI3660_SCTRL:
+ hi3660_clk_sctrl_init(np);
+ break;
+ case HI3660_IOMCU:
+ hi3660_clk_iomcu_init(np);
+ break;
+ default:
+ break;
+ }
+ return 0;
+}
+
+static struct platform_driver hi3660_clk_driver = {
+ .probe = hi3660_clk_probe,
+ .driver = {
+ .name = "hi3660-clk",
+ .of_match_table = hi3660_clk_match_table,
+ },
+};
+
+static int __init hi3660_clk_init(void)
+{
+ return platform_driver_register(&hi3660_clk_driver);
+}
+core_initcall(hi3660_clk_init);
+
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:hi3660-clk");
+MODULE_DESCRIPTION("HiSilicon Hi3660 Clock Driver");
diff --git a/include/dt-bindings/clock/hi3660-clock.h b/include/dt-bindings/clock/hi3660-clock.h
new file mode 100644
index 0000000..1c00b7f
--- /dev/null
+++ b/include/dt-bindings/clock/hi3660-clock.h
@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2016-2017 Linaro Ltd.
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DTS_HI3660_CLOCK_H
+#define __DTS_HI3660_CLOCK_H
+
+/* fixed rate clocks */
+#define HI3660_CLKIN_SYS 0
+#define HI3660_CLKIN_REF 1
+#define HI3660_CLK_FLL_SRC 2
+#define HI3660_CLK_PPLL0 3
+#define HI3660_CLK_PPLL1 4
+#define HI3660_CLK_PPLL2 5
+#define HI3660_CLK_PPLL3 6
+#define HI3660_CLK_SCPLL 7
+#define HI3660_PCLK 8
+#define HI3660_CLK_UART0_DBG 9
+#define HI3660_CLK_UART6 10
+#define HI3660_OSC32K 11
+#define HI3660_OSC19M 12
+#define HI3660_CLK_480M 13
+#define HI3660_CLK_INV 14
+
+/* clk in crgctrl */
+#define HI3660_FACTOR_UART3 15
+#define HI3660_CLK_FACTOR_MMC 16
+#define HI3660_CLK_GATE_I2C0 17
+#define HI3660_CLK_GATE_I2C1 18
+#define HI3660_CLK_GATE_I2C2 19
+#define HI3660_CLK_GATE_I2C6 20
+#define HI3660_CLK_DIV_SYSBUS 21
+#define HI3660_CLK_DIV_320M 22
+#define HI3660_CLK_DIV_A53 23
+#define HI3660_CLK_GATE_SPI0 24
+#define HI3660_CLK_GATE_SPI2 25
+#define HI3660_PCIEPHY_REF 26
+#define HI3660_CLK_ABB_USB 27
+#define HI3660_HCLK_GATE_SDIO0 28
+#define HI3660_HCLK_GATE_SD 29
+#define HI3660_CLK_GATE_AOMM 30
+#define HI3660_PCLK_GPIO0 31
+#define HI3660_PCLK_GPIO1 32
+#define HI3660_PCLK_GPIO2 33
+#define HI3660_PCLK_GPIO3 34
+#define HI3660_PCLK_GPIO4 35
+#define HI3660_PCLK_GPIO5 36
+#define HI3660_PCLK_GPIO6 37
+#define HI3660_PCLK_GPIO7 38
+#define HI3660_PCLK_GPIO8 39
+#define HI3660_PCLK_GPIO9 40
+#define HI3660_PCLK_GPIO10 41
+#define HI3660_PCLK_GPIO11 42
+#define HI3660_PCLK_GPIO12 43
+#define HI3660_PCLK_GPIO13 44
+#define HI3660_PCLK_GPIO14 45
+#define HI3660_PCLK_GPIO15 46
+#define HI3660_PCLK_GPIO16 47
+#define HI3660_PCLK_GPIO17 48
+#define HI3660_PCLK_GPIO18 49
+#define HI3660_PCLK_GPIO19 50
+#define HI3660_PCLK_GPIO20 51
+#define HI3660_PCLK_GPIO21 52
+#define HI3660_CLK_GATE_SPI3 53
+#define HI3660_CLK_GATE_I2C7 54
+#define HI3660_CLK_GATE_I2C3 55
+#define HI3660_CLK_GATE_SPI1 56
+#define HI3660_CLK_GATE_UART1 57
+#define HI3660_CLK_GATE_UART2 58
+#define HI3660_CLK_GATE_UART4 59
+#define HI3660_CLK_GATE_UART5 60
+#define HI3660_CLK_GATE_I2C4 61
+#define HI3660_CLK_GATE_DMAC 62
+#define HI3660_PCLK_GATE_DSS 63
+#define HI3660_ACLK_GATE_DSS 64
+#define HI3660_CLK_GATE_LDI1 65
+#define HI3660_CLK_GATE_LDI0 66
+#define HI3660_CLK_GATE_VIVOBUS 67
+#define HI3660_CLK_GATE_EDC0 68
+#define HI3660_CLK_GATE_TXDPHY0_CFG 69
+#define HI3660_CLK_GATE_TXDPHY0_REF 70
+#define HI3660_CLK_GATE_TXDPHY1_CFG 71
+#define HI3660_CLK_GATE_TXDPHY1_REF 72
+#define HI3660_ACLK_GATE_USB3OTG 73
+#define HI3660_CLK_GATE_SPI4 74
+#define HI3660_CLK_GATE_SD 75
+#define HI3660_CLK_GATE_SDIO0 76
+#define HI3660_CLK_GATE_UFS_SUBSYS 77
+#define HI3660_PCLK_GATE_DSI0 78
+#define HI3660_PCLK_GATE_DSI1 79
+#define HI3660_ACLK_GATE_PCIE 80
+#define HI3660_PCLK_GATE_PCIE_SYS 81
+#define HI3660_CLK_GATE_PCIEAUX 82
+#define HI3660_PCLK_GATE_PCIE_PHY 83
+#define HI3660_CLK_ANDGT_LDI0 84
+#define HI3660_CLK_ANDGT_LDI1 85
+#define HI3660_CLK_ANDGT_EDC0 86
+#define HI3660_CLK_GATE_UFSPHY_GT 87
+#define HI3660_CLK_ANDGT_MMC 88
+#define HI3660_CLK_ANDGT_SD 89
+#define HI3660_CLK_A53HPM_ANDGT 90
+#define HI3660_CLK_ANDGT_SDIO 91
+#define HI3660_CLK_ANDGT_UART0 92
+#define HI3660_CLK_ANDGT_UART1 93
+#define HI3660_CLK_ANDGT_UARTH 94
+#define HI3660_CLK_ANDGT_SPI 95
+#define HI3660_CLK_VIVOBUS_ANDGT 96
+#define HI3660_CLK_AOMM_ANDGT 97
+#define HI3660_CLK_320M_PLL_GT 98
+#define HI3660_AUTODIV_EMMC0BUS 99
+#define HI3660_AUTODIV_SYSBUS 100
+#define HI3660_CLK_GATE_UFSPHY_CFG 101
+#define HI3660_CLK_GATE_UFSIO_REF 102
+#define HI3660_CLK_MUX_SYSBUS 103
+#define HI3660_CLK_MUX_UART0 104
+#define HI3660_CLK_MUX_UART1 105
+#define HI3660_CLK_MUX_UARTH 106
+#define HI3660_CLK_MUX_SPI 107
+#define HI3660_CLK_MUX_I2C 108
+#define HI3660_CLK_MUX_MMC_PLL 109
+#define HI3660_CLK_MUX_LDI1 110
+#define HI3660_CLK_MUX_LDI0 111
+#define HI3660_CLK_MUX_SD_PLL 112
+#define HI3660_CLK_MUX_SD_SYS 113
+#define HI3660_CLK_MUX_EDC0 114
+#define HI3660_CLK_MUX_SDIO_SYS 115
+#define HI3660_CLK_MUX_SDIO_PLL 116
+#define HI3660_CLK_MUX_VIVOBUS 117
+#define HI3660_CLK_MUX_A53HPM 118
+#define HI3660_CLK_MUX_320M 119
+#define HI3660_CLK_MUX_IOPERI 120
+#define HI3660_CLK_DIV_UART0 121
+#define HI3660_CLK_DIV_UART1 122
+#define HI3660_CLK_DIV_UARTH 123
+#define HI3660_CLK_DIV_MMC 124
+#define HI3660_CLK_DIV_SD 125
+#define HI3660_CLK_DIV_EDC0 126
+#define HI3660_CLK_DIV_LDI0 127
+#define HI3660_CLK_DIV_SDIO 128
+#define HI3660_CLK_DIV_LDI1 129
+#define HI3660_CLK_DIV_SPI 130
+#define HI3660_CLK_DIV_VIVOBUS 131
+#define HI3660_CLK_DIV_I2C 132
+#define HI3660_CLK_DIV_UFSPHY 133
+#define HI3660_CLK_DIV_CFGBUS 134
+#define HI3660_CLK_DIV_MMC0BUS 135
+#define HI3660_CLK_DIV_MMC1BUS 136
+#define HI3660_CLK_DIV_UFSPERI 137
+#define HI3660_CLK_DIV_AOMM 138
+#define HI3660_CLK_DIV_IOPERI 139
+
+/* clk in pmuctrl */
+#define HI3660_GATE_ABB_192 0
+
+/* clk in pctrl */
+#define HI3660_GATE_UFS_TCXO_EN 0
+#define HI3660_GATE_USB_TCXO_EN 1
+
+/* clk in sctrl */
+#define HI3660_PCLK_AO_GPIO0 0
+#define HI3660_PCLK_AO_GPIO1 1
+#define HI3660_PCLK_AO_GPIO2 2
+#define HI3660_PCLK_AO_GPIO3 3
+#define HI3660_PCLK_AO_GPIO4 4
+#define HI3660_PCLK_AO_GPIO5 5
+#define HI3660_PCLK_AO_GPIO6 6
+#define HI3660_PCLK_GATE_MMBUF 7
+#define HI3660_CLK_GATE_DSS_AXI_MM 8
+#define HI3660_PCLK_MMBUF_ANDGT 9
+#define HI3660_CLK_MMBUF_PLL_ANDGT 10
+#define HI3660_CLK_FLL_MMBUF_ANDGT 11
+#define HI3660_CLK_SYS_MMBUF_ANDGT 12
+#define HI3660_CLK_GATE_PCIEPHY_GT 13
+#define HI3660_ACLK_MUX_MMBUF 14
+#define HI3660_CLK_SW_MMBUF 15
+#define HI3660_CLK_DIV_AOBUS 16
+#define HI3660_PCLK_DIV_MMBUF 17
+#define HI3660_ACLK_DIV_MMBUF 18
+#define HI3660_CLK_DIV_PCIEPHY 19
+
+/* clk in iomcu */
+#define HI3660_CLK_I2C0_IOMCU 0
+#define HI3660_CLK_I2C1_IOMCU 1
+#define HI3660_CLK_I2C2_IOMCU 2
+#define HI3660_CLK_I2C6_IOMCU 3
+#define HI3660_CLK_IOMCU_PERI0 4
+
+#endif /* __DTS_HI3660_CLOCK_H */
--
2.7.4
^ permalink raw reply related
* [PATCH 00/39] ARM: dts: mvebu: Fix license text
From: Stefan Roese @ 2016-12-15 6:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214223746.23066-1-alexandre.belloni@free-electrons.com>
On 14.12.2016 23:37, Alexandre Belloni wrote:
> When the license was switched to dual GPLv2/X11, the text that was used
> was missing a few characters. Fix that now.
>
> I'll let the maintainers decide whether this change requires an ack of
> every contributors. It has been separated with that in mind if
> necessary.
>
> Cc: Andrew Andrianov <andrew@ncrmnt.org>
> Cc: Arnaud Ebalard <arno@natisbad.org>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Ben Dooks <ben.dooks@codethink.co.uk>
> Cc: Benjamin Cama <benoar@dolka.fr>
> Cc: Benoit Masson <yahoo@perenite.com>
> Cc: Ben Peddell <klightspeed@killerwolves.net>
> Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
> Cc: Florian Fainelli <florian@openwrt.org>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Greg Ungerer <gerg@uclinux.org>
> Cc: Grzegorz Jaszczyk <jaz@semihalf.com>
> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> Cc: Imre Kaloz <kaloz@openwrt.org>
> Cc: Kevin Hilman <khilman@linaro.org>
> Cc: Lior Amsalem <alior@marvell.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Marcin Wojtas <mw@semihalf.com>
> Cc: Mario Lange <mario_lange@gmx.net>
> Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
> Cc: Nadav Haklai <nadavh@marvell.com>
> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
> Cc: Paul Bolle <pebolle@tiscali.nl>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: Rafa? Mi?ecki <zajec5@gmail.com>
> Cc: Roger Shimizu <rogershimizu@gmail.com>
> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
> Cc: Ryan Press <ryan@presslab.us>
> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> Cc: Simon Baatz <gmbnomis@gmail.com>
> Cc: Simon Guinot <simon.guinot@sequanux.org>
> Cc: Stefan Roese <sr@denx.de>
For the complete patch series:
Acked-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
^ permalink raw reply
* [PATCH v2] crypto: sun4i-ss: support the Security System PRNG
From: Herbert Xu @ 2016-12-15 6:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANc+2y7C-=S_5MZuqP0Q+y2FwHqS2_p9-iYuAu1A1tXqzxp_oA@mail.gmail.com>
On Thu, Dec 15, 2016 at 12:47:16AM +0530, PrasannaKumar Muralidharan wrote:
> Should there be a mandate that driver will be accepted only when it
> passes 'rngtest'. This will make sure that prng drivers won't get
> added in future.
You cannot use software to distinguish between a PRNG and an HRNG.
We can only rely on the veracity of the documentation.
Cheers,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* [RFC PATCH] Memory hotplug support for arm64 platform
From: Xishi Qiu @ 2016-12-15 6:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481717765-31186-1-git-send-email-m.bielski@virtualopensystems.com>
On 2016/12/14 20:16, Maciej Bielski wrote:
>
>
> -#ifdef CONFIG_MEMORY_HOTREMOVE
> -int arch_remove_memory(u64 start, u64 size)
> -{
> - unsigned long start_pfn = start >> PAGE_SHIFT;
> - unsigned long nr_pages = size >> PAGE_SHIFT;
> - struct zone *zone;
> - int ret;
> + SetPageReserved(pfn_to_page(pfn));
> + }
Hi Maciej,
Why we need to set reserved here?
I think the new pages are already reserved in __add_zone() -> memmap_init_zone(), right?
Thanks,
Xishi Qiu
>
> - zone = page_zone(pfn_to_page(start_pfn));
> - ret = __remove_pages(zone, start_pfn, nr_pages);
> if (ret)
> - pr_warn("%s: Problem encountered in __remove_pages() ret=%d\n",
> + pr_warn("%s: Problem encountered in __add_pages() ret=%d\n",
> __func__, ret);
>
> return ret;
> }
> #endif
> -#endif
>
> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
> index 05615a3..9efa7d1 100644
> --- a/arch/arm64/mm/mmu.c
> +++ b/arch/arm64/mm/mmu.c
> @@ -493,6 +493,30 @@ void __init paging_init(void)
> SWAPPER_DIR_SIZE - PAGE_SIZE);
> }
>
> +#ifdef CONFIG_MEMORY_HOTPLUG
> +/*
> + * hotplug_paging() is used by memory hotplug to build new page tables
> + * for hot added memory.
> + */
> +void hotplug_paging(phys_addr_t start, phys_addr_t size)
> +{
> + phys_addr_t pgd_phys = pgd_pgtable_alloc();
> + pgd_t *pgd = pgd_set_fixmap(pgd_phys);
> +
> + memcpy(pgd, swapper_pg_dir, PAGE_SIZE);
> +
> + __create_pgd_mapping(pgd, start, __phys_to_virt(start), size,
> + PAGE_KERNEL, pgd_pgtable_alloc, false);
> +
> + cpu_replace_ttbr1(__va(pgd_phys));
> + memcpy(swapper_pg_dir, pgd, PAGE_SIZE);
> + cpu_replace_ttbr1(swapper_pg_dir);
> +
> + pgd_clear_fixmap();
> + memblock_free(pgd_phys, PAGE_SIZE);
> +}
> +#endif
> +
> /*
> * Check whether a kernel address is valid (derived from arch/x86/).
> */
> diff --git a/include/linux/memblock.h b/include/linux/memblock.h
> index 5b759c9..5f78257 100644
> --- a/include/linux/memblock.h
> +++ b/include/linux/memblock.h
> @@ -92,6 +92,7 @@ int memblock_mark_hotplug(phys_addr_t base, phys_addr_t size);
> int memblock_clear_hotplug(phys_addr_t base, phys_addr_t size);
> int memblock_mark_mirror(phys_addr_t base, phys_addr_t size);
> int memblock_mark_nomap(phys_addr_t base, phys_addr_t size);
> +int memblock_clear_nomap(phys_addr_t base, phys_addr_t size);
> ulong choose_memblock_flags(void);
>
> /* Low level functions */
> diff --git a/mm/memblock.c b/mm/memblock.c
> index 7608bc3..05e7676 100644
> --- a/mm/memblock.c
> +++ b/mm/memblock.c
> @@ -814,6 +814,16 @@ int __init_memblock memblock_mark_nomap(phys_addr_t base, phys_addr_t size)
> }
>
> /**
> + * memblock_clear_nomap - Clear a flag of MEMBLOCK_NOMAP memory region
> + * @base: the base phys addr of the region
> + * @size: the size of the region
> + */
> +int __init_memblock memblock_clear_nomap(phys_addr_t base, phys_addr_t size)
> +{
> + return memblock_setclr_flag(base, size, 0, MEMBLOCK_NOMAP);
> +}
> +
> +/**
> * __next_reserved_mem_region - next function for for_each_reserved_region()
> * @idx: pointer to u64 loop variable
> * @out_start: ptr to phys_addr_t for start address of the region, can be %NULL
^ permalink raw reply
* [RFC PATCH] Memory hotplug support for arm64 platform
From: Xishi Qiu @ 2016-12-15 6:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <58523598.3080902@huawei.com>
On 2016/12/15 14:18, Xishi Qiu wrote:
> On 2016/12/14 20:16, Maciej Bielski wrote:
>
>>
>>
>> -#ifdef CONFIG_MEMORY_HOTREMOVE
>> -int arch_remove_memory(u64 start, u64 size)
>> -{
>> - unsigned long start_pfn = start >> PAGE_SHIFT;
>> - unsigned long nr_pages = size >> PAGE_SHIFT;
>> - struct zone *zone;
>> - int ret;
>> + SetPageReserved(pfn_to_page(pfn));
>> + }
>
> Hi Maciej,
>
> Why we need to set reserved here?
> I think the new pages are already reserved in __add_zone() -> memmap_init_zone(), right?
>
Hi Maciej,
The reason is as follows, right?
It's because that in memmap_init_zone() -> early_pfn_valid(), the new page is still
invalid, so we need to init it after memblock_clear_nomap()
So why not use __init_single_page() and set_pageblock_migratetype()?
> Thanks,
> Xishi Qiu
>
^ permalink raw reply
* [PATCH 3/3] arm64: dts: rockchip: add clk-480m for ehci and ohci of rk3399
From: Frank Wang @ 2016-12-15 6:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5ce521da-119a-2de8-026c-5992fedfef43@rock-chips.com>
Hi Brain, Doug and Heiko,
I would like to summarize why this story was constructed.
The ehci/ohci-platform suspend process are blocked due to UTMI clock
which directly output from usb-phy has been disabled, and why the UTMI
clock was disabled?
UTMI clock and 480m clock all output from the same internal PLL of
usb-phy, and there is only one bit can use to control this PLL on or
off, which we named "otg_commononn"(GRF, offset 0x0e450/0x0e460 bit4 )
in RK3399 TRM.
When system boot up, ehci/ohci-platform probe function invoke
phy_power_on(), further invoke rockchip_usb2phy_power_on() to enable
480m clock, actually, it sets the otg_commononn bit on, and then usb-phy
will go to (auto)suspend if there is no devices plug-in after 1 minute,
the rockchip_usb2phy_power_off() will be invoked and the 480m clock may
be disabled in the (auto)suspend process. As a result, the otg_commononn
bit may be turned off, and all output clock of usb-phy will be disabled.
However, ehci/ohci-platform PM suspend operation (read/write controller
register) are based on the UTMI clock.
So we introduced "clk_usbphy0_480m_src"/"clk_usbphy1_480m_src" as one
input clock for ehci/ohci-platform, in this way, the otg_commononn bit
is not turned off until ehci/ohci-platform go to PM suspend.
BR.
Frank
On 2016/12/15 10:41, Xing Zheng wrote:
> // Frank
>
> Hi Doug, Brain,
> Thanks for the reply.
> Sorry I forgot these patches have been sent earlier, and Frank
> have some explained and discussed with Heiko.
> Please see https://patchwork.kernel.org/patch/9255245/
> Perhaps we can move to that patch tree to continue the discussion.
>
> I think Frank and William will help us to continue checking these.
>
> Thanks
>
> ? 2016?12?15? 08:10, Doug Anderson ??:
>> Hi,
>>
>> On Wed, Dec 14, 2016 at 2:11 AM, Xing Zheng
>> <zhengxing@rock-chips.com> wrote:
>>> From: William wu <wulf@rock-chips.com>
>>>
>>> We found that the suspend process was blocked when it run into
>>> ehci/ohci module due to clk-480m of usb2-phy was disabled.
>>>
>>> The root cause is that usb2-phy suspended earlier than ehci/ohci
>>> (usb2-phy will be auto suspended if no devices plug-in).
>> This is really weird, but I can confirm it is true on my system too
>> (kernel-4.4 based). At least I see:
>>
>> [ 208.012065] calling usb1+ @ 4984, parent: fe380000.usb, cb:
>> usb_dev_suspend
>> [ 208.569112] calling ff770000.syscon:usb2-phy at e450+ @ 4983, parent:
>> ff770000.syscon, cb: platform_pm_suspend
>> [ 208.569113] call ff770000.syscon:usb2-phy at e450+ returned 0 after 0
>> usecs
>> [ 208.569439] calling fe380000.usb+ @ 4983, parent: platform, cb:
>> platform_pm_suspend
>> [ 208.569444] call fe380000.usb+ returned 0 after 4 usecs
>>
>>
>> In general I thought that suspend order was supposed to be related to
>> probe order. So if your probe order is A, B, C then your suspend
>> order would be C, B, A. ...and we know for sure that the USB PHY
>> needs to probe _before_ the main USB controller. If it didn't then
>> you'd get an EPROBE_DEFER in the USB controller, right? So that means
>> that the USB controller should be suspending before its PHY.
>>
>> Any chance this is somehow related to async probe? I'm not a huge
>> expert on async probe but I guess I could imagine things getting
>> confused if you had a sequence like this:
>>
>> 1. Start USB probe (async)
>> 2. Start PHY probe
>> 3. Finish PHY probe
>> 4. In USB probe, ask for PHY--no problems since PHY probe finished
>> 5. Finish USB probe
>>
>> The probe order would be USB before PHY even though the USB probe
>> _depended_ on the PHY probe being finished... :-/ Anyway, probably
>> I'm just misunderstanding something and someone can tell me how dumb I
>> am...
>>
>> I also notice that the ehci_platform_power_off() function we're
>> actually making PHY commands right before the same commands that turn
>> off our clocks. Presumably those commands aren't really so good to do
>> if the PHY has already been suspended?
>>
>> Actually, does the PHY suspend from platform_pm_suspend() actually
>> even do anything? It doesn't look like it. It looks as if all the
>> PHY cares about is init/exit and on/off... ...and it looks as if the
>> PHY should be turned off by the EHCI controller at about the same time
>> it turns off its clocks...
>>
>> I haven't fully dug, but is there any chance that things are getting
>> confused between the OTG PHY and the Host PHY? Maybe when we turn off
>> the OTG PHY it turns off something that the host PHY needs?
>>
>>
>>> and the
>>> clk-480m provided by it was disabled if no module used. However,
>>> some suspend process related ehci/ohci are base on this clock,
>>> so we should refer it into ehci/ohci driver to prevent this case.
>> Though I don't actually have details about the internals of the chip,
>> it does seem highly likely that the USB block actually uses this clock
>> for some things, so it doesn't seem insane (to me) to have the USB
>> controller request that the clock be on. So, in general, I don't have
>> lots of objections to including the USB PHY Clock here.
>>
>> ...but I think you have the wrong clock (please correct me if I'm
>> wrong). I think you really wanted your input clock to be
>> "clk_usbphy0_480m", not "clk_usbphy0_480m_src". Specifically I
>> believe there is a gate between the clock outputted by the PHY and the
>> USB Controller itself. I'm guessing that the gate is only there
>> between the PHY and the "clk_usbphy_480m" MUX.
>>
>> As evidence, I have a totally functioning system right now where
>> "clk_usbphy0_480m_src" is currently gated.
>>
>> That means really you should be changing your clocks to this (untested):
>>
>> clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
>> <&u2phy0>;
>>
>> ...and then you could drop the other two patches in this series.
>>
>> ===
>>
>> OK, I actually briefly tested my proposed change and it at least seems
>> to build and boot OK. You'd have to test it to make sure it makes
>> your tests pass...
>>
>> ===
>>
>> So I guess to summarize all the above:
>>
>> * It seems to me like there's some deeper root cause and your patch
>> will at most put a band-aid on it. Seems like digging out the root
>> cause is a good idea.
>>
>> * Though I don't believe it solves the root problem, the idea of the
>> USB Controller holding onto the PHY clock doesn't seem wrong.
>>
>> * You're holding onto the wrong clock in your patch--you want the one
>> before the gate (I think).
>>
>>
>> -Doug
>>
>>
>>
>
>
^ permalink raw reply
* [PATCHv6] support for AD5820 camera auto-focus coil
From: Sakari Ailus @ 2016-12-15 6:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214150819.GW4920@atomide.com>
Hi Pali and Tony,
On Wed, Dec 14, 2016 at 07:08:19AM -0800, Tony Lindgren wrote:
> * Pali Roh?r <pali.rohar@gmail.com> [161214 05:38]:
> > On Monday 08 August 2016 23:41:32 Pavel Machek wrote:
> > > On Mon 2016-08-08 11:09:56, Sakari Ailus wrote:
> > > > On Fri, Aug 05, 2016 at 12:26:11PM +0200, Pavel Machek wrote:
> > > > > This adds support for AD5820 autofocus coil, found for example in
> > > > > Nokia N900 smartphone.
> > > >
> > > > Thanks, Pavel!
> > > >
> > > > Let's use V4L2_CID_FOCUS_ABSOLUTE, as is in the patch. If we get
> > > > something better in the future, we'll switch to that then.
> > > >
> > > > I've applied this to ad5820 branch in my tree.
> > >
> > > Thanks. If I understands things correctly, both DTS patch and this
> > > patch are waiting in your tree, so we should be good to go for 4.9
> > > (unless some unexpected problems surface)?
> > >
> > > Best regards,
> > > Pavel
> >
> > Was DTS patch merged into 4.9? At least I do not see updated that dts
> > file omap3-n900.dts in linus tree...
>
> If it's not in current mainline or next, it's off my radar so sounds
> like I've somehow missed it and needs resending..
Where's this patch? I remember seeing the driver patch and the DT
documentation but no actual DT source patch for the N900.
--
Kind regards,
Sakari Ailus
e-mail: sakari.ailus at iki.fi XMPP: sailus at retiisi.org.uk
^ permalink raw reply
* Need some information about IOMMU support for ARM64 in 4.6
From: Bhargav Shah @ 2016-12-15 6:50 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
I am using kernel version 4.6.
of_iommu_configure() gets IOMMU ops from of_iommu_list and call arch_setup_dma_ops.
Presently, __iommu_setup_dma_ops() it expects iommu ops to be present.
Here, of_iommu_configure() get NULL iommu ops and it calls arch_setup_dma_ops with it.
So, in my current flow iommu ops is not getting set for device.
Am I missing something which is causing this ?
What is proper way to set iommu ops to device ?
Thanks
Bhargav
^ permalink raw reply
* [PATCH 8/8] Makefile: drop -D__CHECK_ENDIAN__ from cflags
From: Marcel Holtmann @ 2016-12-15 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481778865-27667-9-git-send-email-mst@redhat.com>
Hi Michael,
> That's the default now, no need for makefiles to set it.
>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> ---
> drivers/bluetooth/Makefile | 2 --
> drivers/net/can/Makefile | 1 -
> drivers/net/ethernet/altera/Makefile | 1 -
> drivers/net/ethernet/atheros/alx/Makefile | 1 -
> drivers/net/ethernet/freescale/Makefile | 2 --
> drivers/net/wireless/ath/Makefile | 2 --
> drivers/net/wireless/ath/wil6210/Makefile | 2 --
> drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile | 2 --
> drivers/net/wireless/broadcom/brcm80211/brcmsmac/Makefile | 1 -
> drivers/net/wireless/intel/iwlegacy/Makefile | 2 --
> drivers/net/wireless/intel/iwlwifi/Makefile | 2 +-
> drivers/net/wireless/intel/iwlwifi/dvm/Makefile | 2 +-
> drivers/net/wireless/intel/iwlwifi/mvm/Makefile | 2 +-
> drivers/net/wireless/intersil/orinoco/Makefile | 3 ---
> drivers/net/wireless/mediatek/mt7601u/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/btcoexist/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8188ee/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8192c/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8192ce/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8192cu/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8192de/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8192ee/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8192se/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8723ae/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8723be/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8723com/Makefile | 2 --
> drivers/net/wireless/realtek/rtlwifi/rtl8821ae/Makefile | 2 --
> drivers/net/wireless/ti/wl1251/Makefile | 2 --
> drivers/net/wireless/ti/wlcore/Makefile | 2 --
> drivers/staging/rtl8188eu/Makefile | 2 +-
> drivers/staging/rtl8192e/Makefile | 2 --
> drivers/staging/rtl8192e/rtl8192e/Makefile | 2 --
> net/bluetooth/Makefile | 2 --
> net/ieee802154/Makefile | 2 --
> net/mac80211/Makefile | 2 +-
> net/mac802154/Makefile | 2 --
> net/wireless/Makefile | 2 --
> 38 files changed, 5 insertions(+), 68 deletions(-)
for drivers/bluetooth, net/bluetooth, net/ieee802154 and net/mac802154
Acked-by: Marcel Holtmann <marcel@holtmann.org>
Regards
Marcel
^ permalink raw reply
* [PATCH 03/39] ARM: dts: armada-370: Correct license text
From: Uwe Kleine-König @ 2016-12-15 7:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214223746.23066-4-alexandre.belloni@free-electrons.com>
On Wed, Dec 14, 2016 at 11:37:10PM +0100, Alexandre Belloni wrote:
> The license test has been mangled at some point then copy pasted across
> multiple files. Restore it to what it should be.
> Note that this is not intended as a license change.
>
> Cc: Arnaud Ebalard <arno@natisbad.org>
> Cc: Ben Dooks <ben.dooks@codethink.co.uk>
> Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
> Cc: Lior Amsalem <alior@marvell.com>
> Cc: Ryan Press <ryan@presslab.us>
> Cc: Simon Guinot <simon.guinot@sequanux.org>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
Acked-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> Cc: Yehuda Yitschak <yehuday@marvell.com>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
> arch/arm/boot/dts/armada-370.dtsi | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
> index b4258105e91f..c057c54f6b36 100644
> --- a/arch/arm/boot/dts/armada-370.dtsi
> +++ b/arch/arm/boot/dts/armada-370.dtsi
> @@ -17,17 +17,17 @@
> * published by the Free Software Foundation; either version 2 of the
> * License, or (at your option) any later version.
> *
> - * This file is distributed in the hope that it will be useful
> + * This file is distributed in the hope that it will be useful,
> * but WITHOUT ANY WARRANTY; without even the implied warranty of
> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> * GNU General Public License for more details.
> *
> - * Or, alternatively
> + * Or, alternatively,
> *
> * b) Permission is hereby granted, free of charge, to any person
> * obtaining a copy of this software and associated documentation
> * files (the "Software"), to deal in the Software without
> - * restriction, including without limitation the rights to use
> + * restriction, including without limitation the rights to use,
> * copy, modify, merge, publish, distribute, sublicense, and/or
> * sell copies of the Software, and to permit persons to whom the
> * Software is furnished to do so, subject to the following
> @@ -36,11 +36,11 @@
> * The above copyright notice and this permission notice shall be
> * included in all copies or substantial portions of the Software.
> *
> - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> * OTHER DEALINGS IN THE SOFTWARE.
> --
> 2.10.2
>
>
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH v9 01/11] arm/arm64: vgic: Implement support for userspace access
From: Vijay Kilari @ 2016-12-15 7:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20c63256-48f7-692c-1c6c-c4fcdb82f401@redhat.com>
On Tue, Dec 6, 2016 at 5:12 PM, Auger Eric <eric.auger@redhat.com> wrote:
> Hi,
>
> On 28/11/2016 14:05, Christoffer Dall wrote:
>> On Wed, Nov 23, 2016 at 06:31:48PM +0530, vijay.kilari at gmail.com wrote:
>>> From: Vijaya Kumar K <Vijaya.Kumar@cavium.com>
>>>
>>> Read and write of some registers like ISPENDR and ICPENDR
>>> from userspace requires special handling when compared to
>>> guest access for these registers.
>>>
>>> Refer to Documentation/virtual/kvm/devices/arm-vgic-v3.txt
>>> for handling of ISPENDR, ICPENDR registers handling.
>>>
>>> Add infrastructure to support guest and userspace read
>>> and write for the required registers
>>> Also moved vgic_uaccess from vgic-mmio-v2.c to vgic-mmio.c
>>>
>>> Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@cavium.com>
>>> ---
>>> virt/kvm/arm/vgic/vgic-mmio-v2.c | 25 ----------
>>> virt/kvm/arm/vgic/vgic-mmio-v3.c | 102 ++++++++++++++++++++++++++++++++-------
>>> virt/kvm/arm/vgic/vgic-mmio.c | 78 +++++++++++++++++++++++++++---
>>> virt/kvm/arm/vgic/vgic-mmio.h | 19 ++++++++
>>> 4 files changed, 175 insertions(+), 49 deletions(-)
>>>
>>> diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c
>>> index b44b359..0b32f40 100644
>>> --- a/virt/kvm/arm/vgic/vgic-mmio-v2.c
>>> +++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c
>>> @@ -406,31 +406,6 @@ int vgic_v2_has_attr_regs(struct kvm_device *dev, struct kvm_device_attr *attr)
>>> return -ENXIO;
>>> }
>>>
>>> -/*
>>> - * When userland tries to access the VGIC register handlers, we need to
>>> - * create a usable struct vgic_io_device to be passed to the handlers and we
>>> - * have to set up a buffer similar to what would have happened if a guest MMIO
>>> - * access occurred, including doing endian conversions on BE systems.
>>> - */
>>> -static int vgic_uaccess(struct kvm_vcpu *vcpu, struct vgic_io_device *dev,
>>> - bool is_write, int offset, u32 *val)
>>> -{
>>> - unsigned int len = 4;
>>> - u8 buf[4];
>>> - int ret;
>>> -
>>> - if (is_write) {
>>> - vgic_data_host_to_mmio_bus(buf, len, *val);
>>> - ret = kvm_io_gic_ops.write(vcpu, &dev->dev, offset, len, buf);
>>> - } else {
>>> - ret = kvm_io_gic_ops.read(vcpu, &dev->dev, offset, len, buf);
>>> - if (!ret)
>>> - *val = vgic_data_mmio_bus_to_host(buf, len);
>>> - }
>>> -
>>> - return ret;
>>> -}
>>> -
>>> int vgic_v2_cpuif_uaccess(struct kvm_vcpu *vcpu, bool is_write,
>>> int offset, u32 *val)
>>> {
>>> diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c
>>> index 50f42f0..8e76d04 100644
>>> --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c
>>> +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c
>>> @@ -207,6 +207,66 @@ static unsigned long vgic_mmio_read_v3_idregs(struct kvm_vcpu *vcpu,
>>> return 0;
>>> }
>>>
>>> +static unsigned long vgic_v3_uaccess_read_pending(struct kvm_vcpu *vcpu,
>>> + gpa_t addr, unsigned int len)
>>> +{
>>> + u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
>>> + u32 value = 0;
>>> + int i;
>>> +
>>> + /*
>>> + * A level triggerred interrupt pending state is latched in both
>>> + * "soft_pending" and "line_level" variables. Userspace will save
>>> + * and restore soft_pending and line_level separately.
>>> + * Refer to Documentation/virtual/kvm/devices/arm-vgic-v3.txt
>>> + * handling of ISPENDR and ICPENDR.
>>> + */
>>> + for (i = 0; i < len * 8; i++) {
>>> + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
>>> +
>>> + if (irq->config == VGIC_CONFIG_LEVEL && irq->soft_pending)
>>> + value |= (1U << i);
>>> + if (irq->config == VGIC_CONFIG_EDGE && irq->pending)
>>> + value |= (1U << i);
>>> +
>>> + vgic_put_irq(vcpu->kvm, irq);
>>> + }
>>> +
>>> + return value;
>>> +}
>>> +
>>> +static void vgic_v3_uaccess_write_pending(struct kvm_vcpu *vcpu,
>>> + gpa_t addr, unsigned int len,
>>> + unsigned long val)
>>> +{
>>> + u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
>>> + int i;
>>> +
>>> + for (i = 0; i < len * 8; i++) {
>>> + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
>>> +
>>> + spin_lock(&irq->irq_lock);
>>> + if (test_bit(i, &val)) {
>>> + /* soft_pending is set irrespective of irq type
>>> + * (level or edge) to avoid dependency that VM should
>>> + * restore irq config before pending info.
>>> + */
>>
>> nit: kernel commenting style
>>
>>> + irq->pending = true;
>>> + irq->soft_pending = true;
>>> + vgic_queue_irq_unlock(vcpu->kvm, irq);
>>> + } else {
>>> + irq->soft_pending = false;
>>> + if (irq->config == VGIC_CONFIG_EDGE ||
>>> + (irq->config == VGIC_CONFIG_LEVEL &&
>>> + !irq->line_level))
>>> + irq->pending = false;
> I am confused by the comment above. Since we test the irq config here
> don't we assume the config was restored before the pending state?
>>> + spin_unlock(&irq->irq_lock);
>>> + }
>>> +
>>> + vgic_put_irq(vcpu->kvm, irq);
>>> + }
>>> +}
>>> +
>>> /* We want to avoid outer shareable. */
>>> u64 vgic_sanitise_shareability(u64 field)
>>> {
>>> @@ -356,7 +416,7 @@ static void vgic_mmio_write_pendbase(struct kvm_vcpu *vcpu,
>>> * We take some special care here to fix the calculation of the register
>>> * offset.
>>> */
>>> -#define REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(off, rd, wr, bpi, acc) \
>>> +#define REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(off, rd, wr, ur, uw, bpi, acc) \
>>> { \
>>> .reg_offset = off, \
>>> .bits_per_irq = bpi, \
>>> @@ -371,6 +431,8 @@ static void vgic_mmio_write_pendbase(struct kvm_vcpu *vcpu,
>>> .access_flags = acc, \
>>> .read = rd, \
>>> .write = wr, \
>>> + .uaccess_read = ur, \
>>> + .uaccess_write = uw, \
>>> }
>>>
>>> static const struct vgic_register_region vgic_v3_dist_registers[] = {
>>> @@ -378,40 +440,42 @@ static void vgic_mmio_write_pendbase(struct kvm_vcpu *vcpu,
>>> vgic_mmio_read_v3_misc, vgic_mmio_write_v3_misc, 16,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_IGROUPR,
>>> - vgic_mmio_read_rao, vgic_mmio_write_wi, 1,
>>> + vgic_mmio_read_rao, vgic_mmio_write_wi, NULL, NULL, 1,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ISENABLER,
>>> - vgic_mmio_read_enable, vgic_mmio_write_senable, 1,
>>> + vgic_mmio_read_enable, vgic_mmio_write_senable, NULL, NULL, 1,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICENABLER,
>>> - vgic_mmio_read_enable, vgic_mmio_write_cenable, 1,
>>> + vgic_mmio_read_enable, vgic_mmio_write_cenable, NULL, NULL, 1,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ISPENDR,
>>> - vgic_mmio_read_pending, vgic_mmio_write_spending, 1,
>>> + vgic_mmio_read_pending, vgic_mmio_write_spending,
>>> + vgic_v3_uaccess_read_pending, vgic_v3_uaccess_write_pending, 1,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICPENDR,
>>> - vgic_mmio_read_pending, vgic_mmio_write_cpending, 1,
>>> + vgic_mmio_read_pending, vgic_mmio_write_cpending,
>>> + vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ISACTIVER,
>>> - vgic_mmio_read_active, vgic_mmio_write_sactive, 1,
>>> + vgic_mmio_read_active, vgic_mmio_write_sactive, NULL, NULL, 1,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICACTIVER,
>>> - vgic_mmio_read_active, vgic_mmio_write_cactive, 1,
>>> + vgic_mmio_read_active, vgic_mmio_write_cactive, NULL, NULL, 1,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_IPRIORITYR,
>>> - vgic_mmio_read_priority, vgic_mmio_write_priority, 8,
>>> - VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
>>> + vgic_mmio_read_priority, vgic_mmio_write_priority, NULL, NULL,
>>> + 8, VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ITARGETSR,
>>> - vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
>>> + vgic_mmio_read_raz, vgic_mmio_write_wi, NULL, NULL, 8,
>>> VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICFGR,
>>> - vgic_mmio_read_config, vgic_mmio_write_config, 2,
>>> + vgic_mmio_read_config, vgic_mmio_write_config, NULL, NULL, 2,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_IGRPMODR,
>>> - vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
>>> + vgic_mmio_read_raz, vgic_mmio_write_wi, NULL, NULL, 1,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_IROUTER,
>>> - vgic_mmio_read_irouter, vgic_mmio_write_irouter, 64,
>>> + vgic_mmio_read_irouter, vgic_mmio_write_irouter, NULL, NULL, 64,
>>> VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_LENGTH(GICD_IDREGS,
>>> vgic_mmio_read_v3_idregs, vgic_mmio_write_wi, 48,
>>> @@ -449,11 +513,13 @@ static void vgic_mmio_write_pendbase(struct kvm_vcpu *vcpu,
>>> REGISTER_DESC_WITH_LENGTH(GICR_ICENABLER0,
>>> vgic_mmio_read_enable, vgic_mmio_write_cenable, 4,
>>> VGIC_ACCESS_32bit),
>>> - REGISTER_DESC_WITH_LENGTH(GICR_ISPENDR0,
>>> - vgic_mmio_read_pending, vgic_mmio_write_spending, 4,
>>> + REGISTER_DESC_WITH_LENGTH_UACCESS(GICR_ISPENDR0,
>>> + vgic_mmio_read_pending, vgic_mmio_write_spending,
>>> + vgic_v3_uaccess_read_pending, vgic_v3_uaccess_write_pending, 4,
>>> VGIC_ACCESS_32bit),
>>> - REGISTER_DESC_WITH_LENGTH(GICR_ICPENDR0,
>>> - vgic_mmio_read_pending, vgic_mmio_write_cpending, 4,
>>> + REGISTER_DESC_WITH_LENGTH_UACCESS(GICR_ICPENDR0,
>>> + vgic_mmio_read_pending, vgic_mmio_write_cpending,
>>> + vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
>>> VGIC_ACCESS_32bit),
>>> REGISTER_DESC_WITH_LENGTH(GICR_ISACTIVER0,
>>> vgic_mmio_read_active, vgic_mmio_write_sactive, 4,
>>> diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c
>>> index ebe1b9f..d5f3ee2 100644
>>> --- a/virt/kvm/arm/vgic/vgic-mmio.c
>>> +++ b/virt/kvm/arm/vgic/vgic-mmio.c
>>> @@ -484,6 +484,74 @@ static bool check_region(const struct kvm *kvm,
>>> return false;
>>> }
>>>
>>> +static const struct vgic_register_region *
>>> +vgic_get_mmio_region(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev,
>>> + gpa_t addr, int len)
>>> +{
>>> + const struct vgic_register_region *region;
>>> +
>>> + region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions,
>>> + addr - iodev->base_addr);
>>> + if (!region || !check_region(vcpu->kvm, region, addr, len))
>>> + return NULL;
>>> +
>>> + return region;
>>> +}
>>> +
>>> +static int vgic_uaccess_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
>>> + gpa_t addr, u32 *val)
>>> +{
>>> + struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev);
>>> + const struct vgic_register_region *region;
>>> + struct kvm_vcpu *r_vcpu;
>>> +
>>> + region = vgic_get_mmio_region(vcpu, iodev, addr, sizeof(u32));
>>> + if (!region) {
>>> + *val = 0;
>>> + return 0;
> do we really want to return 0 here? -ENXIO?
> I see that dispatch_mmio_read/write return 0 in that case but I don't
> see any reason either? Other kvm_io_device_ops seem to return
> -EOPNOTSUPP in such a case.
Yes, This was discussed and decided to fix it outside of this series.
https://www.spinics.net/lists/arm-kernel/msg533695.html
^ permalink raw reply
* [PATCH 08/37] ARM: dts: imx6q-apalis-ixora: Correct license text
From: Marcel Ziswiler @ 2016-12-15 7:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214235746.7108-9-alexandre.belloni@free-electrons.com>
On Thu, 2016-12-15 at 00:57 +0100, Alexandre Belloni wrote:
> The license test has been mangled at some point then copy pasted
> across
> multiple files. Restore it to what it should be.
> Note that this is not intended as a license change.
>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Juergen Borleis <jbe@pengutronix.de>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Cc: Petr ?tetiar <ynezz@true.cz>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-
> electrons.com>
Acked-by:?Marcel Ziswiler <marcel.ziswiler@toradex.com>
> ---
> ?arch/arm/boot/dts/imx6q-apalis-ixora.dts | 10 +++++-----
> ?1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
> b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
> index 207b85b91ada..97b9b53a5086 100644
> --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
> +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
> @@ -12,17 +12,17 @@
> ? *?????modify it under the terms of the GNU General Public License
> ? *?????version 2 as published by the Free Software Foundation.
> ? *
> - *?????This file is distributed in the hope that it will be useful
> + *?????This file is distributed in the hope that it will be useful,
> ? *?????but WITHOUT ANY WARRANTY; without even the implied warranty
> of
> ? *?????MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.??See the
> ? *?????GNU General Public License for more details.
> ? *
> - * Or, alternatively
> + * Or, alternatively,
> ? *
> ? *??b) Permission is hereby granted, free of charge, to any person
> ? *?????obtaining a copy of this software and associated
> documentation
> ? *?????files (the "Software"), to deal in the Software without
> - *?????restriction, including without limitation the rights to use
> + *?????restriction, including without limitation the rights to use,
> ? *?????copy, modify, merge, publish, distribute, sublicense, and/or
> ? *?????sell copies of the Software, and to permit persons to whom
> the
> ? *?????Software is furnished to do so, subject to the following
> @@ -31,11 +31,11 @@
> ? *?????The above copyright notice and this permission notice shall
> be
> ? *?????included in all copies or substantial portions of the
> Software.
> ? *
> - *?????THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + *?????THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
> KIND,
> ? *?????EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
> WARRANTIES
> ? *?????OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> ? *?????NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> ? *?????WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> ? *?????FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> ? *?????OTHER DEALINGS IN THE SOFTWARE.
^ permalink raw reply
* [PATCH 15/37] ARM: dts: imx6qdl-apalis: Correct license text
From: Marcel Ziswiler @ 2016-12-15 7:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214235746.7108-16-alexandre.belloni@free-electrons.com>
On Thu, 2016-12-15 at 00:57 +0100, Alexandre Belloni wrote:
> The license test has been mangled at some point then copy pasted
> across
> multiple files. Restore it to what it should be.
> Note that this is not intended as a license change.
>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Cc: Petr ?tetiar <ynezz@true.cz>
> Cc: Uwe Kleine-K?nig <uwe@kleine-koenig.org>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-
> electrons.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> ---
> ?arch/arm/boot/dts/imx6qdl-apalis.dtsi | 10 +++++-----
> ?1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> index 99e323b57261..261ad3010ba8 100644
> --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> @@ -12,17 +12,17 @@
> ? *?????modify it under the terms of the GNU General Public License
> ? *?????version 2 as published by the Free Software Foundation.
> ? *
> - *?????This file is distributed in the hope that it will be useful
> + *?????This file is distributed in the hope that it will be useful,
> ? *?????but WITHOUT ANY WARRANTY; without even the implied warranty
> of
> ? *?????MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.??See the
> ? *?????GNU General Public License for more details.
> ? *
> - * Or, alternatively
> + * Or, alternatively,
> ? *
> ? *??b) Permission is hereby granted, free of charge, to any person
> ? *?????obtaining a copy of this software and associated
> documentation
> ? *?????files (the "Software"), to deal in the Software without
> - *?????restriction, including without limitation the rights to use
> + *?????restriction, including without limitation the rights to use,
> ? *?????copy, modify, merge, publish, distribute, sublicense, and/or
> ? *?????sell copies of the Software, and to permit persons to whom
> the
> ? *?????Software is furnished to do so, subject to the following
> @@ -31,11 +31,11 @@
> ? *?????The above copyright notice and this permission notice shall
> be
> ? *?????included in all copies or substantial portions of the
> Software.
> ? *
> - *?????THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + *?????THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
> KIND,
> ? *?????EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
> WARRANTIES
> ? *?????OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> ? *?????NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> ? *?????WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> ? *?????FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> ? *?????OTHER DEALINGS IN THE SOFTWARE.
^ permalink raw reply
* [PATCH] ARM: dts: tegra124-apalis: Correct license text
From: Marcel Ziswiler @ 2016-12-15 7:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161215000451.8394-1-alexandre.belloni@free-electrons.com>
On Thu, 2016-12-15 at 01:04 +0100, Alexandre Belloni wrote:
> The license test has been mangled at some point then copy pasted
> across
> multiple files. Restore it to what it should be.
> Note that this is not intended as a license change.
>
> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-
> electrons.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> ---
> ?arch/arm/boot/dts/tegra124-apalis-emc.dtsi | 10 +++++-----
> ?arch/arm/boot/dts/tegra124-apalis-eval.dts | 10 +++++-----
> ?arch/arm/boot/dts/tegra124-apalis.dtsi?????| 10 +++++-----
> ?3 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra124-apalis-emc.dtsi
> b/arch/arm/boot/dts/tegra124-apalis-emc.dtsi
> index ca2c3a557895..0e3013ff6c63 100644
> --- a/arch/arm/boot/dts/tegra124-apalis-emc.dtsi
> +++ b/arch/arm/boot/dts/tegra124-apalis-emc.dtsi
> @@ -10,17 +10,17 @@
> ? *?????modify it under the terms of the GNU General Public License
> ? *?????version 2 as published by the Free Software Foundation.
> ? *
> - *?????This file is distributed in the hope that it will be useful
> + *?????This file is distributed in the hope that it will be useful,
> ? *?????but WITHOUT ANY WARRANTY; without even the implied warranty
> of
> ? *?????MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.??See the
> ? *?????GNU General Public License for more details.
> ? *
> - * Or, alternatively
> + * Or, alternatively,
> ? *
> ? *??b) Permission is hereby granted, free of charge, to any person
> ? *?????obtaining a copy of this software and associated
> documentation
> ? *?????files (the "Software"), to deal in the Software without
> - *?????restriction, including without limitation the rights to use
> + *?????restriction, including without limitation the rights to use,
> ? *?????copy, modify, merge, publish, distribute, sublicense, and/or
> ? *?????sell copies of the Software, and to permit persons to whom
> the
> ? *?????Software is furnished to do so, subject to the following
> @@ -29,11 +29,11 @@
> ? *?????The above copyright notice and this permission notice shall
> be
> ? *?????included in all copies or substantial portions of the
> Software.
> ? *
> - *?????THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + *?????THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
> KIND,
> ? *?????EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
> WARRANTIES
> ? *?????OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> ? *?????NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> ? *?????WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> ? *?????FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> ? *?????OTHER DEALINGS IN THE SOFTWARE.
> diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts
> b/arch/arm/boot/dts/tegra124-apalis-eval.dts
> index 653044a44f0d..dec449f7b574 100644
> --- a/arch/arm/boot/dts/tegra124-apalis-eval.dts
> +++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts
> @@ -10,17 +10,17 @@
> ? *?????modify it under the terms of the GNU General Public License
> ? *?????version 2 as published by the Free Software Foundation.
> ? *
> - *?????This file is distributed in the hope that it will be useful
> + *?????This file is distributed in the hope that it will be useful,
> ? *?????but WITHOUT ANY WARRANTY; without even the implied warranty
> of
> ? *?????MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.??See the
> ? *?????GNU General Public License for more details.
> ? *
> - * Or, alternatively
> + * Or, alternatively,
> ? *
> ? *??b) Permission is hereby granted, free of charge, to any person
> ? *?????obtaining a copy of this software and associated
> documentation
> ? *?????files (the "Software"), to deal in the Software without
> - *?????restriction, including without limitation the rights to use
> + *?????restriction, including without limitation the rights to use,
> ? *?????copy, modify, merge, publish, distribute, sublicense, and/or
> ? *?????sell copies of the Software, and to permit persons to whom
> the
> ? *?????Software is furnished to do so, subject to the following
> @@ -29,11 +29,11 @@
> ? *?????The above copyright notice and this permission notice shall
> be
> ? *?????included in all copies or substantial portions of the
> Software.
> ? *
> - *?????THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + *?????THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
> KIND,
> ? *?????EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
> WARRANTIES
> ? *?????OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> ? *?????NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> ? *?????WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> ? *?????FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> ? *?????OTHER DEALINGS IN THE SOFTWARE.
> diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
> b/arch/arm/boot/dts/tegra124-apalis.dtsi
> index e7a73db17613..fa96556f5a45 100644
> --- a/arch/arm/boot/dts/tegra124-apalis.dtsi
> +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
> @@ -10,17 +10,17 @@
> ? *?????modify it under the terms of the GNU General Public License
> ? *?????version 2 as published by the Free Software Foundation.
> ? *
> - *?????This file is distributed in the hope that it will be useful
> + *?????This file is distributed in the hope that it will be useful,
> ? *?????but WITHOUT ANY WARRANTY; without even the implied warranty
> of
> ? *?????MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.??See the
> ? *?????GNU General Public License for more details.
> ? *
> - * Or, alternatively
> + * Or, alternatively,
> ? *
> ? *??b) Permission is hereby granted, free of charge, to any person
> ? *?????obtaining a copy of this software and associated
> documentation
> ? *?????files (the "Software"), to deal in the Software without
> - *?????restriction, including without limitation the rights to use
> + *?????restriction, including without limitation the rights to use,
> ? *?????copy, modify, merge, publish, distribute, sublicense, and/or
> ? *?????sell copies of the Software, and to permit persons to whom
> the
> ? *?????Software is furnished to do so, subject to the following
> @@ -29,11 +29,11 @@
> ? *?????The above copyright notice and this permission notice shall
> be
> ? *?????included in all copies or substantial portions of the
> Software.
> ? *
> - *?????THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + *?????THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
> KIND,
> ? *?????EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
> WARRANTIES
> ? *?????OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> ? *?????NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + *?????HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> ? *?????WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> ? *?????FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> ? *?????OTHER DEALINGS IN THE SOFTWARE.
^ permalink raw reply
* [PATCH 8/8] Makefile: drop -D__CHECK_ENDIAN__ from cflags
From: Marc Kleine-Budde @ 2016-12-15 7:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481778865-27667-9-git-send-email-mst@redhat.com>
On 12/15/2016 06:15 AM, Michael S. Tsirkin wrote:
> That's the default now, no need for makefiles to set it.
>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> ---
[...]
> drivers/net/can/Makefile | 1 -
For drivers/net/can/Makefile:
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
-------------- next part --------------
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^ permalink raw reply
* [PATCH 20/37] ARM: dts: imx6*-sabrelite: Correct license text
From: Uwe Kleine-König @ 2016-12-15 8:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214235746.7108-21-alexandre.belloni@free-electrons.com>
On Thu, Dec 15, 2016 at 12:57:29AM +0100, Alexandre Belloni wrote:
> The license test has been mangled at some point then copy pasted across
> multiple files. Restore it to what it should be.
> Note that this is not intended as a license change.
>
> Cc: Dong Aisheng <aisheng.dong@freescale.com>
> Cc: Eric Nelson <eric.nelson@boundarydevices.com>
> Cc: Gary Bisson <gary.bisson@boundarydevices.com>
> Cc: Hui Wang <jason77.wang@gmail.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Markus Pargmann <mpa@pengutronix.de>
> Cc: Nicolin Chen <b42378@freescale.com>
> Cc: Peter Seiderer <ps.report@gmx.net>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: Rafa? Mi?ecki <zajec5@gmail.com>
> Cc: Richard Zhao <richard.zhao@freescale.com>
> Cc: Richard Zhu <r65037@freescale.com>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Cc: Troy Kisky <troy.kisky@boundarydevices.com>
> Cc: Ulf Hansson <ulf.hansson@linaro.org>
> Cc: Uwe Kleine-K?nig <uwe@kleine-koenig.org>
Acked-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
for the patches I was Cc:d, i.e. 5, 12, 14, 15, 16, 18, 19, 20 and 24.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH 00/39] ARM: dts: mvebu: Fix license text
From: Gregory CLEMENT @ 2016-12-15 8:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214223746.23066-1-alexandre.belloni@free-electrons.com>
Hi Alexandre,
On mer., d?c. 14 2016, Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:
> When the license was switched to dual GPLv2/X11, the text that was used
> was missing a few characters. Fix that now.
>
> I'll let the maintainers decide whether this change requires an ack of
> every contributors. It has been separated with that in mind if
> necessary.
I don't think this kind of change worth all this churn but if you are
very uncomfortable with these missing commas, could you at least squash
all this series in a single patch?
Furthermore to fix these 4 commas the acked-by of all the committer do
not seem absolutely necessary.
When you will squash them you can also fix your commit log s/test/text/.
Thanks,
Gregory
>
> Cc: Andrew Andrianov <andrew@ncrmnt.org>
> Cc: Arnaud Ebalard <arno@natisbad.org>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Ben Dooks <ben.dooks@codethink.co.uk>
> Cc: Benjamin Cama <benoar@dolka.fr>
> Cc: Benoit Masson <yahoo@perenite.com>
> Cc: Ben Peddell <klightspeed@killerwolves.net>
> Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
> Cc: Florian Fainelli <florian@openwrt.org>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Greg Ungerer <gerg@uclinux.org>
> Cc: Grzegorz Jaszczyk <jaz@semihalf.com>
> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> Cc: Imre Kaloz <kaloz@openwrt.org>
> Cc: Kevin Hilman <khilman@linaro.org>
> Cc: Lior Amsalem <alior@marvell.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Marcin Wojtas <mw@semihalf.com>
> Cc: Mario Lange <mario_lange@gmx.net>
> Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
> Cc: Nadav Haklai <nadavh@marvell.com>
> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
> Cc: Paul Bolle <pebolle@tiscali.nl>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: Rafa? Mi?ecki <zajec5@gmail.com>
> Cc: Roger Shimizu <rogershimizu@gmail.com>
> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
> Cc: Ryan Press <ryan@presslab.us>
> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> Cc: Simon Baatz <gmbnomis@gmail.com>
> Cc: Simon Guinot <simon.guinot@sequanux.org>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> Cc: Willy Tarreau <w@1wt.eu>
> Cc: Yehuda Yitschak <yehuday@marvell.com>
>
> Alexandre Belloni (39):
> ARM: dts: armada-370-db: Correct license text
> ARM: dts: armada-370-dlink-dns327l: Correct license text
> ARM: dts: armada-370: Correct license text
> ARM: dts: armada-370-mirabox: Correct license text
> ARM: dts: armada-370-netgear-rn102: Correct license text
> ARM: dts: armada-370-netgear-rn104: Correct license text
> ARM: dts: armada-370-rd: Correct license text
> ARM: dts: armada-370-synology-ds213j: Correct license text
> ARM: dts: armada-370-xp: Correct license text
> ARM: dts: armada-375-db: Correct license text
> ARM: dts: armada-375: Correct license text
> ARM: dts: armada-38x: Correct license text
> ARM: dts: armada-388-clearfog: Correct license text
> ARM: dts: armada-388-db: Correct license text
> ARM: dts: armada-388-rd: Correct license text
> ARM: dts: armada-38x-solidrun-microsom: Correct license text
> ARM: dts: armada-390-db: Correct license text
> ARM: dts: armada-390: Correct license text
> ARM: dts: armada-395: Correct license text
> ARM: dts: armada-398-db: Correct license text
> ARM: dts: armada-398: Correct license text
> ARM: dts: armada-39x: Correct license text
> ARM: dts: armada-xp-axpwifiap: Correct license text
> ARM: dts: armada-xp-db: Correct license text
> ARM: dts: armada-xp: Correct license text
> ARM: dts: armada-xp-gp: Correct license text
> ARM: dts: armada-xp-lenovo-ix4-300d: Correct license text
> ARM: dts: armada-xp-matrix: Correct license text
> ARM: dts: armada-xp-mv78230: Correct license text
> ARM: dts: armada-xp-mv78260: Correct license text
> ARM: dts: armada-xp-mv78460: Correct license text
> ARM: dts: armada-xp-netgear-rn2120: Correct license text
> ARM: dts: armada-xp-openblocks-ax3-4: Correct license text
> ARM: dts: armada-xp-synology-ds414: Correct license text
> ARM: dts: dove-cm-a510: Correct license text
> ARM: dts: dove-sbc-a510: Correct license text
> ARM: dts: kirkwood-linkstation: Correct license text
> ARM: dts: orion5x-kuroboxpro: Correct license text
> ARM: dts: orion5x-lswsgl: Correct license text
>
> arch/arm/boot/dts/armada-370-db.dts | 10 +++++-----
> arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 10 +++++-----
> arch/arm/boot/dts/armada-370-mirabox.dts | 10 +++++-----
> arch/arm/boot/dts/armada-370-netgear-rn102.dts | 10 +++++-----
> arch/arm/boot/dts/armada-370-netgear-rn104.dts | 10 +++++-----
> arch/arm/boot/dts/armada-370-rd.dts | 10 +++++-----
> arch/arm/boot/dts/armada-370-synology-ds213j.dts | 10 +++++-----
> arch/arm/boot/dts/armada-370-xp.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-370.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-375-db.dts | 10 +++++-----
> arch/arm/boot/dts/armada-375.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-380.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-385.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-388-clearfog.dts | 10 +++++-----
> arch/arm/boot/dts/armada-388-db.dts | 10 +++++-----
> arch/arm/boot/dts/armada-388-rd.dts | 10 +++++-----
> arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-38x.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-390-db.dts | 10 +++++-----
> arch/arm/boot/dts/armada-390.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-395.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-398-db.dts | 10 +++++-----
> arch/arm/boot/dts/armada-398.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-39x.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-xp-axpwifiap.dts | 10 +++++-----
> arch/arm/boot/dts/armada-xp-db.dts | 10 +++++-----
> arch/arm/boot/dts/armada-xp-gp.dts | 10 +++++-----
> arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 10 +++++-----
> arch/arm/boot/dts/armada-xp-matrix.dts | 10 +++++-----
> arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-xp-mv78260.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 +++++-----
> arch/arm/boot/dts/armada-xp-netgear-rn2120.dts | 10 +++++-----
> arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 10 +++++-----
> arch/arm/boot/dts/armada-xp-synology-ds414.dts | 10 +++++-----
> arch/arm/boot/dts/armada-xp.dtsi | 10 +++++-----
> arch/arm/boot/dts/dove-cm-a510.dtsi | 10 +++++-----
> arch/arm/boot/dts/dove-sbc-a510.dts | 10 +++++-----
> arch/arm/boot/dts/kirkwood-linkstation-6282.dtsi | 10 +++++-----
> arch/arm/boot/dts/kirkwood-linkstation-duo-6281.dtsi | 10 +++++-----
> arch/arm/boot/dts/kirkwood-linkstation-lsqvl.dts | 10 +++++-----
> arch/arm/boot/dts/kirkwood-linkstation-lsvl.dts | 10 +++++-----
> arch/arm/boot/dts/kirkwood-linkstation-lswsxl.dts | 10 +++++-----
> arch/arm/boot/dts/kirkwood-linkstation-lswvl.dts | 10 +++++-----
> arch/arm/boot/dts/kirkwood-linkstation-lswxl.dts | 10 +++++-----
> arch/arm/boot/dts/kirkwood-linkstation.dtsi | 10 +++++-----
> arch/arm/boot/dts/mvebu-linkstation-fan.dtsi | 10 +++++-----
> arch/arm/boot/dts/mvebu-linkstation-gpio-simple.dtsi | 10 +++++-----
> arch/arm/boot/dts/orion5x-kuroboxpro.dts | 10 +++++-----
> arch/arm/boot/dts/orion5x-linkstation-lsgl.dts | 10 +++++-----
> arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts | 10 +++++-----
> arch/arm/boot/dts/orion5x-linkstation.dtsi | 10 +++++-----
> arch/arm/boot/dts/orion5x-lswsgl.dts | 10 +++++-----
> 53 files changed, 265 insertions(+), 265 deletions(-)
>
> --
> 2.10.2
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH 0/4] ARM64: dts: marvell: fix license text
From: Gregory CLEMENT @ 2016-12-15 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214224620.23830-1-alexandre.belloni@free-electrons.com>
Hi Alexandre,
On mer., d?c. 14 2016, Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:
> The dual GPLv2/X11 license the text that is used
> is missing a few characters.
As for the other series could you squash all this series in a single
patch and fix the commit log (s/test/text/) ?
Thanks,
Gregory
>
>
> Alexandre Belloni (4):
> ARM64: dts: marvell/armada-371x: Correct license text
> ARM64: dts: marvell/armada-3720-db: Correct license text
> ARM64: dts: marvell/armada-372x: Correct license text
> ARM64: dts: marvell/armada-37xx: Correct license text
>
> arch/arm64/boot/dts/marvell/armada-371x.dtsi | 10 +++++-----
> arch/arm64/boot/dts/marvell/armada-3720-db.dts | 10 +++++-----
> arch/arm64/boot/dts/marvell/armada-372x.dtsi | 10 +++++-----
> arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 10 +++++-----
> 4 files changed, 20 insertions(+), 20 deletions(-)
>
> --
> 2.10.2
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH 00/39] ARM: dts: mvebu: Fix license text
From: Geert Uytterhoeven @ 2016-12-15 8:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214223746.23066-1-alexandre.belloni@free-electrons.com>
Hi Alexandre,
On Wed, Dec 14, 2016 at 11:37 PM, Alexandre Belloni
<alexandre.belloni@free-electrons.com> wrote:
> When the license was switched to dual GPLv2/X11, the text that was used
> was missing a few characters. Fix that now.
>
> I'll let the maintainers decide whether this change requires an ack of
> every contributors. It has been separated with that in mind if
> necessary.
>
> Cc: [deleted]
The CC-list is a bit long for changes to only 4 platforms.
scripts/get_maintainer.pl considered harmful?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH 00/39] ARM: dts: mvebu: Fix license text
From: Alexandre Belloni @ 2016-12-15 8:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMuHMdWPxcOZJbM9Z03W0aJKx8hMcXQb4AQueOjSNcOLLpZRbg@mail.gmail.com>
On 15/12/2016 at 09:27:35 +0100, Geert Uytterhoeven wrote :
> Hi Alexandre,
>
> On Wed, Dec 14, 2016 at 11:37 PM, Alexandre Belloni
> <alexandre.belloni@free-electrons.com> wrote:
> > When the license was switched to dual GPLv2/X11, the text that was used
> > was missing a few characters. Fix that now.
> >
> > I'll let the maintainers decide whether this change requires an ack of
> > every contributors. It has been separated with that in mind if
> > necessary.
> >
> > Cc: [deleted]
>
> The CC-list is a bit long for changes to only 4 platforms.
> scripts/get_maintainer.pl considered harmful?
>
I didn't use scripts/get_maintainer.pl, I cc'ed every contributors as
you would do for a license change.
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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