* [PATCH 1/3] doc: DT: Add ti,da830-uart to serial/8250 bindings
From: David Lechner @ 2016-12-20 20:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482265384-715-1-git-send-email-david@lechnology.com>
This adds the ti,da830-uart compatible string to serial 8250 UART bindings.
Signed-off-by: David Lechner <david@lechnology.com>
---
Documentation/devicetree/bindings/serial/8250.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/serial/8250.txt b/Documentation/devicetree/bindings/serial/8250.txt
index f86bb06..10276a4 100644
--- a/Documentation/devicetree/bindings/serial/8250.txt
+++ b/Documentation/devicetree/bindings/serial/8250.txt
@@ -19,6 +19,7 @@ Required properties:
- "altr,16550-FIFO128"
- "fsl,16550-FIFO64"
- "fsl,ns16550"
+ - "ti,da830-uart"
- "serial" if the port type is unknown.
- reg : offset and length of the register set for the device.
- interrupts : should contain uart interrupt.
--
2.7.4
^ permalink raw reply related
* [PATCH 2/3] serial: 8250: Add new port type for TI DA8xx/OMAPL13x/AM17xx/AM18xx
From: David Lechner @ 2016-12-20 20:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482265384-715-1-git-send-email-david@lechnology.com>
This adds a new UART port type for TI DA8xx/OMAPL13x/AM17xx/AM18xx. These
SoCs have standard 8250 registers plus some extra non-standard registers.
The UART will not function unless the non-standard Power and Emulation
Management Register (PWREMU_MGMT) is configured correctly. This is
currently handled in arch/arm/mach-davinci/serial.c for non-device-tree
boards. Making this part of the UART driver will allow UART to work on
device-tree boards as well and the mach code can eventually be removed.
Signed-off-by: David Lechner <david@lechnology.com>
---
drivers/tty/serial/8250/8250_of.c | 1 +
drivers/tty/serial/8250/8250_port.c | 22 ++++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 ++-
include/uapi/linux/serial_reg.h | 8 ++++++++
4 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c
index d25ab1c..5281252 100644
--- a/drivers/tty/serial/8250/8250_of.c
+++ b/drivers/tty/serial/8250/8250_of.c
@@ -332,6 +332,7 @@ static const struct of_device_id of_platform_serial_table[] = {
.data = (void *)PORT_ALTR_16550_F128, },
{ .compatible = "mrvl,mmp-uart",
.data = (void *)PORT_XSCALE, },
+ { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
{ /* end of list */ },
};
MODULE_DEVICE_TABLE(of, of_platform_serial_table);
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index fe4399b..ea854054 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -273,6 +273,15 @@ static const struct serial8250_config uart_config[] = {
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO,
},
+ [PORT_DA830] = {
+ .name = "TI DA8xx/OMAPL13x/AM17xx/AM18xx",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
+ UART_FCR_R_TRIG_10,
+ .rxtrig_bytes = {1, 4, 8, 14},
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
/* Uart divisor latch read */
@@ -2118,6 +2127,19 @@ int serial8250_do_startup(struct uart_port *port)
serial_port_out(port, UART_LCR, 0);
}
+ if (port->type == PORT_DA830) {
+ /* Reset the port */
+ serial_port_out(port, UART_IER, 0);
+ serial_port_out(port, UART_DA830_PWREMU_MGMT, 0);
+ mdelay(10);
+
+ /* Enable Tx, Rx and free run mode */
+ serial_port_out(port, UART_DA830_PWREMU_MGMT,
+ UART_DA830_PWREMU_MGMT_UTRST |
+ UART_DA830_PWREMU_MGMT_URRST |
+ UART_DA830_PWREMU_MGMT_FREE);
+ }
+
#ifdef CONFIG_SERIAL_8250_RSA
/*
* If this is an RSA port, see if we can kick it up to the
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 99dbed8..a126d05 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -56,7 +56,8 @@
#define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
#define PORT_RT2880 29 /* Ralink RT2880 internal UART */
#define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */
-#define PORT_MAX_8250 30 /* max port ID */
+#define PORT_DA830 31 /* TI DA8xx/OMAP13x/AM17xx/AM18xx */
+#define PORT_MAX_8250 31 /* max port ID */
/*
* ARM specific type numbers. These are not currently guaranteed
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index b4c0484..0e72eeb 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -327,6 +327,14 @@
#define SERIAL_RSA_BAUD_BASE (921600)
#define SERIAL_RSA_BAUD_BASE_LO (SERIAL_RSA_BAUD_BASE / 8)
+/* Extra registers for TI DA8xx/OMAP13x/AM17xx/AM18xx */
+#define UART_DA830_PWREMU_MGMT 12
+
+/* PWREMU_MGMT register bits */
+#define UART_DA830_PWREMU_MGMT_FREE (1 << 0) /* Free-running mode */
+#define UART_DA830_PWREMU_MGMT_URRST (1 << 13) /* Receiver reset/enable */
+#define UART_DA830_PWREMU_MGMT_UTRST (1 << 14) /* Transmitter reset/enable */
+
/*
* Extra serial register definitions for the internal UARTs
* in TI OMAP processors.
--
2.7.4
^ permalink raw reply related
* [PATCH 3/3] ARM: da850: Add ti, da830-uart compatible for serial ports
From: David Lechner @ 2016-12-20 20:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482265384-715-1-git-send-email-david@lechnology.com>
TI DA8xx/OMAPL13x/AM17xx/AM18xx SoCs have extra UART registers beyond
the standard 8250 registers, so we need a new compatible string to
indicate this. Also, at least one of these registers uses the full 32
bits, so we need to specify reg-io-width in addition to reg-shift.
"ns16550a" is left in the compatible specification since it does work
as long as the bootloader configures the SoC UART power management
registers.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/boot/dts/da850.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 104155d..f6cd212 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -266,22 +266,25 @@
interrupt-names = "edm3_tcerrint";
};
serial0: serial at 42000 {
- compatible = "ns16550a";
+ compatible = "ti,da830-uart", "ns16550a";
reg = <0x42000 0x100>;
+ reg-io-width = <4>;
reg-shift = <2>;
interrupts = <25>;
status = "disabled";
};
serial1: serial at 10c000 {
- compatible = "ns16550a";
+ compatible = "ti,da830-uart", "ns16550a";
reg = <0x10c000 0x100>;
+ reg-io-width = <4>;
reg-shift = <2>;
interrupts = <53>;
status = "disabled";
};
serial2: serial at 10d000 {
- compatible = "ns16550a";
+ compatible = "ti,da830-uart", "ns16550a";
reg = <0x10d000 0x100>;
+ reg-io-width = <4>;
reg-shift = <2>;
interrupts = <61>;
status = "disabled";
--
2.7.4
^ permalink raw reply related
* [PATCH v6 4/5] fpga manager: Add cyclone-ps-spi driver for Altera FPGAs
From: Uwe Kleine-König @ 2016-12-20 20:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ba899a9f-3a31-85c5-9da4-dd64a2661e60@gmail.com>
Hello Joshua,
On Tue, Dec 20, 2016 at 11:47:37AM -0800, Joshua Clayton wrote:
> >> + * Copyright (c) 2017 United Western Technologies, Corporation
> > In which timezone it's already 2017? s/ / /
> >
> LOL. It will be 2017 long before 4.11 was my thinking.
> I guess I've never spent much time on time stamp etiquette for copyright.
> It said "2015" in v5, despite still being revised.
Well, you have to put the date when you worked on the driver.
> >> + *
> >> + * Joshua Clayton <stillcompiling@gmail.com>
> >> + *
> >> + * Manage Altera FPGA firmware that is loaded over spi using the passive
> >> + * serial configuration method.
> >> + * Firmware must be in binary "rbf" format.
> >> + * Works on Cyclone V. Should work on cyclone series.
> >> + * May work on other Altera FPGAs.
> > I can test this later on an Arria 10. I'm not sure what the connection
> > between "Cyclone" and "Arria" is, but the protocol looks similar.
> My guess was it would be.
> Would be wonderful to have someone to test.
I didn't come around yet.
> >> + *
> >> + */
> >> +
> >> +#include <linux/bitrev.h>
> >> +#include <linux/delay.h>
> >> +#include <linux/fpga/fpga-mgr.h>
> >> +#include <linux/gpio/consumer.h>
> >> +#include <linux/module.h>
> >> +#include <linux/of_gpio.h>
> >> +#include <linux/spi/spi.h>
> >> +#include <linux/sizes.h>
> >> +
> >> +#define FPGA_RESET_TIME 50 /* time in usecs to trigger FPGA config */
> >> +#define FPGA_MIN_DELAY 50 /* min usecs to wait for config status */
> >> +#define FPGA_MAX_DELAY 1000 /* max usecs to wait for config status */
> >> +
> >> +struct cyclonespi_conf {
> >> + struct gpio_desc *config;
> >> + struct gpio_desc *status;
> >> + struct spi_device *spi;
> >> +};
> >> +
> >> +static const struct of_device_id of_ef_match[] = {
> >> + { .compatible = "altr,cyclone-ps-spi-fpga-mgr", },
> >> + {}
> >> +};
> >> +MODULE_DEVICE_TABLE(of, of_ef_match);
> > barebox already has such a driver, the binding is available at
> >
> > https://git.pengutronix.de/cgit/barebox/tree/Documentation/devicetree/bindings/firmware/altr,passive-serial.txt
> >
> > (This isn't completely accurate because nstat is optional in the driver.)
> Interesting.
> The binding looks ... like we should synchronize those bindings.
ack.
> >> + gpiod_set_value(conf->config, 1);
> >> + usleep_range(FPGA_RESET_TIME, FPGA_RESET_TIME + 20);
> >> + if (!gpiod_get_value(conf->status)) {
> >> + dev_err(&mgr->dev, "Status pin should be low.\n");
> > You write this when get_value returns 0. There is something fishy.
> I'll take a look. These gpios are "active low", so a logical 1 is a
> physical low, IIRC. Maybe I should change the wording:
> Something like dev_err(&mgr->dev, "Status pin should be in reset.\n");
maybe "inactive"? Then then you should better use nconfig as dts name
(as done in the barebox binding) and put the active low information into
the flag.
> >> + return -EIO;
> >> + }
> >> +
> >> + gpiod_set_value(conf->config, 0);
> >> + for (i = 0; i < (FPGA_MAX_DELAY / FPGA_MIN_DELAY); i++) {
> >> + usleep_range(FPGA_MIN_DELAY, FPGA_MIN_DELAY + 20);
> >> + if (!gpiod_get_value(conf->status))
> >> + return 0;
> >> + }
> >> +
> >> + dev_err(&mgr->dev, "Status pin not ready.\n");
> >> + return -EIO;
> > For Arria 10 the documentation has:
> >
> > To ensure a successful configuration, send the entire
> > configuration data to the device. CONF_DONE is released high
> > when the device receives all the configuration data
> > successfully. After CONF_DONE goes high, send two additional
> > falling edges on DCLK to begin initialization and enter user
> > mode.
> >
> > ISTR this is necessary for Arria V, too.
> DCLK is the spi clock, yes?
> Would sending an extra byte after CONF_DONE is released suffice?
The barebox driver sends two bytes.
> >> +}
> >> +
> >> +static int cyclonespi_write(struct fpga_manager *mgr, const char *buf,
> >> + size_t count)
> >> +{
> >> + struct cyclonespi_conf *conf = (struct cyclonespi_conf *)mgr->priv;
> >> + const char *fw_data = buf;
> >> + const char *fw_data_end = fw_data + count;
> >> +
> >> + while (fw_data < fw_data_end) {
> >> + int ret;
> >> + size_t stride = min(fw_data_end - fw_data, SZ_4K);
> >> +
> >> + rev_buf((void *)fw_data, stride);
> > This isn't necessary if the spi controller supports SPI_LSB_FIRST. At
> > least the mvebu spi core can do this for you. (The driver doesn't
> > support it yet, though.)
> This is true, but many of them do not.
And I think it's hard to detect if the adapter driver supports this or
simply ignores it.
> Moritz Fischer had proposal to add things like this with a flag.
> It could then be part of the library, rather than part of the driver
>
> Speaking of which,
> I made an unsuccessful attempt to hack generic lsb first SPI
> with an extra bounce buffer.
> Sending was fine, but I ran into trouble with LSB first rx
> (I think) because of dma.
Link?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH] devicetree: bindings: clk: mvebu: fix description for sata1 on Armada XP
From: Uwe Kleine-König @ 2016-12-20 21:20 UTC (permalink / raw)
To: linux-arm-kernel
SATA Host 0 clock is (as correctly documented) id 15/sata0.
Signed-off-by: Uwe Kleine-K?nig <uwe@kleine-koenig.org>
---
Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
index cb8542d910b3..5142efc8099d 100644
--- a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
+++ b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
@@ -117,7 +117,7 @@ ID Clock Peripheral
25 tdm Time Division Mplx
28 xor1 XOR DMA 1
29 sata1lnk
-30 sata1 SATA Host 0
+30 sata1 SATA Host 1
The following is a list of provided IDs for Dove:
ID Clock Peripheral
--
2.10.2
^ permalink raw reply related
* [PATCH 1/2] soc: ti: knav_dma: fix typos in trace message
From: Murali Karicheri @ 2016-12-20 22:24 UTC (permalink / raw)
To: linux-arm-kernel
This patch fixes some typos in the trace message
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
drivers/soc/ti/knav_dma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/ti/knav_dma.c b/drivers/soc/ti/knav_dma.c
index 1a7b5ca..ecebe2e 100644
--- a/drivers/soc/ti/knav_dma.c
+++ b/drivers/soc/ti/knav_dma.c
@@ -395,7 +395,7 @@ static int of_channel_match_helper(struct device_node *np, const char *name,
if (of_parse_phandle_with_fixed_args(np, "ti,navigator-dmas",
1, index, &args)) {
- dev_err(kdev->dev, "Missing the pahndle args name %s\n", name);
+ dev_err(kdev->dev, "Missing the phandle args name %s\n", name);
return -ENODEV;
}
@@ -436,7 +436,7 @@ void *knav_dma_open_channel(struct device *dev, const char *name,
}
dev_dbg(kdev->dev, "initializing %s channel %d from DMA %s\n",
- config->direction == DMA_MEM_TO_DEV ? "transmit" :
+ config->direction == DMA_MEM_TO_DEV ? "transmit" :
config->direction == DMA_DEV_TO_MEM ? "receive" :
"unknown", chan_num, instance);
--
1.9.1
^ permalink raw reply related
* [PATCH 2/2] soc: ti: knav: cleanup includes and sort header files
From: Murali Karicheri @ 2016-12-20 22:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482272663-29829-1-git-send-email-m-karicheri2@ti.com>
This patch cleanup the code to remove unnecessary header files and
also sort the header files.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
drivers/soc/ti/knav_qmss_acc.c | 15 +++------------
drivers/soc/ti/knav_qmss_queue.c | 25 ++++++++-----------------
2 files changed, 11 insertions(+), 29 deletions(-)
diff --git a/drivers/soc/ti/knav_qmss_acc.c b/drivers/soc/ti/knav_qmss_acc.c
index 0612eba..3d7225f 100644
--- a/drivers/soc/ti/knav_qmss_acc.c
+++ b/drivers/soc/ti/knav_qmss_acc.c
@@ -16,21 +16,12 @@
* General Public License for more details.
*/
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/device.h>
+#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/interrupt.h>
-#include <linux/bitops.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-#include <linux/soc/ti/knav_qmss.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
+#include <linux/module.h>
#include <linux/of_address.h>
-#include <linux/firmware.h>
+#include <linux/soc/ti/knav_qmss.h>
#include "knav_qmss.h"
diff --git a/drivers/soc/ti/knav_qmss_queue.c b/drivers/soc/ti/knav_qmss_queue.c
index eacad57..279e7c5 100644
--- a/drivers/soc/ti/knav_qmss_queue.c
+++ b/drivers/soc/ti/knav_qmss_queue.c
@@ -16,26 +16,17 @@
* General Public License for more details.
*/
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/interrupt.h>
-#include <linux/bitops.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-#include <linux/platform_device.h>
+#include <linux/debugfs.h>
#include <linux/dma-mapping.h>
-#include <linux/of.h>
-#include <linux/of_irq.h>
-#include <linux/of_device.h>
+#include <linux/firmware.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/module.h>
#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
#include <linux/pm_runtime.h>
-#include <linux/firmware.h>
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-#include <linux/string.h>
+#include <linux/slab.h>
#include <linux/soc/ti/knav_qmss.h>
#include "knav_qmss.h"
--
1.9.1
^ permalink raw reply related
* [PATCH v2] efi/libstub: arm*: Pass latest memory map to the kernel
From: Ard Biesheuvel @ 2016-12-20 22:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161219213859.GA2225@codeblueprint.co.uk>
On 19 December 2016 at 21:38, Matt Fleming <matt@codeblueprint.co.uk> wrote:
> On Mon, 19 Dec, at 02:24:19PM, James Morse wrote:
>> From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>>
>> As reported by James, the current libstub code involving the annotated
>> memory map only works somewhat correctly by accident, due to the fact
>> that a pool allocation happens to be reused immediately, retaining its
>> former contents.
>>
>> Instead of juggling memory maps, which makes the code more complex than
>> it needs to be, simply put a placholder value into the FDT, and only
>> write the actual value after ExitBootServices() has been called.
>>
>> Reported-by: James Morse <james.morse@arm.com>
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> [Update mmap-size too, remove updated_fdt()s unused params and header entry]
>> Signed-off-by: James Morse <james.morse@arm.com>
>> ---
>> Hi Ard,
>>
>> This is a v2 of your patch that updates the mmap-size too. This solves the
>> truncated memmap problem I saw with v1 on Seattle.
>>
>> The original patch was CC-stable, so I think this should also have:
>> Cc: <stable@vger.kernel.org>
>> Fixes: ed9cc156c42f ("efi/libstub: Use efi_exit_boot_services() in FDT")
>>
>>
>> Thanks,
>>
>> James
>>
>> drivers/firmware/efi/libstub/efistub.h | 8 ----
>> drivers/firmware/efi/libstub/fdt.c | 75 +++++++++++++++++++++-------------
>> 2 files changed, 47 insertions(+), 36 deletions(-)
>
> Thanks James. I've queued this one up in the 'urgent' queue and tagged
> it for stable. I'll send it to tip before the end of the week.
Could we fold the hunk below, please?
diff --git a/drivers/firmware/efi/libstub/fdt.c
b/drivers/firmware/efi/libstub/fdt.c
index 9b11b0559a23..90ab96845937 100644
--- a/drivers/firmware/efi/libstub/fdt.c
+++ b/drivers/firmware/efi/libstub/fdt.c
@@ -149,26 +149,25 @@ static efi_status_t
update_fdt(efi_system_table_t *sys_table, void *orig_fdt,
static efi_status_t update_fdt_memmap(void *fdt, u64 memmap, u32 map_size)
{
int node = fdt_path_offset(fdt, "/chosen");
- efi_status_t status;
+ int err;
if (node < 0)
return EFI_LOAD_ERROR;
memmap = cpu_to_fdt64(memmap);
- status = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-start",
- &memmap, sizeof(memmap));
+ err = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-start",
+ &memmap, sizeof(memmap));
if (status)
return EFI_LOAD_ERROR;
map_size = cpu_to_fdt32(map_size);
- status = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-size",
- &map_size, sizeof(map_size));
+ err = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-size",
+ &map_size, sizeof(map_size));
if (status)
return EFI_LOAD_ERROR;
-
return EFI_SUCCESS;
}
My mistake, and harmless in practice, but sloppy nonetheless
^ permalink raw reply related
* [PATCH v2] efi/libstub: arm*: Pass latest memory map to the kernel
From: Ard Biesheuvel @ 2016-12-20 22:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKv+Gu8_8+GdaV86_ctf=PzKxPvT3tbUOcuz5OkyBya5OC+ekw@mail.gmail.com>
On 20 December 2016 at 22:32, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> On 19 December 2016 at 21:38, Matt Fleming <matt@codeblueprint.co.uk> wrote:
>> On Mon, 19 Dec, at 02:24:19PM, James Morse wrote:
>>> From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>>>
>>> As reported by James, the current libstub code involving the annotated
>>> memory map only works somewhat correctly by accident, due to the fact
>>> that a pool allocation happens to be reused immediately, retaining its
>>> former contents.
>>>
>>> Instead of juggling memory maps, which makes the code more complex than
>>> it needs to be, simply put a placholder value into the FDT, and only
>>> write the actual value after ExitBootServices() has been called.
>>>
>>> Reported-by: James Morse <james.morse@arm.com>
>>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>>> [Update mmap-size too, remove updated_fdt()s unused params and header entry]
>>> Signed-off-by: James Morse <james.morse@arm.com>
>>> ---
>>> Hi Ard,
>>>
>>> This is a v2 of your patch that updates the mmap-size too. This solves the
>>> truncated memmap problem I saw with v1 on Seattle.
>>>
>>> The original patch was CC-stable, so I think this should also have:
>>> Cc: <stable@vger.kernel.org>
>>> Fixes: ed9cc156c42f ("efi/libstub: Use efi_exit_boot_services() in FDT")
>>>
>>>
>>> Thanks,
>>>
>>> James
>>>
>>> drivers/firmware/efi/libstub/efistub.h | 8 ----
>>> drivers/firmware/efi/libstub/fdt.c | 75 +++++++++++++++++++++-------------
>>> 2 files changed, 47 insertions(+), 36 deletions(-)
>>
>> Thanks James. I've queued this one up in the 'urgent' queue and tagged
>> it for stable. I'll send it to tip before the end of the week.
>
> Could we fold the hunk below, please?
>
> diff --git a/drivers/firmware/efi/libstub/fdt.c
> b/drivers/firmware/efi/libstub/fdt.c
> index 9b11b0559a23..90ab96845937 100644
> --- a/drivers/firmware/efi/libstub/fdt.c
> +++ b/drivers/firmware/efi/libstub/fdt.c
> @@ -149,26 +149,25 @@ static efi_status_t
> update_fdt(efi_system_table_t *sys_table, void *orig_fdt,
> static efi_status_t update_fdt_memmap(void *fdt, u64 memmap, u32 map_size)
> {
> int node = fdt_path_offset(fdt, "/chosen");
> - efi_status_t status;
> + int err;
>
> if (node < 0)
> return EFI_LOAD_ERROR;
>
> memmap = cpu_to_fdt64(memmap);
> - status = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-start",
> - &memmap, sizeof(memmap));
> + err = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-start",
> + &memmap, sizeof(memmap));
>
> if (status)
> return EFI_LOAD_ERROR;
>
> map_size = cpu_to_fdt32(map_size);
> - status = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-size",
> - &map_size, sizeof(map_size));
> + err = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-size",
> + &map_size, sizeof(map_size));
>
> if (status)
> return EFI_LOAD_ERROR;
>
> -
> return EFI_SUCCESS;
> }
>
> My mistake, and harmless in practice, but sloppy nonetheless
... but with the 'if (status)' replaced as well, of course (2x)
^ permalink raw reply
* [PATCH v2] ARM64: dts: marvell: Correct license text
From: Alexandre Belloni @ 2016-12-20 22:40 UTC (permalink / raw)
To: linux-arm-kernel
The license text has been mangled at some point then copy pasted across
multiple files. Restore it to what it should be.
Note that this is not intended as a license change.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
Changes in v2:
- squashed all the patches
- fix commit message
arch/arm64/boot/dts/marvell/armada-371x.dtsi | 10 +++++-----
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 10 +++++-----
arch/arm64/boot/dts/marvell/armada-372x.dtsi | 10 +++++-----
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 10 +++++-----
4 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-371x.dtsi b/arch/arm64/boot/dts/marvell/armada-371x.dtsi
index c9e5325b8ac3..11226f7b9ed9 100644
--- a/arch/arm64/boot/dts/marvell/armada-371x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-371x.dtsi
@@ -16,17 +16,17 @@
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
- * This file is distributed in the hope that it will be useful
+ * This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * Or, alternatively
+ * Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use
+ * restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
@@ -35,11 +35,11 @@
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
- * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 1372e9a6aaa4..2e707875039a 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -15,17 +15,17 @@
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
- * This file is distributed in the hope that it will be useful
+ * This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * Or, alternatively
+ * Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use
+ * restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
- * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm64/boot/dts/marvell/armada-372x.dtsi b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
index 5120296596c2..59d7557d3b1b 100644
--- a/arch/arm64/boot/dts/marvell/armada-372x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
@@ -16,17 +16,17 @@
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
- * This file is distributed in the hope that it will be useful
+ * This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * Or, alternatively
+ * Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use
+ * restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
@@ -35,11 +35,11 @@
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
- * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index e9bd58793464..3c6f5d9d15c4 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -15,17 +15,17 @@
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
- * This file is distributed in the hope that it will be useful
+ * This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * Or, alternatively
+ * Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use
+ * restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
- * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
--
2.11.0
^ permalink raw reply related
* [PATCH v4 0/2] cpufreq: brcmstb-cpufreq: CPUfreq driver for older Broadcom STB SoCs
From: Markus Mayer @ 2016-12-20 22:55 UTC (permalink / raw)
To: linux-arm-kernel
From: Markus Mayer <mmayer@broadcom.com>
This CPUfreq driver provides basic frequency scaling for older Broadcom
STB SoCs that do not use AVS firmware with DVFS support. There is no
support for voltage scaling.
v3 of this patch can be found here: https://lkml.org/lkml/2016/11/22/747
Changes since v3:
- added binding document
- got rid of calls to __clk_lookup(), using devm_clk_get() instead
- re-worked clock lookup code a bit, along with switching to devm_clk_get()
- get_frequencies() became a void function, removing the need for some
error checking
- fixed CONFIG_ARM_BRCM_AVS_CPUFREQ typo
- fixed MODULE_DEVICE_TABLE declaration
Markus Mayer (2):
dt-bindings: brcm: clocks: add binding for brcmstb-cpu-clk-div
cpufreq: brcmstb-cpufreq: CPUfreq driver for older Broadcom STB SoCs
.../bindings/clock/brcm,brcmstb-cpu-clk-div.txt | 83 +++++
MAINTAINERS | 1 +
drivers/cpufreq/Kconfig.arm | 12 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/brcmstb-cpufreq.c | 377 +++++++++++++++++++++
5 files changed, 474 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt
create mode 100644 drivers/cpufreq/brcmstb-cpufreq.c
--
2.7.4
^ permalink raw reply
* [PATCH v4 1/2] dt-bindings: brcm: clocks: add binding for brcmstb-cpu-clk-div
From: Markus Mayer @ 2016-12-20 22:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161220225530.96699-1-code@mmayer.net>
From: Markus Mayer <mmayer@broadcom.com>
Add binding document for brcm,brcmstb-cpu-clk-div.
Signed-off-by: Markus Mayer <mmayer@broadcom.com>
---
.../bindings/clock/brcm,brcmstb-cpu-clk-div.txt | 83 ++++++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 84 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt
diff --git a/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt b/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt
new file mode 100644
index 0000000..3bc99c5
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt
@@ -0,0 +1,83 @@
+The CPU divider node serves as the sole clock for the CPU complex. It supports
+power-of-2 clock division, with a divider of "1" as the default highest-speed
+setting.
+
+Required properties:
+- compatible: shall be "brcm,brcmstb-cpu-clk-div"
+- reg: address and width of the divider configuration register
+- #clock-cells: shall be set to 0
+- clocks: phandle of clock provider which provides the source clock
+ (this would typically be a "fixed-clock" type PLL)
+- div-table: list of (raw_value,divider) ordered pairs that correspond to the
+ allowed clock divider settings
+- div-shift-width: least-significant bit position and width of divider value
+
+Optional properties:
+- clocks: additional clocks can be specified if needed
+- clock-names: clocks can be named, so they can be looked up
+
+Example:
+ sw_scb: sw_scb {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <432000000>;
+ };
+
+ fixed0: fixed0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <54000000>;
+ };
+
+ cpu_pdiv: cpu_pdiv at f04e0008 {
+ compatible = "divider-clock";
+ #clock-cells = <0>;
+ reg = <0xf04e0008 0x4>;
+ bit-shift = <10>;
+ bit-mask = <0xf>;
+ index-starts-at-one;
+ clocks = <&fixed0>;
+ clock-names = "fixed0";
+ };
+
+ cpu_ndiv_int: cpu_ndiv_int {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <167>;
+ clocks = <&cpu_pdiv>;
+ clock-names = "cpu_pdiv";
+ };
+
+ cpu_mdiv_ch0: cpu_mdiv_ch0 at f04e0000 {
+ compatible = "divider-clock";
+ #clock-cells = <0>;
+ reg = <0xf04e0000 0x4>;
+ bit-shift = <1>;
+ bit-mask = <0xff>;
+ index-starts-at-one;
+ clocks = <&cpu_ndiv_int>;
+ clock-names = "cpu_ndiv_int";
+ };
+
+ cpupll: cpupll at 0 {
+ #clock-cells = <0>;
+ clock-frequency = <1503000000>;
+ compatible = "fixed-clock";
+ };
+
+ cpuclkdiv: cpu-clk-div at 0 {
+ #clock-cells = <0>;
+ clock-names = "cpupll",
+ "cpu_mdiv_ch0",
+ "cpu_ndiv_int",
+ "sw_scb";
+ clocks = <&cpupll,
+ &cpu_mdiv_ch0,
+ &cpu_ndiv_int,
+ &sw_scb>;
+ compatible = "brcm,brcmstb-cpu-clk-div";
+ reg = <0xf03e257c 0x4>;
+ div-table = <0x00 1>;
+ div-shift-width = <0 5>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index f6eb97b..5473b31 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2786,6 +2786,7 @@ M: bcm-kernel-feedback-list at broadcom.com
L: linux-pm at vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt
+F: Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt
F: drivers/cpufreq/brcmstb*
BROADCOM SPECIFIC AMBA DRIVER (BCMA)
--
2.7.4
^ permalink raw reply related
* [PATCH v4 2/2] cpufreq: brcmstb-cpufreq: CPUfreq driver for older Broadcom STB SoCs
From: Markus Mayer @ 2016-12-20 22:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161220225530.96699-1-code@mmayer.net>
From: Markus Mayer <mmayer@broadcom.com>
This CPUfreq driver provides basic frequency scaling for older Broadcom
STB SoCs that do not use AVS firmware with DVFS support. There is no
support for voltage scaling.
Signed-off-by: Markus Mayer <mmayer@broadcom.com>
---
drivers/cpufreq/Kconfig.arm | 12 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/brcmstb-cpufreq.c | 377 ++++++++++++++++++++++++++++++++++++++
3 files changed, 390 insertions(+)
create mode 100644 drivers/cpufreq/brcmstb-cpufreq.c
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 920c469..36422af 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -33,6 +33,18 @@ config ARM_BRCMSTB_AVS_CPUFREQ_DEBUG
If in doubt, say N.
+config ARM_BRCMSTB_CPUFREQ
+ tristate "Broadcom STB CPUfreq driver"
+ depends on ARCH_BRCMSTB || COMPILE_TEST
+ default y
+ help
+ Some Broadcom SoCs offer multiple operating frequencies that CPUfreq
+ can take advantage of to improve energy efficiency.
+
+ Say Y, if you have a supported Broadcom SoC. If your Broadcom SoC
+ has AVS firmware with support for frequency and voltage scaling,
+ say N here and enable ARM_BRCMSTB_AVS_CPUFREQ instead.
+
config ARM_DT_BL_CPUFREQ
tristate "Generic probing via DT for ARM big LITTLE CPUfreq driver"
depends on ARM_BIG_LITTLE_CPUFREQ && OF
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 1e46c39..23700aa 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_ARM_BIG_LITTLE_CPUFREQ) += arm_big_little.o
obj-$(CONFIG_ARM_DT_BL_CPUFREQ) += arm_big_little_dt.o
obj-$(CONFIG_ARM_BRCMSTB_AVS_CPUFREQ) += brcmstb-avs-cpufreq.o
+obj-$(CONFIG_ARM_BRCMSTB_CPUFREQ) += brcmstb-cpufreq.o
obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o
obj-$(CONFIG_UX500_SOC_DB8500) += dbx500-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o
diff --git a/drivers/cpufreq/brcmstb-cpufreq.c b/drivers/cpufreq/brcmstb-cpufreq.c
new file mode 100644
index 0000000..80ac1ae
--- /dev/null
+++ b/drivers/cpufreq/brcmstb-cpufreq.c
@@ -0,0 +1,377 @@
+/*
+ * CPU frequency scaling for Broadcom set top box SoCs
+ *
+ * Copyright (c) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/cpufreq.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+
+#define BRCMSTB_CPUFREQ_PREFIX "brcmstb"
+#define BRCMSTB_CPUFREQ_NAME BRCMSTB_CPUFREQ_PREFIX "-cpufreq"
+
+/* We search for these compatible strings. */
+#define BRCMSTB_DT_CPU_CLK_CTRL "brcm,brcmstb-cpu-clk-div"
+#define BRCMSTB_DT_MEMC_DDR "brcm,brcmstb-memc-ddr"
+#define BRCM_AVS_CPU_DATA "brcm,avs-cpu-data-mem"
+
+/*
+ * We also need a few clocks in device tree. They are referenced in the
+ * brcm,brcmstb-cpu-clk-div node in device tree, so we can look them up.
+ */
+#define BRCMSTB_CLK_MDIV_CH0 "cpu_mdiv_ch0"
+#define BRCMSTB_CLK_NDIV_INT "cpu_ndiv_int"
+#define BRCMSTB_CLK_SW_SCB "sw_scb"
+
+#define BRCMSTB_TBL_SAFE_MODE BIT(0)
+#define BRCMSTB_REG_SAFE_MODE BIT(4)
+
+#define TRANSITION_LATENCY (25 * 1000) /* 25 us */
+
+/* This is as low as we'll go in the frequency table. */
+#define MIN_CPU_FREQ (100 * 1000) /* in kHz */
+
+struct private_data {
+ void __iomem *cpu_clk_ctrl_reg;
+ struct clk *mdiv_clk;
+ struct clk *ndiv_clk;
+ struct clk *sw_scb_clk;
+ struct device *dev;
+};
+
+/* Count the active memory controllers in the system. */
+static int count_memory_controllers(void)
+{
+ struct device_node *np = NULL;
+ int i = 0;
+
+ do {
+ np = of_find_compatible_node(np, NULL, BRCMSTB_DT_MEMC_DDR);
+ if (of_device_is_available(np))
+ i++;
+ of_node_put(np);
+ } while (np);
+
+ return i;
+}
+
+static void get_frequencies(const struct cpufreq_policy *policy,
+ unsigned int *vco_freq, unsigned int *cpu_freq,
+ unsigned int *scb_freq)
+{
+ struct private_data *priv = policy->driver_data;
+
+ /* return frequencies in kHz */
+ *vco_freq = clk_get_rate(priv->ndiv_clk) / 1000;
+ *cpu_freq = clk_get_rate(priv->mdiv_clk) / 1000;
+ *scb_freq = clk_get_rate(priv->sw_scb_clk) / 1000;
+}
+
+/*
+ * Safe mode: When set, the CPU's bus unit is being throttled. This is done to
+ * avoid buffer overflows when the CPU-to-bus-clock ratio is low.
+ *
+ * The formula as to what constitutes a low CPU-to-bus-clock ratio takes into
+ * account the number of memory controllers active in the system and the SCB
+ * frequency. More memory controllers means safe mode is required starting at
+ * higher frequencies.
+ *
+ * For 1 memory controller, cpu_freq/scb_freq must be greater than or equal to
+ * 2 to not require safe mode.
+ *
+ * For 2 or 3 memory controllers, cpu_freq/scb_freq must be greater than or
+ * equal 3 to not require safe mode.
+ */
+
+static int freq_requires_safe_mode(unsigned int cpu_freq, unsigned int scb_freq,
+ int num_memc)
+{
+ unsigned int safe_ratio;
+
+ switch (num_memc) {
+ case 1:
+ safe_ratio = 2;
+ break;
+ case 2:
+ case 3:
+ safe_ratio = 3;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return ((cpu_freq / scb_freq) < safe_ratio);
+}
+
+static struct cpufreq_frequency_table *
+brcmstb_get_freq_table(const struct cpufreq_policy *policy)
+{
+ unsigned int cpu_freq, vco_freq, scb_freq, mdiv, init_mdiv, f;
+ struct cpufreq_frequency_table *table;
+ struct private_data *priv;
+ int num_memc, ret;
+ unsigned int i = 0;
+
+ priv = policy->driver_data;
+ num_memc = count_memory_controllers();
+ get_frequencies(policy, &vco_freq, &cpu_freq, &scb_freq);
+
+ /* Calculate the initial mdiv value. We'll increment mdiv from here. */
+ init_mdiv = vco_freq / cpu_freq;
+
+ /* Count how many frequencies we'll offer. */
+ f = cpu_freq;
+ for (mdiv = init_mdiv; f >= MIN_CPU_FREQ; mdiv++, f = vco_freq / mdiv) {
+ /* We only want to use "whole" MHz. */
+ if ((f % 1000) == 0)
+ i++;
+ }
+
+ table = devm_kzalloc(priv->dev, (i + 1) * sizeof(*table), GFP_KERNEL);
+ if (!table)
+ return ERR_PTR(-ENOMEM);
+
+ /* Now, fill the table. */
+ f = cpu_freq;
+ i = 0;
+ for (mdiv = init_mdiv; f >= MIN_CPU_FREQ; mdiv++, f = vco_freq / mdiv) {
+ if ((f % 1000) == 0) {
+ table[i].frequency = f;
+ ret = freq_requires_safe_mode(f, scb_freq, num_memc);
+ if (ret < 0)
+ return ERR_PTR(ret);
+ if (ret > 0)
+ table[i].driver_data |= BRCMSTB_TBL_SAFE_MODE;
+ i++;
+ }
+ }
+ table[i].frequency = CPUFREQ_TABLE_END;
+
+ return table;
+}
+
+static int brcmstb_target_index(struct cpufreq_policy *policy,
+ unsigned int index)
+{
+ struct cpufreq_frequency_table *entry;
+ struct private_data *priv;
+ int ret, safe_mode_needed;
+ u32 reg;
+
+ priv = policy->driver_data;
+ entry = &policy->freq_table[index];
+ safe_mode_needed = entry->driver_data & BRCMSTB_TBL_SAFE_MODE;
+
+ reg = readl(priv->cpu_clk_ctrl_reg);
+ if (safe_mode_needed && !(reg & BRCMSTB_REG_SAFE_MODE)) {
+ reg |= BRCMSTB_REG_SAFE_MODE;
+ writel(reg, priv->cpu_clk_ctrl_reg);
+ }
+ ret = clk_set_rate(policy->clk, entry->frequency * 1000);
+ if (!ret && !safe_mode_needed && (reg & BRCMSTB_REG_SAFE_MODE)) {
+ reg &= ~BRCMSTB_REG_SAFE_MODE;
+ writel(reg, priv->cpu_clk_ctrl_reg);
+ }
+
+ return ret;
+}
+
+/*
+ * All initialization code that we only want to execute once goes here. Setup
+ * code that can be re-tried on every core (if it failed before) can go into
+ * brcmstb_cpufreq_init().
+ */
+static int brcmstb_prepare_init(struct platform_device *pdev)
+{
+ struct private_data *priv;
+ struct resource *res;
+ struct device *dev;
+
+ /*
+ * If the BRCM STB AVS CPUfreq driver is supported, we bail, so that
+ * the more modern approach implementing DVFS in firmware can be used.
+ */
+ if (IS_ENABLED(CONFIG_ARM_BRCMSTB_AVS_CPUFREQ)) {
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, BRCM_AVS_CPU_DATA);
+ if (np) {
+ of_node_put(np);
+ return -ENXIO;
+ }
+ }
+
+ dev = &pdev->dev;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ priv->cpu_clk_ctrl_reg = devm_ioremap_resource(dev, res);
+ if (IS_ERR(priv->cpu_clk_ctrl_reg)) {
+ dev_err(dev, "couldn't map DT entry %s\n",
+ BRCMSTB_DT_CPU_CLK_CTRL);
+ return -ENODEV;
+ }
+
+ priv->mdiv_clk = devm_clk_get(dev, BRCMSTB_CLK_MDIV_CH0);
+ priv->ndiv_clk = devm_clk_get(dev, BRCMSTB_CLK_NDIV_INT);
+ priv->sw_scb_clk = devm_clk_get(dev, BRCMSTB_CLK_SW_SCB);
+
+ if (IS_ERR(priv->mdiv_clk))
+ return PTR_ERR(priv->mdiv_clk);
+ if (IS_ERR(priv->ndiv_clk))
+ return PTR_ERR(priv->ndiv_clk);
+ if (IS_ERR(priv->sw_scb_clk))
+ return PTR_ERR(priv->sw_scb_clk);
+
+ priv->dev = dev;
+ platform_set_drvdata(pdev, priv);
+
+ return 0;
+}
+
+static int brcmstb_cpufreq_init(struct cpufreq_policy *policy)
+{
+ struct cpufreq_frequency_table *freq_table;
+ struct platform_device *pdev;
+ struct private_data *priv;
+ struct device *dev;
+ int ret;
+
+ pdev = cpufreq_get_driver_data();
+ priv = platform_get_drvdata(pdev);
+ dev = &pdev->dev;
+
+ policy->clk = priv->mdiv_clk;
+ policy->driver_data = priv;
+
+ freq_table = brcmstb_get_freq_table(policy);
+ if (IS_ERR(freq_table)) {
+ ret = PTR_ERR(freq_table);
+ dev_err(dev, "Couldn't determine frequency table (%d).\n", ret);
+ if (ret == -EINVAL)
+ dev_emerg(dev,
+ "Invalid number of memory controllers -- %d!\n",
+ count_memory_controllers());
+ return ret;
+ }
+
+ ret = cpufreq_generic_init(policy, freq_table, TRANSITION_LATENCY);
+ if (!ret)
+ dev_info(dev, "registered\n");
+
+ return ret;
+}
+
+/* Shows the number of memory controllers. */
+static ssize_t show_brcmstb_num_memc(struct cpufreq_policy *policy, char *buf)
+{
+ return sprintf(buf, "%u\n", count_memory_controllers());
+}
+
+/* Shows vco_freq, cpu_freq, and scb_freq in kHz. */
+static ssize_t show_brcmstb_freqs(struct cpufreq_policy *policy, char *buf)
+{
+ unsigned int vco_freq, cpu_freq, scb_freq;
+
+ get_frequencies(policy, &vco_freq, &cpu_freq, &scb_freq);
+
+ return sprintf(buf, "%u %u %u\n", vco_freq, cpu_freq, scb_freq);
+}
+
+/* Shows the lowest frequency (in kHz) that can be used without "safe mode". */
+static ssize_t show_brcmstb_safe_freq(struct cpufreq_policy *policy, char *buf)
+{
+ struct cpufreq_frequency_table *entry;
+ unsigned int safe_freq = 0;
+
+ cpufreq_for_each_valid_entry(entry, policy->freq_table) {
+ if (!(entry->driver_data & BRCMSTB_TBL_SAFE_MODE))
+ safe_freq = entry->frequency;
+ }
+
+ return sprintf(buf, "%u\n", safe_freq);
+}
+
+cpufreq_freq_attr_ro(brcmstb_num_memc);
+cpufreq_freq_attr_ro(brcmstb_freqs);
+cpufreq_freq_attr_ro(brcmstb_safe_freq);
+
+static struct freq_attr *brcmstb_cpufreq_attr[] = {
+ &cpufreq_freq_attr_scaling_available_freqs,
+ &brcmstb_num_memc,
+ &brcmstb_freqs,
+ &brcmstb_safe_freq,
+ NULL
+};
+
+static struct cpufreq_driver brcmstb_driver = {
+ .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
+ .verify = cpufreq_generic_frequency_table_verify,
+ .target_index = brcmstb_target_index,
+ .get = cpufreq_generic_get,
+ .init = brcmstb_cpufreq_init,
+ .attr = brcmstb_cpufreq_attr,
+ .name = BRCMSTB_CPUFREQ_PREFIX,
+};
+
+static int brcmstb_cpufreq_probe(struct platform_device *pdev)
+{
+ int ret;
+
+ ret = brcmstb_prepare_init(pdev);
+ if (ret)
+ return ret;
+
+ brcmstb_driver.driver_data = pdev;
+
+ return cpufreq_register_driver(&brcmstb_driver);
+}
+
+static int brcmstb_cpufreq_remove(struct platform_device *pdev)
+{
+ int ret;
+
+ ret = cpufreq_unregister_driver(&brcmstb_driver);
+ if (ret)
+ return ret;
+
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+static const struct of_device_id brcmstb_cpufreq_match[] = {
+ { .compatible = BRCMSTB_DT_CPU_CLK_CTRL },
+ { }
+};
+MODULE_DEVICE_TABLE(of, brcmstb_cpufreq_match);
+
+static struct platform_driver brcmstb_cpufreq_platdrv = {
+ .driver = {
+ .name = BRCMSTB_CPUFREQ_NAME,
+ .of_match_table = brcmstb_cpufreq_match,
+ },
+ .probe = brcmstb_cpufreq_probe,
+ .remove = brcmstb_cpufreq_remove,
+};
+module_platform_driver(brcmstb_cpufreq_platdrv);
+
+MODULE_AUTHOR("Markus Mayer <mmayer@broadcom.com>");
+MODULE_DESCRIPTION("CPUfreq driver for Broadcom STB SoCs");
+MODULE_LICENSE("GPL");
--
2.7.4
^ permalink raw reply related
* [PATCHv4 00/15] clk: ti: add support for hwmod clocks
From: Stephen Boyd @ 2016-12-20 22:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <88baee5e-48c3-f0d3-de5e-8e578fab0aa4@ti.com>
On 12/19, Tero Kristo wrote:
> On 17/12/16 03:46, Stephen Boyd wrote:
> >On 12/13, Tero Kristo wrote:
> >>On 13/12/16 06:40, Michael Turquette wrote:
> >>>>>On 12/12, Michael Turquette wrote:
> >>>
> >>>Is the goal to describe this hardware topology in DT? Is that right
> >>>thing to do? I think it's cool to have this modeled *somehow* in Linux,
> >>>but I'm not sure DT is the right place to model the interconnect and
> >>>every device hanging off of it.
> >>>
> >>>I don't want to put words in Stephen's mouth, but I think the issue over
> >>>whether clockdomains are CCF clock providers or some genpd thing is
> >>>probably less important to him than the fact that the DT bindings are
> >>>super detailed to inner workings of the SoC.
> >>
> >>Ok, so your preference would be to reduce the data under DT, and the
> >>ideal approach would be a single prcm node. I think we still need to
> >>keep the prm / cm1 / cm2 as separate nodes, as they are pretty
> >>individual from hardware point of view, provide quite different
> >>features, and they reside in some cases in quite different address
> >>spaces also. Anyway, here's what I gather we should probably have in
> >>DT:
> >>
> >>- reset provider
> >> * example: resets = <&prm OMAP4_IVA2_RESET>;
> >> * only from 'prm' node
> >>
> >>- genpd provider (for the hwmods, clockdomains, powerdomains,
> >>voltage domains)
> >> * examples: power-domains = <&cm2 OMAP4_DSS_CORE_MOD>;
> >> power-domains = <&cm2 OMAP4_DSS_CLKDM>;
> >> power-domains = <&prm OMAP4_DSS_PWRDM>;
> >> power-domains = <&prm OMAP4_CORE_VOLTDM>;
> >> * from all 'prm', 'cm1' and 'cm2' nodes, though 'prm' would be the
> >>only one providing _CLKDM, _PWRDM, _VOLTDM genpds.
> >>
> >>- clock provider (for anything that requires clocks)
> >> * example: clocks = <&cm1 OMAP4_DPLL_MPU_CK>;
> >> * from all 'prm', 'cm1' and 'cm2' nodes
> >>
> >>This would eventually cause an ABI breakage for the clock handles,
> >>if we transfer the existing clocks to this format, and remove the
> >>existing clock handles from DT. Otherwise, I think we could just
> >>transition the existing hwmod data to this new format only, and add
> >>the clockdomain / powerdomain / voltagedomain support a bit later.
> >>
> >
> >This sounds about right. Is the ABI break because we get rid of
> >clock nodes and just have a few big nodes?
>
> In the above plan, the ABI breakage is because we get rid of the
> existing clock nodes and replace everything with a single (or few)
> clock provider nodes.
Thanks for confirming.
>
> >I thought we had
> >already broken DT ABI here but if we didn't then that isn't
> >great. Perhaps to make things keep working we can detect the old
> >style one node per clock design and register a bunch of providers
> >individually from the single driver probe? It would have to match
> >up the registers with a clk_hw pointer somewhere, but it should
> >be possible. Alternatively, we keep both designs around for some
> >time and have different compatibles and different driver entry
> >points.
>
> Keeping both around for a while should be okay, the design for this
> series was done with that in mind. I didn't address the scrapping of
> old clock data yet though, but that would be a step taken in the
> future.
>
> First thing to do here would be to implement the hwmod genpds, rest
> can follow later, but we need an agreement if this is the way we
> want to go.
Ok. I guess we're just waiting on Tony then?
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCHv4 00/15] clk: ti: add support for hwmod clocks
From: Tony Lindgren @ 2016-12-20 23:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161220225627.GF5423@codeaurora.org>
* Stephen Boyd <sboyd@codeaurora.org> [161220 14:56]:
> On 12/19, Tero Kristo wrote:
> > First thing to do here would be to implement the hwmod genpds, rest
> > can follow later, but we need an agreement if this is the way we
> > want to go.
>
> Ok. I guess we're just waiting on Tony then?
Sounds right to me except for the hwmod genpd part.. We don't want to
pile up any new code to mach-omap2 but instead we want to make the
hwmod code into proper interconnect driver. As long as we do it that
way, sounds good to me.
Regards,
Tony
^ permalink raw reply
* [PATCH v2] rtc: armada38x: Followed the new recommendation for errata implementation
From: Alexandre Belloni @ 2016-12-21 0:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161213112510.25692-1-gregory.clement@free-electrons.com>
Hi,
On 13/12/2016 at 12:25:10 +0100, Gregory CLEMENT wrote :
> According to RES-3124064:
>
> The device supports CPU write and read access to the RTC time register.
> However, due to this restriction, read and write from/to internal RTC
> register may fail.
>
> Workaround:
> General setup:
> 1. Configure the RTC Mbus Bridge Timing Control register (offset 0x184A0)
> to value 0xFD4D4FFF
> Write RTC WRCLK Period to its maximum value (0x3FF)
> Write RTC WRCLK setup to 0x29
> Write RTC WRCLK High Time to 0x53 (default value)
> Write RTC Read Output Delay to its maximum value (0x1F)
> Mbus - Read All Byte Enable to 0x1 (default value)
> 2. Configure the RTC Test Configuration Register (offset 0xA381C) bit3
> to '1' (Reserved, Marvell internal)
>
> For any RTC register read operation:
> 1. Read the requested register 100 times.
> 2. Find the result that appears most frequently and use this result
> as the correct value.
>
> For any RTC register write operation:
> 1. Issue two dummy writes of 0x0 to the RTC Status register (offset
> 0xA3800).
> 2. Write the time to the RTC Time register (offset 0xA380C).
>
> This patch is based on the work of Shaker Daibes
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> Hi,
>
> this patch followed the patch series sent here:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2016-December/473232.html
>
> For now I kept the patch 2 converting to time64_t apart after Russell
> King feedback.
>
> I merged the patch 1 and 3 and I also substantially modified the 1st
> patch with I think a better implementation.
>
> - First I do not put anymore more a big array onto the stack as
> suggested by Andrew Lunn.
> - Then I optimize the way to find the correct value.
>
> Gregory
>
>
> drivers/rtc/rtc-armada38x.c | 121 +++++++++++++++++++++++++++++++++++---------
> 1 file changed, 97 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/rtc/rtc-armada38x.c b/drivers/rtc/rtc-armada38x.c
> index 9a3f2a6f512e..458ef8da0484 100644
> --- a/drivers/rtc/rtc-armada38x.c
> +++ b/drivers/rtc/rtc-armada38x.c
> @@ -29,50 +29,119 @@
> #define RTC_TIME 0xC
> #define RTC_ALARM1 0x10
>
> +#define SOC_RTC_BRIDGE_TIMING_CTL 0x0
> +#define SOC_RTC_PERIOD_OFFS 0
> +#define SOC_RTC_PERIOD_MASK (0x3FF << SOC_RTC_PERIOD_OFFS)
> +#define SOC_RTC_READ_DELAY_OFFS 26
> +#define SOC_RTC_READ_DELAY_MASK (0x1F << SOC_RTC_READ_DELAY_OFFS)
> +
> #define SOC_RTC_INTERRUPT 0x8
> #define SOC_RTC_ALARM1 BIT(0)
> #define SOC_RTC_ALARM2 BIT(1)
> #define SOC_RTC_ALARM1_MASK BIT(2)
> #define SOC_RTC_ALARM2_MASK BIT(3)
>
> +
Unnecessary blank line ;)
> +#define SAMPLE_NR 100
> +
> +struct value_to_freq {
> + u32 value;
> + u8 freq;
> +};
> +
> struct armada38x_rtc {
> struct rtc_device *rtc_dev;
> void __iomem *regs;
> void __iomem *regs_soc;
> spinlock_t lock;
> int irq;
> + struct value_to_freq *val_to_freq;
> };
>
> /*
> * According to the datasheet, the OS should wait 5us after every
> * register write to the RTC hard macro so that the required update
> * can occur without holding off the system bus
> + * According to errata FE-3124064, Write to any RTC register
> + * may fail. As a workaround, before writing to RTC
> + * register, issue a dummy write of 0x0 twice to RTC Status
> + * register.
> */
> +
> static void rtc_delayed_write(u32 val, struct armada38x_rtc *rtc, int offset)
> {
> + writel(0, rtc->regs + RTC_STATUS);
> + writel(0, rtc->regs + RTC_STATUS);
> writel(val, rtc->regs + offset);
> udelay(5);
> }
>
> +/* Update RTC-MBUS bridge timing parameters */
> +static void rtc_update_mbus_timing_params(struct armada38x_rtc *rtc)
> +{
> + uint32_t reg;
> +
u32 is preferable.
[...]
> @@ -182,7 +244,7 @@ static irqreturn_t armada38x_rtc_alarm_irq(int irq, void *data)
> val = readl(rtc->regs_soc + SOC_RTC_INTERRUPT);
>
> writel(val & ~SOC_RTC_ALARM1, rtc->regs_soc + SOC_RTC_INTERRUPT);
> - val = readl(rtc->regs + RTC_IRQ1_CONF);
> + val = read_rtc_register_wa(rtc, RTC_IRQ1_CONF);
> /* disable all the interrupts for alarm 1 */
> rtc_delayed_write(0, rtc, RTC_IRQ1_CONF);
> /* Ack the event */
> @@ -196,7 +258,6 @@ static irqreturn_t armada38x_rtc_alarm_irq(int irq, void *data)
> else
> event |= RTC_PF;
> }
> -
Unrelated change.
> rtc_update_irq(rtc->rtc_dev, 1, event);
>
> return IRQ_HANDLED;
> @@ -221,6 +282,11 @@ static __init int armada38x_rtc_probe(struct platform_device *pdev)
> if (!rtc)
> return -ENOMEM;
>
> + rtc->val_to_freq = devm_kcalloc(&pdev->dev, SAMPLE_NR,
> + sizeof(struct value_to_freq), GFP_KERNEL);
> + if (!rtc->val_to_freq)
> + return -ENOMEM;
> +
The whole struct armada38x_rtc is already allocated just before. Maybe
you can put the whole array inside the structure instead of doing a new
allocation.
> spin_lock_init(&rtc->lock);
>
> res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rtc");
> @@ -253,6 +319,9 @@ static __init int armada38x_rtc_probe(struct platform_device *pdev)
> if (rtc->irq != -1)
> device_init_wakeup(&pdev->dev, 1);
>
> + /* Update RTC-MBUS bridge timing parameters */
> + rtc_update_mbus_timing_params(rtc);
> +
> rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, pdev->name,
> &armada38x_rtc_ops, THIS_MODULE);
> if (IS_ERR(rtc->rtc_dev)) {
> @@ -260,6 +329,7 @@ static __init int armada38x_rtc_probe(struct platform_device *pdev)
> dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret);
> return ret;
> }
> +
Unrelated change.
> return 0;
> }
>
> @@ -280,6 +350,9 @@ static int armada38x_rtc_resume(struct device *dev)
> if (device_may_wakeup(dev)) {
> struct armada38x_rtc *rtc = dev_get_drvdata(dev);
>
> + /* Update RTC-MBUS bridge timing parameters */
> + rtc_update_mbus_timing_params(rtc);
> +
> return disable_irq_wake(rtc->irq);
> }
>
> --
> 2.10.2
>
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* [PATCH 1/2] soc: ti: knav_dma: fix typos in trace message
From: Santosh Shilimkar @ 2016-12-21 1:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482272663-29829-1-git-send-email-m-karicheri2@ti.com>
On 12/20/2016 2:24 PM, Murali Karicheri wrote:
> This patch fixes some typos in the trace message
>
> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> ---
Patch 1 and 2 looks fine. Will pick them for next
merge window. Thanks !!
Regards,
Santosh
^ permalink raw reply
* [PATCH 0/4] video: ARM CLCD: add support of an optional GPIO to enable panel
From: Vladimir Zapolskiy @ 2016-12-21 3:27 UTC (permalink / raw)
To: linux-arm-kernel
The changeset contains a number of cleanups, changed semantics of
init_panel() callback, which allows to simplify getting of panel
properties from panel device tree node, and a handling of optional
"enable-gpios" panel property, the latter is described in
display/panel/panel-dpi.txt device tree binding documentation, but
it has been unsupported by the ARM CLCD driver.
Vladimir Zapolskiy (4):
video: ARM CLCD: sort included headers out alphabetically
video: ARM CLCD: use panel device node for panel initialization
video: ARM CLCD: use panel device node for getting backlight and mode
video: ARM CLCD: add support of an optional GPIO to enable panel
drivers/video/fbdev/amba-clcd-nomadik.c | 9 +---
drivers/video/fbdev/amba-clcd-nomadik.h | 5 +-
drivers/video/fbdev/amba-clcd-versatile.c | 14 ++----
drivers/video/fbdev/amba-clcd-versatile.h | 5 +-
drivers/video/fbdev/amba-clcd.c | 80 +++++++++++++++++++------------
include/linux/amba/clcd.h | 2 +
6 files changed, 59 insertions(+), 56 deletions(-)
--
2.10.2
^ permalink raw reply
* [PATCH 1/4] video: ARM CLCD: sort included headers out alphabetically
From: Vladimir Zapolskiy @ 2016-12-21 3:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161221032717.13154-1-vz@mleia.com>
To simplify the task of looking through the list of included headers sort
them out alphabetically, some of the truly redundant headers are removed
from the list.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
drivers/video/fbdev/amba-clcd.c | 23 +++++++++--------------
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
index ec2671d..a806fb8 100644
--- a/drivers/video/fbdev/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
@@ -10,27 +10,22 @@
*
* ARM PrimeCell PL110 Color LCD Controller
*/
-#include <linux/dma-mapping.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/slab.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/clcd.h>
+#include <linux/backlight.h>
+#include <linux/clk.h>
#include <linux/delay.h>
-#include <linux/mm.h>
+#include <linux/dma-mapping.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/list.h>
-#include <linux/amba/bus.h>
-#include <linux/amba/clcd.h>
-#include <linux/bitops.h>
-#include <linux/clk.h>
-#include <linux/hardirq.h>
-#include <linux/of.h>
+#include <linux/mm.h>
+#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_graph.h>
-#include <linux/backlight.h>
+#include <linux/slab.h>
+#include <linux/string.h>
#include <video/display_timing.h>
#include <video/of_display_timing.h>
#include <video/videomode.h>
--
2.10.2
^ permalink raw reply related
* [PATCH 2/4] video: ARM CLCD: use panel device node for panel initialization
From: Vladimir Zapolskiy @ 2016-12-21 3:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161221032717.13154-1-vz@mleia.com>
There is no necessity to pass an endpoint device node to custom panel
initialization functions, because a child panel device node should be
sufficient, note that the existing init_panel() callback declaration from
linux/amba/clcd.h already prompts to use the panel device node here.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
drivers/video/fbdev/amba-clcd-nomadik.c | 9 +--------
drivers/video/fbdev/amba-clcd-nomadik.h | 5 ++---
drivers/video/fbdev/amba-clcd-versatile.c | 14 +++-----------
drivers/video/fbdev/amba-clcd-versatile.h | 5 ++---
drivers/video/fbdev/amba-clcd.c | 8 ++++++--
5 files changed, 14 insertions(+), 27 deletions(-)
diff --git a/drivers/video/fbdev/amba-clcd-nomadik.c b/drivers/video/fbdev/amba-clcd-nomadik.c
index 0c06fca..a9a8f75 100644
--- a/drivers/video/fbdev/amba-clcd-nomadik.c
+++ b/drivers/video/fbdev/amba-clcd-nomadik.c
@@ -214,15 +214,8 @@ static void tpg110_init(struct device *dev, struct device_node *np,
board->disable = tpg110_disable;
}
-int nomadik_clcd_init_panel(struct clcd_fb *fb,
- struct device_node *endpoint)
+int nomadik_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel)
{
- struct device_node *panel;
-
- panel = of_graph_get_remote_port_parent(endpoint);
- if (!panel)
- return -ENODEV;
-
if (of_device_is_compatible(panel, "tpo,tpg110"))
tpg110_init(&fb->dev->dev, panel, fb->board);
else
diff --git a/drivers/video/fbdev/amba-clcd-nomadik.h b/drivers/video/fbdev/amba-clcd-nomadik.h
index 50aa9bd..a24032c 100644
--- a/drivers/video/fbdev/amba-clcd-nomadik.h
+++ b/drivers/video/fbdev/amba-clcd-nomadik.h
@@ -6,8 +6,7 @@
#ifdef CONFIG_ARCH_NOMADIK
int nomadik_clcd_init_board(struct amba_device *adev,
struct clcd_board *board);
-int nomadik_clcd_init_panel(struct clcd_fb *fb,
- struct device_node *endpoint);
+int nomadik_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel);
#else
static inline int nomadik_clcd_init_board(struct amba_device *adev,
struct clcd_board *board)
@@ -15,7 +14,7 @@ static inline int nomadik_clcd_init_board(struct amba_device *adev,
return 0;
}
static inline int nomadik_clcd_init_panel(struct clcd_fb *fb,
- struct device_node *endpoint)
+ struct device_node *panel)
{
return 0;
}
diff --git a/drivers/video/fbdev/amba-clcd-versatile.c b/drivers/video/fbdev/amba-clcd-versatile.c
index e5d9bfc..d42047d 100644
--- a/drivers/video/fbdev/amba-clcd-versatile.c
+++ b/drivers/video/fbdev/amba-clcd-versatile.c
@@ -452,11 +452,9 @@ static const struct versatile_panel versatile_panels[] = {
},
};
-static void versatile_panel_probe(struct device *dev,
- struct device_node *endpoint)
+static void versatile_panel_probe(struct device *dev, struct device_node *panel)
{
struct versatile_panel const *vpanel = NULL;
- struct device_node *panel = NULL;
u32 val;
int ret;
int i;
@@ -488,11 +486,6 @@ static void versatile_panel_probe(struct device *dev,
return;
}
- panel = of_graph_get_remote_port_parent(endpoint);
- if (!panel) {
- dev_err(dev, "could not locate panel in DT\n");
- return;
- }
if (!of_device_is_compatible(panel, vpanel->compatible))
dev_err(dev, "panel in DT is not compatible with the "
"auto-detected panel, continuing anyway\n");
@@ -514,8 +507,7 @@ static void versatile_panel_probe(struct device *dev,
}
}
-int versatile_clcd_init_panel(struct clcd_fb *fb,
- struct device_node *endpoint)
+int versatile_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel)
{
const struct of_device_id *clcd_id;
enum versatile_clcd versatile_clcd_type;
@@ -551,7 +543,7 @@ int versatile_clcd_init_panel(struct clcd_fb *fb,
fb->board->enable = versatile_clcd_enable;
fb->board->disable = versatile_clcd_disable;
fb->board->decode = versatile_clcd_decode;
- versatile_panel_probe(dev, endpoint);
+ versatile_panel_probe(dev, panel);
dev_info(dev, "set up callbacks for Versatile\n");
break;
case REALVIEW_CLCD_EB:
diff --git a/drivers/video/fbdev/amba-clcd-versatile.h b/drivers/video/fbdev/amba-clcd-versatile.h
index 1b14359..4692c30 100644
--- a/drivers/video/fbdev/amba-clcd-versatile.h
+++ b/drivers/video/fbdev/amba-clcd-versatile.h
@@ -6,11 +6,10 @@
#include <linux/platform_data/video-clcd-versatile.h>
#if defined(CONFIG_PLAT_VERSATILE_CLCD) && defined(CONFIG_OF)
-int versatile_clcd_init_panel(struct clcd_fb *fb,
- struct device_node *endpoint);
+int versatile_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel);
#else
static inline int versatile_clcd_init_panel(struct clcd_fb *fb,
- struct device_node *endpoint)
+ struct device_node *panel)
{
return 0;
}
diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
index a806fb8..f25b5fc 100644
--- a/drivers/video/fbdev/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
@@ -764,7 +764,7 @@ static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0)
static int clcdfb_of_init_display(struct clcd_fb *fb)
{
- struct device_node *endpoint;
+ struct device_node *endpoint, *panel;
int err;
unsigned int bpp;
u32 max_bandwidth;
@@ -781,8 +781,12 @@ static int clcdfb_of_init_display(struct clcd_fb *fb)
if (!endpoint)
return -ENODEV;
+ panel = of_graph_get_remote_port_parent(endpoint);
+ if (!panel)
+ return -ENODEV;
+
if (fb->vendor->init_panel) {
- err = fb->vendor->init_panel(fb, endpoint);
+ err = fb->vendor->init_panel(fb, panel);
if (err)
return err;
}
--
2.10.2
^ permalink raw reply related
* [PATCH 3/4] video: ARM CLCD: use panel device node for getting backlight and mode
From: Vladimir Zapolskiy @ 2016-12-21 3:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161221032717.13154-1-vz@mleia.com>
Having obtained panel device node in clcdfb_of_init_display() it allows to
generalize and simplify two more helper functions clcdfb_of_get_backlight()
and clcdfb_of_get_mode().
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
drivers/video/fbdev/amba-clcd.c | 20 +++++---------------
1 file changed, 5 insertions(+), 15 deletions(-)
diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
index f25b5fc..0fab92c 100644
--- a/drivers/video/fbdev/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
@@ -624,16 +624,11 @@ static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
mode->refresh);
}
-static int clcdfb_of_get_backlight(struct device_node *endpoint,
+static int clcdfb_of_get_backlight(struct device_node *panel,
struct clcd_panel *clcd_panel)
{
- struct device_node *panel;
struct device_node *backlight;
- panel = of_graph_get_remote_port_parent(endpoint);
- if (!panel)
- return -ENODEV;
-
/* Look up the optional backlight phandle */
backlight = of_parse_phandle(panel, "backlight", 0);
if (backlight) {
@@ -646,19 +641,14 @@ static int clcdfb_of_get_backlight(struct device_node *endpoint,
return 0;
}
-static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint,
- struct clcd_panel *clcd_panel)
+static int clcdfb_of_get_mode(struct device *dev, struct device_node *panel,
+ struct clcd_panel *clcd_panel)
{
int err;
- struct device_node *panel;
struct fb_videomode *mode;
char *name;
int len;
- panel = of_graph_get_remote_port_parent(endpoint);
- if (!panel)
- return -ENODEV;
-
/* Only directly connected DPI panels supported for now */
if (of_device_is_compatible(panel, "panel-dpi"))
err = clcdfb_of_get_dpi_panel_mode(panel, clcd_panel);
@@ -791,11 +781,11 @@ static int clcdfb_of_init_display(struct clcd_fb *fb)
return err;
}
- err = clcdfb_of_get_backlight(endpoint, fb->panel);
+ err = clcdfb_of_get_backlight(panel, fb->panel);
if (err)
return err;
- err = clcdfb_of_get_mode(&fb->dev->dev, endpoint, fb->panel);
+ err = clcdfb_of_get_mode(&fb->dev->dev, panel, fb->panel);
if (err)
return err;
--
2.10.2
^ permalink raw reply related
* [PATCH 4/4] video: ARM CLCD: add support of an optional GPIO to enable panel
From: Vladimir Zapolskiy @ 2016-12-21 3:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161221032717.13154-1-vz@mleia.com>
The change adds handling of "enable-gpios" property of panel-dpi device
node used with an ARM CLCD controller, note that the property already has
a description in display/panel/panel-dpi.txt documentation and it founds
practical usage while describing some panel devices connected to other
types of display controllers.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
drivers/video/fbdev/amba-clcd.c | 29 +++++++++++++++++++++++++++++
include/linux/amba/clcd.h | 2 ++
2 files changed, 31 insertions(+)
diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
index 0fab92c..0bb8646 100644
--- a/drivers/video/fbdev/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
@@ -17,6 +17,7 @@
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/fb.h>
+#include <linux/gpio/consumer.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/list.h>
@@ -87,6 +88,9 @@ static void clcdfb_disable(struct clcd_fb *fb)
writel(val, fb->regs + fb->off_cntl);
}
+ if (fb->panel->enable_gpio)
+ gpiod_set_value_cansleep(fb->panel->enable_gpio, 0);
+
/*
* Disable CLCD clock source.
*/
@@ -106,6 +110,9 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
clk_enable(fb->clk);
}
+ if (fb->panel->enable_gpio)
+ gpiod_set_value_cansleep(fb->panel->enable_gpio, 1);
+
/*
* Bring up by first enabling..
*/
@@ -624,6 +631,24 @@ static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
mode->refresh);
}
+static int clcdfb_of_get_enable_gpio(struct device *dev,
+ struct device_node *panel,
+ struct clcd_panel *clcd_panel)
+{
+ int err;
+
+ clcd_panel->enable_gpio = devm_get_gpiod_from_child(dev, "enable",
+ &panel->fwnode);
+ if (IS_ERR(clcd_panel->enable_gpio)) {
+ err = PTR_ERR(clcd_panel->enable_gpio);
+ clcd_panel->enable_gpio = NULL;
+ if (err != -ENOENT)
+ return err;
+ }
+
+ return 0;
+}
+
static int clcdfb_of_get_backlight(struct device_node *panel,
struct clcd_panel *clcd_panel)
{
@@ -781,6 +806,10 @@ static int clcdfb_of_init_display(struct clcd_fb *fb)
return err;
}
+ err = clcdfb_of_get_enable_gpio(&fb->dev->dev, panel, fb->panel);
+ if (err)
+ return err;
+
err = clcdfb_of_get_backlight(panel, fb->panel);
if (err)
return err;
diff --git a/include/linux/amba/clcd.h b/include/linux/amba/clcd.h
index 1035879..a9c6007 100644
--- a/include/linux/amba/clcd.h
+++ b/include/linux/amba/clcd.h
@@ -105,6 +105,7 @@ enum {
};
struct backlight_device;
+struct gpio_desc;
struct clcd_panel {
struct fb_videomode mode;
@@ -119,6 +120,7 @@ struct clcd_panel {
grayscale:1;
unsigned int connector;
struct backlight_device *backlight;
+ struct gpio_desc *enable_gpio;
/*
* If the B/R lines are switched between the CLCD
* and the panel we need to know this and not try to
--
2.10.2
^ permalink raw reply related
* [RFC PATCH] iommu/arm-smmu: Add global SMR masking property
From: Rob Herring @ 2016-12-21 3:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ad6b6a4937b1fe183e6d48ccbaf4cb46db92fed4.1481893907.git.robin.murphy@arm.com>
On Fri, Dec 16, 2016 at 01:19:29PM +0000, Robin Murphy wrote:
> The current SMR masking support using a 2-cell iommu-specifier is
> primarily intended to handle individual masters with large and/or
> complex Stream ID assignments; it quickly gets a bit clunky in other SMR
> use-cases where we just want to consistently mask out the same part of
> every Stream ID (e.g. for MMU-500 configurations where the appended TBU
> number gets in the way unnecessarily). Let's add a new property to allow
> a single global mask value to better fit the latter situation.
>
> CC: Stuart Yoder <stuart.yoder@nxp.com>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
>
> Compile-tested only...
>
> Documentation/devicetree/bindings/iommu/arm,smmu.txt | 8 ++++++++
> drivers/iommu/arm-smmu.c | 4 +++-
> 2 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index e862d1485205..98f5cbe5fdb4 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -60,6 +60,14 @@ conditions.
> aliases of secure registers have to be used during
> SMMU configuration.
>
> +- stream-match-mask : Specifies a fixed SMR mask value to combine with
Needs a vendor prefix.
Otherwise looks fine.
> + the Stream ID value from every iommu-specifier. This
> + may be used instead of an "#iommu-cells" value of 2
> + when there is no need for per-master SMR masks, but
> + it is still desired to mask some portion of every
> + Stream ID (e.g. for certain MMU-500 configurations
> + given globally unique external IDs).
> +
> ** Deprecated properties:
>
> - mmu-masters (deprecated in favour of the generic "iommus" binding) :
^ permalink raw reply
* [PATCH 1/3] dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties
From: Vladimir Zapolskiy @ 2016-12-21 3:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <015305d5-c22f-52da-9605-f2c19e3108b1@mleia.com>
On 12/10/2016 01:51 AM, Vladimir Zapolskiy wrote:
> Hi Rob,
>
> On 12/09/2016 11:41 PM, Rob Herring wrote:
>> On Mon, Dec 05, 2016 at 03:42:37AM +0200, Vladimir Zapolskiy wrote:
>>> NXP LPC32xx SoCs have two simple independent PWM controllers with a single
>>> output each, in this case there is no need to specify PWM channel argument
>>> on client side, one cell for setting PWM output frequency is sufficient.
>>>
>>> Another added to the description property 'clocks' has a standard meaning
>>> of a controller supply clock, in the LPC32xx User's Manual the clock is
>>> denoted as PWM1_CLK or PWM2_CLK clock.
>>>
>>> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
>>> ---
>>> Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
>>> 1 file changed, 7 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>>> index 74b5bc5..523d796 100644
>>> --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>>> +++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>>> @@ -3,15 +3,22 @@ LPC32XX PWM controller
>>> Required properties:
>>> - compatible: should be "nxp,lpc3220-pwm"
>>> - reg: physical base address and length of the controller's registers
>>> +- clocks: clock phandle and clock specifier pair
>>> +- #pwm-cells: should be 1, the cell is used to specify the period in
>>> + nanoseconds.
>>
>> This use of the cell is a bit odd as the period is s/w config and this
>> would typically be a channel selection or such.
>
> this is a classic PWM channel configuration property for PWM consumers
> described in DT, for instance PWM frequency for display panel backlight
> on boot.
>
> I think >90% of PWM controllers with device tree bindings have this
> argument in #pwm-cells, from bindings/pwm/pwm.txt :
>
> pwm-specifier typically encodes the chip-relative PWM number and
> the PWM period in nanoseconds.
>
> You also may skim through phandle arguments of 'pwms' property,
> commonly the second argument is the requested frequency.
>
> In this particular case I just drop PWM channel number, because
> the LPC32xx PWM controller has a single output channel.
>
>> What if I want user specified/changed periods?
>>
>
> The preset period still can be changed over sysfs in runtime.
Rob, have I managed to answer your questions?
If you accept my clarification, could you please ack the change?
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH] Documentation: dt: Explicitly mark Samsung Exynos SoC bindings as unstable
From: Rob Herring @ 2016-12-21 3:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481897676-13578-1-git-send-email-m.szyprowski@samsung.com>
On Fri, Dec 16, 2016 at 03:14:36PM +0100, Marek Szyprowski wrote:
> Samsung Exynos SoCs and boards related bindings evolved since the initial
> introduction, but initially the bindings were minimal and a bit incomplete
> (they never described all the hardware modules available in the SoCs).
> Since then some significant (not fully compatible) changes have been
> already committed a few times (like gpio replaced by pinctrl, display ddc,
> mfc reserved memory, some core clocks added to various hardware modules,
> added more required nodes).
>
> On the other side there are no boards which have device tree embedded in
> the bootloader. Device tree blob is always compiled from the kernel tree
> and updated together with the kernel image.
>
> Thus to avoid further adding a bunch of workarounds for old/missing
> bindings and allow to make cleanup of the existing code and device tree
> files, lets mark Samsung Exynos SoC platform bindings as unstable. This
> means that bindings can may change at any time and users should use the
> dtb file compiled from the same kernel source tree as the kernel image.
I'd like this to be more explicit about which bindings in particular are
not considered stable (or which ones are). "exynos" covers lots of
things.
I'll still complain if commit messages don't say explicitly that the
commit breaks compatibility and why that is okay.
Rob
^ permalink raw reply
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