* [RFC] arm64/acpi: make ACPI boot preference configurable
From: Jonathan Toppins @ 2016-12-21 17:54 UTC (permalink / raw)
To: linux-arm-kernel
This patch allows a user to configure ACPI to be preferred over
device-tree.
Currently for ACPI to be used a user either has to set acpi=on on the
kernel command line or make sure any device tree passed to the kernel
is empty. If the dtb passed to the kernel is non-empty then device-tree
will be chosen as the boot method of choice even if it is not correct.
To prevent this situation where a system is only intended to be booted
via ACPI a user can set this kernel configuration so it ignores
device-tree settings unless ACPI table checks fail.
Signed-off-by: Jonathan Toppins <jtoppins@redhat.com>
---
arch/arm64/Kconfig | 13 +++++++++++++
arch/arm64/kernel/acpi.c | 2 +-
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 111742126897..e432e84245b9 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -954,6 +954,19 @@ config ARM64_ACPI_PARKING_PROTOCOL
protocol even if the corresponding data is present in the ACPI
MADT table.
+config ARM64_PREFER_ACPI
+ bool "Prefer usage of ACPI boot tables over device-tree"
+ depends on ACPI
+ help
+ Normally device-tree is preferred over ACPI on arm64 unless
+ explicitly preferred via kernel command line, something like: acpi=on
+ This configuration changes this default behaviour by pretending
+ the user set acpi=on on the command line. This configuration still
+ allows the user to turn acpi table parsing off via acpi=off. If
+ for some reason the table checks fail the system will still fall
+ back to using device-tree unless the user explicitly sets acpi=force
+ on the command line.
+
config CMDLINE
string "Default kernel command string"
default ""
diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index 252a6d9c1da5..b5dfa5752ff7 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -43,7 +43,7 @@ int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */
EXPORT_SYMBOL(acpi_pci_disabled);
static bool param_acpi_off __initdata;
-static bool param_acpi_on __initdata;
+static bool param_acpi_on __initdata = IS_ENABLED(CONFIG_ARM64_PREFER_ACPI);
static bool param_acpi_force __initdata;
static int __init parse_acpi(char *arg)
--
2.10.2
^ permalink raw reply related
* ARM: imx: mmdc: Fix completely broken cpu hotplug code
From: Thomas Gleixner @ 2016-12-21 18:21 UTC (permalink / raw)
To: linux-arm-kernel
The cpu hotplug support of this perf driver is broken in several ways:
1) It adds a instance before setting up the state.
2) The state for the instance is different from the state of the
callback. It's just a randomly chosen state.
3) The instance registration is not error checked so nobody noticed that
the call can never succeed.
4) The state for the multi install callbacks is chosen randomly and
overwrites existing state. This is now prevented by the core code so the
call is guaranteed to fail.
5) The error exit path in the init function leaves the instance registered
and then frees the memory which contains the enqueued hlist node.
6) The remove function is removing the state and not the instance.
Fix it by:
- Setting up the state before adding instances. Use a dynamically allocated
state for it.
- Install instances after the state has been set up
- Remove the instance in the error path before freeing memory
- Remove instance not the state in the driver remove callback
While at is use raw_cpu_processor_id(), because cpu_processor_id() cannot
be used in preemptible context, and set the driver data after successful
registration of the pmu.
Fixes: e76bdfd7403a ("ARM: imx: Added perf functionality to mmdc driver")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Zhengyu Shen <zhengyu.shen@nxp.com>
Cc: Frank Li <frank.li@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
---
arch/arm/mach-imx/mmdc.c | 34 ++++++++++++++++++++++------------
include/linux/cpuhotplug.h | 1 +
2 files changed, 23 insertions(+), 12 deletions(-)
--- a/arch/arm/mach-imx/mmdc.c
+++ b/arch/arm/mach-imx/mmdc.c
@@ -60,6 +60,7 @@
#define to_mmdc_pmu(p) container_of(p, struct mmdc_pmu, pmu)
+static enum cpuhp_state cpuhp_mmdc_state;
static int ddr_type;
struct fsl_mmdc_devtype_data {
@@ -451,8 +452,8 @@ static int imx_mmdc_remove(struct platfo
{
struct mmdc_pmu *pmu_mmdc = platform_get_drvdata(pdev);
+ cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node);
perf_pmu_unregister(&pmu_mmdc->pmu);
- cpuhp_remove_state_nocalls(CPUHP_ONLINE);
kfree(pmu_mmdc);
return 0;
}
@@ -472,6 +473,18 @@ static int imx_mmdc_perf_init(struct pla
return -ENOMEM;
}
+ /* The first instance registers the hotplug state */
+ if (!cpuhp_mmdc_state) {
+ ret = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN,
+ "perf/arm/mmdc:online", NULL,
+ mmdc_pmu_offline_cpu);
+ if (ret < 0) {
+ pr_err("cpuhp_setup_state_multi failed\n");
+ goto pmu_free;
+ }
+ cpuhp_mmdc_state = ret;
+ }
+
mmdc_num = mmdc_pmu_init(pmu_mmdc, mmdc_base, &pdev->dev);
if (mmdc_num == 0)
name = "mmdc";
@@ -485,26 +498,23 @@ static int imx_mmdc_perf_init(struct pla
HRTIMER_MODE_REL);
pmu_mmdc->hrtimer.function = mmdc_pmu_timer_handler;
- cpuhp_state_add_instance_nocalls(CPUHP_ONLINE,
- &pmu_mmdc->node);
- cpumask_set_cpu(smp_processor_id(), &pmu_mmdc->cpu);
- ret = cpuhp_setup_state_multi(CPUHP_AP_NOTIFY_ONLINE,
- "MMDC_ONLINE", NULL,
- mmdc_pmu_offline_cpu);
- if (ret) {
- pr_err("cpuhp_setup_state_multi failure\n");
- goto pmu_register_err;
- }
+ cpumask_set_cpu(raw_smp_processor_id(), &pmu_mmdc->cpu);
+
+ /* Register the pmu instance for cpu hotplug */
+ cpuhp_state_add_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node);
ret = perf_pmu_register(&(pmu_mmdc->pmu), name, -1);
- platform_set_drvdata(pdev, pmu_mmdc);
if (ret)
goto pmu_register_err;
+
+ platform_set_drvdata(pdev, pmu_mmdc);
return 0;
pmu_register_err:
pr_warn("MMDC Perf PMU failed (%d), disabled\n", ret);
+ cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node);
hrtimer_cancel(&pmu_mmdc->hrtimer);
+pmu_free:
kfree(pmu_mmdc);
return ret;
}
--- a/include/linux/cpuhotplug.h
+++ b/include/linux/cpuhotplug.h
@@ -140,6 +140,7 @@ enum cpuhp_state {
CPUHP_AP_PERF_ARM_CCI_ONLINE,
CPUHP_AP_PERF_ARM_CCN_ONLINE,
CPUHP_AP_PERF_ARM_L2X0_ONLINE,
+ CPUHP_AP_PERF_ARM_MMDC_ONLINE,
CPUHP_AP_WORKQUEUE_ONLINE,
CPUHP_AP_RCUTREE_ONLINE,
CPUHP_AP_NOTIFY_ONLINE,
^ permalink raw reply
* [arm-platforms:kvm-arm64/gicv4-wip 17/39] drivers/irqchip/irq-gic-v3-its.c:698:24: error: 'id' undeclared
From: kbuild test robot @ 2016-12-21 18:26 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/gicv4-wip
head: 1bca4673c546185e9812e8479900eca8a3ca9c33
commit: 1136731f544e664ab2990fe615c049ead0479b6d [17/39] irqchip/gic-v3-its: Generalize LPI configuration
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 1136731f544e664ab2990fe615c049ead0479b6d
# save the attached .config to linux build tree
make.cross ARCH=arm64
Note: the arm-platforms/kvm-arm64/gicv4-wip HEAD 1bca4673c546185e9812e8479900eca8a3ca9c33 builds fine.
It only hurts bisectibility.
All errors (new ones prefixed by >>):
drivers/irqchip/irq-gic-v3-its.c: In function 'lpi_update_config':
>> drivers/irqchip/irq-gic-v3-its.c:698:24: error: 'id' undeclared (first use in this function)
its_send_inv(its_dev, id);
^~
drivers/irqchip/irq-gic-v3-its.c:698:24: note: each undeclared identifier is reported only once for each function it appears in
vim +/id +698 drivers/irqchip/irq-gic-v3-its.c
c48ed51c Marc Zyngier 2014-11-24 692 * Humpf...
c48ed51c Marc Zyngier 2014-11-24 693 */
c48ed51c Marc Zyngier 2014-11-24 694 if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING)
c48ed51c Marc Zyngier 2014-11-24 695 __flush_dcache_area(cfg, sizeof(*cfg));
c48ed51c Marc Zyngier 2014-11-24 696 else
c48ed51c Marc Zyngier 2014-11-24 697 dsb(ishst);
c48ed51c Marc Zyngier 2014-11-24 @698 its_send_inv(its_dev, id);
c48ed51c Marc Zyngier 2014-11-24 699 }
c48ed51c Marc Zyngier 2014-11-24 700
c48ed51c Marc Zyngier 2014-11-24 701 static void its_mask_irq(struct irq_data *d)
:::::: The code at line 698 was first introduced by commit
:::::: c48ed51c0d101ec4351530bdd6e1a01808f0a441 irqchip: GICv3: ITS: irqchip implementation
:::::: TO: Marc Zyngier <marc.zyngier@arm.com>
:::::: CC: Jason Cooper <jason@lakedaemon.net>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* ARM: imx: mmdc: Fix completely broken cpu hotplug code
From: Thomas Gleixner @ 2016-12-21 18:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.20.1612211917490.3424@nanos>
On Wed, 21 Dec 2016, Thomas Gleixner wrote:
> The cpu hotplug support of this perf driver is broken in several ways:
>
> 1) It adds a instance before setting up the state.
>
> 2) The state for the instance is different from the state of the
> callback. It's just a randomly chosen state.
>
> 3) The instance registration is not error checked so nobody noticed that
> the call can never succeed.
>
> 4) The state for the multi install callbacks is chosen randomly and
> overwrites existing state. This is now prevented by the core code so the
> call is guaranteed to fail.
>
> 5) The error exit path in the init function leaves the instance registered
> and then frees the memory which contains the enqueued hlist node.
>
> 6) The remove function is removing the state and not the instance.
>
> Fix it by:
>
> - Setting up the state before adding instances. Use a dynamically allocated
> state for it.
>
> - Install instances after the state has been set up
>
> - Remove the instance in the error path before freeing memory
>
> - Remove instance not the state in the driver remove callback
>
> While at is use raw_cpu_processor_id(), because cpu_processor_id() cannot
> be used in preemptible context, and set the driver data after successful
> registration of the pmu.
>
> Fixes: e76bdfd7403a ("ARM: imx: Added perf functionality to mmdc driver")
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Cc: Zhengyu Shen <zhengyu.shen@nxp.com>
> Cc: Frank Li <frank.li@nxp.com>
> Cc: Shawn Guo <shawnguo@kernel.org>
Shawn,
as I have the final hotplug notifier removal pending here, which will break
also the compilation of this driver, I would prefer to merge that through
my tree before the removal patches to avoid build breakage.
Thanks,
tglx
^ permalink raw reply
* [PATCH 10/18] arm64: ilp32: introduce binfmt_ilp32.c
From: Yury Norov @ 2016-12-21 18:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161205153801.GE14429@e104818-lin.cambridge.arm.com>
On Mon, Dec 05, 2016 at 03:38:01PM +0000, Catalin Marinas wrote:
> On Fri, Oct 21, 2016 at 11:33:09PM +0300, Yury Norov wrote:
> > binfmt_ilp32.c is needed to handle ILP32 binaries
> >
> > Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
> > Signed-off-by: Bamvor Zhang Jian <bamvor.zhangjian@linaro.org>
> > ---
> > arch/arm64/include/asm/elf.h | 6 +++
> > arch/arm64/kernel/Makefile | 1 +
> > arch/arm64/kernel/binfmt_ilp32.c | 97 ++++++++++++++++++++++++++++++++++++++++
> > 3 files changed, 104 insertions(+)
> > create mode 100644 arch/arm64/kernel/binfmt_ilp32.c
> >
> > diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
> > index f259fe8..be29dde 100644
> > --- a/arch/arm64/include/asm/elf.h
> > +++ b/arch/arm64/include/asm/elf.h
> > @@ -175,10 +175,16 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
> >
> > #define COMPAT_ELF_ET_DYN_BASE (2 * TASK_SIZE_32 / 3)
> >
> > +#ifndef USE_AARCH64_GREG
> > /* AArch32 registers. */
> > #define COMPAT_ELF_NGREG 18
> > typedef unsigned int compat_elf_greg_t;
> > typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
> > +#else /* AArch64 registers for AARCH64/ILP32 */
> > +#define COMPAT_ELF_NGREG ELF_NGREG
> > +#define compat_elf_greg_t elf_greg_t
> > +#define compat_elf_gregset_t elf_gregset_t
> > +#endif
>
> I think you only need compat_elf_gregset_t definition here and leave the
> other two undefined.
I checked everything here again, and found that almost all compat defines
may be moved to corresponding binfmt files. If everything is OK, I'll
incorporate next patch to the series
Yury
--
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index abb75f5..76f0a5c 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -176,30 +176,10 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
#define COMPAT_ELF_ET_DYN_BASE (2 * TASK_SIZE_32 / 3)
-#ifndef USE_AARCH64_GREG
/* AArch32 registers. */
#define COMPAT_ELF_NGREG 18
typedef unsigned int compat_elf_greg_t;
typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
-#else /* AArch64 registers for AARCH64/ILP32 */
-#define COMPAT_ELF_NGREG ELF_NGREG
-#define compat_elf_greg_t elf_greg_t
-#define compat_elf_gregset_t elf_gregset_t
-#endif
-
-/* AArch32 EABI. */
-#define EF_ARM_EABI_MASK 0xff000000
-#define compat_elf_check_arch(x) (system_supports_32bit_el0() && \
- ((x)->e_machine == EM_ARM) && \
- ((x)->e_flags & EF_ARM_EABI_MASK))
-
-#define compat_start_thread compat_start_thread
-#define COMPAT_ARCH_DLINFO
-extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
- int uses_interp);
-#define compat_arch_setup_additional_pages \
- aarch32_setup_vectors_page
-
#endif /* CONFIG_COMPAT */
#endif /* !__ASSEMBLY__ */
diff --git a/arch/arm64/kernel/binfmt_elf32.c b/arch/arm64/kernel/binfmt_elf32.c
index 99a4cf2..7c38a22 100644
--- a/arch/arm64/kernel/binfmt_elf32.c
+++ b/arch/arm64/kernel/binfmt_elf32.c
@@ -17,16 +17,16 @@
#define COMPAT_ELF_HWCAP (compat_elf_hwcap)
#define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2)
-#ifdef __AARCH64EB__
-#define COMPAT_ELF_PLATFORM ("v8b")
-#else
-#define COMPAT_ELF_PLATFORM ("v8l")
-#endif
-
#define compat_arch_setup_additional_pages \
aarch32_setup_vectors_page
struct linux_binprm;
extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
int uses_interp);
+/* AArch32 EABI. */
+#define compat_elf_check_arch(x) (system_supports_32bit_el0() && \
+ ((x)->e_machine == EM_ARM) && \
+ ((x)->e_flags & EF_ARM_EABI_MASK))
+
+
#include "../../../fs/compat_binfmt_elf.c"
diff --git a/arch/arm64/kernel/binfmt_ilp32.c b/arch/arm64/kernel/binfmt_ilp32.c
index dd62467..ec4a412 100644
--- a/arch/arm64/kernel/binfmt_ilp32.c
+++ b/arch/arm64/kernel/binfmt_ilp32.c
@@ -1,7 +1,9 @@
/*
* Support for ILP32 Linux/aarch64 ELF binaries.
*/
-#define USE_AARCH64_GREG
+
+#undef compat_elf_gregset_t
+#define compat_elf_gregset_t elf_gregset_t
#include <linux/elfcore-compat.h>
#include <linux/time.h>
^ permalink raw reply related
* [PATCH 2/2] mfd: mc13xxx: Pass the IRQF_TRIGGER_HIGH flag.
From: Magnus Lilja @ 2016-12-21 19:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482300049.831956101@f373.i.mail.ru>
Hi,
On 21 December 2016 at 07:00, Alexander Shiyan <shc_work@mail.ru> wrote:
>>???????, 20 ??????? 2016, 22:35 +03:00 ?? Magnus Lilja <lilja.magnus@gmail.com>:
>>
>>On 20 December 2016 at 06:20, Alexander Shiyan < shc_work@mail.ru > wrote:
>>>>???????, 20 ??????? 2016, 0:28 +03:00 ?? Magnus Lilja < lilja.magnus@gmail.com >:
>>>>
>>>>All supported mc13xxx devices have active high interrupt outputs. Make sure
>>>>to configure the interrupt as active high by passing the IRQF_TRIGGER_HIGH
>>>>flag. This is required at least on the i.MX31 PDK board.
>>>>
>>>>Signed-off-by: Magnus Lilja < lilja.magnus@gmail.com >
>>>>---
>>>>
>>>> drivers/mfd/mc13xxx-core.c | 2 +-
>>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>>diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c
>>>>index d7f54e4..4cbe6b7 100644
>>>>--- a/drivers/mfd/mc13xxx-core.c
>>>>+++ b/drivers/mfd/mc13xxx-core.c
>>>>@@ -440,7 +440,7 @@ int mc13xxx_common_init(struct device *dev)
>>>> mc13xxx->irq_chip.irqs = mc13xxx->irqs;
>>>> mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs);
>>>>
>>>>-ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT,
>>>>+ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
>>>> 0, &mc13xxx->irq_chip, &mc13xxx->irq_data);
>>>> if (ret)
>>>> return ret;
>>>
>>> IRQ line can be passed through inverter to IC.
>>> On my opinion the best way to handle all possible situations is parse
>>> devicetree IRQ flags and pass to the driver.
>>
>>My guess is that most boards follow the evaluation boards/kits and
>>don't have an inverter so I think the default should be TRIG_HIGH
>>since that will make most boards work automatically. But I can have a
>>look at making it configurable (with and without the use of device
>>tree), but for the device tree stuff I would need pointers to similar
>>code since my experience with that is none.
>>Any pointers to similar code?
>
> Hello.
>
> Perhaps I'm wrong and the desired active level has setup at the IRQ code level.
Don't think I understand what you mean here.
> Otherwise, I think you need to use something like the following:
>
> unsigned flags = irqd_get_trigger_type(irq_get_irq_data(irq));
> flags = (flags == IRQ_TYPE_NONE) ? IRQF_TRIGGER_HIGH : flags;
> ret = regmap_add_irq_chip(..., IRQF_ONESHOT | flags, ...);
That would work but I don't know how one would set the trigger type in
case of not using device trees. But that would only be a problem if a
board really has an inverter on the IRQ line so that can be solved
later, and might be not necessary to solve if mx31 boards are
converted to device tree usage.
I guess that get trigger_type can be set via the device tree magic
when using device trees.
Regards, Magnus
^ permalink raw reply
* [PATCH 1/3] dt-bindings: add vendor prefix for Lichee Pi
From: Icenowy Zheng @ 2016-12-21 20:02 UTC (permalink / raw)
To: linux-arm-kernel
Lichee Pi is a new "Pi"-named development board series.
Currently available device, Lichee Pi One, is by only one person as
night job, so the device series name is chosen to be the vendor prefix.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 16d3b5e7f5d1..4ec84b7a3c56 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -161,6 +161,7 @@ lacie LaCie
lantiq Lantiq Semiconductor
lenovo Lenovo Group Ltd.
lg LG Corporation
+licheepi Lichee Pi
linux Linux-specific binding
lltc Linear Technology Corporation
lsi LSI Corp. (LSI Logic)
--
2.11.0
^ permalink raw reply related
* [PATCH 2/3] ARM: dts: sun5i: add a pinctrl node for 4bit mmc2
From: Icenowy Zheng @ 2016-12-21 20:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161221200235.11617-1-icenowy@aosc.xyz>
Some board only use 4bit mode of mmc2.
Add a pinctrl node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
arch/arm/boot/dts/sun5i.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 54170147040f..c058d37d5433 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -594,6 +594,14 @@
bias-pull-up;
};
+ mmc2_4bit_pins_a: mmc2-4bit at 0 {
+ pins = "PC6", "PC7", "PC8", "PC9",
+ "PC10", "PC11";
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
spi2_pins_a: spi2 at 0 {
pins = "PE1", "PE2", "PE3";
function = "spi2";
--
2.11.0
^ permalink raw reply related
* [PATCH 3/3] ARM: dts: sun5i: add support for Lichee Pi One board
From: Icenowy Zheng @ 2016-12-21 20:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161221200235.11617-1-icenowy@aosc.xyz>
Lichee Pi One is a low-cost Allwinner A13-based development board, with
an AXP209 PMU, a USB2.0 OTG port, a USB2.0 host port (or an onboard
RTL8723BU Wi-Fi card), optional headers for LCD and CSI, two GPIO
headers and two MicroSD card slots (connected to mmc0 and mmc2, both
bootable).
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/sun5i-a13-licheepi-one.dts | 224 +++++++++++++++++++++++++++
2 files changed, 225 insertions(+)
create mode 100644 arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index cccdbcb557b6..5902d4ca7138 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -781,6 +781,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \
sun5i-a13-empire-electronix-m712.dtb \
sun5i-a13-hsg-h702.dtb \
sun5i-a13-inet-98v-rev2.dtb \
+ sun5i-a13-licheepi-one.dtb \
sun5i-a13-olinuxino.dtb \
sun5i-a13-olinuxino-micro.dtb \
sun5i-a13-q8-tablet.dtb \
diff --git a/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts b/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
new file mode 100644
index 000000000000..566cda91a66b
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
@@ -0,0 +1,224 @@
+/*
+ * Copyright 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * Based on sun5i-a13-olinuxino.dts, which is
+ * Copyright 2012 Maxime Ripard <maxime.ripard@free-electrons.com>
+ * Copyright 2013 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun5i-a13.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Lichee Pi One";
+ compatible = "licheepi,licheepi-one", "allwinner,sun5i-a13";
+
+ aliases {
+ serial0 = &uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ red {
+ label ="licheepi:red:usr";
+ gpios = <&pio 2 5 GPIO_ACTIVE_LOW>;
+ };
+
+ green {
+ label ="licheepi:green:usr";
+ gpios = <&pio 2 19 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ blue {
+ label ="licheepi:blue:usr";
+ gpios = <&pio 2 4 GPIO_ACTIVE_LOW>;
+ };
+
+ };
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+
+ axp209: pmic at 34 {
+ compatible = "x-powers,axp209";
+ reg = <0x34>;
+ interrupts = <0>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_a>;
+ status = "disabled";
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_a>;
+ status = "disabled";
+};
+
+&lradc {
+ vref-supply = <®_ldo2>;
+ status = "okay";
+
+ button at 984 {
+ label = "Home";
+ linux,code = <KEY_HOMEPAGE>;
+ channel = <0>;
+ voltage = <984126>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ broken-cd;
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_4bit_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ broken-cd;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&otg_sram {
+ status = "okay";
+};
+
+#include "axp209.dtsi"
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd-cpu";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-int-dll";
+};
+
+®_ldo1 {
+ regulator-name = "vdd-rtc";
+};
+
+®_ldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
+®_ldo3 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "csi-1.8v";
+};
+
+®_ldo4 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "csi-2.8v";
+};
+
+®_usb0_vbus {
+ gpio = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins_b>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ pinctrl-names = "default";
+ usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
+ usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+ usb0_vbus-supply = <®_usb0_vbus>;
+ usb1_vbus-supply = <®_vcc5v0>;
+ status = "okay";
+};
--
2.11.0
^ permalink raw reply related
* [PATCH 1/2] i.MX31: ipu: Make sure the interrupt routine checks all interrupts.
From: Fabio Estevam @ 2016-12-21 20:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482182934-18559-2-git-send-email-lilja.magnus@gmail.com>
Hi Magnus,
On Mon, Dec 19, 2016 at 7:28 PM, Magnus Lilja <lilja.magnus@gmail.com> wrote:
> Commit 3d8cc00073d6750ffe883685e49b2e4a0f596370 consolidated the two
The standard form to specify a commit is 3d8cc00073d6 ("dmaengine:
ipu: Consolidate duplicated irq handlers")
> interrupts routines into one, but the remaining interrupt routine only
> checks the status of the error interrupts, not the normal interrupts.
>
> This patch fixes that problem (tested on i.MX31 PDK board).
>
> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Patch looks good, but I have some suggestions:
- Subject should start with dmaengine, so something like:
Subject: dmaengine: ipu: Make sure the ....
- You sent these two patches on a series, but as they touch different
subsystems they could be sent separately, each one to the proper
maintainer. For dmaengine the maintainer is Vinod. Hint: you can run
./scripts/get_maintainer.pl on your patch and it will list the
maintainer and lists the patches should be sent to.
You should also add a Fixes tag above your Signed-off-by like this:
Fixes: 3d8cc00073d6 ("dmaengine: ipu: Consolidate duplicated irq handlers")
Cc: <stable@vger.kernel.org> # 4.3.x
^ permalink raw reply
* [PATCH 2/2] mfd: mc13xxx: Pass the IRQF_TRIGGER_HIGH flag.
From: Fabio Estevam @ 2016-12-21 20:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482182934-18559-3-git-send-email-lilja.magnus@gmail.com>
Hi Magnus,
On Mon, Dec 19, 2016 at 7:28 PM, Magnus Lilja <lilja.magnus@gmail.com> wrote:
> All supported mc13xxx devices have active high interrupt outputs. Make sure
> to configure the interrupt as active high by passing the IRQF_TRIGGER_HIGH
> flag. This is required at least on the i.MX31 PDK board.
>
> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
What is the commit that caused the breakage in the driver? Please
specify in the commit log, add a Fixes tag and Cc: stable like
mentioned on patch 1/2.
^ permalink raw reply
* [PATCH 1/2] i.MX31: ipu: Make sure the interrupt routine checks all interrupts.
From: Magnus Lilja @ 2016-12-21 20:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOMZO5C61gfL95sW=r5RLxFaDSeb34FuFSx8Pj=J2-WqYD1qaw@mail.gmail.com>
Hi Fabio,
On 21 December 2016 at 21:08, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Magnus,
>
> On Mon, Dec 19, 2016 at 7:28 PM, Magnus Lilja <lilja.magnus@gmail.com> wrote:
>> Commit 3d8cc00073d6750ffe883685e49b2e4a0f596370 consolidated the two
>
> The standard form to specify a commit is 3d8cc00073d6 ("dmaengine:
> ipu: Consolidate duplicated irq handlers")
>
>> interrupts routines into one, but the remaining interrupt routine only
>> checks the status of the error interrupts, not the normal interrupts.
>>
>> This patch fixes that problem (tested on i.MX31 PDK board).
>>
>> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
>
> Patch looks good, but I have some suggestions:
>
> - Subject should start with dmaengine, so something like:
> Subject: dmaengine: ipu: Make sure the ....
>
> - You sent these two patches on a series, but as they touch different
> subsystems they could be sent separately, each one to the proper
> maintainer. For dmaengine the maintainer is Vinod. Hint: you can run
> ./scripts/get_maintainer.pl on your patch and it will list the
> maintainer and lists the patches should be sent to.
>
> You should also add a Fixes tag above your Signed-off-by like this:
> Fixes: 3d8cc00073d6 ("dmaengine: ipu: Consolidate duplicated irq handlers")
> Cc: <stable@vger.kernel.org> # 4.3.x
Thanks for review. I will add take care of your comments and send a
new standalone patch.
Regards, Magnus
^ permalink raw reply
* [PATCH 2/2] mfd: mc13xxx: Pass the IRQF_TRIGGER_HIGH flag.
From: Magnus Lilja @ 2016-12-21 20:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOMZO5CmEL_gW6pXM3XDY+VR9q2MmqV5Q905PJjf0-W4jUBFbg@mail.gmail.com>
Hi
On 21 December 2016 at 21:10, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Magnus,
>
> On Mon, Dec 19, 2016 at 7:28 PM, Magnus Lilja <lilja.magnus@gmail.com> wrote:
>> All supported mc13xxx devices have active high interrupt outputs. Make sure
>> to configure the interrupt as active high by passing the IRQF_TRIGGER_HIGH
>> flag. This is required at least on the i.MX31 PDK board.
>>
>> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
>
> What is the commit that caused the breakage in the driver? Please
> specify in the commit log, add a Fixes tag and Cc: stable like
> mentioned on patch 1/2.
Will add that info and cc: stable.
And while investigating which commit that caused this I noticed that
the prior to that commit IRQF_TRIGGER_HIGH was always passed without
possibility to change so I wonder if it really is necessary to support
any inverters in the IRQ line..
Thanks, Magnus
^ permalink raw reply
* [PATCH 2/2] mfd: mc13xxx: Pass the IRQF_TRIGGER_HIGH flag.
From: Vladimir Zapolskiy @ 2016-12-21 20:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAM=E1R7mBa7PSyshR+VwbeCqqDytkTknNksWQmf3Yk2r0_nHZw@mail.gmail.com>
Hi,
On 12/21/2016 09:41 PM, Magnus Lilja wrote:
> Hi,
>
> On 21 December 2016 at 07:00, Alexander Shiyan <shc_work@mail.ru> wrote:
>>> ???????, 20 ??????? 2016, 22:35 +03:00 ?? Magnus Lilja <lilja.magnus@gmail.com>:
>>>
>>> On 20 December 2016 at 06:20, Alexander Shiyan < shc_work@mail.ru > wrote:
>>>>> ???????, 20 ??????? 2016, 0:28 +03:00 ?? Magnus Lilja < lilja.magnus@gmail.com >:
>>>>>
>>>>> All supported mc13xxx devices have active high interrupt outputs. Make sure
>>>>> to configure the interrupt as active high by passing the IRQF_TRIGGER_HIGH
>>>>> flag. This is required at least on the i.MX31 PDK board.
>>>>>
>>>>> Signed-off-by: Magnus Lilja < lilja.magnus@gmail.com >
>>>>> ---
>>>>>
>>>>> drivers/mfd/mc13xxx-core.c | 2 +-
>>>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c
>>>>> index d7f54e4..4cbe6b7 100644
>>>>> --- a/drivers/mfd/mc13xxx-core.c
>>>>> +++ b/drivers/mfd/mc13xxx-core.c
>>>>> @@ -440,7 +440,7 @@ int mc13xxx_common_init(struct device *dev)
>>>>> mc13xxx->irq_chip.irqs = mc13xxx->irqs;
>>>>> mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs);
>>>>>
>>>>> -ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT,
>>>>> +ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
>>>>> 0, &mc13xxx->irq_chip, &mc13xxx->irq_data);
>>>>> if (ret)
>>>>> return ret;
>>>>
>>>> IRQ line can be passed through inverter to IC.
>>>> On my opinion the best way to handle all possible situations is parse
>>>> devicetree IRQ flags and pass to the driver.
>>>
>>> My guess is that most boards follow the evaluation boards/kits and
>>> don't have an inverter so I think the default should be TRIG_HIGH
>>> since that will make most boards work automatically. But I can have a
>>> look at making it configurable (with and without the use of device
>>> tree), but for the device tree stuff I would need pointers to similar
>>> code since my experience with that is none.
>>> Any pointers to similar code?
>>
>> Hello.
>>
>> Perhaps I'm wrong and the desired active level has setup at the IRQ code level.
>
> Don't think I understand what you mean here.
>
>> Otherwise, I think you need to use something like the following:
>>
>> unsigned flags = irqd_get_trigger_type(irq_get_irq_data(irq));
>> flags = (flags == IRQ_TYPE_NONE) ? IRQF_TRIGGER_HIGH : flags;
>> ret = regmap_add_irq_chip(..., IRQF_ONESHOT | flags, ...);
>
> That would work but I don't know how one would set the trigger type in
> case of not using device trees.
you may look at drivers/mfd/palmas.c and include/linux/mfd/palmas.h
to get an idea how irq flags are passed through the platform data in
a similar case.
> But that would only be a problem if a board really has an inverter on
> the IRQ line so that can be solved later,
Correct, I would recommend to postpone adding any extensions to the driver
platform data, which by the way is found in include/linux/mfd/mc13xxx.h
The extension can be added only when it becomes needed.
> and might be not necessary to solve if mx31 boards are converted to
> device tree usage.
>
> I guess that get trigger_type can be set via the device tree magic
> when using device trees.
>
FWIW I ran the v4.9-rc kernel with device trees on i.MX31 Lite board
with MC13783, and what I can confirm is that in my case the proposed
change is not needed at all. Thus I'm going to verify shortly that
the commit does not break the currently correct runtime behaviour on
my board.
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH 2/2] mfd: mc13xxx: Pass the IRQF_TRIGGER_HIGH flag.
From: Fabio Estevam @ 2016-12-21 20:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1bec9023-1869-2847-bea6-adebc5af0093@mleia.com>
On Wed, Dec 21, 2016 at 6:24 PM, Vladimir Zapolskiy <vz@mleia.com> wrote:
> Correct, I would recommend to postpone adding any extensions to the driver
> platform data, which by the way is found in include/linux/mfd/mc13xxx.h
>
> The extension can be added only when it becomes needed.
Yes, I agree.
> FWIW I ran the v4.9-rc kernel with device trees on i.MX31 Lite board
> with MC13783, and what I can confirm is that in my case the proposed
> change is not needed at all. Thus I'm going to verify shortly that
> the commit does not break the currently correct runtime behaviour on
> my board.
Nice to see imx31 with dt support :-)
^ permalink raw reply
* [PATCHv2] crypto: testmgr: Use heap buffer for acomp test input
From: Laura Abbott @ 2016-12-21 20:32 UTC (permalink / raw)
To: linux-arm-kernel
Christopher Covington reported a crash on aarch64 on recent Fedora
kernels:
kernel BUG at ./include/linux/scatterlist.h:140!
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
Modules linked in:
CPU: 2 PID: 752 Comm: cryptomgr_test Not tainted 4.9.0-11815-ge93b1cc #162
Hardware name: linux,dummy-virt (DT)
task: ffff80007c650080 task.stack: ffff800008910000
PC is at sg_init_one+0xa0/0xb8
LR is at sg_init_one+0x24/0xb8
...
[<ffff000008398db8>] sg_init_one+0xa0/0xb8
[<ffff000008350a44>] test_acomp+0x10c/0x438
[<ffff000008350e20>] alg_test_comp+0xb0/0x118
[<ffff00000834f28c>] alg_test+0x17c/0x2f0
[<ffff00000834c6a4>] cryptomgr_test+0x44/0x50
[<ffff0000080dac70>] kthread+0xf8/0x128
[<ffff000008082ec0>] ret_from_fork+0x10/0x50
The test vectors used for input are part of the kernel image. These
inputs are passed as a buffer to sg_init_one which eventually blows up
with BUG_ON(!virt_addr_valid(buf)). On arm64, virt_addr_valid returns
false for the kernel image since virt_to_page will not return the
correct page. Fix this by copying the input vectors to heap buffer
before setting up the scatterlist.
Reported-by: Christopher Covington <cov@codeaurora.org>
Fixes: d7db7a882deb ("crypto: acomp - update testmgr with support for acomp")
Signed-off-by: Laura Abbott <labbott@redhat.com>
---
crypto/testmgr.c | 30 ++++++++++++++++++++++++++++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/crypto/testmgr.c b/crypto/testmgr.c
index f616ad7..44e888b 100644
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -1461,16 +1461,25 @@ static int test_acomp(struct crypto_acomp *tfm, struct comp_testvec *ctemplate,
for (i = 0; i < ctcount; i++) {
unsigned int dlen = COMP_BUF_SIZE;
int ilen = ctemplate[i].inlen;
+ void *input_vec;
+ input_vec = kmalloc(ilen, GFP_KERNEL);
+ if (!input_vec) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ memcpy(input_vec, ctemplate[i].input, ilen);
memset(output, 0, dlen);
init_completion(&result.completion);
- sg_init_one(&src, ctemplate[i].input, ilen);
+ sg_init_one(&src, input_vec, ilen);
sg_init_one(&dst, output, dlen);
req = acomp_request_alloc(tfm);
if (!req) {
pr_err("alg: acomp: request alloc failed for %s\n",
algo);
+ kfree(input_vec);
ret = -ENOMEM;
goto out;
}
@@ -1483,6 +1492,7 @@ static int test_acomp(struct crypto_acomp *tfm, struct comp_testvec *ctemplate,
if (ret) {
pr_err("alg: acomp: compression failed on test %d for %s: ret=%d\n",
i + 1, algo, -ret);
+ kfree(input_vec);
acomp_request_free(req);
goto out;
}
@@ -1491,6 +1501,7 @@ static int test_acomp(struct crypto_acomp *tfm, struct comp_testvec *ctemplate,
pr_err("alg: acomp: Compression test %d failed for %s: output len = %d\n",
i + 1, algo, req->dlen);
ret = -EINVAL;
+ kfree(input_vec);
acomp_request_free(req);
goto out;
}
@@ -1500,26 +1511,37 @@ static int test_acomp(struct crypto_acomp *tfm, struct comp_testvec *ctemplate,
i + 1, algo);
hexdump(output, req->dlen);
ret = -EINVAL;
+ kfree(input_vec);
acomp_request_free(req);
goto out;
}
+ kfree(input_vec);
acomp_request_free(req);
}
for (i = 0; i < dtcount; i++) {
unsigned int dlen = COMP_BUF_SIZE;
int ilen = dtemplate[i].inlen;
+ void *input_vec;
+
+ input_vec = kmalloc(ilen, GFP_KERNEL);
+ if (!input_vec) {
+ ret = -ENOMEM;
+ goto out;
+ }
+ memcpy(input_vec, dtemplate[i].input, ilen);
memset(output, 0, dlen);
init_completion(&result.completion);
- sg_init_one(&src, dtemplate[i].input, ilen);
+ sg_init_one(&src, input_vec, ilen);
sg_init_one(&dst, output, dlen);
req = acomp_request_alloc(tfm);
if (!req) {
pr_err("alg: acomp: request alloc failed for %s\n",
algo);
+ kfree(input_vec);
ret = -ENOMEM;
goto out;
}
@@ -1532,6 +1554,7 @@ static int test_acomp(struct crypto_acomp *tfm, struct comp_testvec *ctemplate,
if (ret) {
pr_err("alg: acomp: decompression failed on test %d for %s: ret=%d\n",
i + 1, algo, -ret);
+ kfree(input_vec);
acomp_request_free(req);
goto out;
}
@@ -1540,6 +1563,7 @@ static int test_acomp(struct crypto_acomp *tfm, struct comp_testvec *ctemplate,
pr_err("alg: acomp: Decompression test %d failed for %s: output len = %d\n",
i + 1, algo, req->dlen);
ret = -EINVAL;
+ kfree(input_vec);
acomp_request_free(req);
goto out;
}
@@ -1549,10 +1573,12 @@ static int test_acomp(struct crypto_acomp *tfm, struct comp_testvec *ctemplate,
i + 1, algo);
hexdump(output, req->dlen);
ret = -EINVAL;
+ kfree(input_vec);
acomp_request_free(req);
goto out;
}
+ kfree(input_vec);
acomp_request_free(req);
}
--
2.7.4
^ permalink raw reply related
* [PATCH] dmaengine: ipu: Make sure the interrupt routine checks all interrupts.
From: Magnus Lilja @ 2016-12-21 21:13 UTC (permalink / raw)
To: linux-arm-kernel
Commit 3d8cc00073d6 ("dmaengine: ipu: Consolidate duplicated irq handlers")
consolidated the two interrupts routines into one, but the remaining
interrupt routine only checks the status of the error interrupts, not the
normal interrupts.
This patch fixes that problem (tested on i.MX31 PDK board).
Fixes: 3d8cc00073d6 ("dmaengine: ipu: Consolidate duplicated irq handlers")
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: <stable@vger.kernel.org> # 4.1.x
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
---
drivers/dma/ipu/ipu_irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/ipu/ipu_irq.c b/drivers/dma/ipu/ipu_irq.c
index dd184b5..2846278 100644
--- a/drivers/dma/ipu/ipu_irq.c
+++ b/drivers/dma/ipu/ipu_irq.c
@@ -272,7 +272,7 @@ static void ipu_irq_handler(struct irq_desc *desc)
u32 status;
int i, line;
- for (i = IPU_IRQ_NR_FN_BANKS; i < IPU_IRQ_NR_BANKS; i++) {
+ for (i = 0; i < IPU_IRQ_NR_BANKS; i++) {
struct ipu_irq_bank *bank = irq_bank + i;
raw_spin_lock(&bank_lock);
--
2.7.4
^ permalink raw reply related
* [PATCH] arm64: dts: msm8996: Add required memory carveouts
From: Andy Gross @ 2016-12-21 22:03 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Boyd <sboyd@codeaurora.org>
This patch adds required memory carveouts so that the kernel does not
access memory that is in use or has been reserved for use by other remote
processors.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index cde4114..25e11dc 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -64,6 +64,16 @@
reg = <0x0 0x86000000 0x0 0x200000>;
no-map;
};
+
+ memory at 85800000 {
+ reg = <0x0 0x85800000 0x0 0x800000>;
+ no-map;
+ };
+
+ memory at 86200000 {
+ reg = <0x0 0x86200000 0x0 0x2600000>;
+ no-map;
+ };
};
cpus {
--
1.9.1
^ permalink raw reply related
* [PATCH] arm64: dts: msm8996: Add required memory carveouts
From: Stephen Boyd @ 2016-12-21 22:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482357822-20823-1-git-send-email-andy.gross@linaro.org>
On 12/21/2016 02:03 PM, Andy Gross wrote:
> From: Stephen Boyd <sboyd@codeaurora.org>
>
> This patch adds required memory carveouts so that the kernel does not
> access memory that is in use or has been reserved for use by other remote
> processors.
Thanks,
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> Signed-off-by: Andy Gross <andy.gross@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index cde4114..25e11dc 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -64,6 +64,16 @@
> reg = <0x0 0x86000000 0x0 0x200000>;
> no-map;
> };
> +
> + memory at 85800000 {
> + reg = <0x0 0x85800000 0x0 0x800000>;
> + no-map;
> + };
> +
> + memory at 86200000 {
> + reg = <0x0 0x86200000 0x0 0x2600000>;
> + no-map;
> + };
> };
>
> cpus {
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* Mainline Patch Enable Can support in sunxi-a20.dtsi
From: Maxime Ripard @ 2016-12-21 22:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1737278812.179886.1482137303825@email.1und1.de>
Hi Christian,
On Mon, Dec 19, 2016 at 09:48:23AM +0100, Christian Waldeck wrote:
> <!DOCTYPE html>
> <html><head>
> <meta charset="UTF-8">
> </head><body><p>Hello Maxime and Chen-Yu, <br></p><p><br></p><p>I`am currently working with an A20 Board from In-Circuit. <br></p><p>It took us quite some time to fetch all information about enabling the can pins on tha device. <br></p><p>Now we have working solution. <br></p><p><br></p><p>Attached to this email is a patch file which enables can-bus at the sunxi-A20.dtsi file<br></p><p>and the corresponding sun7i-a20-icnova-swac.dts BSP description. <br></p><p><br></p><p>Hopefully you can integrate this piece of configuration<br></p><p>to save time for other users, that are trying to work with the can-bus fram A20 SoC. <br></p><p><br></p><p class="io-ox-signature">Best regards, <br> <br>Christian Waldeck<br> <br>Green Digit GmbH<br>Zeppelinstr. 5<br>82205 Gilching<br><br>fon: +49 (0) 8105 39989-78<br>fax: +49 (0) 8105 39989-77<br><br>http://www.greendigit.de<br><br>Amtsgericht München, HRB 180693<br>Geschäftsführer: Volker Werbus</p></body></html>
Thanks a lot for your patch.
However, it has a number of things that prevent it from being applied as is.
The two majors flaws are that you sent it in HTML format, which
prevents it from being applied. Your patch also lacks a Signed-off-by
tag, which is used to know that you have the legal right to submit the
patch.
You can have more documentation on how to send your first patch here
https://kernelnewbies.org/FirstKernelPatch#head-dc6a8aa0be0d0e8ed9dc03726d0b5a1fb0f65e1f
and in Documentation/SubmittingPatches in the kernel source code.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH 2/3] ARM: dts: sun5i: add a pinctrl node for 4bit mmc2
From: Maxime Ripard @ 2016-12-21 22:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161221200235.11617-2-icenowy@aosc.xyz>
On Thu, Dec 22, 2016 at 04:02:34AM +0800, Icenowy Zheng wrote:
> Some board only use 4bit mode of mmc2.
>
> Add a pinctrl node for it.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [PATCH 1/3] dt-bindings: add vendor prefix for Lichee Pi
From: Maxime Ripard @ 2016-12-21 22:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161221200235.11617-1-icenowy@aosc.xyz>
On Thu, Dec 22, 2016 at 04:02:33AM +0800, Icenowy Zheng wrote:
> Lichee Pi is a new "Pi"-named development board series.
>
> Currently available device, Lichee Pi One, is by only one person as
> night job, so the device series name is chosen to be the vendor prefix.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [PATCH 3/3] ARM: dts: sun5i: add support for Lichee Pi One board
From: Maxime Ripard @ 2016-12-21 22:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161221200235.11617-3-icenowy@aosc.xyz>
On Thu, Dec 22, 2016 at 04:02:35AM +0800, Icenowy Zheng wrote:
> Lichee Pi One is a low-cost Allwinner A13-based development board, with
> an AXP209 PMU, a USB2.0 OTG port, a USB2.0 host port (or an onboard
> RTL8723BU Wi-Fi card), optional headers for LCD and CSI, two GPIO
> headers and two MicroSD card slots (connected to mmc0 and mmc2, both
> bootable).
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [PATCH] arm64: Don't trace __switch_to if function graph tracer is enabled
From: Joel Fernandes @ 2016-12-21 22:44 UTC (permalink / raw)
To: linux-arm-kernel
Function graph tracer shows negative time (wrap around) when tracing
__switch_to if the nosleep-time trace option is enabled.
Time compensation for nosleep-time is done by an ftrace probe on
sched_switch. This doesn't work well for the following events (with
letters representing timestamps):
A - sched switch probe called for task T switch out
B - __switch_to calltime is recorded
C - sched_switch probe called for task T switch in
D - __switch_to rettime is recorded
If C - A > D - B, then we end up over compensating for the time spent in
__switch_to giving rise to negative times in the trace output.
On x86, __switch_to is not traced if function graph tracer is enabled.
Do the same for arm64 as well.
Cc: Todd Kjos <tkjos@google.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Joel Fernandes <joelaf@google.com>
---
arch/arm64/kernel/process.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 01753cd..e84ee27 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -324,7 +324,7 @@ void uao_thread_switch(struct task_struct *next)
/*
* Thread switching.
*/
-struct task_struct *__switch_to(struct task_struct *prev,
+__notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
struct task_struct *next)
{
struct task_struct *last;
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related
* [PATCH 02/11] clk: bcm2835: Register the DSI0/DSI1 pixel clocks.
From: Stephen Boyd @ 2016-12-21 23:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161214194621.16499-3-eric@anholt.net>
On 12/14, Eric Anholt wrote:
>
> /* the gates */
>
> @@ -1890,8 +1976,18 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
> if (IS_ERR(cprman->regs))
> return PTR_ERR(cprman->regs);
>
> - cprman->osc_name = of_clk_get_parent_name(dev->of_node, 0);
> - if (!cprman->osc_name)
> + for (i = 0; i < ARRAY_SIZE(cprman_parent_names); i++) {
> + cprman->real_parent_names[i] =
> + of_clk_get_parent_name(dev->of_node, i);
> + }
Can we use of_clk_parent_fill() here? Or do we need to support
holes in the parent array? If it's the latter please add a
comment so we don't mistakenly change this later.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
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