* [PATCH] Revert "mmc: dw_mmc-rockchip: add runtime PM support"
From: Shawn Lin @ 2016-12-29 7:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <7e37b8ad-39d0-3a94-f75a-2166ae2caf10@samsung.com>
On 2016/12/29 15:13, Jaehoon Chung wrote:
> On 12/29/2016 12:02 PM, Jaehoon Chung wrote:
>> Hi Randy,
>>
>> On 12/29/2016 12:34 AM, Randy Li wrote:
>>> This reverts commit f90142683f04bcb0729bf0df67a5e29562b725b9.
>>> It is reported that making RK3288 can't boot from eMMC/MMC.
>>
>> Could you explain in more detail?
>> As you mentioned, this patch is making that RK3288 can't boot..then why?
>> Good way should be that finds the main reason and fixes it.
>> Not just revert.
>
> To Shawn,
>
> Could you check this? If you have rk3288..
> If it's not working fine, it needs to revert this patch until finding the problem.
>
Hrmm.....as that patchset was tested based on rk3288 and rk3368, so I
need to know which board Randy are using now and could you share some
log?
I will have a look at it.
> Best Regards,
> Jaehoon Chung
>
>>
>> Best Regards,
>> Jaehoon Chung
>>
>>>
>>> Signed-off-by: Randy Li <ayaka@soulik.info>
>>> ---
>>> drivers/mmc/host/dw_mmc-rockchip.c | 41 +++-----------------------------------
>>> 1 file changed, 3 insertions(+), 38 deletions(-)
>>>
>>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
>>> index 9a46e46..3189234 100644
>>> --- a/drivers/mmc/host/dw_mmc-rockchip.c
>>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
>>> @@ -14,7 +14,6 @@
>>> #include <linux/mmc/dw_mmc.h>
>>> #include <linux/of_address.h>
>>> #include <linux/mmc/slot-gpio.h>
>>> -#include <linux/pm_runtime.h>
>>> #include <linux/slab.h>
>>>
>>> #include "dw_mmc.h"
>>> @@ -327,7 +326,6 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
>>> {
>>> const struct dw_mci_drv_data *drv_data;
>>> const struct of_device_id *match;
>>> - int ret;
>>>
>>> if (!pdev->dev.of_node)
>>> return -ENODEV;
>>> @@ -335,49 +333,16 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
>>> match = of_match_node(dw_mci_rockchip_match, pdev->dev.of_node);
>>> drv_data = match->data;
>>>
>>> - pm_runtime_get_noresume(&pdev->dev);
>>> - pm_runtime_set_active(&pdev->dev);
>>> - pm_runtime_enable(&pdev->dev);
>>> - pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
>>> - pm_runtime_use_autosuspend(&pdev->dev);
>>> -
>>> - ret = dw_mci_pltfm_register(pdev, drv_data);
>>> - if (ret) {
>>> - pm_runtime_disable(&pdev->dev);
>>> - pm_runtime_set_suspended(&pdev->dev);
>>> - pm_runtime_put_noidle(&pdev->dev);
>>> - return ret;
>>> - }
>>> -
>>> - pm_runtime_put_autosuspend(&pdev->dev);
>>> -
>>> - return 0;
>>> + return dw_mci_pltfm_register(pdev, drv_data);
>>> }
>>>
>>> -static int dw_mci_rockchip_remove(struct platform_device *pdev)
>>> -{
>>> - pm_runtime_get_sync(&pdev->dev);
>>> - pm_runtime_disable(&pdev->dev);
>>> - pm_runtime_put_noidle(&pdev->dev);
>>> -
>>> - return dw_mci_pltfm_remove(pdev);
>>> -}
>>> -
>>> -static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
>>> - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
>>> - pm_runtime_force_resume)
>>> - SET_RUNTIME_PM_OPS(dw_mci_runtime_suspend,
>>> - dw_mci_runtime_resume,
>>> - NULL)
>>> -};
>>> -
>>> static struct platform_driver dw_mci_rockchip_pltfm_driver = {
>>> .probe = dw_mci_rockchip_probe,
>>> - .remove = dw_mci_rockchip_remove,
>>> + .remove = dw_mci_pltfm_remove,
>>> .driver = {
>>> .name = "dwmmc_rockchip",
>>> .of_match_table = dw_mci_rockchip_match,
>>> - .pm = &dw_mci_rockchip_dev_pm_ops,
>>> + .pm = &dw_mci_pltfm_pmops,
>>> },
>>> };
>>>
>>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
>> .
>>
>
>
>
>
--
Best Regards
Shawn Lin
^ permalink raw reply
* [PATCH 0/4] Use Exynos macros for pinctrl settings
From: Andi Shyti @ 2016-12-29 8:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CGME20161229084221epcas1p4d76b4b30f59734f7eee29aec53b54af3@epcas1p4.samsung.com>
Hi,
This patchset is just a refactoring of the exynos5433 and TM2
pinctrl definitions. Standing to the samsung-pinctrl.txt binding
the Exynos related DTS should use the macros introduced by
commit:
5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
values used for configuration")
Would be nice to see in the future all the PIN related macros in
the same file, as they more or less do the same thing.
Thanks,
Andi
Andi Shyti (4):
pinctrl: dt-bindings: samsung: add drive strength macros for
Exynos5433
ARM64: dts: exynos5433: use macros for pinctrl configuration on
Exynos5433
ARM64: dts: TM2: comply to the samsung pinctrl naming convention
ARM64: dts: exynos5433: remove unused code
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 373 ++++++++++-----------
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 254 +++++++-------
include/dt-bindings/pinctrl/samsung.h | 6 +
3 files changed, 314 insertions(+), 319 deletions(-)
--
2.11.0
^ permalink raw reply
* [PATCH 1/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Andi Shyti @ 2016-12-29 8:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229084211.20442-1-andi.shyti@samsung.com>
Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
values used for configuration") has added a header file for defining the
pinctrl values in order to avoid hardcoded settings in the Exynos
DTS related files.
Extend samsung.h to the Exynos5433 for drive strength values
which are strictly related to the particular SoC and may defer
from others.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
include/dt-bindings/pinctrl/samsung.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
index 6276eb785e2b..58868313d64b 100644
--- a/include/dt-bindings/pinctrl/samsung.h
+++ b/include/dt-bindings/pinctrl/samsung.h
@@ -45,6 +45,12 @@
#define EXYNOS5420_PIN_DRV_LV3 2
#define EXYNOS5420_PIN_DRV_LV4 3
+/* Drive strengths for Exynos5433 */
+#define EXYNOS5433_PIN_DRV_LV1 0
+#define EXYNOS5433_PIN_DRV_LV2 1
+#define EXYNOS5433_PIN_DRV_LV3 2
+#define EXYNOS5433_PIN_DRV_LV4 3
+
#define EXYNOS_PIN_FUNC_INPUT 0
#define EXYNOS_PIN_FUNC_OUTPUT 1
#define EXYNOS_PIN_FUNC_2 2
--
2.11.0
^ permalink raw reply related
* [PATCH 2/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
From: Andi Shyti @ 2016-12-29 8:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229084211.20442-1-andi.shyti@samsung.com>
Use the macros defined in include/dt-bindings/pinctrl/samsung.h
instead of hardcoded values.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 348 +++++++++++----------
1 file changed, 175 insertions(+), 173 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index ad71247b074f..36da7dce409a 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -12,6 +12,8 @@
* published by the Free Software Foundation.
*/
+#include <dt-bindings/pinctrl/samsung.h>
+
#define PIN_PULL_NONE 0
#define PIN_PULL_DOWN 1
#define PIN_PULL_UP 3
@@ -145,23 +147,23 @@
i2s0_bus: i2s0-bus {
samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
"gpz0-4", "gpz0-5", "gpz0-6";
- samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
pcm0_bus: pcm0-bus {
samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3";
- samsung,pin-function = <3>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
uart_aud_bus: uart-aud-bus {
samsung,pins = "gpz1-3", "gpz1-2", "gpz1-1", "gpz1-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
};
@@ -196,16 +198,16 @@
spi2_bus: spi2-bus {
samsung,pins = "gpd5-0", "gpd5-2", "gpd5-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
hs_i2c6_bus: hs-i2c6-bus {
samsung,pins = "gpd5-3", "gpd5-2";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
};
@@ -260,141 +262,141 @@
sd0_clk: sd0-clk {
samsung,pins = "gpr0-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd0_cmd: sd0-cmd {
samsung,pins = "gpr0-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd0_rdqs: sd0-rdqs {
samsung,pins = "gpr0-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd0_qrdy: sd0-qrdy {
samsung,pins = "gpr0-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd0_bus1: sd0-bus-width1 {
samsung,pins = "gpr1-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd0_bus4: sd0-bus-width4 {
samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd0_bus8: sd0-bus-width8 {
samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpr2-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd1_cmd: sd1-cmd {
samsung,pins = "gpr2-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd1_bus1: sd1-bus-width1 {
samsung,pins = "gpr3-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd1_bus4: sd1-bus-width4 {
samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd1_bus8: sd1-bus-width8 {
samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
pcie_bus: pcie_bus {
samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
};
sd2_clk: sd2-clk {
samsung,pins = "gpr4-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd2_cmd: sd2-cmd {
samsung,pins = "gpr4-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd2_cd: sd2-cd {
samsung,pins = "gpr4-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd2_bus1: sd2-bus-width1 {
samsung,pins = "gpr4-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd2_bus4: sd2-bus-width4 {
samsung,pins = "gpr4-4", "gpr4-5", "gpr4-6";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV4>;
};
sd2_clk_output: sd2-clk-output {
samsung,pins = "gpr4-0";
- samsung,pin-function = <1>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <2>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV3>;
};
sd2_cmd_output: sd2-cmd-output {
samsung,pins = "gpr4-1";
- samsung,pin-function = <1>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <2>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV3>;
};
};
@@ -419,9 +421,9 @@
hs_i2c4_bus: hs-i2c4-bus {
samsung,pins = "gpj0-1", "gpj0-0";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
};
@@ -564,225 +566,225 @@
hs_i2c8_bus: hs-i2c8-bus {
samsung,pins = "gpb0-1", "gpb0-0";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
hs_i2c9_bus: hs-i2c9-bus {
samsung,pins = "gpb0-3", "gpb0-2";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
i2s1_bus: i2s1-bus {
samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
"gpd4-3", "gpd4-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
pcm1_bus: pcm1-bus {
samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
"gpd4-3", "gpd4-4";
- samsung,pin-function = <3>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
spdif_bus: spdif-bus {
samsung,pins = "gpd4-3", "gpd4-4";
- samsung,pin-function = <4>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
fimc_is_spi_pin0: fimc-is-spi-pin0 {
samsung,pins = "gpc3-3", "gpc3-2", "gpc3-1", "gpc3-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
fimc_is_spi_pin1: fimc-is-spi-pin1 {
samsung,pins = "gpc3-7", "gpc3-6", "gpc3-5", "gpc3-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
uart0_bus: uart0-bus {
samsung,pins = "gpd0-3", "gpd0-2", "gpd0-1", "gpd0-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
hs_i2c2_bus: hs-i2c2-bus {
samsung,pins = "gpd0-3", "gpd0-2";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
uart2_bus: uart2-bus {
samsung,pins = "gpd1-5", "gpd1-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart1_bus: uart1-bus {
samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
hs_i2c3_bus: hs-i2c3-bus {
samsung,pins = "gpd1-3", "gpd1-2";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
hs_i2c0_bus: hs-i2c0-bus {
samsung,pins = "gpd2-1", "gpd2-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
hs_i2c1_bus: hs-i2c1-bus {
samsung,pins = "gpd2-3", "gpd2-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
pwm0_out: pwm0-out {
samsung,pins = "gpd2-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
pwm1_out: pwm1-out {
samsung,pins = "gpd2-5";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
pwm2_out: pwm2-out {
samsung,pins = "gpd2-6";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
pwm3_out: pwm3-out {
samsung,pins = "gpd2-7";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
spi1_bus: spi1-bus {
samsung,pins = "gpd6-2", "gpd6-4", "gpd6-5";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
hs_i2c7_bus: hs-i2c7-bus {
samsung,pins = "gpd2-7", "gpd2-6";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
spi0_bus: spi0-bus {
samsung,pins = "gpd8-0", "gpd6-0", "gpd6-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
hs_i2c10_bus: hs-i2c10-bus {
samsung,pins = "gpg3-1", "gpg3-0";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
hs_i2c11_bus: hs-i2c11-bus {
samsung,pins = "gpg3-3", "gpg3-2";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
spi3_bus: spi3-bus {
samsung,pins = "gpg3-4", "gpg3-6", "gpg3-7";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
spi4_bus: spi4-bus {
samsung,pins = "gpv7-1", "gpv7-3", "gpv7-4";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
fimc_is_uart: fimc-is-uart {
samsung,pins = "gpc1-1", "gpc0-7";
- samsung,pin-function = <3>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
fimc_is_ch0_i2c: fimc-is-ch0_i2c {
samsung,pins = "gpc2-1", "gpc2-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
fimc_is_ch0_mclk: fimc-is-ch0_mclk {
samsung,pins = "gpd7-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
fimc_is_ch1_i2c: fimc-is-ch1-i2c {
samsung,pins = "gpc2-3", "gpc2-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
fimc_is_ch1_mclk: fimc-is-ch1-mclk {
samsung,pins = "gpd7-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
fimc_is_ch2_i2c: fimc-is-ch2-i2c {
samsung,pins = "gpc2-5", "gpc2-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
fimc_is_ch2_mclk: fimc-is-ch2-mclk {
samsung,pins = "gpd7-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
};
@@ -797,8 +799,8 @@
hs_i2c5_bus: hs-i2c5-bus {
samsung,pins = "gpj1-1", "gpj1-0";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_LV1>;
};
};
--
2.11.0
^ permalink raw reply related
* [PATCH 3/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention
From: Andi Shyti @ 2016-12-29 8:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229084211.20442-1-andi.shyti@samsung.com>
Change the PIN() macro definition so that it can use the macros
from pinctrl/samsung.h header file.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 12 +-
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 254 ++++++++++-----------
2 files changed, 133 insertions(+), 133 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index 36da7dce409a..9afed9fcf7e1 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -27,12 +27,12 @@
#define PIN_OUT 1
#define PIN_FUNC1 2
-#define PIN(_func, _pin, _pull, _drv) \
- _pin { \
- samsung,pins = #_pin; \
- samsung,pin-function = <PIN_ ##_func>; \
- samsung,pin-pud = <PIN_PULL_ ##_pull>; \
- samsung,pin-drv = <PIN_DRV_ ##_drv>; \
+#define PIN(_func, _pin, _pull, _drv) \
+ _pin { \
+ samsung,pins = #_pin; \
+ samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
+ samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
}
&pinctrl_alive {
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index f21bdc2ff834..a2bc8e48eca4 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -742,77 +742,77 @@
pinctrl-0 = <&initial_alive>;
initial_alive: initial-state {
- PIN(IN, gpa0-0, DOWN, LV1);
- PIN(IN, gpa0-1, NONE, LV1);
- PIN(IN, gpa0-2, DOWN, LV1);
- PIN(IN, gpa0-3, NONE, LV1);
- PIN(IN, gpa0-4, NONE, LV1);
- PIN(IN, gpa0-5, DOWN, LV1);
- PIN(IN, gpa0-6, NONE, LV1);
- PIN(IN, gpa0-7, NONE, LV1);
-
- PIN(IN, gpa1-0, UP, LV1);
- PIN(IN, gpa1-1, NONE, LV1);
- PIN(IN, gpa1-2, NONE, LV1);
- PIN(IN, gpa1-3, DOWN, LV1);
- PIN(IN, gpa1-4, DOWN, LV1);
- PIN(IN, gpa1-5, NONE, LV1);
- PIN(IN, gpa1-6, NONE, LV1);
- PIN(IN, gpa1-7, NONE, LV1);
-
- PIN(IN, gpa2-0, NONE, LV1);
- PIN(IN, gpa2-1, NONE, LV1);
- PIN(IN, gpa2-2, NONE, LV1);
- PIN(IN, gpa2-3, DOWN, LV1);
- PIN(IN, gpa2-4, NONE, LV1);
- PIN(IN, gpa2-5, DOWN, LV1);
- PIN(IN, gpa2-6, DOWN, LV1);
- PIN(IN, gpa2-7, NONE, LV1);
-
- PIN(IN, gpa3-0, DOWN, LV1);
- PIN(IN, gpa3-1, DOWN, LV1);
- PIN(IN, gpa3-2, NONE, LV1);
- PIN(IN, gpa3-3, DOWN, LV1);
- PIN(IN, gpa3-4, NONE, LV1);
- PIN(IN, gpa3-5, DOWN, LV1);
- PIN(IN, gpa3-6, DOWN, LV1);
- PIN(IN, gpa3-7, DOWN, LV1);
-
- PIN(IN, gpf1-0, NONE, LV1);
- PIN(IN, gpf1-1, NONE, LV1);
- PIN(IN, gpf1-2, DOWN, LV1);
- PIN(IN, gpf1-4, UP, LV1);
- PIN(OUT, gpf1-5, NONE, LV1);
- PIN(IN, gpf1-6, DOWN, LV1);
- PIN(IN, gpf1-7, DOWN, LV1);
-
- PIN(IN, gpf2-0, DOWN, LV1);
- PIN(IN, gpf2-1, DOWN, LV1);
- PIN(IN, gpf2-2, DOWN, LV1);
- PIN(IN, gpf2-3, DOWN, LV1);
-
- PIN(IN, gpf3-0, DOWN, LV1);
- PIN(IN, gpf3-1, DOWN, LV1);
- PIN(IN, gpf3-2, NONE, LV1);
- PIN(IN, gpf3-3, DOWN, LV1);
-
- PIN(IN, gpf4-0, DOWN, LV1);
- PIN(IN, gpf4-1, DOWN, LV1);
- PIN(IN, gpf4-2, DOWN, LV1);
- PIN(IN, gpf4-3, DOWN, LV1);
- PIN(IN, gpf4-4, DOWN, LV1);
- PIN(IN, gpf4-5, DOWN, LV1);
- PIN(IN, gpf4-6, DOWN, LV1);
- PIN(IN, gpf4-7, DOWN, LV1);
-
- PIN(IN, gpf5-0, DOWN, LV1);
- PIN(IN, gpf5-1, DOWN, LV1);
- PIN(IN, gpf5-2, DOWN, LV1);
- PIN(IN, gpf5-3, DOWN, LV1);
- PIN(OUT, gpf5-4, NONE, LV1);
- PIN(IN, gpf5-5, DOWN, LV1);
- PIN(IN, gpf5-6, DOWN, LV1);
- PIN(IN, gpf5-7, DOWN, LV1);
+ PIN(INPUT, gpa0-0, DOWN, LV1);
+ PIN(INPUT, gpa0-1, NONE, LV1);
+ PIN(INPUT, gpa0-2, DOWN, LV1);
+ PIN(INPUT, gpa0-3, NONE, LV1);
+ PIN(INPUT, gpa0-4, NONE, LV1);
+ PIN(INPUT, gpa0-5, DOWN, LV1);
+ PIN(INPUT, gpa0-6, NONE, LV1);
+ PIN(INPUT, gpa0-7, NONE, LV1);
+
+ PIN(INPUT, gpa1-0, UP, LV1);
+ PIN(INPUT, gpa1-1, NONE, LV1);
+ PIN(INPUT, gpa1-2, NONE, LV1);
+ PIN(INPUT, gpa1-3, DOWN, LV1);
+ PIN(INPUT, gpa1-4, DOWN, LV1);
+ PIN(INPUT, gpa1-5, NONE, LV1);
+ PIN(INPUT, gpa1-6, NONE, LV1);
+ PIN(INPUT, gpa1-7, NONE, LV1);
+
+ PIN(INPUT, gpa2-0, NONE, LV1);
+ PIN(INPUT, gpa2-1, NONE, LV1);
+ PIN(INPUT, gpa2-2, NONE, LV1);
+ PIN(INPUT, gpa2-3, DOWN, LV1);
+ PIN(INPUT, gpa2-4, NONE, LV1);
+ PIN(INPUT, gpa2-5, DOWN, LV1);
+ PIN(INPUT, gpa2-6, DOWN, LV1);
+ PIN(INPUT, gpa2-7, NONE, LV1);
+
+ PIN(INPUT, gpa3-0, DOWN, LV1);
+ PIN(INPUT, gpa3-1, DOWN, LV1);
+ PIN(INPUT, gpa3-2, NONE, LV1);
+ PIN(INPUT, gpa3-3, DOWN, LV1);
+ PIN(INPUT, gpa3-4, NONE, LV1);
+ PIN(INPUT, gpa3-5, DOWN, LV1);
+ PIN(INPUT, gpa3-6, DOWN, LV1);
+ PIN(INPUT, gpa3-7, DOWN, LV1);
+
+ PIN(INPUT, gpf1-0, NONE, LV1);
+ PIN(INPUT, gpf1-1, NONE, LV1);
+ PIN(INPUT, gpf1-2, DOWN, LV1);
+ PIN(INPUT, gpf1-4, UP, LV1);
+ PIN(OUTPUT, gpf1-5, NONE, LV1);
+ PIN(INPUT, gpf1-6, DOWN, LV1);
+ PIN(INPUT, gpf1-7, DOWN, LV1);
+
+ PIN(INPUT, gpf2-0, DOWN, LV1);
+ PIN(INPUT, gpf2-1, DOWN, LV1);
+ PIN(INPUT, gpf2-2, DOWN, LV1);
+ PIN(INPUT, gpf2-3, DOWN, LV1);
+
+ PIN(INPUT, gpf3-0, DOWN, LV1);
+ PIN(INPUT, gpf3-1, DOWN, LV1);
+ PIN(INPUT, gpf3-2, NONE, LV1);
+ PIN(INPUT, gpf3-3, DOWN, LV1);
+
+ PIN(INPUT, gpf4-0, DOWN, LV1);
+ PIN(INPUT, gpf4-1, DOWN, LV1);
+ PIN(INPUT, gpf4-2, DOWN, LV1);
+ PIN(INPUT, gpf4-3, DOWN, LV1);
+ PIN(INPUT, gpf4-4, DOWN, LV1);
+ PIN(INPUT, gpf4-5, DOWN, LV1);
+ PIN(INPUT, gpf4-6, DOWN, LV1);
+ PIN(INPUT, gpf4-7, DOWN, LV1);
+
+ PIN(INPUT, gpf5-0, DOWN, LV1);
+ PIN(INPUT, gpf5-1, DOWN, LV1);
+ PIN(INPUT, gpf5-2, DOWN, LV1);
+ PIN(INPUT, gpf5-3, DOWN, LV1);
+ PIN(OUTPUT, gpf5-4, NONE, LV1);
+ PIN(INPUT, gpf5-5, DOWN, LV1);
+ PIN(INPUT, gpf5-6, DOWN, LV1);
+ PIN(INPUT, gpf5-7, DOWN, LV1);
};
te_irq: te_irq {
@@ -826,8 +826,8 @@
pinctrl-0 = <&initial_cpif>;
initial_cpif: initial-state {
- PIN(IN, gpv6-0, DOWN, LV1);
- PIN(IN, gpv6-1, DOWN, LV1);
+ PIN(INPUT, gpv6-0, DOWN, LV1);
+ PIN(INPUT, gpv6-1, DOWN, LV1);
};
};
@@ -836,9 +836,9 @@
pinctrl-0 = <&initial_ese>;
initial_ese: initial-state {
- PIN(IN, gpj2-0, DOWN, LV1);
- PIN(IN, gpj2-1, DOWN, LV1);
- PIN(IN, gpj2-2, DOWN, LV1);
+ PIN(INPUT, gpj2-0, DOWN, LV1);
+ PIN(INPUT, gpj2-1, DOWN, LV1);
+ PIN(INPUT, gpj2-2, DOWN, LV1);
};
};
@@ -847,11 +847,11 @@
pinctrl-0 = <&initial_fsys>;
initial_fsys: initial-state {
- PIN(IN, gpr3-0, NONE, LV1);
- PIN(IN, gpr3-1, DOWN, LV1);
- PIN(IN, gpr3-2, DOWN, LV1);
- PIN(IN, gpr3-3, DOWN, LV1);
- PIN(IN, gpr3-7, NONE, LV1);
+ PIN(INPUT, gpr3-0, NONE, LV1);
+ PIN(INPUT, gpr3-1, DOWN, LV1);
+ PIN(INPUT, gpr3-2, DOWN, LV1);
+ PIN(INPUT, gpr3-3, DOWN, LV1);
+ PIN(INPUT, gpr3-7, NONE, LV1);
};
};
@@ -860,14 +860,14 @@
pinctrl-0 = <&initial_imem>;
initial_imem: initial-state {
- PIN(IN, gpf0-0, UP, LV1);
- PIN(IN, gpf0-1, UP, LV1);
- PIN(IN, gpf0-2, DOWN, LV1);
- PIN(IN, gpf0-3, UP, LV1);
- PIN(IN, gpf0-4, DOWN, LV1);
- PIN(IN, gpf0-5, NONE, LV1);
- PIN(IN, gpf0-6, DOWN, LV1);
- PIN(IN, gpf0-7, UP, LV1);
+ PIN(INPUT, gpf0-0, UP, LV1);
+ PIN(INPUT, gpf0-1, UP, LV1);
+ PIN(INPUT, gpf0-2, DOWN, LV1);
+ PIN(INPUT, gpf0-3, UP, LV1);
+ PIN(INPUT, gpf0-4, DOWN, LV1);
+ PIN(INPUT, gpf0-5, NONE, LV1);
+ PIN(INPUT, gpf0-6, DOWN, LV1);
+ PIN(INPUT, gpf0-7, UP, LV1);
};
};
@@ -876,7 +876,7 @@
pinctrl-0 = <&initial_nfc>;
initial_nfc: initial-state {
- PIN(IN, gpj0-2, DOWN, LV1);
+ PIN(INPUT, gpj0-2, DOWN, LV1);
};
};
@@ -885,54 +885,54 @@
pinctrl-0 = <&initial_peric>;
initial_peric: initial-state {
- PIN(IN, gpv7-0, DOWN, LV1);
- PIN(IN, gpv7-1, DOWN, LV1);
- PIN(IN, gpv7-2, NONE, LV1);
- PIN(IN, gpv7-3, DOWN, LV1);
- PIN(IN, gpv7-4, DOWN, LV1);
- PIN(IN, gpv7-5, DOWN, LV1);
+ PIN(INPUT, gpv7-0, DOWN, LV1);
+ PIN(INPUT, gpv7-1, DOWN, LV1);
+ PIN(INPUT, gpv7-2, NONE, LV1);
+ PIN(INPUT, gpv7-3, DOWN, LV1);
+ PIN(INPUT, gpv7-4, DOWN, LV1);
+ PIN(INPUT, gpv7-5, DOWN, LV1);
- PIN(IN, gpb0-4, DOWN, LV1);
+ PIN(INPUT, gpb0-4, DOWN, LV1);
- PIN(IN, gpc0-2, DOWN, LV1);
- PIN(IN, gpc0-5, DOWN, LV1);
- PIN(IN, gpc0-7, DOWN, LV1);
+ PIN(INPUT, gpc0-2, DOWN, LV1);
+ PIN(INPUT, gpc0-5, DOWN, LV1);
+ PIN(INPUT, gpc0-7, DOWN, LV1);
- PIN(IN, gpc1-1, DOWN, LV1);
+ PIN(INPUT, gpc1-1, DOWN, LV1);
- PIN(IN, gpc3-4, NONE, LV1);
- PIN(IN, gpc3-5, NONE, LV1);
- PIN(IN, gpc3-6, NONE, LV1);
- PIN(IN, gpc3-7, NONE, LV1);
+ PIN(INPUT, gpc3-4, NONE, LV1);
+ PIN(INPUT, gpc3-5, NONE, LV1);
+ PIN(INPUT, gpc3-6, NONE, LV1);
+ PIN(INPUT, gpc3-7, NONE, LV1);
- PIN(OUT, gpg0-0, NONE, LV1);
- PIN(FUNC1, gpg0-1, DOWN, LV1);
+ PIN(OUTPUT, gpg0-0, NONE, LV1);
+ PIN(2, gpg0-1, DOWN, LV1);
- PIN(IN, gpd2-5, DOWN, LV1);
+ PIN(INPUT, gpd2-5, DOWN, LV1);
- PIN(IN, gpd4-0, NONE, LV1);
- PIN(IN, gpd4-1, DOWN, LV1);
- PIN(IN, gpd4-2, DOWN, LV1);
- PIN(IN, gpd4-3, DOWN, LV1);
- PIN(IN, gpd4-4, DOWN, LV1);
+ PIN(INPUT, gpd4-0, NONE, LV1);
+ PIN(INPUT, gpd4-1, DOWN, LV1);
+ PIN(INPUT, gpd4-2, DOWN, LV1);
+ PIN(INPUT, gpd4-3, DOWN, LV1);
+ PIN(INPUT, gpd4-4, DOWN, LV1);
- PIN(IN, gpd6-3, DOWN, LV1);
+ PIN(INPUT, gpd6-3, DOWN, LV1);
- PIN(IN, gpd8-1, UP, LV1);
+ PIN(INPUT, gpd8-1, UP, LV1);
- PIN(IN, gpg1-0, DOWN, LV1);
- PIN(IN, gpg1-1, DOWN, LV1);
- PIN(IN, gpg1-2, DOWN, LV1);
- PIN(IN, gpg1-3, DOWN, LV1);
- PIN(IN, gpg1-4, DOWN, LV1);
+ PIN(INPUT, gpg1-0, DOWN, LV1);
+ PIN(INPUT, gpg1-1, DOWN, LV1);
+ PIN(INPUT, gpg1-2, DOWN, LV1);
+ PIN(INPUT, gpg1-3, DOWN, LV1);
+ PIN(INPUT, gpg1-4, DOWN, LV1);
- PIN(IN, gpg2-0, DOWN, LV1);
- PIN(IN, gpg2-1, DOWN, LV1);
+ PIN(INPUT, gpg2-0, DOWN, LV1);
+ PIN(INPUT, gpg2-1, DOWN, LV1);
- PIN(IN, gpg3-0, DOWN, LV1);
- PIN(IN, gpg3-1, DOWN, LV1);
- PIN(IN, gpg3-5, DOWN, LV1);
- PIN(IN, gpg3-7, DOWN, LV1);
+ PIN(INPUT, gpg3-0, DOWN, LV1);
+ PIN(INPUT, gpg3-1, DOWN, LV1);
+ PIN(INPUT, gpg3-5, DOWN, LV1);
+ PIN(INPUT, gpg3-7, DOWN, LV1);
};
};
@@ -941,7 +941,7 @@
pinctrl-0 = <&initial_touch>;
initial_touch: initial-state {
- PIN(IN, gpj1-2, DOWN, LV1);
+ PIN(INPUT, gpj1-2, DOWN, LV1);
};
};
--
2.11.0
^ permalink raw reply related
* [PATCH 4/4] ARM64: dts: exynos5433: remove unused code
From: Andi Shyti @ 2016-12-29 8:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229084211.20442-1-andi.shyti@samsung.com>
Because the pinctrl DTS is using the samsung.h macros, the
previously pin defines are anused. Remove them.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 13 -------------
1 file changed, 13 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index 9afed9fcf7e1..3c821e5c241e 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -14,19 +14,6 @@
#include <dt-bindings/pinctrl/samsung.h>
-#define PIN_PULL_NONE 0
-#define PIN_PULL_DOWN 1
-#define PIN_PULL_UP 3
-
-#define PIN_DRV_LV1 0
-#define PIN_DRV_LV2 2
-#define PIN_DRV_LV3 1
-#define PIN_DRV_LV4 3
-
-#define PIN_IN 0
-#define PIN_OUT 1
-#define PIN_FUNC1 2
-
#define PIN(_func, _pin, _pull, _drv) \
_pin { \
samsung,pins = #_pin; \
--
2.11.0
^ permalink raw reply related
* [BUG] ARM64: amlogic: gxbb: unhandled level 2 translation fault (11)
From: Neil Armstrong @ 2016-12-29 9:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161224140028.4205-1-xypron.glpk@gmx.de>
On 12/24/2016 03:00 PM, Heinrich Schuchardt wrote:
> When trying to run sddm on an Hardkernel Odroid C2 I invariably run into the
> translation fault below.
>
> The following mail thread relates this kind of problem to TLB (translation
> lookaside buffer) broadcasting.
>
> https://lkml.org/lkml/2014/4/15/207
>
> [ 3163.014263] sddm[1851]: unhandled level 2 translation fault (11) at 0x00000160, esr 0x82000006
> [ 3163.017287] pgd = ffff80007bf86000
> [ 3163.020589] [00000160] *pgd=000000007a8a3003
> [ 3163.024733] , *pud=000000007be9c003
> [ 3163.028095] , *pmd=0000000000000000
>
>
> [ 3163.033026] CPU: 1 PID: 1851 Comm: sddm Not tainted 4.9.0-next-20161212-r022-arm64 #1
> [ 3163.040831] Hardware name: Hardkernel ODROID-C2 (DT)
> [ 3163.045698] task: ffff80007bc6d780 task.stack: ffff80007c524000
> [ 3163.051563] PC is at 0x160
> [ 3163.054231] LR is at 0xffff9a9fbc98
> [ 3163.057686] pc : [<0000000000000160>] lr : [<0000ffff9a9fbc98>] pstate: 40000000
> [ 3163.065022] sp : 0000ffffd7180130
> [ 3163.068281] x29: 0000ffffd7180130 x28: 0000ffffd7180288
> [ 3163.073538] x27: 0000ffff9aa94000 x26: 0000000000000001
> [ 3163.078798] x25: 0000000000000000 x24: 0000ffffd7180410
> [ 3163.084060] x23: 000000000e0c2190 x22: 000000000e0ca5c0
> [ 3163.089322] x21: 0000ffff9ac35000 x20: 0000000000454fa9
> [ 3163.094583] x19: 0000000000454fa8 x18: 000000000e0b5938
> [ 3163.099843] x17: 0000ffff9a3f2988 x16: 0000ffff9ac36aa0
> [ 3163.105105] x15: 0000000000000000 x14: 0000000000000000
> [ 3163.110367] x13: 6d00640064007300 x12: 0800000005000000
> [ 3163.115627] x11: 0000040000000000 x10: 0000a00000000000
> [ 3163.120889] x9 : 00003fffffffffff x8 : 0000000000000000
> [ 3163.126150] x7 : 000000000e0cb520 x6 : 0000000000454fc0
> [ 3163.131412] x5 : 0000ffffd717ffd8 x4 : 000000000e0cb510
> [ 3163.136680] x3 : 0000000000000004 x2 : f2f9022b551b3900
> [ 3163.141935] x1 : 0000000000000160 x0 : 000000000e0ca5c0
>
> Best regards
>
> Heinrich Schuchardt
Hi Heinrich,
I personally never had this issue even while loading huge applications loke LibreOffice and Gnome environment.
I will have a look and try to reproduce this issue, can you provide us your configuration and user-space complete use case ?
Neil
^ permalink raw reply
* [PATCH 1/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Chanwoo Choi @ 2016-12-29 9:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229084211.20442-2-andi.shyti@samsung.com>
Hi Andi,
On 2016? 12? 29? 17:42, Andi Shyti wrote:
> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> values used for configuration") has added a header file for defining the
> pinctrl values in order to avoid hardcoded settings in the Exynos
> DTS related files.
>
> Extend samsung.h to the Exynos5433 for drive strength values
> which are strictly related to the particular SoC and may defer
> from others.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> include/dt-bindings/pinctrl/samsung.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
> index 6276eb785e2b..58868313d64b 100644
> --- a/include/dt-bindings/pinctrl/samsung.h
> +++ b/include/dt-bindings/pinctrl/samsung.h
> @@ -45,6 +45,12 @@
> #define EXYNOS5420_PIN_DRV_LV3 2
> #define EXYNOS5420_PIN_DRV_LV4 3
>
> +/* Drive strengths for Exynos5433 */
> +#define EXYNOS5433_PIN_DRV_LV1 0
> +#define EXYNOS5433_PIN_DRV_LV2 1
> +#define EXYNOS5433_PIN_DRV_LV3 2
> +#define EXYNOS5433_PIN_DRV_LV4 3
Exynos5433 has the same value with EXYNOS5420. So, I'd like you to use the EXYNOS5420_PIN_DRV_LVx instead of separate the definitions.
> +
> #define EXYNOS_PIN_FUNC_INPUT 0
> #define EXYNOS_PIN_FUNC_OUTPUT 1
> #define EXYNOS_PIN_FUNC_2 2
>
--
Regards,
Chanwoo Choi
^ permalink raw reply
* [1/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Jaehoon Chung @ 2016-12-29 9:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229084211.20442-2-andi.shyti@samsung.com>
On 12/29/2016 05:42 PM, Andi Shyti wrote:
> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> values used for configuration") has added a header file for defining the
> pinctrl values in order to avoid hardcoded settings in the Exynos
> DTS related files.
>
> Extend samsung.h to the Exynos5433 for drive strength values
> which are strictly related to the particular SoC and may defer
> from others.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> include/dt-bindings/pinctrl/samsung.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
> index 6276eb785e2b..58868313d64b 100644
> --- a/include/dt-bindings/pinctrl/samsung.h
> +++ b/include/dt-bindings/pinctrl/samsung.h
> @@ -45,6 +45,12 @@
> #define EXYNOS5420_PIN_DRV_LV3 2
> #define EXYNOS5420_PIN_DRV_LV4 3
>
> +/* Drive strengths for Exynos5433 */
> +#define EXYNOS5433_PIN_DRV_LV1 0
> +#define EXYNOS5433_PIN_DRV_LV2 1
> +#define EXYNOS5433_PIN_DRV_LV3 2
> +#define EXYNOS5433_PIN_DRV_LV4 3
Well, i'm not sure..but you needs to compare the other Exynos5 series.
it's difference bit Offset. Did you check it?
I didn't check pinctrl file..if it doesn't apply any exynos5433 pinctrl for drv_strength.
it will work wrong..
Best Regards,
Jaehoon Chung
> +
> #define EXYNOS_PIN_FUNC_INPUT 0
> #define EXYNOS_PIN_FUNC_OUTPUT 1
> #define EXYNOS_PIN_FUNC_2 2
>
>
^ permalink raw reply
* [PATCH] mtd: nand: Update dependency of IFC for LS1021A
From: kbuild test robot @ 2016-12-29 9:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482973102-47659-1-git-send-email-b18965@freescale.com>
Hi Alison,
[auto build test WARNING on mtd/master]
[also build test WARNING on v4.10-rc1 next-20161224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Alison-Wang/mtd-nand-Update-dependency-of-IFC-for-LS1021A/20161229-125233
base: git://git.infradead.org/linux-mtd.git master
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm
All warnings (new ones prefixed by >>):
warning: (MTD_NAND_FSL_IFC) selects FSL_IFC which has unmet direct dependencies (MEMORY && (FSL_SOC || ARCH_LAYERSCAPE))
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH] Revert "mmc: dw_mmc-rockchip: add runtime PM support"
From: Randy Li @ 2016-12-29 10:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <7fb90b9e-75c3-0184-4f0a-d4113899b860@rock-chips.com>
On 12/29/2016 03:25 PM, Shawn Lin wrote:
> On 2016/12/29 15:13, Jaehoon Chung wrote:
>> On 12/29/2016 12:02 PM, Jaehoon Chung wrote:
>>> Hi Randy,
>>>
>>> On 12/29/2016 12:34 AM, Randy Li wrote:
>>>> This reverts commit f90142683f04bcb0729bf0df67a5e29562b725b9.
>>>> It is reported that making RK3288 can't boot from eMMC/MMC.
>>>
>>> Could you explain in more detail?
>>> As you mentioned, this patch is making that RK3288 can't boot..then why?
>>> Good way should be that finds the main reason and fixes it.
>>> Not just revert.
>>
>> To Shawn,
>>
>> Could you check this? If you have rk3288..
>> If it's not working fine, it needs to revert this patch until finding
>> the problem.
>>
>
> Hrmm.....as that patchset was tested based on rk3288 and rk3368, so I
> need to know which board Randy are using now and could you share some
Sorry, XZY has asked me about this in the morning and I answer him that
I would give a feedback at home, so I didn't notice this mail.
The board is Firefly reload. but the reporter told me that Firefly
release also have the same problem.
> log?
>
> I will have a look at it.
>
>
>> Best Regards,
>> Jaehoon Chung
>>
>>>
>>> Best Regards,
>>> Jaehoon Chung
>>>
>>>>
>>>> Signed-off-by: Randy Li <ayaka@soulik.info>
>>>> ---
>>>> drivers/mmc/host/dw_mmc-rockchip.c | 41
>>>> +++-----------------------------------
>>>> 1 file changed, 3 insertions(+), 38 deletions(-)
>>>>
>>>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
>>>> b/drivers/mmc/host/dw_mmc-rockchip.c
>>>> index 9a46e46..3189234 100644
>>>> --- a/drivers/mmc/host/dw_mmc-rockchip.c
>>>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
>>>> @@ -14,7 +14,6 @@
>>>> #include <linux/mmc/dw_mmc.h>
>>>> #include <linux/of_address.h>
>>>> #include <linux/mmc/slot-gpio.h>
>>>> -#include <linux/pm_runtime.h>
>>>> #include <linux/slab.h>
>>>>
>>>> #include "dw_mmc.h"
>>>> @@ -327,7 +326,6 @@ static int dw_mci_rockchip_probe(struct
>>>> platform_device *pdev)
>>>> {
>>>> const struct dw_mci_drv_data *drv_data;
>>>> const struct of_device_id *match;
>>>> - int ret;
>>>>
>>>> if (!pdev->dev.of_node)
>>>> return -ENODEV;
>>>> @@ -335,49 +333,16 @@ static int dw_mci_rockchip_probe(struct
>>>> platform_device *pdev)
>>>> match = of_match_node(dw_mci_rockchip_match, pdev->dev.of_node);
>>>> drv_data = match->data;
>>>>
>>>> - pm_runtime_get_noresume(&pdev->dev);
>>>> - pm_runtime_set_active(&pdev->dev);
>>>> - pm_runtime_enable(&pdev->dev);
>>>> - pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
>>>> - pm_runtime_use_autosuspend(&pdev->dev);
>>>> -
>>>> - ret = dw_mci_pltfm_register(pdev, drv_data);
>>>> - if (ret) {
>>>> - pm_runtime_disable(&pdev->dev);
>>>> - pm_runtime_set_suspended(&pdev->dev);
>>>> - pm_runtime_put_noidle(&pdev->dev);
>>>> - return ret;
>>>> - }
>>>> -
>>>> - pm_runtime_put_autosuspend(&pdev->dev);
>>>> -
>>>> - return 0;
>>>> + return dw_mci_pltfm_register(pdev, drv_data);
>>>> }
>>>>
>>>> -static int dw_mci_rockchip_remove(struct platform_device *pdev)
>>>> -{
>>>> - pm_runtime_get_sync(&pdev->dev);
>>>> - pm_runtime_disable(&pdev->dev);
>>>> - pm_runtime_put_noidle(&pdev->dev);
>>>> -
>>>> - return dw_mci_pltfm_remove(pdev);
>>>> -}
>>>> -
>>>> -static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
>>>> - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
>>>> - pm_runtime_force_resume)
>>>> - SET_RUNTIME_PM_OPS(dw_mci_runtime_suspend,
>>>> - dw_mci_runtime_resume,
>>>> - NULL)
>>>> -};
>>>> -
>>>> static struct platform_driver dw_mci_rockchip_pltfm_driver = {
>>>> .probe = dw_mci_rockchip_probe,
>>>> - .remove = dw_mci_rockchip_remove,
>>>> + .remove = dw_mci_pltfm_remove,
>>>> .driver = {
>>>> .name = "dwmmc_rockchip",
>>>> .of_match_table = dw_mci_rockchip_match,
>>>> - .pm = &dw_mci_rockchip_dev_pm_ops,
>>>> + .pm = &dw_mci_pltfm_pmops,
>>>> },
>>>> };
>>>>
>>>>
>>>
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
>>> the body of a message to majordomo at vger.kernel.org
>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>
>>> .
>>>
>>
>>
>>
>>
>
>
--
Randy Li
The third produce department
===========================================================================
This email message, including any attachments, is for the sole
use of the intended recipient(s) and may contain confidential and
privileged information. Any unauthorized review, use, disclosure or
distribution is prohibited. If you are not the intended recipient, please
contact the sender by reply e-mail and destroy all copies of the original
message. [Fuzhou Rockchip Electronics, INC. China mainland]
===========================================================================
^ permalink raw reply
* [PATCH 7/8] ARM: s3c64xx: Drop initialization of unused struct s3c_audio_pdata fields
From: Sylwester Nawrocki @ 2016-12-29 10:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161228175344.3krz2hqrem56ypg6@kozik-lap>
On 12/28/2016 06:53 PM, Krzysztof Kozlowski wrote:
> On Thu, Nov 10, 2016 at 04:17:55PM +0100, Sylwester Nawrocki wrote:
>> Remove initialization of dma_{filter, playback, capture, capture_mic}
>> fields where it is not used any more.
>>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> ---
>> arch/arm/mach-s3c64xx/dev-audio.c | 19 -------------------
>> 1 file changed, 19 deletions(-)
>>
> Sylwester,
>
> This and 8/8 should be safe to apply, right?
Yes, I think both patches can be applied safely now.
Thanks for getting back to this.
^ permalink raw reply
* [PATCH 1/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Chanwoo Choi @ 2016-12-29 10:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <37b86cdb-b5e9-a5fa-fbb1-46e8d8c90cd8@samsung.com>
Hi Andi,
On 2016? 12? 29? 18:17, Chanwoo Choi wrote:
> Hi Andi,
>
> On 2016? 12? 29? 17:42, Andi Shyti wrote:
>> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
>> values used for configuration") has added a header file for defining the
>> pinctrl values in order to avoid hardcoded settings in the Exynos
>> DTS related files.
>>
>> Extend samsung.h to the Exynos5433 for drive strength values
>> which are strictly related to the particular SoC and may defer
>> from others.
>>
>> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
>> ---
>> include/dt-bindings/pinctrl/samsung.h | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
>> index 6276eb785e2b..58868313d64b 100644
>> --- a/include/dt-bindings/pinctrl/samsung.h
>> +++ b/include/dt-bindings/pinctrl/samsung.h
>> @@ -45,6 +45,12 @@
>> #define EXYNOS5420_PIN_DRV_LV3 2
>> #define EXYNOS5420_PIN_DRV_LV4 3
>>
>> +/* Drive strengths for Exynos5433 */
>> +#define EXYNOS5433_PIN_DRV_LV1 0
>> +#define EXYNOS5433_PIN_DRV_LV2 1
>> +#define EXYNOS5433_PIN_DRV_LV3 2
>> +#define EXYNOS5433_PIN_DRV_LV4 3
>
> Exynos5433 has the same value with EXYNOS5420. So, I'd like you to use the EXYNOS5420_PIN_DRV_LVx instead of separate the definitions.
I found the problem to handle the *_DRV register of Exynos5433. Because Exynos5433 has the different width length of *_DRV (PINCFG_TYPE_DRV) bitfields from Exynos542x as following. When I was sending the exynos5433 pinctrl patches, I was missing this issue.
Exynos5422/Exynos5410 have two different bitfields in the same register to set the DRV_LVx as following:
(n=0 to 7)
[2n+1:2n] : 2bits
0x0 = 1x,
0x1 = 2x,
0x2 = 3x,
0x3 = 4x,
[n+16:16]
0x0 = Fast Slew Rate,
0x1 = Slow Slew Rate,
But, Exynos5433 has the following value for PIN_DRV_LVx without additional bitfields to separate 'Fast Slew Rate' and 'Slow Slew Rate'. Just exynos5433 defines the 'Fast Slew Rate(0x0 ~ 0x5)' and 'Slow Slew Rate (0x8 ~ 0xF)'.
(n=0 to 7)
[4n+3:4n] : 4 bits
0x0 = Fast Slew Rate 1x
0x1 = Fast Slew Rate 2x
0x2 = Fast Slew Rate 3x
0x3 = Fast Slew Rate 4x
0x4 = Fast Slew Rate 5x
0x5 = Fast Slew Rate 6x
0x8 = Slow Slew Rate 1x
0x9 = Slow Slew Rate 2x
0xA = Slow Slew Rate 3x
0xB = Slow Slew Rate 4x
0xC = Slow Slew Rate 5x
0xF = Slow Slew Rate 6x
So, before this patch, we have to fix it to support the DRV reigster of Exynos5433.
I'll fix it.
>
>> +
>> #define EXYNOS_PIN_FUNC_INPUT 0
>> #define EXYNOS_PIN_FUNC_OUTPUT 1
>> #define EXYNOS_PIN_FUNC_2 2
>>
>
--
Regards,
Chanwoo Choi
^ permalink raw reply
* [PATCH] drm: zte: support hdmi audio through spdif
From: Shawn Guo @ 2016-12-29 11:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOw6vbJzKeiTW9haRmiFhJv44pRSMNvvpFUg-4LcfxSuRzo17w@mail.gmail.com>
On Thu, Dec 22, 2016 at 10:18:00AM -0500, Sean Paul wrote:
> On Thu, Dec 22, 2016 at 8:11 AM, Shawn Guo <shawnguo@kernel.org> wrote:
> > +static int zx_hdmi_audio_get_n(unsigned int fs)
> > +{
> > + unsigned int n;
> > +
> > + switch (fs) {
> > + case 32000:
> > + n = 4096;
> > + break;
> > + case 44100:
> > + n = 6272;
> > + break;
> > + case 48000:
> > + n = 6144;
> > + break;
> > + case 88200:
> > + n = 6272 * 2;
> > + break;
> > + case 96000:
> > + n = 6144 * 2;
> > + break;
> > + case 176400:
> > + n = 6272 * 4;
> > + break;
> > + case 192000:
> > + n = 6144 * 4;
> > + break;
> > + default:
> > + n = fs * 128 / 1000;
>
> It seems like this could be distilled down to:
>
> if (fs && (fs % 44100) == 0)
> n = 6272 * (fs / 44100);
> else
> n = fs * 128 / 1000;
Nice! Thanks for the suggestion.
>
> > + }
> > +
> > + return n;
> > +}
> > +
> > +static int zx_hdmi_audio_hw_params(struct device *dev,
> > + void *data,
> > + struct hdmi_codec_daifmt *daifmt,
> > + struct hdmi_codec_params *params)
> > +{
> > + struct zx_hdmi *hdmi = dev_get_drvdata(dev);
> > + struct hdmi_audio_infoframe *cea = ¶ms->cea;
> > + union hdmi_infoframe frame;
> > + int n;
> > +
> > + /* We only support spdif for now */
> > + if (daifmt->fmt != HDMI_SPDIF) {
> > + DRM_DEV_ERROR(hdmi->dev, "invalid daifmt %d\n", daifmt->fmt);
> > + return -EINVAL;
> > + }
> > +
> > + switch (params->sample_width) {
> > + case 16:
> > + hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
> > + SPDIF_SAMPLE_SIZE_16BIT);
> > + break;
> > + case 20:
> > + hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
> > + SPDIF_SAMPLE_SIZE_20BIT);
> > + break;
> > + case 24:
> > + hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
> > + SPDIF_SAMPLE_SIZE_24BIT);
> > + break;
> > + default:
> > + DRM_DEV_ERROR(hdmi->dev, "invalid sample width %d\n",
> > + params->sample_width);
> > + return -EINVAL;
> > + }
> > +
> > + /* CTS is calculated by hardware, and we only need to take care of N */
> > + n = zx_hdmi_audio_get_n(params->sample_rate);
> > + hdmi_writeb(hdmi, N_SVAL1, n & 0xff);
> > + hdmi_writeb(hdmi, N_SVAL2, (n >> 8) && 0xff);
>
> s/&&/&/ ?
Oops! Thanks for catching it.
Shawn
>
> > + hdmi_writeb(hdmi, N_SVAL3, (n >> 16) & 0xf);
> > +
> > + /* Enable spdif mode */
> > + hdmi_writeb_mask(hdmi, AUD_MODE, SPDIF_EN, SPDIF_EN);
> > +
> > + /* Enable audio input */
> > + hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, AUD_IN_EN);
> > +
> > + memcpy(&frame.audio, cea, sizeof(*cea));
> > +
> > + return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AUDIO);
> > +}
^ permalink raw reply
* [PATCH v2] drm: zte: support hdmi audio through spdif
From: Shawn Guo @ 2016-12-29 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Shawn Guo <shawn.guo@linaro.org>
It enables HDMI audio support through SPDIF interface based on generic
hdmi-audio-codec driver. The HDMI hardware supports more audio
interfaces than SPDIF, like I2S, which may be added later.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
Changes for v2:
- Distll the function zx_hdmi_audio_get_n() per Sean's suggestion and
make it inline.
- Fix the operator typo on N_SVAL2 register write.
drivers/gpu/drm/zte/Kconfig | 1 +
drivers/gpu/drm/zte/zx_hdmi.c | 148 +++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/zte/zx_hdmi_regs.h | 14 ++++
drivers/gpu/drm/zte/zx_vou.c | 9 +++
drivers/gpu/drm/zte/zx_vou.h | 10 +++
drivers/gpu/drm/zte/zx_vou_regs.h | 2 +
6 files changed, 184 insertions(+)
diff --git a/drivers/gpu/drm/zte/Kconfig b/drivers/gpu/drm/zte/Kconfig
index 4065b2840f1c..ed6de4b10c74 100644
--- a/drivers/gpu/drm/zte/Kconfig
+++ b/drivers/gpu/drm/zte/Kconfig
@@ -4,5 +4,6 @@ config DRM_ZTE
select DRM_KMS_CMA_HELPER
select DRM_KMS_FB_HELPER
select DRM_KMS_HELPER
+ select SND_SOC_HDMI_CODEC if SND_SOC
help
Choose this option to enable DRM on ZTE ZX SoCs.
diff --git a/drivers/gpu/drm/zte/zx_hdmi.c b/drivers/gpu/drm/zte/zx_hdmi.c
index 6bf6c364811e..c20121846073 100644
--- a/drivers/gpu/drm/zte/zx_hdmi.c
+++ b/drivers/gpu/drm/zte/zx_hdmi.c
@@ -25,6 +25,8 @@
#include <drm/drm_of.h>
#include <drm/drmP.h>
+#include <sound/hdmi-codec.h>
+
#include "zx_hdmi_regs.h"
#include "zx_vou.h"
@@ -49,6 +51,7 @@ struct zx_hdmi {
bool sink_is_hdmi;
bool sink_has_audio;
const struct vou_inf *inf;
+ struct platform_device *audio_pdev;
};
#define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x)
@@ -366,6 +369,142 @@ static irqreturn_t zx_hdmi_irq_handler(int irq, void *dev_id)
return IRQ_NONE;
}
+static int zx_hdmi_audio_startup(struct device *dev, void *data)
+{
+ struct zx_hdmi *hdmi = dev_get_drvdata(dev);
+ struct drm_encoder *encoder = &hdmi->encoder;
+
+ vou_inf_hdmi_audio_sel(encoder->crtc, VOU_HDMI_AUD_SPDIF);
+
+ return 0;
+}
+
+static void zx_hdmi_audio_shutdown(struct device *dev, void *data)
+{
+ struct zx_hdmi *hdmi = dev_get_drvdata(dev);
+
+ /* Disable audio input */
+ hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, 0);
+}
+
+static inline int zx_hdmi_audio_get_n(unsigned int fs)
+{
+ unsigned int n;
+
+ if (fs && (fs % 44100) == 0)
+ n = 6272 * (fs / 44100);
+ else
+ n = fs * 128 / 1000;
+
+ return n;
+}
+
+static int zx_hdmi_audio_hw_params(struct device *dev,
+ void *data,
+ struct hdmi_codec_daifmt *daifmt,
+ struct hdmi_codec_params *params)
+{
+ struct zx_hdmi *hdmi = dev_get_drvdata(dev);
+ struct hdmi_audio_infoframe *cea = ¶ms->cea;
+ union hdmi_infoframe frame;
+ int n;
+
+ /* We only support spdif for now */
+ if (daifmt->fmt != HDMI_SPDIF) {
+ DRM_DEV_ERROR(hdmi->dev, "invalid daifmt %d\n", daifmt->fmt);
+ return -EINVAL;
+ }
+
+ switch (params->sample_width) {
+ case 16:
+ hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
+ SPDIF_SAMPLE_SIZE_16BIT);
+ break;
+ case 20:
+ hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
+ SPDIF_SAMPLE_SIZE_20BIT);
+ break;
+ case 24:
+ hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
+ SPDIF_SAMPLE_SIZE_24BIT);
+ break;
+ default:
+ DRM_DEV_ERROR(hdmi->dev, "invalid sample width %d\n",
+ params->sample_width);
+ return -EINVAL;
+ }
+
+ /* CTS is calculated by hardware, and we only need to take care of N */
+ n = zx_hdmi_audio_get_n(params->sample_rate);
+ hdmi_writeb(hdmi, N_SVAL1, n & 0xff);
+ hdmi_writeb(hdmi, N_SVAL2, (n >> 8) & 0xff);
+ hdmi_writeb(hdmi, N_SVAL3, (n >> 16) & 0xf);
+
+ /* Enable spdif mode */
+ hdmi_writeb_mask(hdmi, AUD_MODE, SPDIF_EN, SPDIF_EN);
+
+ /* Enable audio input */
+ hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, AUD_IN_EN);
+
+ memcpy(&frame.audio, cea, sizeof(*cea));
+
+ return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AUDIO);
+}
+
+static int zx_hdmi_audio_digital_mute(struct device *dev, void *data,
+ bool enable)
+{
+ struct zx_hdmi *hdmi = dev_get_drvdata(dev);
+
+ if (enable)
+ hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE,
+ TPI_AUD_MUTE);
+ else
+ hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE, 0);
+
+ return 0;
+}
+
+static int zx_hdmi_audio_get_eld(struct device *dev, void *data,
+ uint8_t *buf, size_t len)
+{
+ struct zx_hdmi *hdmi = dev_get_drvdata(dev);
+ struct drm_connector *connector = &hdmi->connector;
+
+ memcpy(buf, connector->eld, min(sizeof(connector->eld), len));
+
+ return 0;
+}
+
+static const struct hdmi_codec_ops zx_hdmi_codec_ops = {
+ .audio_startup = zx_hdmi_audio_startup,
+ .hw_params = zx_hdmi_audio_hw_params,
+ .audio_shutdown = zx_hdmi_audio_shutdown,
+ .digital_mute = zx_hdmi_audio_digital_mute,
+ .get_eld = zx_hdmi_audio_get_eld,
+};
+
+static struct hdmi_codec_pdata zx_hdmi_codec_pdata = {
+ .ops = &zx_hdmi_codec_ops,
+ .spdif = 1,
+};
+
+static int zx_hdmi_audio_register(struct zx_hdmi *hdmi)
+{
+ struct platform_device *pdev;
+
+ pdev = platform_device_register_data(hdmi->dev, HDMI_CODEC_DRV_NAME,
+ PLATFORM_DEVID_AUTO,
+ &zx_hdmi_codec_pdata,
+ sizeof(zx_hdmi_codec_pdata));
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ hdmi->audio_pdev = pdev;
+
+ return 0;
+}
+
static int zx_hdmi_i2c_read(struct zx_hdmi *hdmi, struct i2c_msg *msg)
{
int len = msg->len;
@@ -566,6 +705,12 @@ static int zx_hdmi_bind(struct device *dev, struct device *master, void *data)
return ret;
}
+ ret = zx_hdmi_audio_register(hdmi);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "failed to register audio: %d\n", ret);
+ return ret;
+ }
+
ret = zx_hdmi_register(drm, hdmi);
if (ret) {
DRM_DEV_ERROR(dev, "failed to register hdmi: %d\n", ret);
@@ -590,6 +735,9 @@ static void zx_hdmi_unbind(struct device *dev, struct device *master,
hdmi->connector.funcs->destroy(&hdmi->connector);
hdmi->encoder.funcs->destroy(&hdmi->encoder);
+
+ if (hdmi->audio_pdev)
+ platform_device_unregister(hdmi->audio_pdev);
}
static const struct component_ops zx_hdmi_component_ops = {
diff --git a/drivers/gpu/drm/zte/zx_hdmi_regs.h b/drivers/gpu/drm/zte/zx_hdmi_regs.h
index de911f66b658..c6d5d8211725 100644
--- a/drivers/gpu/drm/zte/zx_hdmi_regs.h
+++ b/drivers/gpu/drm/zte/zx_hdmi_regs.h
@@ -52,5 +52,19 @@
#define TPI_INFO_TRANS_RPT BIT(6)
#define TPI_DDC_MASTER_EN 0x06f8
#define HW_DDC_MASTER BIT(7)
+#define N_SVAL1 0xa03
+#define N_SVAL2 0xa04
+#define N_SVAL3 0xa05
+#define AUD_EN 0xa13
+#define AUD_IN_EN BIT(0)
+#define AUD_MODE 0xa14
+#define SPDIF_EN BIT(1)
+#define TPI_AUD_CONFIG 0xa62
+#define SPDIF_SAMPLE_SIZE_SHIFT 6
+#define SPDIF_SAMPLE_SIZE_MASK (0x3 << SPDIF_SAMPLE_SIZE_SHIFT)
+#define SPDIF_SAMPLE_SIZE_16BIT (0x1 << SPDIF_SAMPLE_SIZE_SHIFT)
+#define SPDIF_SAMPLE_SIZE_20BIT (0x2 << SPDIF_SAMPLE_SIZE_SHIFT)
+#define SPDIF_SAMPLE_SIZE_24BIT (0x3 << SPDIF_SAMPLE_SIZE_SHIFT)
+#define TPI_AUD_MUTE BIT(4)
#endif /* __ZX_HDMI_REGS_H__ */
diff --git a/drivers/gpu/drm/zte/zx_vou.c b/drivers/gpu/drm/zte/zx_vou.c
index 73fe15c17c32..f89ad7f72fdb 100644
--- a/drivers/gpu/drm/zte/zx_vou.c
+++ b/drivers/gpu/drm/zte/zx_vou.c
@@ -119,6 +119,15 @@ static inline struct zx_vou_hw *crtc_to_vou(struct drm_crtc *crtc)
return zcrtc->vou;
}
+void vou_inf_hdmi_audio_sel(struct drm_crtc *crtc,
+ enum vou_inf_hdmi_audio aud)
+{
+ struct zx_crtc *zcrtc = to_zx_crtc(crtc);
+ struct zx_vou_hw *vou = zcrtc->vou;
+
+ zx_writel_mask(vou->vouctl + VOU_INF_HDMI_CTRL, VOU_HDMI_AUD_MASK, aud);
+}
+
void vou_inf_enable(const struct vou_inf *inf, struct drm_crtc *crtc)
{
struct zx_crtc *zcrtc = to_zx_crtc(crtc);
diff --git a/drivers/gpu/drm/zte/zx_vou.h b/drivers/gpu/drm/zte/zx_vou.h
index 349e06cd86f4..e571b888a3ca 100644
--- a/drivers/gpu/drm/zte/zx_vou.h
+++ b/drivers/gpu/drm/zte/zx_vou.h
@@ -30,6 +30,14 @@ enum vou_inf_data_sel {
VOU_RGB_666 = 3,
};
+enum vou_inf_hdmi_audio {
+ VOU_HDMI_AUD_SPDIF = BIT(0),
+ VOU_HDMI_AUD_I2S = BIT(1),
+ VOU_HDMI_AUD_DSD = BIT(2),
+ VOU_HDMI_AUD_HBR = BIT(3),
+ VOU_HDMI_AUD_PARALLEL = BIT(4),
+};
+
struct vou_inf {
enum vou_inf_id id;
enum vou_inf_data_sel data_sel;
@@ -37,6 +45,8 @@ struct vou_inf {
u32 clocks_sel_bits;
};
+void vou_inf_hdmi_audio_sel(struct drm_crtc *crtc,
+ enum vou_inf_hdmi_audio aud);
void vou_inf_enable(const struct vou_inf *inf, struct drm_crtc *crtc);
void vou_inf_disable(const struct vou_inf *inf, struct drm_crtc *crtc);
diff --git a/drivers/gpu/drm/zte/zx_vou_regs.h b/drivers/gpu/drm/zte/zx_vou_regs.h
index f44e7a4ae441..15b73cd3a612 100644
--- a/drivers/gpu/drm/zte/zx_vou_regs.h
+++ b/drivers/gpu/drm/zte/zx_vou_regs.h
@@ -150,6 +150,8 @@
#define VOU_CLK_GL0_SEL BIT(4)
#define VOU_CLK_REQEN 0x20
#define VOU_CLK_EN 0x24
+#define VOU_INF_HDMI_CTRL 0x30
+#define VOU_HDMI_AUD_MASK 0x1f
/* OTFPPU_CTRL registers */
#define OTFPPU_RSZ_DATA_SOURCE 0x04
--
1.9.1
^ permalink raw reply related
* [PATCH v2 2/2] mmc: host: s3cmci: allow probing from device tree
From: Ulf Hansson @ 2016-12-29 11:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481289284-19919-3-git-send-email-sergio.prado@e-labworks.com>
On 9 December 2016 at 14:14, Sergio Prado <sergio.prado@e-labworks.com> wrote:
> Allows configuring Samsung S3C24XX MMC/SD/SDIO controller using a device
> tree.
>
> Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
> ---
> drivers/mmc/host/s3cmci.c | 155 +++++++++++++++++++++++++++++++++++++++-------
> 1 file changed, 131 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
> index 932a4b1fed33..bfeb90e8ffee 100644
> --- a/drivers/mmc/host/s3cmci.c
> +++ b/drivers/mmc/host/s3cmci.c
> @@ -23,6 +23,9 @@
> #include <linux/gpio.h>
> #include <linux/irq.h>
> #include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/of_gpio.h>
>
> #include <plat/gpio-cfg.h>
> #include <mach/dma.h>
> @@ -127,6 +130,22 @@ enum dbg_channels {
> dbg_conf = (1 << 8),
> };
>
> +struct s3cmci_drv_data {
> + int is2440;
This doesn't say much.
Please use a more descriptive variable name and rename the struct to
perhaps "variant_data", because I guess that is what this is?
> +};
> +
> +static const struct s3cmci_drv_data s3c2410_s3cmci_drv_data = {
> + .is2440 = 0,
> +};
> +
> +static const struct s3cmci_drv_data s3c2412_s3cmci_drv_data = {
> + .is2440 = 1,
> +};
> +
> +static const struct s3cmci_drv_data s3c2440_s3cmci_drv_data = {
> + .is2440 = 1,
> +};
> +
> static const int dbgmap_err = dbg_fail;
> static const int dbgmap_info = dbg_info | dbg_conf;
> static const int dbgmap_debug = dbg_err | dbg_debug;
> @@ -1241,8 +1260,9 @@ static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> case MMC_POWER_ON:
> case MMC_POWER_UP:
> /* Configure GPE5...GPE10 pins in SD mode */
> - s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2),
> - S3C_GPIO_PULL_NONE);
> + if (!host->pdev->dev.of_node)
> + s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2),
> + S3C_GPIO_PULL_NONE);
>
> if (host->pdata->set_power)
> host->pdata->set_power(ios->power_mode, ios->vdd);
> @@ -1254,7 +1274,8 @@ static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
>
> case MMC_POWER_OFF:
> default:
> - gpio_direction_output(S3C2410_GPE(5), 0);
> + if (!host->pdev->dev.of_node)
> + gpio_direction_output(S3C2410_GPE(5), 0);
>
> if (host->is2440)
> mci_con |= S3C2440_SDICON_SDRESET;
> @@ -1544,21 +1565,12 @@ static inline void s3cmci_debugfs_remove(struct s3cmci_host *host) { }
>
> #endif /* CONFIG_DEBUG_FS */
>
> -static int s3cmci_probe(struct platform_device *pdev)
> +static int s3cmci_probe_pdata(struct s3cmci_host *host)
> {
> - struct s3cmci_host *host;
> - struct mmc_host *mmc;
> - int ret;
> - int is2440;
> - int i;
> + struct platform_device *pdev = host->pdev;
> + int i, ret;
>
> - is2440 = platform_get_device_id(pdev)->driver_data;
> -
> - mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev);
> - if (!mmc) {
> - ret = -ENOMEM;
> - goto probe_out;
> - }
> + host->is2440 = platform_get_device_id(pdev)->driver_data;
>
> for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++) {
> ret = gpio_request(i, dev_name(&pdev->dev));
> @@ -1568,14 +1580,90 @@ static int s3cmci_probe(struct platform_device *pdev)
> for (i--; i >= S3C2410_GPE(5); i--)
> gpio_free(i);
>
> - goto probe_free_host;
> + return ret;
> }
> }
>
> + return 0;
> +}
> +
> +static int s3cmci_probe_dt(struct s3cmci_host *host)
> +{
> + struct platform_device *pdev = host->pdev;
> + struct s3c24xx_mci_pdata *pdata;
> + const struct s3cmci_drv_data *drvdata;
> + struct mmc_host *mmc = host->mmc;
> + int gpio, ret;
> +
> + drvdata = of_device_get_match_data(&pdev->dev);
> + if (!drvdata)
> + return -ENODEV;
> +
> + host->is2440 = drvdata->is2440;
Instead of copying only the member, perhaps assign a host->variant
pointer to the drvdata instead, as that allows to extend the
information for the variant to cover more things than only "is2440",
while going forward.
In other words:
host->variant = of_device_get_match_data(&pdev->dev);
> +
> + ret = mmc_of_parse(mmc);
> + if (ret)
> + return ret;
> +
> + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
> + if (!pdata)
> + return -ENOMEM;
> +
> + pdata->ocr_avail = mmc->ocr_avail;
> +
> + if (mmc->caps2 & MMC_CAP2_NO_WRITE_PROTECT)
> + pdata->no_wprotect = 1;
> +
> + if (mmc->caps & MMC_CAP_NEEDS_POLL)
> + pdata->no_detect = 1;
> +
> + if (mmc->caps2 & MMC_CAP2_RO_ACTIVE_HIGH)
> + pdata->wprotect_invert = 1;
> +
> + if (mmc->caps2 & MMC_CAP2_CD_ACTIVE_HIGH)
> + pdata->detect_invert = 1;
> +
> + gpio = of_get_named_gpio(pdev->dev.of_node, "cd-gpios", 0);
This should already be covered via mmc_of_parse().
> + if (gpio_is_valid(gpio)) {
> + pdata->gpio_detect = gpio;
> + gpio_free(gpio);
> + }
> +
> + gpio = of_get_named_gpio(pdev->dev.of_node, "wp-gpios", 0);
This should already be covered via mmc_of_parse().
> + if (gpio_is_valid(gpio)) {
> + pdata->gpio_wprotect = gpio;
> + gpio_free(gpio);
> + }
> +
> + pdev->dev.platform_data = pdata;
> +
> + return 0;
> +}
> +
> +static int s3cmci_probe(struct platform_device *pdev)
> +{
> + struct s3cmci_host *host;
> + struct mmc_host *mmc;
> + int ret;
> + int i;
> +
> + mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev);
> + if (!mmc) {
> + ret = -ENOMEM;
> + goto probe_out;
> + }
> +
> host = mmc_priv(mmc);
> host->mmc = mmc;
> host->pdev = pdev;
> - host->is2440 = is2440;
> +
> + if (pdev->dev.of_node)
> + ret = s3cmci_probe_dt(host);
> + else
> + ret = s3cmci_probe_pdata(host);
> +
> + if (ret)
> + goto probe_free_host;
>
> host->pdata = pdev->dev.platform_data;
> if (!host->pdata) {
> @@ -1586,7 +1674,7 @@ static int s3cmci_probe(struct platform_device *pdev)
> spin_lock_init(&host->complete_lock);
> tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
>
> - if (is2440) {
> + if (host->is2440) {
> host->sdiimsk = S3C2440_SDIIMSK;
> host->sdidata = S3C2440_SDIDATA;
> host->clk_div = 1;
> @@ -1789,8 +1877,9 @@ static int s3cmci_probe(struct platform_device *pdev)
> release_mem_region(host->mem->start, resource_size(host->mem));
>
> probe_free_gpio:
> - for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++)
> - gpio_free(i);
> + if (!pdev->dev.of_node)
> + for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++)
> + gpio_free(i);
>
> probe_free_host:
> mmc_free_host(mmc);
> @@ -1837,9 +1926,9 @@ static int s3cmci_remove(struct platform_device *pdev)
> if (!pd->no_detect)
> gpio_free(pd->gpio_detect);
>
> - for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++)
> - gpio_free(i);
> -
> + if (!pdev->dev.of_node)
> + for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++)
> + gpio_free(i);
>
> iounmap(host->base);
> release_mem_region(host->mem->start, resource_size(host->mem));
> @@ -1848,6 +1937,23 @@ static int s3cmci_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct of_device_id s3cmci_dt_match[] = {
> + {
> + .compatible = "samsung,s3c2410-sdi",
> + .data = &s3c2410_s3cmci_drv_data,
> + },
> + {
> + .compatible = "samsung,s3c2412-sdi",
> + .data = &s3c2412_s3cmci_drv_data,
> + },
> + {
> + .compatible = "samsung,s3c2440-sdi",
> + .data = &s3c2440_s3cmci_drv_data,
> + },
> + { /* sentinel */ },
> +};
> +MODULE_DEVICE_TABLE(of, sdhci_s3c_dt_match);
> +
> static const struct platform_device_id s3cmci_driver_ids[] = {
> {
> .name = "s3c2410-sdi",
> @@ -1867,6 +1973,7 @@ static int s3cmci_remove(struct platform_device *pdev)
> static struct platform_driver s3cmci_driver = {
> .driver = {
> .name = "s3c-sdi",
> + .of_match_table = s3cmci_dt_match,
> },
> .id_table = s3cmci_driver_ids,
> .probe = s3cmci_probe,
> --
> 1.9.1
>
Kind regards
Uffe
^ permalink raw reply
* [PATCH 7/8] ARM: s3c64xx: Drop initialization of unused struct s3c_audio_pdata fields
From: Krzysztof Kozlowski @ 2016-12-29 11:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <0bb15f0e-7033-4cb3-5aba-0bb61fdfc467@samsung.com>
On Thu, Dec 29, 2016 at 11:30:49AM +0100, Sylwester Nawrocki wrote:
> On 12/28/2016 06:53 PM, Krzysztof Kozlowski wrote:
> > On Thu, Nov 10, 2016 at 04:17:55PM +0100, Sylwester Nawrocki wrote:
> >> Remove initialization of dma_{filter, playback, capture, capture_mic}
> >> fields where it is not used any more.
> >>
> >> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> >> ---
> >> arch/arm/mach-s3c64xx/dev-audio.c | 19 -------------------
> >> 1 file changed, 19 deletions(-)
> >>
> > Sylwester,
> >
> > This and 8/8 should be safe to apply, right?
>
> Yes, I think both patches can be applied safely now.
> Thanks for getting back to this.
Thanks, applied both.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH 1/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Krzysztof Kozlowski @ 2016-12-29 11:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229084211.20442-2-andi.shyti@samsung.com>
On Thu, Dec 29, 2016 at 05:42:08PM +0900, Andi Shyti wrote:
> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> values used for configuration") has added a header file for defining the
> pinctrl values in order to avoid hardcoded settings in the Exynos
> DTS related files.
>
> Extend samsung.h to the Exynos5433 for drive strength values
> which are strictly related to the particular SoC and may defer
> from others.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> include/dt-bindings/pinctrl/samsung.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
> index 6276eb785e2b..58868313d64b 100644
> --- a/include/dt-bindings/pinctrl/samsung.h
> +++ b/include/dt-bindings/pinctrl/samsung.h
> @@ -45,6 +45,12 @@
> #define EXYNOS5420_PIN_DRV_LV3 2
> #define EXYNOS5420_PIN_DRV_LV4 3
>
> +/* Drive strengths for Exynos5433 */
> +#define EXYNOS5433_PIN_DRV_LV1 0
> +#define EXYNOS5433_PIN_DRV_LV2 1
> +#define EXYNOS5433_PIN_DRV_LV3 2
> +#define EXYNOS5433_PIN_DRV_LV4 3
Same values as existing. No need to re-define these.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH 4/4] ARM64: dts: exynos5433: remove unused code
From: Krzysztof Kozlowski @ 2016-12-29 11:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229084211.20442-5-andi.shyti@samsung.com>
On Thu, Dec 29, 2016 at 05:42:11PM +0900, Andi Shyti wrote:
> Because the pinctrl DTS is using the samsung.h macros, the
> previously pin defines are anused. Remove them.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 13 -------------
> 1 file changed, 13 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> index 9afed9fcf7e1..3c821e5c241e 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> @@ -14,19 +14,6 @@
>
> #include <dt-bindings/pinctrl/samsung.h>
>
> -#define PIN_PULL_NONE 0
> -#define PIN_PULL_DOWN 1
> -#define PIN_PULL_UP 3
> -
> -#define PIN_DRV_LV1 0
> -#define PIN_DRV_LV2 2
> -#define PIN_DRV_LV3 1
> -#define PIN_DRV_LV4 3
> -
> -#define PIN_IN 0
> -#define PIN_OUT 1
> -#define PIN_FUNC1 2
> -
This should be squashed with 3/4 because logically it is strictly
related to it and splitting it does not bring any benefits. Actually
while looking at 3/4 I was surprised to see them not removed.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH v2] ARM: dts: qcom: apq8064: Add missing scm clock
From: Bjorn Andersson @ 2016-12-29 12:06 UTC (permalink / raw)
To: linux-arm-kernel
As per the device tree binding the apq8064 scm node requires the core
clock to be specified, so add this.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v1:
- Changed clock to Daytona Fabric
arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 1dbe697b2e90..a27cc96ac069 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -4,6 +4,7 @@
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/soc/qcom,gsbi.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -303,6 +304,9 @@
firmware {
scm {
compatible = "qcom,scm-apq8064";
+
+ clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>;
+ clock-names = "core";
};
};
--
2.11.0
^ permalink raw reply related
* Linux fails to start secondary cores when system resumes from Suspend-to-RAM
From: Mason @ 2016-12-29 12:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <8c3c6592-1e9a-10d3-2a89-c22a2a23cf4b@free.fr>
On 16/12/2016 08:25, Mason wrote:
> On 16/12/2016 06:14, Yu Chen wrote:
>
>> On Thu, Dec 15, 2016 at 11:18 PM, Mason wrote:
>>
>>> I'm playing with suspend-to-RAM on the tango platform:
>>>
>>> http://lxr.free-electrons.com/source/arch/arm/mach-tango/platsmp.c
>>>
>>> When the system is suspended, the CPU is completely powered down
>>> (receives no power whatsoever). When the system receives a wake-up
>>> event, the CPU is powered up, and starts up exactly the same way
>>> as for a cold boot (I think).
>>>
>>> However, while Linux successfully starts the secondary cores when
>>> the system first boots, it fails when the system resumes from "S3".
>>>
>>> I added printascii() calls inside secondary_start_kernel() and I can
>>> see that the following instruction are "properly" run:
>>>
>>> cpu_switch_mm(mm->pgd, mm);
>>> local_flush_bp_all();
>>> enter_lazy_tlb(mm, current);
>>>
>>> but it seems local_flush_tlb_all(); never returns... :-(
>>>
>>> http://lxr.free-electrons.com/source/arch/arm/include/asm/tlbflush.h#L332
>>>
>>>
>>> Looking more closely at that function, it seems to be failing in:
>>>
>>> tlb_op(TLB_V7_UIS_FULL, "c8, c7, 0", zero);
>>>
>>> (meaning: I get a log before, but not after)
>>>
>>> On my system, tlb_op(TLB_V7_UIS_FULL, "c8, c7, 0", zero);
>>> resolves to:
>>>
>>> c010ce18: e3170602 tst r7, #2097152 ; 0x200000
>>> c010ce1c: 1e086f17 mcrne 15, 0, r6, cr8, cr7, {0}
>>>
>>> What could be happening?
>>> Can a core "hang" on this instruction?
>>> Can a core "crash" on this instruction (meaning, an exception
>>> is raised, and the core loops inside the exception code without
>>> Linux noticing... that seems unlikely)
>>
>> try online/offline the nonboot CPUs via
>> /sys/devices/system/cpu/cpuX/online
>
> offline + online secondary core works.
>
> Note: all cores are in the same power domain, so even if all
> secondary cores are offline, the CPU block remains powered up
> (secondary cores are just held in reset, or spinning in WFI,
> depending on the firmware version).
>
> When the system is suspended, the CPU block (as well as 99%
> of the system) is powered down. Thus, upon resume, all cores
> will run the boot sequence (again).
>
> I'm guessing that something goes wrong during this second
> boot sequence. Could there be a race condition between the
> primary core and one of the secondary cores?
>
> What is different in the Linux boot sequence between cold
> boot and resume? I'm thinking that the state stored in RAM
> is in fact incompatible with what Linux expects when it resumes...
I've taken a closer look at the MCR instruction.
tlb_op(TLB_V7_UIS_FULL, "c8, c7, 0", zero);
#define tlb_op(f, regs, arg) __tlb_op(f, "p15, 0, %0, " regs, arg)
#define __tlb_op(f, insnarg, arg) \
do { \
if (always_tlb_flags & (f)) \
asm("mcr " insnarg \
: : "r" (arg) : "cc"); \
else if (possible_tlb_flags & (f)) \
asm("tst %1, %2\n\t" \
"mcrne " insnarg \
: : "r" (arg), "r" (__tlb_flag), "Ir" (f) \
: "cc"); \
} while (0)
c010dd64: e3130c12 tst r3, #4608 ; 0x1200
c010dd68: 1e081f17 mcrne 15, 0, r1, cr8, cr7, {0}
c010dd6c: e3120602 tst r2, #2097152 ; 0x200000
c010dd70: 1e081f17 mcrne 15, 0, r1, cr8, cr7, {0}
c010dd74: f57ff047 dsb un
c010dd78: f57ff06f isb sy
A8.6.92 MCR, MCR2
Move to Coprocessor from ARM core register passes the value of an ARM core register to a coprocessor.
If no coprocessor can execute the instruction, an Undefined Instruction exception is generated.
This is a generic coprocessor instruction. Some of the fields have no functionality defined by the architecture
and are free for use by the coprocessor instruction set designer. These fields are the opc1, opc2, CRn, and
CRm fields.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
if !Coproc_Accepted(cp, ThisInstr()) then
GenerateCoprocessorException();
else
Coproc_SendOneWord(R[t], cp, ThisInstr());
I.7.5 Coproc_Accepted()
This function determines, for a coprocessor and one of its coprocessor instructions:
- Whether access to the coprocessor is permitted by the CPACR and, if the Security Extensions are
implemented, the NSACR.
- If access is permitted, whether the instruction is accepted by the coprocessor. The coprocessor
architecture definition specifies which instructions it accepts and in what circumstances.
It returns TRUE if access is permitted and the coprocessor accepts the instruction, and FALSE otherwise.
boolean Coproc_Accepted(integer cp_num, bits(32) instr)
I.7.17 GenerateCoprocessorException()
This procedure generates the appropriate exception for a rejected coprocessor instruction.
In all architecture variants and profiles described in this manual, GenerateCoprocessorException() generates
an Undefined Instruction exception.
Assuming I'm hitting this, I would expect the kernel to print something
if the secondary cores trigger an exception. Am I mistaken?
mov r1, #0
mcrne 15, 0, r1, cr8, cr7, {0}
B3.12.34 CP15 c8, TLB maintenance operations
On ARMv7-A implementations, CP15 c8 operations are used for TLB maintenance functions. Figure B3-20
shows the CP15 c8 encodings.
TLBIALL*, invalidate unified TLB
* See text for more information about these mnemonics
Invalidate entire unified TLB
(When separate instruction and data TLBs are implemented,
these operations are performed on both TLBs.)
Rt data = Ignore
Invalidate entire TLB
The Invalidate entire TLB operations invalidate all unlocked entries in the TLB. The value in the register Rt
specified by the MCR instruction used to perform the operation is ignored. You do not have to write a value
to the register before issuing the MCR instruction.
Maybe this is a red herring... I don't see why the TLBIALL would
raise an exception when the system resumes... I first suspected
TrustZone shenanigans, but it looks like TLBIALL just flushes
what it can, so TrustZone seems to be a non-issue.
I'm stumped... Still looking for a clue :-(
Maybe I should instrument the exception handler...
if I only knew where it was.
Regards.
^ permalink raw reply
* [PATCH] crypto: arm/aes-neonbs - process 8 blocks in parallel if we can
From: Ard Biesheuvel @ 2016-12-29 12:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229022348.GA13402@gondor.apana.org.au>
On 29 December 2016 at 02:23, Herbert Xu <herbert@gondor.apana.org.au> wrote:
> On Wed, Dec 28, 2016 at 07:50:44PM +0000, Ard Biesheuvel wrote:
>>
>> So about this chunksize, is it ever expected to assume other values
>> than 1 (for stream ciphers) or the block size (for block ciphers)?
>> Having block size, IV size *and* chunk size fields may be confusing to
>> some already, so if the purpose of chunk size can be fulfilled by a
>> single 'stream cipher' flag, perhaps we should change that first.
>
> For users (such as algif) it's much more convenient to have a size
> rather than a flag because that's what they need to determine the
> minimum size for partial updates.
>
> For implementors you don't need to specify the chunksize at all
> unless you're a stream cipher (or some other case in future where
> the minimum partial update size is not equal to your block size).
>
OK, fair enough. So I will add a field 'walksize' to the skcipher_alg
struct in my proposal. I think the walk logic itself needs to change
very little, though: we can simply set the walk's chunksize to the
skcipher's walksize if it exceeds its chunksize (and walksize %
chunksize should be 0 in any case, and walksize should default to the
chunksize if not supplied)
If this sounds reasonable to you, I will hack something up next week.
^ permalink raw reply
* [PATCH] ARM: s3c2410_defconfig: Fix invalid values for NF_CT_PROTO_*
From: Krzysztof Kozlowski @ 2016-12-29 12:41 UTC (permalink / raw)
To: linux-arm-kernel
NF_CT_PROTO_DCCP/SCTP/UDPLITE were switched from tristate to boolean so
defconfig needs to be adjusted to silence warnings:
warning: symbol value 'm' invalid for NF_CT_PROTO_DCCP
warning: symbol value 'm' invalid for NF_CT_PROTO_SCTP
warning: symbol value 'm' invalid for NF_CT_PROTO_UDPLITE
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm/configs/s3c2410_defconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 4364040ed696..1e6c48dd7b11 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -86,9 +86,9 @@ CONFIG_IPV6_TUNNEL=m
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_DCCP=m
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
--
2.9.3
^ permalink raw reply related
* [PATCH] Revert "mmc: dw_mmc-rockchip: add runtime PM support"
From: ayaka @ 2016-12-29 12:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <04b667d9-2591-51ff-e024-047bbb6e17c3@rock-chips.com>
[ 5.849733] rk_gmac-dwmac ff290000.ethernet (unnamed net_device)
(uninitialized): Enable RX Mitigation via HW Watchdog Timer
[ 5.944512] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req
50000000Hz, actual 50000000HZ div = 0)
[ 5.958249] mmc1: new ultra high speed DDR50 SDIO card at address 0001
[ 6.294548] dwmmc_rockchip ff0f0000.dwmmc: Successfully tuned phase
to 177
[ 6.301591] mmc2: new HS200 MMC card at address 0001
[ 6.306758] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req
300000Hz, actual 300000HZ div = 0)
[ 6.316830] mmcblk2: mmc2:0001 AGND3R 14.6 GiB
[ 6.321881] mmcblk2boot0: mmc2:0001 AGND3R partition 1 4.00 MiB
[ 6.328331] mmcblk2boot1: mmc2:0001 AGND3R partition 2 4.00 MiB
[ 6.334792] mmcblk2rpmb: mmc2:0001 AGND3R partition 3 4.00 MiB
[ 6.344295] mmcblk2: p1 p2 p3 p4 p5 p6 p7
[ 6.469892] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req
200000Hz, actual 200000HZ div = 0)
[ 6.621888] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req
100000Hz, actual 93750HZ div = 1)
[ 6.917883] libphy: stmmac: probed
[ 6.921319] rk_gmac-dwmac ff290000.ethernet eth0: PHY ID 001cc915 at
0 IRQ POLL (stmmac-0:00) active
[ 6.930476] rk_gmac-dwmac ff290000.ethernet eth0: PHY ID 001cc915 at
2 IRQ POLL (stmmac-0:02)
[ 6.939757] input: gpio-keys as /devices/platform/gpio-keys/input/input0
[ 6.946937] rtc-hym8563 0-0051: no valid clock/calendar values available
[ 6.953694] rtc-hym8563 0-0051: hctosys: unable to read the hardware
clock
[ 6.961262] vcc_sd: disabling
[ 6.964275] dovdd_1v8: disabling
[ 6.967527] dvdd_1v2: disabling
[ 6.971006] vdd10_lcd: disabling
[ 6.974701] vcc18_lcd: disabling
[ 6.978467] ttyS2 - failed to request DMA
[ 7.101883] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req
400000Hz, actual 400000HZ div = 0)
[ 7.253874] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req
300000Hz, actual 300000HZ div = 0)
[ 7.405883] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req
200000Hz, actual 200000HZ div = 0)
[ 7.557885] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req
100000Hz, actual 93750HZ div = 1)
[ 8.037872] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req
400000Hz, actual 400000HZ div = 0)
[ 8.189877] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req
300000Hz, actual 300000HZ div = 0)
[ 8.341881] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req
200000Hz, actual 200000HZ div = 0)
[ 8.493884] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req
100000Hz, actual 93750HZ div = 1)
[ 8.973871] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req
400000Hz, actual 400000HZ div = 0)
[ 9.125876] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req
300000Hz, actual 300000HZ div = 0)
[ 9.277884] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req
200000Hz, actual 200000HZ div = 0)
[ 9.429882] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req
100000Hz, actual 93750HZ div = 1)
looping here
If I revert that patch, there are still lots of Bus speed messages, but
finally would enter into system.
On 12/29/2016 06:25 PM, Randy Li wrote:
>
>
> On 12/29/2016 03:25 PM, Shawn Lin wrote:
>> On 2016/12/29 15:13, Jaehoon Chung wrote:
>>> On 12/29/2016 12:02 PM, Jaehoon Chung wrote:
>>>> Hi Randy,
>>>>
>>>> On 12/29/2016 12:34 AM, Randy Li wrote:
>>>>> This reverts commit f90142683f04bcb0729bf0df67a5e29562b725b9.
>>>>> It is reported that making RK3288 can't boot from eMMC/MMC.
>>>>
>>>> Could you explain in more detail?
>>>> As you mentioned, this patch is making that RK3288 can't boot..then
>>>> why?
>>>> Good way should be that finds the main reason and fixes it.
>>>> Not just revert.
>>>
>>> To Shawn,
>>>
>>> Could you check this? If you have rk3288..
>>> If it's not working fine, it needs to revert this patch until finding
>>> the problem.
>>>
>>
>> Hrmm.....as that patchset was tested based on rk3288 and rk3368, so I
>> need to know which board Randy are using now and could you share some
> Sorry, XZY has asked me about this in the morning and I answer him
> that I would give a feedback at home, so I didn't notice this mail.
> The board is Firefly reload. but the reporter told me that Firefly
> release also have the same problem.
>> log?
>>
>> I will have a look at it.
>>
>>
>>> Best Regards,
>>> Jaehoon Chung
>>>
>>>>
>>>> Best Regards,
>>>> Jaehoon Chung
>>>>
>>>>>
>>>>> Signed-off-by: Randy Li <ayaka@soulik.info>
>>>>> ---
>>>>> drivers/mmc/host/dw_mmc-rockchip.c | 41
>>>>> +++-----------------------------------
>>>>> 1 file changed, 3 insertions(+), 38 deletions(-)
>>>>>
>>>>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
>>>>> b/drivers/mmc/host/dw_mmc-rockchip.c
>>>>> index 9a46e46..3189234 100644
>>>>> --- a/drivers/mmc/host/dw_mmc-rockchip.c
>>>>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
>>>>> @@ -14,7 +14,6 @@
>>>>> #include <linux/mmc/dw_mmc.h>
>>>>> #include <linux/of_address.h>
>>>>> #include <linux/mmc/slot-gpio.h>
>>>>> -#include <linux/pm_runtime.h>
>>>>> #include <linux/slab.h>
>>>>>
>>>>> #include "dw_mmc.h"
>>>>> @@ -327,7 +326,6 @@ static int dw_mci_rockchip_probe(struct
>>>>> platform_device *pdev)
>>>>> {
>>>>> const struct dw_mci_drv_data *drv_data;
>>>>> const struct of_device_id *match;
>>>>> - int ret;
>>>>>
>>>>> if (!pdev->dev.of_node)
>>>>> return -ENODEV;
>>>>> @@ -335,49 +333,16 @@ static int dw_mci_rockchip_probe(struct
>>>>> platform_device *pdev)
>>>>> match = of_match_node(dw_mci_rockchip_match, pdev->dev.of_node);
>>>>> drv_data = match->data;
>>>>>
>>>>> - pm_runtime_get_noresume(&pdev->dev);
>>>>> - pm_runtime_set_active(&pdev->dev);
>>>>> - pm_runtime_enable(&pdev->dev);
>>>>> - pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
>>>>> - pm_runtime_use_autosuspend(&pdev->dev);
>>>>> -
>>>>> - ret = dw_mci_pltfm_register(pdev, drv_data);
>>>>> - if (ret) {
>>>>> - pm_runtime_disable(&pdev->dev);
>>>>> - pm_runtime_set_suspended(&pdev->dev);
>>>>> - pm_runtime_put_noidle(&pdev->dev);
>>>>> - return ret;
>>>>> - }
>>>>> -
>>>>> - pm_runtime_put_autosuspend(&pdev->dev);
>>>>> -
>>>>> - return 0;
>>>>> + return dw_mci_pltfm_register(pdev, drv_data);
>>>>> }
>>>>>
>>>>> -static int dw_mci_rockchip_remove(struct platform_device *pdev)
>>>>> -{
>>>>> - pm_runtime_get_sync(&pdev->dev);
>>>>> - pm_runtime_disable(&pdev->dev);
>>>>> - pm_runtime_put_noidle(&pdev->dev);
>>>>> -
>>>>> - return dw_mci_pltfm_remove(pdev);
>>>>> -}
>>>>> -
>>>>> -static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
>>>>> - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
>>>>> - pm_runtime_force_resume)
>>>>> - SET_RUNTIME_PM_OPS(dw_mci_runtime_suspend,
>>>>> - dw_mci_runtime_resume,
>>>>> - NULL)
>>>>> -};
>>>>> -
>>>>> static struct platform_driver dw_mci_rockchip_pltfm_driver = {
>>>>> .probe = dw_mci_rockchip_probe,
>>>>> - .remove = dw_mci_rockchip_remove,
>>>>> + .remove = dw_mci_pltfm_remove,
>>>>> .driver = {
>>>>> .name = "dwmmc_rockchip",
>>>>> .of_match_table = dw_mci_rockchip_match,
>>>>> - .pm = &dw_mci_rockchip_dev_pm_ops,
>>>>> + .pm = &dw_mci_pltfm_pmops,
>>>>> },
>>>>> };
>>>>>
>>>>>
>>>>
>>>> --
>>>> To unsubscribe from this list: send the line "unsubscribe
>>>> linux-mmc" in
>>>> the body of a message to majordomo at vger.kernel.org
>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>>
>>>> .
>>>>
>>>
>>>
>>>
>>>
>>
>>
>
^ permalink raw reply
* [PATCH 0/2] ARM: add Exynos4412 Prime SoC support
From: Bartlomiej Zolnierkiewicz @ 2016-12-29 13:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CGME20161229133722epcas5p1e138af585fea93a42962f3a7414a081f@epcas5p1.samsung.com>
Hi,
This patchset adds support for Exynos4412 Prime SoC (it supports
additional 1704MHz & 1600MHz CPU OPPs and 1500MHz CPU OPP is just
a regular non-turbo OPP on this SoC).
ODROID-X2/U2/U3 boards use Exynos4412 Prime SoC version so their
board files are updated accordingly.
This patchset brings 21% CPU performance increase on affected
boards (as tested on ODROID-U3 board).
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
Bartlomiej Zolnierkiewicz (2):
clk: samsung: exynos4412: add cpu clock configuration data for
Exynos4412 Prime
ARM: dts: Add CPU OPPs for Exynos4412 Prime
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 +--
arch/arm/boot/dts/exynos4412-odroidu3.dts | 5 +--
arch/arm/boot/dts/exynos4412-odroidx2.dts | 1 +
arch/arm/boot/dts/exynos4412-prime.dtsi | 41 +++++++++++++++++++++++++
arch/arm/boot/dts/exynos4412.dtsi | 2 +-
drivers/clk/samsung/clk-exynos4.c | 4 +++
6 files changed, 52 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/boot/dts/exynos4412-prime.dtsi
--
1.9.1
^ permalink raw reply
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