* [PATCH 2/2] arm64: dts: updated sata node on ls1046a dts
From: Shawn Guo @ 2016-12-30 2:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479369560-9188-2-git-send-email-yuantian.tang@nxp.com>
On Thu, Nov 17, 2016 at 03:59:20PM +0800, yuantian.tang at nxp.com wrote:
> From: Tang Yuantian <Yuantian.Tang@nxp.com>
>
> On ls1046a soc, sata ecc should be disabled. So added sata ecc
disabled or enabled?
Shawn
> register address so that driver can get this information.
>
> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index 38806ca..88aaaf1 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -507,7 +507,9 @@
>
> sata: sata at 3200000 {
> compatible = "fsl,ls1046a-ahci";
> - reg = <0x0 0x3200000 0x0 0x10000>;
> + reg = <0x0 0x3200000 0x0 0x10000>,
> + <0x0 0x20140520 0x0 0x4>;
> + reg-names = "ahci", "sata-ecc";
> interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clockgen 4 1>;
> };
> --
> 2.1.0.27.g96db324
>
^ permalink raw reply
* [PATCH v2 2/5] arm64: Work around Falkor erratum 1003
From: kbuild test robot @ 2016-12-30 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161229224335.13531-2-cov@codeaurora.org>
Hi Shanker,
[auto build test ERROR on next-20161224]
[also build test ERROR on v4.10-rc1]
[cannot apply to arm64/for-next/core v4.9-rc8 v4.9-rc7 v4.9-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Christopher-Covington/arm64-Define-Falkor-v1-CPU/20161230-081412
config: arm64-allnoconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64
All errors (new ones prefixed by >>):
arch/arm64/mm/context.c: In function 'flush_context':
>> arch/arm64/mm/context.c:93:13: error: 'CONFIG_QCOM_FALKOR_E1003_RESERVED_ASID' undeclared (first use in this function)
__set_bit(CONFIG_QCOM_FALKOR_E1003_RESERVED_ASID, asid_map);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/arm64/mm/context.c:93:13: note: each undeclared identifier is reported only once for each function it appears in
arch/arm64/mm/context.c: In function 'asids_init':
arch/arm64/mm/context.c:255:13: error: 'CONFIG_QCOM_FALKOR_E1003_RESERVED_ASID' undeclared (first use in this function)
__set_bit(CONFIG_QCOM_FALKOR_E1003_RESERVED_ASID, asid_map);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +/CONFIG_QCOM_FALKOR_E1003_RESERVED_ASID +93 arch/arm64/mm/context.c
87 /* Update the list of reserved ASIDs and the ASID bitmap. */
88 bitmap_clear(asid_map, 0, NUM_USER_ASIDS);
89
90 /* Reserve ASID for Falkor erratum 1003 */
91 if (IS_ENABLED(CONFIG_QCOM_FALKOR_ERRATUM_1003) &&
92 cpus_have_cap(ARM64_WORKAROUND_QCOM_FALKOR_E1003))
> 93 __set_bit(CONFIG_QCOM_FALKOR_E1003_RESERVED_ASID, asid_map);
94
95 /*
96 * Ensure the generation bump is observed before we xchg the
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
-------------- next part --------------
A non-text attachment was scrubbed...
Name: .config.gz
Type: application/gzip
Size: 6340 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20161230/abb6797a/attachment.gz>
^ permalink raw reply
* [PATCH] Revert "mmc: dw_mmc-rockchip: add runtime PM support"
From: Randy Li @ 2016-12-30 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20afb1da-9e45-f515-01bf-2f5365d20d61@samsung.com>
On 12/30/2016 10:35 AM, Jaehoon Chung wrote:
> On 12/30/2016 12:07 AM, ayaka wrote:
>>
>>
>> On 12/29/2016 10:04 PM, Jaehoon Chung wrote:
>>> Hi,
>>>
>>> On 12/29/2016 09:55 PM, ayaka wrote:
>>>> [ 5.849733] rk_gmac-dwmac ff290000.ethernet (unnamed net_device) (uninitialized): Enable RX Mitigation via HW Watchdog Timer
>>>> [ 5.944512] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
>>>> [ 5.958249] mmc1: new ultra high speed DDR50 SDIO card at address 0001
>>>> [ 6.294548] dwmmc_rockchip ff0f0000.dwmmc: Successfully tuned phase to 177
>>>> [ 6.301591] mmc2: new HS200 MMC card at address 0001
>>>> [ 6.306758] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0)
>>>> [ 6.316830] mmcblk2: mmc2:0001 AGND3R 14.6 GiB
>>>> [ 6.321881] mmcblk2boot0: mmc2:0001 AGND3R partition 1 4.00 MiB
>>>> [ 6.328331] mmcblk2boot1: mmc2:0001 AGND3R partition 2 4.00 MiB
>>>> [ 6.334792] mmcblk2rpmb: mmc2:0001 AGND3R partition 3 4.00 MiB
>>>> [ 6.344295] mmcblk2: p1 p2 p3 p4 p5 p6 p7
>>>> [ 6.469892] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0)
>>>> [ 6.621888] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req 100000Hz, actual 93750HZ div = 1)
>>>> [ 6.917883] libphy: stmmac: probed
>>>> [ 6.921319] rk_gmac-dwmac ff290000.ethernet eth0: PHY ID 001cc915 at 0 IRQ POLL (stmmac-0:00) active
>>>> [ 6.930476] rk_gmac-dwmac ff290000.ethernet eth0: PHY ID 001cc915 at 2 IRQ POLL (stmmac-0:02)
>>>> [ 6.939757] input: gpio-keys as /devices/platform/gpio-keys/input/input0
>>>> [ 6.946937] rtc-hym8563 0-0051: no valid clock/calendar values available
>>>> [ 6.953694] rtc-hym8563 0-0051: hctosys: unable to read the hardware clock
>>>> [ 6.961262] vcc_sd: disabling
>>>> [ 6.964275] dovdd_1v8: disabling
>>>> [ 6.967527] dvdd_1v2: disabling
>>>> [ 6.971006] vdd10_lcd: disabling
>>>> [ 6.974701] vcc18_lcd: disabling
>>>> [ 6.978467] ttyS2 - failed to request DMA
>>>> [ 7.101883] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
>>>> [ 7.253874] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0)
>>>> [ 7.405883] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0)
>>>> [ 7.557885] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req 100000Hz, actual 93750HZ div = 1)
>>>> [ 8.037872] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
>>>> [ 8.189877] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0)
>>>> [ 8.341881] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0)
>>>> [ 8.493884] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req 100000Hz, actual 93750HZ div = 1)
>>>> [ 8.973871] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
>>>> [ 9.125876] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0)
>>>> [ 9.277884] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0)
>>>> [ 9.429882] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req 100000Hz, actual 93750HZ div = 1)
>>>>
>>>> looping here
>>>>
>>>> If I revert that patch, there are still lots of Bus speed messages, but finally would enter into system.
>>>>
>>> Plz..Don't put the comment on the top.
>>>
>>> Which kernel did you use?
>> Add linux-next specific files for 20161224
>
> mmc0 is what card? Is it polling for detecting card?
> (It seems the SD-card..right?)
Yes, but the Firefly release won't show that, just stop at "ttyS2 -
failed to request DMA". I check both the firefly reload and firefly
release, they both have a cd line for them, so it won't be poll mode.
> Those logs should be polled for detecting mmc0 card..Hmm..I sent the patch for disabling log message when polling.
> If this log is displayed, then my patch might be some wrong.. :(
>
> Best Regards,
> Jaehoon Chung
>
>>>
>>>>>>>
>>>>>>>
>>>>>>>
>>>>>>
>
> [snip]
>
>>
>>
>>
>>
>
>
--
Randy Li
The third produce department
===========================================================================
This email message, including any attachments, is for the sole
use of the intended recipient(s) and may contain confidential and
privileged information. Any unauthorized review, use, disclosure or
distribution is prohibited. If you are not the intended recipient, please
contact the sender by reply e-mail and destroy all copies of the original
message. [Fuzhou Rockchip Electronics, INC. China mainland]
===========================================================================
^ permalink raw reply
* [PATCH 06/12] usb: dwc3: omap: Replace the extcon API
From: Chanwoo Choi @ 2016-12-30 2:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87fum6vh1p.fsf@linux.intel.com>
Hi Felipe,
On 2016? 12? 02? 18:03, Felipe Balbi wrote:
>
> Hi,
>
> Chanwoo Choi <cw00.choi@samsung.com> writes:
>> Hi Felipe,
>>
>> On 2016? 11? 30? 19:36, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Chanwoo Choi <cw00.choi@samsung.com> writes:
>>>> This patch uses the resource-managed extcon API for extcon_register_notifier()
>>>> and replaces the deprecated extcon API as following:
>>>> - extcon_get_cable_state_() -> extcon_get_state()
>>>>
>>>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>>>
>>> Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
>>>
>>
>> Thanks for your review.
>>
>> Each patch has no any dependency among patches.
>> So, If possible, could you pick the patch6/8/9/10/11/12 on your tree?
>
> my tree is closed for v4.10, I can pick it up for v4.11
Could you please pick up these patches(patch6/8/9/10/11/12)?
These patches were already reviewed by you.
--
Regards,
Chanwoo Choi
^ permalink raw reply
* [PATCH] Revert "mmc: dw_mmc-rockchip: add runtime PM support"
From: Jaehoon Chung @ 2016-12-30 2:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <8f8c66f1-82d6-5151-ff64-ef62596aa10d@rock-chips.com>
On 12/30/2016 11:44 AM, Randy Li wrote:
>
>
> On 12/30/2016 10:35 AM, Jaehoon Chung wrote:
>> On 12/30/2016 12:07 AM, ayaka wrote:
>>>
>>>
>>> On 12/29/2016 10:04 PM, Jaehoon Chung wrote:
>>>> Hi,
>>>>
>>>> On 12/29/2016 09:55 PM, ayaka wrote:
>>>>> [ 5.849733] rk_gmac-dwmac ff290000.ethernet (unnamed net_device) (uninitialized): Enable RX Mitigation via HW Watchdog Timer
>>>>> [ 5.944512] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
>>>>> [ 5.958249] mmc1: new ultra high speed DDR50 SDIO card at address 0001
>>>>> [ 6.294548] dwmmc_rockchip ff0f0000.dwmmc: Successfully tuned phase to 177
>>>>> [ 6.301591] mmc2: new HS200 MMC card at address 0001
>>>>> [ 6.306758] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0)
>>>>> [ 6.316830] mmcblk2: mmc2:0001 AGND3R 14.6 GiB
>>>>> [ 6.321881] mmcblk2boot0: mmc2:0001 AGND3R partition 1 4.00 MiB
>>>>> [ 6.328331] mmcblk2boot1: mmc2:0001 AGND3R partition 2 4.00 MiB
>>>>> [ 6.334792] mmcblk2rpmb: mmc2:0001 AGND3R partition 3 4.00 MiB
>>>>> [ 6.344295] mmcblk2: p1 p2 p3 p4 p5 p6 p7
>>>>> [ 6.469892] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0)
>>>>> [ 6.621888] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req 100000Hz, actual 93750HZ div = 1)
>>>>> [ 6.917883] libphy: stmmac: probed
>>>>> [ 6.921319] rk_gmac-dwmac ff290000.ethernet eth0: PHY ID 001cc915 at 0 IRQ POLL (stmmac-0:00) active
>>>>> [ 6.930476] rk_gmac-dwmac ff290000.ethernet eth0: PHY ID 001cc915 at 2 IRQ POLL (stmmac-0:02)
>>>>> [ 6.939757] input: gpio-keys as /devices/platform/gpio-keys/input/input0
>>>>> [ 6.946937] rtc-hym8563 0-0051: no valid clock/calendar values available
>>>>> [ 6.953694] rtc-hym8563 0-0051: hctosys: unable to read the hardware clock
>>>>> [ 6.961262] vcc_sd: disabling
>>>>> [ 6.964275] dovdd_1v8: disabling
>>>>> [ 6.967527] dvdd_1v2: disabling
>>>>> [ 6.971006] vdd10_lcd: disabling
>>>>> [ 6.974701] vcc18_lcd: disabling
>>>>> [ 6.978467] ttyS2 - failed to request DMA
>>>>> [ 7.101883] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
>>>>> [ 7.253874] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0)
>>>>> [ 7.405883] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0)
>>>>> [ 7.557885] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req 100000Hz, actual 93750HZ div = 1)
>>>>> [ 8.037872] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
>>>>> [ 8.189877] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0)
>>>>> [ 8.341881] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0)
>>>>> [ 8.493884] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req 100000Hz, actual 93750HZ div = 1)
>>>>> [ 8.973871] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
>>>>> [ 9.125876] mmc_host mmc0: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0)
>>>>> [ 9.277884] mmc_host mmc0: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0)
>>>>> [ 9.429882] mmc_host mmc0: Bus speed (slot 0) = 187500Hz (slot req 100000Hz, actual 93750HZ div = 1)
>>>>>
>>>>> looping here
>>>>>
>>>>> If I revert that patch, there are still lots of Bus speed messages, but finally would enter into system.
>>>>>
>>>> Plz..Don't put the comment on the top.
>>>>
>>>> Which kernel did you use?
>>> Add linux-next specific files for 20161224
>>
>> mmc0 is what card? Is it polling for detecting card?
>> (It seems the SD-card..right?)
> Yes, but the Firefly release won't show that, just stop at "ttyS2 - failed to request DMA". I check both the firefly reload and firefly release, they both have a cd line for them, so it won't be poll mode.
I don't have Rockchip board, so I hope that Shawn will check it.
But i will check the displayed the log message.
Best Regards,
Jaehoon Chung
>> Those logs should be polled for detecting mmc0 card..Hmm..I sent the patch for disabling log message when polling.
>> If this log is displayed, then my patch might be some wrong.. :(
>>
>> Best Regards,
>> Jaehoon Chung
>>
>>>>
>>>>>>>>
>>>>>>>>
>>>>>>>>
>>>>>>>
>>
>> [snip]
>>
>>>
>>>
>>>
>>>
>>
>>
>
^ permalink raw reply
* [PATCH] ARM: dts: imx6q-cm-fx6: enable S/PDIF support
From: Shawn Guo @ 2016-12-30 2:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5da612fbab7a4064993790702550fa77@rwthex-s1-b.rwth-ad.de>
On Wed, Nov 23, 2016 at 01:07:57AM +0100, christopher.spinrath at rwth-aachen.de wrote:
> From: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
>
> Enable the S/PDIF transceiver present on the cm-fx6 module.
>
> Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Applied, thanks.
^ permalink raw reply
* [PATCH v2] ARM: dts: imx6qdl-nitrogen6x: remove duplicate iomux entry
From: Shawn Guo @ 2016-12-30 3:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161124234247.18397-1-gary.bisson@boundarydevices.com>
On Fri, Nov 25, 2016 at 12:42:47AM +0100, Gary Bisson wrote:
> The NANDF_CS2 pad is also part of the wlan-vmmcgrp iomux group.
>
> Removing is from the usdhc2grp group avoids the following error:
> imx6q-pinctrl 20e0000.iomuxc: pin MX6Q_PAD_NANDF_CS2 already requested
> by regulators:regulator at 4; cannot claim for 2194000.usdhc
> imx6q-pinctrl 20e0000.iomuxc: pin-187 (2194000.usdhc) status -22
> imx6q-pinctrl 20e0000.iomuxc: could not request pin 187
> (MX6Q_PAD_NANDF_CS2) from group usdhc2grp on device 20e0000.iomuxc
>
> Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Applied, thanks.
^ permalink raw reply
* [PATCH v2 0/2] phy: Replace the deprecated extcon API
From: Chanwoo Choi @ 2016-12-30 4:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CGME20161230041136epcas5p4e0229714cd00961e5d3cb5ef9923b7aa@epcas5p4.samsung.com>
This patches just replace the deprecated extcon API without any change
of extcon operation and use the resource-managed function for
extcon_register_notifier().
The new extcon API instead of deprecated API.
- extcon_set_cable_state_() -> extcon_set_state_sync();
- extcon_get_cable_state_() -> extcon_get_state();
Changes from v1:
- Rebase these patches based on v4.10-rc1.
- Drop the usb/power-supply/chipidea patches.
Chanwoo Choi (2):
phy: rcar-gen3-usb2: Replace the deprecated extcon API
phy: sun4i-usb: Replace the deprecated extcon API
drivers/phy/phy-rcar-gen3-usb2.c | 8 ++++----
drivers/phy/phy-sun4i-usb.c | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
--
1.9.1
^ permalink raw reply
* [PATCH v2 1/2] phy: rcar-gen3-usb2: Replace the deprecated extcon API
From: Chanwoo Choi @ 2016-12-30 4:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483071089-8362-1-git-send-email-cw00.choi@samsung.com>
This patch replaces the deprecated extcon API as following:
- extcon_set_cable_state_() -> extcon_set_state_sync()
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
drivers/phy/phy-rcar-gen3-usb2.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/phy-rcar-gen3-usb2.c b/drivers/phy/phy-rcar-gen3-usb2.c
index c63da1b955c1..54a83675f0a8 100644
--- a/drivers/phy/phy-rcar-gen3-usb2.c
+++ b/drivers/phy/phy-rcar-gen3-usb2.c
@@ -94,11 +94,11 @@ static void rcar_gen3_phy_usb2_work(struct work_struct *work)
work);
if (ch->extcon_host) {
- extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, true);
- extcon_set_cable_state_(ch->extcon, EXTCON_USB, false);
+ extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
+ extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
} else {
- extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, false);
- extcon_set_cable_state_(ch->extcon, EXTCON_USB, true);
+ extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
+ extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
}
}
--
1.9.1
^ permalink raw reply related
* [PATCH v2 2/2] phy: sun4i-usb: Replace the deprecated extcon API
From: Chanwoo Choi @ 2016-12-30 4:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483071089-8362-1-git-send-email-cw00.choi@samsung.com>
This patch replaces the deprecated extcon API as following:
- extcon_set_cable_state_() -> extcon_set_state_sync()
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
drivers/phy/phy-sun4i-usb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c
index bf28a0fdd569..eae171e18043 100644
--- a/drivers/phy/phy-sun4i-usb.c
+++ b/drivers/phy/phy-sun4i-usb.c
@@ -534,7 +534,7 @@ static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
mutex_unlock(&phy0->mutex);
if (id_notify) {
- extcon_set_cable_state_(data->extcon, EXTCON_USB_HOST,
+ extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
!id_det);
/* When leaving host mode force end the session here */
if (force_session_end && id_det == 1) {
@@ -547,7 +547,7 @@ static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
}
if (vbus_notify)
- extcon_set_cable_state_(data->extcon, EXTCON_USB, vbus_det);
+ extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
if (sun4i_usb_phy0_poll(data))
queue_delayed_work(system_wq, &data->detect, POLL_TIME);
--
1.9.1
^ permalink raw reply related
* [PATCH v2 0/4] Use Exynos macros for pinctrl settings
From: Andi Shyti @ 2016-12-30 4:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CGME20161230041426epcas1p1a8564e969a8f6a1746a3af9b26aac99f@epcas1p1.samsung.com>
Hi,
This patchset fixes the width and offsets of the PINCFG_TYPE_DRV
bitfields for the Exynos5433 SoC.
Moreover it refactors the pinctrl definitions by using the
dt-bindings/pinctrl/samsung.h definitions introduced by Krzysztof
in 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
values used for configuration").
It would be nice to see in the future all the PIN related macros
in the same file, as they more or less do the same thing.
Changelog v1 -> v2
==================
V1: https://lkml.org/lkml/2016/12/29/40
- Added Chanwoo's patch for fixing the slew rate register width.
- Patch 4 is squashed with the patch3 and 4 of v1.
Thanks,
Andi
Andi Shyti (3):
pinctrl: dt-bindings: samsung: add drive strength macros for
Exynos5433
ARM64: dts: exynos5433: use macros for pinctrl configuration on
Exynos5433
ARM64: dts: TM2: comply to the samsung pinctrl naming convention
Chanwoo Choi (1):
pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for
Exynos5433
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 373 ++++++++++-----------
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 254 +++++++-------
drivers/pinctrl/samsung/pinctrl-exynos.c | 91 ++---
drivers/pinctrl/samsung/pinctrl-exynos.h | 31 ++
include/dt-bindings/pinctrl/samsung.h | 14 +
5 files changed, 404 insertions(+), 359 deletions(-)
--
2.11.0
^ permalink raw reply
* [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433
From: Andi Shyti @ 2016-12-30 4:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161230041421.24448-1-andi.shyti@samsung.com>
From: Chanwoo Choi <cw00.choi@samsung.com>
This patch fixes the wrong width of PINCFG_TYPE_DRV bitfields for Exynos5433
because PINCFG_TYPE_DRV of Exynos5433 has 4bit fields in the *_DRV
registers. Usually, other Exynos have 2bit field for PINCFG_TYPE_DRV.
Fixes: 3c5ecc9ed353 ("pinctrl: exynos: Add support for Exynos5433")
Cc: stable at vger.kernel.org
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
drivers/pinctrl/samsung/pinctrl-exynos.c | 91 ++++++++++++++++++--------------
drivers/pinctrl/samsung/pinctrl-exynos.h | 31 +++++++++++
2 files changed, 82 insertions(+), 40 deletions(-)
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 12f7d1eb65bc..07409fde02b2 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -56,6 +56,17 @@ static const struct samsung_pin_bank_type bank_type_alive = {
.reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
};
+/* Exynos5433 has the 4bit widths for PINCFG_TYPE_DRV bitfields. */
+static const struct samsung_pin_bank_type exynos5433_bank_type_off = {
+ .fld_width = { 4, 1, 2, 4, 2, 2, },
+ .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, },
+};
+
+static const struct samsung_pin_bank_type exynos5433_bank_type_alive = {
+ .fld_width = { 4, 1, 2, 4, },
+ .reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
+};
+
static void exynos_irq_mask(struct irq_data *irqd)
{
struct irq_chip *chip = irq_data_get_irq_chip(irqd);
@@ -1335,82 +1346,82 @@ const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
/* pin banks of exynos5433 pin-controller - ALIVE */
static const struct samsung_pin_bank_data exynos5433_pin_banks0[] = {
- EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
- EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
- EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
- EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
- EXYNOS_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
- EXYNOS_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
- EXYNOS_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
- EXYNOS_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
- EXYNOS_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
+ EXYNOS5433_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
+ EXYNOS5433_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
+ EXYNOS5433_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
+ EXYNOS5433_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
+ EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
+ EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
+ EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
+ EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
+ EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
};
/* pin banks of exynos5433 pin-controller - AUD */
static const struct samsung_pin_bank_data exynos5433_pin_banks1[] = {
- EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
- EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
+ EXYNOS5433_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
+ EXYNOS5433_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
};
/* pin banks of exynos5433 pin-controller - CPIF */
static const struct samsung_pin_bank_data exynos5433_pin_banks2[] = {
- EXYNOS_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00),
+ EXYNOS5433_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00),
};
/* pin banks of exynos5433 pin-controller - eSE */
static const struct samsung_pin_bank_data exynos5433_pin_banks3[] = {
- EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00),
+ EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00),
};
/* pin banks of exynos5433 pin-controller - FINGER */
static const struct samsung_pin_bank_data exynos5433_pin_banks4[] = {
- EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00),
+ EXYNOS5433_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00),
};
/* pin banks of exynos5433 pin-controller - FSYS */
static const struct samsung_pin_bank_data exynos5433_pin_banks5[] = {
- EXYNOS_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00),
- EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04),
- EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08),
- EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c),
- EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10),
- EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14),
+ EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00),
+ EXYNOS5433_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04),
+ EXYNOS5433_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08),
+ EXYNOS5433_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c),
+ EXYNOS5433_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10),
+ EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14),
};
/* pin banks of exynos5433 pin-controller - IMEM */
static const struct samsung_pin_bank_data exynos5433_pin_banks6[] = {
- EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
+ EXYNOS5433_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
};
/* pin banks of exynos5433 pin-controller - NFC */
static const struct samsung_pin_bank_data exynos5433_pin_banks7[] = {
- EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
+ EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
};
/* pin banks of exynos5433 pin-controller - PERIC */
static const struct samsung_pin_bank_data exynos5433_pin_banks8[] = {
- EXYNOS_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00),
- EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04),
- EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08),
- EXYNOS_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c),
- EXYNOS_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10),
- EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14),
- EXYNOS_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18),
- EXYNOS_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c),
- EXYNOS_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20),
- EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24),
- EXYNOS_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28),
- EXYNOS_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c),
- EXYNOS_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30),
- EXYNOS_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34),
- EXYNOS_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38),
- EXYNOS_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c),
- EXYNOS_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40),
+ EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00),
+ EXYNOS5433_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04),
+ EXYNOS5433_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08),
+ EXYNOS5433_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c),
+ EXYNOS5433_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10),
+ EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14),
+ EXYNOS5433_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18),
+ EXYNOS5433_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c),
+ EXYNOS5433_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20),
+ EXYNOS5433_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24),
+ EXYNOS5433_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28),
+ EXYNOS5433_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c),
+ EXYNOS5433_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30),
+ EXYNOS5433_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34),
+ EXYNOS5433_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38),
+ EXYNOS5433_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c),
+ EXYNOS5433_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40),
};
/* pin banks of exynos5433 pin-controller - TOUCH */
static const struct samsung_pin_bank_data exynos5433_pin_banks9[] = {
- EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
+ EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
};
/*
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h b/drivers/pinctrl/samsung/pinctrl-exynos.h
index 5821525a2c84..a473092fb8d2 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.h
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.h
@@ -90,6 +90,37 @@
.pctl_res_idx = pctl_idx, \
} \
+#define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) \
+ { \
+ .type = &exynos5433_bank_type_off, \
+ .pctl_offset = reg, \
+ .nr_pins = pins, \
+ .eint_type = EINT_TYPE_GPIO, \
+ .eint_offset = offs, \
+ .name = id \
+ }
+
+#define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) \
+ { \
+ .type = &exynos5433_bank_type_alive, \
+ .pctl_offset = reg, \
+ .nr_pins = pins, \
+ .eint_type = EINT_TYPE_WKUP, \
+ .eint_offset = offs, \
+ .name = id \
+ }
+
+#define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \
+ { \
+ .type = &exynos5433_bank_type_alive, \
+ .pctl_offset = reg, \
+ .nr_pins = pins, \
+ .eint_type = EINT_TYPE_WKUP, \
+ .eint_offset = offs, \
+ .name = id, \
+ .pctl_res_idx = pctl_idx, \
+ } \
+
/**
* struct exynos_weint_data: irq specific data for all the wakeup interrupts
* generated by the external wakeup interrupt controller.
--
2.11.0
^ permalink raw reply related
* [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Andi Shyti @ 2016-12-30 4:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161230041421.24448-1-andi.shyti@samsung.com>
Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
values used for configuration") has added a header file for defining the
pinctrl values in order to avoid hardcoded settings in the Exynos
DTS related files.
Extend samsung.h to the Exynos5433 for drive strength values
which are strictly related to the particular SoC and may defer
from others.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
include/dt-bindings/pinctrl/samsung.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
index 6276eb785e2b..e0ebb20ffdd3 100644
--- a/include/dt-bindings/pinctrl/samsung.h
+++ b/include/dt-bindings/pinctrl/samsung.h
@@ -45,6 +45,20 @@
#define EXYNOS5420_PIN_DRV_LV3 2
#define EXYNOS5420_PIN_DRV_LV4 3
+/* Drive strengths for Exynos5433 */
+#define EXYNOS5433_PIN_DRV_FAST_SR1 0
+#define EXYNOS5433_PIN_DRV_FAST_SR2 1
+#define EXYNOS5433_PIN_DRV_FAST_SR3 2
+#define EXYNOS5433_PIN_DRV_FAST_SR4 3
+#define EXYNOS5433_PIN_DRV_FAST_SR5 4
+#define EXYNOS5433_PIN_DRV_FAST_SR6 5
+#define EXYNOS5433_PIN_DRV_SLOW_SR1 8
+#define EXYNOS5433_PIN_DRV_SLOW_SR2 9
+#define EXYNOS5433_PIN_DRV_SLOW_SR3 0xa
+#define EXYNOS5433_PIN_DRV_SLOW_SR4 0xb
+#define EXYNOS5433_PIN_DRV_SLOW_SR5 0xc
+#define EXYNOS5433_PIN_DRV_SLOW_SR6 0xf
+
#define EXYNOS_PIN_FUNC_INPUT 0
#define EXYNOS_PIN_FUNC_OUTPUT 1
#define EXYNOS_PIN_FUNC_2 2
--
2.11.0
^ permalink raw reply related
* [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
From: Andi Shyti @ 2016-12-30 4:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161230041421.24448-1-andi.shyti@samsung.com>
Use the macros defined in include/dt-bindings/pinctrl/samsung.h
instead of hardcoded values.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 348 +++++++++++----------
1 file changed, 175 insertions(+), 173 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index ad71247b074f..2af854b11644 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -12,6 +12,8 @@
* published by the Free Software Foundation.
*/
+#include <dt-bindings/pinctrl/samsung.h>
+
#define PIN_PULL_NONE 0
#define PIN_PULL_DOWN 1
#define PIN_PULL_UP 3
@@ -145,23 +147,23 @@
i2s0_bus: i2s0-bus {
samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
"gpz0-4", "gpz0-5", "gpz0-6";
- samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
pcm0_bus: pcm0-bus {
samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3";
- samsung,pin-function = <3>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
uart_aud_bus: uart-aud-bus {
samsung,pins = "gpz1-3", "gpz1-2", "gpz1-1", "gpz1-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
};
@@ -196,16 +198,16 @@
spi2_bus: spi2-bus {
samsung,pins = "gpd5-0", "gpd5-2", "gpd5-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
hs_i2c6_bus: hs-i2c6-bus {
samsung,pins = "gpd5-3", "gpd5-2";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
};
@@ -260,141 +262,141 @@
sd0_clk: sd0-clk {
samsung,pins = "gpr0-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd0_cmd: sd0-cmd {
samsung,pins = "gpr0-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd0_rdqs: sd0-rdqs {
samsung,pins = "gpr0-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd0_qrdy: sd0-qrdy {
samsung,pins = "gpr0-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd0_bus1: sd0-bus-width1 {
samsung,pins = "gpr1-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd0_bus4: sd0-bus-width4 {
samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd0_bus8: sd0-bus-width8 {
samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpr2-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd1_cmd: sd1-cmd {
samsung,pins = "gpr2-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd1_bus1: sd1-bus-width1 {
samsung,pins = "gpr3-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd1_bus4: sd1-bus-width4 {
samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd1_bus8: sd1-bus-width8 {
samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
pcie_bus: pcie_bus {
samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
};
sd2_clk: sd2-clk {
samsung,pins = "gpr4-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd2_cmd: sd2-cmd {
samsung,pins = "gpr4-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd2_cd: sd2-cd {
samsung,pins = "gpr4-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd2_bus1: sd2-bus-width1 {
samsung,pins = "gpr4-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd2_bus4: sd2-bus-width4 {
samsung,pins = "gpr4-4", "gpr4-5", "gpr4-6";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <3>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
};
sd2_clk_output: sd2-clk-output {
samsung,pins = "gpr4-0";
- samsung,pin-function = <1>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <2>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR3>;
};
sd2_cmd_output: sd2-cmd-output {
samsung,pins = "gpr4-1";
- samsung,pin-function = <1>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <2>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR3>;
};
};
@@ -419,9 +421,9 @@
hs_i2c4_bus: hs-i2c4-bus {
samsung,pins = "gpj0-1", "gpj0-0";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
};
@@ -564,225 +566,225 @@
hs_i2c8_bus: hs-i2c8-bus {
samsung,pins = "gpb0-1", "gpb0-0";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
hs_i2c9_bus: hs-i2c9-bus {
samsung,pins = "gpb0-3", "gpb0-2";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
i2s1_bus: i2s1-bus {
samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
"gpd4-3", "gpd4-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
pcm1_bus: pcm1-bus {
samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
"gpd4-3", "gpd4-4";
- samsung,pin-function = <3>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
spdif_bus: spdif-bus {
samsung,pins = "gpd4-3", "gpd4-4";
- samsung,pin-function = <4>;
- samsung,pin-pud = <1>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
fimc_is_spi_pin0: fimc-is-spi-pin0 {
samsung,pins = "gpc3-3", "gpc3-2", "gpc3-1", "gpc3-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
fimc_is_spi_pin1: fimc-is-spi-pin1 {
samsung,pins = "gpc3-7", "gpc3-6", "gpc3-5", "gpc3-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
uart0_bus: uart0-bus {
samsung,pins = "gpd0-3", "gpd0-2", "gpd0-1", "gpd0-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
hs_i2c2_bus: hs-i2c2-bus {
samsung,pins = "gpd0-3", "gpd0-2";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
uart2_bus: uart2-bus {
samsung,pins = "gpd1-5", "gpd1-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart1_bus: uart1-bus {
samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
hs_i2c3_bus: hs-i2c3-bus {
samsung,pins = "gpd1-3", "gpd1-2";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
hs_i2c0_bus: hs-i2c0-bus {
samsung,pins = "gpd2-1", "gpd2-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
hs_i2c1_bus: hs-i2c1-bus {
samsung,pins = "gpd2-3", "gpd2-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
pwm0_out: pwm0-out {
samsung,pins = "gpd2-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
pwm1_out: pwm1-out {
samsung,pins = "gpd2-5";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
pwm2_out: pwm2-out {
samsung,pins = "gpd2-6";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
pwm3_out: pwm3-out {
samsung,pins = "gpd2-7";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
spi1_bus: spi1-bus {
samsung,pins = "gpd6-2", "gpd6-4", "gpd6-5";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
hs_i2c7_bus: hs-i2c7-bus {
samsung,pins = "gpd2-7", "gpd2-6";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
spi0_bus: spi0-bus {
samsung,pins = "gpd8-0", "gpd6-0", "gpd6-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
hs_i2c10_bus: hs-i2c10-bus {
samsung,pins = "gpg3-1", "gpg3-0";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
hs_i2c11_bus: hs-i2c11-bus {
samsung,pins = "gpg3-3", "gpg3-2";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
spi3_bus: spi3-bus {
samsung,pins = "gpg3-4", "gpg3-6", "gpg3-7";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
spi4_bus: spi4-bus {
samsung,pins = "gpv7-1", "gpv7-3", "gpv7-4";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
fimc_is_uart: fimc-is-uart {
samsung,pins = "gpc1-1", "gpc0-7";
- samsung,pin-function = <3>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
fimc_is_ch0_i2c: fimc-is-ch0_i2c {
samsung,pins = "gpc2-1", "gpc2-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
fimc_is_ch0_mclk: fimc-is-ch0_mclk {
samsung,pins = "gpd7-0";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
fimc_is_ch1_i2c: fimc-is-ch1-i2c {
samsung,pins = "gpc2-3", "gpc2-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
fimc_is_ch1_mclk: fimc-is-ch1-mclk {
samsung,pins = "gpd7-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
fimc_is_ch2_i2c: fimc-is-ch2-i2c {
samsung,pins = "gpc2-5", "gpc2-4";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
fimc_is_ch2_mclk: fimc-is-ch2-mclk {
samsung,pins = "gpd7-2";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
};
@@ -797,8 +799,8 @@
hs_i2c5_bus: hs-i2c5-bus {
samsung,pins = "gpj1-1", "gpj1-0";
- samsung,pin-function = <4>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
};
};
--
2.11.0
^ permalink raw reply related
* [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention
From: Andi Shyti @ 2016-12-30 4:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161230041421.24448-1-andi.shyti@samsung.com>
Change the PIN() macro definition so that it can use the macros
from pinctrl/samsung.h header file.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 25 +-
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 254 ++++++++++-----------
2 files changed, 133 insertions(+), 146 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index 2af854b11644..d49879bd34bb 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -14,25 +14,12 @@
#include <dt-bindings/pinctrl/samsung.h>
-#define PIN_PULL_NONE 0
-#define PIN_PULL_DOWN 1
-#define PIN_PULL_UP 3
-
-#define PIN_DRV_LV1 0
-#define PIN_DRV_LV2 2
-#define PIN_DRV_LV3 1
-#define PIN_DRV_LV4 3
-
-#define PIN_IN 0
-#define PIN_OUT 1
-#define PIN_FUNC1 2
-
-#define PIN(_func, _pin, _pull, _drv) \
- _pin { \
- samsung,pins = #_pin; \
- samsung,pin-function = <PIN_ ##_func>; \
- samsung,pin-pud = <PIN_PULL_ ##_pull>; \
- samsung,pin-drv = <PIN_DRV_ ##_drv>; \
+#define PIN(_func, _pin, _pull, _drv) \
+ _pin { \
+ samsung,pins = #_pin; \
+ samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
+ samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
}
&pinctrl_alive {
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index f21bdc2ff834..66c4d5959881 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -742,77 +742,77 @@
pinctrl-0 = <&initial_alive>;
initial_alive: initial-state {
- PIN(IN, gpa0-0, DOWN, LV1);
- PIN(IN, gpa0-1, NONE, LV1);
- PIN(IN, gpa0-2, DOWN, LV1);
- PIN(IN, gpa0-3, NONE, LV1);
- PIN(IN, gpa0-4, NONE, LV1);
- PIN(IN, gpa0-5, DOWN, LV1);
- PIN(IN, gpa0-6, NONE, LV1);
- PIN(IN, gpa0-7, NONE, LV1);
-
- PIN(IN, gpa1-0, UP, LV1);
- PIN(IN, gpa1-1, NONE, LV1);
- PIN(IN, gpa1-2, NONE, LV1);
- PIN(IN, gpa1-3, DOWN, LV1);
- PIN(IN, gpa1-4, DOWN, LV1);
- PIN(IN, gpa1-5, NONE, LV1);
- PIN(IN, gpa1-6, NONE, LV1);
- PIN(IN, gpa1-7, NONE, LV1);
-
- PIN(IN, gpa2-0, NONE, LV1);
- PIN(IN, gpa2-1, NONE, LV1);
- PIN(IN, gpa2-2, NONE, LV1);
- PIN(IN, gpa2-3, DOWN, LV1);
- PIN(IN, gpa2-4, NONE, LV1);
- PIN(IN, gpa2-5, DOWN, LV1);
- PIN(IN, gpa2-6, DOWN, LV1);
- PIN(IN, gpa2-7, NONE, LV1);
-
- PIN(IN, gpa3-0, DOWN, LV1);
- PIN(IN, gpa3-1, DOWN, LV1);
- PIN(IN, gpa3-2, NONE, LV1);
- PIN(IN, gpa3-3, DOWN, LV1);
- PIN(IN, gpa3-4, NONE, LV1);
- PIN(IN, gpa3-5, DOWN, LV1);
- PIN(IN, gpa3-6, DOWN, LV1);
- PIN(IN, gpa3-7, DOWN, LV1);
-
- PIN(IN, gpf1-0, NONE, LV1);
- PIN(IN, gpf1-1, NONE, LV1);
- PIN(IN, gpf1-2, DOWN, LV1);
- PIN(IN, gpf1-4, UP, LV1);
- PIN(OUT, gpf1-5, NONE, LV1);
- PIN(IN, gpf1-6, DOWN, LV1);
- PIN(IN, gpf1-7, DOWN, LV1);
-
- PIN(IN, gpf2-0, DOWN, LV1);
- PIN(IN, gpf2-1, DOWN, LV1);
- PIN(IN, gpf2-2, DOWN, LV1);
- PIN(IN, gpf2-3, DOWN, LV1);
-
- PIN(IN, gpf3-0, DOWN, LV1);
- PIN(IN, gpf3-1, DOWN, LV1);
- PIN(IN, gpf3-2, NONE, LV1);
- PIN(IN, gpf3-3, DOWN, LV1);
-
- PIN(IN, gpf4-0, DOWN, LV1);
- PIN(IN, gpf4-1, DOWN, LV1);
- PIN(IN, gpf4-2, DOWN, LV1);
- PIN(IN, gpf4-3, DOWN, LV1);
- PIN(IN, gpf4-4, DOWN, LV1);
- PIN(IN, gpf4-5, DOWN, LV1);
- PIN(IN, gpf4-6, DOWN, LV1);
- PIN(IN, gpf4-7, DOWN, LV1);
-
- PIN(IN, gpf5-0, DOWN, LV1);
- PIN(IN, gpf5-1, DOWN, LV1);
- PIN(IN, gpf5-2, DOWN, LV1);
- PIN(IN, gpf5-3, DOWN, LV1);
- PIN(OUT, gpf5-4, NONE, LV1);
- PIN(IN, gpf5-5, DOWN, LV1);
- PIN(IN, gpf5-6, DOWN, LV1);
- PIN(IN, gpf5-7, DOWN, LV1);
+ PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpa0-1, NONE, FAST_SR1);
+ PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpa0-3, NONE, FAST_SR1);
+ PIN(INPUT, gpa0-4, NONE, FAST_SR1);
+ PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpa0-6, NONE, FAST_SR1);
+ PIN(INPUT, gpa0-7, NONE, FAST_SR1);
+
+ PIN(INPUT, gpa1-0, UP, FAST_SR1);
+ PIN(INPUT, gpa1-1, NONE, FAST_SR1);
+ PIN(INPUT, gpa1-2, NONE, FAST_SR1);
+ PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
+ PIN(INPUT, gpa1-5, NONE, FAST_SR1);
+ PIN(INPUT, gpa1-6, NONE, FAST_SR1);
+ PIN(INPUT, gpa1-7, NONE, FAST_SR1);
+
+ PIN(INPUT, gpa2-0, NONE, FAST_SR1);
+ PIN(INPUT, gpa2-1, NONE, FAST_SR1);
+ PIN(INPUT, gpa2-2, NONE, FAST_SR1);
+ PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpa2-4, NONE, FAST_SR1);
+ PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpa2-7, NONE, FAST_SR1);
+
+ PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-2, NONE, FAST_SR1);
+ PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-4, NONE, FAST_SR1);
+ PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf1-0, NONE, FAST_SR1);
+ PIN(INPUT, gpf1-1, NONE, FAST_SR1);
+ PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf1-4, UP, FAST_SR1);
+ PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
+ PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpf3-2, NONE, FAST_SR1);
+ PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
+ PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
+ PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
};
te_irq: te_irq {
@@ -826,8 +826,8 @@
pinctrl-0 = <&initial_cpif>;
initial_cpif: initial-state {
- PIN(IN, gpv6-0, DOWN, LV1);
- PIN(IN, gpv6-1, DOWN, LV1);
+ PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
};
};
@@ -836,9 +836,9 @@
pinctrl-0 = <&initial_ese>;
initial_ese: initial-state {
- PIN(IN, gpj2-0, DOWN, LV1);
- PIN(IN, gpj2-1, DOWN, LV1);
- PIN(IN, gpj2-2, DOWN, LV1);
+ PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
};
};
@@ -847,11 +847,11 @@
pinctrl-0 = <&initial_fsys>;
initial_fsys: initial-state {
- PIN(IN, gpr3-0, NONE, LV1);
- PIN(IN, gpr3-1, DOWN, LV1);
- PIN(IN, gpr3-2, DOWN, LV1);
- PIN(IN, gpr3-3, DOWN, LV1);
- PIN(IN, gpr3-7, NONE, LV1);
+ PIN(INPUT, gpr3-0, NONE, FAST_SR1);
+ PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpr3-7, NONE, FAST_SR1);
};
};
@@ -860,14 +860,14 @@
pinctrl-0 = <&initial_imem>;
initial_imem: initial-state {
- PIN(IN, gpf0-0, UP, LV1);
- PIN(IN, gpf0-1, UP, LV1);
- PIN(IN, gpf0-2, DOWN, LV1);
- PIN(IN, gpf0-3, UP, LV1);
- PIN(IN, gpf0-4, DOWN, LV1);
- PIN(IN, gpf0-5, NONE, LV1);
- PIN(IN, gpf0-6, DOWN, LV1);
- PIN(IN, gpf0-7, UP, LV1);
+ PIN(INPUT, gpf0-0, UP, FAST_SR1);
+ PIN(INPUT, gpf0-1, UP, FAST_SR1);
+ PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf0-3, UP, FAST_SR1);
+ PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
+ PIN(INPUT, gpf0-5, NONE, FAST_SR1);
+ PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpf0-7, UP, FAST_SR1);
};
};
@@ -876,7 +876,7 @@
pinctrl-0 = <&initial_nfc>;
initial_nfc: initial-state {
- PIN(IN, gpj0-2, DOWN, LV1);
+ PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
};
};
@@ -885,54 +885,54 @@
pinctrl-0 = <&initial_peric>;
initial_peric: initial-state {
- PIN(IN, gpv7-0, DOWN, LV1);
- PIN(IN, gpv7-1, DOWN, LV1);
- PIN(IN, gpv7-2, NONE, LV1);
- PIN(IN, gpv7-3, DOWN, LV1);
- PIN(IN, gpv7-4, DOWN, LV1);
- PIN(IN, gpv7-5, DOWN, LV1);
+ PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpv7-2, NONE, FAST_SR1);
+ PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
+ PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
- PIN(IN, gpb0-4, DOWN, LV1);
+ PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
- PIN(IN, gpc0-2, DOWN, LV1);
- PIN(IN, gpc0-5, DOWN, LV1);
- PIN(IN, gpc0-7, DOWN, LV1);
+ PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
- PIN(IN, gpc1-1, DOWN, LV1);
+ PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
- PIN(IN, gpc3-4, NONE, LV1);
- PIN(IN, gpc3-5, NONE, LV1);
- PIN(IN, gpc3-6, NONE, LV1);
- PIN(IN, gpc3-7, NONE, LV1);
+ PIN(INPUT, gpc3-4, NONE, FAST_SR1);
+ PIN(INPUT, gpc3-5, NONE, FAST_SR1);
+ PIN(INPUT, gpc3-6, NONE, FAST_SR1);
+ PIN(INPUT, gpc3-7, NONE, FAST_SR1);
- PIN(OUT, gpg0-0, NONE, LV1);
- PIN(FUNC1, gpg0-1, DOWN, LV1);
+ PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
+ PIN(2, gpg0-1, DOWN, FAST_SR1);
- PIN(IN, gpd2-5, DOWN, LV1);
+ PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
- PIN(IN, gpd4-0, NONE, LV1);
- PIN(IN, gpd4-1, DOWN, LV1);
- PIN(IN, gpd4-2, DOWN, LV1);
- PIN(IN, gpd4-3, DOWN, LV1);
- PIN(IN, gpd4-4, DOWN, LV1);
+ PIN(INPUT, gpd4-0, NONE, FAST_SR1);
+ PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
- PIN(IN, gpd6-3, DOWN, LV1);
+ PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
- PIN(IN, gpd8-1, UP, LV1);
+ PIN(INPUT, gpd8-1, UP, FAST_SR1);
- PIN(IN, gpg1-0, DOWN, LV1);
- PIN(IN, gpg1-1, DOWN, LV1);
- PIN(IN, gpg1-2, DOWN, LV1);
- PIN(IN, gpg1-3, DOWN, LV1);
- PIN(IN, gpg1-4, DOWN, LV1);
+ PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
- PIN(IN, gpg2-0, DOWN, LV1);
- PIN(IN, gpg2-1, DOWN, LV1);
+ PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
- PIN(IN, gpg3-0, DOWN, LV1);
- PIN(IN, gpg3-1, DOWN, LV1);
- PIN(IN, gpg3-5, DOWN, LV1);
- PIN(IN, gpg3-7, DOWN, LV1);
+ PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
};
};
@@ -941,7 +941,7 @@
pinctrl-0 = <&initial_touch>;
initial_touch: initial-state {
- PIN(IN, gpj1-2, DOWN, LV1);
+ PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
};
};
--
2.11.0
^ permalink raw reply related
* [PATCH v2] usb: musb: sunxi: Uses the resource-managed extcon API when registering extcon notifier
From: Chanwoo Choi @ 2016-12-30 4:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CGME20161230041914epcas5p24826e70fd5de710818687e55579757ba@epcas5p2.samsung.com>
This patch just uses the resource-managed extcon API when registering
the extcon notifier.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Bin Liu <b-liu@ti.com>
---
Changes from v1:
- Rebase this patch based on v4.10-rc1.
- Add acked-by tag from Maxime Ripard and Bin Lin.
- Drop the phy/power-supply/chipidea patches.
drivers/usb/musb/sunxi.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
index d0be0eadd0d9..2332294dee0f 100644
--- a/drivers/usb/musb/sunxi.c
+++ b/drivers/usb/musb/sunxi.c
@@ -251,14 +251,14 @@ static int sunxi_musb_init(struct musb *musb)
writeb(SUNXI_MUSB_VEND0_PIO_MODE, musb->mregs + SUNXI_MUSB_VEND0);
/* Register notifier before calling phy_init() */
- ret = extcon_register_notifier(glue->extcon, EXTCON_USB_HOST,
- &glue->host_nb);
+ ret = devm_extcon_register_notifier(glue->dev, glue->extcon,
+ EXTCON_USB_HOST, &glue->host_nb);
if (ret)
goto error_reset_assert;
ret = phy_init(glue->phy);
if (ret)
- goto error_unregister_notifier;
+ goto error_reset_assert;
musb->isr = sunxi_musb_interrupt;
@@ -267,9 +267,6 @@ static int sunxi_musb_init(struct musb *musb)
return 0;
-error_unregister_notifier:
- extcon_unregister_notifier(glue->extcon, EXTCON_USB_HOST,
- &glue->host_nb);
error_reset_assert:
if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags))
reset_control_assert(glue->rst);
@@ -293,9 +290,6 @@ static int sunxi_musb_exit(struct musb *musb)
phy_exit(glue->phy);
- extcon_unregister_notifier(glue->extcon, EXTCON_USB_HOST,
- &glue->host_nb);
-
if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags))
reset_control_assert(glue->rst);
--
1.9.1
^ permalink raw reply related
* [PATCH v2] drm/mediatek: Support UYVY and YUYV format for overlay
From: Bibby Hsieh @ 2016-12-30 6:26 UTC (permalink / raw)
To: linux-arm-kernel
MT8173 overlay can support UYVY and YUYV format,
we add the format in DRM driver.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 21 +++++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++
2 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index c703102..de05845 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -40,10 +40,13 @@
#define OVL_RDMA_MEM_GMC 0x40402020
#define OVL_CON_BYTE_SWAP BIT(24)
+#define OVL_CON_MTX_YUV_TO_RGB (6 << 16)
#define OVL_CON_CLRFMT_RGB565 (0 << 12)
#define OVL_CON_CLRFMT_RGB888 (1 << 12)
#define OVL_CON_CLRFMT_RGBA8888 (2 << 12)
#define OVL_CON_CLRFMT_ARGB8888 (3 << 12)
+#define OVL_CON_CLRFMT_UYVY (4 << 12)
+#define OVL_CON_CLRFMT_YUYV (5 << 12)
#define OVL_CON_AEN BIT(8)
#define OVL_CON_ALPHA 0xff
@@ -162,6 +165,21 @@ static unsigned int ovl_fmt_convert(unsigned int fmt)
case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_ABGR8888:
return OVL_CON_CLRFMT_RGBA8888 | OVL_CON_BYTE_SWAP;
+ case DRM_FORMAT_UYVY:
+ return OVL_CON_CLRFMT_UYVY;
+ case DRM_FORMAT_YUYV:
+ return OVL_CON_CLRFMT_YUYV;
+ }
+}
+
+static bool ovl_yuv_space(unsigned int fmt)
+{
+ switch (fmt) {
+ case DRM_FORMAT_UYVY:
+ case DRM_FORMAT_YUYV:
+ return true;
+ default:
+ return false;
}
}
@@ -183,6 +201,9 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
if (idx != 0)
con |= OVL_CON_AEN | OVL_CON_ALPHA;
+ if (ovl_yuv_space(fmt))
+ con |= OVL_CON_MTX_YUV_TO_RGB;
+
writel_relaxed(con, comp->regs + DISP_REG_OVL_CON(idx));
writel_relaxed(pitch, comp->regs + DISP_REG_OVL_PITCH(idx));
writel_relaxed(src_size, comp->regs + DISP_REG_OVL_SRC_SIZE(idx));
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
index c461a23..8c02d1d 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
@@ -28,6 +28,8 @@
DRM_FORMAT_XRGB8888,
DRM_FORMAT_ARGB8888,
DRM_FORMAT_RGB565,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_YUYV,
};
static void mtk_plane_reset(struct drm_plane *plane)
--
1.9.1
^ permalink raw reply related
* [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Chanwoo Choi @ 2016-12-30 6:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161230041421.24448-3-andi.shyti@samsung.com>
Hi Andi,
On 2016? 12? 30? 13:14, Andi Shyti wrote:
> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> values used for configuration") has added a header file for defining the
> pinctrl values in order to avoid hardcoded settings in the Exynos
> DTS related files.
>
> Extend samsung.h to the Exynos5433 for drive strength values
> which are strictly related to the particular SoC and may defer
> from others.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> include/dt-bindings/pinctrl/samsung.h | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
> index 6276eb785e2b..e0ebb20ffdd3 100644
> --- a/include/dt-bindings/pinctrl/samsung.h
> +++ b/include/dt-bindings/pinctrl/samsung.h
> @@ -45,6 +45,20 @@
> #define EXYNOS5420_PIN_DRV_LV3 2
> #define EXYNOS5420_PIN_DRV_LV4 3
>
> +/* Drive strengths for Exynos5433 */
> +#define EXYNOS5433_PIN_DRV_FAST_SR1 0
> +#define EXYNOS5433_PIN_DRV_FAST_SR2 1
> +#define EXYNOS5433_PIN_DRV_FAST_SR3 2
> +#define EXYNOS5433_PIN_DRV_FAST_SR4 3
> +#define EXYNOS5433_PIN_DRV_FAST_SR5 4
> +#define EXYNOS5433_PIN_DRV_FAST_SR6 5
> +#define EXYNOS5433_PIN_DRV_SLOW_SR1 8
> +#define EXYNOS5433_PIN_DRV_SLOW_SR2 9
> +#define EXYNOS5433_PIN_DRV_SLOW_SR3 0xa
> +#define EXYNOS5433_PIN_DRV_SLOW_SR4 0xb
> +#define EXYNOS5433_PIN_DRV_SLOW_SR5 0xc
> +#define EXYNOS5433_PIN_DRV_SLOW_SR6 0xf
> +
> #define EXYNOS_PIN_FUNC_INPUT 0
> #define EXYNOS_PIN_FUNC_OUTPUT 1
> #define EXYNOS_PIN_FUNC_2 2
>
Looks good to me. ('SR' means "Slew Rate".)
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
--
Regards,
Chanwoo Choi
^ permalink raw reply
* [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
From: Chanwoo Choi @ 2016-12-30 6:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161230041421.24448-4-andi.shyti@samsung.com>
Hi Andi,
Looks good to me.
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Regards,
Chanwoo Choi
On 2016? 12? 30? 13:14, Andi Shyti wrote:
> Use the macros defined in include/dt-bindings/pinctrl/samsung.h
> instead of hardcoded values.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 348 +++++++++++----------
> 1 file changed, 175 insertions(+), 173 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> index ad71247b074f..2af854b11644 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> @@ -12,6 +12,8 @@
> * published by the Free Software Foundation.
> */
>
> +#include <dt-bindings/pinctrl/samsung.h>
> +
> #define PIN_PULL_NONE 0
> #define PIN_PULL_DOWN 1
> #define PIN_PULL_UP 3
> @@ -145,23 +147,23 @@
> i2s0_bus: i2s0-bus {
> samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
> "gpz0-4", "gpz0-5", "gpz0-6";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <1>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> pcm0_bus: pcm0-bus {
> samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3";
> - samsung,pin-function = <3>;
> - samsung,pin-pud = <1>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> uart_aud_bus: uart-aud-bus {
> samsung,pins = "gpz1-3", "gpz1-2", "gpz1-1", "gpz1-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
> };
>
> @@ -196,16 +198,16 @@
>
> spi2_bus: spi2-bus {
> samsung,pins = "gpd5-0", "gpd5-2", "gpd5-3";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> hs_i2c6_bus: hs-i2c6-bus {
> samsung,pins = "gpd5-3", "gpd5-2";
> - samsung,pin-function = <4>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
> };
>
> @@ -260,141 +262,141 @@
>
> sd0_clk: sd0-clk {
> samsung,pins = "gpr0-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd0_cmd: sd0-cmd {
> samsung,pins = "gpr0-1";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd0_rdqs: sd0-rdqs {
> samsung,pins = "gpr0-2";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <1>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd0_qrdy: sd0-qrdy {
> samsung,pins = "gpr0-3";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <1>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd0_bus1: sd0-bus-width1 {
> samsung,pins = "gpr1-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd0_bus4: sd0-bus-width4 {
> samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd0_bus8: sd0-bus-width8 {
> samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd1_clk: sd1-clk {
> samsung,pins = "gpr2-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd1_cmd: sd1-cmd {
> samsung,pins = "gpr2-1";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd1_bus1: sd1-bus-width1 {
> samsung,pins = "gpr3-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd1_bus4: sd1-bus-width4 {
> samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd1_bus8: sd1-bus-width8 {
> samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> pcie_bus: pcie_bus {
> samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
> - samsung,pin-function = <3>;
> - samsung,pin-pud = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> };
>
> sd2_clk: sd2-clk {
> samsung,pins = "gpr4-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd2_cmd: sd2-cmd {
> samsung,pins = "gpr4-1";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd2_cd: sd2-cd {
> samsung,pins = "gpr4-2";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd2_bus1: sd2-bus-width1 {
> samsung,pins = "gpr4-3";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd2_bus4: sd2-bus-width4 {
> samsung,pins = "gpr4-4", "gpr4-5", "gpr4-6";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <3>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
> };
>
> sd2_clk_output: sd2-clk-output {
> samsung,pins = "gpr4-0";
> - samsung,pin-function = <1>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <2>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR3>;
> };
>
> sd2_cmd_output: sd2-cmd-output {
> samsung,pins = "gpr4-1";
> - samsung,pin-function = <1>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <2>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR3>;
> };
> };
>
> @@ -419,9 +421,9 @@
>
> hs_i2c4_bus: hs-i2c4-bus {
> samsung,pins = "gpj0-1", "gpj0-0";
> - samsung,pin-function = <4>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
> };
>
> @@ -564,225 +566,225 @@
>
> hs_i2c8_bus: hs-i2c8-bus {
> samsung,pins = "gpb0-1", "gpb0-0";
> - samsung,pin-function = <4>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> hs_i2c9_bus: hs-i2c9-bus {
> samsung,pins = "gpb0-3", "gpb0-2";
> - samsung,pin-function = <4>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> i2s1_bus: i2s1-bus {
> samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
> "gpd4-3", "gpd4-4";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <1>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> pcm1_bus: pcm1-bus {
> samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
> "gpd4-3", "gpd4-4";
> - samsung,pin-function = <3>;
> - samsung,pin-pud = <1>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> spdif_bus: spdif-bus {
> samsung,pins = "gpd4-3", "gpd4-4";
> - samsung,pin-function = <4>;
> - samsung,pin-pud = <1>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> fimc_is_spi_pin0: fimc-is-spi-pin0 {
> samsung,pins = "gpc3-3", "gpc3-2", "gpc3-1", "gpc3-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> fimc_is_spi_pin1: fimc-is-spi-pin1 {
> samsung,pins = "gpc3-7", "gpc3-6", "gpc3-5", "gpc3-4";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> uart0_bus: uart0-bus {
> samsung,pins = "gpd0-3", "gpd0-2", "gpd0-1", "gpd0-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> };
>
> hs_i2c2_bus: hs-i2c2-bus {
> samsung,pins = "gpd0-3", "gpd0-2";
> - samsung,pin-function = <3>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> uart2_bus: uart2-bus {
> samsung,pins = "gpd1-5", "gpd1-4";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> };
>
> uart1_bus: uart1-bus {
> samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> };
>
> hs_i2c3_bus: hs-i2c3-bus {
> samsung,pins = "gpd1-3", "gpd1-2";
> - samsung,pin-function = <3>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> hs_i2c0_bus: hs-i2c0-bus {
> samsung,pins = "gpd2-1", "gpd2-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> hs_i2c1_bus: hs-i2c1-bus {
> samsung,pins = "gpd2-3", "gpd2-2";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> pwm0_out: pwm0-out {
> samsung,pins = "gpd2-4";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> pwm1_out: pwm1-out {
> samsung,pins = "gpd2-5";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> pwm2_out: pwm2-out {
> samsung,pins = "gpd2-6";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> pwm3_out: pwm3-out {
> samsung,pins = "gpd2-7";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> spi1_bus: spi1-bus {
> samsung,pins = "gpd6-2", "gpd6-4", "gpd6-5";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> hs_i2c7_bus: hs-i2c7-bus {
> samsung,pins = "gpd2-7", "gpd2-6";
> - samsung,pin-function = <4>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> spi0_bus: spi0-bus {
> samsung,pins = "gpd8-0", "gpd6-0", "gpd6-1";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> hs_i2c10_bus: hs-i2c10-bus {
> samsung,pins = "gpg3-1", "gpg3-0";
> - samsung,pin-function = <4>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> hs_i2c11_bus: hs-i2c11-bus {
> samsung,pins = "gpg3-3", "gpg3-2";
> - samsung,pin-function = <4>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> spi3_bus: spi3-bus {
> samsung,pins = "gpg3-4", "gpg3-6", "gpg3-7";
> - samsung,pin-function = <3>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> spi4_bus: spi4-bus {
> samsung,pins = "gpv7-1", "gpv7-3", "gpv7-4";
> - samsung,pin-function = <3>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> fimc_is_uart: fimc-is-uart {
> samsung,pins = "gpc1-1", "gpc0-7";
> - samsung,pin-function = <3>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> fimc_is_ch0_i2c: fimc-is-ch0_i2c {
> samsung,pins = "gpc2-1", "gpc2-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> fimc_is_ch0_mclk: fimc-is-ch0_mclk {
> samsung,pins = "gpd7-0";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> fimc_is_ch1_i2c: fimc-is-ch1-i2c {
> samsung,pins = "gpc2-3", "gpc2-2";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> fimc_is_ch1_mclk: fimc-is-ch1-mclk {
> samsung,pins = "gpd7-1";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> fimc_is_ch2_i2c: fimc-is-ch2-i2c {
> samsung,pins = "gpc2-5", "gpc2-4";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
>
> fimc_is_ch2_mclk: fimc-is-ch2-mclk {
> samsung,pins = "gpd7-2";
> - samsung,pin-function = <2>;
> - samsung,pin-pud = <0>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
> };
>
> @@ -797,8 +799,8 @@
>
> hs_i2c5_bus: hs-i2c5-bus {
> samsung,pins = "gpj1-1", "gpj1-0";
> - samsung,pin-function = <4>;
> - samsung,pin-pud = <3>;
> - samsung,pin-drv = <0>;
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
> };
> };
>
^ permalink raw reply
* [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention
From: Chanwoo Choi @ 2016-12-30 6:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161230041421.24448-5-andi.shyti@samsung.com>
Hi Andi,
Looks good to me. I tested these patches for booting on TM2 board.
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Regards,
Chanwoo Choi
On 2016? 12? 30? 13:14, Andi Shyti wrote:
> Change the PIN() macro definition so that it can use the macros
> from pinctrl/samsung.h header file.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 25 +-
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 254 ++++++++++-----------
> 2 files changed, 133 insertions(+), 146 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> index 2af854b11644..d49879bd34bb 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> @@ -14,25 +14,12 @@
>
> #include <dt-bindings/pinctrl/samsung.h>
>
> -#define PIN_PULL_NONE 0
> -#define PIN_PULL_DOWN 1
> -#define PIN_PULL_UP 3
> -
> -#define PIN_DRV_LV1 0
> -#define PIN_DRV_LV2 2
> -#define PIN_DRV_LV3 1
> -#define PIN_DRV_LV4 3
> -
> -#define PIN_IN 0
> -#define PIN_OUT 1
> -#define PIN_FUNC1 2
> -
> -#define PIN(_func, _pin, _pull, _drv) \
> - _pin { \
> - samsung,pins = #_pin; \
> - samsung,pin-function = <PIN_ ##_func>; \
> - samsung,pin-pud = <PIN_PULL_ ##_pull>; \
> - samsung,pin-drv = <PIN_DRV_ ##_drv>; \
> +#define PIN(_func, _pin, _pull, _drv) \
> + _pin { \
> + samsung,pins = #_pin; \
> + samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
> + samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
> + samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
> }
>
> &pinctrl_alive {
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index f21bdc2ff834..66c4d5959881 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -742,77 +742,77 @@
> pinctrl-0 = <&initial_alive>;
>
> initial_alive: initial-state {
> - PIN(IN, gpa0-0, DOWN, LV1);
> - PIN(IN, gpa0-1, NONE, LV1);
> - PIN(IN, gpa0-2, DOWN, LV1);
> - PIN(IN, gpa0-3, NONE, LV1);
> - PIN(IN, gpa0-4, NONE, LV1);
> - PIN(IN, gpa0-5, DOWN, LV1);
> - PIN(IN, gpa0-6, NONE, LV1);
> - PIN(IN, gpa0-7, NONE, LV1);
> -
> - PIN(IN, gpa1-0, UP, LV1);
> - PIN(IN, gpa1-1, NONE, LV1);
> - PIN(IN, gpa1-2, NONE, LV1);
> - PIN(IN, gpa1-3, DOWN, LV1);
> - PIN(IN, gpa1-4, DOWN, LV1);
> - PIN(IN, gpa1-5, NONE, LV1);
> - PIN(IN, gpa1-6, NONE, LV1);
> - PIN(IN, gpa1-7, NONE, LV1);
> -
> - PIN(IN, gpa2-0, NONE, LV1);
> - PIN(IN, gpa2-1, NONE, LV1);
> - PIN(IN, gpa2-2, NONE, LV1);
> - PIN(IN, gpa2-3, DOWN, LV1);
> - PIN(IN, gpa2-4, NONE, LV1);
> - PIN(IN, gpa2-5, DOWN, LV1);
> - PIN(IN, gpa2-6, DOWN, LV1);
> - PIN(IN, gpa2-7, NONE, LV1);
> -
> - PIN(IN, gpa3-0, DOWN, LV1);
> - PIN(IN, gpa3-1, DOWN, LV1);
> - PIN(IN, gpa3-2, NONE, LV1);
> - PIN(IN, gpa3-3, DOWN, LV1);
> - PIN(IN, gpa3-4, NONE, LV1);
> - PIN(IN, gpa3-5, DOWN, LV1);
> - PIN(IN, gpa3-6, DOWN, LV1);
> - PIN(IN, gpa3-7, DOWN, LV1);
> -
> - PIN(IN, gpf1-0, NONE, LV1);
> - PIN(IN, gpf1-1, NONE, LV1);
> - PIN(IN, gpf1-2, DOWN, LV1);
> - PIN(IN, gpf1-4, UP, LV1);
> - PIN(OUT, gpf1-5, NONE, LV1);
> - PIN(IN, gpf1-6, DOWN, LV1);
> - PIN(IN, gpf1-7, DOWN, LV1);
> -
> - PIN(IN, gpf2-0, DOWN, LV1);
> - PIN(IN, gpf2-1, DOWN, LV1);
> - PIN(IN, gpf2-2, DOWN, LV1);
> - PIN(IN, gpf2-3, DOWN, LV1);
> -
> - PIN(IN, gpf3-0, DOWN, LV1);
> - PIN(IN, gpf3-1, DOWN, LV1);
> - PIN(IN, gpf3-2, NONE, LV1);
> - PIN(IN, gpf3-3, DOWN, LV1);
> -
> - PIN(IN, gpf4-0, DOWN, LV1);
> - PIN(IN, gpf4-1, DOWN, LV1);
> - PIN(IN, gpf4-2, DOWN, LV1);
> - PIN(IN, gpf4-3, DOWN, LV1);
> - PIN(IN, gpf4-4, DOWN, LV1);
> - PIN(IN, gpf4-5, DOWN, LV1);
> - PIN(IN, gpf4-6, DOWN, LV1);
> - PIN(IN, gpf4-7, DOWN, LV1);
> -
> - PIN(IN, gpf5-0, DOWN, LV1);
> - PIN(IN, gpf5-1, DOWN, LV1);
> - PIN(IN, gpf5-2, DOWN, LV1);
> - PIN(IN, gpf5-3, DOWN, LV1);
> - PIN(OUT, gpf5-4, NONE, LV1);
> - PIN(IN, gpf5-5, DOWN, LV1);
> - PIN(IN, gpf5-6, DOWN, LV1);
> - PIN(IN, gpf5-7, DOWN, LV1);
> + PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpa0-1, NONE, FAST_SR1);
> + PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpa0-3, NONE, FAST_SR1);
> + PIN(INPUT, gpa0-4, NONE, FAST_SR1);
> + PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpa0-6, NONE, FAST_SR1);
> + PIN(INPUT, gpa0-7, NONE, FAST_SR1);
> +
> + PIN(INPUT, gpa1-0, UP, FAST_SR1);
> + PIN(INPUT, gpa1-1, NONE, FAST_SR1);
> + PIN(INPUT, gpa1-2, NONE, FAST_SR1);
> + PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
> + PIN(INPUT, gpa1-5, NONE, FAST_SR1);
> + PIN(INPUT, gpa1-6, NONE, FAST_SR1);
> + PIN(INPUT, gpa1-7, NONE, FAST_SR1);
> +
> + PIN(INPUT, gpa2-0, NONE, FAST_SR1);
> + PIN(INPUT, gpa2-1, NONE, FAST_SR1);
> + PIN(INPUT, gpa2-2, NONE, FAST_SR1);
> + PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpa2-4, NONE, FAST_SR1);
> + PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpa2-7, NONE, FAST_SR1);
> +
> + PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-2, NONE, FAST_SR1);
> + PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-4, NONE, FAST_SR1);
> + PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf1-0, NONE, FAST_SR1);
> + PIN(INPUT, gpf1-1, NONE, FAST_SR1);
> + PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf1-4, UP, FAST_SR1);
> + PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
> + PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpf3-2, NONE, FAST_SR1);
> + PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
> + PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
> + PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
> };
>
> te_irq: te_irq {
> @@ -826,8 +826,8 @@
> pinctrl-0 = <&initial_cpif>;
>
> initial_cpif: initial-state {
> - PIN(IN, gpv6-0, DOWN, LV1);
> - PIN(IN, gpv6-1, DOWN, LV1);
> + PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
> };
> };
>
> @@ -836,9 +836,9 @@
> pinctrl-0 = <&initial_ese>;
>
> initial_ese: initial-state {
> - PIN(IN, gpj2-0, DOWN, LV1);
> - PIN(IN, gpj2-1, DOWN, LV1);
> - PIN(IN, gpj2-2, DOWN, LV1);
> + PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
> };
> };
>
> @@ -847,11 +847,11 @@
> pinctrl-0 = <&initial_fsys>;
>
> initial_fsys: initial-state {
> - PIN(IN, gpr3-0, NONE, LV1);
> - PIN(IN, gpr3-1, DOWN, LV1);
> - PIN(IN, gpr3-2, DOWN, LV1);
> - PIN(IN, gpr3-3, DOWN, LV1);
> - PIN(IN, gpr3-7, NONE, LV1);
> + PIN(INPUT, gpr3-0, NONE, FAST_SR1);
> + PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpr3-7, NONE, FAST_SR1);
> };
> };
>
> @@ -860,14 +860,14 @@
> pinctrl-0 = <&initial_imem>;
>
> initial_imem: initial-state {
> - PIN(IN, gpf0-0, UP, LV1);
> - PIN(IN, gpf0-1, UP, LV1);
> - PIN(IN, gpf0-2, DOWN, LV1);
> - PIN(IN, gpf0-3, UP, LV1);
> - PIN(IN, gpf0-4, DOWN, LV1);
> - PIN(IN, gpf0-5, NONE, LV1);
> - PIN(IN, gpf0-6, DOWN, LV1);
> - PIN(IN, gpf0-7, UP, LV1);
> + PIN(INPUT, gpf0-0, UP, FAST_SR1);
> + PIN(INPUT, gpf0-1, UP, FAST_SR1);
> + PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf0-3, UP, FAST_SR1);
> + PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
> + PIN(INPUT, gpf0-5, NONE, FAST_SR1);
> + PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpf0-7, UP, FAST_SR1);
> };
> };
>
> @@ -876,7 +876,7 @@
> pinctrl-0 = <&initial_nfc>;
>
> initial_nfc: initial-state {
> - PIN(IN, gpj0-2, DOWN, LV1);
> + PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
> };
> };
>
> @@ -885,54 +885,54 @@
> pinctrl-0 = <&initial_peric>;
>
> initial_peric: initial-state {
> - PIN(IN, gpv7-0, DOWN, LV1);
> - PIN(IN, gpv7-1, DOWN, LV1);
> - PIN(IN, gpv7-2, NONE, LV1);
> - PIN(IN, gpv7-3, DOWN, LV1);
> - PIN(IN, gpv7-4, DOWN, LV1);
> - PIN(IN, gpv7-5, DOWN, LV1);
> + PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpv7-2, NONE, FAST_SR1);
> + PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
> + PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
>
> - PIN(IN, gpb0-4, DOWN, LV1);
> + PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
>
> - PIN(IN, gpc0-2, DOWN, LV1);
> - PIN(IN, gpc0-5, DOWN, LV1);
> - PIN(IN, gpc0-7, DOWN, LV1);
> + PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
>
> - PIN(IN, gpc1-1, DOWN, LV1);
> + PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
>
> - PIN(IN, gpc3-4, NONE, LV1);
> - PIN(IN, gpc3-5, NONE, LV1);
> - PIN(IN, gpc3-6, NONE, LV1);
> - PIN(IN, gpc3-7, NONE, LV1);
> + PIN(INPUT, gpc3-4, NONE, FAST_SR1);
> + PIN(INPUT, gpc3-5, NONE, FAST_SR1);
> + PIN(INPUT, gpc3-6, NONE, FAST_SR1);
> + PIN(INPUT, gpc3-7, NONE, FAST_SR1);
>
> - PIN(OUT, gpg0-0, NONE, LV1);
> - PIN(FUNC1, gpg0-1, DOWN, LV1);
> + PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
> + PIN(2, gpg0-1, DOWN, FAST_SR1);
>
> - PIN(IN, gpd2-5, DOWN, LV1);
> + PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
>
> - PIN(IN, gpd4-0, NONE, LV1);
> - PIN(IN, gpd4-1, DOWN, LV1);
> - PIN(IN, gpd4-2, DOWN, LV1);
> - PIN(IN, gpd4-3, DOWN, LV1);
> - PIN(IN, gpd4-4, DOWN, LV1);
> + PIN(INPUT, gpd4-0, NONE, FAST_SR1);
> + PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
>
> - PIN(IN, gpd6-3, DOWN, LV1);
> + PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
>
> - PIN(IN, gpd8-1, UP, LV1);
> + PIN(INPUT, gpd8-1, UP, FAST_SR1);
>
> - PIN(IN, gpg1-0, DOWN, LV1);
> - PIN(IN, gpg1-1, DOWN, LV1);
> - PIN(IN, gpg1-2, DOWN, LV1);
> - PIN(IN, gpg1-3, DOWN, LV1);
> - PIN(IN, gpg1-4, DOWN, LV1);
> + PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
>
> - PIN(IN, gpg2-0, DOWN, LV1);
> - PIN(IN, gpg2-1, DOWN, LV1);
> + PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
>
> - PIN(IN, gpg3-0, DOWN, LV1);
> - PIN(IN, gpg3-1, DOWN, LV1);
> - PIN(IN, gpg3-5, DOWN, LV1);
> - PIN(IN, gpg3-7, DOWN, LV1);
> + PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
> };
> };
>
> @@ -941,7 +941,7 @@
> pinctrl-0 = <&initial_touch>;
>
> initial_touch: initial-state {
> - PIN(IN, gpj1-2, DOWN, LV1);
> + PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
> };
> };
>
>
^ permalink raw reply
* [PATCH 06/12] usb: dwc3: omap: Replace the extcon API
From: Chanwoo Choi @ 2016-12-30 6:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5865CA76.1020001@samsung.com>
Hi Felipe,
On 2016? 12? 30? 11:46, Chanwoo Choi wrote:
> Hi Felipe,
>
> On 2016? 12? 02? 18:03, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Chanwoo Choi <cw00.choi@samsung.com> writes:
>>> Hi Felipe,
>>>
>>> On 2016? 11? 30? 19:36, Felipe Balbi wrote:
>>>>
>>>> Hi,
>>>>
>>>> Chanwoo Choi <cw00.choi@samsung.com> writes:
>>>>> This patch uses the resource-managed extcon API for extcon_register_notifier()
>>>>> and replaces the deprecated extcon API as following:
>>>>> - extcon_get_cable_state_() -> extcon_get_state()
>>>>>
>>>>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>>>>
>>>> Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
>>>>
>>>
>>> Thanks for your review.
>>>
>>> Each patch has no any dependency among patches.
>>> So, If possible, could you pick the patch6/8/9/10/11/12 on your tree?
>>
>> my tree is closed for v4.10, I can pick it up for v4.11
>
> Could you please pick up these patches(patch6/8/9/10/11/12)?
> These patches were already reviewed by you.
>
I sent v2 patchset.
[1] https://www.spinics.net/lists/kernel/msg2410950.html
- "[PATCH v2 0/6] usb: Replace the deprecated extcon API"
--
Regards,
Chanwoo Choi
^ permalink raw reply
* [PATCH v2] bus: imx-weim: Fix the "fsl, weim-cs-gpr" lookup method
From: Shawn Guo @ 2016-12-30 6:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480089861-28025-1-git-send-email-festevam@gmail.com>
On Fri, Nov 25, 2016 at 02:04:21PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> Commit 1be81ea5860744520 ("ARM: dts: imx6: Add imx-weim parameters to
> dtsi's") causes the following probe error when the weim node is not
> present on the board dts (such as imx6q-sabresd):
>
> imx-weim 21b8000.weim: Invalid 'ranges' configuration
> imx-weim: probe of 21b8000.weim failed with error -22
>
> As the "fsl,weim-cs-gpr" property changed the location from the individual
> board dts "&weim" node to the common dtsi node we can no longer reach it
> via syscon_regmap_lookup_by_phandle(), so use
> syscon_regmap_lookup_by_compatible() instead, which will successfully
> find the "fsl,weim-cs-gpr" property.
>
> Fixes: 1be81ea5860744520 ("ARM: dts: imx6: Add imx-weim parameters to dtsi's")
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
NACK.
> ---
> Changes since v1:
> - Fix copy and paste error of the error message
> - Add Fixes tag
>
> drivers/bus/imx-weim.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/bus/imx-weim.c b/drivers/bus/imx-weim.c
> index 4bd361d..9824c58 100644
> --- a/drivers/bus/imx-weim.c
> +++ b/drivers/bus/imx-weim.c
> @@ -76,7 +76,7 @@ static int __init imx_weim_gpr_setup(struct platform_device *pdev)
> int cs = 0;
> int i = 0;
>
> - gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr");
> + gpr = syscon_regmap_lookup_by_compatible("fsl,weim-cs-gpr");
"fsl,weim-cs-gpr" is *not* a compatible string, while
what syscon_regmap_lookup_by_compatible() does is to find a syscon node
by its compatible string.
Your understanding about how the error message comes and the fix to it
are completely wrong.
Shawn
> if (IS_ERR(gpr)) {
> dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n");
> return 0;
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH 10/20] gpio: pca953x: Add optional reset gpio control
From: Lothar Waßmann @ 2016-12-30 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483050455-10683-11-git-send-email-steve_longerbeam@mentor.com>
Hi,
On Thu, 29 Dec 2016 14:27:25 -0800 Steve Longerbeam wrote:
> Add optional reset-gpios pin control. If present, de-assert the
> specified reset gpio pin to bring the chip out of reset.
>
> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Alexandre Courbot <gnurou@gmail.com>
> Cc: linux-gpio at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org
>
> ---
>
> v2:
> - documented optional reset-gpios property in
> Documentation/devicetree/bindings/gpio/gpio-pca953x.txt.
> ---
> Documentation/devicetree/bindings/gpio/gpio-pca953x.txt | 4 ++++
> drivers/gpio/gpio-pca953x.c | 17 +++++++++++++++++
> 2 files changed, 21 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
> index 08dd15f..da54f4c 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
> +++ b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
> @@ -29,6 +29,10 @@ Required properties:
> onsemi,pca9654
> exar,xra1202
>
> +Optional properties:
> + - reset-gpios: GPIO specification for the RESET input
> +
> +
> Example:
>
>
> diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
> index d5d72d8..d1c0bd5 100644
> --- a/drivers/gpio/gpio-pca953x.c
> +++ b/drivers/gpio/gpio-pca953x.c
> @@ -22,6 +22,7 @@
> #include <linux/of_platform.h>
> #include <linux/acpi.h>
> #include <linux/regulator/consumer.h>
> +#include <linux/gpio/consumer.h>
>
> #define PCA953X_INPUT 0
> #define PCA953X_OUTPUT 1
> @@ -133,6 +134,7 @@ struct pca953x_chip {
> const char *const *names;
> unsigned long driver_data;
> struct regulator *regulator;
> + struct gpio_desc *reset_gpio;
>
> const struct pca953x_reg_config *regs;
>
> @@ -756,6 +758,21 @@ static int pca953x_probe(struct i2c_client *client,
> } else {
> chip->gpio_start = -1;
> irq_base = 0;
> +
> + /* see if we need to de-assert a reset pin */
> + chip->reset_gpio = devm_gpiod_get_optional(&client->dev,
> + "reset",
> + GPIOD_OUT_LOW);
> + if (IS_ERR(chip->reset_gpio)) {
> + dev_err(&client->dev, "request for reset pin failed\n");
> + return PTR_ERR(chip->reset_gpio);
> + }
> +
> + if (chip->reset_gpio) {
> + /* bring chip out of reset */
> + dev_info(&client->dev, "releasing reset\n");
> + gpiod_set_value(chip->reset_gpio, 0);
>
The pin is already initialized to the inactive state thru the
GPIOD_OUT_LOW flag in devm_gpiod_get_optional(), so this call to
gpiod_set_value() is useless.
Lothar Wa?mann
^ permalink raw reply
* [PATCH] ARM: dts: vf610-zii-dev-rev-b: Add missing newline
From: Shawn Guo @ 2016-12-30 7:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161127213516.GF13318@lunn.ch>
On Sun, Nov 27, 2016 at 10:35:16PM +0100, Andrew Lunn wrote:
> On Sun, Nov 27, 2016 at 10:30:54PM +0100, Andreas F?rber wrote:
> > Hi,
> >
> > Am 27.11.2016 um 22:17 schrieb Andrew Lunn:
> > > On Sun, Nov 27, 2016 at 08:54:44PM +0100, Andreas F?rber wrote:
> > >> Found while reviewing Marvell dsa bindings usage.
> > >
> > > Hi Andreas
> > >
> > > It is good practice to put the maintainer you expect to accept the
> > > patch on the To: line. You have at least two different maintainers on
> > > Cc: so it is currently ambiguous. And these lists can be high volume,
> > > so without a copy in the maintainers inbox, patches can be overlooked.
> >
> > As a vf610 DT patch with LAKML in To I am expecting it to be handled by
> > Shawn or anyone from the NXP/ARM side.
>
> So please have Shawn as To:
>
> The patch you are fixing went through Dave Miller, who is also on Cc:,
> hence the ambiguity.
The good practice was broken from the beginning when patch "arm: vf610:
zii devel b: Add support for switch interrupts") went through net tree,
even without me on copy.
Shawn
^ permalink raw reply
* [PATCH] ARM: dts: vf610-zii-dev-rev-b: Add missing newline
From: Shawn Guo @ 2016-12-30 7:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480276484-5482-1-git-send-email-afaerber@suse.de>
On Sun, Nov 27, 2016 at 08:54:44PM +0100, Andreas F?rber wrote:
> Found while reviewing Marvell dsa bindings usage.
>
> Fixes: f283745b3caf ("arm: vf610: zii devel b: Add support for switch interrupts")
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: David S. Miller <davem@davemloft.net>
> Signed-off-by: Andreas F?rber <afaerber@suse.de>
Applied, thanks.
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox