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* [PATCH v2 2/3] stih-cec: add HPD notifier support
From: Benjamin Gaignard @ 2017-01-03 14:54 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1483455297-2286-1-git-send-email-benjamin.gaignard@linaro.org>

By using the HPD notifier framework there is no longer any reason
to manually set the physical address. This was the one blocking
issue that prevented this driver from going out of staging, so do
this move as well.

Update the bindings documentation the new hdmi phandle.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
---
version 2:
- use HPD notifier
- move stih-cec out of staging
- split driver code and devicetree change in two patches
---
 .../devicetree/bindings/media/stih-cec.txt         |   2 +
 drivers/media/platform/Kconfig                     |  10 +
 drivers/media/platform/Makefile                    |   1 +
 drivers/media/platform/sti/cec/Makefile            |   1 +
 drivers/media/platform/sti/cec/stih-cec.c          | 404 +++++++++++++++++++++
 drivers/staging/media/Kconfig                      |   2 -
 drivers/staging/media/Makefile                     |   1 -
 drivers/staging/media/st-cec/Kconfig               |   8 -
 drivers/staging/media/st-cec/Makefile              |   1 -
 drivers/staging/media/st-cec/TODO                  |   7 -
 drivers/staging/media/st-cec/stih-cec.c            | 379 -------------------
 11 files changed, 418 insertions(+), 398 deletions(-)
 create mode 100644 drivers/media/platform/sti/cec/Makefile
 create mode 100644 drivers/media/platform/sti/cec/stih-cec.c
 delete mode 100644 drivers/staging/media/st-cec/Kconfig
 delete mode 100644 drivers/staging/media/st-cec/Makefile
 delete mode 100644 drivers/staging/media/st-cec/TODO
 delete mode 100644 drivers/staging/media/st-cec/stih-cec.c

diff --git a/Documentation/devicetree/bindings/media/stih-cec.txt b/Documentation/devicetree/bindings/media/stih-cec.txt
index 71c4b2f..7d82121 100644
--- a/Documentation/devicetree/bindings/media/stih-cec.txt
+++ b/Documentation/devicetree/bindings/media/stih-cec.txt
@@ -9,6 +9,7 @@ Required properties:
  - pinctrl-names: Contains only one value - "default"
  - pinctrl-0: Specifies the pin control groups used for CEC hardware.
  - resets: Reference to a reset controller
+ - st,hdmi-handle: Phandle to the HMDI controller
 
 Example for STIH407:
 
@@ -22,4 +23,5 @@ sti-cec at 094a087c {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_cec0_default>;
 	resets = <&softreset STIH407_LPM_SOFTRESET>;
+	st,hdmi-handle = <&hdmi>;
 };
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index 0d7acf1..e5f680e 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -408,6 +408,16 @@ config VIDEO_SAMSUNG_S5P_CEC
          CEC bus is present in the HDMI connector and enables communication
          between compatible devices.
 
+config VIDEO_STI_HDMI_CEC
+       tristate "STMicroelectronics STiH4xx HDMI CEC driver"
+       depends on VIDEO_DEV && MEDIA_CEC_SUPPORT && (ARCH_STI || COMPILE_TEST)
+       select HPD_NOTIFIER
+       ---help---
+         This is a driver for STIH4xx HDMI CEC interface. It uses the
+         generic CEC framework interface.
+         CEC bus is present in the HDMI connector and enables communication
+         between compatible devices.
+
 endif #V4L_CEC_DRIVERS
 
 menuconfig V4L_TEST_DRIVERS
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index ad3bf22..01b689c 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC)	+= exynos-gsc/
 obj-$(CONFIG_VIDEO_STI_BDISP)		+= sti/bdisp/
 obj-$(CONFIG_VIDEO_STI_HVA)		+= sti/hva/
 obj-$(CONFIG_DVB_C8SECTPFE)		+= sti/c8sectpfe/
+obj-$(CONFIG_VIDEO_STI_HDMI_CEC) 	+= sti/cec/
 
 obj-$(CONFIG_BLACKFIN)                  += blackfin/
 
diff --git a/drivers/media/platform/sti/cec/Makefile b/drivers/media/platform/sti/cec/Makefile
new file mode 100644
index 0000000..f07905e
--- /dev/null
+++ b/drivers/media/platform/sti/cec/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_VIDEO_STI_HDMI_CEC) += stih-cec.o
diff --git a/drivers/media/platform/sti/cec/stih-cec.c b/drivers/media/platform/sti/cec/stih-cec.c
new file mode 100644
index 0000000..e50e916
--- /dev/null
+++ b/drivers/media/platform/sti/cec/stih-cec.c
@@ -0,0 +1,404 @@
+/*
+ * STIH4xx CEC driver
+ * Copyright (C) STMicroelectronic SA 2016
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/clk.h>
+#include <linux/hpd-notifier.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+#include <media/cec.h>
+
+#define CEC_NAME	"stih-cec"
+
+/* CEC registers  */
+#define CEC_CLK_DIV           0x0
+#define CEC_CTRL              0x4
+#define CEC_IRQ_CTRL          0x8
+#define CEC_STATUS            0xC
+#define CEC_EXT_STATUS        0x10
+#define CEC_TX_CTRL           0x14
+#define CEC_FREE_TIME_THRESH  0x18
+#define CEC_BIT_TOUT_THRESH   0x1C
+#define CEC_BIT_PULSE_THRESH  0x20
+#define CEC_DATA              0x24
+#define CEC_TX_ARRAY_CTRL     0x28
+#define CEC_CTRL2             0x2C
+#define CEC_TX_ERROR_STS      0x30
+#define CEC_ADDR_TABLE        0x34
+#define CEC_DATA_ARRAY_CTRL   0x38
+#define CEC_DATA_ARRAY_STATUS 0x3C
+#define CEC_TX_DATA_BASE      0x40
+#define CEC_TX_DATA_TOP       0x50
+#define CEC_TX_DATA_SIZE      0x1
+#define CEC_RX_DATA_BASE      0x54
+#define CEC_RX_DATA_TOP       0x64
+#define CEC_RX_DATA_SIZE      0x1
+
+/* CEC_CTRL2 */
+#define CEC_LINE_INACTIVE_EN   BIT(0)
+#define CEC_AUTO_BUS_ERR_EN    BIT(1)
+#define CEC_STOP_ON_ARB_ERR_EN BIT(2)
+#define CEC_TX_REQ_WAIT_EN     BIT(3)
+
+/* CEC_DATA_ARRAY_CTRL */
+#define CEC_TX_ARRAY_EN          BIT(0)
+#define CEC_RX_ARRAY_EN          BIT(1)
+#define CEC_TX_ARRAY_RESET       BIT(2)
+#define CEC_RX_ARRAY_RESET       BIT(3)
+#define CEC_TX_N_OF_BYTES_IRQ_EN BIT(4)
+#define CEC_TX_STOP_ON_NACK      BIT(7)
+
+/* CEC_TX_ARRAY_CTRL */
+#define CEC_TX_N_OF_BYTES  0x1F
+#define CEC_TX_START       BIT(5)
+#define CEC_TX_AUTO_SOM_EN BIT(6)
+#define CEC_TX_AUTO_EOM_EN BIT(7)
+
+/* CEC_IRQ_CTRL */
+#define CEC_TX_DONE_IRQ_EN   BIT(0)
+#define CEC_ERROR_IRQ_EN     BIT(2)
+#define CEC_RX_DONE_IRQ_EN   BIT(3)
+#define CEC_RX_SOM_IRQ_EN    BIT(4)
+#define CEC_RX_EOM_IRQ_EN    BIT(5)
+#define CEC_FREE_TIME_IRQ_EN BIT(6)
+#define CEC_PIN_STS_IRQ_EN   BIT(7)
+
+/* CEC_CTRL */
+#define CEC_IN_FILTER_EN    BIT(0)
+#define CEC_PWR_SAVE_EN     BIT(1)
+#define CEC_EN              BIT(4)
+#define CEC_ACK_CTRL        BIT(5)
+#define CEC_RX_RESET_EN     BIT(6)
+#define CEC_IGNORE_RX_ERROR BIT(7)
+
+/* CEC_STATUS */
+#define CEC_TX_DONE_STS       BIT(0)
+#define CEC_TX_ACK_GET_STS    BIT(1)
+#define CEC_ERROR_STS         BIT(2)
+#define CEC_RX_DONE_STS       BIT(3)
+#define CEC_RX_SOM_STS        BIT(4)
+#define CEC_RX_EOM_STS        BIT(5)
+#define CEC_FREE_TIME_IRQ_STS BIT(6)
+#define CEC_PIN_STS           BIT(7)
+#define CEC_SBIT_TOUT_STS     BIT(8)
+#define CEC_DBIT_TOUT_STS     BIT(9)
+#define CEC_LPULSE_ERROR_STS  BIT(10)
+#define CEC_HPULSE_ERROR_STS  BIT(11)
+#define CEC_TX_ERROR          BIT(12)
+#define CEC_TX_ARB_ERROR      BIT(13)
+#define CEC_RX_ERROR_MIN      BIT(14)
+#define CEC_RX_ERROR_MAX      BIT(15)
+
+/* Signal free time in bit periods (2.4ms) */
+#define CEC_PRESENT_INIT_SFT 7
+#define CEC_NEW_INIT_SFT     5
+#define CEC_RETRANSMIT_SFT   3
+
+/* Constants for CEC_BIT_TOUT_THRESH register */
+#define CEC_SBIT_TOUT_47MS BIT(1)
+#define CEC_SBIT_TOUT_48MS (BIT(0) | BIT(1))
+#define CEC_SBIT_TOUT_50MS BIT(2)
+#define CEC_DBIT_TOUT_27MS BIT(0)
+#define CEC_DBIT_TOUT_28MS BIT(1)
+#define CEC_DBIT_TOUT_29MS (BIT(0) | BIT(1))
+
+/* Constants for CEC_BIT_PULSE_THRESH register */
+#define CEC_BIT_LPULSE_03MS BIT(1)
+#define CEC_BIT_HPULSE_03MS BIT(3)
+
+/* Constants for CEC_DATA_ARRAY_STATUS register */
+#define CEC_RX_N_OF_BYTES                     0x1F
+#define CEC_TX_N_OF_BYTES_SENT                BIT(5)
+#define CEC_RX_OVERRUN                        BIT(6)
+
+struct stih_cec {
+	struct cec_adapter	*adap;
+	struct device		*dev;
+	struct clk		*clk;
+	void __iomem		*regs;
+	int			irq;
+	u32			irq_status;
+	struct hpd_notifier	*notifier;
+};
+
+static int stih_cec_adap_enable(struct cec_adapter *adap, bool enable)
+{
+	struct stih_cec *cec = adap->priv;
+
+	if (enable) {
+		/* The doc says (input TCLK_PERIOD * CEC_CLK_DIV) = 0.1ms */
+		unsigned long clk_freq = clk_get_rate(cec->clk);
+		u32 cec_clk_div = clk_freq / 10000;
+
+		writel(cec_clk_div, cec->regs + CEC_CLK_DIV);
+
+		/* Configuration of the durations activating a timeout */
+		writel(CEC_SBIT_TOUT_47MS | (CEC_DBIT_TOUT_28MS << 4),
+		       cec->regs + CEC_BIT_TOUT_THRESH);
+
+		/* Configuration of the smallest allowed duration for pulses */
+		writel(CEC_BIT_LPULSE_03MS | CEC_BIT_HPULSE_03MS,
+		       cec->regs + CEC_BIT_PULSE_THRESH);
+
+		/* Minimum received bit period threshold */
+		writel(BIT(5) | BIT(7), cec->regs + CEC_TX_CTRL);
+
+		/* Configuration of transceiver data arrays */
+		writel(CEC_TX_ARRAY_EN | CEC_RX_ARRAY_EN | CEC_TX_STOP_ON_NACK,
+		       cec->regs + CEC_DATA_ARRAY_CTRL);
+
+		/* Configuration of the control bits for CEC Transceiver */
+		writel(CEC_IN_FILTER_EN | CEC_EN | CEC_RX_RESET_EN,
+		       cec->regs + CEC_CTRL);
+
+		/* Clear logical addresses */
+		writel(0, cec->regs + CEC_ADDR_TABLE);
+
+		/* Clear the status register */
+		writel(0x0, cec->regs + CEC_STATUS);
+
+		/* Enable the interrupts */
+		writel(CEC_TX_DONE_IRQ_EN | CEC_RX_DONE_IRQ_EN |
+		       CEC_RX_SOM_IRQ_EN | CEC_RX_EOM_IRQ_EN |
+		       CEC_ERROR_IRQ_EN,
+		       cec->regs + CEC_IRQ_CTRL);
+
+	} else {
+		/* Clear logical addresses */
+		writel(0, cec->regs + CEC_ADDR_TABLE);
+
+		/* Clear the status register */
+		writel(0x0, cec->regs + CEC_STATUS);
+
+		/* Disable the interrupts */
+		writel(0, cec->regs + CEC_IRQ_CTRL);
+	}
+
+	return 0;
+}
+
+static int stih_cec_adap_log_addr(struct cec_adapter *adap, u8 logical_addr)
+{
+	struct stih_cec *cec = adap->priv;
+	u32 reg = readl(cec->regs + CEC_ADDR_TABLE);
+
+	reg |= 1 << logical_addr;
+
+	if (logical_addr == CEC_LOG_ADDR_INVALID)
+		reg = 0;
+
+	writel(reg, cec->regs + CEC_ADDR_TABLE);
+
+	return 0;
+}
+
+static int stih_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
+				  u32 signal_free_time, struct cec_msg *msg)
+{
+	struct stih_cec *cec = adap->priv;
+	int i;
+
+	/* Copy message into registers */
+	for (i = 0; i < msg->len; i++)
+		writeb(msg->msg[i], cec->regs + CEC_TX_DATA_BASE + i);
+
+	/* Start transmission, configure hardware to add start and stop bits
+	 * Signal free time is handled by the hardware
+	 */
+	writel(CEC_TX_AUTO_SOM_EN | CEC_TX_AUTO_EOM_EN | CEC_TX_START |
+	       msg->len, cec->regs + CEC_TX_ARRAY_CTRL);
+
+	return 0;
+}
+
+static void stih_tx_done(struct stih_cec *cec, u32 status)
+{
+	if (status & CEC_TX_ERROR) {
+		cec_transmit_done(cec->adap, CEC_TX_STATUS_ERROR, 0, 0, 0, 1);
+		return;
+	}
+
+	if (status & CEC_TX_ARB_ERROR) {
+		cec_transmit_done(cec->adap,
+				  CEC_TX_STATUS_ARB_LOST, 1, 0, 0, 0);
+		return;
+	}
+
+	if (!(status & CEC_TX_ACK_GET_STS)) {
+		cec_transmit_done(cec->adap, CEC_TX_STATUS_NACK, 0, 1, 0, 0);
+		return;
+	}
+
+	cec_transmit_done(cec->adap, CEC_TX_STATUS_OK, 0, 0, 0, 0);
+}
+
+static void stih_rx_done(struct stih_cec *cec, u32 status)
+{
+	struct cec_msg msg = {};
+	u8 i;
+
+	if (status & CEC_RX_ERROR_MIN)
+		return;
+
+	if (status & CEC_RX_ERROR_MAX)
+		return;
+
+	msg.len = readl(cec->regs + CEC_DATA_ARRAY_STATUS) & 0x1f;
+
+	if (!msg.len)
+		return;
+
+	if (msg.len > 16)
+		msg.len = 16;
+
+	for (i = 0; i < msg.len; i++)
+		msg.msg[i] = readl(cec->regs + CEC_RX_DATA_BASE + i);
+
+	cec_received_msg(cec->adap, &msg);
+}
+
+static irqreturn_t stih_cec_irq_handler_thread(int irq, void *priv)
+{
+	struct stih_cec *cec = priv;
+
+	if (cec->irq_status & CEC_TX_DONE_STS)
+		stih_tx_done(cec, cec->irq_status);
+
+	if (cec->irq_status & CEC_RX_DONE_STS)
+		stih_rx_done(cec, cec->irq_status);
+
+	cec->irq_status = 0;
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t stih_cec_irq_handler(int irq, void *priv)
+{
+	struct stih_cec *cec = priv;
+
+	cec->irq_status = readl(cec->regs + CEC_STATUS);
+	writel(cec->irq_status, cec->regs + CEC_STATUS);
+
+	return IRQ_WAKE_THREAD;
+}
+
+static const struct cec_adap_ops sti_cec_adap_ops = {
+	.adap_enable = stih_cec_adap_enable,
+	.adap_log_addr = stih_cec_adap_log_addr,
+	.adap_transmit = stih_cec_adap_transmit,
+};
+
+static int stih_cec_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct resource *res;
+	struct stih_cec *cec;
+	struct device_node *np;
+	struct platform_device *hdmi_dev;
+	int ret;
+
+	cec = devm_kzalloc(dev, sizeof(*cec), GFP_KERNEL);
+	if (!cec)
+		return -ENOMEM;
+
+	np = of_parse_phandle(pdev->dev.of_node, "st,hdmi-handle", 0);
+
+	if (!np) {
+		dev_err(&pdev->dev, "Failed to find hdmi node in device tree\n");
+		return -ENODEV;
+	}
+
+	hdmi_dev = of_find_device_by_node(np);
+	if (!hdmi_dev)
+		return -EPROBE_DEFER;
+
+	cec->notifier = hpd_notifier_get(&hdmi_dev->dev);
+	if (!cec->notifier)
+		return -ENOMEM;
+
+	cec->dev = dev;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	cec->regs = devm_ioremap_resource(dev, res);
+	if (IS_ERR(cec->regs))
+		return PTR_ERR(cec->regs);
+
+	cec->irq = platform_get_irq(pdev, 0);
+	if (cec->irq < 0)
+		return cec->irq;
+
+	ret = devm_request_threaded_irq(dev, cec->irq, stih_cec_irq_handler,
+					stih_cec_irq_handler_thread, 0,
+					pdev->name, cec);
+	if (ret)
+		return ret;
+
+	cec->clk = devm_clk_get(dev, "cec-clk");
+	if (IS_ERR(cec->clk)) {
+		dev_err(dev, "Cannot get cec clock\n");
+		return PTR_ERR(cec->clk);
+	}
+
+	cec->adap = cec_allocate_adapter(&sti_cec_adap_ops, cec,
+			CEC_NAME,
+			CEC_CAP_LOG_ADDRS | CEC_CAP_PASSTHROUGH |
+			CEC_CAP_TRANSMIT, 1);
+	ret = PTR_ERR_OR_ZERO(cec->adap);
+	if (ret)
+		return ret;
+
+	ret = cec_register_adapter(cec->adap, &pdev->dev);
+	if (ret) {
+		cec_delete_adapter(cec->adap);
+		return ret;
+	}
+
+	cec_register_hpd_notifier(cec->adap, cec->notifier);
+
+	platform_set_drvdata(pdev, cec);
+	return 0;
+}
+
+static int stih_cec_remove(struct platform_device *pdev)
+{
+	struct stih_cec *cec = platform_get_drvdata(pdev);
+
+	cec_unregister_adapter(cec->adap);
+	hpd_notifier_put(cec->notifier);
+
+	return 0;
+}
+
+static const struct of_device_id stih_cec_match[] = {
+	{
+		.compatible	= "st,stih-cec",
+	},
+	{},
+};
+MODULE_DEVICE_TABLE(of, stih_cec_match);
+
+static struct platform_driver stih_cec_pdrv = {
+	.probe	= stih_cec_probe,
+	.remove = stih_cec_remove,
+	.driver = {
+		.name		= CEC_NAME,
+		.of_match_table	= stih_cec_match,
+	},
+};
+
+module_platform_driver(stih_cec_pdrv);
+
+MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@linaro.org>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("STIH4xx CEC driver");
diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig
index 1b7804c..d4f50f0 100644
--- a/drivers/staging/media/Kconfig
+++ b/drivers/staging/media/Kconfig
@@ -30,6 +30,4 @@ source "drivers/staging/media/omap4iss/Kconfig"
 # Keep LIRC at the end, as it has sub-menus
 source "drivers/staging/media/lirc/Kconfig"
 
-source "drivers/staging/media/st-cec/Kconfig"
-
 endif
diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile
index e11afbf..4c9bb23 100644
--- a/drivers/staging/media/Makefile
+++ b/drivers/staging/media/Makefile
@@ -3,4 +3,3 @@ obj-$(CONFIG_DVB_CXD2099)	+= cxd2099/
 obj-$(CONFIG_LIRC_STAGING)	+= lirc/
 obj-$(CONFIG_VIDEO_DM365_VPFE)	+= davinci_vpfe/
 obj-$(CONFIG_VIDEO_OMAP4)	+= omap4iss/
-obj-$(CONFIG_VIDEO_STI_HDMI_CEC) += st-cec/
diff --git a/drivers/staging/media/st-cec/Kconfig b/drivers/staging/media/st-cec/Kconfig
deleted file mode 100644
index c04283d..0000000
--- a/drivers/staging/media/st-cec/Kconfig
+++ /dev/null
@@ -1,8 +0,0 @@
-config VIDEO_STI_HDMI_CEC
-       tristate "STMicroelectronics STiH4xx HDMI CEC driver"
-       depends on VIDEO_DEV && MEDIA_CEC_SUPPORT && (ARCH_STI || COMPILE_TEST)
-       ---help---
-         This is a driver for STIH4xx HDMI CEC interface. It uses the
-         generic CEC framework interface.
-         CEC bus is present in the HDMI connector and enables communication
-         between compatible devices.
diff --git a/drivers/staging/media/st-cec/Makefile b/drivers/staging/media/st-cec/Makefile
deleted file mode 100644
index f07905e..0000000
--- a/drivers/staging/media/st-cec/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-obj-$(CONFIG_VIDEO_STI_HDMI_CEC) += stih-cec.o
diff --git a/drivers/staging/media/st-cec/TODO b/drivers/staging/media/st-cec/TODO
deleted file mode 100644
index c612897..0000000
--- a/drivers/staging/media/st-cec/TODO
+++ /dev/null
@@ -1,7 +0,0 @@
-This driver requires that userspace sets the physical address.
-However, this should be passed on from the corresponding
-ST HDMI driver.
-
-We have to wait until the HDMI notifier framework has been merged
-in order to handle this gracefully, until that time this driver
-has to remain in staging.
diff --git a/drivers/staging/media/st-cec/stih-cec.c b/drivers/staging/media/st-cec/stih-cec.c
deleted file mode 100644
index 3c25638..0000000
--- a/drivers/staging/media/st-cec/stih-cec.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/*
- * drivers/staging/media/st-cec/stih-cec.c
- *
- * STIH4xx CEC driver
- * Copyright (C) STMicroelectronic SA 2016
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/clk.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/mfd/syscon.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/platform_device.h>
-
-#include <media/cec.h>
-
-#define CEC_NAME	"stih-cec"
-
-/* CEC registers  */
-#define CEC_CLK_DIV           0x0
-#define CEC_CTRL              0x4
-#define CEC_IRQ_CTRL          0x8
-#define CEC_STATUS            0xC
-#define CEC_EXT_STATUS        0x10
-#define CEC_TX_CTRL           0x14
-#define CEC_FREE_TIME_THRESH  0x18
-#define CEC_BIT_TOUT_THRESH   0x1C
-#define CEC_BIT_PULSE_THRESH  0x20
-#define CEC_DATA              0x24
-#define CEC_TX_ARRAY_CTRL     0x28
-#define CEC_CTRL2             0x2C
-#define CEC_TX_ERROR_STS      0x30
-#define CEC_ADDR_TABLE        0x34
-#define CEC_DATA_ARRAY_CTRL   0x38
-#define CEC_DATA_ARRAY_STATUS 0x3C
-#define CEC_TX_DATA_BASE      0x40
-#define CEC_TX_DATA_TOP       0x50
-#define CEC_TX_DATA_SIZE      0x1
-#define CEC_RX_DATA_BASE      0x54
-#define CEC_RX_DATA_TOP       0x64
-#define CEC_RX_DATA_SIZE      0x1
-
-/* CEC_CTRL2 */
-#define CEC_LINE_INACTIVE_EN   BIT(0)
-#define CEC_AUTO_BUS_ERR_EN    BIT(1)
-#define CEC_STOP_ON_ARB_ERR_EN BIT(2)
-#define CEC_TX_REQ_WAIT_EN     BIT(3)
-
-/* CEC_DATA_ARRAY_CTRL */
-#define CEC_TX_ARRAY_EN          BIT(0)
-#define CEC_RX_ARRAY_EN          BIT(1)
-#define CEC_TX_ARRAY_RESET       BIT(2)
-#define CEC_RX_ARRAY_RESET       BIT(3)
-#define CEC_TX_N_OF_BYTES_IRQ_EN BIT(4)
-#define CEC_TX_STOP_ON_NACK      BIT(7)
-
-/* CEC_TX_ARRAY_CTRL */
-#define CEC_TX_N_OF_BYTES  0x1F
-#define CEC_TX_START       BIT(5)
-#define CEC_TX_AUTO_SOM_EN BIT(6)
-#define CEC_TX_AUTO_EOM_EN BIT(7)
-
-/* CEC_IRQ_CTRL */
-#define CEC_TX_DONE_IRQ_EN   BIT(0)
-#define CEC_ERROR_IRQ_EN     BIT(2)
-#define CEC_RX_DONE_IRQ_EN   BIT(3)
-#define CEC_RX_SOM_IRQ_EN    BIT(4)
-#define CEC_RX_EOM_IRQ_EN    BIT(5)
-#define CEC_FREE_TIME_IRQ_EN BIT(6)
-#define CEC_PIN_STS_IRQ_EN   BIT(7)
-
-/* CEC_CTRL */
-#define CEC_IN_FILTER_EN    BIT(0)
-#define CEC_PWR_SAVE_EN     BIT(1)
-#define CEC_EN              BIT(4)
-#define CEC_ACK_CTRL        BIT(5)
-#define CEC_RX_RESET_EN     BIT(6)
-#define CEC_IGNORE_RX_ERROR BIT(7)
-
-/* CEC_STATUS */
-#define CEC_TX_DONE_STS       BIT(0)
-#define CEC_TX_ACK_GET_STS    BIT(1)
-#define CEC_ERROR_STS         BIT(2)
-#define CEC_RX_DONE_STS       BIT(3)
-#define CEC_RX_SOM_STS        BIT(4)
-#define CEC_RX_EOM_STS        BIT(5)
-#define CEC_FREE_TIME_IRQ_STS BIT(6)
-#define CEC_PIN_STS           BIT(7)
-#define CEC_SBIT_TOUT_STS     BIT(8)
-#define CEC_DBIT_TOUT_STS     BIT(9)
-#define CEC_LPULSE_ERROR_STS  BIT(10)
-#define CEC_HPULSE_ERROR_STS  BIT(11)
-#define CEC_TX_ERROR          BIT(12)
-#define CEC_TX_ARB_ERROR      BIT(13)
-#define CEC_RX_ERROR_MIN      BIT(14)
-#define CEC_RX_ERROR_MAX      BIT(15)
-
-/* Signal free time in bit periods (2.4ms) */
-#define CEC_PRESENT_INIT_SFT 7
-#define CEC_NEW_INIT_SFT     5
-#define CEC_RETRANSMIT_SFT   3
-
-/* Constants for CEC_BIT_TOUT_THRESH register */
-#define CEC_SBIT_TOUT_47MS BIT(1)
-#define CEC_SBIT_TOUT_48MS (BIT(0) | BIT(1))
-#define CEC_SBIT_TOUT_50MS BIT(2)
-#define CEC_DBIT_TOUT_27MS BIT(0)
-#define CEC_DBIT_TOUT_28MS BIT(1)
-#define CEC_DBIT_TOUT_29MS (BIT(0) | BIT(1))
-
-/* Constants for CEC_BIT_PULSE_THRESH register */
-#define CEC_BIT_LPULSE_03MS BIT(1)
-#define CEC_BIT_HPULSE_03MS BIT(3)
-
-/* Constants for CEC_DATA_ARRAY_STATUS register */
-#define CEC_RX_N_OF_BYTES                     0x1F
-#define CEC_TX_N_OF_BYTES_SENT                BIT(5)
-#define CEC_RX_OVERRUN                        BIT(6)
-
-struct stih_cec {
-	struct cec_adapter	*adap;
-	struct device		*dev;
-	struct clk		*clk;
-	void __iomem		*regs;
-	int			irq;
-	u32			irq_status;
-};
-
-static int stih_cec_adap_enable(struct cec_adapter *adap, bool enable)
-{
-	struct stih_cec *cec = adap->priv;
-
-	if (enable) {
-		/* The doc says (input TCLK_PERIOD * CEC_CLK_DIV) = 0.1ms */
-		unsigned long clk_freq = clk_get_rate(cec->clk);
-		u32 cec_clk_div = clk_freq / 10000;
-
-		writel(cec_clk_div, cec->regs + CEC_CLK_DIV);
-
-		/* Configuration of the durations activating a timeout */
-		writel(CEC_SBIT_TOUT_47MS | (CEC_DBIT_TOUT_28MS << 4),
-		       cec->regs + CEC_BIT_TOUT_THRESH);
-
-		/* Configuration of the smallest allowed duration for pulses */
-		writel(CEC_BIT_LPULSE_03MS | CEC_BIT_HPULSE_03MS,
-		       cec->regs + CEC_BIT_PULSE_THRESH);
-
-		/* Minimum received bit period threshold */
-		writel(BIT(5) | BIT(7), cec->regs + CEC_TX_CTRL);
-
-		/* Configuration of transceiver data arrays */
-		writel(CEC_TX_ARRAY_EN | CEC_RX_ARRAY_EN | CEC_TX_STOP_ON_NACK,
-		       cec->regs + CEC_DATA_ARRAY_CTRL);
-
-		/* Configuration of the control bits for CEC Transceiver */
-		writel(CEC_IN_FILTER_EN | CEC_EN | CEC_RX_RESET_EN,
-		       cec->regs + CEC_CTRL);
-
-		/* Clear logical addresses */
-		writel(0, cec->regs + CEC_ADDR_TABLE);
-
-		/* Clear the status register */
-		writel(0x0, cec->regs + CEC_STATUS);
-
-		/* Enable the interrupts */
-		writel(CEC_TX_DONE_IRQ_EN | CEC_RX_DONE_IRQ_EN |
-		       CEC_RX_SOM_IRQ_EN | CEC_RX_EOM_IRQ_EN |
-		       CEC_ERROR_IRQ_EN,
-		       cec->regs + CEC_IRQ_CTRL);
-
-	} else {
-		/* Clear logical addresses */
-		writel(0, cec->regs + CEC_ADDR_TABLE);
-
-		/* Clear the status register */
-		writel(0x0, cec->regs + CEC_STATUS);
-
-		/* Disable the interrupts */
-		writel(0, cec->regs + CEC_IRQ_CTRL);
-	}
-
-	return 0;
-}
-
-static int stih_cec_adap_log_addr(struct cec_adapter *adap, u8 logical_addr)
-{
-	struct stih_cec *cec = adap->priv;
-	u32 reg = readl(cec->regs + CEC_ADDR_TABLE);
-
-	reg |= 1 << logical_addr;
-
-	if (logical_addr == CEC_LOG_ADDR_INVALID)
-		reg = 0;
-
-	writel(reg, cec->regs + CEC_ADDR_TABLE);
-
-	return 0;
-}
-
-static int stih_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
-				  u32 signal_free_time, struct cec_msg *msg)
-{
-	struct stih_cec *cec = adap->priv;
-	int i;
-
-	/* Copy message into registers */
-	for (i = 0; i < msg->len; i++)
-		writeb(msg->msg[i], cec->regs + CEC_TX_DATA_BASE + i);
-
-	/* Start transmission, configure hardware to add start and stop bits
-	 * Signal free time is handled by the hardware
-	 */
-	writel(CEC_TX_AUTO_SOM_EN | CEC_TX_AUTO_EOM_EN | CEC_TX_START |
-	       msg->len, cec->regs + CEC_TX_ARRAY_CTRL);
-
-	return 0;
-}
-
-static void stih_tx_done(struct stih_cec *cec, u32 status)
-{
-	if (status & CEC_TX_ERROR) {
-		cec_transmit_done(cec->adap, CEC_TX_STATUS_ERROR, 0, 0, 0, 1);
-		return;
-	}
-
-	if (status & CEC_TX_ARB_ERROR) {
-		cec_transmit_done(cec->adap,
-				  CEC_TX_STATUS_ARB_LOST, 1, 0, 0, 0);
-		return;
-	}
-
-	if (!(status & CEC_TX_ACK_GET_STS)) {
-		cec_transmit_done(cec->adap, CEC_TX_STATUS_NACK, 0, 1, 0, 0);
-		return;
-	}
-
-	cec_transmit_done(cec->adap, CEC_TX_STATUS_OK, 0, 0, 0, 0);
-}
-
-static void stih_rx_done(struct stih_cec *cec, u32 status)
-{
-	struct cec_msg msg = {};
-	u8 i;
-
-	if (status & CEC_RX_ERROR_MIN)
-		return;
-
-	if (status & CEC_RX_ERROR_MAX)
-		return;
-
-	msg.len = readl(cec->regs + CEC_DATA_ARRAY_STATUS) & 0x1f;
-
-	if (!msg.len)
-		return;
-
-	if (msg.len > 16)
-		msg.len = 16;
-
-	for (i = 0; i < msg.len; i++)
-		msg.msg[i] = readl(cec->regs + CEC_RX_DATA_BASE + i);
-
-	cec_received_msg(cec->adap, &msg);
-}
-
-static irqreturn_t stih_cec_irq_handler_thread(int irq, void *priv)
-{
-	struct stih_cec *cec = priv;
-
-	if (cec->irq_status & CEC_TX_DONE_STS)
-		stih_tx_done(cec, cec->irq_status);
-
-	if (cec->irq_status & CEC_RX_DONE_STS)
-		stih_rx_done(cec, cec->irq_status);
-
-	cec->irq_status = 0;
-
-	return IRQ_HANDLED;
-}
-
-static irqreturn_t stih_cec_irq_handler(int irq, void *priv)
-{
-	struct stih_cec *cec = priv;
-
-	cec->irq_status = readl(cec->regs + CEC_STATUS);
-	writel(cec->irq_status, cec->regs + CEC_STATUS);
-
-	return IRQ_WAKE_THREAD;
-}
-
-static const struct cec_adap_ops sti_cec_adap_ops = {
-	.adap_enable = stih_cec_adap_enable,
-	.adap_log_addr = stih_cec_adap_log_addr,
-	.adap_transmit = stih_cec_adap_transmit,
-};
-
-static int stih_cec_probe(struct platform_device *pdev)
-{
-	struct device *dev = &pdev->dev;
-	struct resource *res;
-	struct stih_cec *cec;
-	int ret;
-
-	cec = devm_kzalloc(dev, sizeof(*cec), GFP_KERNEL);
-	if (!cec)
-		return -ENOMEM;
-
-	cec->dev = dev;
-
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	cec->regs = devm_ioremap_resource(dev, res);
-	if (IS_ERR(cec->regs))
-		return PTR_ERR(cec->regs);
-
-	cec->irq = platform_get_irq(pdev, 0);
-	if (cec->irq < 0)
-		return cec->irq;
-
-	ret = devm_request_threaded_irq(dev, cec->irq, stih_cec_irq_handler,
-					stih_cec_irq_handler_thread, 0,
-					pdev->name, cec);
-	if (ret)
-		return ret;
-
-	cec->clk = devm_clk_get(dev, "cec-clk");
-	if (IS_ERR(cec->clk)) {
-		dev_err(dev, "Cannot get cec clock\n");
-		return PTR_ERR(cec->clk);
-	}
-
-	cec->adap = cec_allocate_adapter(&sti_cec_adap_ops, cec,
-			CEC_NAME,
-			CEC_CAP_LOG_ADDRS | CEC_CAP_PASSTHROUGH |
-			CEC_CAP_PHYS_ADDR | CEC_CAP_TRANSMIT, 1);
-	ret = PTR_ERR_OR_ZERO(cec->adap);
-	if (ret)
-		return ret;
-
-	ret = cec_register_adapter(cec->adap, &pdev->dev);
-	if (ret) {
-		cec_delete_adapter(cec->adap);
-		return ret;
-	}
-
-	platform_set_drvdata(pdev, cec);
-	return 0;
-}
-
-static int stih_cec_remove(struct platform_device *pdev)
-{
-	return 0;
-}
-
-static const struct of_device_id stih_cec_match[] = {
-	{
-		.compatible	= "st,stih-cec",
-	},
-	{},
-};
-MODULE_DEVICE_TABLE(of, stih_cec_match);
-
-static struct platform_driver stih_cec_pdrv = {
-	.probe	= stih_cec_probe,
-	.remove = stih_cec_remove,
-	.driver = {
-		.name		= CEC_NAME,
-		.of_match_table	= stih_cec_match,
-	},
-};
-
-module_platform_driver(stih_cec_pdrv);
-
-MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@linaro.org>");
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("STIH4xx CEC driver");
-- 
1.9.1

^ permalink raw reply related

* [PATCH v2 1/3] sti: hdmi: add HPD notifier support
From: Benjamin Gaignard @ 2017-01-03 14:54 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1483455297-2286-1-git-send-email-benjamin.gaignard@linaro.org>

Implement the HPD notifier support to allow CEC drivers to
be informed when there is a new EDID and when a connect or
disconnect happens.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>

---
version 2:
- use HPD notifier instead of HDMI notifier
---
 drivers/gpu/drm/sti/Kconfig    |  1 +
 drivers/gpu/drm/sti/sti_hdmi.c | 14 ++++++++++++++
 drivers/gpu/drm/sti/sti_hdmi.h |  3 +++
 3 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/sti/Kconfig b/drivers/gpu/drm/sti/Kconfig
index acd7286..f5c9572 100644
--- a/drivers/gpu/drm/sti/Kconfig
+++ b/drivers/gpu/drm/sti/Kconfig
@@ -8,5 +8,6 @@ config DRM_STI
 	select DRM_PANEL
 	select FW_LOADER
 	select SND_SOC_HDMI_CODEC if SND_SOC
+	select HPD_NOTIFIER
 	help
 	  Choose this option to enable DRM on STM stiH4xx chipset
diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c
index 376b076..d32a383 100644
--- a/drivers/gpu/drm/sti/sti_hdmi.c
+++ b/drivers/gpu/drm/sti/sti_hdmi.c
@@ -786,6 +786,8 @@ static void sti_hdmi_disable(struct drm_bridge *bridge)
 	clk_disable_unprepare(hdmi->clk_pix);
 
 	hdmi->enabled = false;
+
+	hpd_event_disconnect(hdmi->notifier);
 }
 
 static void sti_hdmi_pre_enable(struct drm_bridge *bridge)
@@ -892,6 +894,9 @@ static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
 	if (!edid)
 		goto fail;
 
+	hpd_event_new_edid(hdmi->notifier, edid,
+			   EDID_LENGTH * (edid->extensions + 1));
+
 	count = drm_add_edid_modes(connector, edid);
 	drm_mode_connector_update_edid_property(connector, edid);
 	drm_edid_to_eld(connector, edid);
@@ -949,10 +954,12 @@ struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = {
 
 	if (hdmi->hpd) {
 		DRM_DEBUG_DRIVER("hdmi cable connected\n");
+		hpd_event_connect(hdmi->notifier);
 		return connector_status_connected;
 	}
 
 	DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
+	hpd_event_disconnect(hdmi->notifier);
 	return connector_status_disconnected;
 }
 
@@ -1464,6 +1471,10 @@ static int sti_hdmi_probe(struct platform_device *pdev)
 		goto release_adapter;
 	}
 
+	hdmi->notifier = hpd_notifier_get(&pdev->dev);
+	if (!hdmi->notifier)
+		goto release_adapter;
+
 	hdmi->reset = devm_reset_control_get(dev, "hdmi");
 	/* Take hdmi out of reset */
 	if (!IS_ERR(hdmi->reset))
@@ -1483,11 +1494,14 @@ static int sti_hdmi_remove(struct platform_device *pdev)
 {
 	struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
 
+	hpd_event_disconnect(hdmi->notifier);
+
 	i2c_put_adapter(hdmi->ddc_adapt);
 	if (hdmi->audio_pdev)
 		platform_device_unregister(hdmi->audio_pdev);
 	component_del(&pdev->dev, &sti_hdmi_ops);
 
+	hpd_notifier_put(hdmi->notifier);
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/sti/sti_hdmi.h b/drivers/gpu/drm/sti/sti_hdmi.h
index 119bc35..2109c97 100644
--- a/drivers/gpu/drm/sti/sti_hdmi.h
+++ b/drivers/gpu/drm/sti/sti_hdmi.h
@@ -8,6 +8,7 @@
 #define _STI_HDMI_H_
 
 #include <linux/hdmi.h>
+#include <linux/hpd-notifier.h>
 #include <linux/platform_device.h>
 
 #include <drm/drmP.h>
@@ -77,6 +78,7 @@ enum sti_hdmi_modes {
  * @audio_pdev: ASoC hdmi-codec platform device
  * @audio: hdmi audio parameters.
  * @drm_connector: hdmi connector
+ * @notifier: hotplug detect notifier
  */
 struct sti_hdmi {
 	struct device dev;
@@ -102,6 +104,7 @@ struct sti_hdmi {
 	struct platform_device *audio_pdev;
 	struct hdmi_audio_params audio;
 	struct drm_connector *drm_connector;
+	struct hpd_notifier *notifier;
 };
 
 u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
-- 
1.9.1

^ permalink raw reply related

* [PATCH v2 0/3] video/sti/cec: add HPD notifier support
From: Benjamin Gaignard @ 2017-01-03 14:54 UTC (permalink / raw)
  To: linux-arm-kernel

This patch series following what Hans is doing on exynos to support
hotplug detect notifier code.

It add support of HPD in sti_hdmi drm driver and stih-cec driver which
move out of staging.

Those patches should be applied on top of Hans branch exynos4-cec.

I have tested hdmi notifier by pluging/unpluging HDMI cable and check
the value of the physical address with "cec-ctl --tuner".
"cec-compliance -A" is also functional.

version 2:
- use HPD notifier instead of HDMI notifier
- move stih-cec out of staging
- rebase code on top of git://linuxtv.org/hverkuil/media_tree.git exynos4-cec
  branch
- split DT modifications in a separate patch

Regards,
Benjamin

Benjamin Gaignard (3):
  sti: hdmi: add HPD notifier support
  stih-cec: add HPD notifier support
  arm: sti: update sti-cec for HPD notifier support

 .../devicetree/bindings/media/stih-cec.txt         |   2 +
 arch/arm/boot/dts/stih407-family.dtsi              |  12 -
 arch/arm/boot/dts/stih410.dtsi                     |  13 +
 drivers/gpu/drm/sti/Kconfig                        |   1 +
 drivers/gpu/drm/sti/sti_hdmi.c                     |  14 +
 drivers/gpu/drm/sti/sti_hdmi.h                     |   3 +
 drivers/media/platform/Kconfig                     |  10 +
 drivers/media/platform/Makefile                    |   1 +
 drivers/media/platform/sti/cec/Makefile            |   1 +
 drivers/media/platform/sti/cec/stih-cec.c          | 404 +++++++++++++++++++++
 drivers/staging/media/Kconfig                      |   2 -
 drivers/staging/media/Makefile                     |   1 -
 drivers/staging/media/st-cec/Kconfig               |   8 -
 drivers/staging/media/st-cec/Makefile              |   1 -
 drivers/staging/media/st-cec/TODO                  |   7 -
 drivers/staging/media/st-cec/stih-cec.c            | 379 -------------------
 16 files changed, 449 insertions(+), 410 deletions(-)
 create mode 100644 drivers/media/platform/sti/cec/Makefile
 create mode 100644 drivers/media/platform/sti/cec/stih-cec.c
 delete mode 100644 drivers/staging/media/st-cec/Kconfig
 delete mode 100644 drivers/staging/media/st-cec/Makefile
 delete mode 100644 drivers/staging/media/st-cec/TODO
 delete mode 100644 drivers/staging/media/st-cec/stih-cec.c

-- 
1.9.1

^ permalink raw reply

* [PATCH 3/4] arm64: dts: exynos: make tm2 and tm2e independent from each other
From: Andi Shyti @ 2017-01-03 14:40 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <ff876454-b49f-3d63-d76e-012dd303b0e7@osg.samsung.com>

Hi,

> FWIW, I also agree with Chanwoo that the difference is too small to
> need a common .dtsi file.

in principle I don't like "switching on and off" properties by
overwriting them with "status = disable", unless it's really
necessary (and this case is not). Even for small differences. It
makes the DTS harder to read and duplicates nodes with different
values throughout the DTS include chain.

In my opinion this approach should be discouraged.

Besides, there are other overwritten differences in tm2e.dts that
I think should be separated as well. The "common" file approach is
widely used in arm/boot/dts/exynos* files.

The "status = disable" looks to me more like a temporary hack
rather than a permanent solution.

In any case, still up to you :)

Andi

^ permalink raw reply

* [PATCH] arm64: mm: fix show_pte KERN_CONT fallout
From: Mark Rutland @ 2017-01-03 14:27 UTC (permalink / raw)
  To: linux-arm-kernel

Recent changes made KERN_CONT mandatory for continued lines. In the
absence of KERN_CONT, a newline may be implicit inserted by the core
printk code.

In show_pte, we (erroneously) use printk without KERN_CONT for continued
prints, resulting in output being split across a number of lines, and
not matching the intended output, e.g.

[ff000000000000] *pgd=00000009f511b003
, *pud=00000009f4a80003
, *pmd=0000000000000000

Fix this by using pr_cont() for all the continuations.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/mm/fault.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index a78a5c4..156169c 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -88,21 +88,21 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 			break;
 
 		pud = pud_offset(pgd, addr);
-		printk(", *pud=%016llx", pud_val(*pud));
+		pr_cont(", *pud=%016llx", pud_val(*pud));
 		if (pud_none(*pud) || pud_bad(*pud))
 			break;
 
 		pmd = pmd_offset(pud, addr);
-		printk(", *pmd=%016llx", pmd_val(*pmd));
+		pr_cont(", *pmd=%016llx", pmd_val(*pmd));
 		if (pmd_none(*pmd) || pmd_bad(*pmd))
 			break;
 
 		pte = pte_offset_map(pmd, addr);
-		printk(", *pte=%016llx", pte_val(*pte));
+		pr_cont(", *pte=%016llx", pte_val(*pte));
 		pte_unmap(pte);
 	} while(0);
 
-	printk("\n");
+	pr_cont("\n");
 }
 
 #ifdef CONFIG_ARM64_HW_AFDBM
-- 
1.9.1

^ permalink raw reply related

* [RFC PATCH net-next v4 1/2] macb: Add 1588 support in Cadence GEM.
From: Nicolas Ferre @ 2017-01-03 14:22 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <BN3PR07MB25168573DD82F1681CDC8437C96E0@BN3PR07MB2516.namprd07.prod.outlook.com>

Le 03/01/2017 ? 11:47, Rafal Ozieblo a ?crit :
>> From: Harini Katakam [mailto:harinikatakamlinux at gmail.com] 
>> Sent: 3 stycznia 2017 06:06
>> Subject: Re: [RFC PATCH net-next v4 1/2] macb: Add 1588 support in Cadence GEM.
>>
>> Hi Richard,
>>
>> On Mon, Jan 2, 2017 at 9:43 PM, Richard Cochran <richardcochran@gmail.com> wrote:
>>> On Mon, Jan 02, 2017 at 03:47:07PM +0100, Nicolas Ferre wrote:
>>>> Le 02/01/2017 ? 12:31, Richard Cochran a ?crit :
>>>>> This Cadence IP core is a complete disaster.
>>>>
>>>> Well, it evolved and propose several options to different SoC 
>>>> integrators. This is not something unusual...
>>>> I suspect as well that some other network adapters have the same 
>>>> weakness concerning PTP timestamp in single register as the early 
>>>> revisions of this IP.
>>>
>>> It appears that this core can neither latch the time on read or write, 
>>> or even latch time stamps.  I have worked with many different PTP HW 
>>> implementations, even early ones like on the ixp4xx, and it is no 
>>> exaggeration to say that this one is uniquely broken.
>>>
>>>> I suspect that Rafal tend to jump too quickly to the latest IP 
>>>> revisions and add more options to this series: let's not try to pour 
>>>> too much things into this code right now.
>>>
>>> Why can't you check the IP version in the driver?
>>
>> There is an IP revision register but it would be probably be
>> better to rely on "caps" from the compatibility strings - to cover SoC specific
>> implementations. Also, when this extended BD is added (with timestamp),
>> additional words will need to be added statically which will be
>> consistent with Andrei's CONFIG_ checks.
> We can distinguish IP cores with and without PTP support by reading
> Design Configuration Register. But to distinguish IP cores with
> timestamps in buffer descriptors and which support only event
> registers, we can only check IP version by reading the revision ID
> register and base on that.
> I agree with Harini, compatibility strings could be better. But we
> might end up with many different configuration in the future.

Compatibility strings and associated configurations are cheap. It's not
a problem to have many different configurations and clearer for this
particular "composite" feature.

> We could use only descriptor approach but there are many Atmel's
> cores on the market which support only event registers.

Yes and once in silicon, it's hard to modify ;-)

Regards,
-- 
Nicolas Ferre

^ permalink raw reply

* [PATCH v3 2/3] DT: bingdings: power: reset: add linkstation-reset doc
From: Roger Shimizu @ 2017-01-03 14:11 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20170103131256.GB30197@lunn.ch>

Dear Florian, Andrew,

Thanks for your comments!

On Tue, Jan 3, 2017 at 10:12 PM, Andrew Lunn <andrew@lunn.ch> wrote:
>> > +
>> > +Required Properties:
>> > +- compatible: Should be "linkstation,power-off"
>> > +- reg: Address and length of the register set for UART1
>>
>> Humm, should we instead have a phandle to the uart1 node?
>
> Probably. Again, this is to do with copying the QNAP driver. I was
> young, new to device tree, and i just did a logical conversion of the
> existing code, and did not at the time understand phandles, etc.

Can you tell me where should I place this document?
or simply remove it?

Cheers,
-- 
Roger Shimizu, GMT +9 Tokyo
PGP/GPG: 4096R/6C6ACD6417B3ACB1

^ permalink raw reply

* [PATCH v3 1/3] power: reset: add linkstation-reset driver
From: Roger Shimizu @ 2017-01-03 14:08 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20170103130916.GA30197@lunn.ch>

Dear Florian, Andrew,

Thanks for your email!

On Tue, Jan 3, 2017 at 2:19 PM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>
> Interestingly, I submitted a patch doing nearly the same thing recently
> after hacking on a Buffalo Terastation Pro II two days after yours
> without seeing yours:
>
> https://lkml.org/lkml/2016/12/28/273

Glad to know there's other developer working on linkstation/kurobox platform!

> Some comments below.
>
>> +
>> +static void __iomem *base;
>> +static unsigned long tclk;
>> +static const struct reset_cfg *cfg;
>
> How about avoiding the singletons here and pass this down from the
> platform driver's private data after we (see below) also make use of a
> reboot notifier?

I see your patches. Indeed, it's a good idea to avoid the singletons
and use private data instead.

>> +static int linkstation_reset_probe(struct platform_device *pdev)
>> +{
>> +     struct device_node *np = pdev->dev.of_node;
>> +     struct resource *res;
>> +     struct clk *clk;
>> +     char symname[KSYM_NAME_LEN];
>> +
>> +     const struct of_device_id *match =
>> +             of_match_node(linkstation_reset_of_match_table, np);
>> +     cfg = match->data;
>> +
>> +     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +     if (!res) {
>> +             dev_err(&pdev->dev, "Missing resource");
>> +             return -EINVAL;
>> +     }
>> +
>> +     base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
>> +     if (!base) {
>> +             dev_err(&pdev->dev, "Unable to map resource");
>> +             return -EINVAL;
>> +     }
>> +
>> +     /* We need to know tclk in order to calculate the UART divisor */
>> +     clk = devm_clk_get(&pdev->dev, NULL);
>> +     if (IS_ERR(clk)) {
>> +             dev_err(&pdev->dev, "Clk missing");
>> +             return PTR_ERR(clk);
>> +     }
>> +
>> +     tclk = clk_get_rate(clk);
>
> Does this work with the Terastation II which has not been converted to
> DT yet? Is tclk available through the CLK API there?

I have no idea whether device-based legacy code and make use of power
reset driver.
Maybe Sebastian Reichel can offer a comment?

However, I think Terastation II should convert to DT first.
If you're willing to test, I can help to provide a dts/dtb.
(If you use Debian, I can even provide DEB of kernel image and
flash-kernel patch, which is easy for you to test)

On Tue, Jan 3, 2017 at 10:09 PM, Andrew Lunn <andrew@lunn.ch> wrote:
>> > +
>> > +   /* Check that nothing else has already setup a handler */
>> > +   if (pm_power_off) {
>> > +           lookup_symbol_name((ulong)pm_power_off, symname);
>> > +           dev_err(&pdev->dev,
>> > +                   "pm_power_off already claimed %p %s",
>> > +                   pm_power_off, symname);
>> > +           return -EBUSY;
>> > +   }
>> > +   pm_power_off = linkstation_reset;
>>
>> That seems a bit complicated, why not just assume that there will be
>> either this driver used, or not at all?
>
> That is probably my fault. This is a copy from code i wrote many years
> ago for the QNAP. I guess at the time i was battling with two
> different pm_power_off handlers, so put in this code.
>
>> Also, you are supposed to register a reboot notifier to which you can
>> pass private context:
>
> At the time i wrote the QNAP code, this did not exist. So maybe my
> code is no longer a good example to copy.

Really appreciated, Andrew!
I'll modify this part in next series.

BTW. the private data passing to reboot notifier can be shared to
power-off function as well?
Do you have example?

> https://lkml.org/lkml/2016/12/28/275
>
> As indicated in my patch series, the UART1-attached micro controller
> does a lot more things that just providing reboot, which is why I chose
> to move this code to a MFD driver, as the starting point before adding
> support for LEDs, FAN, PWM, beeper which would be other types of devices.
>
> Is adding support for other peripherals on your TODO as well?

Except reset feature (power-off and reboot), other feature, such as
LEDs / FAN speed / buttons, is managed by user-land program micro-evtd
[0][1].
Since the upstream [1] is not active anymore, Ryan Tandy (in CC) and I
are maintaining it in Debian [0].

[0] https://tracker.debian.org/pkg/micro-evtd
[1] https://sourceforge.net/projects/ppc-evtd

micro-evtd worked well for device-based legacy code, but after DT
conversion, Ryan found the device cannot shutdown properly (reboot is
OK).
That why I created this patch series.
I think for such old hardware and mature user-land program, it doesn't
deserve the effort to implement those again in kernel side.
What do you think?

Cheers,
-- 
Roger Shimizu, GMT +9 Tokyo
PGP/GPG: 4096R/6C6ACD6417B3ACB1

^ permalink raw reply

* [PATCH v6 01/14] ACPI: ARM64: IORT: minor cleanup for iort_match_node_callback()
From: Lorenzo Pieralisi @ 2017-01-03 14:08 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1483363905-2806-2-git-send-email-hanjun.guo@linaro.org>

On Mon, Jan 02, 2017 at 09:31:32PM +0800, Hanjun Guo wrote:
> Cleanup iort_match_node_callback() a little bit to reduce
> some lines of code, aslo fix the indentation in iort_scan_node().

s/aslo/also

"Also" in a commit log is a sign a patch should be split and that's what
you should do even though I know it is tempting to merge all trivial
changes into one single patch.

Make it two patches please.

Thanks,
Lorenzo

> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> Tested-by: Majun <majun258@huawei.com>
> Tested-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Tomasz Nowicki <tn@semihalf.com>
> ---
>  drivers/acpi/arm64/iort.c | 10 +++-------
>  1 file changed, 3 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
> index e0d2e6e..46e2d82 100644
> --- a/drivers/acpi/arm64/iort.c
> +++ b/drivers/acpi/arm64/iort.c
> @@ -225,7 +225,7 @@ static struct acpi_iort_node *iort_scan_node(enum acpi_iort_node_type type,
>  
>  		if (iort_node->type == type &&
>  		    ACPI_SUCCESS(callback(iort_node, context)))
> -				return iort_node;
> +			return iort_node;
>  
>  		iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
>  					 iort_node->length);
> @@ -253,17 +253,15 @@ static acpi_status iort_match_node_callback(struct acpi_iort_node *node,
>  					    void *context)
>  {
>  	struct device *dev = context;
> -	acpi_status status;
> +	acpi_status status = AE_NOT_FOUND;
>  
>  	if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT) {
>  		struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
>  		struct acpi_device *adev = to_acpi_device_node(dev->fwnode);
>  		struct acpi_iort_named_component *ncomp;
>  
> -		if (!adev) {
> -			status = AE_NOT_FOUND;
> +		if (!adev)
>  			goto out;
> -		}
>  
>  		status = acpi_get_name(adev->handle, ACPI_FULL_PATHNAME, &buf);
>  		if (ACPI_FAILURE(status)) {
> @@ -289,8 +287,6 @@ static acpi_status iort_match_node_callback(struct acpi_iort_node *node,
>  		 */
>  		status = pci_rc->pci_segment_number == pci_domain_nr(bus) ?
>  							AE_OK : AE_NOT_FOUND;
> -	} else {
> -		status = AE_NOT_FOUND;
>  	}
>  out:
>  	return status;
> -- 
> 1.9.1
> 

^ permalink raw reply

* [PATCH v2] watchdog: constify watchdog_info structures
From: Adam Thomson @ 2017-01-03 13:51 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1482771911-13548-1-git-send-email-bhumirks@gmail.com>

On 26 December 2016 17:05, Bhumika Goyal wrote:

> Declare watchdog_info structures as const as they are only stored in the
> info field of watchdog_device structures. This field is of type const
> struct watchdog_info *, so watchdog_info structures having this property
> can be declared const too.

> diff --git a/drivers/watchdog/da9052_wdt.c b/drivers/watchdog/da9052_wdt.c
> index 2fc19a3..d86a57e 100644
> --- a/drivers/watchdog/da9052_wdt.c
> +++ b/drivers/watchdog/da9052_wdt.c
> @@ -140,7 +140,7 @@ static int da9052_wdt_ping(struct watchdog_device
> *wdt_dev)
>  	return ret;
>  }
> 
> -static struct watchdog_info da9052_wdt_info = {
> +static const struct watchdog_info da9052_wdt_info = {
>  	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
>  	.identity	= "DA9052 Watchdog",
>  };
> diff --git a/drivers/watchdog/da9055_wdt.c b/drivers/watchdog/da9055_wdt.c
> index 8377c43..4f30818 100644
> --- a/drivers/watchdog/da9055_wdt.c
> +++ b/drivers/watchdog/da9055_wdt.c
> @@ -108,7 +108,7 @@ static int da9055_wdt_stop(struct watchdog_device
> *wdt_dev)
>  	return da9055_wdt_set_timeout(wdt_dev, 0);
>  }
> 
> -static struct watchdog_info da9055_wdt_info = {
> +static const struct watchdog_info da9055_wdt_info = {
>  	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
>  	.identity	= "DA9055 Watchdog",
>  };

For DA9052 and DA9055:

Acked-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>

^ permalink raw reply

* [PATCH v2 2/3] dmaeninge: xilinx_dma: Fix bug in multiple frame stores scenario in vdma
From: Jose Abreu @ 2017-01-03 13:51 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <C246CAC1457055469EF09E3A7AC4E11A4A66012C@XAP-PVEXMBX01.xlnx.xilinx.com>

Hi Kedar,


On 02-01-2017 16:00, Appana Durga Kedareswara Rao wrote:
> Hi Jose Miguel Abreu,
>
> 	Thanks for the review...
>
> [snip]...
>> I just noticed there is a write to XILINX_DMA_REG_FRMSTORE which, by the
>> description in the VDMA databook, allows to modify the total number of
>> framebuffers.
>>
>> Does it correct this situation: Lets assume VDMA has 10 framebuffers in HW and
>> user only submits 5 descriptors. Then vsize will be programmed and VDMA will
>> start. The VDMA will start in fb 1, then 2, ... until 5 its all ok. But then after the fb
>> 5 the VDMA will jump to fb 6, this fb will have no address because the user only
>> submitted 5 addresses so VDMA will try to write to location 0x0 of system mem
>> (if using S2MM channel). ?
>>
>> If so then there is no race condition, but the HW image that I have does not
>> have this register enabled so I was getting this result (memory corruption
>> because not all framebuffers had addresses set).
> Thanks for the explanation. 
> Agree the issue that you mentioned won't come when XILINX_DMA_REG_FRMSTORE
> (C_ENABLE_DEBUG_INFO_5 and C_ENABLE_DEBUG_INFO_13) Register is enabled in the IP.
> But this register won't get enabled with the default IP configuration (C_ENABLE_DEBUG_INFO_5 and C_ENABLE_DEBUG_INFO_13).
>
> When user is not enabled XILINX_DMA_REG_FRMSTORE in the h/w and submits frames less than h/w capable.
> The solution that I am thinking is to throw an error in the driver saying that either enable the
> num frame store feature in the IP or submit the frames up to h/w capable what do you think???

Sounds fine by me.

Best regards,
Jose Miguel Abreu

>
> Regards,
> Kedar.
>
>> Best regards,
>> Jose Miguel Abreu
>>
>>> Regards,
>>> Kedar.
>>>
>>>> Best regards,
>>>> Jose Miguel Abreu
>>>>

^ permalink raw reply

* [RFC PATCH] iommu/arm-smmu: Add global SMR masking property
From: Will Deacon @ 2017-01-03 13:47 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20161221032921.hdcnyiq6m224ejlv@rob-hp-laptop>

On Tue, Dec 20, 2016 at 09:29:21PM -0600, Rob Herring wrote:
> On Fri, Dec 16, 2016 at 01:19:29PM +0000, Robin Murphy wrote:
> > The current SMR masking support using a 2-cell iommu-specifier is
> > primarily intended to handle individual masters with large and/or
> > complex Stream ID assignments; it quickly gets a bit clunky in other SMR
> > use-cases where we just want to consistently mask out the same part of
> > every Stream ID (e.g. for MMU-500 configurations where the appended TBU
> > number gets in the way unnecessarily). Let's add a new property to allow
> > a single global mask value to better fit the latter situation.
> > 
> > CC: Stuart Yoder <stuart.yoder@nxp.com>
> > Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> > ---
> > 
> > Compile-tested only...
> > 
> >  Documentation/devicetree/bindings/iommu/arm,smmu.txt | 8 ++++++++
> >  drivers/iommu/arm-smmu.c                             | 4 +++-
> >  2 files changed, 11 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> > index e862d1485205..98f5cbe5fdb4 100644
> > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> > @@ -60,6 +60,14 @@ conditions.
> >                    aliases of secure registers have to be used during
> >                    SMMU configuration.
> >  
> > +- stream-match-mask : Specifies a fixed SMR mask value to combine with
> 
> Needs a vendor prefix.

Why does this need a vendor prefix? I'm not fussed either way, but since
the stream-match-mask is an optional architectural concept and not specific
to an implementation, it seems strange to me that it would need a prefix
whereas something like #global-interrupts does not.

> > +                  the Stream ID value from every iommu-specifier. This
> > +                  may be used instead of an "#iommu-cells" value of 2
> > +                  when there is no need for per-master SMR masks, but
> > +                  it is still desired to mask some portion of every
> > +                  Stream ID (e.g. for certain MMU-500 configurations
> > +                  given globally unique external IDs).

Robin -- it might be worth a sentence here saying that the property is
ignored if stream matching isn't supported by the hardware.

Will

^ permalink raw reply

* [PATCH 2/2] ARM: dts: imx6qdl-nitrogen6_som2: fix sgtl5000 pinctrl init
From: Gary Bisson @ 2017-01-03 13:41 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20170103112247.4563-3-gary.bisson@boundarydevices.com>

Hi Shawn,

On Tue, Jan 03, 2017 at 12:22:47PM +0100, Gary Bisson wrote:
> Since the codec is probed first, the pinctrl node should be
> under the codec node.
> 
> The codec init was working for this board since U-Boot was
> already setting GPIO_0 as CLKO1 but better fix it anyway.
> 
> Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>

Fixes: 3faa1bb2e89c ("ARM: dts: imx: add Boundary Devices Nitrogen6_SOM2 support")

Thanks,
Gary

^ permalink raw reply

* [PATCH] input: tm2-touchkey: fix odd_ptr_err.cocci warnings
From: Julia Lawall @ 2017-01-03 13:39 UTC (permalink / raw)
  To: linux-arm-kernel

PTR_ERR should access the value just tested by IS_ERR

Generated by: scripts/coccinelle/tests/odd_ptr_err.cocci

CC: Jaechul Lee <jcsing.lee@samsung.com>
Signed-off-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---

I have only looked at the extract of code that is shown here.  It could be
the test that is wrong.

The code comes from:

url:
https://github.com/0day-ci/linux/commits/Jaechul-Lee/Add-touch-key-driver-su
pport-for-TM2/20170103-183357
:::::: branch date: 2 hours ago
:::::: commit date: 2 hours ago

 tm2-touchkey.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/input/keyboard/tm2-touchkey.c
+++ b/drivers/input/keyboard/tm2-touchkey.c
@@ -196,7 +196,7 @@ static int tm2_touchkey_probe(struct i2c
 				devm_regulator_get(&client->dev, "vdd");
 	if (IS_ERR(samsung_touchkey->regulator_vdd)) {
 		dev_err(&client->dev, "Failed to get vdd regulator\n");
-		return PTR_ERR(samsung_touchkey->regulator_vcc);
+		return PTR_ERR(samsung_touchkey->regulator_vdd);
 	}

 	/* power */

^ permalink raw reply

* [PATCH 1/2] ARM: dts: imx6qdl-nitrogen6_max: fix sgtl5000 pinctrl init
From: Shawn Guo @ 2017-01-03 13:30 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20170103115530.vngqbev7nsavgtdc@t450s.lan>

On Tue, Jan 03, 2017 at 12:55:49PM +0100, Gary Bisson wrote:
> Hi Shawn,
> 
> On Tue, Jan 03, 2017 at 07:43:17PM +0800, Shawn Guo wrote:
> > On Tue, Jan 03, 2017 at 12:22:46PM +0100, Gary Bisson wrote:
> > > This patch fixes the following error:
> > > sgtl5000 0-000a: Error reading chip id -6
> > > imx-sgtl5000 sound: ASoC: CODEC DAI sgtl5000 not registered
> > > imx-sgtl5000 sound: snd_soc_register_card failed (-517)
> > > 
> > > The problem was that the pinctrl group was linked to the sound driver
> > > instead of the codec node. Since the codec is probed first, the sys_mclk
> > > was missing and it would therefore fail to initialize.
> > > 
> > > Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
> > 
> > Should we have it go as a fix for v4.10-rc cycles?  In that case, please
> > add a Fixes: tag.  Also, do we need to apply it for stable kernel?
> 
> Sure it'd be great if it could be in v4.10.
> Fixes: b32e700256bc ("ARM: dts: imx: add Boundary Devices Nitrogen6_Max board")
> 
> As for stable kernel, I guess it wouldn't hurt but it's not mandatory in
> my opinion.

I wouldn't bother stable kernel then.

> 
> Do you want me to re-send with the Fixes line?

No.  I can add the Fixes tag.

> What about the SOM2
> patch, should it include a Fixes line although it works thanks to
> U-Boot?

Yes, please give me the Fixes tag, and I will send both patches for
v4.10 inclusion.

Shawn

^ permalink raw reply

* [PATCH 3/5] arm64: dts: sun50i: add MMC nodes
From: Chen-Yu Tsai @ 2017-01-03 13:28 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <d4c2233c-95aa-4d72-1501-9ecb62f6cd82@arm.com>

On Tue, Jan 3, 2017 at 6:48 PM, Andr? Przywara <andre.przywara@arm.com> wrote:
> On 03/01/17 02:52, Chen-Yu Tsai wrote:
>
> Hi,
>
>> On Tue, Jan 3, 2017 at 7:03 AM, Andre Przywara <andre.przywara@arm.com> wrote:
>>
>> A commit message explaining the mmc controllers would be nice.
>
> OK.
>
>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>> ---
>>>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 67 +++++++++++++++++++++++++++
>>>  1 file changed, 67 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>>> index e0dcab8..c680566 100644
>>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>>> @@ -150,6 +150,32 @@
>>>                                 pins = "PB8", "PB9";
>>>                                 function = "uart0";
>>>                         };
>>> +
>>> +                       mmc0_pins: mmc0 at 0 {
>>> +                               pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
>>> +                               function = "mmc0";
>>> +                               drive-strength = <30>;
>>> +                       };
>>> +
>>> +                       mmc0_default_cd_pin: mmc0_cd_pin at 0 {
>>> +                               pins = "PF6";
>>> +                               function = "gpio_in";
>>> +                               bias-pull-up;
>>> +                       };
>>
>> We are starting to drop pinmux nodes for gpio usage.
>
> And replacing them with what?
> Or do you mean they go in the individual board .dts files?
> In this case I believe having a default pin defined here would help to
> define it in every .dts.

Nope. I meant dropping them. Pinmux and gpio are orthogonal. One should not
need to specify a gpio pinmux to use it as a gpio. We added them because in
the past nothing was preventing someone from claiming an already muxed pin
as a gpio. On some platforms this is fine. For sunxi, this breaks the system,
as the gpio functions are muxed in.

The idea moving forward is that these cases should be guarded in the driver.
Of course we would have to deal with existing dtbs, but lets not add any more.

>>> +
>>> +                       mmc1_pins: mmc1 at 0 {
>>> +                               pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
>>> +                               function = "mmc1";
>>> +                               drive-strength = <30>;
>>> +                       };
>>> +
>>> +                       mmc2_pins: mmc2 at 0 {
>>> +                               pins = "PC1", "PC5", "PC6", "PC8", "PC9",
>>> +                                      "PC10", "PC11", "PC12", "PC13", "PC14",
>>> +                                      "PC15", "PC16";
>>> +                               function = "mmc2";
>>> +                               drive-strength = <30>;
>>> +                       };
>>
>> Moreover I think you should split out the pinmux nodes to a separate patch.
>
> I can surely do, just wondering what's the rationale is behind that?

More or less the "do one thing in one patch" rationale. Of course you can
claim these are the defaults used in the reference design and pretty much
every board out there. Then it makes sense to do them together. :)

>
>>
>>>                 };
>>>
>>>                 uart0: serial at 1c28000 {
>>> @@ -240,6 +266,47 @@
>>>                         #size-cells = <0>;
>>>                 };
>>>
>>> +               mmc0: mmc at 1c0f000 {
>>> +                       compatible = "allwinner,sun50i-a64-mmc",
>>> +                                    "allwinner,sun5i-a13-mmc";
>>
>> Given that sun5i doesn't support mmc delay timings, and the A64 has
>> calibration and delay timings, I wouldn't call them compatible.
>>
>> Or are you claiming that for the A64 has a delay of 0 for the
>> currently supported speeds, so the calibration doesn't really
>> matter? If so this should be mentioned in the commit message.
>
> Yes, that's my observation: Driving it with sun5-a13-mmc just works.
> This sun5i driver version does not (and will never) support higher
> transfer modes anyway, so for that subset they are compatible. This
> opens up the door to other operating systems not having a particular
> driver for the A64, for instance, also older Linux kernels.
> I know that sunxi doesn't use this compatible feature much, but IMHO we
> should really start thinking about the DT not just being Linux specific
> - or even being specific to a certain Linux version. And this case here
> is a good example: An A13 MMC driver can drive this device - if there is
> no better driver (an A64 one) available.

Cool. Please put this in the commit log. :)

>
>>
>>> +                       reg = <0x01c0f000 0x1000>;
>>> +                       clocks = <&ccu 31>, <&ccu 75>;
>>
>> The clock / reset index macros are in the tree now.
>> Please switch to them.
>
> The include file is in the tree, but it isn't used in the current HEAD
> (as in #included and the actual macros being used in the .dtsi).
> So I was wondering if there is a patch pending for that?

Not yet I think. Perhaps Maxime will do one once he gets back from vacation?

Regards
ChenYu

>
> Cheers,
> Andre
>
>>> +                       clock-names = "ahb", "mmc";
>>> +                       resets = <&ccu 8>;
>>> +                       reset-names = "ahb";
>>> +                       interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
>>> +                       status = "disabled";
>>> +                       #address-cells = <1>;
>>> +                       #size-cells = <0>;
>>> +               };
>>> +
>>> +               mmc1: mmc at 1c10000 {
>>> +                       compatible = "allwinner,sun50i-a64-mmc",
>>> +                                    "allwinner,sun5i-a13-mmc";
>>> +                       reg = <0x01c10000 0x1000>;
>>> +                       clocks = <&ccu 32>, <&ccu 76>;
>>> +                       clock-names = "ahb", "mmc";
>>> +                       resets = <&ccu 9>;
>>> +                       reset-names = "ahb";
>>> +                       interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
>>> +                       status = "disabled";
>>> +                       #address-cells = <1>;
>>> +                       #size-cells = <0>;
>>> +               };
>>> +
>>> +               mmc2: mmc at 1c11000 {
>>> +                       compatible = "allwinner,sun50i-a64-emmc";
>>> +                       reg = <0x01c11000 0x1000>;
>>> +                       clocks = <&ccu 33>, <&ccu 77>;
>>> +                       clock-names = "ahb", "mmc";
>>> +                       resets = <&ccu 10>;
>>> +                       reset-names = "ahb";
>>> +                       interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
>>> +                       status = "disabled";
>>> +                       #address-cells = <1>;
>>> +                       #size-cells = <0>;
>>> +               };
>>> +
>>>                 gic: interrupt-controller at 1c81000 {
>>>                         compatible = "arm,gic-400";
>>>                         reg = <0x01c81000 0x1000>,
>>> --
>>> 2.8.2
>>>
>

^ permalink raw reply

* [PATCH v5 0/6] arm64: arch_timer: Add workaround for hisilicon-161601 erratum
From: Ding Tianhong @ 2017-01-03 13:24 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <586B7709.1080600@huawei.com>



On 2017/1/3 18:03, Hanjun Guo wrote:
> Hi Ding,
> 
> On 2016/12/23 15:04, Ding Tianhong wrote:
>> Erratum Hisilicon-161601 says that the ARM generic timer counter "has the
>> potential to contain an erroneous value when the timer value changes".
>> Accesses to TVAL (both read and write) are also affected due to the implicit counter
>> read.  Accesses to CVAL are not affected.
>>
>> The workaround is to reread the system count registers until the value of the second
>> read is larger than the first one by less than 32, the system counter can be guaranteed
>> not to return wrong value twice by back-to-back read and the error value is always larger
>> than the correct one by 32. Writes to TVAL are replaced with an equivalent write to CVAL.
>>
>> v2: Introducing a new generic erratum handling mechanism for fsl,a008585 and hisilicon,161601.
>>     Significant rework based on feedback, including seperate the fsl erratum a008585
>>     to another patch, update the erratum name and remove unwanted code.
>>
>> v3: Introducing the erratum_workaround_set_sne generic function for fsl erratum a008585
>>     and make the #define __fsl_a008585_read_reg to be private to the .c file instead of
>>     being globally visible. After discussion with Marc and Will, a consensus decision was
>>     made to remove the commandline parameter for enabling fsl,erratum-a008585 erratum,
>>     and make some generic name more specific, export timer_unstable_counter_workaround
>>     for module access.
>>     
>>     Significant rework based on feedback, including fix some alignment problem, make the
>>     #define __hisi_161601_read_reg to be private to the .c file instead of being globally
>>     visible, add more accurate annotation and modify a bit of logical format to enable
>>     arch_timer_read_ool_enabled, remove the kernel commandline parameter
>>     clocksource.arm_arch_timer.hisilicon-161601.
>>
>>     Introduce a generic aquick framework for erratum in ACPI mode.
>>
>> v4: rename the quirk handler parameter to make it more generic, and
>>     avoid break loop when handling the quirk becasue it need to
>>     support multi quirks handler.
>>
>>     update some data structures for acpi mode. 
>>
>> v5: Adapt the new kernel-parameters.txt for latest kernel version.
>>     Set the retries of reread system counter to 50, because it is possible 
>>     that some interrupts may lead to more than twice read errors and break the loop,
>>     it will trigger the warning, so we set the number of retries far beyond the number of
>>     iterations the loop has been observed to take.
>>
>> Ding Tianhong (4):
>>   arm64: arch_timer: Add device tree binding for hisilicon-161601
>>     erratum
>>   arm64: arch_timer: Introduce a generic erratum handing mechanism for
>>     fsl-a008585
>>   arm64: arch_timer: Work around Erratum Hisilicon-161601
>>   arm64: arch timer: Add timer erratum property for Hip05-d02 and
>>     Hip06-d03
>>
>> Hanjun Guo (2):
>>   arm64: arch_timer: apci: Introduce a generic aquirk framework for
>>     erratum
>>   arm64: arch_timer: acpi: add hisi timer errata data
> 
> Since the ACPI code is conflict with Fuwei's GTDT patch set, let's split this patch
> set into two parts, one is the DT based code, and the other is the ACPI part,
> I will rebase ACPI code on top of Fuwei's patch set so please go upstream first.
> 

Hi Hanjuno<\x1a

OK, I will remove the last 2 patch and resend a new version only support DT.

> Thanks
> Hanjun
> 
> 
> .
> 

^ permalink raw reply

* [PATCH] crypto: mediatek: don't return garbage err on successful return
From: Colin King @ 2017-01-03 13:21 UTC (permalink / raw)
  To: linux-arm-kernel

From: Colin Ian King <colin.king@canonical.com>

In the case where keylen <= bs mtk_sha_setkey returns an uninitialized
return value in err.  Fix this by returning 0 instead of err.

Issue detected by static analysis with cppcheck.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
 drivers/crypto/mediatek/mtk-sha.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/mediatek/mtk-sha.c b/drivers/crypto/mediatek/mtk-sha.c
index 8951363..8e1b440 100644
--- a/drivers/crypto/mediatek/mtk-sha.c
+++ b/drivers/crypto/mediatek/mtk-sha.c
@@ -878,7 +878,7 @@ static int mtk_sha_setkey(struct crypto_ahash *tfm,
 		bctx->opad[i] ^= 0x5c;
 	}
 
-	return err;
+	return 0;
 }
 
 static int mtk_sha_export(struct ahash_request *req, void *out)
-- 
2.10.2

^ permalink raw reply related

* [RESEND PATCH 0/6] apalis-tk1: updates for v1.1 hw
From: Marcel Ziswiler @ 2017-01-03 13:20 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20161124010456.24604-1-marcel@ziswiler.com>

On Thu, 2016-11-24 at 02:04 +0100, marcel at ziswiler.com wrote:
> From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> 
> 
> This series updates the device tree for the upcoming V1.1 HW samples.
> All changes are purely opportunistic meaning they fix stuff which on
> older HW was anyway broken so there should be no backwards
> compatibility issues.
> 
> 
> Marcel Ziswiler (6):
> ? apalis-tk1: remove spurious new lines
> ? apalis-tk1: temp alert pull-up
> ? apalis-tk1: optional displayport hot-plug detect
> ? apalis-tk1: adjust pin muxing for v1.1 hw
> ? apalis-tk1: working sd card detect on v1.1 hw
> ? apalis-tk1: update compatibility comment
> 
> ?arch/arm/boot/dts/tegra124-apalis-eval.dts | 11 +----
> ?arch/arm/boot/dts/tegra124-apalis.dtsi?????| 73 +++++++++++---------
> ----------
> ?2 files changed, 29 insertions(+), 55 deletions(-)

Ping.

^ permalink raw reply

* [RFC, PATCHv2 29/29] mm, x86: introduce RLIMIT_VADDR
From: Arnd Bergmann @ 2017-01-03 13:18 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <CALCETrV_qejd-Ozqo4vTqz=LuukMUPeQ7EVUQbfTxs_xNbO3oQ@mail.gmail.com>

On Monday, January 2, 2017 10:08:28 PM CET Andy Lutomirski wrote:
> 
> > This seems to nicely address the same problem on arm64, which has
> > run into the same issue due to the various page table formats
> > that can currently be chosen at compile time.
> 
> On further reflection, I think this has very little to do with paging
> formats except insofar as paging formats make us notice the problem.
> The issue is that user code wants to be able to assume an upper limit
> on an address, and it gets an upper limit right now that depends on
> architecture due to paging formats.  But someone really might want to
> write a *portable* 64-bit program that allocates memory with the high
> 16 bits clear.  So let's add such a mechanism directly.
> 
> As a thought experiment, what if x86_64 simply never allocated "high"
> (above 2^47-1) addresses unless a new mmap-with-explicit-limit syscall
> were used?  Old glibc would continue working.  Old VMs would work.
> New programs that want to use ginormous mappings would have to use the
> new syscall.  This would be totally stateless and would have no issues
> with CRIU.

I can see this working well for the 47-bit addressing default, but
what about applications that actually rely on 39-bit addressing
(I'd have to double-check, but I think this was the limit that
people were most interested in for arm64)?

39 bits seems a little small to make that the default for everyone
who doesn't pass the extra flag. Having to pass another flag to
limit the addresses introduces other problems (e.g. mmap from
library call that doesn't pass that flag).

> If necessary, we could also have a prctl that changes a
> "personality-like" limit that is in effect when the old mmap was used.
> I say "personality-like" because it would reset under exactly the same
> conditions that personality resets itself.

For "personality-like", it would still have to interact
with the existing PER_LINUX32 and PER_LINUX32_3GB flags that
do the exact same thing, so actually using personality might
be better.

We still have a few bits in the personality arguments, and
we could combine them with the existing ADDR_LIMIT_3GB
and ADDR_LIMIT_32BIT flags that are mutually exclusive by
definition, such as

        ADDR_LIMIT_32BIT =      0x0800000, /* existing */
        ADDR_LIMIT_3GB   =      0x8000000, /* existing */
        ADDR_LIMIT_39BIT =      0x0010000, /* next free bit */
        ADDR_LIMIT_42BIT =      0x8010000,
        ADDR_LIMIT_47BIT =      0x0810000,
        ADDR_LIMIT_48BIT =      0x8810000,

This would probably take only one or two personality bits for the
limits that are interesting in practice.

	Arnd

^ permalink raw reply

* [PATCH 4/4] arm64: dts: exynos: Add tm2 touchkey node
From: Javier Martinez Canillas @ 2017-01-03 13:14 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1483430237-26823-5-git-send-email-jcsing.lee@samsung.com>

Hello Jaechul,

On 01/03/2017 04:57 AM, Jaechul Lee wrote:
> Add DT node support for TM2 touchkey device.
> 
> Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
> Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index 887a1f1..ef7d21c 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -18,3 +18,15 @@
>  	compatible = "samsung,tm2e", "samsung,exynos5433";
>  };
>  
> +&hsi2c_9 {
> +	status = "okay";
> +
> +	touchkey at 20 {
> +		compatible = "samsung,tm2-touchkey";
> +		reg = <0x20>;
> +		interrupt-parent = <&gpa3>;
> +		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
> +		vcc-supply = <&ldo32_reg>;
> +		vdd-supply = <&ldo33_reg>;
> +	};
> +};
> 

If you re-spin with the changes suggested by Chanwoo instead
of the commont .dtsi, feel free to add:

Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

^ permalink raw reply

* [PATCH v3 2/3] DT: bingdings: power: reset: add linkstation-reset doc
From: Andrew Lunn @ 2017-01-03 13:12 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <519e07d0-9b73-4445-ec5e-7ea2cbc1b814@gmail.com>

> > +
> > +Required Properties:
> > +- compatible: Should be "linkstation,power-off"
> > +- reg: Address and length of the register set for UART1
> 
> Humm, should we instead have a phandle to the uart1 node?

Probably. Again, this is to do with copying the QNAP driver. I was
young, new to device tree, and i just did a logical conversion of the
existing code, and did not at the time understand phandles, etc.

	 Andrew

^ permalink raw reply

* [PATCH 2/4] input: tm2-touchkey: Add touchkey driver support for TM2
From: Javier Martinez Canillas @ 2017-01-03 13:11 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1483430237-26823-3-git-send-email-jcsing.lee@samsung.com>

Hello Jaechul,

On 01/03/2017 04:57 AM, Jaechul Lee wrote:
> This patch adds support for the TM2 touch key and led
> functionlity.
> 

s/functionlity/functionality

> The driver interfaces with userspace through an input device and
> reports KEY_PHONE and KEY_BACK event types. LED brightness can be
> controlled by "/sys/class/leds/tm2-touchkey/brightness".
> 
> Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
> Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
> ---
>  drivers/input/keyboard/Kconfig        |  11 ++
>  drivers/input/keyboard/Makefile       |   1 +
>  drivers/input/keyboard/tm2-touchkey.c | 326 ++++++++++++++++++++++++++++++++++
>  3 files changed, 338 insertions(+)
>  create mode 100644 drivers/input/keyboard/tm2-touchkey.c
> 
> diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
> index cbd75cf..72c0ba1 100644
> --- a/drivers/input/keyboard/Kconfig
> +++ b/drivers/input/keyboard/Kconfig
> @@ -666,6 +666,17 @@ config KEYBOARD_TC3589X
>  	  To compile this driver as a module, choose M here: the
>  	  module will be called tc3589x-keypad.
>  
> +config KEYBOARD_TM2_TOUCHKEY
> +	tristate "tm2-touchkey support"
> +	depends on I2C
> +	help
> +	  Say Y here to enable the tm2-touchkey.
> +	  touchkey driver for tm2. This driver can enable
> +	  the interrupt and make input events and control led brightness.
> +
> +	  To compile this driver as a module, choose M here.
> +	  module will be called tm2-touchkey
> +
>  config KEYBOARD_TWL4030
>  	tristate "TI TWL4030/TWL5030/TPS659x0 keypad support"
>  	depends on TWL4030_CORE
> diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
> index d9f4cfc..7d9acff 100644
> --- a/drivers/input/keyboard/Makefile
> +++ b/drivers/input/keyboard/Makefile
> @@ -61,6 +61,7 @@ obj-$(CONFIG_KEYBOARD_SUN4I_LRADC)	+= sun4i-lradc-keys.o
>  obj-$(CONFIG_KEYBOARD_SUNKBD)		+= sunkbd.o
>  obj-$(CONFIG_KEYBOARD_TC3589X)		+= tc3589x-keypad.o
>  obj-$(CONFIG_KEYBOARD_TEGRA)		+= tegra-kbc.o
> +obj-$(CONFIG_KEYBOARD_TM2_TOUCHKEY)	+= tm2-touchkey.o
>  obj-$(CONFIG_KEYBOARD_TWL4030)		+= twl4030_keypad.o
>  obj-$(CONFIG_KEYBOARD_XTKBD)		+= xtkbd.o
>  obj-$(CONFIG_KEYBOARD_W90P910)		+= w90p910_keypad.o
> diff --git a/drivers/input/keyboard/tm2-touchkey.c b/drivers/input/keyboard/tm2-touchkey.c
> new file mode 100644
> index 0000000..d9575d8
> --- /dev/null
> +++ b/drivers/input/keyboard/tm2-touchkey.c
> @@ -0,0 +1,326 @@
> +/*
> + * Driver for keys on GPIO lines capable of generating interrupts.
> + *
> + * Copyright 2005 Phil Blundell
> + * Copyright 2016 Samsung Electronics Co., Ltd.
> + *
> + * Author: Beomho Seo <beomho.seo@samsung.com>
> + * Author: Jaechul Lee <jcsing.lee@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/bitops.h>
> +#include <linux/delay.h>
> +#include <linux/device.h>
> +#include <linux/i2c.h>
> +#include <linux/input.h>
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/leds.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/pm.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/workqueue.h>
> +
> +#define TM2_TOUCHKEY_DEV_NAME			"tm2-touchkey"
> +#define TM2_TOUCHKEY_KEYCODE_REG			0x03
> +#define TM2_TOUCHKEY_BASE_REG			0x00
> +#define TM2_TOUCHKEY_CMD_LED_ON			0x10
> +#define TM2_TOUCHKEY_CMD_LED_OFF			0x20
> +#define TM2_TOUCHKEY_BIT_PRESS_EV			BIT(3)
> +#define TM2_TOUCHKEY_BIT_KEYCODE			GENMASK(2, 0)
> +#define TM2_TOUCHKEY_LED_VOLTAGE_MIN			2500000
> +#define TM2_TOUCHKEY_LED_VOLTAGE_MAX			3300000
> +
> +enum {
> +	TM2_TOUCHKEY_KEY_MENU = 0x1,
> +	TM2_TOUCHKEY_KEY_BACK,
> +};
> +
> +#define tm2_touchkey_power_enable(x) __tm2_touchkey_power_onoff(x, 1)
> +#define tm2_touchkey_power_disable(x) __tm2_touchkey_power_onoff(x, 0)
> +
> +struct tm2_touchkey_data {
> +	struct i2c_client *client;
> +	struct input_dev *input_dev;
> +	struct led_classdev led_dev;
> +
> +	u8 keycode_type;
> +	u8 pressed;
> +	struct work_struct irq_work;
> +
> +	bool power_onoff;
> +	struct regulator *regulator_vcc;	/* 1.8V */
> +	struct regulator *regulator_vdd;	/* 3.3V */
> +};
> +
> +static void tm2_touchkey_led_brightness_set(struct led_classdev *led_dev,
> +						enum led_brightness brightness)
> +{
> +	struct tm2_touchkey_data *samsung_touchkey =
> +	    container_of(led_dev, struct tm2_touchkey_data, led_dev);
> +	u32 volt;
> +	u8 data;
> +
> +	if (brightness == LED_OFF) {
> +		volt = TM2_TOUCHKEY_LED_VOLTAGE_MIN;
> +		data = TM2_TOUCHKEY_CMD_LED_OFF;
> +	} else {
> +		volt = TM2_TOUCHKEY_LED_VOLTAGE_MAX;
> +		data = TM2_TOUCHKEY_CMD_LED_ON;
> +	}
> +
> +	regulator_set_voltage(samsung_touchkey->regulator_vdd, volt, volt);
> +	i2c_smbus_write_byte_data(samsung_touchkey->client,
> +				  TM2_TOUCHKEY_BASE_REG, data);
> +}
> +
> +static int __tm2_touchkey_power_onoff(struct tm2_touchkey_data
> +					  *samsung_touchkey, bool onoff)
> +{
> +	int ret = 0;
> +
> +	if (samsung_touchkey->power_onoff == onoff)
> +		return ret;
> +
> +	if (onoff) {
> +		ret = regulator_enable(samsung_touchkey->regulator_vcc);
> +		if (ret)
> +			return ret;
> +
> +		ret = regulator_enable(samsung_touchkey->regulator_vdd);
> +		if (ret) {
> +			regulator_disable(samsung_touchkey->regulator_vcc);
> +			return ret;
> +		}

I would add a comment about the sleep here.

> +		msleep(150);
> +	} else {
> +		int err;
> +
> +		err = regulator_disable(samsung_touchkey->regulator_vcc);
> +		if (err)
> +			ret = err;
> +
> +		err = regulator_disable(samsung_touchkey->regulator_vdd);
> +		if (err && !ret)
> +			ret = err;
> +	}
> +	samsung_touchkey->power_onoff = onoff;
> +
> +	return ret;
> +}
> +
> +static void tm2_touchkey_irq_work(struct work_struct *irq_work)
> +{
> +	struct tm2_touchkey_data *samsung_touchkey =
> +	    container_of(irq_work, struct tm2_touchkey_data, irq_work);
> +
> +	if (!samsung_touchkey->pressed) {
> +		input_report_key(samsung_touchkey->input_dev, KEY_PHONE, 0);
> +		input_report_key(samsung_touchkey->input_dev, KEY_BACK, 0);
> +	} else {
> +		if (samsung_touchkey->keycode_type == TM2_TOUCHKEY_KEY_MENU)
> +			input_report_key(samsung_touchkey->input_dev,
> +					 KEY_PHONE, 1);
> +		else
> +			input_report_key(samsung_touchkey->input_dev,
> +					 KEY_BACK, 1);
> +	}
> +	input_sync(samsung_touchkey->input_dev);
> +}
> +
> +static irqreturn_t tm2_touchkey_irq_handler(int irq, void *devid)
> +{
> +	struct tm2_touchkey_data *samsung_touchkey = devid;
> +	u32 data;
> +
> +	data = i2c_smbus_read_byte_data(samsung_touchkey->client,
> +					TM2_TOUCHKEY_KEYCODE_REG);
> +
> +	if (data < 0) {
> +		dev_err(&samsung_touchkey->client->dev, "Failed to read i2c data\n");
> +		return IRQ_HANDLED;
> +	}
> +
> +	samsung_touchkey->keycode_type = data & TM2_TOUCHKEY_BIT_KEYCODE;
> +	samsung_touchkey->pressed = !(data & TM2_TOUCHKEY_BIT_PRESS_EV);
> +
> +	if (samsung_touchkey->keycode_type != TM2_TOUCHKEY_KEY_MENU &&
> +	    samsung_touchkey->keycode_type != TM2_TOUCHKEY_KEY_BACK)

Shouldn't at least a debug message be printed here so the user can
know that an error occurred and a correct keycode was not received?

> +		return IRQ_HANDLED;
> +
> +	schedule_work(&samsung_touchkey->irq_work);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +static int tm2_touchkey_probe(struct i2c_client *client,
> +				  const struct i2c_device_id *id)
> +{
> +	struct tm2_touchkey_data *samsung_touchkey;
> +	int ret;
> +
> +	ret = i2c_check_functionality(client->adapter,
> +				      I2C_FUNC_SMBUS_BYTE |
> +				      I2C_FUNC_SMBUS_BYTE_DATA);
> +	if (!ret) {
> +		dev_err(&client->dev, "No I2C functionality found\n");
> +		return -ENODEV;
> +	}
> +
> +	samsung_touchkey = devm_kzalloc(&client->dev,
> +			sizeof(struct tm2_touchkey_data), GFP_KERNEL);
> +
> +	if (!samsung_touchkey) {
> +		dev_err(&client->dev, "Failed to allocate memory.\n");
> +		return -ENOMEM;
> +	}
> +
> +	samsung_touchkey->client = client;
> +	i2c_set_clientdata(client, samsung_touchkey);
> +	INIT_WORK(&samsung_touchkey->irq_work, tm2_touchkey_irq_work);
> +
> +	/* regulator */
> +	samsung_touchkey->regulator_vcc =
> +				devm_regulator_get(&client->dev, "vcc");
> +	if (IS_ERR(samsung_touchkey->regulator_vcc)) {
> +		dev_err(&client->dev, "Failed to get vcc regulator\n");
> +		return PTR_ERR(samsung_touchkey->regulator_vcc);
> +	}
> +
> +	samsung_touchkey->regulator_vdd =
> +				devm_regulator_get(&client->dev, "vdd");
> +	if (IS_ERR(samsung_touchkey->regulator_vdd)) {
> +		dev_err(&client->dev, "Failed to get vdd regulator\n");
> +		return PTR_ERR(samsung_touchkey->regulator_vcc);
> +	}
> +
> +	/* power */
> +	ret = tm2_touchkey_power_enable(samsung_touchkey);
> +	if (ret) {
> +		dev_err(&client->dev, "Failed to enable power\n");
> +		return ret;
> +	}
> +
> +	/* irq */
> +	ret = devm_request_threaded_irq(&client->dev,
> +					client->irq, NULL,
> +					tm2_touchkey_irq_handler,
> +					IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
> +					TM2_TOUCHKEY_DEV_NAME,
> +					samsung_touchkey);
> +	if (ret) {
> +		dev_err(&client->dev, "Failed to request threaded irq\n");
> +		return ret;
> +	}
> +
> +	/* input device */
> +	samsung_touchkey->input_dev = devm_input_allocate_device(&client->dev);
> +	if (!samsung_touchkey->input_dev) {
> +		dev_err(&client->dev, "Failed to alloc input device.\n");
> +		return -ENOMEM;
> +	}
> +	samsung_touchkey->input_dev->name = TM2_TOUCHKEY_DEV_NAME;
> +	samsung_touchkey->input_dev->id.bustype = BUS_I2C;
> +	samsung_touchkey->input_dev->dev.parent = &client->dev;
> +
> +	set_bit(EV_KEY, samsung_touchkey->input_dev->evbit);
> +	set_bit(KEY_PHONE, samsung_touchkey->input_dev->keybit);
> +	set_bit(KEY_BACK, samsung_touchkey->input_dev->keybit);
> +	input_set_drvdata(samsung_touchkey->input_dev, samsung_touchkey);
> +
> +	ret = input_register_device(samsung_touchkey->input_dev);
> +	if (ret) {
> +		dev_err(&client->dev, "Failed to register input device.\n");
> +		return ret;
> +	}
> +
> +	/* led device */
> +	samsung_touchkey->led_dev.name = TM2_TOUCHKEY_DEV_NAME;
> +	samsung_touchkey->led_dev.brightness = LED_FULL;
> +	samsung_touchkey->led_dev.max_brightness = LED_FULL;
> +	samsung_touchkey->led_dev.brightness_set =
> +						tm2_touchkey_led_brightness_set;
> +
> +	ret = devm_led_classdev_register(&client->dev,
> +					 &samsung_touchkey->led_dev);
> +	if (ret < 0) {
> +		dev_err(&client->dev, "Failed to register touchkey led\n");
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +static void tm2_touchkey_shutdown(struct i2c_client *client)
> +{
> +	struct tm2_touchkey_data *samsung_touchkey =
> +						i2c_get_clientdata(client);
> +	int ret;
> +
> +	disable_irq(client->irq);
> +	ret = tm2_touchkey_power_disable(samsung_touchkey);
> +	if (ret)
> +		dev_err(&client->dev, "Failed to disable power\n");
> +}
> +
> +static int tm2_touchkey_suspend(struct device *dev)
> +{
> +	struct tm2_touchkey_data *samsung_touchkey = dev_get_drvdata(dev);
> +	int ret;
> +
> +	disable_irq(samsung_touchkey->client->irq);
> +	ret = tm2_touchkey_power_disable(samsung_touchkey);
> +	if (ret)
> +		dev_err(dev, "Failed to disable power\n");
> +
> +	return ret;
> +}

These two functions are basically the same, can you factor it out?

> +
> +static int tm2_touchkey_resume(struct device *dev)
> +{
> +	struct tm2_touchkey_data *samsung_touchkey = dev_get_drvdata(dev);
> +	int ret;
> +
> +	enable_irq(samsung_touchkey->client->irq);
> +	ret = tm2_touchkey_power_enable(samsung_touchkey);
> +	if (ret)
> +		dev_err(dev, "Failed to enable power\n");
> +
> +	return ret;
> +}
> +
> +static SIMPLE_DEV_PM_OPS(tm2_touchkey_pm_ops, tm2_touchkey_suspend,
> +							tm2_touchkey_resume);
> +
> +static const struct i2c_device_id tm2_touchkey_id_table[] = {
> +	{TM2_TOUCHKEY_DEV_NAME, 0},
> +	{},
> +};
> +

You need a MODULE_DEVICE_TABLE(i2c, tm2_touchkey_id_table) here so the
module can be autoloaded when the device is registered.

> +static const struct of_device_id tm2_touchkey_of_match[] = {
> +	{.compatible = "samsung,tm2-touchkey",},
> +	{},
> +};
> +

Here a MODULE_DEVICE_TABLE(of, tm2_touchkey_of_match) is not strictly
needed since the I2C core always reports MODALIAS of the form i2c:<dev>
but still is good to have so the I2C core can be fixed at some point.

> +static struct i2c_driver tm2_touchkey_driver = {
> +	.driver = {
> +		.name = TM2_TOUCHKEY_DEV_NAME,
> +		.pm = &tm2_touchkey_pm_ops,
> +		.of_match_table = of_match_ptr(tm2_touchkey_of_match),
> +	},
> +	.probe = tm2_touchkey_probe,
> +	.shutdown = tm2_touchkey_shutdown,
> +	.id_table = tm2_touchkey_id_table,
> +};
> +
> +module_i2c_driver(tm2_touchkey_driver);
> +
> +MODULE_AUTHOR("Beomho Seo <beomho.seo@samsung.com>");
> +MODULE_AUTHOR("Jaechul Lee <jcsing.lee@samsung.com>");
> +MODULE_DESCRIPTION("Samsung touchkey driver");
> +MODULE_LICENSE("GPL v2");
> 

The rest looks good to me, so after the changes I suggested:

Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

^ permalink raw reply

* [PATCH v3 1/3] power: reset: add linkstation-reset driver
From: Andrew Lunn @ 2017-01-03 13:09 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <fff132e9-a178-6948-676e-6a4d24b6c4d6@gmail.com>

> > +
> > +	/* Check that nothing else has already setup a handler */
> > +	if (pm_power_off) {
> > +		lookup_symbol_name((ulong)pm_power_off, symname);
> > +		dev_err(&pdev->dev,
> > +			"pm_power_off already claimed %p %s",
> > +			pm_power_off, symname);
> > +		return -EBUSY;
> > +	}
> > +	pm_power_off = linkstation_reset;
> 
> That seems a bit complicated, why not just assume that there will be
> either this driver used, or not at all?

That is probably my fault. This is a copy from code i wrote many years
ago for the QNAP. I guess at the time i was battling with two
different pm_power_off handlers, so put in this code.

> Also, you are supposed to register a reboot notifier to which you can
> pass private context:

At the time i wrote the QNAP code, this did not exist. So maybe my
code is no longer a good example to copy.

	 Andrew

^ permalink raw reply

* [PATCH v6 6/8] IIO: add STM32 timer trigger driver
From: Benjamin Gaignard @ 2017-01-03 12:59 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <CA+M3ks6jshX-rEsi7Qfo-65awzWcHsEMVBjm-baYy979V9187Q@mail.gmail.com>

2017-01-03 10:23 GMT+01:00 Benjamin Gaignard <benjamin.gaignard@linaro.org>:
> 2017-01-02 19:22 GMT+01:00 Jonathan Cameron <jic23@kernel.org>:
>> On 02/01/17 08:46, Benjamin Gaignard wrote:
>>> 2016-12-30 22:12 GMT+01:00 Jonathan Cameron <jic23@kernel.org>:
>>>> On 09/12/16 14:15, Benjamin Gaignard wrote:
>>>>> Timers IPs can be used to generate triggers for other IPs like
>>>>> DAC, ADC or other timers.
>>>>> Each trigger may result of timer internals signals like counter enable,
>>>>> reset or edge, this configuration could be done through "master_mode"
>>>>> device attribute.
>>>>>
>>>>> A timer device could be triggered by other timers, we use the trigger
>>>>> name and is_stm32_iio_timer_trigger() function to distinguish them
>>>>> and configure IP input switch.
>>>>>
>>>>> Timer may also decide on which event (edge, level) they could
>>>>> be activated by a trigger, this configuration is done by writing in
>>>>> "slave_mode" device attribute.
>>>>>
>>>>> Since triggers could also be used by DAC or ADC their names are defined
>>>>> in include/ nux/iio/timer/stm32-timer-trigger.h so those IPs will be able
>>>>> to configure themselves in valid_trigger function
>>>>>
>>>>> Trigger have a "sampling_frequency" attribute which allow to configure
>>>>> timer sampling frequency without using PWM interface
>>>>>
>>>>> version 5:
>>>>> - simplify tables of triggers
>>>>> - only create an IIO device when needed
>>>>>
>>>>> version 4:
>>>>> - get triggers configuration from "reg" in DT
>>>>> - add tables of triggers
>>>>> - sampling frequency is enable/disable when writing in trigger
>>>>>   sampling_frequency attribute
>>>>> - no more use of interruptions
>>>>>
>>>>> version 3:
>>>>> - change compatible to "st,stm32-timer-trigger"
>>>>> - fix attributes access right
>>>>> - use string instead of int for master_mode and slave_mode
>>>>> - document device attributes in sysfs-bus-iio-timer-stm32
>>>>>
>>>>> version 2:
>>>>> - keep only one compatible
>>>>> - use st,input-triggers-names and st,output-triggers-names
>>>>>   to know which triggers are accepted and/or create by the device
>>>> Firstly, sorry it has taken me so long to get back to this.
>>>>
>>>> I'm still not keen on this use of iio_device elements just to act as
>>>> glue between triggers.  I think we need to work out a more light weight
>>>> way to do this.  As you are only using them for validation and to provide
>>>> somewhere to hang the control attibutes off, there is nothing stopping us
>>>> moving that over to the iio_trigger instead which would avoid the messy
>>>> duality going on here.
>>>
>>> I have add an iio_device because each hardware can generate multiple
>>> triggers (up to 5: trgo, ch 1...4) and slave_mode attribute will impact all the
>>> triggers of a device. For me it was making sense to centralize that in an
>>> iio_device rather than having an attribute "shared" (from hardware
>>> point of view)
>>> on multiple triggers.
>>> Since master_mode attribute is only used by trgo and not impact ch1...4
>>> triggers I will move it to trigger instead of the iio_device.
>>>
>>> I also wanted to be able to connect triggers on a iio_device as I
>>> could do for an
>>> ADC with a command like 'echo "tim1_trgo" > iio_deviceX/trigger/current_trigger'
>> This is interesting, but with a bit of refactoring I would think it would
>> be possible to share some of that code thus allowing non IIO devices to
>> bind to triggers.  Ultimately I want to be able to bind a trigger to
>> a trigger - I appreciate here the topology is more limited than that
>> so some complexity comes in.
>>
>> My gut feeling is that representing that topology explicitly is hard
>> to do in a remotely general way, but lets try it and see.
>> We run into this sort of interdependency issue between different bits of
>> the hardware all the time.  Setting a value somewhere effects the configuration
>> elsewhere - often the best plan is to just let that happen and leave it up to
>> userspace to check for changes if it cares.
>
> okay
>
>>> If I change that to parent_trigger attribute it change this behavior
>>> and I will have to
>>> duplicated what is done in iio_trigger_write_current() to find and
>>> validate triggers.
>> I get the reasoning, but we still end up with something represented
>> by an IIO device that isn't providing any channels at all. It's simply
>> using some of the infrastructure.  To my mind it is 'something else'
>> and should be represented as such.  I have no problem at all with
>> you registering additional elements in /sysfs/bus/iio/ to represent
>> these shared elements - we already have drivers that do that to
>> provide some centralized infrastructure (e.g. the sysfs-trigger)
>
> My hardware block are timers maybe I can add a channel type "IIO_TIMER"
> and declare a channel with info_mask_separate = BIT(IIO_CHAN_INFO_SAMP_FREQ)
> so I will be able to write/read sampling frequency on IIO device.
>

If it isn't possible to implement IIO_TIMER I will simply drop device part of
my driver until we find a solution because I would like to upstream at
least what is
need to ADC/DAC.

>> I'm worried about the scope spread we get for an IIO device otherwise.
>> They serve a well defined purpose at the moment, and that isn't what
>> is happening here.
>>
>> So my gut feeling is we are better deliberately not representing the
>> inter dependence and claiming all triggers we are creating are
>> independent.  That way we can have a nice generic infrastructure
>> that will work in all cases (be it pushing the sanity checking to
>> userspace).
>>
>> So each trigger has direct access to what controls it.  Changing anything
>> can effect other triggers in weird ways.
>>
>> I'm finding it hard to see anything else generalizing sufficiently
>> as we'll always get cases where we can't represent the topology without
>> diving into the complexity of something like the media controller
>> framework.
>>
>> Jonathan
>>>
>>>> I might still be missing something though!
>>>>
>>>> You would only I think need 3 attributes
>>>>
>>>> parrent_trigger
>>>> and something like your master_mode and slave_mode attributes.
>>>>
>>>> The parrent_trigger would need some validation etc, but if we keep it
>>>> within this driver initially that won't be hard to do. Checking the device
>>>> parent matches will do most of it.
>>>>
>>>> Jonathan
>>>>>
>>>>> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
>>>>> ---
>>>>>  .../ABI/testing/sysfs-bus-iio-timer-stm32          |  55 +++
>>>>>  drivers/iio/Kconfig                                |   2 +-
>>>>>  drivers/iio/Makefile                               |   1 +
>>>>>  drivers/iio/timer/Kconfig                          |  13 +
>>>>>  drivers/iio/timer/Makefile                         |   1 +
>>>>>  drivers/iio/timer/stm32-timer-trigger.c            | 466 +++++++++++++++++++++
>>>>>  drivers/iio/trigger/Kconfig                        |   1 -
>>>>>  include/linux/iio/timer/stm32-timer-trigger.h      |  62 +++
>>>>>  8 files changed, 599 insertions(+), 2 deletions(-)
>>>>>  create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>>>>>  create mode 100644 drivers/iio/timer/Kconfig
>>>>>  create mode 100644 drivers/iio/timer/Makefile
>>>>>  create mode 100644 drivers/iio/timer/stm32-timer-trigger.c
>>>>>  create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h
>>>>>
>>>>> diff --git a/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 b/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>>>>> new file mode 100644
>>>>> index 0000000..26583dd
>>>>> --- /dev/null
>>>>> +++ b/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>>>>> @@ -0,0 +1,55 @@
>>>>> +What:                /sys/bus/iio/devices/iio:deviceX/master_mode_available
>>>>> +KernelVersion:       4.10
>>>>> +Contact:     benjamin.gaignard at st.com
>>>>> +Description:
>>>>> +             Reading returns the list possible master modes which are:
>>>>> +             - "reset"     : The UG bit from the TIMx_EGR register is used as trigger output (TRGO).
>>>>> +             - "enable"    : The Counter Enable signal CNT_EN is used as trigger output.
>>>>> +             - "update"    : The update event is selected as trigger output.
>>>>> +                             For instance a master timer can then be used as a prescaler for a slave timer.
>>>>> +             - "compare_pulse" : The trigger output send a positive pulse when the CC1IF flag is to be set.
>>>>> +             - "OC1REF"    : OC1REF signal is used as trigger output.
>>>>> +             - "OC2REF"    : OC2REF signal is used as trigger output.
>>>>> +             - "OC3REF"    : OC3REF signal is used as trigger output.
>>>>> +             - "OC4REF"    : OC4REF signal is used as trigger output.
>>>>> +
>>>>> +What:                /sys/bus/iio/devices/iio:deviceX/master_mode
>>>>> +KernelVersion:       4.10
>>>>> +Contact:     benjamin.gaignard at st.com
>>>>> +Description:
>>>>> +             Reading returns the current master modes.
>>>>> +             Writing set the master mode
>>>>> +
>>>>> +What:                /sys/bus/iio/devices/iio:deviceX/slave_mode_available
>>>>> +KernelVersion:       4.10
>>>>> +Contact:     benjamin.gaignard at st.com
>>>>> +Description:
>>>>> +             Reading returns the list possible slave modes which are:
>>>>> +             - "disabled"  : The prescaler is clocked directly by the internal clock.
>>>>> +             - "encoder_1" : Counter counts up/down on TI2FP1 edge depending on TI1FP2 level.
>>>>> +             - "encoder_2" : Counter counts up/down on TI1FP2 edge depending on TI2FP1 level.
>>>>> +             - "encoder_3" : Counter counts up/down on both TI1FP1 and TI2FP2 edges depending
>>>>> +                             on the level of the other input.
>>>>> +             - "reset"     : Rising edge of the selected trigger input reinitializes the counter
>>>>> +                             and generates an update of the registers.
>>>>> +             - "gated"     : The counter clock is enabled when the trigger input is high.
>>>>> +                             The counter stops (but is not reset) as soon as the trigger becomes low.
>>>>> +                             Both start and stop of the counter are controlled.
>>>>> +             - "trigger"   : The counter starts at a rising edge of the trigger TRGI (but it is not
>>>>> +                             reset). Only the start of the counter is controlled.
>>>>> +             - "external_clock": Rising edges of the selected trigger (TRGI) clock the counter.
>>>>> +
>>>>> +What:                /sys/bus/iio/devices/iio:deviceX/slave_mode
>>>>> +KernelVersion:       4.10
>>>>> +Contact:     benjamin.gaignard at st.com
>>>>> +Description:
>>>>> +             Reading returns the current slave mode.
>>>>> +             Writing set the slave mode
>>>>> +
>>>>> +What:                /sys/bus/iio/devices/triggerX/sampling_frequency
>>>>> +KernelVersion:       4.10
>>>>> +Contact:     benjamin.gaignard at st.com
>>>>> +Description:
>>>>> +             Reading returns the current sampling frequency.
>>>>> +             Writing an value different of 0 set and start sampling.
>>>>> +             Writing 0 stop sampling.
>>>>> diff --git a/drivers/iio/Kconfig b/drivers/iio/Kconfig
>>>>> index 6743b18..2de2a80 100644
>>>>> --- a/drivers/iio/Kconfig
>>>>> +++ b/drivers/iio/Kconfig
>>>>> @@ -90,5 +90,5 @@ source "drivers/iio/potentiometer/Kconfig"
>>>>>  source "drivers/iio/pressure/Kconfig"
>>>>>  source "drivers/iio/proximity/Kconfig"
>>>>>  source "drivers/iio/temperature/Kconfig"
>>>>> -
>>>>> +source "drivers/iio/timer/Kconfig"
>>>>>  endif # IIO
>>>>> diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile
>>>>> index 87e4c43..b797c08 100644
>>>>> --- a/drivers/iio/Makefile
>>>>> +++ b/drivers/iio/Makefile
>>>>> @@ -32,4 +32,5 @@ obj-y += potentiometer/
>>>>>  obj-y += pressure/
>>>>>  obj-y += proximity/
>>>>>  obj-y += temperature/
>>>>> +obj-y += timer/
>>>>>  obj-y += trigger/
>>>>> diff --git a/drivers/iio/timer/Kconfig b/drivers/iio/timer/Kconfig
>>>>> new file mode 100644
>>>>> index 0000000..e3c21f2
>>>>> --- /dev/null
>>>>> +++ b/drivers/iio/timer/Kconfig
>>>>> @@ -0,0 +1,13 @@
>>>>> +#
>>>>> +# Timers drivers
>>>>> +
>>>>> +menu "Timers"
>>>>> +
>>>>> +config IIO_STM32_TIMER_TRIGGER
>>>>> +     tristate "STM32 Timer Trigger"
>>>>> +     depends on (ARCH_STM32 && OF && MFD_STM32_TIMERS) || COMPILE_TEST
>>>>> +     select IIO_TRIGGERED_EVENT
>>>>> +     help
>>>>> +       Select this option to enable STM32 Timer Trigger
>>>>> +
>>>>> +endmenu
>>>>> diff --git a/drivers/iio/timer/Makefile b/drivers/iio/timer/Makefile
>>>>> new file mode 100644
>>>>> index 0000000..4ad95ec9
>>>>> --- /dev/null
>>>>> +++ b/drivers/iio/timer/Makefile
>>>>> @@ -0,0 +1 @@
>>>>> +obj-$(CONFIG_IIO_STM32_TIMER_TRIGGER) += stm32-timer-trigger.o
>>>>> diff --git a/drivers/iio/timer/stm32-timer-trigger.c b/drivers/iio/timer/stm32-timer-trigger.c
>>>>> new file mode 100644
>>>>> index 0000000..8d16e8f
>>>>> --- /dev/null
>>>>> +++ b/drivers/iio/timer/stm32-timer-trigger.c
>>>>> @@ -0,0 +1,466 @@
>>>>> +/*
>>>>> + * Copyright (C) STMicroelectronics 2016
>>>>> + *
>>>>> + * Author: Benjamin Gaignard <benjamin.gaignard@st.com>
>>>>> + *
>>>>> + * License terms:  GNU General Public License (GPL), version 2
>>>>> + */
>>>>> +
>>>>> +#include <linux/iio/iio.h>
>>>>> +#include <linux/iio/sysfs.h>
>>>>> +#include <linux/iio/timer/stm32-timer-trigger.h>
>>>>> +#include <linux/iio/trigger.h>
>>>>> +#include <linux/iio/triggered_event.h>
>>>>> +#include <linux/interrupt.h>
>>>>> +#include <linux/mfd/stm32-timers.h>
>>>>> +#include <linux/module.h>
>>>>> +#include <linux/platform_device.h>
>>>>> +
>>>>> +#define MAX_TRIGGERS 6
>>>>> +#define MAX_VALIDS 5
>>>>> +
>>>>> +/* List the triggers created by each timer */
>>>>> +static const void *triggers_table[][MAX_TRIGGERS] = {
>>>>> +     { TIM1_TRGO, TIM1_CH1, TIM1_CH2, TIM1_CH3, TIM1_CH4,},
>>>>> +     { TIM2_TRGO, TIM2_CH1, TIM2_CH2, TIM2_CH3, TIM2_CH4,},
>>>>> +     { TIM3_TRGO, TIM3_CH1, TIM3_CH2, TIM3_CH3, TIM3_CH4,},
>>>>> +     { TIM4_TRGO, TIM4_CH1, TIM4_CH2, TIM4_CH3, TIM4_CH4,},
>>>>> +     { TIM5_TRGO, TIM5_CH1, TIM5_CH2, TIM5_CH3, TIM5_CH4,},
>>>>> +     { TIM6_TRGO,},
>>>>> +     { TIM7_TRGO,},
>>>>> +     { TIM8_TRGO, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4,},
>>>>> +     { TIM9_TRGO, TIM9_CH1, TIM9_CH2,},
>>>>> +     { TIM12_TRGO, TIM12_CH1, TIM12_CH2,},
>>>>> +};
>>>>> +
>>>>> +/* List the triggers accepted by each timer */
>>>>> +static const void *valids_table[][MAX_VALIDS] = {
>>>>> +     { TIM5_TRGO, TIM2_TRGO, TIM4_TRGO, TIM3_TRGO,},
>>>>> +     { TIM1_TRGO, TIM8_TRGO, TIM3_TRGO, TIM4_TRGO,},
>>>>> +     { TIM1_TRGO, TIM8_TRGO, TIM5_TRGO, TIM4_TRGO,},
>>>>> +     { TIM1_TRGO, TIM2_TRGO, TIM3_TRGO, TIM8_TRGO,},
>>>>> +     { TIM2_TRGO, TIM3_TRGO, TIM4_TRGO, TIM8_TRGO,},
>>>>> +     { }, /* timer 6 */
>>>>> +     { }, /* timer 7 */
>>>>> +     { TIM1_TRGO, TIM2_TRGO, TIM4_TRGO, TIM5_TRGO,},
>>>>> +     { TIM2_TRGO, TIM3_TRGO,},
>>>>> +     { TIM4_TRGO, TIM5_TRGO,},
>>>>> +};
>>>>> +
>>>>> +struct stm32_timer_trigger {
>>>>> +     struct device *dev;
>>>>> +     struct regmap *regmap;
>>>>> +     struct clk *clk;
>>>>> +     u32 max_arr;
>>>>> +     const void *triggers;
>>>>> +     const void *valids;
>>>>> +};
>>>>> +
>>>>> +static int stm32_timer_start(struct stm32_timer_trigger *priv,
>>>>> +                          unsigned int frequency)
>>>>> +{
>>>>> +     unsigned long long prd, div;
>>>>> +     int prescaler = 0;
>>>>> +     u32 ccer, cr1;
>>>>> +
>>>>> +     /* Period and prescaler values depends of clock rate */
>>>>> +     div = (unsigned long long)clk_get_rate(priv->clk);
>>>>> +
>>>>> +     do_div(div, frequency);
>>>>> +
>>>>> +     prd = div;
>>>>> +
>>>>> +     /*
>>>>> +      * Increase prescaler value until we get a result that fit
>>>>> +      * with auto reload register maximum value.
>>>>> +      */
>>>>> +     while (div > priv->max_arr) {
>>>>> +             prescaler++;
>>>>> +             div = prd;
>>>>> +             do_div(div, (prescaler + 1));
>>>>> +     }
>>>>> +     prd = div;
>>>>> +
>>>>> +     if (prescaler > MAX_TIM_PSC) {
>>>>> +             dev_err(priv->dev, "prescaler exceeds the maximum value\n");
>>>>> +             return -EINVAL;
>>>>> +     }
>>>>> +
>>>>> +     /* Check if nobody else use the timer */
>>>>> +     regmap_read(priv->regmap, TIM_CCER, &ccer);
>>>>> +     if (ccer & TIM_CCER_CCXE)
>>>>> +             return -EBUSY;
>>>>> +
>>>>> +     regmap_read(priv->regmap, TIM_CR1, &cr1);
>>>>> +     if (!(cr1 & TIM_CR1_CEN))
>>>>> +             clk_enable(priv->clk);
>>>>> +
>>>>> +     regmap_write(priv->regmap, TIM_PSC, prescaler);
>>>>> +     regmap_write(priv->regmap, TIM_ARR, prd - 1);
>>>>> +     regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
>>>>> +
>>>>> +     /* Force master mode to update mode */
>>>>> +     regmap_update_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS, 0x20);
>>>>> +
>>>>> +     /* Make sure that registers are updated */
>>>>> +     regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
>>>>> +
>>>>> +     /* Enable controller */
>>>>> +     regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
>>>>> +
>>>>> +     return 0;
>>>>> +}
>>>>> +
>>>>> +static void stm32_timer_stop(struct stm32_timer_trigger *priv)
>>>>> +{
>>>>> +     u32 ccer, cr1;
>>>>> +
>>>>> +     regmap_read(priv->regmap, TIM_CCER, &ccer);
>>>>> +     if (ccer & TIM_CCER_CCXE)
>>>>> +             return;
>>>>> +
>>>>> +     regmap_read(priv->regmap, TIM_CR1, &cr1);
>>>>> +     if (cr1 & TIM_CR1_CEN)
>>>>> +             clk_disable(priv->clk);
>>>>> +
>>>>> +     /* Stop timer */
>>>>> +     regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
>>>>> +     regmap_write(priv->regmap, TIM_PSC, 0);
>>>>> +     regmap_write(priv->regmap, TIM_ARR, 0);
>>>>> +}
>>>>> +
>>>>> +static ssize_t stm32_tt_store_frequency(struct device *dev,
>>>>> +                                     struct device_attribute *attr,
>>>>> +                                     const char *buf, size_t len)
>>>>> +{
>>>>> +     struct iio_trigger *trig = to_iio_trigger(dev);
>>>>> +     struct stm32_timer_trigger *priv = iio_trigger_get_drvdata(trig);
>>>>> +     unsigned int freq;
>>>>> +     int ret;
>>>>> +
>>>>> +     ret = kstrtouint(buf, 10, &freq);
>>>>> +     if (ret)
>>>>> +             return ret;
>>>>> +
>>>>> +     if (freq == 0) {
>>>>> +             stm32_timer_stop(priv);
>>>>> +     } else {
>>>>> +             ret = stm32_timer_start(priv, freq);
>>>>> +             if (ret)
>>>>> +                     return ret;
>>>>> +     }
>>>>> +
>>>>> +     return len;
>>>>> +}
>>>>> +
>>>>> +static ssize_t stm32_tt_read_frequency(struct device *dev,
>>>>> +                                    struct device_attribute *attr, char *buf)
>>>>> +{
>>>>> +     struct iio_trigger *trig = to_iio_trigger(dev);
>>>>> +     struct stm32_timer_trigger *priv = iio_trigger_get_drvdata(trig);
>>>>> +     u32 psc, arr, cr1;
>>>>> +     unsigned long long freq = 0;
>>>>> +
>>>>> +     regmap_read(priv->regmap, TIM_CR1, &cr1);
>>>>> +     regmap_read(priv->regmap, TIM_PSC, &psc);
>>>>> +     regmap_read(priv->regmap, TIM_ARR, &arr);
>>>>> +
>>>>> +     if (psc && arr && (cr1 & TIM_CR1_CEN)) {
>>>>> +             freq = (unsigned long long)clk_get_rate(priv->clk);
>>>>> +             do_div(freq, psc);
>>>>> +             do_div(freq, arr);
>>>>> +     }
>>>>> +
>>>>> +     return sprintf(buf, "%d\n", (unsigned int)freq);
>>>>> +}
>>>>> +
>>>>> +static IIO_DEV_ATTR_SAMP_FREQ(0660,
>>>>> +                           stm32_tt_read_frequency,
>>>>> +                           stm32_tt_store_frequency);
>>>>> +
>>>>> +static struct attribute *stm32_trigger_attrs[] = {
>>>>> +     &iio_dev_attr_sampling_frequency.dev_attr.attr,
>>>>> +     NULL,
>>>>> +};
>>>>> +
>>>>> +static const struct attribute_group stm32_trigger_attr_group = {
>>>>> +     .attrs = stm32_trigger_attrs,
>>>>> +};
>>>>> +
>>>>> +static const struct attribute_group *stm32_trigger_attr_groups[] = {
>>>>> +     &stm32_trigger_attr_group,
>>>>> +     NULL,
>>>>> +};
>>>>> +
>>>>> +static char *master_mode_table[] = {
>>>>> +     "reset",
>>>>> +     "enable",
>>>>> +     "update",
>>>>> +     "compare_pulse",
>>>>> +     "OC1REF",
>>>>> +     "OC2REF",
>>>>> +     "OC3REF",
>>>>> +     "OC4REF"
>>>>> +};
>>>>> +
>>>>> +static ssize_t stm32_tt_show_master_mode(struct device *dev,
>>>>> +                                      struct device_attribute *attr,
>>>>> +                                      char *buf)
>>>>> +{
>>>>> +     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
>>>>> +     struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>>> +     u32 cr2;
>>>>> +
>>>>> +     regmap_read(priv->regmap, TIM_CR2, &cr2);
>>>>> +     cr2 = (cr2 & TIM_CR2_MMS) >> TIM_CR2_MMS_SHIFT;
>>>>> +
>>>>> +     return snprintf(buf, PAGE_SIZE, "%s\n", master_mode_table[cr2]);
>>>>> +}
>>>>> +
>>>>> +static ssize_t stm32_tt_store_master_mode(struct device *dev,
>>>>> +                                       struct device_attribute *attr,
>>>>> +                                       const char *buf, size_t len)
>>>>> +{
>>>>> +     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
>>>>> +     struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>>> +     int i;
>>>>> +
>>>>> +     for (i = 0; i < ARRAY_SIZE(master_mode_table); i++) {
>>>>> +             if (!strncmp(master_mode_table[i], buf,
>>>>> +                          strlen(master_mode_table[i]))) {
>>>>> +                     regmap_update_bits(priv->regmap, TIM_CR2,
>>>>> +                                        TIM_CR2_MMS, i << TIM_CR2_MMS_SHIFT);
>>>>> +                     return len;
>>>>> +             }
>>>>> +     }
>>>>> +
>>>>> +     return -EINVAL;
>>>>> +}
>>>>> +
>>>>> +static IIO_CONST_ATTR(master_mode_available,
>>>>> +     "reset enable update compare_pulse OC1REF OC2REF OC3REF OC4REF");
>>>>> +
>>>>> +static IIO_DEVICE_ATTR(master_mode, 0660,
>>>>> +                    stm32_tt_show_master_mode,
>>>>> +                    stm32_tt_store_master_mode,
>>>>> +                    0);
>>>>> +
>>>>> +static char *slave_mode_table[] = {
>>>>> +     "disabled",
>>>>> +     "encoder_1",
>>>>> +     "encoder_2",
>>>>> +     "encoder_3",
>>>>> +     "reset",
>>>>> +     "gated",
>>>>> +     "trigger",
>>>>> +     "external_clock",
>>>>> +};
>>>>> +
>>>>> +static ssize_t stm32_tt_show_slave_mode(struct device *dev,
>>>>> +                                     struct device_attribute *attr,
>>>>> +                                     char *buf)
>>>>> +{
>>>>> +     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
>>>>> +     struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>>> +     u32 smcr;
>>>>> +
>>>>> +     regmap_read(priv->regmap, TIM_SMCR, &smcr);
>>>>> +     smcr &= TIM_SMCR_SMS;
>>>>> +
>>>>> +     return snprintf(buf, PAGE_SIZE, "%s\n", slave_mode_table[smcr]);
>>>>> +}
>>>>> +
>>>>> +static ssize_t stm32_tt_store_slave_mode(struct device *dev,
>>>>> +                                      struct device_attribute *attr,
>>>>> +                                      const char *buf, size_t len)
>>>>> +{
>>>>> +     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
>>>>> +     struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>>> +     int i;
>>>>> +
>>>>> +     for (i = 0; i < ARRAY_SIZE(slave_mode_table); i++) {
>>>>> +             if (!strncmp(slave_mode_table[i], buf,
>>>>> +                          strlen(slave_mode_table[i]))) {
>>>>> +                     regmap_update_bits(priv->regmap,
>>>>> +                                        TIM_SMCR, TIM_SMCR_SMS, i);
>>>>> +                     return len;
>>>>> +             }
>>>>> +     }
>>>>> +
>>>>> +     return -EINVAL;
>>>>> +}
>>>>> +
>>>>> +static IIO_CONST_ATTR(slave_mode_available,
>>>>> +"disabled encoder_1 encoder_2 encoder_3 reset gated trigger external_clock");
>>>>> +
>>>>> +static IIO_DEVICE_ATTR(slave_mode, 0660,
>>>>> +                    stm32_tt_show_slave_mode,
>>>>> +                    stm32_tt_store_slave_mode,
>>>>> +                    0);
>>>>> +
>>>>> +static struct attribute *stm32_timer_attrs[] = {
>>>>> +     &iio_dev_attr_master_mode.dev_attr.attr,
>>>>> +     &iio_const_attr_master_mode_available.dev_attr.attr,
>>>>> +     &iio_dev_attr_slave_mode.dev_attr.attr,
>>>>> +     &iio_const_attr_slave_mode_available.dev_attr.attr,
>>>>> +     NULL,
>>>>> +};
>>>>> +
>>>>> +static const struct attribute_group stm32_timer_attr_group = {
>>>>> +     .attrs = stm32_timer_attrs,
>>>>> +};
>>>>> +
>>>>> +static const struct iio_trigger_ops timer_trigger_ops = {
>>>>> +     .owner = THIS_MODULE,
>>>>> +};
>>>>> +
>>>>> +static int stm32_setup_iio_triggers(struct stm32_timer_trigger *priv)
>>>>> +{
>>>>> +     int ret;
>>>>> +     const char * const *cur = priv->triggers;
>>>>> +
>>>>> +     while (cur && *cur) {
>>>>> +             struct iio_trigger *trig;
>>>>> +
>>>>> +             trig = devm_iio_trigger_alloc(priv->dev, "%s", *cur);
>>>>> +             if  (!trig)
>>>>> +                     return -ENOMEM;
>>>>> +
>>>>> +             trig->dev.parent = priv->dev->parent;
>>>>> +             trig->ops = &timer_trigger_ops;
>>>>> +             trig->dev.groups = stm32_trigger_attr_groups;
>>>>> +             iio_trigger_set_drvdata(trig, priv);
>>>>> +
>>>>> +             ret = devm_iio_trigger_register(priv->dev, trig);
>>>>> +             if (ret)
>>>>> +                     return ret;
>>>>> +             cur++;
>>>>> +     }
>>>>> +
>>>>> +     return 0;
>>>>> +}
>>>>> +
>>>>> +/**
>>>>> + * is_stm32_timer_trigger
>>>>> + * @trig: trigger to be checked
>>>>> + *
>>>>> + * return true if the trigger is a valid stm32 iio timer trigger
>>>>> + * either return false
>>>>> + */
>>>>> +bool is_stm32_timer_trigger(struct iio_trigger *trig)
>>>>> +{
>>>>> +     return (trig->ops == &timer_trigger_ops);
>>>>> +}
>>>>> +EXPORT_SYMBOL(is_stm32_timer_trigger);
>>>>> +
>>>>> +static int stm32_validate_trigger(struct iio_dev *indio_dev,
>>>>> +                               struct iio_trigger *trig)
>>>>> +{
>>>>> +     struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>>> +     const char * const *cur = priv->valids;
>>>>> +     unsigned int i = 0;
>>>>> +
>>>>> +     if (!is_stm32_timer_trigger(trig))
>>>>> +             return -EINVAL;
>>>>> +
>>>>> +     while (cur && *cur) {
>>>>> +             if (!strncmp(trig->name, *cur, strlen(trig->name))) {
>>>>> +                     regmap_update_bits(priv->regmap,
>>>>> +                                        TIM_SMCR, TIM_SMCR_TS,
>>>>> +                                        i << TIM_SMCR_TS_SHIFT);
>>>>> +                     return 0;
>>>>> +             }
>>>>> +             cur++;
>>>>> +             i++;
>>>>> +     }
>>>>> +
>>>>> +     return -EINVAL;
>>>>> +}
>>>>> +
>>>>> +static const struct iio_info stm32_trigger_info = {
>>>>> +     .driver_module = THIS_MODULE,
>>>>> +     .validate_trigger = stm32_validate_trigger,
>>>>> +     .attrs = &stm32_timer_attr_group,
>>>>> +};
>>>>> +
>>>>> +static struct stm32_timer_trigger *stm32_setup_iio_device(struct device *dev)
>>>>> +{
>>>>> +     struct iio_dev *indio_dev;
>>>>> +     int ret;
>>>>> +
>>>>> +     indio_dev = devm_iio_device_alloc(dev,
>>>>> +                                       sizeof(struct stm32_timer_trigger));
>>>>> +     if (!indio_dev)
>>>>> +             return NULL;
>>>>> +
>>>>> +     indio_dev->name = dev_name(dev);
>>>>> +     indio_dev->dev.parent = dev;
>>>>> +     indio_dev->info = &stm32_trigger_info;
>>>>> +     indio_dev->modes = INDIO_EVENT_TRIGGERED;
>>>>> +     indio_dev->num_channels = 0;
>>>>> +     indio_dev->dev.of_node = dev->of_node;
>>>>> +
>>>>> +     ret = devm_iio_device_register(dev, indio_dev);
>>>>> +     if (ret)
>>>>> +             return NULL;
>>>>> +
>>>>> +     return iio_priv(indio_dev);
>>>>> +}
>>>>> +
>>>>> +static int stm32_timer_trigger_probe(struct platform_device *pdev)
>>>>> +{
>>>>> +     struct device *dev = &pdev->dev;
>>>>> +     struct stm32_timer_trigger *priv;
>>>>> +     struct stm32_timers *ddata = dev_get_drvdata(pdev->dev.parent);
>>>>> +     unsigned int index;
>>>>> +     int ret;
>>>>> +
>>>>> +     if (of_property_read_u32(dev->of_node, "reg", &index))
>>>>> +             return -EINVAL;
>>>>> +
>>>>> +     if (index >= ARRAY_SIZE(triggers_table))
>>>>> +             return -EINVAL;
>>>>> +
>>>>> +     /* Create an IIO device only if we have triggers to be validated */
>>>>> +     if (*valids_table[index])
>>>>> +             priv = stm32_setup_iio_device(dev);
>>>>
>>>> I still don't like this. Really feels like we shouldn't be creating an
>>>> iio device with all the bagage that carries just to allow us to do the
>>>> trigger trees.  We ought to have a much more light weight solution for this
>>>> functionality - we aren't typically even using the interrupt tree stuff
>>>> that the triggers for devices are all really about.
>>>>
>>>> A simpler approach of allowing each trigger the option of a parent seems like
>>>> it would be cleaner.  Could be done entirely within this driver in the first
>>>> instance.  Basically it would just look like your master and slave attributes
>>>> but have those under triggerX not iio:deviceX.
>>>>
>>>> We can work out how to make it more generic later - including perhaps the
>>>> option to trigger from triggers outside this driver, using some parallel
>>>> infrastructure to the device triggering.
>>>>
>>>>
>>>>> +     else
>>>>> +             priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>>>>> +
>>>>> +     if (!priv)
>>>>> +             return -ENOMEM;
>>>>> +
>>>>> +     priv->dev = dev;
>>>>> +     priv->regmap = ddata->regmap;
>>>>> +     priv->clk = ddata->clk;
>>>>> +     priv->max_arr = ddata->max_arr;
>>>>> +     priv->triggers = triggers_table[index];
>>>>> +     priv->valids = valids_table[index];
>>>>> +
>>>>> +     ret = stm32_setup_iio_triggers(priv);
>>>>> +     if (ret)
>>>>> +             return ret;
>>>>> +
>>>>> +     platform_set_drvdata(pdev, priv);
>>>>> +
>>>>> +     return 0;
>>>>> +}
>>>>> +
>>>>> +static const struct of_device_id stm32_trig_of_match[] = {
>>>>> +     { .compatible = "st,stm32-timer-trigger", },
>>>>> +     { /* end node */ },
>>>>> +};
>>>>> +MODULE_DEVICE_TABLE(of, stm32_trig_of_match);
>>>>> +
>>>>> +static struct platform_driver stm32_timer_trigger_driver = {
>>>>> +     .probe = stm32_timer_trigger_probe,
>>>>> +     .driver = {
>>>>> +             .name = "stm32-timer-trigger",
>>>>> +             .of_match_table = stm32_trig_of_match,
>>>>> +     },
>>>>> +};
>>>>> +module_platform_driver(stm32_timer_trigger_driver);
>>>>> +
>>>>> +MODULE_ALIAS("platform: stm32-timer-trigger");
>>>>> +MODULE_DESCRIPTION("STMicroelectronics STM32 Timer Trigger driver");
>>>>> +MODULE_LICENSE("GPL v2");
>>>>> diff --git a/drivers/iio/trigger/Kconfig b/drivers/iio/trigger/Kconfig
>>>>> index 809b2e7..f2af4fe 100644
>>>>> --- a/drivers/iio/trigger/Kconfig
>>>>> +++ b/drivers/iio/trigger/Kconfig
>>>>> @@ -46,5 +46,4 @@ config IIO_SYSFS_TRIGGER
>>>>>
>>>>>         To compile this driver as a module, choose M here: the
>>>>>         module will be called iio-trig-sysfs.
>>>>> -
>>>> Clean this up.
>>>
>>> ok
>>>
>>>>>  endmenu
>>>>> diff --git a/include/linux/iio/timer/stm32-timer-trigger.h b/include/linux/iio/timer/stm32-timer-trigger.h
>>>>> new file mode 100644
>>>>> index 0000000..55535ae
>>>>> --- /dev/null
>>>>> +++ b/include/linux/iio/timer/stm32-timer-trigger.h
>>>>> @@ -0,0 +1,62 @@
>>>>> +/*
>>>>> + * Copyright (C) STMicroelectronics 2016
>>>>> + *
>>>>> + * Author: Benjamin Gaignard <benjamin.gaignard@st.com>
>>>>> + *
>>>>> + * License terms:  GNU General Public License (GPL), version 2
>>>>> + */
>>>>> +
>>>>> +#ifndef _STM32_TIMER_TRIGGER_H_
>>>>> +#define _STM32_TIMER_TRIGGER_H_
>>>>> +
>>>>> +#define TIM1_TRGO    "tim1_trgo"
>>>>> +#define TIM1_CH1     "tim1_ch1"
>>>>> +#define TIM1_CH2     "tim1_ch2"
>>>>> +#define TIM1_CH3     "tim1_ch3"
>>>>> +#define TIM1_CH4     "tim1_ch4"
>>>>> +
>>>>> +#define TIM2_TRGO    "tim2_trgo"
>>>>> +#define TIM2_CH1     "tim2_ch1"
>>>>> +#define TIM2_CH2     "tim2_ch2"
>>>>> +#define TIM2_CH3     "tim2_ch3"
>>>>> +#define TIM2_CH4     "tim2_ch4"
>>>>> +
>>>>> +#define TIM3_TRGO    "tim3_trgo"
>>>>> +#define TIM3_CH1     "tim3_ch1"
>>>>> +#define TIM3_CH2     "tim3_ch2"
>>>>> +#define TIM3_CH3     "tim3_ch3"
>>>>> +#define TIM3_CH4     "tim3_ch4"
>>>>> +
>>>>> +#define TIM4_TRGO    "tim4_trgo"
>>>>> +#define TIM4_CH1     "tim4_ch1"
>>>>> +#define TIM4_CH2     "tim4_ch2"
>>>>> +#define TIM4_CH3     "tim4_ch3"
>>>>> +#define TIM4_CH4     "tim4_ch4"
>>>>> +
>>>>> +#define TIM5_TRGO    "tim5_trgo"
>>>>> +#define TIM5_CH1     "tim5_ch1"
>>>>> +#define TIM5_CH2     "tim5_ch2"
>>>>> +#define TIM5_CH3     "tim5_ch3"
>>>>> +#define TIM5_CH4     "tim5_ch4"
>>>>> +
>>>>> +#define TIM6_TRGO    "tim6_trgo"
>>>>> +
>>>>> +#define TIM7_TRGO    "tim7_trgo"
>>>>> +
>>>>> +#define TIM8_TRGO    "tim8_trgo"
>>>>> +#define TIM8_CH1     "tim8_ch1"
>>>>> +#define TIM8_CH2     "tim8_ch2"
>>>>> +#define TIM8_CH3     "tim8_ch3"
>>>>> +#define TIM8_CH4     "tim8_ch4"
>>>>> +
>>>>> +#define TIM9_TRGO    "tim9_trgo"
>>>>> +#define TIM9_CH1     "tim9_ch1"
>>>>> +#define TIM9_CH2     "tim9_ch2"
>>>>> +
>>>>> +#define TIM12_TRGO   "tim12_trgo"
>>>>> +#define TIM12_CH1    "tim12_ch1"
>>>>> +#define TIM12_CH2    "tim12_ch2"
>>>>> +
>>>>> +bool is_stm32_timer_trigger(struct iio_trigger *trig);
>>>>> +
>>>>> +#endif
>>>>>
>>>>
>>>
>>>
>>>
>>
>
>
>
> --
> Benjamin Gaignard
>
> Graphic Study Group
>
> Linaro.org ? Open source software for ARM SoCs
>
> Follow Linaro: Facebook | Twitter | Blog



-- 
Benjamin Gaignard

Graphic Study Group

Linaro.org ? Open source software for ARM SoCs

Follow Linaro: Facebook | Twitter | Blog

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