* [PATCH v2 5/5] ARM: dts: Add LEGO MINDSTORMS EV3 dts
From: David Lechner @ 2017-01-06 4:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483677228-2325-1-git-send-email-david@lechnology.com>
This adds a device tree definition file for LEGO MINDSTORMS EV3.
What is working:
* Pin muxing
* Pinconf
* GPIOs
* MicroSD card reader
* UART on input ports 1 and 2
* Buttons
* LEDs
* Poweroff/reset
* Flash memory
* EEPROM
* Speaker
* USB host port
* USB perepheral port
* A/DC chip
What is not working/to be added later:
* Display - waiting for "simple DRM" to be mainlined
* Bluetooth - needs new driver for sequencing power/enable/clock - usable
now by manipulating gpios/pwm in userspace
* Input and output ports - need some sort of new phy or extcon driver
* Battery indication - needs new power supply driver
Note on flash partitions:
These partitions are based on the official EV3 firmware from LEGO. It is
expected that most users of the mainline kernel on EV3 will be booting from
an SD card while retaining the official firmware in the flash memory.
Furthermore, the official firmware uses an ancient U-Boot (2009) that has
no device tree support. So, it makes sense to have this partition table in
the EV3 device tree file. In the unlikely case that anyone does create their
own firmware image with different partitioning, they can use a modern
U-Boot in that firmware image that modifies the device tree with the custom
partitions.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/da850-lego-ev3.dts | 381 +++++++++++++++++++++++++++++++++++
2 files changed, 383 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/da850-lego-ev3.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9a7375c..471b802 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -128,7 +128,8 @@ dtb-$(CONFIG_ARCH_CLPS711X) += \
dtb-$(CONFIG_ARCH_DAVINCI) += \
da850-lcdk.dtb \
da850-enbw-cmc.dtb \
- da850-evm.dtb
+ da850-evm.dtb \
+ da850-lego-ev3.dtb
dtb-$(CONFIG_ARCH_DIGICOLOR) += \
cx92755_equinox.dtb
dtb-$(CONFIG_ARCH_EFM32) += \
diff --git a/arch/arm/boot/dts/da850-lego-ev3.dts b/arch/arm/boot/dts/da850-lego-ev3.dts
new file mode 100644
index 0000000..d720c58
--- /dev/null
+++ b/arch/arm/boot/dts/da850-lego-ev3.dts
@@ -0,0 +1,381 @@
+/*
+ * Device tree for LEGO MINDSTORMS EV3
+ *
+ * Copyright (C) 2017 David Lechner <david@lechnology.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation, version 2.
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/pwm/pwm.h>
+
+#include "da850.dtsi"
+
+/ {
+ compatible = "lego,ev3", "ti,da850";
+ model = "LEGO MINDSTORMS EV3";
+
+ /*
+ * The buttons on the EV3 are mapped to keyboard keys.
+ */
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ label = "Brick buttons";
+ pinctrl-names = "default";
+ pinctrl-0 = <&button_pins>, <&button_bias>;
+
+ enter {
+ label = "Brick button ENTER";
+ linux,code = <KEY_ENTER>;
+ gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
+ };
+ left {
+ label = "Brick button LEFT";
+ linux,code = <KEY_LEFT>;
+ gpios = <&gpio 102 GPIO_ACTIVE_HIGH>;
+ };
+ back {
+ label = "Brick button BACK";
+ linux,code = <KEY_BACKSPACE>;
+ gpios = <&gpio 106 GPIO_ACTIVE_HIGH>;
+ };
+ right {
+ label = "Brick button RIGHT";
+ linux,code = <KEY_RIGHT>;
+ gpios = <&gpio 124 GPIO_ACTIVE_HIGH>;
+ };
+ down {
+ label = "Brick button DOWN";
+ linux,code = <KEY_DOWN>;
+ gpios = <&gpio 126 GPIO_ACTIVE_HIGH>;
+ };
+ up {
+ label = "Brick button UP";
+ linux,code = <KEY_UP>;
+ gpios = <&gpio 127 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ /*
+ * The EV3 has two built-in bi-color LEDs behind the buttons.
+ */
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins>;
+
+ left_green {
+ label = "led0:green:brick-status";
+ /* GP6[13] */
+ gpios = <&gpio 103 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+ right_red {
+ label = "led1:red:brick-status";
+ /* GP6[7] */
+ gpios = <&gpio 108 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+ left_red {
+ label = "led0:red:brick-status";
+ /* GP6[12] */
+ gpios = <&gpio 109 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+ right_green {
+ label = "led1:green:brick-status";
+ /* GP6[14] */
+ gpios = <&gpio 110 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ beeper {
+ compatible = "pwm-beeper";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ehrpwm0b_pins>, <&_pins>;
+ pwms = <&ehrpwm0 1 0 0>;
+ enable-gpios = <&gpio 111 GPIO_ACTIVE_HIGH>;
+ };
+
+ /*
+ * The EV3 is powered down by turning off the main 5V supply.
+ */
+ gpio-poweroff {
+ compatible = "gpio-poweroff";
+ gpios = <&gpio 107 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&system_power_pin>;
+ };
+
+ /*
+ * The Bluetooth chip requires a clock at 32768Hz. One of the PWMs
+ * is used to generate this signal.
+ */
+ bt-slow-clock {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "slow_clk";
+ pwms = <&ecap2 0 30517>;
+ };
+
+ /*
+ * This is a 5V current limiting regulator that is shared by USB,
+ * the sensor (input) ports, the motor (output) ports and the A/DC.
+ */
+ vcc5v: regulator1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v_pins>;
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-supply";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio 101 0>;
+ over-current-gpios = <&gpio 99 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ regulator-boot-on;
+ };
+
+ /*
+ * This is a simple voltage divider on VCC5V to provide a 2.5V
+ * reference signal to the ADC.
+ */
+ adc_ref: regulator2 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-supply";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ vin-supply = <&vcc5v>;
+ };
+};
+
+&pmx_core {
+ status = "okay";
+
+ spi0_cs3_pin: pinmux_spi0_cs3_pin {
+ pinctrl-single,bits = <
+ /* CS3 */
+ 0xc 0x01000000 0x0f000000
+ >;
+ };
+ mmc0_cd_pin: pinmux_mmc0_cd {
+ pinctrl-single,bits = <
+ /* GP5[14] */
+ 0x2C 0x00000080 0x000000f0
+ >;
+ };
+ button_pins: pinmux_button_pins {
+ pinctrl-single,bits = <
+ /* GP1[13] */
+ 0x8 0x00000800 0x00000f00
+ /* GP6[10] */
+ 0x34 0x00800000 0x00f00000
+ /* GP6[6] */
+ 0x38 0x00000080 0x000000f0
+ /* GP7[12], GP7[14], GP7[15] */
+ 0x40 0x00808800 0x00f0ff00
+ >;
+ };
+ led_pins: pinmux_led_pins {
+ pinctrl-single,bits = <
+ /* GP6[12], GP6[13], GP6[14] */
+ 0x34 0x00008880 0x0000fff0
+ /* GP6[7] */
+ 0x38 0x00000008 0x0000000f
+ >;
+ };
+ amp_pins: pinmux_amp_pins {
+ pinctrl-single,bits = <
+ /* GP6[15] */
+ 0x34 0x00000008 0x0000000f
+ >;
+ };
+ system_power_pin: pinmux_system_power {
+ pinctrl-single,bits = <
+ /* GP6[11] */
+ 0x34 0x00080000 0x000f0000
+ >;
+ };
+ vcc5v_pins: pinmux_vcc5v {
+ pinctrl-single,bits = <
+ /* GP6[5] */
+ 0x40 0x00000080 0x000000f0
+ /* GP6[3] */
+ 0x4c 0x00008000 0x0000f000
+ >;
+ };
+};
+
+&pinconf {
+ status = "okay";
+
+ /* Buttons have external pulldown resistors */
+ button_bias: button-bias-groups {
+ disable {
+ groups = "cp5", "cp24", "cp25", "cp28";
+ bias-disable;
+ };
+ };
+};
+
+/* Input port 2 */
+&serial0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&serial0_rxtx_pins>;
+};
+
+/* Input port 1 */
+&serial1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&serial1_rxtx_pins>;
+};
+
+/* Bluetooth */
+&serial2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&serial2_rxtx_pins>, <&serial2_rtscts_pins>;
+};
+
+&rtc0 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ /*
+ * EEPROM contains the first stage bootloader, HW ID and Bluetooth MAC.
+ */
+ eeprom at 50 {
+ compatible = "at24,24c128";
+ pagesize = <64>;
+ read-only;
+ reg = <0x50>;
+ };
+};
+
+&wdt {
+ status = "okay";
+};
+
+&mmc0 {
+ status = "okay";
+ max-frequency = <50000000>;
+ bus-width = <4>;
+ cd-gpios = <&gpio 94 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin>;
+};
+
+&ehrpwm0 {
+ status = "okay";
+};
+
+&ehrpwm1 {
+ status = "okay";
+ pinctrl-names = "default";
+ /* MBPWM, MAPWM */
+ pinctrl-0 = <&ehrpwm1a_pins>, <&ehrpwm1b_pins>;
+};
+
+&ecap0 {
+ status = "okay";
+ pinctrl-names = "default";
+ /* MCPWM */
+ pinctrl-0 = <&ecap0_pins>;
+};
+
+&ecap1 {
+ status = "okay";
+ pinctrl-names = "default";
+ /* MDPWM */
+ pinctrl-0 = <&ecap1_pins>;
+};
+
+&ecap2 {
+ status = "okay";
+ pinctrl-names = "default";
+ /* BTSLOWCLK */
+ pinctrl-0 = <&ecap2_pins>;
+};
+
+&spi0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>, <&spi0_cs3_pin>;
+
+ flash at 0 {
+ compatible = "n25q128a13", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ ti,spi-wdelay = <8>;
+
+ /* Partitions are based on the official firmware from LEGO */
+ partitions {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition at 0 {
+ label = "U-Boot";
+ reg = <0 0x40000>;
+ };
+
+ partition at 40000 {
+ label = "U-Boot Env";
+ reg = <0x40000 0x10000>;
+ };
+
+ partition at 50000 {
+ label = "Kernel";
+ reg = <0x50000 0x200000>;
+ };
+
+ partition at 250000 {
+ label = "Filesystem";
+ reg = <0x250000 0xa50000>;
+ };
+
+ partition at cb0000 {
+ label = "Storage";
+ reg = <0xcb0000 0x2f0000>;
+ };
+ };
+ };
+
+ adc at 3 {
+ compatible = "ti-ads7957";
+ reg = <3>;
+ spi-max-frequency = <10000000>;
+ refin-supply = <&adc_ref>;
+ };
+};
+
+&gpio {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+ vbus-supply = <&vcc5v>;
+};
--
2.7.4
^ permalink raw reply related
* [PATCH v29 0/9] arm64: add kdump support
From: AKASHI Takahiro @ 2017-01-06 4:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <610620b2-d77d-0684-144f-0f76d0cdbb5e@redhat.com>
On Fri, Jan 06, 2017 at 08:56:30AM +0530, Pratyush Anand wrote:
>
>
> On Wednesday 28 December 2016 10:03 AM, AKASHI Takahiro wrote:
> >This patch series adds kdump support on arm64.
> >
> >To load a crash-dump kernel to the systems, a series of patches to
> >kexec-tools[1] are also needed. Please use the latest one, v4 [2].
> >For your convinience, you can pick them up from:
> > https://git.linaro.org/people/takahiro.akashi/linux-aarch64.git arm64/kdump
> > https://git.linaro.org/people/takahiro.akashi/kexec-tools.git arm64/kdump
> >
> >To examine vmcore (/proc/vmcore) on a crash-dump kernel, you can use
> > - crash utility (v7.1.7 or later) [3]
> > (As of today, the very latest tree cannot handle a core image correctly
> > due to the commit 7fd8329ba502 ("taint/module: Clean up global and module
> > taint flags handling")
> >
> >
> >The previous version, v27, was also:
> >Tested-by: Pratyush Anand <panand@redhat.com> (mustang and seattle)
>
> You have my "Tested-by" for this version as well :-). Patches works great
> after applying them over v4.10-rc2.
Great thanks, again.
> I used crash-utility from below where there are few patches queued for
> crash-7.1.8
> https://github.com/crash-utility/crash
Yes, we need some patch for v4.10 kernel.
-Takahiro AKASHI
> ~Pratyush
^ permalink raw reply
* [PATCH v3] arm64: mm: Fix NOMAP page initialization
From: Prakash B @ 2017-01-06 5:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cbbf14fd-a1cc-2463-ba67-acd6d61e9db1@linaro.org>
Hi Hanjun,
> a update here, tested on 4.9,
>
> - Applied Ard's two patches only
> - Applied Robert's patch only
>
> Both of them can work fine on D05 with NUMA enabled, which means
> boot ok and LTP MM stress test is passed.
It is not related to this patch set.
LTP "cpuset01" test crashes with latest 4.9, 4.10-rc1 and 4.10-rc2 kernels on
Thunderx 2S . Do you see any such behaviour on D05.
Any idea what might be causing this issue.
227.627546] cpuset01: page allocation stalls for 10096ms, order:0,
mode:0x24200ca(GFP_HIGHUSER_MOVABLE)
[ 227.627586] CPU: 53 PID: 11017 Comm: cpuset01 Not tainted 4.9.04kNUMA+ #2
[ 227.627591] Hardware name: www.cavium.com ThunderX Unknown/ThunderX
Unknown, BIOS 0.3 Aug 24 2016
[ 227.627599] Call trace:
[ 227.627623] [<ffff000008089f10>] dump_backtrace+0x0/0x238
[ 227.627640] [<ffff00000808a16c>] show_stack+0x24/0x30
[ 227.627656] [<ffff00000846fb50>] dump_stack+0x94/0xb4
[ 227.627679] [<ffff0000081eb4f8>] warn_alloc+0x138/0x150
[ 227.627686] [<ffff0000081ec0a4>] __alloc_pages_nodemask+0xb04/0xcf0
[ 227.627697] [<ffff000008245988>] alloc_pages_vma+0xc8/0x270
[ 227.627715] [<ffff00000821f604>] handle_mm_fault+0xc8c/0xfd8
[ 227.627732] [<ffff00000809a488>] do_page_fault+0x2c0/0x368
[ 227.627744] [<ffff0000080812ec>] do_mem_abort+0x6c/0xe0
[ 227.627752] Exception stack(0xffff801f55823e00 to 0xffff801f55823f30)
[ 227.627763] 3e00: 0000000000000000 0000ffff92682000
ffffffffffffffff 0000ffff9252b3e8
[ 227.627774] 3e20: 0000000020000000 0000000000000000
000000000000a000 0000000000000003
[ 227.627785] 3e40: 0000000000000022 ffffffffffffffff
0000000000000123 00000000000000de
[ 227.627793] 3e60: ffff000008972000 0000000000000015
ffff801f55823e90 0000000000040900
[ 227.627800] 3e80: 0000000000000000 ffff0000080836f0
0000000000000000 0000ffff92682000
[ 227.627809] 3ea0: ffffffffffffffff 0000ffff92575d8c
0000000000000000 0000000000040900
[ 227.627819] 3ec0: 0000ffff92682000 00000000000000f7
0000000000004fc0 0000000000000022
[ 227.627828] 3ee0: 0000000000000000 0000000000000000
0000ffff925f5508 f7f7f7f7f7f7f7f7
[ 227.627838] 3f00: 0000ffff92686ff0 0000000000002ab8
0101010101010101 0000000000000020
[ 227.627847] 3f20: 0000000000000000 0000000000000000
[ 227.627858] [<ffff000008083324>] el0_da+0x18/0x1c
[ 227.627865] Mem-Info:
[ 227.627899] active_anon:38613 inactive_anon:8174 isolated_anon:0
active_file:25148 inactive_file:64173 isolated_file:0
unevictable:742 dirty:0 writeback:0 unstable:0
slab_reclaimable:29066 slab_unreclaimable:67304
mapped:22876 shmem:2597 pagetables:1240 bounce:0
free:65582521 free_pcp:1834 free_cma:0
^ permalink raw reply
* [PATCH net-next v4 0/4] Fix OdroidC2 Gigabit Tx link issue
From: Yegor Yefremov @ 2017-01-06 5:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170105232508.GU14217@n2100.armlinux.org.uk>
Hi Russel,
On Fri, Jan 6, 2017 at 12:25 AM, Russell King - ARM Linux
<linux@armlinux.org.uk> wrote:
> On Mon, Nov 28, 2016 at 09:54:28AM -0800, Florian Fainelli wrote:
>> If we start supporting generic "enable", "disable" type of properties
>> with values that map directly to register definitions of the HW, we
>> leave too much room for these properties to be utilized to implement a
>> specific policy, and this is not acceptable.
>
> Another concern with this patch is that the existing phylib "set_eee"
> code is horribly buggy - it just translates the modes from userspace
> into the register value and writes them directly to the register with
> no validation. So it's possible to set modes in the register that the
> hardware doesn't support, and have them advertised to the link partner.
>
> I have a patch which fixes that, restricting (as we do elsewhere) the
> advert according to the EEE supported capabilities retrieved from the
> PCS - maybe the problem here is that the PCS doesn't support support
> EEE in 1000baseT mode?
>
> Out of interest, which PHY is used on this platform?
>
> On the SolidRun boards, they're using AR8035, and have suffered this
> occasional link drop problem. What has been found is that it seems to
> be to do with the timing parameters, and it seemed to only be 1000bT
> that was affected. I don't remember off hand exactly which or what
> the change was they made to stabilise it though, but I can probabily
> find out tomorrow.
I have different boards with am335x and AR8035 and we had occasional
link drop with both 100 and 1000 speeds.
Yegor
^ permalink raw reply
* [PATCH v4 2/3] dmaeninge: xilinx_dma: Fix bug in multiple frame stores scenario in vdma
From: Appana Durga Kedareswara Rao @ 2017-01-06 6:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAL_JsqKFF2g7_y6kS_A33wDQE3Sw5mJdoUj8wGaX5ZbQ6pK_zQ@mail.gmail.com>
Hi Rob,
Thanks for the review...
[Snip]
> > -- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> >> > +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> >> > @@ -66,6 +66,8 @@ Optional child node properties:
> >> > Optional child node properties for VDMA:
> >> > - xlnx,genlock-mode: Tells Genlock synchronization is
> >> > enabled/disabled in hardware.
> >> > +- xlnx,fstore-config: Tells Whether Frame Store Configuration is
> >> > + enabled/disabled in hardware.
> >>
> >> What's the default (when not present)? That should be the most common
> case.
> >> Looks like the code treats this as bool, but that's not clear here.
> >> The name is not clear what it is doing. Enabling or disabling the feature?
> >
> > Default value is zero...
> > When this property is present it tells hardware is configured for frame store
> configuration.
>
> So most people will not want "frame store configuration"?
Since the driver is for SoftIP (I mean fpga ip) default h/w configuration of this IP is frame store
Configuration disabled that's in the driver making default value of this configuration as zero.
If users are trying a use case where this configuration should be enabled but in the h/w it is disabled.
In this case driver will warn users to enable this frame store configuration in the h/w.
So that users can enable it in their h/w.
Please let me know if the above expiation is not clear will explain in detail...
>
> > Will fix the explanation part in the next version like below.
> > xlnx,fstore-config: Tells hardware is configured for frame store configuration.
> > Is the above explanation clear???
>
> No, I mean make it obvious from the name of the property:
> xlnx,fstore-config-enable or xlnx,fstore-enable
>
> And the description needs to say it is boolean.
Sure will fix in the next version...
Regards,
Kedar.
>
> Rob
^ permalink raw reply
* [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
From: Krzysztof Kozlowski @ 2017-01-06 6:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106022343.5w4d7pkydrfh2n75@gangnam.samsung>
On Fri, Jan 06, 2017 at 11:23:43AM +0900, Andi Shyti wrote:
> Hi Krzysztof,
>
> > Andi,
> > Please fix missing Signed-off-by and resend with Linus' tags for #1 and
> > #2 and with other accumulated tags.
>
> patch #1 has already been merged in mainline:
>
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=1259feddd0f83649d5c48d730c140b4f7f3fa288
>
> and patch #2 is in LinusW's -next branch.
Yes, but it is gone from devel so I suppose it will be removed from
for-next in the future as well.
> does it still make sense to send them again? If you want I can
> send again patch 3 and 4 as independent patches with Chanwoo's
> review (the only tags).
No, no need. I wanted resend only because of #1 but it is merged as you
said.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCHv3 2/5] arm: mvebu: support for SMP on 98DX3336 SoC
From: Stephen Boyd @ 2017-01-06 6:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106041517.9589-3-chris.packham@alliedtelesis.co.nz>
On 01/06, Chris Packham wrote:
> diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
> index 46c742d3bd41..3c9ab9a008ad 100644
> --- a/arch/arm/mach-mvebu/platsmp.c
> +++ b/arch/arm/mach-mvebu/platsmp.c
> @@ -182,5 +182,48 @@ const struct smp_operations armada_xp_smp_ops __initconst = {
> #endif
> };
>
> +static int mv98dx3236_boot_secondary(unsigned int cpu, struct task_struct *idle)
> +{
> + int ret, hw_cpu;
> +
> + pr_info("Booting CPU %d\n", cpu);
Doesn't the core already print something when bringing up CPUs?
This message seems redundant.
> +
> + hw_cpu = cpu_logical_map(cpu);
> + set_secondary_cpu_clock(hw_cpu);
> + mv98dx3236_resume_set_cpu_boot_addr(hw_cpu,
> + armada_xp_secondary_startup);
> +
> + /*
> + * This is needed to wake up CPUs in the offline state after
> + * using CPU hotplug.
> + */
> + arch_send_wakeup_ipi_mask(cpumask_of(cpu));
> +
> + /*
> + * This is needed to take secondary CPUs out of reset on the
> + * initial boot.
> + */
> + ret = mvebu_cpu_reset_deassert(hw_cpu);
> + if (ret) {
> + pr_warn("unable to boot CPU: %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +struct smp_operations mv98dx3236_smp_ops __initdata = {
static const __initconst?
> + .smp_init_cpus = armada_xp_smp_init_cpus,
> + .smp_prepare_cpus = armada_xp_smp_prepare_cpus,
> + .smp_boot_secondary = mv98dx3236_boot_secondary,
> + .smp_secondary_init = armada_xp_secondary_init,
> +#ifdef CONFIG_HOTPLUG_CPU
> + .cpu_die = armada_xp_cpu_die,
> + .cpu_kill = armada_xp_cpu_kill,
> +#endif
> +};
> +
> CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",
> &armada_xp_smp_ops);
> +CPU_METHOD_OF_DECLARE(mv98dx3236_smp, "marvell,98dx3236-smp",
> + &mv98dx3236_smp_ops);
> diff --git a/arch/arm/mach-mvebu/pmsu-98dx3236.c b/arch/arm/mach-mvebu/pmsu-98dx3236.c
> new file mode 100644
> index 000000000000..1052674dd439
> --- /dev/null
> +++ b/arch/arm/mach-mvebu/pmsu-98dx3236.c
> @@ -0,0 +1,52 @@
> +/**
> + * CPU resume support for 98DX3236 internal CPU (a.k.a. MSYS).
> + */
> +
> +#define pr_fmt(fmt) "mv98dx3236-resume: " fmt
> +
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/of_address.h>
> +#include <linux/io.h>
> +#include "common.h"
> +
> +static void __iomem *mv98dx3236_resume_base;
> +#define MV98DX3236_CPU_RESUME_CTRL_OFFSET 0x08
> +#define MV98DX3236_CPU_RESUME_ADDR_OFFSET 0x04
> +
> +static const struct of_device_id of_mv98dx3236_resume_table[] = {
> + {.compatible = "marvell,98dx3336-resume-ctrl",},
> + { /* end of list */ },
> +};
> +
> +void mv98dx3236_resume_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
> +{
> + WARN_ON(hw_cpu != 1);
> +
> + writel(0, mv98dx3236_resume_base + MV98DX3236_CPU_RESUME_CTRL_OFFSET);
> + writel(virt_to_phys(boot_addr), mv98dx3236_resume_base +
> + MV98DX3236_CPU_RESUME_ADDR_OFFSET);
> +}
> +
> +static int __init mv98dx3236_resume_init(void)
> +{
> + struct device_node *np;
> + void __iomem *base;
> +
> + np = of_find_matching_node(NULL, of_mv98dx3236_resume_table);
> + if (!np)
> + return 0;
Is there any reason we can't just look for this node from the
smp_ops and map it if it isn't mapped yet? Seems simpler than a
whole new file and initcall.
> +
> + base = of_io_request_and_map(np, 0, of_node_full_name(np));
> + if (IS_ERR(base)) {
> + pr_err("unable to map registers\n");
Doesn't of_io_request_and_map() spit out an error on failure
already?
> + of_node_put(np);
This could be done before the if statement and then the duplicate
statement deleted.
> + return PTR_ERR(mv98dx3236_resume_base);
Should be PTR_ERR(base)?
> + }
> +
> + mv98dx3236_resume_base = base;
> + of_node_put(np);
> + return 0;
> +}
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH] iommu: Drop the of_iommu_{set/get}_ops() interface
From: Yong Wu @ 2017-01-06 6:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <c61db43c-82b1-b4c9-63cb-a8c78878cb39@arm.com>
On Wed, 2017-01-04 at 15:11 +0000, Robin Murphy wrote:
> [+Yong Wu for mtk_iommu]
>
> On 03/01/17 17:34, Lorenzo Pieralisi wrote:
> > With the introduction of the new iommu_{register/get}_instance()
> > interface in commit e4f10ffe4c9b ("iommu: Make of_iommu_set/get_ops() DT
> > agnostic") (based on struct fwnode_handle as look-up token, so firmware
> > agnostic) to register IOMMU instances with the core IOMMU layer there is
> > no reason to keep the old OF based interface around any longer.
> >
> > Convert all the IOMMU drivers (and OF IOMMU core code) that rely on the
> > of_iommu_{set/get}_ops() to the new kernel interface to register/retrieve
> > IOMMU instances and remove the of_iommu_{set/get}_ops() remaining glue
> > code in order to complete the interface rework.
>
> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
>
> Looking at before-and-after disassemblies, of_iommu.o is binary
> identical, and exynos-iommu.o differs only in the use of dev->fwnode
> rather than &dev->of_node->fwnode (and is binary identical if I hack it
> back to the latter). I'm not sure why the (GCC 6.2) codegen for
> mtk_iommu.o changes quite so much when merely replacing a callsite with
> the contents of its static inline callee, but it does :/
>
> Robin.
>
For MTK IOMMU,
Tested-by: Yong Wu <yong.wu@mediatek.com>
Thanks.
^ permalink raw reply
* [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Krzysztof Kozlowski @ 2017-01-06 6:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdaE0-4MN+D1THxo7nqQ5qMNZOi7b+cpqE+6-x8RFPuUfA@mail.gmail.com>
On Fri, Dec 30, 2016 at 02:30:47PM +0100, Linus Walleij wrote:
> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:
>
> > Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> > values used for configuration") has added a header file for defining the
> > pinctrl values in order to avoid hardcoded settings in the Exynos
> > DTS related files.
> >
> > Extend samsung.h to the Exynos5433 for drive strength values
> > which are strictly related to the particular SoC and may defer
> > from others.
> >
> > Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
>
> Patch applied with Chanwoo's review tag.
As agreed, applied with your ack to samsung-soc. I put it on separate
branch so I can provide a tag if needed.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
From: Krzysztof Kozlowski @ 2017-01-06 6:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161230041421.24448-4-andi.shyti@samsung.com>
On Fri, Dec 30, 2016 at 01:14:20PM +0900, Andi Shyti wrote:
> Use the macros defined in include/dt-bindings/pinctrl/samsung.h
> instead of hardcoded values.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 348 +++++++++++----------
> 1 file changed, 175 insertions(+), 173 deletions(-)
>
Thanks, applied.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention
From: Krzysztof Kozlowski @ 2017-01-06 6:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161230041421.24448-5-andi.shyti@samsung.com>
On Fri, Dec 30, 2016 at 01:14:21PM +0900, Andi Shyti wrote:
> Change the PIN() macro definition so that it can use the macros
> from pinctrl/samsung.h header file.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 25 +-
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 254 ++++++++++-----------
> 2 files changed, 133 insertions(+), 146 deletions(-)
>
Thanks, applied (here and in 3/4 with fixed subject).
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH 0/3] ARM: at91: fix cpuidle crash on SAMA5D4 Xplained board
From: Wenyou Yang @ 2017-01-06 6:59 UTC (permalink / raw)
To: linux-arm-kernel
Fix cpuidle crash on SAMA5D4 Xplained board when enable
CONFIG_ARM_AT91_CPUIDLE. Because some SoCs have the L2 cache,
we should flush the L2 cache before entering the cpu idle.
Wenyou Yang (3):
ARM: at91: flush the L2 cache before entering cpu idle
doc: binding: add new compatible for SDRAM/DDR Controller
ARM: dts: at91: use "atmel,sama5d4-ddramc" for ramc
Documentation/devicetree/bindings/arm/atmel-at91.txt | 1 +
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
arch/arm/mach-at91/pm.c | 19 +++++++++++++++++++
drivers/memory/atmel-sdramc.c | 1 +
5 files changed, 23 insertions(+), 2 deletions(-)
--
2.11.0
^ permalink raw reply
* [PATCH 1/3] ARM: at91: flush the L2 cache before entering cpu idle
From: Wenyou Yang @ 2017-01-06 6:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106065947.30631-1-wenyou.yang@atmel.com>
For the SoCs such as SAMA5D2 and SAMA5D4 which have L2 cache,
flush the L2 cache first before entering the cpu idle.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
---
arch/arm/mach-at91/pm.c | 19 +++++++++++++++++++
drivers/memory/atmel-sdramc.c | 1 +
2 files changed, 20 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index b4332b727e9c..1a60dede1a01 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -289,6 +289,24 @@ static void at91_ddr_standby(void)
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
}
+static void at91_ddr_cache_standby(void)
+{
+ u32 saved_lpr;
+
+ flush_cache_all();
+ outer_disable();
+
+ saved_lpr = at91_ramc_read(0, AT91_DDRSDRC_LPR);
+ at91_ramc_write(0, AT91_DDRSDRC_LPR, (saved_lpr &
+ (~AT91_DDRSDRC_LPCB)) | AT91_DDRSDRC_LPCB_SELF_REFRESH);
+
+ cpu_do_idle();
+
+ at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr);
+
+ outer_resume();
+}
+
/* We manage both DDRAM/SDRAM controllers, we need more than one value to
* remember.
*/
@@ -324,6 +342,7 @@ static const struct of_device_id const ramc_ids[] __initconst = {
{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
{ .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
{ .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby },
+ { .compatible = "atmel,sama5d4-ddramc", .data = at91_ddr_cache_standby },
{ /*sentinel*/ }
};
diff --git a/drivers/memory/atmel-sdramc.c b/drivers/memory/atmel-sdramc.c
index b418b39af180..7e5c5c6c1348 100644
--- a/drivers/memory/atmel-sdramc.c
+++ b/drivers/memory/atmel-sdramc.c
@@ -48,6 +48,7 @@ static const struct of_device_id atmel_ramc_of_match[] = {
{ .compatible = "atmel,at91sam9260-sdramc", .data = &at91rm9200_caps, },
{ .compatible = "atmel,at91sam9g45-ddramc", .data = &at91sam9g45_caps, },
{ .compatible = "atmel,sama5d3-ddramc", .data = &sama5d3_caps, },
+ { .compatible = "atmel,sama5d4-ddramc", .data = &sama5d3_caps, },
{},
};
--
2.11.0
^ permalink raw reply related
* [PATCH 2/3] doc: binding: add new compatible for SDRAM/DDR Controller
From: Wenyou Yang @ 2017-01-06 6:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106065947.30631-1-wenyou.yang@atmel.com>
Add the new compatible "atmel,sama5d4-ddramc" for the SDRAM/DDR
Controller.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
---
Documentation/devicetree/bindings/arm/atmel-at91.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 29737b9b616e..9b5de6397666 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -111,6 +111,7 @@ RAMC SDRAM/DDR Controller required properties:
"atmel,at91sam9260-sdramc",
"atmel,at91sam9g45-ddramc",
"atmel,sama5d3-ddramc",
+ "atmel,sama5d4-ddramc",
- reg: Should contain registers location and length
Examples:
--
2.11.0
^ permalink raw reply related
* [PATCH 3/3] ARM: dts: at91: use "atmel,sama5d4-ddramc" for ramc
From: Wenyou Yang @ 2017-01-06 6:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106065947.30631-1-wenyou.yang@atmel.com>
Use the new compatible "atmel,sama5d4-ddramc" for the ramc of
SAMA5D2 and SAMA5D4.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
---
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index ceb9783ff7e1..b5259d85737d 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -380,7 +380,7 @@
};
ramc0: ramc at f000c000 {
- compatible = "atmel,sama5d3-ddramc";
+ compatible = "atmel,sama5d4-ddramc";
reg = <0xf000c000 0x200>;
clocks = <&ddrck>, <&mpddr_clk>;
clock-names = "ddrck", "mpddr";
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 4f60c1b7b137..603ba986858c 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -370,7 +370,7 @@
};
ramc0: ramc at f0010000 {
- compatible = "atmel,sama5d3-ddramc";
+ compatible = "atmel,sama5d4-ddramc";
reg = <0xf0010000 0x200>;
clocks = <&ddrck>, <&mpddr_clk>;
clock-names = "ddrck", "mpddr";
--
2.11.0
^ permalink raw reply related
* [PATCH] arm64: dts: exynos: Remove unsupported regulator-always-off property from TM2E
From: Krzysztof Kozlowski @ 2017-01-06 7:02 UTC (permalink / raw)
To: linux-arm-kernel
The regulator property 'regulator-always-off' is not documented and not
supported.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
index 1db4e7f363a9..398f5e092b02 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
@@ -25,7 +25,6 @@
&ldo25_reg {
regulator-name = "UNUSED_LDO25";
- regulator-always-off;
};
&ldo31_reg {
--
2.9.3
^ permalink raw reply related
* [PATCH v3 1/5] arm64: dts: exynos5433: TM2/E: Fix wrong information of ldo23 and ldo25
From: Krzysztof Kozlowski @ 2017-01-06 7:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483675149-32598-2-git-send-email-jcsing.lee@samsung.com>
On Fri, Jan 06, 2017 at 12:59:05PM +0900, Jaechul Lee wrote:
> From: Chanwoo Choi <cw00.choi@samsung.com>
>
> This patch fixes the wrong information of ldo23 and ldo25 on both TM2 and TM2E.
Please describe what is exactly wrong and how it affects the
system/user. This is going to the fixes so it needs a good explanation.
>
> Fixes: 01e5d2352152 ("arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board")
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
> ---
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 7 ++++---
> arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 10 ----------
> 2 files changed, 4 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index 3b5215c..e8971f4 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -504,9 +504,9 @@
> };
>
> ldo23_reg: LDO23 {
> - regulator-name = "CAM_SEN_CORE_1.2V_AP";
> + regulator-name = "CAM_SEN_CORE_1.05V_AP";
> regulator-min-microvolt = <1050000>;
> - regulator-max-microvolt = <1200000>;
> + regulator-max-microvolt = <1050000>;
> };
>
> ldo24_reg: LDO24 {
> @@ -516,9 +516,10 @@
> };
>
> ldo25_reg: LDO25 {
> - regulator-name = "CAM_SEN_A2.8V_AP";
> + regulator-name = "UNUSED_LDO25";
> regulator-min-microvolt = <2800000>;
> regulator-max-microvolt = <2800000>;
> + regulator-always-off;
Don't add it. See my other patch.
Best regards,
Krzysztof
> };
>
> ldo26_reg: LDO26 {
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
> index 1db4e7f..854c583 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
> @@ -18,16 +18,6 @@
> compatible = "samsung,tm2e", "samsung,exynos5433";
> };
>
> -&ldo23_reg {
> - regulator-name = "CAM_SEN_CORE_1.025V_AP";
> - regulator-max-microvolt = <1050000>;
> -};
> -
> -&ldo25_reg {
> - regulator-name = "UNUSED_LDO25";
> - regulator-always-off;
> -};
> -
> &ldo31_reg {
> regulator-name = "TSP_VDD_1.8V_AP";
> regulator-min-microvolt = <1800000>;
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH v3 2/5] arm64: dts: exynos: make tm2 and tm2e independent from each other
From: Krzysztof Kozlowski @ 2017-01-06 7:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483675149-32598-3-git-send-email-jcsing.lee@samsung.com>
On Fri, Jan 06, 2017 at 12:59:06PM +0900, Jaechul Lee wrote:
> From: Andi Shyti <andi.shyti@samsung.com>
>
> Currently tm2e dts includes tm2 but there are some differences
> between the two boards and tm2 has some properties that tm2e
> doesn't have.
>
> That's why it's important to keep the two dts files independent
> and put all the commonalities in a tm2-common.dtsi file.
>
> At the current status the only two differences between the two
> dts files (besides the board name) are ldo31 and ldo38.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
> ---
> .../boot/dts/exynos/exynos5433-tm2-common.dtsi | 1118 +++++++++++++++++++
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 1153 +-------------------
Like talking to a wall. Without any feedback. If my instructions were
wrong (and it is not possible to detect rename) then please say it (you
can add personal comments after separator ---).
As of now because it is third time without any explanation: NACK.
Best regards,
Krzysztof
> arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 22 +-
> 3 files changed, 1163 insertions(+), 1130 deletions(-)
> create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
> rewrite arch/arm64/boot/dts/exynos/exynos5433-tm2.dts (98%)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
> new file mode 100644
> index 0000000..c43f9a3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
> @@ -0,0 +1,1118 @@
> +/*
> + * SAMSUNG Exynos5433 TM2 board device tree source
> + *
> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
> + *
> + * Common device tree source file for Samsung's TM2 and TM2E boards
> + * which are based on Samsung Exynos5433 SoC.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/dts-v1/;
> +#include "exynos5433.dtsi"
> +#include <dt-bindings/clock/samsung,s2mps11.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> + model = "Samsung TM2 board";
> + compatible = "samsung,tm2", "samsung,exynos5433";
> +
> + aliases {
> + gsc0 = &gsc_0;
> + gsc1 = &gsc_1;
> + gsc2 = &gsc_2;
> + pinctrl0 = &pinctrl_alive;
> + pinctrl1 = &pinctrl_aud;
> + pinctrl2 = &pinctrl_cpif;
> + pinctrl3 = &pinctrl_ese;
> + pinctrl4 = &pinctrl_finger;
> + pinctrl5 = &pinctrl_fsys;
> + pinctrl6 = &pinctrl_imem;
> + pinctrl7 = &pinctrl_nfc;
> + pinctrl8 = &pinctrl_peric;
> + pinctrl9 = &pinctrl_touch;
> + serial0 = &serial_0;
> + serial1 = &serial_1;
> + serial2 = &serial_2;
> + serial3 = &serial_3;
> + spi0 = &spi_0;
> + spi1 = &spi_1;
> + spi2 = &spi_2;
> + spi3 = &spi_3;
> + spi4 = &spi_4;
> + mshc0 = &mshc_0;
> + mshc2 = &mshc_2;
> + };
> +
> + chosen {
> + stdout-path = &serial_1;
> + };
> +
> + memory at 20000000 {
> + device_type = "memory";
> + reg = <0x0 0x20000000 0x0 0xc0000000>;
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + power-key {
> + gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_POWER>;
> + label = "power key";
> + debounce-interval = <10>;
> + };
> +
> + volume-up-key {
> + gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEUP>;
> + label = "volume-up key";
> + debounce-interval = <10>;
> + };
> +
> + volume-down-key {
> + gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEDOWN>;
> + label = "volume-down key";
> + debounce-interval = <10>;
> + };
> +
> + homepage-key {
> + gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_MENU>;
> + label = "homepage key";
> + debounce-interval = <10>;
> + };
> + };
> +
> + i2c_max98504: i2c-gpio-0 {
> + compatible = "i2c-gpio";
> + gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
> + &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + max98504: max98504 at 31 {
> + compatible = "maxim,max98504";
> + reg = <0x31>;
> + maxim,rx-path = <1>;
> + maxim,tx-path = <1>;
> + maxim,tx-channel-mask = <3>;
> + maxim,tx-channel-source = <2>;
> + };
> + };
> +
> + sound {
> + compatible = "samsung,tm2-audio";
> + audio-codec = <&wm5110>;
> + i2s-controller = <&i2s0>;
> + audio-amplifier = <&max98504>;
> + mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
> + model = "wm5110";
> + samsung,audio-routing =
> + /* Headphone */
> + "HP", "HPOUT1L",
> + "HP", "HPOUT1R",
> +
> + /* Speaker */
> + "SPK", "SPKOUT",
> + "SPKOUT", "HPOUT2L",
> + "SPKOUT", "HPOUT2R",
> +
> + /* Receiver */
> + "RCV", "HPOUT3L",
> + "RCV", "HPOUT3R";
> + status = "okay";
> + };
> +};
> +
> +&adc {
> + vdd-supply = <&ldo3_reg>;
> + status = "okay";
> +
> + thermistor-ap {
> + compatible = "murata,ncp03wf104";
> + pullup-uv = <1800000>;
> + pullup-ohm = <100000>;
> + pulldown-ohm = <0>;
> + io-channels = <&adc 0>;
> + };
> +
> + thermistor-battery {
> + compatible = "murata,ncp03wf104";
> + pullup-uv = <1800000>;
> + pullup-ohm = <100000>;
> + pulldown-ohm = <0>;
> + io-channels = <&adc 1>;
> + #thermal-sensor-cells = <0>;
> + };
> +
> + thermistor-charger {
> + compatible = "murata,ncp03wf104";
> + pullup-uv = <1800000>;
> + pullup-ohm = <100000>;
> + pulldown-ohm = <0>;
> + io-channels = <&adc 2>;
> + };
> +};
> +
> +&bus_g2d_400 {
> + devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
> + vdd-supply = <&buck4_reg>;
> + exynos,saturation-ratio = <10>;
> + status = "okay";
> +};
> +
> +&bus_g2d_266 {
> + devfreq = <&bus_g2d_400>;
> + status = "okay";
> +};
> +
> +&bus_gscl {
> + devfreq = <&bus_g2d_400>;
> + status = "okay";
> +};
> +
> +&bus_hevc {
> + devfreq = <&bus_g2d_400>;
> + status = "okay";
> +};
> +
> +&bus_jpeg {
> + devfreq = <&bus_g2d_400>;
> + status = "okay";
> +};
> +
> +&bus_mfc {
> + devfreq = <&bus_g2d_400>;
> + status = "okay";
> +};
> +
> +&bus_mscl {
> + devfreq = <&bus_g2d_400>;
> + status = "okay";
> +};
> +
> +&bus_noc0 {
> + devfreq = <&bus_g2d_400>;
> + status = "okay";
> +};
> +
> +&bus_noc1 {
> + devfreq = <&bus_g2d_400>;
> + status = "okay";
> +};
> +
> +&bus_noc2 {
> + devfreq = <&bus_g2d_400>;
> + status = "okay";
> +};
> +
> +&cmu_aud {
> + assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
> + assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
> +};
> +
> +&cmu_fsys {
> + assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
> + <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
> + <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
> + <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
> + <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
> + <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
> + <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
> + <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
> + <&cmu_top CLK_DIV_SCLK_USBDRD30>,
> + <&cmu_top CLK_DIV_SCLK_USBHOST30>;
> + assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
> + <&cmu_top CLK_MOUT_BUS_PLL_USER>,
> + <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
> + <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
> + <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
> + <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
> + <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
> + <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
> + assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
> + <66700000>, <66700000>;
> +};
> +
> +&cmu_gscl {
> + assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
> + <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
> + assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
> + <&cmu_top CLK_ACLK_GSCL_333>;
> +};
> +
> +&cmu_mfc {
> + assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
> + assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
> +};
> +
> +&cmu_mscl {
> + assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
> + <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
> + <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
> + <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
> + assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
> + <&cmu_top CLK_SCLK_JPEG_MSCL>,
> + <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
> + <&cmu_top CLK_MOUT_BUS_PLL_USER>;
> +};
> +
> +&cpu0 {
> + cpu-supply = <&buck3_reg>;
> +};
> +
> +&cpu4 {
> + cpu-supply = <&buck2_reg>;
> +};
> +
> +&decon {
> + status = "okay";
> +
> + i80-if-timings {
> + };
> +};
> +
> +&dsi {
> + status = "okay";
> + vddcore-supply = <&ldo6_reg>;
> + vddio-supply = <&ldo7_reg>;
> + samsung,pll-clock-frequency = <24000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&te_irq>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 1 {
> + reg = <1>;
> +
> + dsi_out: endpoint {
> + samsung,burst-clock-frequency = <512000000>;
> + samsung,esc-clock-frequency = <16000000>;
> + };
> + };
> + };
> +};
> +
> +&hsi2c_0 {
> + status = "okay";
> + clock-frequency = <2500000>;
> +
> + s2mps13-pmic at 66 {
> + compatible = "samsung,s2mps13-pmic";
> + interrupt-parent = <&gpa0>;
> + interrupts = <7 IRQ_TYPE_NONE>;
> + reg = <0x66>;
> + samsung,s2mps11-wrstbi-ground;
> +
> + s2mps13_osc: clocks {
> + compatible = "samsung,s2mps13-clk";
> + #clock-cells = <1>;
> + clock-output-names = "s2mps13_ap", "s2mps13_cp",
> + "s2mps13_bt";
> + };
> +
> + regulators: regulators {
> + ldo1_reg: LDO1 {
> + regulator-name = "VDD_ALIVE_0.9V_AP";
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-always-on;
> + };
> +
> + ldo2_reg: LDO2 {
> + regulator-name = "VDDQ_MMC2_2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo3_reg: LDO3 {
> + regulator-name = "VDD1_E_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + ldo4_reg: LDO4 {
> + regulator-name = "VDD10_MIF_PLL_1.0V_AP";
> + regulator-min-microvolt = <1300000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo5_reg: LDO5 {
> + regulator-name = "VDD10_DPLL_1.0V_AP";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo6_reg: LDO6 {
> + regulator-name = "VDD10_MIPI2L_1.0V_AP";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo7_reg: LDO7 {
> + regulator-name = "VDD18_MIPI2L_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo8_reg: LDO8 {
> + regulator-name = "VDD18_LLI_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo9_reg: LDO9 {
> + regulator-name = "VDD18_ABB_ETC_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo10_reg: LDO10 {
> + regulator-name = "VDD33_USB30_3.0V_AP";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo11_reg: LDO11 {
> + regulator-name = "VDD_INT_M_1.0V_AP";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo12_reg: LDO12 {
> + regulator-name = "VDD_KFC_M_1.1V_AP";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + };
> +
> + ldo13_reg: LDO13 {
> + regulator-name = "VDD_G3D_M_0.95V_AP";
> + regulator-min-microvolt = <950000>;
> + regulator-max-microvolt = <950000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo14_reg: LDO14 {
> + regulator-name = "VDDQ_M1_LDO_1.2V_AP";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo15_reg: LDO15 {
> + regulator-name = "VDDQ_M2_LDO_1.2V_AP";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo16_reg: LDO16 {
> + regulator-name = "VDDQ_EFUSE";
> + regulator-min-microvolt = <1400000>;
> + regulator-max-microvolt = <3400000>;
> + regulator-always-on;
> + };
> +
> + ldo17_reg: LDO17 {
> + regulator-name = "V_TFLASH_2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + };
> +
> + ldo18_reg: LDO18 {
> + regulator-name = "V_CODEC_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo19_reg: LDO19 {
> + regulator-name = "VDDA_1.8V_COMP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + ldo20_reg: LDO20 {
> + regulator-name = "VCC_2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-always-on;
> + };
> +
> + ldo21_reg: LDO21 {
> + regulator-name = "VT_CAM_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo22_reg: LDO22 {
> + regulator-name = "CAM_IO_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo23_reg: LDO23 {
> + regulator-name = "CAM_SEN_CORE_1.05V_AP";
> + regulator-min-microvolt = <1050000>;
> + regulator-max-microvolt = <1050000>;
> + };
> +
> + ldo24_reg: LDO24 {
> + regulator-name = "VT_CAM_1.2V";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + };
> +
> + ldo25_reg: LDO25 {
> + regulator-name = "UNUSED_LDO25";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-always-off;
> + };
> +
> + ldo26_reg: LDO26 {
> + regulator-name = "CAM_AF_2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + };
> +
> + ldo27_reg: LDO27 {
> + regulator-name = "VCC_3.0V_LCD_AP";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + };
> +
> + ldo28_reg: LDO28 {
> + regulator-name = "VCC_1.8V_LCD_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo29_reg: LDO29 {
> + regulator-name = "VT_CAM_2.8V";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + };
> +
> + ldo30_reg: LDO30 {
> + regulator-name = "TSP_AVDD_3.3V_AP";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + /*
> + * LDO31 differs from target to target,
> + * its definition is in the .dts
> + */
> +
> + ldo32_reg: LDO32 {
> + regulator-name = "VTOUCH_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo33_reg: LDO33 {
> + regulator-name = "VTOUCH_LED_3.3V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-ramp-delay = <12500>;
> + };
> +
> + ldo34_reg: LDO34 {
> + regulator-name = "VCC_1.8V_MHL_AP";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <2100000>;
> + };
> +
> + ldo35_reg: LDO35 {
> + regulator-name = "OIS_VM_2.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2800000>;
> + };
> +
> + ldo36_reg: LDO36 {
> + regulator-name = "VSIL_1.0V";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + };
> +
> + ldo37_reg: LDO37 {
> + regulator-name = "VF_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + /*
> + * LDO38 differs from target to target,
> + * its definition is in the .dts
> + */
> +
> + ldo39_reg: LDO39 {
> + regulator-name = "V_HRM_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo40_reg: LDO40 {
> + regulator-name = "V_HRM_3.3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + buck1_reg: BUCK1 {
> + regulator-name = "VDD_MIF_0.9V_AP";
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck2_reg: BUCK2 {
> + regulator-name = "VDD_EGL_1.0V_AP";
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck3_reg: BUCK3 {
> + regulator-name = "VDD_KFC_1.0V_AP";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck4_reg: BUCK4 {
> + regulator-name = "VDD_INT_0.95V_AP";
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck5_reg: BUCK5 {
> + regulator-name = "VDD_DISP_CAM0_0.9V_AP";
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck6_reg: BUCK6 {
> + regulator-name = "VDD_G3D_0.9V_AP";
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck7_reg: BUCK7 {
> + regulator-name = "VDD_MEM1_1.2V_AP";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + };
> +
> + buck8_reg: BUCK8 {
> + regulator-name = "VDD_LLDO_1.35V_AP";
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + buck9_reg: BUCK9 {
> + regulator-name = "VDD_MLDO_2.0V_AP";
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + buck10_reg: BUCK10 {
> + regulator-name = "vdd_mem2";
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + };
> + };
> + };
> +};
> +
> +&hsi2c_8 {
> + status = "okay";
> +
> + max77843 at 66 {
> + compatible = "maxim,max77843";
> + interrupt-parent = <&gpa1>;
> + interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
> + reg = <0x66>;
> +
> + muic: max77843-muic {
> + compatible = "maxim,max77843-muic";
> + };
> +
> + regulators {
> + compatible = "maxim,max77843-regulator";
> + safeout1_reg: SAFEOUT1 {
> + regulator-name = "SAFEOUT1";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <4950000>;
> + };
> +
> + safeout2_reg: SAFEOUT2 {
> + regulator-name = "SAFEOUT2";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <4950000>;
> + };
> +
> + charger_reg: CHARGER {
> + regulator-name = "CHARGER";
> + regulator-min-microamp = <100000>;
> + regulator-max-microamp = <3150000>;
> + };
> + };
> +
> + haptic: max77843-haptic {
> + compatible = "maxim,max77843-haptic";
> + haptic-supply = <&ldo38_reg>;
> + pwms = <&pwm 0 33670 0>;
> + pwm-names = "haptic";
> + };
> + };
> +};
> +
> +&i2s0 {
> + status = "okay";
> +};
> +
> +&mshc_0 {
> + status = "okay";
> + num-slots = <1>;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + cap-mmc-highspeed;
> + non-removable;
> + card-detect-delay = <200>;
> + samsung,dw-mshc-ciu-div = <3>;
> + samsung,dw-mshc-sdr-timing = <0 4>;
> + samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-hs400-timing = <0 3>;
> + samsung,read-strobe-delay = <90>;
> + fifo-depth = <0x80>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
> + &sd0_bus8 &sd0_rdqs>;
> + bus-width = <8>;
> + assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
> + assigned-clock-rates = <800000000>;
> +};
> +
> +&mshc_2 {
> + status = "okay";
> + num-slots = <1>;
> + cap-sd-highspeed;
> + disable-wp;
> + cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
> + cd-inverted;
> + card-detect-delay = <200>;
> + samsung,dw-mshc-ciu-div = <3>;
> + samsung,dw-mshc-sdr-timing = <0 4>;
> + samsung,dw-mshc-ddr-timing = <0 2>;
> + fifo-depth = <0x80>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
> + bus-width = <4>;
> +};
> +
> +&ppmu_d0_general {
> + status = "okay";
> + events {
> + ppmu_event0_d0_general: ppmu-event0-d0-general {
> + event-name = "ppmu-event0-d0-general";
> + };
> + };
> +};
> +
> +&ppmu_d1_general {
> + status = "okay";
> + events {
> + ppmu_event0_d1_general: ppmu-event0-d1-general {
> + event-name = "ppmu-event0-d1-general";
> + };
> + };
> +};
> +
> +&pinctrl_alive {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_alive>;
> +
> + initial_alive: initial-state {
> + PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpa0-1, NONE, FAST_SR1);
> + PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpa0-3, NONE, FAST_SR1);
> + PIN(INPUT, gpa0-4, NONE, FAST_SR1);
> + PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpa0-6, NONE, FAST_SR1);
> + PIN(INPUT, gpa0-7, NONE, FAST_SR1);
> +
> + PIN(INPUT, gpa1-0, UP, FAST_SR1);
> + PIN(INPUT, gpa1-1, NONE, FAST_SR1);
> + PIN(INPUT, gpa1-2, NONE, FAST_SR1);
> + PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
> + PIN(INPUT, gpa1-5, NONE, FAST_SR1);
> + PIN(INPUT, gpa1-6, NONE, FAST_SR1);
> + PIN(INPUT, gpa1-7, NONE, FAST_SR1);
> +
> + PIN(INPUT, gpa2-0, NONE, FAST_SR1);
> + PIN(INPUT, gpa2-1, NONE, FAST_SR1);
> + PIN(INPUT, gpa2-2, NONE, FAST_SR1);
> + PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpa2-4, NONE, FAST_SR1);
> + PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpa2-7, NONE, FAST_SR1);
> +
> + PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-2, NONE, FAST_SR1);
> + PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-4, NONE, FAST_SR1);
> + PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf1-0, NONE, FAST_SR1);
> + PIN(INPUT, gpf1-1, NONE, FAST_SR1);
> + PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf1-4, UP, FAST_SR1);
> + PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
> + PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpf3-2, NONE, FAST_SR1);
> + PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
> + PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
> + PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
> + };
> +
> + te_irq: te_irq {
> + samsung,pins = "gpf1-3";
> + samsung,pin-function = <0xf>;
> + };
> +};
> +
> +&pinctrl_cpif {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_cpif>;
> +
> + initial_cpif: initial-state {
> + PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
> + };
> +};
> +
> +&pinctrl_ese {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_ese>;
> +
> + initial_ese: initial-state {
> + PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
> + };
> +};
> +
> +&pinctrl_fsys {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_fsys>;
> +
> + initial_fsys: initial-state {
> + PIN(INPUT, gpr3-0, NONE, FAST_SR1);
> + PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpr3-7, NONE, FAST_SR1);
> + };
> +};
> +
> +&pinctrl_imem {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_imem>;
> +
> + initial_imem: initial-state {
> + PIN(INPUT, gpf0-0, UP, FAST_SR1);
> + PIN(INPUT, gpf0-1, UP, FAST_SR1);
> + PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpf0-3, UP, FAST_SR1);
> + PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
> + PIN(INPUT, gpf0-5, NONE, FAST_SR1);
> + PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
> + PIN(INPUT, gpf0-7, UP, FAST_SR1);
> + };
> +};
> +
> +&pinctrl_nfc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_nfc>;
> +
> + initial_nfc: initial-state {
> + PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
> + };
> +};
> +
> +&pinctrl_peric {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_peric>;
> +
> + initial_peric: initial-state {
> + PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpv7-2, NONE, FAST_SR1);
> + PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
> + PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpc3-4, NONE, FAST_SR1);
> + PIN(INPUT, gpc3-5, NONE, FAST_SR1);
> + PIN(INPUT, gpc3-6, NONE, FAST_SR1);
> + PIN(INPUT, gpc3-7, NONE, FAST_SR1);
> +
> + PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
> + PIN(2, gpg0-1, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpd4-0, NONE, FAST_SR1);
> + PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpd8-1, UP, FAST_SR1);
> +
> + PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
> + PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
> + PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
> +
> + PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
> + PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
> + PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
> + PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
> + };
> +};
> +
> +&pinctrl_touch {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_touch>;
> +
> + initial_touch: initial-state {
> + PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
> + };
> +};
> +
> +&pwm {
> + pinctrl-0 = <&pwm0_out>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&mic {
> + status = "okay";
> +
> + i80-if-timings {
> + };
> +};
> +
> +&pmu_system_controller {
> + assigned-clocks = <&pmu_system_controller 0>;
> + assigned-clock-parents = <&xxti>;
> +};
> +
> +&serial_1 {
> + status = "okay";
> +};
> +
> +&spi_1 {
> + cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +
> + wm5110: wm5110-codec at 0 {
> + compatible = "wlf,wm5110";
> + reg = <0x0>;
> + spi-max-frequency = <20000000>;
> + interrupt-parent = <&gpa0>;
> + interrupts = <4 IRQ_TYPE_NONE>;
> + clocks = <&pmu_system_controller 0>,
> + <&s2mps13_osc S2MPS11_CLK_BT>;
> + clock-names = "mclk1", "mclk2";
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + wlf,micd-detect-debounce = <300>;
> + wlf,micd-bias-start-time = <0x1>;
> + wlf,micd-rate = <0x7>;
> + wlf,micd-dbtime = <0x1>;
> + wlf,micd-force-micbias;
> + wlf,micd-configs = <0x0 1 0>;
> + wlf,hpdet-channel = <1>;
> + wlf,gpsw = <0x1>;
> + wlf,inmode = <2 0 2 0>;
> +
> + wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
> + wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
> +
> + /* core supplies */
> + AVDD-supply = <&ldo18_reg>;
> + DBVDD1-supply = <&ldo18_reg>;
> + CPVDD-supply = <&ldo18_reg>;
> + DBVDD2-supply = <&ldo18_reg>;
> + DBVDD3-supply = <&ldo18_reg>;
> +
> + controller-data {
> + samsung,spi-feedback-delay = <0>;
> + };
> + };
> +};
> +
> +&timer {
> + clock-frequency = <24000000>;
> +};
> +
> +&tmu_atlas0 {
> + vtmu-supply = <&ldo3_reg>;
> + status = "okay";
> +};
> +
> +&tmu_apollo {
> + vtmu-supply = <&ldo3_reg>;
> + status = "okay";
> +};
> +
> +&tmu_g3d {
> + vtmu-supply = <&ldo3_reg>;
> + status = "okay";
> +};
> +
> +&usbdrd30 {
> + vdd33-supply = <&ldo10_reg>;
> + vdd10-supply = <&ldo6_reg>;
> + status = "okay";
> +};
> +
> +&usbdrd_dwc3_0 {
> + dr_mode = "otg";
> +};
> +
> +&usbdrd30_phy {
> + vbus-supply = <&safeout1_reg>;
> + status = "okay";
> +};
> +
> +&xxti {
> + clock-frequency = <24000000>;
> +};
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> dissimilarity index 98%
> index e8971f4..d30b45a 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -1,1120 +1,33 @@
> -/*
> - * SAMSUNG Exynos5433 TM2 board device tree source
> - *
> - * Copyright (c) 2016 Samsung Electronics Co., Ltd.
> - *
> - * Device tree source file for Samsung's TM2 board which is based on
> - * Samsung Exynos5433 SoC.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -/dts-v1/;
> -#include "exynos5433.dtsi"
> -#include <dt-bindings/clock/samsung,s2mps11.h>
> -#include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/input/input.h>
> -#include <dt-bindings/interrupt-controller/irq.h>
> -
> -/ {
> - model = "Samsung TM2 board";
> - compatible = "samsung,tm2", "samsung,exynos5433";
> -
> - aliases {
> - gsc0 = &gsc_0;
> - gsc1 = &gsc_1;
> - gsc2 = &gsc_2;
> - pinctrl0 = &pinctrl_alive;
> - pinctrl1 = &pinctrl_aud;
> - pinctrl2 = &pinctrl_cpif;
> - pinctrl3 = &pinctrl_ese;
> - pinctrl4 = &pinctrl_finger;
> - pinctrl5 = &pinctrl_fsys;
> - pinctrl6 = &pinctrl_imem;
> - pinctrl7 = &pinctrl_nfc;
> - pinctrl8 = &pinctrl_peric;
> - pinctrl9 = &pinctrl_touch;
> - serial0 = &serial_0;
> - serial1 = &serial_1;
> - serial2 = &serial_2;
> - serial3 = &serial_3;
> - spi0 = &spi_0;
> - spi1 = &spi_1;
> - spi2 = &spi_2;
> - spi3 = &spi_3;
> - spi4 = &spi_4;
> - mshc0 = &mshc_0;
> - mshc2 = &mshc_2;
> - };
> -
> - chosen {
> - stdout-path = &serial_1;
> - };
> -
> - memory at 20000000 {
> - device_type = "memory";
> - reg = <0x0 0x20000000 0x0 0xc0000000>;
> - };
> -
> - gpio-keys {
> - compatible = "gpio-keys";
> -
> - power-key {
> - gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
> - linux,code = <KEY_POWER>;
> - label = "power key";
> - debounce-interval = <10>;
> - };
> -
> - volume-up-key {
> - gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
> - linux,code = <KEY_VOLUMEUP>;
> - label = "volume-up key";
> - debounce-interval = <10>;
> - };
> -
> - volume-down-key {
> - gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
> - linux,code = <KEY_VOLUMEDOWN>;
> - label = "volume-down key";
> - debounce-interval = <10>;
> - };
> -
> - homepage-key {
> - gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
> - linux,code = <KEY_MENU>;
> - label = "homepage key";
> - debounce-interval = <10>;
> - };
> - };
> -
> - i2c_max98504: i2c-gpio-0 {
> - compatible = "i2c-gpio";
> - gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
> - &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
> - i2c-gpio,delay-us = <2>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "okay";
> -
> - max98504: max98504 at 31 {
> - compatible = "maxim,max98504";
> - reg = <0x31>;
> - maxim,rx-path = <1>;
> - maxim,tx-path = <1>;
> - maxim,tx-channel-mask = <3>;
> - maxim,tx-channel-source = <2>;
> - };
> - };
> -
> - sound {
> - compatible = "samsung,tm2-audio";
> - audio-codec = <&wm5110>;
> - i2s-controller = <&i2s0>;
> - audio-amplifier = <&max98504>;
> - mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
> - model = "wm5110";
> - samsung,audio-routing =
> - /* Headphone */
> - "HP", "HPOUT1L",
> - "HP", "HPOUT1R",
> -
> - /* Speaker */
> - "SPK", "SPKOUT",
> - "SPKOUT", "HPOUT2L",
> - "SPKOUT", "HPOUT2R",
> -
> - /* Receiver */
> - "RCV", "HPOUT3L",
> - "RCV", "HPOUT3R";
> - status = "okay";
> - };
> -};
> -
> -&adc {
> - vdd-supply = <&ldo3_reg>;
> - status = "okay";
> -
> - thermistor-ap {
> - compatible = "murata,ncp03wf104";
> - pullup-uv = <1800000>;
> - pullup-ohm = <100000>;
> - pulldown-ohm = <0>;
> - io-channels = <&adc 0>;
> - };
> -
> - thermistor-battery {
> - compatible = "murata,ncp03wf104";
> - pullup-uv = <1800000>;
> - pullup-ohm = <100000>;
> - pulldown-ohm = <0>;
> - io-channels = <&adc 1>;
> - #thermal-sensor-cells = <0>;
> - };
> -
> - thermistor-charger {
> - compatible = "murata,ncp03wf104";
> - pullup-uv = <1800000>;
> - pullup-ohm = <100000>;
> - pulldown-ohm = <0>;
> - io-channels = <&adc 2>;
> - };
> -};
> -
> -&bus_g2d_400 {
> - devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
> - vdd-supply = <&buck4_reg>;
> - exynos,saturation-ratio = <10>;
> - status = "okay";
> -};
> -
> -&bus_g2d_266 {
> - devfreq = <&bus_g2d_400>;
> - status = "okay";
> -};
> -
> -&bus_gscl {
> - devfreq = <&bus_g2d_400>;
> - status = "okay";
> -};
> -
> -&bus_hevc {
> - devfreq = <&bus_g2d_400>;
> - status = "okay";
> -};
> -
> -&bus_jpeg {
> - devfreq = <&bus_g2d_400>;
> - status = "okay";
> -};
> -
> -&bus_mfc {
> - devfreq = <&bus_g2d_400>;
> - status = "okay";
> -};
> -
> -&bus_mscl {
> - devfreq = <&bus_g2d_400>;
> - status = "okay";
> -};
> -
> -&bus_noc0 {
> - devfreq = <&bus_g2d_400>;
> - status = "okay";
> -};
> -
> -&bus_noc1 {
> - devfreq = <&bus_g2d_400>;
> - status = "okay";
> -};
> -
> -&bus_noc2 {
> - devfreq = <&bus_g2d_400>;
> - status = "okay";
> -};
> -
> -&cmu_aud {
> - assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
> - assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
> -};
> -
> -&cmu_fsys {
> - assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
> - <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
> - <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
> - <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
> - <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
> - <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
> - <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
> - <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
> - <&cmu_top CLK_DIV_SCLK_USBDRD30>,
> - <&cmu_top CLK_DIV_SCLK_USBHOST30>;
> - assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
> - <&cmu_top CLK_MOUT_BUS_PLL_USER>,
> - <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
> - <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
> - <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
> - <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
> - <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
> - <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
> - assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
> - <66700000>, <66700000>;
> -};
> -
> -&cmu_gscl {
> - assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
> - <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
> - assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
> - <&cmu_top CLK_ACLK_GSCL_333>;
> -};
> -
> -&cmu_mfc {
> - assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
> - assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
> -};
> -
> -&cmu_mscl {
> - assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
> - <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
> - <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
> - <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
> - assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
> - <&cmu_top CLK_SCLK_JPEG_MSCL>,
> - <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
> - <&cmu_top CLK_MOUT_BUS_PLL_USER>;
> -};
> -
> -&cpu0 {
> - cpu-supply = <&buck3_reg>;
> -};
> -
> -&cpu4 {
> - cpu-supply = <&buck2_reg>;
> -};
> -
> -&decon {
> - status = "okay";
> -
> - i80-if-timings {
> - };
> -};
> -
> -&dsi {
> - status = "okay";
> - vddcore-supply = <&ldo6_reg>;
> - vddio-supply = <&ldo7_reg>;
> - samsung,pll-clock-frequency = <24000000>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&te_irq>;
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port at 1 {
> - reg = <1>;
> -
> - dsi_out: endpoint {
> - samsung,burst-clock-frequency = <512000000>;
> - samsung,esc-clock-frequency = <16000000>;
> - };
> - };
> - };
> -};
> -
> -&hsi2c_0 {
> - status = "okay";
> - clock-frequency = <2500000>;
> -
> - s2mps13-pmic at 66 {
> - compatible = "samsung,s2mps13-pmic";
> - interrupt-parent = <&gpa0>;
> - interrupts = <7 IRQ_TYPE_NONE>;
> - reg = <0x66>;
> - samsung,s2mps11-wrstbi-ground;
> -
> - s2mps13_osc: clocks {
> - compatible = "samsung,s2mps13-clk";
> - #clock-cells = <1>;
> - clock-output-names = "s2mps13_ap", "s2mps13_cp",
> - "s2mps13_bt";
> - };
> -
> - regulators {
> - ldo1_reg: LDO1 {
> - regulator-name = "VDD_ALIVE_0.9V_AP";
> - regulator-min-microvolt = <900000>;
> - regulator-max-microvolt = <900000>;
> - regulator-always-on;
> - };
> -
> - ldo2_reg: LDO2 {
> - regulator-name = "VDDQ_MMC2_2.8V_AP";
> - regulator-min-microvolt = <2800000>;
> - regulator-max-microvolt = <2800000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo3_reg: LDO3 {
> - regulator-name = "VDD1_E_1.8V_AP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - regulator-always-on;
> - };
> -
> - ldo4_reg: LDO4 {
> - regulator-name = "VDD10_MIF_PLL_1.0V_AP";
> - regulator-min-microvolt = <1300000>;
> - regulator-max-microvolt = <1300000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo5_reg: LDO5 {
> - regulator-name = "VDD10_DPLL_1.0V_AP";
> - regulator-min-microvolt = <1000000>;
> - regulator-max-microvolt = <1000000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo6_reg: LDO6 {
> - regulator-name = "VDD10_MIPI2L_1.0V_AP";
> - regulator-min-microvolt = <1000000>;
> - regulator-max-microvolt = <1000000>;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo7_reg: LDO7 {
> - regulator-name = "VDD18_MIPI2L_1.8V_AP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - };
> -
> - ldo8_reg: LDO8 {
> - regulator-name = "VDD18_LLI_1.8V_AP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo9_reg: LDO9 {
> - regulator-name = "VDD18_ABB_ETC_1.8V_AP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo10_reg: LDO10 {
> - regulator-name = "VDD33_USB30_3.0V_AP";
> - regulator-min-microvolt = <3000000>;
> - regulator-max-microvolt = <3000000>;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo11_reg: LDO11 {
> - regulator-name = "VDD_INT_M_1.0V_AP";
> - regulator-min-microvolt = <1000000>;
> - regulator-max-microvolt = <1000000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo12_reg: LDO12 {
> - regulator-name = "VDD_KFC_M_1.1V_AP";
> - regulator-min-microvolt = <800000>;
> - regulator-max-microvolt = <1350000>;
> - regulator-always-on;
> - };
> -
> - ldo13_reg: LDO13 {
> - regulator-name = "VDD_G3D_M_0.95V_AP";
> - regulator-min-microvolt = <950000>;
> - regulator-max-microvolt = <950000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo14_reg: LDO14 {
> - regulator-name = "VDDQ_M1_LDO_1.2V_AP";
> - regulator-min-microvolt = <1200000>;
> - regulator-max-microvolt = <1200000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo15_reg: LDO15 {
> - regulator-name = "VDDQ_M2_LDO_1.2V_AP";
> - regulator-min-microvolt = <1200000>;
> - regulator-max-microvolt = <1200000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - ldo16_reg: LDO16 {
> - regulator-name = "VDDQ_EFUSE";
> - regulator-min-microvolt = <1400000>;
> - regulator-max-microvolt = <3400000>;
> - regulator-always-on;
> - };
> -
> - ldo17_reg: LDO17 {
> - regulator-name = "V_TFLASH_2.8V_AP";
> - regulator-min-microvolt = <2800000>;
> - regulator-max-microvolt = <2800000>;
> - };
> -
> - ldo18_reg: LDO18 {
> - regulator-name = "V_CODEC_1.8V_AP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - };
> -
> - ldo19_reg: LDO19 {
> - regulator-name = "VDDA_1.8V_COMP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - regulator-always-on;
> - };
> -
> - ldo20_reg: LDO20 {
> - regulator-name = "VCC_2.8V_AP";
> - regulator-min-microvolt = <2800000>;
> - regulator-max-microvolt = <2800000>;
> - regulator-always-on;
> - };
> -
> - ldo21_reg: LDO21 {
> - regulator-name = "VT_CAM_1.8V";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - };
> -
> - ldo22_reg: LDO22 {
> - regulator-name = "CAM_IO_1.8V_AP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - };
> -
> - ldo23_reg: LDO23 {
> - regulator-name = "CAM_SEN_CORE_1.05V_AP";
> - regulator-min-microvolt = <1050000>;
> - regulator-max-microvolt = <1050000>;
> - };
> -
> - ldo24_reg: LDO24 {
> - regulator-name = "VT_CAM_1.2V";
> - regulator-min-microvolt = <1200000>;
> - regulator-max-microvolt = <1200000>;
> - };
> -
> - ldo25_reg: LDO25 {
> - regulator-name = "UNUSED_LDO25";
> - regulator-min-microvolt = <2800000>;
> - regulator-max-microvolt = <2800000>;
> - regulator-always-off;
> - };
> -
> - ldo26_reg: LDO26 {
> - regulator-name = "CAM_AF_2.8V_AP";
> - regulator-min-microvolt = <2800000>;
> - regulator-max-microvolt = <2800000>;
> - };
> -
> - ldo27_reg: LDO27 {
> - regulator-name = "VCC_3.0V_LCD_AP";
> - regulator-min-microvolt = <3000000>;
> - regulator-max-microvolt = <3000000>;
> - };
> -
> - ldo28_reg: LDO28 {
> - regulator-name = "VCC_1.8V_LCD_AP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - };
> -
> - ldo29_reg: LDO29 {
> - regulator-name = "VT_CAM_2.8V";
> - regulator-min-microvolt = <3000000>;
> - regulator-max-microvolt = <3000000>;
> - };
> -
> - ldo30_reg: LDO30 {
> - regulator-name = "TSP_AVDD_3.3V_AP";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - };
> -
> - ldo31_reg: LDO31 {
> - regulator-name = "TSP_VDD_1.85V_AP";
> - regulator-min-microvolt = <1850000>;
> - regulator-max-microvolt = <1850000>;
> - };
> -
> - ldo32_reg: LDO32 {
> - regulator-name = "VTOUCH_1.8V_AP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - };
> -
> - ldo33_reg: LDO33 {
> - regulator-name = "VTOUCH_LED_3.3V";
> - regulator-min-microvolt = <2500000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-ramp-delay = <12500>;
> - };
> -
> - ldo34_reg: LDO34 {
> - regulator-name = "VCC_1.8V_MHL_AP";
> - regulator-min-microvolt = <1000000>;
> - regulator-max-microvolt = <2100000>;
> - };
> -
> - ldo35_reg: LDO35 {
> - regulator-name = "OIS_VM_2.8V";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <2800000>;
> - };
> -
> - ldo36_reg: LDO36 {
> - regulator-name = "VSIL_1.0V";
> - regulator-min-microvolt = <1000000>;
> - regulator-max-microvolt = <1000000>;
> - };
> -
> - ldo37_reg: LDO37 {
> - regulator-name = "VF_1.8V";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - };
> -
> - ldo38_reg: LDO38 {
> - regulator-name = "VCC_3.0V_MOTOR_AP";
> - regulator-min-microvolt = <3000000>;
> - regulator-max-microvolt = <3000000>;
> - };
> -
> - ldo39_reg: LDO39 {
> - regulator-name = "V_HRM_1.8V";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - };
> -
> - ldo40_reg: LDO40 {
> - regulator-name = "V_HRM_3.3V";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - };
> -
> - buck1_reg: BUCK1 {
> - regulator-name = "VDD_MIF_0.9V_AP";
> - regulator-min-microvolt = <600000>;
> - regulator-max-microvolt = <1500000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - buck2_reg: BUCK2 {
> - regulator-name = "VDD_EGL_1.0V_AP";
> - regulator-min-microvolt = <900000>;
> - regulator-max-microvolt = <1300000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - buck3_reg: BUCK3 {
> - regulator-name = "VDD_KFC_1.0V_AP";
> - regulator-min-microvolt = <800000>;
> - regulator-max-microvolt = <1200000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - buck4_reg: BUCK4 {
> - regulator-name = "VDD_INT_0.95V_AP";
> - regulator-min-microvolt = <600000>;
> - regulator-max-microvolt = <1500000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - buck5_reg: BUCK5 {
> - regulator-name = "VDD_DISP_CAM0_0.9V_AP";
> - regulator-min-microvolt = <600000>;
> - regulator-max-microvolt = <1500000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - buck6_reg: BUCK6 {
> - regulator-name = "VDD_G3D_0.9V_AP";
> - regulator-min-microvolt = <600000>;
> - regulator-max-microvolt = <1500000>;
> - regulator-always-on;
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - buck7_reg: BUCK7 {
> - regulator-name = "VDD_MEM1_1.2V_AP";
> - regulator-min-microvolt = <1200000>;
> - regulator-max-microvolt = <1200000>;
> - regulator-always-on;
> - };
> -
> - buck8_reg: BUCK8 {
> - regulator-name = "VDD_LLDO_1.35V_AP";
> - regulator-min-microvolt = <1350000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-always-on;
> - };
> -
> - buck9_reg: BUCK9 {
> - regulator-name = "VDD_MLDO_2.0V_AP";
> - regulator-min-microvolt = <1350000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-always-on;
> - };
> -
> - buck10_reg: BUCK10 {
> - regulator-name = "vdd_mem2";
> - regulator-min-microvolt = <550000>;
> - regulator-max-microvolt = <1500000>;
> - regulator-always-on;
> - };
> - };
> - };
> -};
> -
> -&hsi2c_8 {
> - status = "okay";
> -
> - max77843 at 66 {
> - compatible = "maxim,max77843";
> - interrupt-parent = <&gpa1>;
> - interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
> - reg = <0x66>;
> -
> - muic: max77843-muic {
> - compatible = "maxim,max77843-muic";
> - };
> -
> - regulators {
> - compatible = "maxim,max77843-regulator";
> - safeout1_reg: SAFEOUT1 {
> - regulator-name = "SAFEOUT1";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <4950000>;
> - };
> -
> - safeout2_reg: SAFEOUT2 {
> - regulator-name = "SAFEOUT2";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <4950000>;
> - };
> -
> - charger_reg: CHARGER {
> - regulator-name = "CHARGER";
> - regulator-min-microamp = <100000>;
> - regulator-max-microamp = <3150000>;
> - };
> - };
> -
> - haptic: max77843-haptic {
> - compatible = "maxim,max77843-haptic";
> - haptic-supply = <&ldo38_reg>;
> - pwms = <&pwm 0 33670 0>;
> - pwm-names = "haptic";
> - };
> - };
> -};
> -
> -&i2s0 {
> - status = "okay";
> -};
> -
> -&mshc_0 {
> - status = "okay";
> - num-slots = <1>;
> - mmc-hs200-1_8v;
> - mmc-hs400-1_8v;
> - cap-mmc-highspeed;
> - non-removable;
> - card-detect-delay = <200>;
> - samsung,dw-mshc-ciu-div = <3>;
> - samsung,dw-mshc-sdr-timing = <0 4>;
> - samsung,dw-mshc-ddr-timing = <0 2>;
> - samsung,dw-mshc-hs400-timing = <0 3>;
> - samsung,read-strobe-delay = <90>;
> - fifo-depth = <0x80>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
> - &sd0_bus8 &sd0_rdqs>;
> - bus-width = <8>;
> - assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
> - assigned-clock-rates = <800000000>;
> -};
> -
> -&mshc_2 {
> - status = "okay";
> - num-slots = <1>;
> - cap-sd-highspeed;
> - disable-wp;
> - cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
> - cd-inverted;
> - card-detect-delay = <200>;
> - samsung,dw-mshc-ciu-div = <3>;
> - samsung,dw-mshc-sdr-timing = <0 4>;
> - samsung,dw-mshc-ddr-timing = <0 2>;
> - fifo-depth = <0x80>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
> - bus-width = <4>;
> -};
> -
> -&ppmu_d0_general {
> - status = "okay";
> - events {
> - ppmu_event0_d0_general: ppmu-event0-d0-general {
> - event-name = "ppmu-event0-d0-general";
> - };
> - };
> -};
> -
> -&ppmu_d1_general {
> - status = "okay";
> - events {
> - ppmu_event0_d1_general: ppmu-event0-d1-general {
> - event-name = "ppmu-event0-d1-general";
> - };
> - };
> -};
> -
> -&pinctrl_alive {
> - pinctrl-names = "default";
> - pinctrl-0 = <&initial_alive>;
> -
> - initial_alive: initial-state {
> - PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpa0-1, NONE, FAST_SR1);
> - PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpa0-3, NONE, FAST_SR1);
> - PIN(INPUT, gpa0-4, NONE, FAST_SR1);
> - PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
> - PIN(INPUT, gpa0-6, NONE, FAST_SR1);
> - PIN(INPUT, gpa0-7, NONE, FAST_SR1);
> -
> - PIN(INPUT, gpa1-0, UP, FAST_SR1);
> - PIN(INPUT, gpa1-1, NONE, FAST_SR1);
> - PIN(INPUT, gpa1-2, NONE, FAST_SR1);
> - PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
> - PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
> - PIN(INPUT, gpa1-5, NONE, FAST_SR1);
> - PIN(INPUT, gpa1-6, NONE, FAST_SR1);
> - PIN(INPUT, gpa1-7, NONE, FAST_SR1);
> -
> - PIN(INPUT, gpa2-0, NONE, FAST_SR1);
> - PIN(INPUT, gpa2-1, NONE, FAST_SR1);
> - PIN(INPUT, gpa2-2, NONE, FAST_SR1);
> - PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
> - PIN(INPUT, gpa2-4, NONE, FAST_SR1);
> - PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
> - PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
> - PIN(INPUT, gpa2-7, NONE, FAST_SR1);
> -
> - PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpa3-2, NONE, FAST_SR1);
> - PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
> - PIN(INPUT, gpa3-4, NONE, FAST_SR1);
> - PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
> - PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
> - PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpf1-0, NONE, FAST_SR1);
> - PIN(INPUT, gpf1-1, NONE, FAST_SR1);
> - PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpf1-4, UP, FAST_SR1);
> - PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
> - PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
> - PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpf3-2, NONE, FAST_SR1);
> - PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
> - PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
> - PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
> - PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
> - PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
> - PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
> - PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
> - PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
> - PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
> - };
> -
> - te_irq: te_irq {
> - samsung,pins = "gpf1-3";
> - samsung,pin-function = <0xf>;
> - };
> -};
> -
> -&pinctrl_cpif {
> - pinctrl-names = "default";
> - pinctrl-0 = <&initial_cpif>;
> -
> - initial_cpif: initial-state {
> - PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
> - };
> -};
> -
> -&pinctrl_ese {
> - pinctrl-names = "default";
> - pinctrl-0 = <&initial_ese>;
> -
> - initial_ese: initial-state {
> - PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
> - };
> -};
> -
> -&pinctrl_fsys {
> - pinctrl-names = "default";
> - pinctrl-0 = <&initial_fsys>;
> -
> - initial_fsys: initial-state {
> - PIN(INPUT, gpr3-0, NONE, FAST_SR1);
> - PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
> - PIN(INPUT, gpr3-7, NONE, FAST_SR1);
> - };
> -};
> -
> -&pinctrl_imem {
> - pinctrl-names = "default";
> - pinctrl-0 = <&initial_imem>;
> -
> - initial_imem: initial-state {
> - PIN(INPUT, gpf0-0, UP, FAST_SR1);
> - PIN(INPUT, gpf0-1, UP, FAST_SR1);
> - PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpf0-3, UP, FAST_SR1);
> - PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
> - PIN(INPUT, gpf0-5, NONE, FAST_SR1);
> - PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
> - PIN(INPUT, gpf0-7, UP, FAST_SR1);
> - };
> -};
> -
> -&pinctrl_nfc {
> - pinctrl-names = "default";
> - pinctrl-0 = <&initial_nfc>;
> -
> - initial_nfc: initial-state {
> - PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
> - };
> -};
> -
> -&pinctrl_peric {
> - pinctrl-names = "default";
> - pinctrl-0 = <&initial_peric>;
> -
> - initial_peric: initial-state {
> - PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpv7-2, NONE, FAST_SR1);
> - PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
> - PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
> - PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
> - PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpc3-4, NONE, FAST_SR1);
> - PIN(INPUT, gpc3-5, NONE, FAST_SR1);
> - PIN(INPUT, gpc3-6, NONE, FAST_SR1);
> - PIN(INPUT, gpc3-7, NONE, FAST_SR1);
> -
> - PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
> - PIN(2, gpg0-1, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpd4-0, NONE, FAST_SR1);
> - PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
> - PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpd8-1, UP, FAST_SR1);
> -
> - PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
> - PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
> - PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
> -
> - PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
> - PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
> - PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
> - PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
> - };
> -};
> -
> -&pinctrl_touch {
> - pinctrl-names = "default";
> - pinctrl-0 = <&initial_touch>;
> -
> - initial_touch: initial-state {
> - PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
> - };
> -};
> -
> -&pwm {
> - pinctrl-0 = <&pwm0_out>;
> - pinctrl-names = "default";
> - status = "okay";
> -};
> -
> -&mic {
> - status = "okay";
> -
> - i80-if-timings {
> - };
> -};
> -
> -&pmu_system_controller {
> - assigned-clocks = <&pmu_system_controller 0>;
> - assigned-clock-parents = <&xxti>;
> -};
> -
> -&serial_1 {
> - status = "okay";
> -};
> -
> -&spi_1 {
> - cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
> - status = "okay";
> -
> - wm5110: wm5110-codec at 0 {
> - compatible = "wlf,wm5110";
> - reg = <0x0>;
> - spi-max-frequency = <20000000>;
> - interrupt-parent = <&gpa0>;
> - interrupts = <4 IRQ_TYPE_NONE>;
> - clocks = <&pmu_system_controller 0>,
> - <&s2mps13_osc S2MPS11_CLK_BT>;
> - clock-names = "mclk1", "mclk2";
> -
> - gpio-controller;
> - #gpio-cells = <2>;
> -
> - wlf,micd-detect-debounce = <300>;
> - wlf,micd-bias-start-time = <0x1>;
> - wlf,micd-rate = <0x7>;
> - wlf,micd-dbtime = <0x1>;
> - wlf,micd-force-micbias;
> - wlf,micd-configs = <0x0 1 0>;
> - wlf,hpdet-channel = <1>;
> - wlf,gpsw = <0x1>;
> - wlf,inmode = <2 0 2 0>;
> -
> - wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
> - wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
> -
> - /* core supplies */
> - AVDD-supply = <&ldo18_reg>;
> - DBVDD1-supply = <&ldo18_reg>;
> - CPVDD-supply = <&ldo18_reg>;
> - DBVDD2-supply = <&ldo18_reg>;
> - DBVDD3-supply = <&ldo18_reg>;
> -
> - controller-data {
> - samsung,spi-feedback-delay = <0>;
> - };
> - };
> -};
> -
> -&timer {
> - clock-frequency = <24000000>;
> -};
> -
> -&tmu_atlas0 {
> - vtmu-supply = <&ldo3_reg>;
> - status = "okay";
> -};
> -
> -&tmu_apollo {
> - vtmu-supply = <&ldo3_reg>;
> - status = "okay";
> -};
> -
> -&tmu_g3d {
> - vtmu-supply = <&ldo3_reg>;
> - status = "okay";
> -};
> -
> -&usbdrd30 {
> - vdd33-supply = <&ldo10_reg>;
> - vdd10-supply = <&ldo6_reg>;
> - status = "okay";
> -};
> -
> -&usbdrd_dwc3_0 {
> - dr_mode = "otg";
> -};
> -
> -&usbdrd30_phy {
> - vbus-supply = <&safeout1_reg>;
> - status = "okay";
> -};
> -
> -&xxti {
> - clock-frequency = <24000000>;
> -};
> +/*
> + * SAMSUNG Exynos5433 TM2 board device tree source
> + *
> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
> + *
> + * Device tree source file for Samsung's TM2 board which is based on
> + * Samsung Exynos5433 SoC.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include "exynos5433-tm2-common.dtsi"
> +
> +/ {
> + model = "Samsung TM2E board";
> + compatible = "samsung,tm2e", "samsung,exynos5433";
> +};
> +
> +®ulators {
> + ldo31_reg: LDO31 {
> + regulator-name = "TSP_VDD_1.85V_AP";
> + regulator-min-microvolt = <1850000>;
> + regulator-max-microvolt = <1850000>;
> + };
> +
> + ldo38_reg: LDO38 {
> + regulator-name = "VCC_3.0V_MOTOR_AP";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
> index 854c583..53e361f 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
> @@ -11,21 +11,23 @@
> * published by the Free Software Foundation.
> */
>
> -#include "exynos5433-tm2.dts"
> +#include "exynos5433-tm2-common.dtsi"
>
> / {
> model = "Samsung TM2E board";
> compatible = "samsung,tm2e", "samsung,exynos5433";
> };
>
> -&ldo31_reg {
> - regulator-name = "TSP_VDD_1.8V_AP";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> -};
> +®ulators {
> + ldo31_reg: LDO31 {
> + regulator-name = "TSP_VDD_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
>
> -&ldo38_reg {
> - regulator-name = "VCC_3.3V_MOTOR_AP";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> + ldo38_reg: LDO38 {
> + regulator-name = "VCC_3.3V_MOTOR_AP";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> };
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH v3 1/5] arm64: dts: exynos5433: TM2/E: Fix wrong information of ldo23 and ldo25
From: Chanwoo Choi @ 2017-01-06 7:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106070539.wd3kfhi77pa5ekcy@kozik-lap>
On 2017? 01? 06? 16:05, Krzysztof Kozlowski wrote:
> On Fri, Jan 06, 2017 at 12:59:05PM +0900, Jaechul Lee wrote:
>> From: Chanwoo Choi <cw00.choi@samsung.com>
>>
>> This patch fixes the wrong information of ldo23 and ldo25 on both TM2 and TM2E.
>
> Please describe what is exactly wrong and how it affects the
> system/user. This is going to the fixes so it needs a good explanation.
When I posted the patch[1], I refer to the old schematic document of both TM2 and TM2E.
[1] 01e5d2352152 ("arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board")
After checking the highest version of schematic document of both TM2 and TM2E,
there is no difference of ldo23/ldo25 on both TM2 and TM2E.
- ldo23 is used on TM2/TM2E, but the name/max-microvolt are wrong.
- ldo25 isn't used on TM2/TM2E. (not connected)
Because ldo23 and lod25 are not used on other device in Exynos5433 and TM2 board.
this patch does not affect the operation to system/user.
>
>>
>> Fixes: 01e5d2352152 ("arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board")
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
>> Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
>> ---
>> arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 7 ++++---
>> arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 10 ----------
>> 2 files changed, 4 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
>> index 3b5215c..e8971f4 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
>> @@ -504,9 +504,9 @@
>> };
>>
>> ldo23_reg: LDO23 {
>> - regulator-name = "CAM_SEN_CORE_1.2V_AP";
>> + regulator-name = "CAM_SEN_CORE_1.05V_AP";
>> regulator-min-microvolt = <1050000>;
>> - regulator-max-microvolt = <1200000>;
>> + regulator-max-microvolt = <1050000>;
>> };
>>
>> ldo24_reg: LDO24 {
>> @@ -516,9 +516,10 @@
>> };
>>
>> ldo25_reg: LDO25 {
>> - regulator-name = "CAM_SEN_A2.8V_AP";
>> + regulator-name = "UNUSED_LDO25";
>> regulator-min-microvolt = <2800000>;
>> regulator-max-microvolt = <2800000>;
>> + regulator-always-off;
>
> Don't add it. See my other patch.
OK. After completing the kernel booting, the unused regulators will be off.
>
> Best regards,
> Krzysztof
>
>> };
>>
>> ldo26_reg: LDO26 {
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
>> index 1db4e7f..854c583 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
>> @@ -18,16 +18,6 @@
>> compatible = "samsung,tm2e", "samsung,exynos5433";
>> };
>>
>> -&ldo23_reg {
>> - regulator-name = "CAM_SEN_CORE_1.025V_AP";
>> - regulator-max-microvolt = <1050000>;
>> -};
>> -
>> -&ldo25_reg {
>> - regulator-name = "UNUSED_LDO25";
>> - regulator-always-off;
>> -};
>> -
>> &ldo31_reg {
>> regulator-name = "TSP_VDD_1.8V_AP";
>> regulator-min-microvolt = <1800000>;
>> --
>> 2.7.4
>>
>
>
>
--
Best Regards,
Chanwoo Choi
S/W Center, Samsung Electronics
^ permalink raw reply
* [PATCH 2/2] media: rc: add driver for IR remote receiver on MT7623 SoC
From: Sean Wang @ 2017-01-06 7:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170105171240.GA9136@gofer.mess.org>
Hi Sean,
Thanks for your effort for code reviewing. I add comments inline.
On Thu, 2017-01-05 at 17:12 +0000, Sean Young wrote:
> Hi Sean,
>
> Some review comments.
>
> On Fri, Jan 06, 2017 at 12:06:24AM +0800, sean.wang at mediatek.com wrote:
> > From: Sean Wang <sean.wang@mediatek.com>
> >
> > This patch adds driver for IR controller on
> > Mediatek MT7623 SoC. Currently testing successfully
> > on NEC and SONY remote controller only but it should
> > work on others (lirc, rc-5 and rc-6).
> >
> > Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> > ---
> > drivers/media/rc/Kconfig | 10 ++
> > drivers/media/rc/Makefile | 1 +
> > drivers/media/rc/mtk-cir.c | 319 +++++++++++++++++++++++++++++++++++++++++++++
> > 3 files changed, 330 insertions(+)
> > create mode 100644 linux-4.8.rc1_p0/drivers/media/rc/mtk-cir.c
> >
> > diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig
> > index 370e16e..626c500 100644
> > --- a/drivers/media/rc/Kconfig
> > +++ b/drivers/media/rc/Kconfig
> > @@ -389,4 +389,14 @@ config IR_SUNXI
> > To compile this driver as a module, choose M here: the module will
> > be called sunxi-ir.
> >
> > +config IR_MTK
> > + tristate "Mediatek IR remote control"
> > + depends on RC_CORE
> > + depends on ARCH_MEDIATEK || COMPILE_TEST
> > + ---help---
> > + Say Y if you want to use Mediatek internal IR Controller
> > +
> > + To compile this driver as a module, choose M here: the module will
> > + be called mtk-cir.
> > +
> > endif #RC_DEVICES
> > diff --git a/drivers/media/rc/Makefile b/drivers/media/rc/Makefile
> > index 379a5c0..505908d 100644
> > --- a/drivers/media/rc/Makefile
> > +++ b/drivers/media/rc/Makefile
> > @@ -37,3 +37,4 @@ obj-$(CONFIG_IR_TTUSBIR) += ttusbir.o
> > obj-$(CONFIG_RC_ST) += st_rc.o
> > obj-$(CONFIG_IR_SUNXI) += sunxi-cir.o
> > obj-$(CONFIG_IR_IMG) += img-ir/
> > +obj-$(CONFIG_IR_MTK) += mtk-cir.o
> > diff --git a/drivers/media/rc/mtk-cir.c b/drivers/media/rc/mtk-cir.c
> > new file mode 100644
> > index 0000000..4fa4cab
> > --- /dev/null
> > +++ b/drivers/media/rc/mtk-cir.c
> > @@ -0,0 +1,319 @@
> > +/*
> > + * Driver for Mediatek MT7623 IR Receiver Controller
> > + *
> > + * Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com>
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/module.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/reset.h>
> > +#include <media/rc-core.h>
> > +
> > +#define MTK_IR_DEV "mtk-ir"
>
> KBUILD_MODNAME could be used instead. Currently the module is called
> mtk-cir but the rc device will have driver name mtk-ir.
okay. i will use this instead of this insistent coding.
> > +
> > +/* Register to enable PWM and IR */
> > +#define MTK_CONFIG_HIGH_REG 0x0c
> > +/* Enable IR pulse width detection */
> > +#define MTK_PWM_EN BIT(13)
> > +/* Enable IR hardware function */
> > +#define MTK_IR_EN BIT(0)
> > +
> > +/* Register to setting sample period */
> > +#define MTK_CONFIG_LOW_REG 0x10
> > +/* Field to set sample period */
> > +#define CHK_PERIOD 0xC00
> > +#define MTK_CHK_PERIOD (((CHK_PERIOD) << 8) & (GENMASK(20, 8)))
> > +#define MTK_CHK_PERIOD_MASK (GENMASK(20, 8))
> > +
> > +/* Register to clear state of state machine */
> > +#define MTK_IRCLR_REG 0x20
> > +/* Bit to restart IR receiving */
> > +#define MTK_IRCLR BIT(0)
> > +
> > +/* Register containing pulse width data */
> > +#define MTK_CHKDATA_REG(i) (0x88 + 4 * i)
> > +
> > +/* Register to enable IR interrupt */
> > +#define MTK_IRINT_EN_REG 0xcc
> > +/* Bit to enable interrupt */
> > +#define MTK_IRINT_EN BIT(0)
> > +
> > +/* Register to ack IR interrupt */
> > +#define MTK_IRINT_CLR_REG 0xd0
> > +/* Bit to clear interrupt status */
> > +#define MTK_IRINT_CLR BIT(0)
> > +
> > +/* Number of registers to record the pulse width */
> > +#define MTK_CHKDATA_SZ 17
> > +/* Required frequency */
> > +#define MTK_IR_BASE_CLK 273000000
> > +/* Frequency after IR internal divider */
> > +#define MTK_IR_CLK (MTK_IR_BASE_CLK / 4)
> > +/* Sample period in ns */
> > +#define MTK_IR_SAMPLE (((1000000000ul / MTK_IR_CLK) * CHK_PERIOD))
> > +/* Indicate the end of IR data*/
> > +#define MTK_IR_END(v) (v == 0xff)
> > +
> > +/* struct mtk_ir - This is the main datasructure for holding the state
> > + * of the driver
> > + * @dev: The device pointer
> > + * @ir_lock: Make sure that synchronization between remove and ISR
> > + * @rc: The rc instrance
> > + * @base: The mapped register i/o base
> > + * @irq: The IRQ that we are using
> > + * @clk: The clock that we are using
> > + * @map_name: The name for keymap lookup
> > + */
> > +struct mtk_ir {
> > + struct device *dev;
> > + /*Protect concurrency between driver removal and ISR*/
> > + spinlock_t ir_lock;
> > + struct rc_dev *rc;
> > + void __iomem *base;
> > + int irq;
> > + struct clk *clk;
> > + const char *map_name;
>
> irq and map_name don't need to be stored here, they're only used in
> mtk_ir_probe.
>
I will remove map_name , but keep irq for synchronize_irq call needs.
> > +};
> > +
> > +static void mtk_w32_mask(struct mtk_ir *ir, u32 val, u32 mask, unsigned int reg)
> > +{
> > + u32 tmp;
> > +
> > + tmp = __raw_readl(ir->base + reg);
> > + tmp = (tmp & ~mask) | val;
> > + __raw_writel(tmp, ir->base + reg);
> > +}
> > +
> > +static void mtk_w32(struct mtk_ir *ir, u32 val, unsigned int reg)
> > +{
> > + __raw_writel(val, ir->base + reg);
> > +}
> > +
> > +static u32 mtk_r32(struct mtk_ir *ir, unsigned int reg)
> > +{
> > + return __raw_readl(ir->base + reg);
> > +}
> > +
> > +static inline void mtk_irq_disable(struct mtk_ir *ir, u32 mask)
> > +{
> > + u32 val;
> > +
> > + val = mtk_r32(ir, MTK_IRINT_EN_REG);
> > + mtk_w32(ir, val & ~mask, MTK_IRINT_EN_REG);
> > +}
> > +
> > +static inline void mtk_irq_enable(struct mtk_ir *ir, u32 mask)
> > +{
> > + u32 val;
> > +
> > + val = mtk_r32(ir, MTK_IRINT_EN_REG);
> > + mtk_w32(ir, val | mask, MTK_IRINT_EN_REG);
> > +}
> > +
> > +static irqreturn_t mtk_ir_irq(int irqno, void *dev_id)
> > +{
> > + struct mtk_ir *ir = dev_id;
> > + u8 wid = 0;
> > + u32 i, j, val;
> > + DEFINE_IR_RAW_EVENT(rawir);
> > +
> > + spin_lock(&ir->ir_lock);
> > +
> > + mtk_irq_disable(ir, MTK_IRINT_EN);
> > +
> > + /* Reset decoder state machine */
> > + ir_raw_event_reset(ir->rc);
> > +
> > + /* First message must be pulse */
> > + rawir.pulse = false;
> > +
> > + /* Handle pulse and space until end of message */
> > + for (i = 0 ; i < MTK_CHKDATA_SZ ; i++) {
> > + val = mtk_r32(ir, MTK_CHKDATA_REG(i));
> > + dev_dbg(ir->dev, "@reg%d=0x%08x\n", i, val);
> > +
> > + for (j = 0 ; j < 4 ; j++) {
> > + wid = (val & (0xff << j * 8)) >> j * 8;
> > + rawir.pulse = !rawir.pulse;
> > + rawir.duration = wid * (MTK_IR_SAMPLE + 1);
> > + ir_raw_event_store_with_filter(ir->rc, &rawir);
> > +
> > + if (MTK_IR_END(wid))
> > + goto end_msg;
> > + }
> > + }
>
> If I read this correctly, there is a maximum of 17 * 4 = 68 edges per
> IR message. The rc6 mce key 0 (scancode 0x800f0400) is 69 edges, so that
> won't work.
>
Uh, this is related to hardware limitation. Maximum number hardware
holds indeed is only 68 edges as you said :(
For the case, I will try change the logic into that the whole message
is dropped if no end of message is seen within 68 counts to avoid
wasting CPU for decoding.
> > +end_msg:
> > + /* Restart the next receive */
> > + mtk_w32_mask(ir, 0x1, MTK_IRCLR, MTK_IRCLR_REG);
> > +
> > + ir_raw_event_set_idle(ir->rc, true);
> > + ir_raw_event_handle(ir->rc);
> > +
> > + /* Clear interrupt status */
> > + mtk_w32_mask(ir, 0x1, MTK_IRINT_CLR, MTK_IRINT_CLR_REG);
> > +
> > + /* Enable interrupt */
> > + mtk_irq_enable(ir, MTK_IRINT_EN);
> > +
> > + spin_unlock(&ir->ir_lock);
> > +
> > + return IRQ_HANDLED;
> > +}
> > +
> > +static int mtk_ir_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *dn = dev->of_node;
> > + struct resource *res;
> > + struct mtk_ir *ir;
> > + u32 val;
> > + int ret = 0;
> > +
> > + ir = devm_kzalloc(dev, sizeof(struct mtk_ir), GFP_KERNEL);
> > + if (!ir)
> > + return -ENOMEM;
> > +
> > + spin_lock_init(&ir->ir_lock);
> > +
> > + ir->dev = dev;
> > +
> > + if (!of_device_is_compatible(dn, "mediatek,mt7623-ir"))
> > + return -ENODEV;
> > +
> > + ir->clk = devm_clk_get(dev, "clk");
> > + if (IS_ERR(ir->clk)) {
> > + dev_err(dev, "failed to get a ir clock.\n");
> > + return PTR_ERR(ir->clk);
> > + }
> > +
> > + if (clk_prepare_enable(ir->clk)) {
> > + dev_err(dev, "try to enable ir_clk failed\n");
> > + ret = -EINVAL;
> > + goto exit_clkdisable_clk;
> > + }
> > +
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + ir->base = devm_ioremap_resource(dev, res);
> > + if (IS_ERR(ir->base)) {
> > + dev_err(dev, "failed to map registers\n");
> > + ret = PTR_ERR(ir->base);
> > + goto exit_clkdisable_clk;
> > + }
> > +
> > + ir->rc = rc_allocate_device();
> > + if (!ir->rc) {
> > + dev_err(dev, "failed to allocate device\n");
> > + ret = -ENOMEM;
> > + goto exit_clkdisable_clk;
> > + }
> > +
> > + ir->rc->priv = ir;
> > + ir->rc->input_name = MTK_IR_DEV;
> > + ir->rc->input_phys = "mtk-ir/input0";
> > + ir->rc->input_id.bustype = BUS_HOST;
> > + ir->rc->input_id.vendor = 0x0001;
> > + ir->rc->input_id.product = 0x0001;
> > + ir->rc->input_id.version = 0x0001;
> > + ir->map_name = of_get_property(dn, "linux,rc-map-name", NULL);
> > + ir->rc->map_name = ir->map_name ?: RC_MAP_EMPTY;
> > + ir->rc->dev.parent = dev;
> > + ir->rc->driver_type = RC_DRIVER_IR_RAW;
> > + ir->rc->driver_name = MTK_IR_DEV;
> > + ir->rc->allowed_protocols = RC_BIT_ALL;
> > + ir->rc->rx_resolution = MTK_IR_SAMPLE;
> > +
> > + ret = rc_register_device(ir->rc);
> > + if (ret) {
> > + dev_err(dev, "failed to register rc device\n");
> > + goto exit_free_dev;
> > + }
> > +
> > + platform_set_drvdata(pdev, ir);
> > +
> > + ir->irq = platform_get_irq(pdev, 0);
> > + if (ir->irq < 0) {
> > + dev_err(dev, "no irq resource\n");
> > + ret = ir->irq;
>
> From here on onwards the errors paths should call rc_unregister_device(),
> and no longer call rc_free_device(). Note that current master has
> devm_rc_allocate_device() and devm_rc_register_device() which would
> simplify this code.
okay, i will use devm_rc_register_device to have simplified code.
> > + goto exit_free_dev;
> > + }
> > +
> > + ret = devm_request_irq(dev, ir->irq, mtk_ir_irq, 0, MTK_IR_DEV, ir);
> > + if (ret) {
> > + dev_err(dev, "failed request irq\n");
> > + goto exit_free_dev;
> > + }
> > +
> > + mtk_irq_disable(ir, MTK_IRINT_EN);
> > +
> > + val = mtk_r32(ir, MTK_CONFIG_HIGH_REG);
> > + val |= MTK_PWM_EN | MTK_IR_EN;
> > + mtk_w32(ir, val, MTK_CONFIG_HIGH_REG);
> > +
> > + /* Setting sample period */
> > + mtk_w32_mask(ir, MTK_CHK_PERIOD, MTK_CHK_PERIOD_MASK,
> > + MTK_CONFIG_LOW_REG);
> > +
> > + mtk_irq_enable(ir, MTK_IRINT_EN);
> > +
> > + dev_info(dev, "initialized MT7623 IR driver\n");
> > + return 0;
> > +
> > +exit_free_dev:
> > + rc_free_device(ir->rc);
> > +exit_clkdisable_clk:
> > + clk_disable_unprepare(ir->clk);
> > +
> > + return ret;
> > +}
> > +
> > +static int mtk_ir_remove(struct platform_device *pdev)
> > +{
> > + unsigned long flags;
> > +
> > + struct mtk_ir *ir = platform_get_drvdata(pdev);
> > +
> > + spin_lock_irqsave(&ir->ir_lock, flags);
> > +
> > + mtk_irq_disable(ir, MTK_IRINT_EN);
> > +
> > + clk_disable_unprepare(ir->clk);
> > +
> > + spin_unlock_irqrestore(&ir->ir_lock, flags);
>
> I'm not convinced the ir_lock is helping to prevent any race condition. An
> irq might still already have occurred which will now try to use ir->rc
> which is freed. You can remove the spinlock completely and call
> sychronize_irq() after disabling the mtk interrupt. That way you're sure
> the remove is safe to complete.
Okay, it's great suggestion. I will use sychronize_irq instead of the my
bad one :)
> > +
> > + rc_unregister_device(ir->rc);
> > +
> > + return 0;
> > +}
> > +
> > +static const struct of_device_id mtk_ir_match[] = {
> > + { .compatible = "mediatek,mt7623-ir" },
> > + {},
> > +};
> > +MODULE_DEVICE_TABLE(of, mtk_ir_match);
> > +
> > +static struct platform_driver mtk_ir_driver = {
> > + .probe = mtk_ir_probe,
> > + .remove = mtk_ir_remove,
> > + .driver = {
> > + .name = MTK_IR_DEV,
> > + .of_match_table = mtk_ir_match,
> > + },
> > +};
> > +
> > +module_platform_driver(mtk_ir_driver);
> > +
> > +MODULE_DESCRIPTION("Mediatek MT7623 IR Receiver Controller Driver");
> > +MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
> > +MODULE_LICENSE("GPL");
> > --
> > 1.9.1
> >
^ permalink raw reply
* [PATCH 10/12] ARM: dts: socfpga: add base fpga region and fpga bridges
From: Dinh Nguyen @ 2017-01-06 7:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANk1AXRsrW1YHRPn4Rcv7Pu8jBUEcOmREOFYvvMV8D9eKLU-6g@mail.gmail.com>
On 01/05/2017 10:34 AM, Alan Tull wrote:
> On Thu, Jan 5, 2017 at 10:28 AM, Alan Tull <atull@kernel.org> wrote:
>> On Wed, Jan 4, 2017 at 6:21 PM, Dinh Nguyen <dinguyen@kernel.org> wrote:
>>> From: Alan Tull <atull@opensource.altera.com>
>>>
>>> Add h2f and lwh2f bridges.
>>> Add base FPGA Region to support DT overlays for FPGA programming.
>>> Add l3regs.
>>>
>>> Signed-off-by: Alan Tull <atull@opensource.altera.com>
>>> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
>>> ---
>>> arch/arm/boot/dts/socfpga.dtsi | 31 +++++++++++++++++++++++++++++++
>>> 1 file changed, 31 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
>>> index de29172..dccc281 100644
>>> --- a/arch/arm/boot/dts/socfpga.dtsi
>>> +++ b/arch/arm/boot/dts/socfpga.dtsi
>>> @@ -93,6 +93,16 @@
>>> };
>>> };
>>>
>>> + base_fpga_region {
>>> + compatible = "fpga-region";
>>> + fpga-mgr = <&fpgamgr0>;
>>> + fpga-bridges = <&fpga_bridge0>, <&fpga_bridge1>;
>>
>> Hi Dinh,
>>
>> We want to get rid of the 'fpga-bridges' line.
>>
>>> +
>>> + #address-cells = <0x1>;
>>> + #size-cells = <0x1>;
>>> + ranges = <0 0xff200000 0x100000>;
>>
>> Should get rid of the ranges line here too. The 'fpga-bridges' and
>> 'ranges' line can be added in the overlay.
>>
>> Alan
>>
>>> + };
>>> +
>>> can0: can at ffc00000 {
>>> compatible = "bosch,d_can";
>>> reg = <0xffc00000 0x1000>;
>>> @@ -513,6 +523,22 @@
>>> };
>>> };
>>>
>>> + fpga_bridge0: fpga_bridge at ff400000 {
>>> + compatible = "altr,socfpga-lwhps2fpga-bridge";
>>> + reg = <0xff400000 0x100000>;
>>> + resets = <&rst LWHPS2FPGA_RESET>;
>>> + reset-names = "lwhps2fpga";
>
> The driver doesn't need 'reset-names' here or below for fpga_bridge1.
>
Ok, thanks for the review.
Dinh
^ permalink raw reply
* [PATCH 2/2] media: rc: add driver for IR remote receiver on MT7623 SoC
From: Sean Wang @ 2017-01-06 7:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106034346.7njhyhtsc4yado5c@gangnam.samsung>
Hi Andi,
Thank for your reminder. I will refine the code based on your work.
to have elegant code and easy error handling.
Sean
On Fri, 2017-01-06 at 12:43 +0900, Andi Shyti wrote:
> Hi Sean,
>
> > + ir->rc = rc_allocate_device();
>
> Yes, you should use devm_rc_allocate_device(...)
>
> Besides, standing to this patch which is not in yet:
>
> https://lkml.org/lkml/2016/12/18/39
>
> rc_allocate_device should provide the driver type during
> allocation, so it should be:
>
> ir->rc = rc_allocate_device(RC_DRIVER_IR_RAW);
>
> and this line can be removed:
>
> > + ir->rc->driver_type = RC_DRIVER_IR_RAW;
>
> I don't know when Mauro will take the patch above.
>
> Andi
^ permalink raw reply
* [PATCHv2] ARM: dts: socfpga: add base fpga region and fpga bridges
From: Dinh Nguyen @ 2017-01-06 7:48 UTC (permalink / raw)
To: linux-arm-kernel
From: Alan Tull <atull@opensource.altera.com>
Add h2f and lwh2f bridges.
Add base FPGA Region to support DT overlays for FPGA programming.
Add l3regs.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: removed fpga-bridges, ranges, and reset-names
---
arch/arm/boot/dts/socfpga.dtsi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index de29172..c984f53 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -93,6 +93,14 @@
};
};
+ base_fpga_region {
+ compatible = "fpga-region";
+ fpga-mgr = <&fpgamgr0>;
+
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ };
+
can0: can at ffc00000 {
compatible = "bosch,d_can";
reg = <0xffc00000 0x1000>;
@@ -513,6 +521,20 @@
};
};
+ fpga_bridge0: fpga_bridge at ff400000 {
+ compatible = "altr,socfpga-lwhps2fpga-bridge";
+ reg = <0xff400000 0x100000>;
+ resets = <&rst LWHPS2FPGA_RESET>;
+ clocks = <&l4_main_clk>;
+ };
+
+ fpga_bridge1: fpga_bridge at ff500000 {
+ compatible = "altr,socfpga-hps2fpga-bridge";
+ reg = <0xff500000 0x10000>;
+ resets = <&rst HPS2FPGA_RESET>;
+ clocks = <&l4_main_clk>;
+ };
+
fpgamgr0: fpgamgr at ff706000 {
compatible = "altr,socfpga-fpga-mgr";
reg = <0xff706000 0x1000
@@ -694,6 +716,11 @@
arm,prefetch-offset = <7>;
};
+ l3regs at 0xff800000 {
+ compatible = "altr,l3regs", "syscon";
+ reg = <0xff800000 0x1000>;
+ };
+
mmc: dwmmc0 at ff704000 {
compatible = "altr,socfpga-dw-mshc";
reg = <0xff704000 0x1000>;
--
2.7.4
^ permalink raw reply related
* [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32
From: Benjamin Gaignard @ 2017-01-06 7:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170105144953.GT24225@dell>
2017-01-05 15:49 GMT+01:00 Lee Jones <lee.jones@linaro.org>:
> On Thu, 05 Jan 2017, Benjamin Gaignard wrote:
>
>> version 7:
>> - rebase on v4.10-rc2
>> - remove iio_device code from driver and keep only the trigger part
>>
>> version 6:
>> - rename stm32-gptimer in stm32-timers.
>> - change "st,stm32-gptimer" compatible to "st,stm32-timers".
>> - modify "st,breakinput" parameter in pwm part.
>> - split DT patch in 2
>>
>> version 5:
>> - fix comments done on version 4
>> - rebased on kernel 4.9-rc8
>> - change nodes names and re-order then by addresses
>>
>> version 4:
>> - fix comments done on version 3
>> - don't use interrupts anymore in IIO timer
>> - detect hardware capabilities at probe time to simplify binding
>>
>> version 3:
>> - no change on mfd and pwm divers patches
>> - add cross reference between bindings
>> - change compatible to "st,stm32-timer-trigger"
>> - fix attributes access rights
>> - use string instead of int for master_mode and slave_mode
>> - document device attributes in sysfs-bus-iio-timer-stm32
>> - update DT with the new compatible
>>
>> version 2:
>> - keep only one compatible per driver
>> - use DT parameters to describe hardware block configuration:
>> - pwm channels, complementary output, counter size, break input
>> - triggers accepted and create by IIO timers
>> - change DT to limite use of reference to the node
>> - interrupt is now in IIO timer driver
>> - rename stm32-mfd-timer to stm32-timers (for general purpose timer)
>>
>> The following patches enable PWM and IIO Timer features for STM32 platforms.
>>
>> Those two features are mixed into the registers of the same hardware block
>> (named general purpose timer) which lead to introduce a multifunctions driver
>> on the top of them to be able to share the registers.
>>
>> In STM32f4 14 instances of timer hardware block exist, even if they all have
>> the same register mapping they could have a different number of pwm channels
>> and/or different triggers capabilities. We use various parameters in DT to
>> describe the differences between hardware blocks
>>
>> The MFD (stm32-timers.c) takes care of clock and register mapping
>> by using regmap. stm32_timers structure is provided to its sub-node to
>> share those information.
>>
>> PWM driver is implemented into pwm-stm32.c. Depending of the instance we may
>> have up to 4 channels, sometime with complementary outputs or 32 bits counter
>> instead of 16 bits. Some hardware blocks may also have a break input function
>> which allows to stop pwm depending of a level, defined in devicetree, on an
>> external pin.
>>
>> IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list
>> of hardware triggers usable by hardware blocks like ADC, DAC or other timers.
>>
>> The matrix of possible connections between blocks is quite complex so we use
>> trigger names and is_stm32_iio_timer_trigger() function to be sure that
>> triggers are valid and configure the IPs.
>>
>> At run time IIO timer hardware blocks can configure (through "master_mode"
>> IIO device attribute) which internal signal (counter enable, reset,
>> comparison block, etc...) is used to generate the trigger.
>>
>> Benjamin Gaignard (8):
>> MFD: add bindings for STM32 Timers driver
>> MFD: add STM32 Timers driver
>> PWM: add pwm-stm32 DT bindings
>> PWM: add PWM driver for STM32 plaftorm
>> IIO: add bindings for STM32 timer trigger driver
>> IIO: add STM32 timer trigger driver
>> ARM: dts: stm32: add Timers driver for stm32f429 MCU
>> ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
>
> Any reason why you've dropped all your Acks?
>
> I don't really want to review it again if little is different.
>
> How much MFD related code has changed since the last review?
All my apologies I forgot to add your Acks for MFD parts.
Sorry for that
>
>> .../ABI/testing/sysfs-bus-iio-timer-stm32 | 29 ++
>> .../bindings/iio/timer/stm32-timer-trigger.txt | 23 ++
>> .../devicetree/bindings/mfd/stm32-timers.txt | 46 +++
>> .../devicetree/bindings/pwm/pwm-stm32.txt | 33 ++
>> arch/arm/boot/dts/stm32f429.dtsi | 275 +++++++++++++
>> arch/arm/boot/dts/stm32f469-disco.dts | 28 ++
>> drivers/iio/Kconfig | 1 -
>> drivers/iio/trigger/Kconfig | 10 +
>> drivers/iio/trigger/Makefile | 1 +
>> drivers/iio/trigger/stm32-timer-trigger.c | 340 ++++++++++++++++
>> drivers/mfd/Kconfig | 11 +
>> drivers/mfd/Makefile | 2 +
>> drivers/mfd/stm32-timers.c | 80 ++++
>> drivers/pwm/Kconfig | 9 +
>> drivers/pwm/Makefile | 1 +
>> drivers/pwm/pwm-stm32.c | 434 +++++++++++++++++++++
>> include/linux/iio/timer/stm32-timer-trigger.h | 62 +++
>> include/linux/mfd/stm32-timers.h | 71 ++++
>> 18 files changed, 1455 insertions(+), 1 deletion(-)
>> create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>> create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt
>> create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt
>> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt
>> create mode 100644 drivers/iio/trigger/stm32-timer-trigger.c
>> create mode 100644 drivers/mfd/stm32-timers.c
>> create mode 100644 drivers/pwm/pwm-stm32.c
>> create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h
>> create mode 100644 include/linux/mfd/stm32-timers.h
>>
>
> --
> Lee Jones
> Linaro STMicroelectronics Landing Team Lead
> Linaro.org ? Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog
--
Benjamin Gaignard
Graphic Study Group
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* [PATCH v3 2/5] arm64: dts: exynos: make tm2 and tm2e independent from each other
From: Andi Shyti @ 2017-01-06 7:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106070911.sj6qjd5akyxnazsl@kozik-lap>
Hi,
On Fri, Jan 06, 2017 at 09:09:11AM +0200, Krzysztof Kozlowski wrote:
> On Fri, Jan 06, 2017 at 12:59:06PM +0900, Jaechul Lee wrote:
> > From: Andi Shyti <andi.shyti@samsung.com>
> >
> > Currently tm2e dts includes tm2 but there are some differences
> > between the two boards and tm2 has some properties that tm2e
> > doesn't have.
> >
> > That's why it's important to keep the two dts files independent
> > and put all the commonalities in a tm2-common.dtsi file.
> >
> > At the current status the only two differences between the two
> > dts files (besides the board name) are ldo31 and ldo38.
> >
> > Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> > Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
> > ---
> > .../boot/dts/exynos/exynos5433-tm2-common.dtsi | 1118 +++++++++++++++++++
> > arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 1153 +-------------------
>
> Like talking to a wall. Without any feedback. If my instructions were
> wrong (and it is not possible to detect rename) then please say it (you
> can add personal comments after separator ---).
no Krzysztof, I'm sorry, but this patch has been formatted with
the diff algorithm *you* asked, -B50% both version 2 (where you
didn't comment) and version 3. If you still don't like it, please
don't blame me, blame the algorithm.
Now we can stay here at trying random diff algorithms (as they
give more or less the same result) or you tell me which exact
algorithm you want me to use. Besides, for me it's clear,
tm2-common is all new, while in tm2 you have on one side the '-'
(if it applies nothing has changed) on the bottom the '+'.
Andi
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox