* [PATCH 15/25] ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for i2c nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for i2c nodes in
DT for r8a7791 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7791 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index a5c596a15120..b61700aa862e 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -444,7 +444,7 @@
i2c0: i2c at e6508000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7791";
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
@@ -456,7 +456,7 @@
i2c1: i2c at e6518000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7791";
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
@@ -468,7 +468,7 @@
i2c2: i2c at e6530000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7791";
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
@@ -480,7 +480,7 @@
i2c3: i2c at e6540000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7791";
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
@@ -492,7 +492,7 @@
i2c4: i2c at e6520000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7791";
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
@@ -505,7 +505,7 @@
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7791";
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 16/25] ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding for i2c nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for i2c nodes in
DT for r8a7792 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7792 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7792.dtsi | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 6ced3c1ec377..59d31d433244 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -498,7 +498,8 @@
/* I2C doesn't need pinmux */
i2c0: i2c at e6508000 {
- compatible = "renesas,i2c-r8a7792";
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C0>;
@@ -510,7 +511,8 @@
};
i2c1: i2c at e6518000 {
- compatible = "renesas,i2c-r8a7792";
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C1>;
@@ -522,7 +524,8 @@
};
i2c2: i2c at e6530000 {
- compatible = "renesas,i2c-r8a7792";
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C2>;
@@ -534,7 +537,8 @@
};
i2c3: i2c at e6540000 {
- compatible = "renesas,i2c-r8a7792";
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C3>;
@@ -546,7 +550,8 @@
};
i2c4: i2c at e6520000 {
- compatible = "renesas,i2c-r8a7792";
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C4>;
@@ -558,7 +563,8 @@
};
i2c5: i2c at e6528000 {
- compatible = "renesas,i2c-r8a7792";
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C5>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 17/25] ARM: dts: r8a7793: Use R-Car Gen 2 fallback binding for i2c nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for i2c nodes in
DT for r8a7793 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7793 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7793.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 2fb527ca0b15..4d271ad8bf52 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -411,7 +411,7 @@
i2c0: i2c at e6508000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
@@ -423,7 +423,7 @@
i2c1: i2c at e6518000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
@@ -435,7 +435,7 @@
i2c2: i2c at e6530000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
@@ -447,7 +447,7 @@
i2c3: i2c at e6540000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
@@ -459,7 +459,7 @@
i2c4: i2c at e6520000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
@@ -472,7 +472,7 @@
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 18/25] ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for i2c nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for i2c nodes in
DT for r8a7794 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7794 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7794.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 9692bfd82b1d..89f8f98cb115 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -611,7 +611,7 @@
/* The memory map in the User's Manual maps the cores to bus numbers */
i2c0: i2c at e6508000 {
- compatible = "renesas,i2c-r8a7794";
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
@@ -623,7 +623,7 @@
};
i2c1: i2c at e6518000 {
- compatible = "renesas,i2c-r8a7794";
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
@@ -635,7 +635,7 @@
};
i2c2: i2c at e6530000 {
- compatible = "renesas,i2c-r8a7794";
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
@@ -647,7 +647,7 @@
};
i2c3: i2c at e6540000 {
- compatible = "renesas,i2c-r8a7794";
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
@@ -659,7 +659,7 @@
};
i2c4: i2c at e6520000 {
- compatible = "renesas,i2c-r8a7794";
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
@@ -671,7 +671,7 @@
};
i2c5: i2c at e6528000 {
- compatible = "renesas,i2c-r8a7794";
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 19/25] ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for iic nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for iic nodes in
DT for r8a7790 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7790 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7790.dtsi | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 823ab536175d..ddf6a8cbe6c1 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -528,7 +528,8 @@
iic0: i2c at e6500000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
@@ -542,7 +543,8 @@
iic1: i2c at e6510000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
@@ -556,7 +558,8 @@
iic2: i2c at e6520000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe6520000 0 0x425>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
@@ -570,7 +573,8 @@
iic3: i2c at e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 20/25] ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for iic nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for iic nodes in
DT for r8a7791 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7791 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index b61700aa862e..55872fc8fa4c 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -518,7 +518,8 @@
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
@@ -532,7 +533,8 @@
i2c7: i2c at e6500000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
@@ -546,7 +548,8 @@
i2c8: i2c at e6510000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 21/25] ARM: dts: r8a7793: Use R-Car Gen 2 fallback binding for iic nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for iic nodes in
DT for r8a7793 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7793 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7793.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 4d271ad8bf52..bf64e2420fb5 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -485,7 +485,8 @@
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
@@ -499,7 +500,8 @@
i2c7: i2c at e6500000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
@@ -513,7 +515,8 @@
i2c8: i2c at e6510000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [GIT PULL] Renesas ARM Based SoC DT Updates for v4.11
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC DT updates for v4.11.
The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v4.11
for you to fetch changes up to 654450baf2afba86cf328e1849ccac61ec4630af:
ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for msiof nodes (2017-01-03 10:47:05 +0100)
----------------------------------------------------------------
Renesas ARM Based SoC DT Updates for v4.11
* Add da9063 PMIC device node for system restart to gose board
* Add device node for PRR to SoCs where it was missing
* Move RST node before SYSC node where it was incorrectly placed
* Use Gen 2 fallback bindings for I2C, IIC, MSIOf and USB2 phy
* Use SoC-specific compat string for MMCIF where it was missing
----------------------------------------------------------------
Geert Uytterhoeven (5):
ARM: dts: r8a7743: Move RST node before SYSC node
ARM: dts: r8a7745: Move RST node before SYSC node
ARM: dts: r8a7743: Add device node for PRR
ARM: dts: r8a7745: Add device node for PRR
ARM: dts: gose: Add da9063 PMIC device node for system restart
Simon Horman (20):
ARM: dts: r8a73a4: Use SoC-specific compat string for mmcif
ARM: dts: r8a7778: Use SoC-specific compat string for mmcif
ARM: dts: sh73a0: Use SoC-specific compat string for mmcif
ARM: dts: r8a7790: Use renesas,rcar-gen2-usb-phy fallback binding
ARM: dts: r8a7791: Use renesas,rcar-gen2-usb-phy fallback binding
ARM: dts: r8a7794: Use renesas,rcar-gen2-usb-phy fallback binding
ARM: dts: r8a7779: Use R-Car Gen 1 fallback binding for i2c nodes
ARM: dts: r8a7778: Use R-Car Gen 1 fallback binding for i2c nodes
ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for i2c nodes
ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for i2c nodes
ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding for i2c nodes
ARM: dts: r8a7793: Use R-Car Gen 2 fallback binding for i2c nodes
ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for i2c nodes
ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for iic nodes
ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for iic nodes
ARM: dts: r8a7793: Use R-Car Gen 2 fallback binding for iic nodes
ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for iic nodes
ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for msiof nodes
ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding for msiof nodes
ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for msiof nodes
arch/arm/boot/dts/r8a73a4.dtsi | 4 ++--
arch/arm/boot/dts/r8a7743.dtsi | 13 +++++++++----
arch/arm/boot/dts/r8a7745.dtsi | 13 +++++++++----
arch/arm/boot/dts/r8a7778.dtsi | 10 +++++-----
arch/arm/boot/dts/r8a7779.dtsi | 8 ++++----
arch/arm/boot/dts/r8a7790.dtsi | 35 ++++++++++++++++++++++-------------
arch/arm/boot/dts/r8a7791.dtsi | 33 ++++++++++++++++++++-------------
arch/arm/boot/dts/r8a7792.dtsi | 24 ++++++++++++++++--------
arch/arm/boot/dts/r8a7793-gose.dts | 21 +++++++++++++++++++++
arch/arm/boot/dts/r8a7793.dtsi | 21 ++++++++++++---------
arch/arm/boot/dts/r8a7794.dtsi | 21 ++++++++++++---------
arch/arm/boot/dts/sh73a0.dtsi | 2 +-
12 files changed, 133 insertions(+), 72 deletions(-)
^ permalink raw reply
* [PATCH 22/25] ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for iic nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for iic nodes in
DT for r8a7794 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7794 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7794.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 89f8f98cb115..86042e64972a 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -683,7 +683,8 @@
};
i2c6: i2c at e6500000 {
- compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
@@ -697,7 +698,8 @@
};
i2c7: i2c at e6510000 {
- compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
+ compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 23/25] ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for msiof nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for msiof nodes in
DT for r8a7791 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7791 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 55872fc8fa4c..06486664d754 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1521,7 +1521,8 @@
};
msiof0: spi at e6e20000 {
- compatible = "renesas,msiof-r8a7791";
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
@@ -1535,7 +1536,8 @@
};
msiof1: spi at e6e10000 {
- compatible = "renesas,msiof-r8a7791";
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
@@ -1549,7 +1551,8 @@
};
msiof2: spi at e6e00000 {
- compatible = "renesas,msiof-r8a7791";
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 24/25] ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding for msiof nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for msiof nodes in
DT for r8a7792 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7792 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7792.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 59d31d433244..135e06920e2d 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -591,7 +591,8 @@
};
msiof0: spi at e6e20000 {
- compatible = "renesas,msiof-r8a7792";
+ compatible = "renesas,msiof-r8a7792",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>;
@@ -605,7 +606,8 @@
};
msiof1: spi at e6e10000 {
- compatible = "renesas,msiof-r8a7792";
+ compatible = "renesas,msiof-r8a7792",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 25/25] ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for msiof nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for msiof nodes in
DT for r8a7790 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7790 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7790.dtsi | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index ddf6a8cbe6c1..44ea77febe17 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1508,7 +1508,8 @@
};
msiof0: spi at e6e20000 {
- compatible = "renesas,msiof-r8a7790";
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
@@ -1522,7 +1523,8 @@
};
msiof1: spi at e6e10000 {
- compatible = "renesas,msiof-r8a7790";
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
@@ -1536,7 +1538,8 @@
};
msiof2: spi at e6e00000 {
- compatible = "renesas,msiof-r8a7790";
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
@@ -1550,7 +1553,8 @@
};
msiof3: spi at e6c90000 {
- compatible = "renesas,msiof-r8a7790";
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6c90000 0 0x0064>;
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH v3 7/9] arm64: cpufeature: Track user visible fields
From: Suzuki K Poulose @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170105180626.GH29765@e104818-lin.cambridge.arm.com>
On 05/01/17 18:06, Catalin Marinas wrote:
> On Wed, Jan 04, 2017 at 05:49:05PM +0000, Suzuki K. Poulose wrote:
>> Track the user visible fields of a CPU feature register. This will be
>> used for exposing the value to the userspace. All the user visible
>> fields of a feature register will be passed on as it is, while the
>> others would be filled with their respective safe value.
>>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will.deacon@arm.com>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>
> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
>
>> @@ -81,75 +82,75 @@ cpufeature_pan_not_uao(const struct arm64_cpu_capabilities *entry, int __unused)
>>
>>
>> static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64ISAR0_RDM_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_ATOMICS_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_CRC32_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA2_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA1_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_AES_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64ISAR0_RDM_SHIFT, 4, 0),
On a second look, I think we should make the RDM field visible to the user space as it
is something useful for the user.
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_ATOMICS_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_CRC32_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA2_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA1_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_AES_SHIFT, 4, 0),
>
> BTW, as a separate patch I think we need to expose the RDM field in this
> register as well, together with a corresponding HWCAP bit.
OK, I will send a separate patch for this.
Thanks for the review.
Suzuki
^ permalink raw reply
* [GIT PULL] Renesas ARM Based SoC Updates for v4.11
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC updates for v4.11.
The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-for-v4.11
for you to fetch changes up to 70def3e53694a65c5583fb5f411491a5074bab18:
ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins() (2017-01-03 10:50:45 +0100)
----------------------------------------------------------------
Renesas ARM Based SoC Updates for v4.11
* Allow booting secondary CPU cores in debug mode
----------------------------------------------------------------
Geert Uytterhoeven (5):
ARM: shmobile: apmu: Add more register documentation
ARM: shmobile: apmu: Add debug resource reset for secondary CPU boot
ARM: shmobile: apmu: Allow booting secondary CPU cores in debug mode
ARM: shmobile: r8a7791: Allow booting secondary CPU cores in debug mode
ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()
arch/arm/mach-shmobile/platsmp-apmu.c | 41 +++++++++++++++++++-------------
arch/arm/mach-shmobile/rcar-gen2.h | 2 --
arch/arm/mach-shmobile/setup-rcar-gen2.c | 18 --------------
arch/arm/mach-shmobile/smp-r8a7791.c | 14 +----------
4 files changed, 25 insertions(+), 50 deletions(-)
^ permalink raw reply
* [PATCH 1/5] ARM: shmobile: apmu: Add more register documentation
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/platsmp-apmu.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 0c6bb458b7a4..933f9b902405 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -31,9 +31,15 @@ static struct {
int bit;
} apmu_cpus[NR_CPUS];
-#define WUPCR_OFFS 0x10
-#define PSTR_OFFS 0x40
-#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
+#define WUPCR_OFFS 0x10 /* Wake Up Control Register */
+#define PSTR_OFFS 0x40 /* Power Status Register */
+#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
+ /* CPUn Power Status Control Register */
+
+/* Power Status Register */
+#define CPUNST(r, n) (((r) >> (n * 4)) & 3) /* CPUn Status Bit */
+#define CPUST_RUN 0 /* Run Mode */
+#define CPUST_STANDBY 3 /* CoreStandby Mode */
static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
{
@@ -59,7 +65,7 @@ static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit)
int k;
for (k = 0; k < 1000; k++) {
- if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3)
+ if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY)
return 1;
mdelay(1);
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 2/5] ARM: shmobile: apmu: Add debug resource reset for secondary CPU boot
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
In debug mode (MD21=1), reset requests derived from power-shutoff to the
AP-system CPU cores must be enabled before the AP-system CPU cores
resume from power-shutoff for the first time. Else resume may fail,
causing the system to hang during boot.
As setting these bits is a no-op in normal mode, there's no need to
check the actual state of MD21 first.
Inspired by CPU-specific patches in the BSP by Hisashi Nakamura
<hisashi.nakamura.ak@renesas.com>.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/platsmp-apmu.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 933f9b902405..7e4ca6788be5 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -35,12 +35,18 @@ static struct {
#define PSTR_OFFS 0x40 /* Power Status Register */
#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
/* CPUn Power Status Control Register */
+#define DBGRCR_OFFS 0x180 /* Debug Resource Reset Control Reg. */
/* Power Status Register */
#define CPUNST(r, n) (((r) >> (n * 4)) & 3) /* CPUn Status Bit */
#define CPUST_RUN 0 /* Run Mode */
#define CPUST_STANDBY 3 /* CoreStandby Mode */
+/* Debug Resource Reset Control Register */
+#define DBGCPUREN BIT(24) /* CPU Other Reset Request Enable */
+#define DBGCPUNREN(n) BIT((n) + 20) /* CPUn Reset Request Enable */
+#define DBGCPUPREN BIT(19) /* CPU Peripheral Reset Req. Enable */
+
static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
{
/* request power on */
@@ -84,6 +90,8 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu)
#ifdef CONFIG_SMP
static void apmu_init_cpu(struct resource *res, int cpu, int bit)
{
+ u32 x;
+
if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
return;
@@ -91,6 +99,11 @@ static void apmu_init_cpu(struct resource *res, int cpu, int bit)
apmu_cpus[cpu].bit = bit;
pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res);
+
+ /* Setup for debug mode */
+ x = readl(apmu_cpus[cpu].iomem + DBGRCR_OFFS);
+ x |= DBGCPUREN | DBGCPUNREN(bit) | DBGCPUPREN;
+ writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS);
}
static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit),
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 3/5] ARM: shmobile: apmu: Allow booting secondary CPU cores in debug mode
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Now debug resource reset is handled properly, allow booting secondary
CPU cores when hardware debug mode is enabled (MD21=1) on SoCs using the
"renesas,apmu" enable method.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/platsmp-apmu.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 7e4ca6788be5..e19266844e16 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -216,21 +216,9 @@ static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
rcar_gen2_pm_init();
}
-static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,
- struct task_struct *idle)
-{
- /* Error out when hardware debug mode is enabled */
- if (rcar_gen2_read_mode_pins() & BIT(21)) {
- pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
- return -ENOTSUPP;
- }
-
- return shmobile_smp_apmu_boot_secondary(cpu, idle);
-}
-
static struct smp_operations apmu_smp_ops __initdata = {
.smp_prepare_cpus = shmobile_smp_apmu_prepare_cpus_dt,
- .smp_boot_secondary = shmobile_smp_apmu_boot_secondary_md21,
+ .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_can_disable = shmobile_smp_cpu_can_disable,
.cpu_die = shmobile_smp_apmu_cpu_die,
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 4/5] ARM: shmobile: r8a7791: Allow booting secondary CPU cores in debug mode
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Now debug resource reset is handled properly, allow booting secondary
CPU cores when hardware debug mode is enabled (MD21=1, SW8-4=OFF on
koelsch) on legacy r8a7791.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/smp-r8a7791.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
index 2d6417af73b5..2948c22cfc53 100644
--- a/arch/arm/mach-shmobile/smp-r8a7791.c
+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
@@ -42,21 +42,9 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
rcar_gen2_pm_init();
}
-static int r8a7791_smp_boot_secondary(unsigned int cpu,
- struct task_struct *idle)
-{
- /* Error out when hardware debug mode is enabled */
- if (rcar_gen2_read_mode_pins() & BIT(21)) {
- pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
- return -ENOTSUPP;
- }
-
- return shmobile_smp_apmu_boot_secondary(cpu, idle);
-}
-
const struct smp_operations r8a7791_smp_ops __initconst = {
.smp_prepare_cpus = r8a7791_smp_prepare_cpus,
- .smp_boot_secondary = r8a7791_smp_boot_secondary,
+ .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_can_disable = shmobile_smp_cpu_can_disable,
.cpu_die = shmobile_smp_apmu_cpu_die,
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 5/5] ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()
From: Simon Horman @ 2017-01-06 11:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
After
1. commit 9f5ce39ddb8f68b3 ("ARM: shmobile: rcar-gen2: Obtain extal
frequency from DT"),
2. commit 80951f04c3f92533 ("ARM: shmobile: rcar-gen2: Stop passing
mode pins state to clock driver"),
3. and handling of debug resource reset,
there are no more users of rcar_gen2_read_mode_pins() left.
Remove the function and its support definitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/rcar-gen2.h | 2 --
arch/arm/mach-shmobile/setup-rcar-gen2.c | 18 ------------------
2 files changed, 20 deletions(-)
diff --git a/arch/arm/mach-shmobile/rcar-gen2.h b/arch/arm/mach-shmobile/rcar-gen2.h
index 8a66b4aae035..6792e249cf56 100644
--- a/arch/arm/mach-shmobile/rcar-gen2.h
+++ b/arch/arm/mach-shmobile/rcar-gen2.h
@@ -2,8 +2,6 @@
#define __ASM_RCAR_GEN2_H__
void rcar_gen2_timer_init(void);
-#define MD(nr) BIT(nr)
-u32 rcar_gen2_read_mode_pins(void);
void rcar_gen2_reserve(void);
void rcar_gen2_pm_init(void);
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index ac63fa407b64..52d466b75973 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -29,24 +29,6 @@
#include "common.h"
#include "rcar-gen2.h"
-#define MODEMR 0xe6160060
-
-u32 rcar_gen2_read_mode_pins(void)
-{
- static u32 mode;
- static bool mode_valid;
-
- if (!mode_valid) {
- void __iomem *modemr = ioremap_nocache(MODEMR, 4);
- BUG_ON(!modemr);
- mode = ioread32(modemr);
- iounmap(modemr);
- mode_valid = true;
- }
-
- return mode;
-}
-
static unsigned int __init get_extal_freq(void)
{
struct device_node *cpg, *extal;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH] ARM: hw_breakpoint: blacklist Scorpion CPUs
From: Will Deacon @ 2017-01-06 11:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170105232324.GL17126@codeaurora.org>
On Thu, Jan 05, 2017 at 03:23:24PM -0800, Stephen Boyd wrote:
> On 01/05, Mark Rutland wrote:
> > On APQ8060, the kernel crashes in arch_hw_breakpoint_init, taking an
> > undefined instruction trap within write_wb_reg. This is because Scorpion
> > CPUs erroneously appear to set DBGPRSR.SPD when WFI is issued, even if
> > the core is not powered down. When DBGPRSR.SPD is set, breakpoint and
> > watchpoint registers are treated as undefined.
> >
> > It's possible to trigger similar crashes later on from userspace, by
> > requesting the kernel to install a breakpoint or watchpoint, as we can
> > go idle at any point between the reset of the debug registers and their
> > later use. This has always been the case.
> >
> > Given that this has always been broken, no-one has complained until now,
> > and there is no clear workaround, disable hardware breakpoints and
> > watchpoints on Scorpion to avoid these issues.
>
> I believe the workaround is to read DBGPRSR after exit from WFI?
That might be do-able via cpuidle, but it's probably better for somebody
familiar with the SoC PM to write that patch.
> I'm fine with the blacklisting approach though.
>
> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Thanks,
Will
^ permalink raw reply
* [PATCH] ARM: hw_breakpoint: blacklist Scorpion CPUs
From: Will Deacon @ 2017-01-06 11:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483637556-3974-1-git-send-email-mark.rutland@arm.com>
On Thu, Jan 05, 2017 at 05:32:36PM +0000, Mark Rutland wrote:
> On APQ8060, the kernel crashes in arch_hw_breakpoint_init, taking an
> undefined instruction trap within write_wb_reg. This is because Scorpion
> CPUs erroneously appear to set DBGPRSR.SPD when WFI is issued, even if
> the core is not powered down. When DBGPRSR.SPD is set, breakpoint and
> watchpoint registers are treated as undefined.
>
> It's possible to trigger similar crashes later on from userspace, by
> requesting the kernel to install a breakpoint or watchpoint, as we can
> go idle at any point between the reset of the debug registers and their
> later use. This has always been the case.
>
> Given that this has always been broken, no-one has complained until now,
> and there is no clear workaround, disable hardware breakpoints and
> watchpoints on Scorpion to avoid these issues.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Reported-by: Linus Walleij <linus.walleij@linaro.org>
> Cc: Russell King <linux@armlinux.org.uk>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: stable at vger.kernel.org
> ---
> arch/arm/include/asm/cputype.h | 3 +++
> arch/arm/kernel/hw_breakpoint.c | 16 ++++++++++++++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
> index 522b5fe..b62eaeb 100644
> --- a/arch/arm/include/asm/cputype.h
> +++ b/arch/arm/include/asm/cputype.h
> @@ -94,6 +94,9 @@
> #define ARM_CPU_XSCALE_ARCH_V2 0x4000
> #define ARM_CPU_XSCALE_ARCH_V3 0x6000
>
> +/* Qualcomm implemented cores */
> +#define ARM_CPU_PART_SCORPION 0x510002d0
> +
> extern unsigned int processor_id;
>
> #ifdef CONFIG_CPU_CP15
> diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
> index 188180b..5d68ff9 100644
> --- a/arch/arm/kernel/hw_breakpoint.c
> +++ b/arch/arm/kernel/hw_breakpoint.c
> @@ -1063,6 +1063,22 @@ static int __init arch_hw_breakpoint_init(void)
> return 0;
> }
>
> + /*
> + * Scorpion CPUs (at least those in APQ8060) seem to set DBGPRSR.SPD
> + * whenever a WFI is issued, even if the core is not powered down, in
> + * violation of the architecture. When DBGPRSR.SPD is set, accesses to
> + * breakpoint and watchpoint registers are treated as undefined, so
> + * this results in boot time and runtime failures when these are
> + * accessed and we unexpectedly take a trap.
> + *
> + * It's not clear if/how this can be worked around, so we blacklist
> + * Scorpion CPUs to avoid these issues.
> + */
> + if (read_cpuid_part() == ARM_CPU_PART_SCORPION) {
> + pr_info("Scorpion CPU detected. Breakpoints and watchpoints disabled\n");
nit: we're disabling *hardware* breakpoints and watchpoints, so it's worth
mentioning that in the print.
With that:
Acked-by: Will Deacon <will.deacon@arm.com>
Please put this into Russell's patch system.
Will
^ permalink raw reply
* [QUESTION] Early Write Acknowledge for PCIe configuration space
From: Arnd Bergmann @ 2017-01-06 11:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <df407f39-ee05-d74d-6e5e-c5e502372032@huawei.com>
On Friday, January 6, 2017 11:15:22 AM CET John Garry wrote:
> [apologies if this has been queried before]
>
> Hi ARM guys,
>
> I have a question about the device memory attributes we assign for PCIe
> config space for arm64. Currently we use ioremap to map in the config
> space; this uses nGnRE, which means we enable Early Write Acknowledge.
>
> The ARMv8 ARM states that "ARM recommend that No Early Write Acknowledge
> Hint is used for PCIe configuration writes".
>
> I understand a problem with using E is in that configuration write is a
> non-post operation, which means the RP requires to get the completion
> ack from the EP The problem here is if CPU writes data to ECAM by E,
> complete will go back to CPU directly, and maybe at this point the write
> has not reached the EP.
>
> I believe that this may cause ordering issues in PCI read/write. In
> practice we use non-relaxed readl/writel to access config space, which
> include the synchronization barriers, which, *as I understand*, even if
> for full system domain, may be negated by the E attribute for PCIe.
I don't think the barriers in readl/writel are enough here, in particular
the write barrier is *before* the access to synchronize DMAs
on RAM with MMIO accesses, which is a bit different from what you
have here.
> So a question: why is the recommendation in the ARMv8 ARM ignored?
Probably nobody thought about this properly in the Linux drivers. The
ARMv8 ARM sounds correct here.
I/O space may have the same issue, as it also requires non-posted
accesses.
Arnd
^ permalink raw reply
* ubi_io_read: error -74 (ECC error)
From: Boris Brezillon @ 2017-01-06 11:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <38f0cfac3dbe4ea89da84c7fbf667833@SGPMBX1023.APAC.bosch.com>
Hi Raghavan,
On Fri, 6 Jan 2017 10:07:29 +0000
"Anurag Raghavan (RBEI/ETW11)" <Raghavan.Anurag@in.bosch.com> wrote:
> Hi All,
>
> My appdata partition could not be mounted or where the partition was not able to be used. Anyone can help me to find out the root cause of this. What are the possibilities of this ubifs corruption. Any patched are available to fix this issue.
Can you please stop sending over and over the same message in the hope
that someone will magically solve the problem for you. Pinging
maintainers is accepted but not 3 times in 2 days.
>
> I am using the kernel version-30.3.5
It's not even a valid kernel version (probably a kerne, and we'll need a
lot more than the 10 lines of log you provided to help you debug your
driver, like the boot logs, a reference to the kernel sources you're
using, after how much time this problem occurred...
> Any kernel patches are available to solve this issue...??
What's your NAND controller? It seems related to a NAND driver issue.
Regards,
Boris
>
> Error logs:
>
> [ 1.797141] UBI error: ubi_io_read: error -74 (ECC error) while reading 253952 bytes from PEB 445:8192, read 253952 bytes
> [ 1.808274] UBIFS error (pid 491): ubifs_scan: corrupt empty space at LEB 489:233760
> [ 1.816037] UBIFS error (pid 491): ubifs_scanned_corruption: corruption at LEB 489:233760
> [ 1.828660] UBIFS error (pid 491): ubifs_scan: LEB 489 scanning failed
> [ 1.835215] UBIFS warning (pid 491): ubifs_ro_mode: switched to read-only mode, error -117
> [ 1.843502] UBIFS error (pid 491): make_reservation: cannot reserve 58 bytes in jhead 2, error -117
> [ 1.852569] UBIFS error (pid 491): do_writepage: cannot write page 0 of inode 76584, error -117
> dpkg: error: unable to sync new file '/var/lib/dpkg/arch-new': Structure needs cleaning
>
> Best regards
>
> Raghavan Anurag
> RBEI/ETW1
>
> Tel. +91(422)667-4001 | Mobil 9986968950
>
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply
* [PATCH v3] i2c: designware: add reset interface
From: Arnd Bergmann @ 2017-01-06 11:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483544119.9552.223.camel@linux.intel.com>
On Wednesday, January 4, 2017 5:35:19 PM CET Andy Shevchenko wrote:
> > > @@ -270,10 +280,18 @@ static int dw_i2c_plat_probe(struct
> > > platform_device *pdev)
> > > }
> > >
> > > r = i2c_dw_probe(dev);
> > > - if (r && !dev->pm_runtime_disabled)
> > > - pm_runtime_disable(&pdev->dev);
> > > + if (r)
> > > + goto exit_probe;
> > >
> > > return r;
> > > +
> > > +exit_probe:
> > > + if (!dev->pm_runtime_disabled)
> > > + pm_runtime_disable(&pdev->dev);
> > > +exit_reset:
> > > + if (!IS_ERR_OR_NULL(dev->rst))
> > > + reset_control_assert(dev->rst);
> > > + return r;
> > >
> >
> > try to avoid the IS_ERR_OR_NULL() check, it usually indicates either
> > a bad interface, or that the interface is used wrong.
>
> Please, fix reset framework first than.
>
> For my understanding:
> It should return NULL for optional reset control.
> It should not fail on NULL argument.
I think we discussed that a few times. Your suggestion makes sense
to me, but I don't know why we don't already do that, maybe there
is a good reason.
Arnd
^ permalink raw reply
* [PATCH v4 0/5]
From: Andi Shyti @ 2017-01-06 11:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CGME20170106114119epcas5p2c29ea8c8118db4a1fb600970ea0dafd4@epcas5p2.samsung.com>
Hi,
I'll send this patch on behalf of Jaechul Lee
<jcsing.lee@samsung.com> becasue it's I don't want to block
anyone who wants to make changes to the exynos5433-tm2*dts*
files.
This patches are based on Krzysztof's branch for-next [1]
"This patchset adds support for the tm2 touchkey device.
The driver has been ported from Tizen Kernel,
originally written
by Beomho. I ported it to the latest mainline Kernel."
Thanks,
Andi
[1] https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=for-next
Changes in v4:
- patch 1 has been rebased on top of 7c294e002641 (arm64: dts:
exynos: Remove unsupported regulator-always-off property from
TM2E)
- patch 2 has been generated with -B50% diff option using git
2.11
Changes in v3:
- Changed the commit ordering, the tm2-touchkey related patches
are the last 3.
- Added Chanwoo's patch which fixes the wrong voltage of ldo23
and ldo25.
- Andi (patch 3) moves the ldo31 and ldo38 in the tm2 and tm2e
files as they have different values.
Changes in v2:
- fixed reviews from Javier, Dmitry
- refactored power enable/disable functions.
- reordered signed-offs in patch 2, while patch 4 is left as it
was as Andi copy pasted the node to the new tm2.dts file
- added Jarvier's (patch 1,2,4) and Krzysztof's (patch 4)
reviews
and Rob's Ack
- patch 3 diff has been generated with -B50%
Andi Shyti (1):
arm64: dts: exynos: make tm2 and tm2e independent from each other
Chanwoo Choi (1):
arm64: dts: exynos5433: TM2/E: Fix wrong information of ldo23 and
ldo25
Jaechul Lee (3):
input: Add support for the tm2 touchkey device driver
input: tm2-touchkey: Add touchkey driver support for TM2
arm64: dts: exynos: Add tm2 touchkey node
.../bindings/input/samsung,tm2-touchkey.txt | 27 +
...ynos5433-tm2.dts => exynos5433-tm2-common.dtsi} | 31 +-
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 1165 +-------------------
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 31 +-
drivers/input/keyboard/Kconfig | 11 +
drivers/input/keyboard/Makefile | 1 +
drivers/input/keyboard/tm2-touchkey.c | 280 +++++
7 files changed, 392 insertions(+), 1154 deletions(-)
create mode 100644 Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt
copy arch/arm64/boot/dts/exynos/{exynos5433-tm2.dts => exynos5433-tm2-common.dtsi} (97%)
rewrite arch/arm64/boot/dts/exynos/exynos5433-tm2.dts (98%)
create mode 100644 drivers/input/keyboard/tm2-touchkey.c
--
2.11.0
^ permalink raw reply
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