* [PATCH v6 08/18] iommu/vt-d: Implement reserved region get/put callbacks
From: Auger Eric @ 2017-01-06 11:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106110131.GM17255@8bytes.org>
Hi Joerg,
On 06/01/2017 12:01, Joerg Roedel wrote:
> On Thu, Jan 05, 2017 at 07:04:36PM +0000, Eric Auger wrote:
>> +static void intel_iommu_get_resv_regions(struct device *device,
>> + struct list_head *head)
>> +{
>> + struct iommu_resv_region *reg;
>> +
>> + reg = iommu_alloc_resv_region(IOAPIC_RANGE_START,
>> + IOAPIC_RANGE_END - IOAPIC_RANGE_START + 1,
>> + 0, IOMMU_RESV_NOMAP);
>> + if (!reg)
>> + return;
>> + list_add_tail(®->list, head);
>> +}
>
> That is different from what AMD does, can you also report the RMRR
> regions for the device here (as direct-map regions)?
if I return RMRR regions as direct mapped regions,
iommu_group_create_direct_mappings will perform the 1-1 mapping.
I am not familiar with the intel-iommu code but I guess this job
currently is done in the intel driver:
iommu_prepare_rmrr_dev -> iommu_prepare_identity_map
->domain_prepare_identity_map -> iommu_domain_identity_map?
What is your feeling?
Thanks
Eric
>
>
>
> Joerg
>
^ permalink raw reply
* [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced
From: Arnd Bergmann @ 2017-01-06 11:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACVXFVNS9n9_ty8y3CyqfRaLitqDKdk1mMOrQHM-enOgJtUBeQ@mail.gmail.com>
On Thursday, December 22, 2016 4:15:57 PM CET Ming Lei wrote:
> ERROR: "inb" [drivers/watchdog/wdt_pci.ko] undefined!
> ERROR: "outb" [drivers/watchdog/wdt_pci.ko] undefined!
> ERROR: "outb" [drivers/watchdog/pcwd_pci.ko] undefined!
> ERROR: "inb" [drivers/watchdog/pcwd_pci.ko] undefined!
> ERROR: "outw" [drivers/video/vgastate.ko] undefined!
> ERROR: "outb" [drivers/video/vgastate.ko] undefined!
> ERROR: "inb" [drivers/video/vgastate.ko] undefined!
> ERROR: "outw" [drivers/video/fbdev/vt8623fb.ko] undefined!
> ERROR: "inb" [drivers/video/fbdev/vt8623fb.ko] undefined!
> ERROR: "outb" [drivers/video/fbdev/vt8623fb.ko] undefined!
> ERROR: "outw" [drivers/video/fbdev/tridentfb.ko] undefined!
> ERROR: "inb" [drivers/video/fbdev/tridentfb.ko] undefined!
> ERROR: "outb" [drivers/video/fbdev/tridentfb.ko] undefined!
> ERROR: "inb" [drivers/video/fbdev/tdfxfb.ko] undefined!
>
In case you haven't figured it out by now, the new code is simply
missing a few "EXPORT_SYMBOL" lines.
Arnd
^ permalink raw reply
* [QUESTION] Early Write Acknowledge for PCIe configuration space
From: Will Deacon @ 2017-01-06 11:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6092525.UgRCY3dpzP@wuerfel>
On Fri, Jan 06, 2017 at 12:24:25PM +0100, Arnd Bergmann wrote:
> On Friday, January 6, 2017 11:15:22 AM CET John Garry wrote:
> > [apologies if this has been queried before]
> >
> > Hi ARM guys,
> >
> > I have a question about the device memory attributes we assign for PCIe
> > config space for arm64. Currently we use ioremap to map in the config
> > space; this uses nGnRE, which means we enable Early Write Acknowledge.
> >
> > The ARMv8 ARM states that "ARM recommend that No Early Write Acknowledge
> > Hint is used for PCIe configuration writes".
> >
> > I understand a problem with using E is in that configuration write is a
> > non-post operation, which means the RP requires to get the completion
> > ack from the EP The problem here is if CPU writes data to ECAM by E,
> > complete will go back to CPU directly, and maybe at this point the write
> > has not reached the EP.
> >
> > I believe that this may cause ordering issues in PCI read/write. In
> > practice we use non-relaxed readl/writel to access config space, which
> > include the synchronization barriers, which, *as I understand*, even if
> > for full system domain, may be negated by the E attribute for PCIe.
>
> I don't think the barriers in readl/writel are enough here, in particular
> the write barrier is *before* the access to synchronize DMAs
> on RAM with MMIO accesses, which is a bit different from what you
> have here.
>
> > So a question: why is the recommendation in the ARMv8 ARM ignored?
>
> Probably nobody thought about this properly in the Linux drivers. The
> ARMv8 ARM sounds correct here.
The ARMv8 ARM also says that the E attribute is a hint, so there's no
guarantee that it's actually honoured by the implementation. However,
now that it explicitly mentions PCI config space, the intention is clearly
that nE *is* honoured for systems using PCIe, so I agree that we should make
this change. I don't want to use the nE type for all ioremap invocations,
though.
Will
^ permalink raw reply
* [PATCH net-next v4 0/4] Fix OdroidC2 Gigabit Tx link issue
From: Russell King - ARM Linux @ 2017-01-06 11:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483697496.28003.40.camel@baylibre.com>
On Fri, Jan 06, 2017 at 11:11:36AM +0100, Jerome Brunet wrote:
> The purpose of this patch is to provide a way to mark as broken a
> particular eee mode. At first, it had nothing to do with "set_eee" but,
> as Florian rightly pointed out, users shouldn't be able to re-enable a
> broken mode.
I think something else has been missed - I don't see much point to
telling userspace that (eg) 1000baseT EEE is supported and then
ignore attempts to advertise it.
If it's broken, then arguably the hardware doesn't support the mode,
so we should really be masking those bits from the EEE supported mask
as well.
> I wonder if we should return an error though. With the current
> implementation, user space application could simply ask to activate
> everything, excepting the kernel to sort it out and return an error
> only if something horribly wrong happened. If we start returning an
> error for unsupported modes, we could break things. I guess we should
> just silently filter the requested modes.
The ethtool behaviour for advertisments is that errors are not returned
unless the attempted advert is really wrong.
So, for example, when setting an advertisment for link modes, we accept
the user's supplied mask, and bitwise AND it with the supported mask,
so unsupported link modes are cleared. Only if the result is an empty
mask do we then return an error to userspace.
It's similar for forcing the link parameters - phylib attempts to find
the best phy setting mode which fuzzily matches the users request, but
doesn't error out if we can't do exactly what the user requested.
In the EEE case, an empty mask is acceptable (it means "EEE is supported
in no link modes") so it isn't appropriate to return errors there.
> > - maybe the problem here is that the PCS doesn't support support
> > EEE in 1000baseT mode?
>
>
> It does, and that's kind of the problem. EEE in ON for 100Tx and 1000T
> by default with this PHY. I have several platform with the same MAC-PHY
> combination. Only the OdroidC2 shows this particular issue with 1000T-
> EEE
>
> As explained in other mails in this thread. The problem does not come
> from the MAC entering LPI. It actually comes from the link partner
> entering LPI on the Rx path under significant Tx transfer. For some
> reason, this completely mess up our PHY.
For a 1000baseT link to enter low power, both ends have to enter LPI
(see 802.3 78.1.3.3.1) - the Tx and Rx paths can't independently enter
LPI.
So, if you have a busy Tx link, the link itself can't be entering LPI.
Your link partner may be sending a request to enter LPI due to its own
Tx path being idle, which should then be forwarded to your MAC.
It's pretty hard to see what could be messed up with that - I'd have
expected the problems to occur when both ends were idle and the link
had entered low power mode.
> > On the SolidRun boards, they're using AR8035, and have suffered this
> > occasional link drop problem.??What has been found is that it seems
> > to
> > be to do with the timing parameters, and it seemed to only be 1000bT
> > that was affected.??I don't remember off hand exactly which or what
> > the change was they made to stabilise it though, but I can probabily
> > find out tomorrow.
> >
>
> Since the same combination of MAC-PHY works well on other designs, it
> is also my feeling that is has something to do with some timing
> parameter, maybe related to this particular PCB.
Maybe a different PHY interface? Meson seems to use RGMII, maybe
others use SGMII - but then I'd expect 100base-Tx to also be broken.
So not really sure.
I was talking to Florian about that last night, because the mis-named
phy_init_eee() tests for various phy interface modes before proceeding,
which seems to be fairly rubbish as the list of interface modes is
gradually increasing since it was introduced (and I need to add SGMII
to it.) The conclusion I've come to there is that the test should
never have been part of phylib, because if there are restrictions on
which phy interface modes are allowable for EEE, they're likely to be
either PHY or MAC specific.
The other problem that having the test there causes is that if the
existing users can't handle EEE over SGMII, then when I add SGMII to
support my hardware, they end up breaking - far from desirable.
There's no information on why the test is there, or even which PHYs
or MACs it's applicable to, which makes this unnecessarily more
difficult to now resolve.
My feeling is that the integration of EEE into phylib is fairly poor
at the moment, and we need to be a lot smarter about it.
BTW, one of the problems (not caused by your patch) is that changing
the EEE advertisment does not (on all PHY drivers) cause the link to
be renegotiated - there's no call to phy_start_aneg() when the advert
changes, and even if there was, there's no guarantee that
phy_start_aneg() will even set the AN restart bit in the control
register.
However, given that you're hooking into the set_eee function, I'm not
sure why you placed your EEE advertisment thing into config_aneg() -
isn't it more an initialisation thing (so should be in config_init()?)
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
^ permalink raw reply
* [PATCH v4 5/5] arm64: dts: exynos: Add tm2 touchkey node
From: Andi Shyti @ 2017-01-06 11:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106114114.19321-1-andi.shyti@samsung.com>
From: Jaechul Lee <jcsing.lee@samsung.com>
Add DT node support for TM2 touchkey device.
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index d30b45a9c0d4..15bdc2e9f2a3 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -18,6 +18,19 @@
compatible = "samsung,tm2e", "samsung,exynos5433";
};
+&hsi2c_9 {
+ status = "okay";
+
+ touchkey at 20 {
+ compatible = "samsung,tm2-touchkey";
+ reg = <0x20>;
+ interrupt-parent = <&gpa3>;
+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+ vcc-supply = <&ldo32_reg>;
+ vdd-supply = <&ldo33_reg>;
+ };
+};
+
®ulators {
ldo31_reg: LDO31 {
regulator-name = "TSP_VDD_1.85V_AP";
--
2.11.0
^ permalink raw reply related
* [PATCH v4 4/5] input: tm2-touchkey: Add touchkey driver support for TM2
From: Andi Shyti @ 2017-01-06 11:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106114114.19321-1-andi.shyti@samsung.com>
From: Jaechul Lee <jcsing.lee@samsung.com>
This patch adds support for the TM2 touch key and led
functionality.
The driver interfaces with userspace through an input device and
reports KEY_PHONE and KEY_BACK event types. LED brightness can be
controlled by "/sys/class/leds/tm2-touchkey/brightness".
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
drivers/input/keyboard/Kconfig | 11 ++
drivers/input/keyboard/Makefile | 1 +
drivers/input/keyboard/tm2-touchkey.c | 280 ++++++++++++++++++++++++++++++++++
3 files changed, 292 insertions(+)
create mode 100644 drivers/input/keyboard/tm2-touchkey.c
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index cbd75cf44739..e6e98585b4b0 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -666,6 +666,17 @@ config KEYBOARD_TC3589X
To compile this driver as a module, choose M here: the
module will be called tc3589x-keypad.
+config KEYBOARD_TM2_TOUCHKEY
+ tristate "tm2-touchkey support"
+ depends on I2C
+ depends on LEDS_CLASS
+ help
+ Say Y here to enable device driver for tm2-touchkey with
+ LED control for the Exynos5433 TM2 board.
+
+ To compile this driver as a module, choose M here.
+ module will be called tm2-touchkey.
+
config KEYBOARD_TWL4030
tristate "TI TWL4030/TWL5030/TPS659x0 keypad support"
depends on TWL4030_CORE
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index d9f4cfcf3410..7d9acff819a7 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_KEYBOARD_SUN4I_LRADC) += sun4i-lradc-keys.o
obj-$(CONFIG_KEYBOARD_SUNKBD) += sunkbd.o
obj-$(CONFIG_KEYBOARD_TC3589X) += tc3589x-keypad.o
obj-$(CONFIG_KEYBOARD_TEGRA) += tegra-kbc.o
+obj-$(CONFIG_KEYBOARD_TM2_TOUCHKEY) += tm2-touchkey.o
obj-$(CONFIG_KEYBOARD_TWL4030) += twl4030_keypad.o
obj-$(CONFIG_KEYBOARD_XTKBD) += xtkbd.o
obj-$(CONFIG_KEYBOARD_W90P910) += w90p910_keypad.o
diff --git a/drivers/input/keyboard/tm2-touchkey.c b/drivers/input/keyboard/tm2-touchkey.c
new file mode 100644
index 000000000000..92eacb62f8e7
--- /dev/null
+++ b/drivers/input/keyboard/tm2-touchkey.c
@@ -0,0 +1,280 @@
+/*
+ * TM2 touchkey device driver
+ *
+ * Copyright 2005 Phil Blundell
+ * Copyright 2016 Samsung Electronics Co., Ltd.
+ *
+ * Author: Beomho Seo <beomho.seo@samsung.com>
+ * Author: Jaechul Lee <jcsing.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/pm.h>
+#include <linux/regulator/consumer.h>
+
+#define TM2_TOUCHKEY_DEV_NAME "tm2-touchkey"
+#define TM2_TOUCHKEY_KEYCODE_REG 0x03
+#define TM2_TOUCHKEY_BASE_REG 0x00
+#define TM2_TOUCHKEY_CMD_LED_ON 0x10
+#define TM2_TOUCHKEY_CMD_LED_OFF 0x20
+#define TM2_TOUCHKEY_BIT_PRESS_EV BIT(3)
+#define TM2_TOUCHKEY_BIT_KEYCODE GENMASK(2, 0)
+#define TM2_TOUCHKEY_LED_VOLTAGE_MIN 2500000
+#define TM2_TOUCHKEY_LED_VOLTAGE_MAX 3300000
+
+enum {
+ TM2_TOUCHKEY_KEY_MENU = 0x1,
+ TM2_TOUCHKEY_KEY_BACK,
+};
+
+struct tm2_touchkey_data {
+ struct i2c_client *client;
+ struct input_dev *input_dev;
+ struct led_classdev led_dev;
+ struct regulator_bulk_data regulators[2];
+
+ u8 keycode_type;
+ u8 pressed;
+};
+
+static void tm2_touchkey_led_brightness_set(struct led_classdev *led_dev,
+ enum led_brightness brightness)
+{
+ struct tm2_touchkey_data *touchkey =
+ container_of(led_dev, struct tm2_touchkey_data, led_dev);
+ u32 volt;
+ u8 data;
+
+ if (brightness == LED_OFF) {
+ volt = TM2_TOUCHKEY_LED_VOLTAGE_MIN;
+ data = TM2_TOUCHKEY_CMD_LED_OFF;
+ } else {
+ volt = TM2_TOUCHKEY_LED_VOLTAGE_MAX;
+ data = TM2_TOUCHKEY_CMD_LED_ON;
+ }
+
+ regulator_set_voltage(touchkey->regulators[1].consumer, volt, volt);
+ i2c_smbus_write_byte_data(touchkey->client,
+ TM2_TOUCHKEY_BASE_REG, data);
+}
+
+static int tm2_touchkey_power_enable(struct tm2_touchkey_data *touchkey)
+{
+ int ret = 0;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(touchkey->regulators),
+ touchkey->regulators);
+ if (ret)
+ return ret;
+
+ /* waiting for device initialization, at least 150ms */
+ msleep(150);
+
+ return 0;
+}
+
+static void tm2_touchkey_power_disable(void *data)
+{
+ struct tm2_touchkey_data *touchkey = data;
+
+ regulator_bulk_disable(ARRAY_SIZE(touchkey->regulators),
+ touchkey->regulators);
+}
+
+static irqreturn_t tm2_touchkey_irq_handler(int irq, void *devid)
+{
+ struct tm2_touchkey_data *touchkey = devid;
+ u32 data;
+
+ data = i2c_smbus_read_byte_data(touchkey->client,
+ TM2_TOUCHKEY_KEYCODE_REG);
+
+ if (data < 0) {
+ dev_err(&touchkey->client->dev, "Failed to read i2c data\n");
+ return IRQ_HANDLED;
+ }
+
+ touchkey->keycode_type = data & TM2_TOUCHKEY_BIT_KEYCODE;
+ touchkey->pressed = !(data & TM2_TOUCHKEY_BIT_PRESS_EV);
+
+ if (touchkey->keycode_type != TM2_TOUCHKEY_KEY_MENU &&
+ touchkey->keycode_type != TM2_TOUCHKEY_KEY_BACK) {
+ dev_warn(&touchkey->client->dev, "Skip unhandled keycode(%d)\n",
+ touchkey->keycode_type);
+ return IRQ_HANDLED;
+ }
+
+ if (!touchkey->pressed) {
+ input_report_key(touchkey->input_dev, KEY_PHONE, 0);
+ input_report_key(touchkey->input_dev, KEY_BACK, 0);
+ } else {
+ if (touchkey->keycode_type == TM2_TOUCHKEY_KEY_MENU)
+ input_report_key(touchkey->input_dev,
+ KEY_PHONE, 1);
+ else
+ input_report_key(touchkey->input_dev,
+ KEY_BACK, 1);
+ }
+ input_sync(touchkey->input_dev);
+
+ return IRQ_HANDLED;
+}
+
+static int tm2_touchkey_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct tm2_touchkey_data *touchkey;
+ int ret;
+
+ ret = i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_BYTE |
+ I2C_FUNC_SMBUS_BYTE_DATA);
+ if (!ret) {
+ dev_err(&client->dev, "No I2C functionality found\n");
+ return -ENODEV;
+ }
+
+ touchkey = devm_kzalloc(&client->dev, sizeof(*touchkey), GFP_KERNEL);
+ if (!touchkey)
+ return -ENOMEM;
+
+ touchkey->client = client;
+ i2c_set_clientdata(client, touchkey);
+
+ /* regulators */
+ touchkey->regulators[0].supply = "vcc";
+ touchkey->regulators[1].supply = "vdd";
+ ret = devm_regulator_bulk_get(&client->dev,
+ ARRAY_SIZE(touchkey->regulators),
+ touchkey->regulators);
+ if (ret) {
+ dev_err(&client->dev, "Failed to get regulators\n");
+ return ret;
+ }
+
+ /* power */
+ ret = tm2_touchkey_power_enable(touchkey);
+ if (ret) {
+ dev_err(&client->dev, "Failed to enable power\n");
+ return ret;
+ }
+
+ ret = devm_add_action_or_reset(&client->dev,
+ tm2_touchkey_power_disable, touchkey);
+ if (ret)
+ return ret;
+
+ /* input device */
+ touchkey->input_dev = devm_input_allocate_device(&client->dev);
+ if (!touchkey->input_dev) {
+ dev_err(&client->dev, "Failed to alloc input device\n");
+ return -ENOMEM;
+ }
+ touchkey->input_dev->name = TM2_TOUCHKEY_DEV_NAME;
+ touchkey->input_dev->id.bustype = BUS_I2C;
+
+ set_bit(EV_KEY, touchkey->input_dev->evbit);
+ input_set_capability(touchkey->input_dev, EV_KEY, KEY_PHONE);
+ input_set_capability(touchkey->input_dev, EV_KEY, KEY_BACK);
+
+ input_set_drvdata(touchkey->input_dev, touchkey);
+
+ ret = input_register_device(touchkey->input_dev);
+ if (ret) {
+ dev_err(&client->dev, "Failed to register input device\n");
+ return ret;
+ }
+
+ /* irq */
+ ret = devm_request_threaded_irq(&client->dev,
+ client->irq, NULL,
+ tm2_touchkey_irq_handler,
+ IRQF_ONESHOT, TM2_TOUCHKEY_DEV_NAME,
+ touchkey);
+ if (ret) {
+ dev_err(&client->dev, "Failed to request threaded irq\n");
+ return ret;
+ }
+
+ /* led device */
+ touchkey->led_dev.name = TM2_TOUCHKEY_DEV_NAME;
+ touchkey->led_dev.brightness = LED_FULL;
+ touchkey->led_dev.max_brightness = LED_FULL;
+ touchkey->led_dev.brightness_set = tm2_touchkey_led_brightness_set;
+
+ ret = devm_led_classdev_register(&client->dev, &touchkey->led_dev);
+ if (ret < 0) {
+ dev_err(&client->dev, "Failed to register touchkey led\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int __maybe_unused tm2_touchkey_suspend(struct device *dev)
+{
+ struct tm2_touchkey_data *touchkey = dev_get_drvdata(dev);
+
+ disable_irq(touchkey->client->irq);
+ tm2_touchkey_power_disable(touchkey);
+
+ return 0;
+}
+
+static int __maybe_unused tm2_touchkey_resume(struct device *dev)
+{
+ struct tm2_touchkey_data *touchkey = dev_get_drvdata(dev);
+ int ret;
+
+ enable_irq(touchkey->client->irq);
+ ret = tm2_touchkey_power_enable(touchkey);
+ if (ret)
+ dev_err(dev, "Failed to enable power\n");
+
+ return ret;
+}
+
+static SIMPLE_DEV_PM_OPS(tm2_touchkey_pm_ops, tm2_touchkey_suspend,
+ tm2_touchkey_resume);
+
+static const struct i2c_device_id tm2_touchkey_id_table[] = {
+ {TM2_TOUCHKEY_DEV_NAME, 0},
+ {},
+};
+MODULE_DEVICE_TABLE(i2c, tm2_touchkey_id_table);
+
+static const struct of_device_id tm2_touchkey_of_match[] = {
+ {.compatible = "samsung,tm2-touchkey",},
+ {},
+};
+MODULE_DEVICE_TABLE(of, tm2_touchkey_of_match);
+
+static struct i2c_driver tm2_touchkey_driver = {
+ .driver = {
+ .name = TM2_TOUCHKEY_DEV_NAME,
+ .pm = &tm2_touchkey_pm_ops,
+ .of_match_table = of_match_ptr(tm2_touchkey_of_match),
+ },
+ .probe = tm2_touchkey_probe,
+ .id_table = tm2_touchkey_id_table,
+};
+
+module_i2c_driver(tm2_touchkey_driver);
+
+MODULE_AUTHOR("Beomho Seo <beomho.seo@samsung.com>");
+MODULE_AUTHOR("Jaechul Lee <jcsing.lee@samsung.com>");
+MODULE_DESCRIPTION("Samsung touchkey driver");
+MODULE_LICENSE("GPL v2");
--
2.11.0
^ permalink raw reply related
* [PATCH v4 3/5] input: Add support for the tm2 touchkey device driver
From: Andi Shyti @ 2017-01-06 11:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106114114.19321-1-andi.shyti@samsung.com>
From: Jaechul Lee <jcsing.lee@samsung.com>
This patch adds the binding description of the tm2 touchkey
device driver.
Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
.../bindings/input/samsung,tm2-touchkey.txt | 27 ++++++++++++++++++++++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt
diff --git a/Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt b/Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt
new file mode 100644
index 000000000000..4de1af0f0a37
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt
@@ -0,0 +1,27 @@
+Samsung tm2-touchkey
+
+Required properties:
+- compatible: must be "samsung,tm2-touchkey"
+- reg: I2C address of the chip.
+- interrupt-parent: a phandle for the interrupt controller (see interrupt
+ binding[0]).
+- interrupts: interrupt to which the chip is connected (see interrupt
+ binding[0]).
+- vcc-supply : internal regulator output. 1.8V
+- vdd-supply : power supply for IC 3.3V
+
+[0]: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
+
+Example:
+ &i2c0 {
+ /* ... */
+
+ touchkey at 20 {
+ compatible = "samsung,tm2-touchkey";
+ reg = <0x20>;
+ interrupt-parent = <&gpa3>;
+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+ vcc-supply=<&ldo32_reg>;
+ vdd-supply=<&ldo33_reg>;
+ };
+ };
--
2.11.0
^ permalink raw reply related
* [PATCH v4 2/5] arm64: dts: exynos: make tm2 and tm2e independent from each other
From: Andi Shyti @ 2017-01-06 11:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106114114.19321-1-andi.shyti@samsung.com>
Currently tm2e dts includes tm2 but there are some differences
between the two boards and tm2 has some properties that tm2e
doesn't have.
That's why it's important to keep the two dts files independent
and put all the commonalities in a tm2-common.dtsi file.
At the current status the only two differences between the two
dts files (besides the board name) are ldo31 and ldo38.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
...ynos5433-tm2.dts => exynos5433-tm2-common.dtsi} | 24 +-
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 1153 +-------------------
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 22 +-
3 files changed, 56 insertions(+), 1143 deletions(-)
copy arch/arm64/boot/dts/exynos/{exynos5433-tm2.dts => exynos5433-tm2-common.dtsi} (98%)
rewrite arch/arm64/boot/dts/exynos/exynos5433-tm2.dts (98%)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
similarity index 98%
copy from arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
copy to arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
index e8971f4a5977..c43f9a38adf6 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
@@ -3,8 +3,8 @@
*
* Copyright (c) 2016 Samsung Electronics Co., Ltd.
*
- * Device tree source file for Samsung's TM2 board which is based on
- * Samsung Exynos5433 SoC.
+ * Common device tree source file for Samsung's TM2 and TM2E boards
+ * which are based on Samsung Exynos5433 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -322,7 +322,7 @@
"s2mps13_bt";
};
- regulators {
+ regulators: regulators {
ldo1_reg: LDO1 {
regulator-name = "VDD_ALIVE_0.9V_AP";
regulator-min-microvolt = <900000>;
@@ -552,11 +552,10 @@
regulator-max-microvolt = <3300000>;
};
- ldo31_reg: LDO31 {
- regulator-name = "TSP_VDD_1.85V_AP";
- regulator-min-microvolt = <1850000>;
- regulator-max-microvolt = <1850000>;
- };
+ /*
+ * LDO31 differs from target to target,
+ * its definition is in the .dts
+ */
ldo32_reg: LDO32 {
regulator-name = "VTOUCH_1.8V_AP";
@@ -595,11 +594,10 @@
regulator-max-microvolt = <1800000>;
};
- ldo38_reg: LDO38 {
- regulator-name = "VCC_3.0V_MOTOR_AP";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
+ /*
+ * LDO38 differs from target to target,
+ * its definition is in the .dts
+ */
ldo39_reg: LDO39 {
regulator-name = "V_HRM_1.8V";
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
dissimilarity index 98%
index e8971f4a5977..d30b45a9c0d4 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -1,1120 +1,33 @@
-/*
- * SAMSUNG Exynos5433 TM2 board device tree source
- *
- * Copyright (c) 2016 Samsung Electronics Co., Ltd.
- *
- * Device tree source file for Samsung's TM2 board which is based on
- * Samsung Exynos5433 SoC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/dts-v1/;
-#include "exynos5433.dtsi"
-#include <dt-bindings/clock/samsung,s2mps11.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/ {
- model = "Samsung TM2 board";
- compatible = "samsung,tm2", "samsung,exynos5433";
-
- aliases {
- gsc0 = &gsc_0;
- gsc1 = &gsc_1;
- gsc2 = &gsc_2;
- pinctrl0 = &pinctrl_alive;
- pinctrl1 = &pinctrl_aud;
- pinctrl2 = &pinctrl_cpif;
- pinctrl3 = &pinctrl_ese;
- pinctrl4 = &pinctrl_finger;
- pinctrl5 = &pinctrl_fsys;
- pinctrl6 = &pinctrl_imem;
- pinctrl7 = &pinctrl_nfc;
- pinctrl8 = &pinctrl_peric;
- pinctrl9 = &pinctrl_touch;
- serial0 = &serial_0;
- serial1 = &serial_1;
- serial2 = &serial_2;
- serial3 = &serial_3;
- spi0 = &spi_0;
- spi1 = &spi_1;
- spi2 = &spi_2;
- spi3 = &spi_3;
- spi4 = &spi_4;
- mshc0 = &mshc_0;
- mshc2 = &mshc_2;
- };
-
- chosen {
- stdout-path = &serial_1;
- };
-
- memory at 20000000 {
- device_type = "memory";
- reg = <0x0 0x20000000 0x0 0xc0000000>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- power-key {
- gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_POWER>;
- label = "power key";
- debounce-interval = <10>;
- };
-
- volume-up-key {
- gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
- label = "volume-up key";
- debounce-interval = <10>;
- };
-
- volume-down-key {
- gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
- label = "volume-down key";
- debounce-interval = <10>;
- };
-
- homepage-key {
- gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_MENU>;
- label = "homepage key";
- debounce-interval = <10>;
- };
- };
-
- i2c_max98504: i2c-gpio-0 {
- compatible = "i2c-gpio";
- gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
- &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
- i2c-gpio,delay-us = <2>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- max98504: max98504 at 31 {
- compatible = "maxim,max98504";
- reg = <0x31>;
- maxim,rx-path = <1>;
- maxim,tx-path = <1>;
- maxim,tx-channel-mask = <3>;
- maxim,tx-channel-source = <2>;
- };
- };
-
- sound {
- compatible = "samsung,tm2-audio";
- audio-codec = <&wm5110>;
- i2s-controller = <&i2s0>;
- audio-amplifier = <&max98504>;
- mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
- model = "wm5110";
- samsung,audio-routing =
- /* Headphone */
- "HP", "HPOUT1L",
- "HP", "HPOUT1R",
-
- /* Speaker */
- "SPK", "SPKOUT",
- "SPKOUT", "HPOUT2L",
- "SPKOUT", "HPOUT2R",
-
- /* Receiver */
- "RCV", "HPOUT3L",
- "RCV", "HPOUT3R";
- status = "okay";
- };
-};
-
-&adc {
- vdd-supply = <&ldo3_reg>;
- status = "okay";
-
- thermistor-ap {
- compatible = "murata,ncp03wf104";
- pullup-uv = <1800000>;
- pullup-ohm = <100000>;
- pulldown-ohm = <0>;
- io-channels = <&adc 0>;
- };
-
- thermistor-battery {
- compatible = "murata,ncp03wf104";
- pullup-uv = <1800000>;
- pullup-ohm = <100000>;
- pulldown-ohm = <0>;
- io-channels = <&adc 1>;
- #thermal-sensor-cells = <0>;
- };
-
- thermistor-charger {
- compatible = "murata,ncp03wf104";
- pullup-uv = <1800000>;
- pullup-ohm = <100000>;
- pulldown-ohm = <0>;
- io-channels = <&adc 2>;
- };
-};
-
-&bus_g2d_400 {
- devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
- vdd-supply = <&buck4_reg>;
- exynos,saturation-ratio = <10>;
- status = "okay";
-};
-
-&bus_g2d_266 {
- devfreq = <&bus_g2d_400>;
- status = "okay";
-};
-
-&bus_gscl {
- devfreq = <&bus_g2d_400>;
- status = "okay";
-};
-
-&bus_hevc {
- devfreq = <&bus_g2d_400>;
- status = "okay";
-};
-
-&bus_jpeg {
- devfreq = <&bus_g2d_400>;
- status = "okay";
-};
-
-&bus_mfc {
- devfreq = <&bus_g2d_400>;
- status = "okay";
-};
-
-&bus_mscl {
- devfreq = <&bus_g2d_400>;
- status = "okay";
-};
-
-&bus_noc0 {
- devfreq = <&bus_g2d_400>;
- status = "okay";
-};
-
-&bus_noc1 {
- devfreq = <&bus_g2d_400>;
- status = "okay";
-};
-
-&bus_noc2 {
- devfreq = <&bus_g2d_400>;
- status = "okay";
-};
-
-&cmu_aud {
- assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
- assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
-};
-
-&cmu_fsys {
- assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
- <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
- <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
- <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
- <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
- <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
- <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
- <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
- <&cmu_top CLK_DIV_SCLK_USBDRD30>,
- <&cmu_top CLK_DIV_SCLK_USBHOST30>;
- assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
- <&cmu_top CLK_MOUT_BUS_PLL_USER>,
- <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
- <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
- <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
- <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
- <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
- <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
- assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
- <66700000>, <66700000>;
-};
-
-&cmu_gscl {
- assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
- <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
- assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
- <&cmu_top CLK_ACLK_GSCL_333>;
-};
-
-&cmu_mfc {
- assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
- assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
-};
-
-&cmu_mscl {
- assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
- <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
- <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
- <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
- assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
- <&cmu_top CLK_SCLK_JPEG_MSCL>,
- <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
- <&cmu_top CLK_MOUT_BUS_PLL_USER>;
-};
-
-&cpu0 {
- cpu-supply = <&buck3_reg>;
-};
-
-&cpu4 {
- cpu-supply = <&buck2_reg>;
-};
-
-&decon {
- status = "okay";
-
- i80-if-timings {
- };
-};
-
-&dsi {
- status = "okay";
- vddcore-supply = <&ldo6_reg>;
- vddio-supply = <&ldo7_reg>;
- samsung,pll-clock-frequency = <24000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&te_irq>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port at 1 {
- reg = <1>;
-
- dsi_out: endpoint {
- samsung,burst-clock-frequency = <512000000>;
- samsung,esc-clock-frequency = <16000000>;
- };
- };
- };
-};
-
-&hsi2c_0 {
- status = "okay";
- clock-frequency = <2500000>;
-
- s2mps13-pmic at 66 {
- compatible = "samsung,s2mps13-pmic";
- interrupt-parent = <&gpa0>;
- interrupts = <7 IRQ_TYPE_NONE>;
- reg = <0x66>;
- samsung,s2mps11-wrstbi-ground;
-
- s2mps13_osc: clocks {
- compatible = "samsung,s2mps13-clk";
- #clock-cells = <1>;
- clock-output-names = "s2mps13_ap", "s2mps13_cp",
- "s2mps13_bt";
- };
-
- regulators {
- ldo1_reg: LDO1 {
- regulator-name = "VDD_ALIVE_0.9V_AP";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-always-on;
- };
-
- ldo2_reg: LDO2 {
- regulator-name = "VDDQ_MMC2_2.8V_AP";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo3_reg: LDO3 {
- regulator-name = "VDD1_E_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- ldo4_reg: LDO4 {
- regulator-name = "VDD10_MIF_PLL_1.0V_AP";
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo5_reg: LDO5 {
- regulator-name = "VDD10_DPLL_1.0V_AP";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo6_reg: LDO6 {
- regulator-name = "VDD10_MIPI2L_1.0V_AP";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo7_reg: LDO7 {
- regulator-name = "VDD18_MIPI2L_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo8_reg: LDO8 {
- regulator-name = "VDD18_LLI_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo9_reg: LDO9 {
- regulator-name = "VDD18_ABB_ETC_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo10_reg: LDO10 {
- regulator-name = "VDD33_USB30_3.0V_AP";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo11_reg: LDO11 {
- regulator-name = "VDD_INT_M_1.0V_AP";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo12_reg: LDO12 {
- regulator-name = "VDD_KFC_M_1.1V_AP";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- };
-
- ldo13_reg: LDO13 {
- regulator-name = "VDD_G3D_M_0.95V_AP";
- regulator-min-microvolt = <950000>;
- regulator-max-microvolt = <950000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo14_reg: LDO14 {
- regulator-name = "VDDQ_M1_LDO_1.2V_AP";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo15_reg: LDO15 {
- regulator-name = "VDDQ_M2_LDO_1.2V_AP";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo16_reg: LDO16 {
- regulator-name = "VDDQ_EFUSE";
- regulator-min-microvolt = <1400000>;
- regulator-max-microvolt = <3400000>;
- regulator-always-on;
- };
-
- ldo17_reg: LDO17 {
- regulator-name = "V_TFLASH_2.8V_AP";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
-
- ldo18_reg: LDO18 {
- regulator-name = "V_CODEC_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo19_reg: LDO19 {
- regulator-name = "VDDA_1.8V_COMP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- ldo20_reg: LDO20 {
- regulator-name = "VCC_2.8V_AP";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- };
-
- ldo21_reg: LDO21 {
- regulator-name = "VT_CAM_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo22_reg: LDO22 {
- regulator-name = "CAM_IO_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo23_reg: LDO23 {
- regulator-name = "CAM_SEN_CORE_1.05V_AP";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- };
-
- ldo24_reg: LDO24 {
- regulator-name = "VT_CAM_1.2V";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
-
- ldo25_reg: LDO25 {
- regulator-name = "UNUSED_LDO25";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-off;
- };
-
- ldo26_reg: LDO26 {
- regulator-name = "CAM_AF_2.8V_AP";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
-
- ldo27_reg: LDO27 {
- regulator-name = "VCC_3.0V_LCD_AP";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- ldo28_reg: LDO28 {
- regulator-name = "VCC_1.8V_LCD_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo29_reg: LDO29 {
- regulator-name = "VT_CAM_2.8V";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- ldo30_reg: LDO30 {
- regulator-name = "TSP_AVDD_3.3V_AP";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo31_reg: LDO31 {
- regulator-name = "TSP_VDD_1.85V_AP";
- regulator-min-microvolt = <1850000>;
- regulator-max-microvolt = <1850000>;
- };
-
- ldo32_reg: LDO32 {
- regulator-name = "VTOUCH_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo33_reg: LDO33 {
- regulator-name = "VTOUCH_LED_3.3V";
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- };
-
- ldo34_reg: LDO34 {
- regulator-name = "VCC_1.8V_MHL_AP";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <2100000>;
- };
-
- ldo35_reg: LDO35 {
- regulator-name = "OIS_VM_2.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2800000>;
- };
-
- ldo36_reg: LDO36 {
- regulator-name = "VSIL_1.0V";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- };
-
- ldo37_reg: LDO37 {
- regulator-name = "VF_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo38_reg: LDO38 {
- regulator-name = "VCC_3.0V_MOTOR_AP";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- ldo39_reg: LDO39 {
- regulator-name = "V_HRM_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo40_reg: LDO40 {
- regulator-name = "V_HRM_3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- buck1_reg: BUCK1 {
- regulator-name = "VDD_MIF_0.9V_AP";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "VDD_EGL_1.0V_AP";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1300000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck3_reg: BUCK3 {
- regulator-name = "VDD_KFC_1.0V_AP";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck4_reg: BUCK4 {
- regulator-name = "VDD_INT_0.95V_AP";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck5_reg: BUCK5 {
- regulator-name = "VDD_DISP_CAM0_0.9V_AP";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck6_reg: BUCK6 {
- regulator-name = "VDD_G3D_0.9V_AP";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck7_reg: BUCK7 {
- regulator-name = "VDD_MEM1_1.2V_AP";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- };
-
- buck8_reg: BUCK8 {
- regulator-name = "VDD_LLDO_1.35V_AP";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- buck9_reg: BUCK9 {
- regulator-name = "VDD_MLDO_2.0V_AP";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- buck10_reg: BUCK10 {
- regulator-name = "vdd_mem2";
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- };
- };
- };
-};
-
-&hsi2c_8 {
- status = "okay";
-
- max77843 at 66 {
- compatible = "maxim,max77843";
- interrupt-parent = <&gpa1>;
- interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
- reg = <0x66>;
-
- muic: max77843-muic {
- compatible = "maxim,max77843-muic";
- };
-
- regulators {
- compatible = "maxim,max77843-regulator";
- safeout1_reg: SAFEOUT1 {
- regulator-name = "SAFEOUT1";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <4950000>;
- };
-
- safeout2_reg: SAFEOUT2 {
- regulator-name = "SAFEOUT2";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <4950000>;
- };
-
- charger_reg: CHARGER {
- regulator-name = "CHARGER";
- regulator-min-microamp = <100000>;
- regulator-max-microamp = <3150000>;
- };
- };
-
- haptic: max77843-haptic {
- compatible = "maxim,max77843-haptic";
- haptic-supply = <&ldo38_reg>;
- pwms = <&pwm 0 33670 0>;
- pwm-names = "haptic";
- };
- };
-};
-
-&i2s0 {
- status = "okay";
-};
-
-&mshc_0 {
- status = "okay";
- num-slots = <1>;
- mmc-hs200-1_8v;
- mmc-hs400-1_8v;
- cap-mmc-highspeed;
- non-removable;
- card-detect-delay = <200>;
- samsung,dw-mshc-ciu-div = <3>;
- samsung,dw-mshc-sdr-timing = <0 4>;
- samsung,dw-mshc-ddr-timing = <0 2>;
- samsung,dw-mshc-hs400-timing = <0 3>;
- samsung,read-strobe-delay = <90>;
- fifo-depth = <0x80>;
- pinctrl-names = "default";
- pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
- &sd0_bus8 &sd0_rdqs>;
- bus-width = <8>;
- assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
- assigned-clock-rates = <800000000>;
-};
-
-&mshc_2 {
- status = "okay";
- num-slots = <1>;
- cap-sd-highspeed;
- disable-wp;
- cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
- cd-inverted;
- card-detect-delay = <200>;
- samsung,dw-mshc-ciu-div = <3>;
- samsung,dw-mshc-sdr-timing = <0 4>;
- samsung,dw-mshc-ddr-timing = <0 2>;
- fifo-depth = <0x80>;
- pinctrl-names = "default";
- pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
- bus-width = <4>;
-};
-
-&ppmu_d0_general {
- status = "okay";
- events {
- ppmu_event0_d0_general: ppmu-event0-d0-general {
- event-name = "ppmu-event0-d0-general";
- };
- };
-};
-
-&ppmu_d1_general {
- status = "okay";
- events {
- ppmu_event0_d1_general: ppmu-event0-d1-general {
- event-name = "ppmu-event0-d1-general";
- };
- };
-};
-
-&pinctrl_alive {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_alive>;
-
- initial_alive: initial-state {
- PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
- PIN(INPUT, gpa0-1, NONE, FAST_SR1);
- PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
- PIN(INPUT, gpa0-3, NONE, FAST_SR1);
- PIN(INPUT, gpa0-4, NONE, FAST_SR1);
- PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
- PIN(INPUT, gpa0-6, NONE, FAST_SR1);
- PIN(INPUT, gpa0-7, NONE, FAST_SR1);
-
- PIN(INPUT, gpa1-0, UP, FAST_SR1);
- PIN(INPUT, gpa1-1, NONE, FAST_SR1);
- PIN(INPUT, gpa1-2, NONE, FAST_SR1);
- PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
- PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
- PIN(INPUT, gpa1-5, NONE, FAST_SR1);
- PIN(INPUT, gpa1-6, NONE, FAST_SR1);
- PIN(INPUT, gpa1-7, NONE, FAST_SR1);
-
- PIN(INPUT, gpa2-0, NONE, FAST_SR1);
- PIN(INPUT, gpa2-1, NONE, FAST_SR1);
- PIN(INPUT, gpa2-2, NONE, FAST_SR1);
- PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
- PIN(INPUT, gpa2-4, NONE, FAST_SR1);
- PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
- PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
- PIN(INPUT, gpa2-7, NONE, FAST_SR1);
-
- PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
- PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
- PIN(INPUT, gpa3-2, NONE, FAST_SR1);
- PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
- PIN(INPUT, gpa3-4, NONE, FAST_SR1);
- PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
- PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
- PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
-
- PIN(INPUT, gpf1-0, NONE, FAST_SR1);
- PIN(INPUT, gpf1-1, NONE, FAST_SR1);
- PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
- PIN(INPUT, gpf1-4, UP, FAST_SR1);
- PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
- PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
- PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
-
- PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
- PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
- PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
- PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
-
- PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
- PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
- PIN(INPUT, gpf3-2, NONE, FAST_SR1);
- PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
-
- PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
- PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
- PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
- PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
- PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
- PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
- PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
- PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
-
- PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
- PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
- PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
- PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
- PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
- PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
- PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
- PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
- };
-
- te_irq: te_irq {
- samsung,pins = "gpf1-3";
- samsung,pin-function = <0xf>;
- };
-};
-
-&pinctrl_cpif {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_cpif>;
-
- initial_cpif: initial-state {
- PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
- PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
- };
-};
-
-&pinctrl_ese {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_ese>;
-
- initial_ese: initial-state {
- PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
- PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
- PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
- };
-};
-
-&pinctrl_fsys {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_fsys>;
-
- initial_fsys: initial-state {
- PIN(INPUT, gpr3-0, NONE, FAST_SR1);
- PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
- PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
- PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
- PIN(INPUT, gpr3-7, NONE, FAST_SR1);
- };
-};
-
-&pinctrl_imem {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_imem>;
-
- initial_imem: initial-state {
- PIN(INPUT, gpf0-0, UP, FAST_SR1);
- PIN(INPUT, gpf0-1, UP, FAST_SR1);
- PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
- PIN(INPUT, gpf0-3, UP, FAST_SR1);
- PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
- PIN(INPUT, gpf0-5, NONE, FAST_SR1);
- PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
- PIN(INPUT, gpf0-7, UP, FAST_SR1);
- };
-};
-
-&pinctrl_nfc {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_nfc>;
-
- initial_nfc: initial-state {
- PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
- };
-};
-
-&pinctrl_peric {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_peric>;
-
- initial_peric: initial-state {
- PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
- PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
- PIN(INPUT, gpv7-2, NONE, FAST_SR1);
- PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
- PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
- PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
-
- PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
-
- PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
- PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
- PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
-
- PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
-
- PIN(INPUT, gpc3-4, NONE, FAST_SR1);
- PIN(INPUT, gpc3-5, NONE, FAST_SR1);
- PIN(INPUT, gpc3-6, NONE, FAST_SR1);
- PIN(INPUT, gpc3-7, NONE, FAST_SR1);
-
- PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
- PIN(2, gpg0-1, DOWN, FAST_SR1);
-
- PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
-
- PIN(INPUT, gpd4-0, NONE, FAST_SR1);
- PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
- PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
- PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
- PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
-
- PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
-
- PIN(INPUT, gpd8-1, UP, FAST_SR1);
-
- PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
- PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
- PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
- PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
- PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
-
- PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
- PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
-
- PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
- PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
- PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
- PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
- };
-};
-
-&pinctrl_touch {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_touch>;
-
- initial_touch: initial-state {
- PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
- };
-};
-
-&pwm {
- pinctrl-0 = <&pwm0_out>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&mic {
- status = "okay";
-
- i80-if-timings {
- };
-};
-
-&pmu_system_controller {
- assigned-clocks = <&pmu_system_controller 0>;
- assigned-clock-parents = <&xxti>;
-};
-
-&serial_1 {
- status = "okay";
-};
-
-&spi_1 {
- cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
- status = "okay";
-
- wm5110: wm5110-codec at 0 {
- compatible = "wlf,wm5110";
- reg = <0x0>;
- spi-max-frequency = <20000000>;
- interrupt-parent = <&gpa0>;
- interrupts = <4 IRQ_TYPE_NONE>;
- clocks = <&pmu_system_controller 0>,
- <&s2mps13_osc S2MPS11_CLK_BT>;
- clock-names = "mclk1", "mclk2";
-
- gpio-controller;
- #gpio-cells = <2>;
-
- wlf,micd-detect-debounce = <300>;
- wlf,micd-bias-start-time = <0x1>;
- wlf,micd-rate = <0x7>;
- wlf,micd-dbtime = <0x1>;
- wlf,micd-force-micbias;
- wlf,micd-configs = <0x0 1 0>;
- wlf,hpdet-channel = <1>;
- wlf,gpsw = <0x1>;
- wlf,inmode = <2 0 2 0>;
-
- wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
- wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
-
- /* core supplies */
- AVDD-supply = <&ldo18_reg>;
- DBVDD1-supply = <&ldo18_reg>;
- CPVDD-supply = <&ldo18_reg>;
- DBVDD2-supply = <&ldo18_reg>;
- DBVDD3-supply = <&ldo18_reg>;
-
- controller-data {
- samsung,spi-feedback-delay = <0>;
- };
- };
-};
-
-&timer {
- clock-frequency = <24000000>;
-};
-
-&tmu_atlas0 {
- vtmu-supply = <&ldo3_reg>;
- status = "okay";
-};
-
-&tmu_apollo {
- vtmu-supply = <&ldo3_reg>;
- status = "okay";
-};
-
-&tmu_g3d {
- vtmu-supply = <&ldo3_reg>;
- status = "okay";
-};
-
-&usbdrd30 {
- vdd33-supply = <&ldo10_reg>;
- vdd10-supply = <&ldo6_reg>;
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- dr_mode = "otg";
-};
-
-&usbdrd30_phy {
- vbus-supply = <&safeout1_reg>;
- status = "okay";
-};
-
-&xxti {
- clock-frequency = <24000000>;
-};
+/*
+ * SAMSUNG Exynos5433 TM2 board device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *
+ * Device tree source file for Samsung's TM2 board which is based on
+ * Samsung Exynos5433 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "exynos5433-tm2-common.dtsi"
+
+/ {
+ model = "Samsung TM2E board";
+ compatible = "samsung,tm2e", "samsung,exynos5433";
+};
+
+®ulators {
+ ldo31_reg: LDO31 {
+ regulator-name = "TSP_VDD_1.85V_AP";
+ regulator-min-microvolt = <1850000>;
+ regulator-max-microvolt = <1850000>;
+ };
+
+ ldo38_reg: LDO38 {
+ regulator-name = "VCC_3.0V_MOTOR_AP";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
index 854c583092d5..53e361f61ad5 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
@@ -11,21 +11,23 @@
* published by the Free Software Foundation.
*/
-#include "exynos5433-tm2.dts"
+#include "exynos5433-tm2-common.dtsi"
/ {
model = "Samsung TM2E board";
compatible = "samsung,tm2e", "samsung,exynos5433";
};
-&ldo31_reg {
- regulator-name = "TSP_VDD_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-};
+®ulators {
+ ldo31_reg: LDO31 {
+ regulator-name = "TSP_VDD_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
-&ldo38_reg {
- regulator-name = "VCC_3.3V_MOTOR_AP";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ ldo38_reg: LDO38 {
+ regulator-name = "VCC_3.3V_MOTOR_AP";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
};
--
2.11.0
^ permalink raw reply related
* [PATCH v4 1/5] arm64: dts: exynos5433: TM2/E: Fix wrong values foe ldo23 and ldo25
From: Andi Shyti @ 2017-01-06 11:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170106114114.19321-1-andi.shyti@samsung.com>
From: Chanwoo Choi <cw00.choi@samsung.com>
This patch fixes wrong values assigned to ldo23 and ldo25 on both TM2 and TM2E.
Fixes: 01e5d2352152 ("arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board")
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 7 ++++---
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 9 ---------
2 files changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index 3b5215c40fcd..e8971f4a5977 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -504,9 +504,9 @@
};
ldo23_reg: LDO23 {
- regulator-name = "CAM_SEN_CORE_1.2V_AP";
+ regulator-name = "CAM_SEN_CORE_1.05V_AP";
regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1200000>;
+ regulator-max-microvolt = <1050000>;
};
ldo24_reg: LDO24 {
@@ -516,9 +516,10 @@
};
ldo25_reg: LDO25 {
- regulator-name = "CAM_SEN_A2.8V_AP";
+ regulator-name = "UNUSED_LDO25";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
+ regulator-always-off;
};
ldo26_reg: LDO26 {
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
index 398f5e092b02..854c583092d5 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
@@ -18,15 +18,6 @@
compatible = "samsung,tm2e", "samsung,exynos5433";
};
-&ldo23_reg {
- regulator-name = "CAM_SEN_CORE_1.025V_AP";
- regulator-max-microvolt = <1050000>;
-};
-
-&ldo25_reg {
- regulator-name = "UNUSED_LDO25";
-};
-
&ldo31_reg {
regulator-name = "TSP_VDD_1.8V_AP";
regulator-min-microvolt = <1800000>;
--
2.11.0
^ permalink raw reply related
* [PATCH v4 0/5]
From: Andi Shyti @ 2017-01-06 11:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CGME20170106114119epcas5p2c29ea8c8118db4a1fb600970ea0dafd4@epcas5p2.samsung.com>
Hi,
I'll send this patch on behalf of Jaechul Lee
<jcsing.lee@samsung.com> becasue it's I don't want to block
anyone who wants to make changes to the exynos5433-tm2*dts*
files.
This patches are based on Krzysztof's branch for-next [1]
"This patchset adds support for the tm2 touchkey device.
The driver has been ported from Tizen Kernel,
originally written
by Beomho. I ported it to the latest mainline Kernel."
Thanks,
Andi
[1] https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=for-next
Changes in v4:
- patch 1 has been rebased on top of 7c294e002641 (arm64: dts:
exynos: Remove unsupported regulator-always-off property from
TM2E)
- patch 2 has been generated with -B50% diff option using git
2.11
Changes in v3:
- Changed the commit ordering, the tm2-touchkey related patches
are the last 3.
- Added Chanwoo's patch which fixes the wrong voltage of ldo23
and ldo25.
- Andi (patch 3) moves the ldo31 and ldo38 in the tm2 and tm2e
files as they have different values.
Changes in v2:
- fixed reviews from Javier, Dmitry
- refactored power enable/disable functions.
- reordered signed-offs in patch 2, while patch 4 is left as it
was as Andi copy pasted the node to the new tm2.dts file
- added Jarvier's (patch 1,2,4) and Krzysztof's (patch 4)
reviews
and Rob's Ack
- patch 3 diff has been generated with -B50%
Andi Shyti (1):
arm64: dts: exynos: make tm2 and tm2e independent from each other
Chanwoo Choi (1):
arm64: dts: exynos5433: TM2/E: Fix wrong information of ldo23 and
ldo25
Jaechul Lee (3):
input: Add support for the tm2 touchkey device driver
input: tm2-touchkey: Add touchkey driver support for TM2
arm64: dts: exynos: Add tm2 touchkey node
.../bindings/input/samsung,tm2-touchkey.txt | 27 +
...ynos5433-tm2.dts => exynos5433-tm2-common.dtsi} | 31 +-
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 1165 +-------------------
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 31 +-
drivers/input/keyboard/Kconfig | 11 +
drivers/input/keyboard/Makefile | 1 +
drivers/input/keyboard/tm2-touchkey.c | 280 +++++
7 files changed, 392 insertions(+), 1154 deletions(-)
create mode 100644 Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt
copy arch/arm64/boot/dts/exynos/{exynos5433-tm2.dts => exynos5433-tm2-common.dtsi} (97%)
rewrite arch/arm64/boot/dts/exynos/exynos5433-tm2.dts (98%)
create mode 100644 drivers/input/keyboard/tm2-touchkey.c
--
2.11.0
^ permalink raw reply
* [PATCH v3] i2c: designware: add reset interface
From: Arnd Bergmann @ 2017-01-06 11:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483544119.9552.223.camel@linux.intel.com>
On Wednesday, January 4, 2017 5:35:19 PM CET Andy Shevchenko wrote:
> > > @@ -270,10 +280,18 @@ static int dw_i2c_plat_probe(struct
> > > platform_device *pdev)
> > > }
> > >
> > > r = i2c_dw_probe(dev);
> > > - if (r && !dev->pm_runtime_disabled)
> > > - pm_runtime_disable(&pdev->dev);
> > > + if (r)
> > > + goto exit_probe;
> > >
> > > return r;
> > > +
> > > +exit_probe:
> > > + if (!dev->pm_runtime_disabled)
> > > + pm_runtime_disable(&pdev->dev);
> > > +exit_reset:
> > > + if (!IS_ERR_OR_NULL(dev->rst))
> > > + reset_control_assert(dev->rst);
> > > + return r;
> > >
> >
> > try to avoid the IS_ERR_OR_NULL() check, it usually indicates either
> > a bad interface, or that the interface is used wrong.
>
> Please, fix reset framework first than.
>
> For my understanding:
> It should return NULL for optional reset control.
> It should not fail on NULL argument.
I think we discussed that a few times. Your suggestion makes sense
to me, but I don't know why we don't already do that, maybe there
is a good reason.
Arnd
^ permalink raw reply
* ubi_io_read: error -74 (ECC error)
From: Boris Brezillon @ 2017-01-06 11:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <38f0cfac3dbe4ea89da84c7fbf667833@SGPMBX1023.APAC.bosch.com>
Hi Raghavan,
On Fri, 6 Jan 2017 10:07:29 +0000
"Anurag Raghavan (RBEI/ETW11)" <Raghavan.Anurag@in.bosch.com> wrote:
> Hi All,
>
> My appdata partition could not be mounted or where the partition was not able to be used. Anyone can help me to find out the root cause of this. What are the possibilities of this ubifs corruption. Any patched are available to fix this issue.
Can you please stop sending over and over the same message in the hope
that someone will magically solve the problem for you. Pinging
maintainers is accepted but not 3 times in 2 days.
>
> I am using the kernel version-30.3.5
It's not even a valid kernel version (probably a kerne, and we'll need a
lot more than the 10 lines of log you provided to help you debug your
driver, like the boot logs, a reference to the kernel sources you're
using, after how much time this problem occurred...
> Any kernel patches are available to solve this issue...??
What's your NAND controller? It seems related to a NAND driver issue.
Regards,
Boris
>
> Error logs:
>
> [ 1.797141] UBI error: ubi_io_read: error -74 (ECC error) while reading 253952 bytes from PEB 445:8192, read 253952 bytes
> [ 1.808274] UBIFS error (pid 491): ubifs_scan: corrupt empty space at LEB 489:233760
> [ 1.816037] UBIFS error (pid 491): ubifs_scanned_corruption: corruption at LEB 489:233760
> [ 1.828660] UBIFS error (pid 491): ubifs_scan: LEB 489 scanning failed
> [ 1.835215] UBIFS warning (pid 491): ubifs_ro_mode: switched to read-only mode, error -117
> [ 1.843502] UBIFS error (pid 491): make_reservation: cannot reserve 58 bytes in jhead 2, error -117
> [ 1.852569] UBIFS error (pid 491): do_writepage: cannot write page 0 of inode 76584, error -117
> dpkg: error: unable to sync new file '/var/lib/dpkg/arch-new': Structure needs cleaning
>
> Best regards
>
> Raghavan Anurag
> RBEI/ETW1
>
> Tel. +91(422)667-4001 | Mobil 9986968950
>
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply
* [QUESTION] Early Write Acknowledge for PCIe configuration space
From: Arnd Bergmann @ 2017-01-06 11:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <df407f39-ee05-d74d-6e5e-c5e502372032@huawei.com>
On Friday, January 6, 2017 11:15:22 AM CET John Garry wrote:
> [apologies if this has been queried before]
>
> Hi ARM guys,
>
> I have a question about the device memory attributes we assign for PCIe
> config space for arm64. Currently we use ioremap to map in the config
> space; this uses nGnRE, which means we enable Early Write Acknowledge.
>
> The ARMv8 ARM states that "ARM recommend that No Early Write Acknowledge
> Hint is used for PCIe configuration writes".
>
> I understand a problem with using E is in that configuration write is a
> non-post operation, which means the RP requires to get the completion
> ack from the EP The problem here is if CPU writes data to ECAM by E,
> complete will go back to CPU directly, and maybe at this point the write
> has not reached the EP.
>
> I believe that this may cause ordering issues in PCI read/write. In
> practice we use non-relaxed readl/writel to access config space, which
> include the synchronization barriers, which, *as I understand*, even if
> for full system domain, may be negated by the E attribute for PCIe.
I don't think the barriers in readl/writel are enough here, in particular
the write barrier is *before* the access to synchronize DMAs
on RAM with MMIO accesses, which is a bit different from what you
have here.
> So a question: why is the recommendation in the ARMv8 ARM ignored?
Probably nobody thought about this properly in the Linux drivers. The
ARMv8 ARM sounds correct here.
I/O space may have the same issue, as it also requires non-posted
accesses.
Arnd
^ permalink raw reply
* [PATCH] ARM: hw_breakpoint: blacklist Scorpion CPUs
From: Will Deacon @ 2017-01-06 11:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483637556-3974-1-git-send-email-mark.rutland@arm.com>
On Thu, Jan 05, 2017 at 05:32:36PM +0000, Mark Rutland wrote:
> On APQ8060, the kernel crashes in arch_hw_breakpoint_init, taking an
> undefined instruction trap within write_wb_reg. This is because Scorpion
> CPUs erroneously appear to set DBGPRSR.SPD when WFI is issued, even if
> the core is not powered down. When DBGPRSR.SPD is set, breakpoint and
> watchpoint registers are treated as undefined.
>
> It's possible to trigger similar crashes later on from userspace, by
> requesting the kernel to install a breakpoint or watchpoint, as we can
> go idle at any point between the reset of the debug registers and their
> later use. This has always been the case.
>
> Given that this has always been broken, no-one has complained until now,
> and there is no clear workaround, disable hardware breakpoints and
> watchpoints on Scorpion to avoid these issues.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Reported-by: Linus Walleij <linus.walleij@linaro.org>
> Cc: Russell King <linux@armlinux.org.uk>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: stable at vger.kernel.org
> ---
> arch/arm/include/asm/cputype.h | 3 +++
> arch/arm/kernel/hw_breakpoint.c | 16 ++++++++++++++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
> index 522b5fe..b62eaeb 100644
> --- a/arch/arm/include/asm/cputype.h
> +++ b/arch/arm/include/asm/cputype.h
> @@ -94,6 +94,9 @@
> #define ARM_CPU_XSCALE_ARCH_V2 0x4000
> #define ARM_CPU_XSCALE_ARCH_V3 0x6000
>
> +/* Qualcomm implemented cores */
> +#define ARM_CPU_PART_SCORPION 0x510002d0
> +
> extern unsigned int processor_id;
>
> #ifdef CONFIG_CPU_CP15
> diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
> index 188180b..5d68ff9 100644
> --- a/arch/arm/kernel/hw_breakpoint.c
> +++ b/arch/arm/kernel/hw_breakpoint.c
> @@ -1063,6 +1063,22 @@ static int __init arch_hw_breakpoint_init(void)
> return 0;
> }
>
> + /*
> + * Scorpion CPUs (at least those in APQ8060) seem to set DBGPRSR.SPD
> + * whenever a WFI is issued, even if the core is not powered down, in
> + * violation of the architecture. When DBGPRSR.SPD is set, accesses to
> + * breakpoint and watchpoint registers are treated as undefined, so
> + * this results in boot time and runtime failures when these are
> + * accessed and we unexpectedly take a trap.
> + *
> + * It's not clear if/how this can be worked around, so we blacklist
> + * Scorpion CPUs to avoid these issues.
> + */
> + if (read_cpuid_part() == ARM_CPU_PART_SCORPION) {
> + pr_info("Scorpion CPU detected. Breakpoints and watchpoints disabled\n");
nit: we're disabling *hardware* breakpoints and watchpoints, so it's worth
mentioning that in the print.
With that:
Acked-by: Will Deacon <will.deacon@arm.com>
Please put this into Russell's patch system.
Will
^ permalink raw reply
* [PATCH] ARM: hw_breakpoint: blacklist Scorpion CPUs
From: Will Deacon @ 2017-01-06 11:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170105232324.GL17126@codeaurora.org>
On Thu, Jan 05, 2017 at 03:23:24PM -0800, Stephen Boyd wrote:
> On 01/05, Mark Rutland wrote:
> > On APQ8060, the kernel crashes in arch_hw_breakpoint_init, taking an
> > undefined instruction trap within write_wb_reg. This is because Scorpion
> > CPUs erroneously appear to set DBGPRSR.SPD when WFI is issued, even if
> > the core is not powered down. When DBGPRSR.SPD is set, breakpoint and
> > watchpoint registers are treated as undefined.
> >
> > It's possible to trigger similar crashes later on from userspace, by
> > requesting the kernel to install a breakpoint or watchpoint, as we can
> > go idle at any point between the reset of the debug registers and their
> > later use. This has always been the case.
> >
> > Given that this has always been broken, no-one has complained until now,
> > and there is no clear workaround, disable hardware breakpoints and
> > watchpoints on Scorpion to avoid these issues.
>
> I believe the workaround is to read DBGPRSR after exit from WFI?
That might be do-able via cpuidle, but it's probably better for somebody
familiar with the SoC PM to write that patch.
> I'm fine with the blacklisting approach though.
>
> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Thanks,
Will
^ permalink raw reply
* [PATCH 5/5] ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()
From: Simon Horman @ 2017-01-06 11:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
After
1. commit 9f5ce39ddb8f68b3 ("ARM: shmobile: rcar-gen2: Obtain extal
frequency from DT"),
2. commit 80951f04c3f92533 ("ARM: shmobile: rcar-gen2: Stop passing
mode pins state to clock driver"),
3. and handling of debug resource reset,
there are no more users of rcar_gen2_read_mode_pins() left.
Remove the function and its support definitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/rcar-gen2.h | 2 --
arch/arm/mach-shmobile/setup-rcar-gen2.c | 18 ------------------
2 files changed, 20 deletions(-)
diff --git a/arch/arm/mach-shmobile/rcar-gen2.h b/arch/arm/mach-shmobile/rcar-gen2.h
index 8a66b4aae035..6792e249cf56 100644
--- a/arch/arm/mach-shmobile/rcar-gen2.h
+++ b/arch/arm/mach-shmobile/rcar-gen2.h
@@ -2,8 +2,6 @@
#define __ASM_RCAR_GEN2_H__
void rcar_gen2_timer_init(void);
-#define MD(nr) BIT(nr)
-u32 rcar_gen2_read_mode_pins(void);
void rcar_gen2_reserve(void);
void rcar_gen2_pm_init(void);
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index ac63fa407b64..52d466b75973 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -29,24 +29,6 @@
#include "common.h"
#include "rcar-gen2.h"
-#define MODEMR 0xe6160060
-
-u32 rcar_gen2_read_mode_pins(void)
-{
- static u32 mode;
- static bool mode_valid;
-
- if (!mode_valid) {
- void __iomem *modemr = ioremap_nocache(MODEMR, 4);
- BUG_ON(!modemr);
- mode = ioread32(modemr);
- iounmap(modemr);
- mode_valid = true;
- }
-
- return mode;
-}
-
static unsigned int __init get_extal_freq(void)
{
struct device_node *cpg, *extal;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 4/5] ARM: shmobile: r8a7791: Allow booting secondary CPU cores in debug mode
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Now debug resource reset is handled properly, allow booting secondary
CPU cores when hardware debug mode is enabled (MD21=1, SW8-4=OFF on
koelsch) on legacy r8a7791.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/smp-r8a7791.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
index 2d6417af73b5..2948c22cfc53 100644
--- a/arch/arm/mach-shmobile/smp-r8a7791.c
+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
@@ -42,21 +42,9 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
rcar_gen2_pm_init();
}
-static int r8a7791_smp_boot_secondary(unsigned int cpu,
- struct task_struct *idle)
-{
- /* Error out when hardware debug mode is enabled */
- if (rcar_gen2_read_mode_pins() & BIT(21)) {
- pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
- return -ENOTSUPP;
- }
-
- return shmobile_smp_apmu_boot_secondary(cpu, idle);
-}
-
const struct smp_operations r8a7791_smp_ops __initconst = {
.smp_prepare_cpus = r8a7791_smp_prepare_cpus,
- .smp_boot_secondary = r8a7791_smp_boot_secondary,
+ .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_can_disable = shmobile_smp_cpu_can_disable,
.cpu_die = shmobile_smp_apmu_cpu_die,
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 3/5] ARM: shmobile: apmu: Allow booting secondary CPU cores in debug mode
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Now debug resource reset is handled properly, allow booting secondary
CPU cores when hardware debug mode is enabled (MD21=1) on SoCs using the
"renesas,apmu" enable method.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/platsmp-apmu.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 7e4ca6788be5..e19266844e16 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -216,21 +216,9 @@ static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
rcar_gen2_pm_init();
}
-static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,
- struct task_struct *idle)
-{
- /* Error out when hardware debug mode is enabled */
- if (rcar_gen2_read_mode_pins() & BIT(21)) {
- pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
- return -ENOTSUPP;
- }
-
- return shmobile_smp_apmu_boot_secondary(cpu, idle);
-}
-
static struct smp_operations apmu_smp_ops __initdata = {
.smp_prepare_cpus = shmobile_smp_apmu_prepare_cpus_dt,
- .smp_boot_secondary = shmobile_smp_apmu_boot_secondary_md21,
+ .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_can_disable = shmobile_smp_cpu_can_disable,
.cpu_die = shmobile_smp_apmu_cpu_die,
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 2/5] ARM: shmobile: apmu: Add debug resource reset for secondary CPU boot
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
In debug mode (MD21=1), reset requests derived from power-shutoff to the
AP-system CPU cores must be enabled before the AP-system CPU cores
resume from power-shutoff for the first time. Else resume may fail,
causing the system to hang during boot.
As setting these bits is a no-op in normal mode, there's no need to
check the actual state of MD21 first.
Inspired by CPU-specific patches in the BSP by Hisashi Nakamura
<hisashi.nakamura.ak@renesas.com>.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/platsmp-apmu.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 933f9b902405..7e4ca6788be5 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -35,12 +35,18 @@ static struct {
#define PSTR_OFFS 0x40 /* Power Status Register */
#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
/* CPUn Power Status Control Register */
+#define DBGRCR_OFFS 0x180 /* Debug Resource Reset Control Reg. */
/* Power Status Register */
#define CPUNST(r, n) (((r) >> (n * 4)) & 3) /* CPUn Status Bit */
#define CPUST_RUN 0 /* Run Mode */
#define CPUST_STANDBY 3 /* CoreStandby Mode */
+/* Debug Resource Reset Control Register */
+#define DBGCPUREN BIT(24) /* CPU Other Reset Request Enable */
+#define DBGCPUNREN(n) BIT((n) + 20) /* CPUn Reset Request Enable */
+#define DBGCPUPREN BIT(19) /* CPU Peripheral Reset Req. Enable */
+
static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
{
/* request power on */
@@ -84,6 +90,8 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu)
#ifdef CONFIG_SMP
static void apmu_init_cpu(struct resource *res, int cpu, int bit)
{
+ u32 x;
+
if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
return;
@@ -91,6 +99,11 @@ static void apmu_init_cpu(struct resource *res, int cpu, int bit)
apmu_cpus[cpu].bit = bit;
pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res);
+
+ /* Setup for debug mode */
+ x = readl(apmu_cpus[cpu].iomem + DBGRCR_OFFS);
+ x |= DBGCPUREN | DBGCPUNREN(bit) | DBGCPUPREN;
+ writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS);
}
static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit),
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 1/5] ARM: shmobile: apmu: Add more register documentation
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/platsmp-apmu.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 0c6bb458b7a4..933f9b902405 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -31,9 +31,15 @@ static struct {
int bit;
} apmu_cpus[NR_CPUS];
-#define WUPCR_OFFS 0x10
-#define PSTR_OFFS 0x40
-#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
+#define WUPCR_OFFS 0x10 /* Wake Up Control Register */
+#define PSTR_OFFS 0x40 /* Power Status Register */
+#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
+ /* CPUn Power Status Control Register */
+
+/* Power Status Register */
+#define CPUNST(r, n) (((r) >> (n * 4)) & 3) /* CPUn Status Bit */
+#define CPUST_RUN 0 /* Run Mode */
+#define CPUST_STANDBY 3 /* CoreStandby Mode */
static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
{
@@ -59,7 +65,7 @@ static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit)
int k;
for (k = 0; k < 1000; k++) {
- if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3)
+ if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY)
return 1;
mdelay(1);
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [GIT PULL] Renesas ARM Based SoC Updates for v4.11
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC updates for v4.11.
The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-for-v4.11
for you to fetch changes up to 70def3e53694a65c5583fb5f411491a5074bab18:
ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins() (2017-01-03 10:50:45 +0100)
----------------------------------------------------------------
Renesas ARM Based SoC Updates for v4.11
* Allow booting secondary CPU cores in debug mode
----------------------------------------------------------------
Geert Uytterhoeven (5):
ARM: shmobile: apmu: Add more register documentation
ARM: shmobile: apmu: Add debug resource reset for secondary CPU boot
ARM: shmobile: apmu: Allow booting secondary CPU cores in debug mode
ARM: shmobile: r8a7791: Allow booting secondary CPU cores in debug mode
ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()
arch/arm/mach-shmobile/platsmp-apmu.c | 41 +++++++++++++++++++-------------
arch/arm/mach-shmobile/rcar-gen2.h | 2 --
arch/arm/mach-shmobile/setup-rcar-gen2.c | 18 --------------
arch/arm/mach-shmobile/smp-r8a7791.c | 14 +----------
4 files changed, 25 insertions(+), 50 deletions(-)
^ permalink raw reply
* [PATCH v3 7/9] arm64: cpufeature: Track user visible fields
From: Suzuki K Poulose @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170105180626.GH29765@e104818-lin.cambridge.arm.com>
On 05/01/17 18:06, Catalin Marinas wrote:
> On Wed, Jan 04, 2017 at 05:49:05PM +0000, Suzuki K. Poulose wrote:
>> Track the user visible fields of a CPU feature register. This will be
>> used for exposing the value to the userspace. All the user visible
>> fields of a feature register will be passed on as it is, while the
>> others would be filled with their respective safe value.
>>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will.deacon@arm.com>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>
> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
>
>> @@ -81,75 +82,75 @@ cpufeature_pan_not_uao(const struct arm64_cpu_capabilities *entry, int __unused)
>>
>>
>> static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64ISAR0_RDM_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_ATOMICS_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_CRC32_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA2_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA1_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_AES_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64ISAR0_RDM_SHIFT, 4, 0),
On a second look, I think we should make the RDM field visible to the user space as it
is something useful for the user.
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_ATOMICS_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_CRC32_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA2_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA1_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_AES_SHIFT, 4, 0),
>
> BTW, as a separate patch I think we need to expose the RDM field in this
> register as well, together with a corresponding HWCAP bit.
OK, I will send a separate patch for this.
Thanks for the review.
Suzuki
^ permalink raw reply
* [PATCH 25/25] ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for msiof nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for msiof nodes in
DT for r8a7790 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7790 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7790.dtsi | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index ddf6a8cbe6c1..44ea77febe17 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1508,7 +1508,8 @@
};
msiof0: spi at e6e20000 {
- compatible = "renesas,msiof-r8a7790";
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
@@ -1522,7 +1523,8 @@
};
msiof1: spi at e6e10000 {
- compatible = "renesas,msiof-r8a7790";
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
@@ -1536,7 +1538,8 @@
};
msiof2: spi at e6e00000 {
- compatible = "renesas,msiof-r8a7790";
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
@@ -1550,7 +1553,8 @@
};
msiof3: spi at e6c90000 {
- compatible = "renesas,msiof-r8a7790";
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6c90000 0 0x0064>;
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 24/25] ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding for msiof nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for msiof nodes in
DT for r8a7792 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7792 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7792.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 59d31d433244..135e06920e2d 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -591,7 +591,8 @@
};
msiof0: spi at e6e20000 {
- compatible = "renesas,msiof-r8a7792";
+ compatible = "renesas,msiof-r8a7792",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>;
@@ -605,7 +606,8 @@
};
msiof1: spi at e6e10000 {
- compatible = "renesas,msiof-r8a7792";
+ compatible = "renesas,msiof-r8a7792",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 23/25] ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for msiof nodes
From: Simon Horman @ 2017-01-06 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
Use recently added R-Car Gen 2 fallback binding for msiof nodes in
DT for r8a7791 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7791 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 55872fc8fa4c..06486664d754 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1521,7 +1521,8 @@
};
msiof0: spi at e6e20000 {
- compatible = "renesas,msiof-r8a7791";
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
@@ -1535,7 +1536,8 @@
};
msiof1: spi at e6e10000 {
- compatible = "renesas,msiof-r8a7791";
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
@@ -1549,7 +1551,8 @@
};
msiof2: spi at e6e00000 {
- compatible = "renesas,msiof-r8a7791";
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox