* [PATCH resend v4 2/3] ARM: dts: imx6: Support Savageboard dual
From: Shawn Guo @ 2017-01-10 3:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170104070436.3425-1-woogyom.kim@gmail.com>
On Wed, Jan 04, 2017 at 04:04:36PM +0900, Milo Kim wrote:
> Common savageboard DT file is used for board support.
> Add the vendor name and specify the dtb file for i.MX6Q build.
>
> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
> Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
> ---
> .../devicetree/bindings/vendor-prefixes.txt | 1 +
The bindings change should be ideally a separate patch. But since Rob
seems to be fine with it this time, I just applied the whole series.
Shawn
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6dl-savageboard.dts | 51 ++++++++++++++++++++++
> 3 files changed, 53 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6dl-savageboard.dts
^ permalink raw reply
* [PATCH v3] arm64: dts: rockchip: add "rockchip, grf" property for RK3399 PMUCRU/CRU
From: Xing Zheng @ 2017-01-10 3:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAD=FV=UsMR=HD5799N7ny_Ce8XXCkcd3R3tpX34AEC6UmGkXtA@mail.gmail.com>
Hi, Doug
On 2017?01?10? 11:06, Doug Anderson wrote:
> Hi,
>
> On Mon, Jan 9, 2017 at 5:27 PM, Xing Zheng <zhengxing@rock-chips.com> wrote:
>> The structure rockchip_clk_provider needs to refer the GRF regmap
>> in somewhere, if the CRU node has not "rockchip,grf" property,
>> calling syscon_regmap_lookup_by_phandle will return an invalid GRF
>> regmap, and the MUXGRF type clock will be not supported.
>>
>> Therefore, we need to add them.
>>
>> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
>> ---
>>
>> Changes in v3:
>> - add optional roperty rockchip,grf in rockchip,rk3399-cru.txt
>>
>> Changes in v2:
>> - referring pmugrf for PMUGRU
>> - fix the typo "invaild" in COMMIT message
>>
>> Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt | 5 +++++
>> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
> "dts" and bindings shouldn't change in the same patch since they go
> through different trees. This is why I said:
>
>> This looks sane to me, but before you land it you need to first send
>> up a (separate) patch that adjusts:
>> --------
> AKA: you need a two patch series here.
>
> Sometimes it's OK to include bindings together with code changes
> (depends on the maintainer), but never with dts changes.
>
> -Doug
For little lazy, I did refer other SoC platform to using "dts" and
bindings in the same patch...
OK, I will use a two patch series.
Thanks
>
>
--
- Xing Zheng
^ permalink raw reply
* [PATCH 0/4] video: ARM CLCD: add support of an optional GPIO to enable panel
From: Vladimir Zapolskiy @ 2017-01-10 4:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <252ad888-fa9d-695a-58ed-46806e4374fd@mleia.com>
On 01/08/2017 01:32 AM, Vladimir Zapolskiy wrote:
> On 01/02/2017 04:22 PM, Russell King - ARM Linux wrote:
>> On Fri, Dec 30, 2016 at 09:23:59AM +0100, Linus Walleij wrote:
>>> On Wed, Dec 21, 2016 at 4:27 AM, Vladimir Zapolskiy <vz@mleia.com> wrote:
>>>
>>>> The changeset contains a number of cleanups, changed semantics of
>>>> init_panel() callback, which allows to simplify getting of panel
>>>> properties from panel device tree node, and a handling of optional
>>>> "enable-gpios" panel property, the latter is described in
>>>> display/panel/panel-dpi.txt device tree binding documentation, but
>>>> it has been unsupported by the ARM CLCD driver.
>>>>
>>>> Vladimir Zapolskiy (4):
>>>> video: ARM CLCD: sort included headers out alphabetically
>>>> video: ARM CLCD: use panel device node for panel initialization
>>>> video: ARM CLCD: use panel device node for getting backlight and mode
>>>> video: ARM CLCD: add support of an optional GPIO to enable panel
>>>
>>> As you may have seen Tomi has stepped down as FBDEV maintainer and
>>> this subsystem is now orphaned.
>>>
>>> I guess Andrew Morton merges patches for it in this case, he usually does.
>>>
>>> But what we should actually do is create a new DRM driver for CLCD
>>> in drivers/gpu/drm/arm/clcd*
>>>
>>> It's maybe not a small undertaking :(
>>>
>>> But in case you're interested in the job, I will pitch in and test the result
>>> on all ARM reference designs plus Nomadik.
>>
>> A DRM driver for it would probably be a good idea, but dealing with all
>> the weird and wonderful connection arrangements may not be that easy...
>>
>
> Linus, Russell,
>
> I've immediately encountered a problem while porting the driver to DRM,
> because LPC18xx/LPC43xx SoCs are powered by Cortex-M3/M4 cores and DRM
> framework has build and runtime dependencies on MMU.
>
> That said, in short term I would expect a continuation of support for
> the legacy CLCD framebuffer driver, which works fine on MMU-less SoCs.
>
Linus, Russell,
please let me ask you to review/ack the changes, then I'll resend them
to Andrew for inclusion as suggested by Linus.
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH resend v4 2/3] ARM: dts: imx6: Support Savageboard dual
From: Milo Kim @ 2017-01-10 4:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170110032736.GX20956@dragon>
On 01/10/2017 12:27 PM, Shawn Guo wrote:
> On Wed, Jan 04, 2017 at 04:04:36PM +0900, Milo Kim wrote:
>> Common savageboard DT file is used for board support.
>> Add the vendor name and specify the dtb file for i.MX6Q build.
>>
>> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
>> Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
>> ---
>> .../devicetree/bindings/vendor-prefixes.txt | 1 +
> The bindings change should be ideally a separate patch. But since Rob
> seems to be fine with it this time, I just applied the whole series.
Got it. Thanks for taking this.
Best regards,
Milo
^ permalink raw reply
* [PATCH RESEND] dmaengine: stm32-dma: Add error messages if xlate fails
From: Vinod Koul @ 2017-01-10 5:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483603780-3368-1-git-send-email-cedric.madianga@gmail.com>
On Thu, Jan 05, 2017 at 09:09:40AM +0100, M'boumba Cedric Madianga wrote:
> This patch adds some error messages when a slave device fails to request a
> channel.
Applied now
--
~Vinod
^ permalink raw reply
* [PATCH v7 1/5] dt-bindings: zte: add bindings document for zx2967 power domain controller
From: Rob Herring @ 2017-01-10 5:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483694164-7668-1-git-send-email-baoyou.xie@linaro.org>
On Fri, Jan 06, 2017 at 05:16:00PM +0800, Baoyou Xie wrote:
> This patch adds device tree bindings document for ZTE zx2967
> family power domain controller.
>
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
> ---
> .../devicetree/bindings/soc/zte/pd-2967xx.txt | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/zte/pd-2967xx.txt
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 1/4] clk: stm32f7: Add stm32f7 clock DT bindings for STM32F746 boards
From: Rob Herring @ 2017-01-10 5:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483711165-17149-2-git-send-email-gabriel.fernandez@st.com>
On Fri, Jan 06, 2017 at 02:59:22PM +0100, gabriel.fernandez at st.com wrote:
> From: Gabriel Fernandez <gabriel.fernandez@st.com>
>
> This patch introduces the stm32f7 clock DT bindings.
>
> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
> ---
> .../devicetree/bindings/clock/st,stm32-rcc.txt | 20 ++++++++++++++++++++
> include/dt-bindings/clock/stm32fx-clock.h | 20 ++++++++++++++++++++
> 2 files changed, 40 insertions(+)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v3 13/24] platform: add video-multiplexer subdevice driver
From: Rob Herring @ 2017-01-10 5:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483755102-24785-14-git-send-email-steve_longerbeam@mentor.com>
On Fri, Jan 06, 2017 at 06:11:31PM -0800, Steve Longerbeam wrote:
> From: Philipp Zabel <p.zabel@pengutronix.de>
>
> This driver can handle SoC internal and external video bus multiplexers,
> controlled either by register bit fields or by a GPIO. The subdevice
> passes through frame interval and mbus configuration of the active input
> to the output side.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
>
> --
>
> - fixed a cut&paste error in vidsw_remove(): v4l2_async_register_subdev()
> should be unregister.
>
> - added media_entity_cleanup() and v4l2_device_unregister_subdev()
> to vidsw_remove().
>
> - there was a line left over from a previous iteration that negated
> the new way of determining the pad count just before it which
> has been removed (num_pads = of_get_child_count(np)).
>
> - Philipp Zabel has developed a set of patches that allow adding
> to the subdev async notifier waiting list using a chaining method
> from the async registered callbacks (v4l2_of_subdev_registered()
> and the prep patches for that). For now, I've removed the use of
> v4l2_of_subdev_registered() for the vidmux driver's registered
> callback. This doesn't affect the functionality of this driver,
> but allows for it to be merged now, before adding the chaining
> support.
>
> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
> ---
> .../bindings/media/video-multiplexer.txt | 59 +++
> drivers/media/platform/Kconfig | 8 +
> drivers/media/platform/Makefile | 2 +
> drivers/media/platform/video-multiplexer.c | 472 +++++++++++++++++++++
> 4 files changed, 541 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/video-multiplexer.txt
> create mode 100644 drivers/media/platform/video-multiplexer.c
>
> diff --git a/Documentation/devicetree/bindings/media/video-multiplexer.txt b/Documentation/devicetree/bindings/media/video-multiplexer.txt
> new file mode 100644
> index 0000000..9d133d9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/video-multiplexer.txt
> @@ -0,0 +1,59 @@
> +Video Multiplexer
> +=================
> +
> +Video multiplexers allow to select between multiple input ports. Video received
> +on the active input port is passed through to the output port. Muxes described
> +by this binding may be controlled by a syscon register bitfield or by a GPIO.
> +
> +Required properties:
> +- compatible : should be "video-multiplexer"
This should have an SoC/chip specific compatible string additionally.
Just need a note to that effect here, but i.MX will need a compat
string.
> +- reg: should be register base of the register containing the control bitfield
> +- bit-mask: bitmask of the control bitfield in the control register
> +- bit-shift: bit offset of the control bitfield in the control register
> +- gpios: alternatively to reg, bit-mask, and bit-shift, a single GPIO phandle
> + may be given to switch between two inputs
> +- #address-cells: should be <1>
> +- #size-cells: should be <0>
> +- port@*: at least three port nodes containing endpoints connecting to the
> + source and sink devices according to of_graph bindings. The last port is
> + the output port, all others are inputs.
^ permalink raw reply
* [PATCH v1 1/3] dt: bindings: add thermal device driver for zx2967
From: Rob Herring @ 2017-01-10 5:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483767488-19778-1-git-send-email-baoyou.xie@linaro.org>
On Sat, Jan 07, 2017 at 01:38:06PM +0800, Baoyou Xie wrote:
> This patch adds dt-binding documentation for zx2967 family thermal sensor.
>
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
> ---
> .../devicetree/bindings/thermal/zx2967-thermal.txt | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/zx2967-thermal.txt
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v5 2/3] dmaeninge: xilinx_dma: Fix bug in multiple frame stores scenario in vdma
From: Rob Herring @ 2017-01-10 5:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483771530-8545-3-git-send-email-appanad@xilinx.com>
On Sat, Jan 07, 2017 at 12:15:29PM +0530, Kedareswara rao Appana wrote:
> When VDMA is configured for more than one frame in the h/w
> for example h/w is configured for n number of frames and user
> Submits n number of frames and triggered the DMA using issue_pending API.
> In the current driver flow we are submitting one frame at a time
> but we should submit all the n number of frames at one time as the h/w
> Is configured for n number of frames.
>
> This patch fixes this issue.
>
> Reviewed-by: Jose Abreu <joabreu@synopsys.com>
> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
> ---
> Changes for v5:
> ---> Updated xlnx,fstore-config property to xlnx,fstore-enable
> and updated description as suggested by Rob.
> Changes for v4:
> ---> Add Check for framestore configuration on Transmit case as well
> as suggested by Jose Abreu.
> ---> Modified the dev_dbg checks to dev_warn checks as suggested
> by Jose Abreu.
> Changes for v3:
> ---> Added Checks for frame store configuration. If frame store
> Configuration is not present at the h/w level and user
> Submits less frames added debug prints in the driver as relevant.
> Changes for v2:
> ---> Fixed race conditions in the driver as suggested by Jose Abreu
> ---> Fixed unnecessray if else checks in the vdma_start_transfer
> as suggested by Laurent Pinchart.
>
> .../devicetree/bindings/dma/xilinx/xilinx_dma.txt | 2 +
Acked-by: Rob Herring <robh@kernel.org>
> drivers/dma/xilinx/xilinx_dma.c | 78 +++++++++++++++-------
> 2 files changed, 57 insertions(+), 23 deletions(-)
^ permalink raw reply
* [PATCH RFC 3/4] dt-bindings: correct marvell orion MDIO binding document
From: Rob Herring @ 2017-01-10 5:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E1cPpAk-0005uJ-TM@rmk-PC.armlinux.org.uk>
On Sat, Jan 07, 2017 at 11:28:30AM +0000, Russell King wrote:
> Correct the Marvell Orion MDIO binding document to properly reflect the
> cases where an interrupt is present. Augment the examples to show this.
>
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> ---
> .../devicetree/bindings/net/marvell-orion-mdio.txt | 17 +++++++++++++++--
> 1 file changed, 15 insertions(+), 2 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 1/4] Documentation: devicetree: Add vendor prefix for AsiaRF
From: Rob Herring @ 2017-01-10 5:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170108133100.10428-2-afaerber@suse.de>
On Sun, Jan 08, 2017 at 02:30:57PM +0100, Andreas F?rber wrote:
> Signed-off-by: Andreas F?rber <afaerber@suse.de>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 2/4] Documentation: devicetree: arm: mediatek: Add Geek Force board
From: Rob Herring @ 2017-01-10 5:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170108133100.10428-3-afaerber@suse.de>
On Sun, Jan 08, 2017 at 02:30:58PM +0100, Andreas F?rber wrote:
> Signed-off-by: Andreas F?rber <afaerber@suse.de>
> ---
> Documentation/devicetree/bindings/arm/mediatek.txt | 3 +++
> 1 file changed, 3 insertions(+)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v4 1/2] ARM: dts: at91: add devicetree for the Axentia TSE-850
From: Rob Herring @ 2017-01-10 5:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483951529-11738-2-git-send-email-peda@axentia.se>
On Mon, Jan 09, 2017 at 09:45:28AM +0100, Peter Rosin wrote:
> Signed-off-by: Peter Rosin <peda@axentia.se>
> ---
> Documentation/devicetree/bindings/arm/axentia.txt | 19 ++
> MAINTAINERS | 8 +
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/at91-linea.dtsi | 53 +++++
> arch/arm/boot/dts/at91-tse850-3.dts | 274 ++++++++++++++++++++++
> 5 files changed, 355 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/axentia.txt
> create mode 100644 arch/arm/boot/dts/at91-linea.dtsi
> create mode 100644 arch/arm/boot/dts/at91-tse850-3.dts
>
> diff --git a/Documentation/devicetree/bindings/arm/axentia.txt b/Documentation/devicetree/bindings/arm/axentia.txt
> new file mode 100644
> index 000000000000..ea3fb96ae465
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/axentia.txt
> @@ -0,0 +1,19 @@
> +Device tree bindings for Axentia ARM devices
> +============================================
> +
> +Linea CPU module
> +----------------
> +
> +Required root node properties:
> +compatible = "axentia,linea",
> + "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
> +and following the rules from atmel-at91.txt for a sama5d31 SoC.
> +
> +
> +TSE-850 v3 board
> +----------------
> +
> +Required root node properties:
> +compatible = "axentia,tse850v3", "axentia,linea",
> + "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
> +and following the rules from above for the axentia,linea CPU module.
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 97b78cc5aa51..5c2ea6e9cd7f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2346,6 +2346,14 @@ S: Maintained
> F: Documentation/devicetree/bindings/sound/axentia,*
> F: sound/soc/atmel/tse850-pcm5142.c
>
> +AXENTIA ARM DEVICES
> +M: Peter Rosin <peda@axentia.se>
> +L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
> +S: Maintained
> +F: Documentation/devicetree/bindings/arm/axentia.txt
> +F: arch/arm/boot/dts/at91-linea.dtsi
> +F: arch/arm/boot/dts/at91-tse850-3.dts
> +
> AZ6007 DVB DRIVER
> M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
> M: Mauro Carvalho Chehab <mchehab@kernel.org>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 9a7375c388a8..7632849866de 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -48,6 +48,7 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
> at91-kizbox2.dtb \
> at91-sama5d2_xplained.dtb \
> at91-sama5d3_xplained.dtb \
> + at91-tse850-3.dtb \
> sama5d31ek.dtb \
> sama5d33ek.dtb \
> sama5d34ek.dtb \
> diff --git a/arch/arm/boot/dts/at91-linea.dtsi b/arch/arm/boot/dts/at91-linea.dtsi
> new file mode 100644
> index 000000000000..20d982153a45
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-linea.dtsi
> @@ -0,0 +1,53 @@
> +/*
> + * at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
> + *
> + * Copyright (C) 2017 Axentia Technologies AB
> + *
> + * Author: Peter Rosin <peda@axentia.se>
> + *
> + * Licensed under GPLv2 or later.
> + */
> +
> +#include "sama5d31.dtsi"
> +
> +/ {
> + compatible = "axentia,linea",
> + "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
> +
> + memory {
memory at 20000000 is preferred though if that causes bootloader problems
this is fine.
Acked-by: Rob Herring <robh@kernel.org>
Rob
^ permalink raw reply
* [PATCH v4 1/2] ARM: dts: at91: add devicetree for the Axentia TSE-850
From: Peter Rosin @ 2017-01-10 6:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170110053606.sqtnsbuawwa6s535@rob-hp-laptop>
On 2017-01-10 06:36, Rob Herring wrote:
> On Mon, Jan 09, 2017 at 09:45:28AM +0100, Peter Rosin wrote:
>> Signed-off-by: Peter Rosin <peda@axentia.se>
>> ---
>> Documentation/devicetree/bindings/arm/axentia.txt | 19 ++
>> MAINTAINERS | 8 +
>> arch/arm/boot/dts/Makefile | 1 +
>> arch/arm/boot/dts/at91-linea.dtsi | 53 +++++
>> arch/arm/boot/dts/at91-tse850-3.dts | 274 ++++++++++++++++++++++
>> 5 files changed, 355 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/arm/axentia.txt
>> create mode 100644 arch/arm/boot/dts/at91-linea.dtsi
>> create mode 100644 arch/arm/boot/dts/at91-tse850-3.dts
>>
>> diff --git a/Documentation/devicetree/bindings/arm/axentia.txt b/Documentation/devicetree/bindings/arm/axentia.txt
>> new file mode 100644
>> index 000000000000..ea3fb96ae465
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/axentia.txt
>> @@ -0,0 +1,19 @@
>> +Device tree bindings for Axentia ARM devices
>> +============================================
>> +
>> +Linea CPU module
>> +----------------
>> +
>> +Required root node properties:
>> +compatible = "axentia,linea",
>> + "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
>> +and following the rules from atmel-at91.txt for a sama5d31 SoC.
>> +
>> +
>> +TSE-850 v3 board
>> +----------------
>> +
>> +Required root node properties:
>> +compatible = "axentia,tse850v3", "axentia,linea",
>> + "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
>> +and following the rules from above for the axentia,linea CPU module.
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 97b78cc5aa51..5c2ea6e9cd7f 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -2346,6 +2346,14 @@ S: Maintained
>> F: Documentation/devicetree/bindings/sound/axentia,*
>> F: sound/soc/atmel/tse850-pcm5142.c
>>
>> +AXENTIA ARM DEVICES
>> +M: Peter Rosin <peda@axentia.se>
>> +L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
>> +S: Maintained
>> +F: Documentation/devicetree/bindings/arm/axentia.txt
>> +F: arch/arm/boot/dts/at91-linea.dtsi
>> +F: arch/arm/boot/dts/at91-tse850-3.dts
>> +
>> AZ6007 DVB DRIVER
>> M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
>> M: Mauro Carvalho Chehab <mchehab@kernel.org>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 9a7375c388a8..7632849866de 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -48,6 +48,7 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
>> at91-kizbox2.dtb \
>> at91-sama5d2_xplained.dtb \
>> at91-sama5d3_xplained.dtb \
>> + at91-tse850-3.dtb \
>> sama5d31ek.dtb \
>> sama5d33ek.dtb \
>> sama5d34ek.dtb \
>> diff --git a/arch/arm/boot/dts/at91-linea.dtsi b/arch/arm/boot/dts/at91-linea.dtsi
>> new file mode 100644
>> index 000000000000..20d982153a45
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/at91-linea.dtsi
>> @@ -0,0 +1,53 @@
>> +/*
>> + * at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
>> + *
>> + * Copyright (C) 2017 Axentia Technologies AB
>> + *
>> + * Author: Peter Rosin <peda@axentia.se>
>> + *
>> + * Licensed under GPLv2 or later.
>> + */
>> +
>> +#include "sama5d31.dtsi"
>> +
>> +/ {
>> + compatible = "axentia,linea",
>> + "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
>> +
>> + memory {
>
> memory at 20000000 is preferred though if that causes bootloader problems
> this is fine.
But then I get a dtb with one memory node from sama5d3.dtsi with
reg = <0x20000000 0x8000000> and one memory at 20000000 node with this
different reg content. Not pretty. Is that really preferred, even
if it works?
> Acked-by: Rob Herring <robh@kernel.org>
Thanks!
Cheers,
peda
^ permalink raw reply
* [PATCH v4 0/2] Add support rockchip,grf property for RK3399 PMU/GRU
From: Xing Zheng @ 2017-01-10 6:15 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
The structure rockchip_clk_provider needs to refer the GRF regmap
in somewhere, if the CRU node has not "rockchip,grf" property,
calling syscon_regmap_lookup_by_phandle will return an invalid GRF
regmap, and the MUXGRF type clock will be not supported.
Therefore, we need to add them.
Thanks.
Changes in v4:
- separte the binding patch
- update the decription for rockchip,grf property
Changes in v3:
- add optional roperty rockchip,grf in rockchip,rk3399-cru.txt
Changes in v2:
- referring pmugrf for PMUGRU
- fix the typo "invaild" in COMMIT message
Xing Zheng (2):
arm64: dts: rockchip: add "rockchip, grf" property for RK3399
PMUCRU/CRU
dt-bindings: clk: add rockchip,grf property for RK3399
Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt | 6 ++++++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
2 files changed, 8 insertions(+)
--
2.7.4
^ permalink raw reply
* [PATCH v4 1/2] arm64: dts: rockchip: add "rockchip, grf" property for RK3399 PMUCRU/CRU
From: Xing Zheng @ 2017-01-10 6:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1484028930-20305-1-git-send-email-zhengxing@rock-chips.com>
The structure rockchip_clk_provider needs to refer the GRF regmap
in somewhere, if the CRU node has not "rockchip,grf" property,
calling syscon_regmap_lookup_by_phandle will return an invalid GRF
regmap, and the MUXGRF type clock will be not supported.
Therefore, we need to add them.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
Changes in v4:
- separte the binding patch
Changes in v3:
- add optional roperty rockchip,grf in rockchip,rk3399-cru.txt
Changes in v2:
- referring pmugrf for PMUGRU
- fix the typo "invaild" in COMMIT message
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index c928015..081621b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1077,6 +1077,7 @@
pmucru: pmu-clock-controller at ff750000 {
compatible = "rockchip,rk3399-pmucru";
reg = <0x0 0xff750000 0x0 0x1000>;
+ rockchip,grf = <&pmugrf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&pmucru PLL_PPLL>;
@@ -1086,6 +1087,7 @@
cru: clock-controller at ff760000 {
compatible = "rockchip,rk3399-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
+ rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
--
2.7.4
^ permalink raw reply related
* [PATCH v4 2/2] dt-bindings: clk: add rockchip, grf property for RK3399
From: Xing Zheng @ 2017-01-10 6:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1484028930-20305-1-git-send-email-zhengxing@rock-chips.com>
Add support for rockchip,grf property which is used for GRF muxes
on RK3399.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
Changes in v4:
- update the decription for rockchip,grf property
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
index 3888dd3..3bc56fa 100644
--- a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
@@ -13,6 +13,12 @@ Required Properties:
- #clock-cells: should be 1.
- #reset-cells: should be 1.
+Optional Properties:
+
+- rockchip,grf: phandle to the syscon managing the "general register files".
+ It is used for GRF muxes, if missing any muxes present in the GRF will not
+ be available.
+
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume. All available clocks are defined as
preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be
--
2.7.4
^ permalink raw reply related
* [PATCH v5 2/2] ARM: dts: vf610-zii-dev: Add .dts file for rev. C
From: Shawn Guo @ 2017-01-10 6:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170107200654.26056-2-andrew.smirnov@gmail.com>
On Sat, Jan 07, 2017 at 12:06:54PM -0800, Andrey Smirnov wrote:
> Add .dts file for rev. C of the board by factoring out commonalities
> into a shared include file (vf610-zii-dev-rev-b-c.dtsi) and deriving
> revision specific file from it (vf610-zii-dev-rev-b.dts and
> vf610-zii-dev-reb-c.dts).
>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Russell King <linux@armlinux.org.uk>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: Stefan Agner <stefan@agner.ch>
> Cc: devicetree at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org
> Cc: andrew at lunn.ch
> Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
> Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
> Cc: cphealy at gmail.com
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
This patch doesn't apply to my imx/dt branch. Please rebase. Also
please ensure the copyright text is the correct one [1].
Shawn
[1] https://git.kernel.org/cgit/linux/kernel/git/shawnguo/linux.git/diff/?h=imx/dt&id=13283626c889fd5c03b485d54c924b795aca1c1e
^ permalink raw reply
* [PATCH v5 1/3] dmaengine: xilinx_dma: Check for channel idle state before submitting dma descriptor
From: Vinod Koul @ 2017-01-10 6:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483771530-8545-2-git-send-email-appanad@xilinx.com>
On Sat, Jan 07, 2017 at 12:15:28PM +0530, Kedareswara rao Appana wrote:
> Add channel idle state to ensure that dma descriptor is not
> submitted when VDMA engine is in progress.
any reason why you want to make your own varible and not use the HW to query
as done earlier. It is not clear to me why that is removed from description
>
> Reviewed-by: Jose Abreu <joabreu@synopsys.com>
> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
> ---
> Changes for v5:
> ---> None.
> Changes for v4:
> ---> None.
> Changes for v3:
> ---> None.
> Changes for v2:
> ---> Add idle check in the reset as suggested by Jose Abreu
> ---> Removed xilinx_dma_is_running/xilinx_dma_is_idle checks
> in the driver and used common idle checks across the driver
> as suggested by Laurent Pinchart.
>
> drivers/dma/xilinx/xilinx_dma.c | 56 +++++++++++++----------------------------
> 1 file changed, 17 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index 8288fe4..be7eb41 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -321,6 +321,7 @@ struct xilinx_dma_tx_descriptor {
> * @cyclic: Check for cyclic transfers.
> * @genlock: Support genlock mode
> * @err: Channel has errors
> + * @idle: Check for channel idle
> * @tasklet: Cleanup work after irq
> * @config: Device configuration info
> * @flush_on_fsync: Flush on Frame sync
> @@ -351,6 +352,7 @@ struct xilinx_dma_chan {
> bool cyclic;
> bool genlock;
> bool err;
> + bool idle;
> struct tasklet_struct tasklet;
> struct xilinx_vdma_config config;
> bool flush_on_fsync;
> @@ -920,32 +922,6 @@ static enum dma_status xilinx_dma_tx_status(struct dma_chan *dchan,
> }
>
> /**
> - * xilinx_dma_is_running - Check if DMA channel is running
> - * @chan: Driver specific DMA channel
> - *
> - * Return: '1' if running, '0' if not.
> - */
> -static bool xilinx_dma_is_running(struct xilinx_dma_chan *chan)
> -{
> - return !(dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) &
> - XILINX_DMA_DMASR_HALTED) &&
> - (dma_ctrl_read(chan, XILINX_DMA_REG_DMACR) &
> - XILINX_DMA_DMACR_RUNSTOP);
> -}
> -
> -/**
> - * xilinx_dma_is_idle - Check if DMA channel is idle
> - * @chan: Driver specific DMA channel
> - *
> - * Return: '1' if idle, '0' if not.
> - */
> -static bool xilinx_dma_is_idle(struct xilinx_dma_chan *chan)
> -{
> - return dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) &
> - XILINX_DMA_DMASR_IDLE;
> -}
> -
> -/**
> * xilinx_dma_halt - Halt DMA channel
> * @chan: Driver specific DMA channel
> */
> @@ -966,6 +942,7 @@ static void xilinx_dma_halt(struct xilinx_dma_chan *chan)
> chan, dma_ctrl_read(chan, XILINX_DMA_REG_DMASR));
> chan->err = true;
> }
> + chan->idle = true;
> }
>
> /**
> @@ -1007,6 +984,9 @@ static void xilinx_vdma_start_transfer(struct xilinx_dma_chan *chan)
> if (chan->err)
> return;
>
> + if (!chan->idle)
> + return;
> +
> if (list_empty(&chan->pending_list))
> return;
>
> @@ -1018,13 +998,6 @@ static void xilinx_vdma_start_transfer(struct xilinx_dma_chan *chan)
> tail_segment = list_last_entry(&tail_desc->segments,
> struct xilinx_vdma_tx_segment, node);
>
> - /* If it is SG mode and hardware is busy, cannot submit */
> - if (chan->has_sg && xilinx_dma_is_running(chan) &&
> - !xilinx_dma_is_idle(chan)) {
> - dev_dbg(chan->dev, "DMA controller still busy\n");
> - return;
> - }
> -
> /*
> * If hardware is idle, then all descriptors on the running lists are
> * done, start new transfers
> @@ -1110,6 +1083,7 @@ static void xilinx_vdma_start_transfer(struct xilinx_dma_chan *chan)
> vdma_desc_write(chan, XILINX_DMA_REG_VSIZE, last->hw.vsize);
> }
>
> + chan->idle = false;
> if (!chan->has_sg) {
> list_del(&desc->node);
> list_add_tail(&desc->node, &chan->active_list);
> @@ -1136,6 +1110,9 @@ static void xilinx_cdma_start_transfer(struct xilinx_dma_chan *chan)
> if (chan->err)
> return;
>
> + if (!chan->idle)
> + return;
> +
> if (list_empty(&chan->pending_list))
> return;
>
> @@ -1181,6 +1158,7 @@ static void xilinx_cdma_start_transfer(struct xilinx_dma_chan *chan)
>
> list_splice_tail_init(&chan->pending_list, &chan->active_list);
> chan->desc_pendingcount = 0;
> + chan->idle = false;
> }
>
> /**
> @@ -1196,15 +1174,11 @@ static void xilinx_dma_start_transfer(struct xilinx_dma_chan *chan)
> if (chan->err)
> return;
>
> - if (list_empty(&chan->pending_list))
> + if (!chan->idle)
> return;
>
> - /* If it is SG mode and hardware is busy, cannot submit */
> - if (chan->has_sg && xilinx_dma_is_running(chan) &&
> - !xilinx_dma_is_idle(chan)) {
> - dev_dbg(chan->dev, "DMA controller still busy\n");
> + if (list_empty(&chan->pending_list))
> return;
> - }
>
> head_desc = list_first_entry(&chan->pending_list,
> struct xilinx_dma_tx_descriptor, node);
> @@ -1302,6 +1276,7 @@ static void xilinx_dma_start_transfer(struct xilinx_dma_chan *chan)
>
> list_splice_tail_init(&chan->pending_list, &chan->active_list);
> chan->desc_pendingcount = 0;
> + chan->idle = false;
> }
>
> /**
> @@ -1366,6 +1341,7 @@ static int xilinx_dma_reset(struct xilinx_dma_chan *chan)
> }
>
> chan->err = false;
> + chan->idle = true;
>
> return err;
> }
> @@ -1447,6 +1423,7 @@ static irqreturn_t xilinx_dma_irq_handler(int irq, void *data)
> if (status & XILINX_DMA_DMASR_FRM_CNT_IRQ) {
> spin_lock(&chan->lock);
> xilinx_dma_complete_descriptor(chan);
> + chan->idle = true;
> chan->start_transfer(chan);
> spin_unlock(&chan->lock);
> }
> @@ -2327,6 +2304,7 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev,
> chan->has_sg = xdev->has_sg;
> chan->desc_pendingcount = 0x0;
> chan->ext_addr = xdev->ext_addr;
> + chan->idle = true;
>
> spin_lock_init(&chan->lock);
> INIT_LIST_HEAD(&chan->pending_list);
> --
> 2.1.2
>
--
~Vinod
^ permalink raw reply
* [PATCH 2/3][v3] arm64: freescale: ls2080a: Split devicetree for code resuability
From: Shawn Guo @ 2017-01-10 6:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483938896-2221-3-git-send-email-abhimanyu.saini@nxp.com>
On Mon, Jan 09, 2017 at 10:44:55AM +0530, Abhimanyu Saini wrote:
> LS2088A and LS2080A are similar SoCs with a few differences like
> ARM cores etc.
>
> Reorganize the LS2080A device tree to move the common nodes to:
> - fsl-ls208xa.dtsi
> - fsl-ls208xa-rdb.dtsi
> - fsl-ls208xa-qds.dtsi
These 3 new files are missing.
>
> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
> ---
> Changes for v3:
> - rename dts/dtsi files
>
> arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 154 +----
> arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 106 +---
> arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 715 +---------------------
> 3 files changed, 26 insertions(+), 949 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
> index 8bc1f8f..3cf4a5c 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
> @@ -1,8 +1,9 @@
> /*
> * Device Tree file for Freescale LS2080a QDS Board.
> *
> - * Copyright (C) 2015, Freescale Semiconductor
> + * Copyright (C) 2015-17, Freescale Semiconductor
> *
> + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
> * Bhupesh Sharma <bhupesh.sharma@freescale.com>
> *
> * This file is dual-licensed: you can use it either under the terms
<snip>
> -&sata0 {
> - status = "okay";
> -};
> -
> -&sata1 {
> - status = "okay";
> -};
> -
> -&usb0 {
> - status = "okay";
> -};
> -
> -&usb1 {
> - status = "okay";
> -};
> +#include "fsl-ls208xa-qds.dtsi"
Can we put such includes just at the beginning of the file (after
licence section)?
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
> index 2ff46ca..d5224fb 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
> @@ -62,108 +62,4 @@
> };
> };
>
<snip>
> -&usb0 {
> - status = "okay";
> -};
> -
> -&usb1 {
> - status = "okay";
> -};
> +#include "fsl-ls208xa-rdb.dtsi"
Ditto
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
> index e5935f2..35801f3 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
> @@ -1,8 +1,9 @@
> /*
> * Device Tree Include file for Freescale Layerscape-2080A family SoC.
> *
> - * Copyright (C) 2014-2015, Freescale Semiconductor
> + * Copyright (C) 2014-2017, Freescale Semiconductor
> *
> + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
> * Bhupesh Sharma <bhupesh.sharma@freescale.com>
> *
> * This file is dual-licensed: you can use it either under the terms
> @@ -149,697 +150,25 @@
> };
> };
>
> - memory at 80000000 {
> - device_type = "memory";
> - reg = <0x00000000 0x80000000 0 0x80000000>;
> - /* DRAM space - 1, size : 2 GB DRAM */
> - };
<snip>
> - ddr1: memory-controller at 1080000 {
> - compatible = "fsl,qoriq-memory-controller";
> - reg = <0x0 0x1080000 0x0 0x1000>;
> - interrupts = <0 17 0x4>;
> - little-endian;
> - };
> + #include "fsl-ls208xa.dtsi"
Ditto
Shawn
> +};
^ permalink raw reply
* [PATCH v5 2/3] dmaeninge: xilinx_dma: Fix bug in multiple frame stores scenario in vdma
From: Vinod Koul @ 2017-01-10 6:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483771530-8545-3-git-send-email-appanad@xilinx.com>
On Sat, Jan 07, 2017 at 12:15:29PM +0530, Kedareswara rao Appana wrote:
> When VDMA is configured for more than one frame in the h/w
> for example h/w is configured for n number of frames and user
> Submits n number of frames and triggered the DMA using issue_pending API.
title case in middle if sentence, no commas, can you make it easier to read
please..
> In the current driver flow we are submitting one frame at a time
> but we should submit all the n number of frames at one time as the h/w
> Is configured for n number of frames.
s/Is/is
>
> This patch fixes this issue.
>
> Reviewed-by: Jose Abreu <joabreu@synopsys.com>
> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
> ---
> Changes for v5:
> ---> Updated xlnx,fstore-config property to xlnx,fstore-enable
> and updated description as suggested by Rob.
> Changes for v4:
> ---> Add Check for framestore configuration on Transmit case as well
> as suggested by Jose Abreu.
> ---> Modified the dev_dbg checks to dev_warn checks as suggested
> by Jose Abreu.
> Changes for v3:
> ---> Added Checks for frame store configuration. If frame store
> Configuration is not present at the h/w level and user
> Submits less frames added debug prints in the driver as relevant.
> Changes for v2:
> ---> Fixed race conditions in the driver as suggested by Jose Abreu
> ---> Fixed unnecessray if else checks in the vdma_start_transfer
> as suggested by Laurent Pinchart.
>
> .../devicetree/bindings/dma/xilinx/xilinx_dma.txt | 2 +
> drivers/dma/xilinx/xilinx_dma.c | 78 +++++++++++++++-------
> 2 files changed, 57 insertions(+), 23 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> index a2b8bfa..e951c09 100644
> --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> @@ -66,6 +66,8 @@ Optional child node properties:
> Optional child node properties for VDMA:
> - xlnx,genlock-mode: Tells Genlock synchronization is
> enabled/disabled in hardware.
> +- xlnx,fstore-enable: boolean; if defined, it indicates that controller
> + supports frame store configuration.
> Optional child node properties for AXI DMA:
> -dma-channels: Number of dma channels in child node.
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index be7eb41..0e9c02e 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -322,6 +322,7 @@ struct xilinx_dma_tx_descriptor {
> * @genlock: Support genlock mode
> * @err: Channel has errors
> * @idle: Check for channel idle
> + * @has_fstoreen: Check for frame store configuration
> * @tasklet: Cleanup work after irq
> * @config: Device configuration info
> * @flush_on_fsync: Flush on Frame sync
> @@ -353,6 +354,7 @@ struct xilinx_dma_chan {
> bool genlock;
> bool err;
> bool idle;
> + bool has_fstoreen;
> struct tasklet_struct tasklet;
> struct xilinx_vdma_config config;
> bool flush_on_fsync;
> @@ -990,6 +992,27 @@ static void xilinx_vdma_start_transfer(struct xilinx_dma_chan *chan)
> if (list_empty(&chan->pending_list))
> return;
>
> + /*
> + * Note: When VDMA is built with default h/w configuration
> + * User should submit frames upto H/W configured.
> + * If users submits less than h/w configured
> + * VDMA engine tries to write to a invalid location
> + * Results undefined behaviour/memory corruption.
> + *
> + * If user would like to submit frames less than h/w capable
> + * On S2MM side please enable debug info 13 at the h/w level
> + * On MM2S side please enable debug info 6 at the h/w level
> + * It will allows the frame buffers numbers to be modified at runtime.
> + */
> + if (!chan->has_fstoreen &&
> + chan->desc_pendingcount < chan->num_frms) {
> + dev_warn(chan->dev, "Frame Store Configuration is not enabled at the\n");
> + dev_warn(chan->dev, "H/w level enable Debug info 13 or 6 at the h/w level\n");
> + dev_warn(chan->dev, "OR Submit the frames upto h/w Capable\n\r");
> +
> + return;
> + }
> +
> desc = list_first_entry(&chan->pending_list,
> struct xilinx_dma_tx_descriptor, node);
> tail_desc = list_last_entry(&chan->pending_list,
> @@ -1052,25 +1075,38 @@ static void xilinx_vdma_start_transfer(struct xilinx_dma_chan *chan)
> if (chan->has_sg) {
> dma_ctrl_write(chan, XILINX_DMA_REG_TAILDESC,
> tail_segment->phys);
> + list_splice_tail_init(&chan->pending_list, &chan->active_list);
> + chan->desc_pendingcount = 0;
> } else {
> struct xilinx_vdma_tx_segment *segment, *last = NULL;
> - int i = 0;
> + int i = 0, j = 0;
>
> if (chan->desc_submitcount < chan->num_frms)
> i = chan->desc_submitcount;
>
> - list_for_each_entry(segment, &desc->segments, node) {
> - if (chan->ext_addr)
> - vdma_desc_write_64(chan,
> - XILINX_VDMA_REG_START_ADDRESS_64(i++),
> - segment->hw.buf_addr,
> - segment->hw.buf_addr_msb);
> - else
> - vdma_desc_write(chan,
> - XILINX_VDMA_REG_START_ADDRESS(i++),
> - segment->hw.buf_addr);
> -
> - last = segment;
> + for (j = 0; j < chan->num_frms; ) {
> + list_for_each_entry(segment, &desc->segments, node) {
> + if (chan->ext_addr)
> + vdma_desc_write_64(chan,
> + XILINX_VDMA_REG_START_ADDRESS_64(i++),
> + segment->hw.buf_addr,
> + segment->hw.buf_addr_msb);
> + else
> + vdma_desc_write(chan,
> + XILINX_VDMA_REG_START_ADDRESS(i++),
> + segment->hw.buf_addr);
> +
> + last = segment;
> + }
> + list_del(&desc->node);
> + list_add_tail(&desc->node, &chan->active_list);
> + j++;
> + if (list_empty(&chan->pending_list) ||
> + (i == chan->num_frms))
> + break;
> + desc = list_first_entry(&chan->pending_list,
> + struct xilinx_dma_tx_descriptor,
> + node);
> }
>
> if (!last)
> @@ -1081,20 +1117,14 @@ static void xilinx_vdma_start_transfer(struct xilinx_dma_chan *chan)
> vdma_desc_write(chan, XILINX_DMA_REG_FRMDLY_STRIDE,
> last->hw.stride);
> vdma_desc_write(chan, XILINX_DMA_REG_VSIZE, last->hw.vsize);
> - }
>
> - chan->idle = false;
> - if (!chan->has_sg) {
> - list_del(&desc->node);
> - list_add_tail(&desc->node, &chan->active_list);
> - chan->desc_submitcount++;
> - chan->desc_pendingcount--;
> + chan->desc_submitcount += j;
> + chan->desc_pendingcount -= j;
> if (chan->desc_submitcount == chan->num_frms)
> chan->desc_submitcount = 0;
> - } else {
> - list_splice_tail_init(&chan->pending_list, &chan->active_list);
> - chan->desc_pendingcount = 0;
> }
> +
> + chan->idle = false;
> }
>
> /**
> @@ -1342,6 +1372,7 @@ static int xilinx_dma_reset(struct xilinx_dma_chan *chan)
>
> chan->err = false;
> chan->idle = true;
> + chan->desc_submitcount = 0;
>
> return err;
> }
> @@ -2315,6 +2346,7 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev,
> has_dre = of_property_read_bool(node, "xlnx,include-dre");
>
> chan->genlock = of_property_read_bool(node, "xlnx,genlock-mode");
> + chan->has_fstoreen = of_property_read_bool(node, "xlnx,fstore-enable");
>
> err = of_property_read_u32(node, "xlnx,datawidth", &value);
> if (err) {
> --
> 2.1.2
>
--
~Vinod
^ permalink raw reply
* [PATCH 0/3][v3] Add QorIQ LS2088A platform support
From: Shawn Guo @ 2017-01-10 6:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483938896-2221-1-git-send-email-abhimanyu.saini@nxp.com>
On Mon, Jan 09, 2017 at 10:44:53AM +0530, Abhimanyu Saini wrote:
> Abhimanyu Saini (3):
> dt-bindings: Add compatible for LS2088A QDS and RDB board
> arm64: freescale: ls2080a: Split devicetree for code resuability
"arm64: dts: ls2080a: ..."
> arm64: freescale: ls2088a: Add DTS support for FSL's LS2088A SoC
"arm64: dts: ls2088a: ..."
Shawn
^ permalink raw reply
* [PATCH 1/1] ARM: dts: add Armadeus Systems OPOS6UL AND OPOS6ULDEV support
From: Shawn Guo @ 2017-01-10 6:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483977618-18298-1-git-send-email-sebastien.szymanski@armadeus.com>
On Mon, Jan 09, 2017 at 05:00:18PM +0100, S?bastien Szymanski wrote:
> OPOS6UL is an i.MX6UL based SoM.
> OPOS6ULDev is a carrier board for the OPOS6UL SoM.
>
> For more details see:
> http://www.opossom.com/english/products-processor_boards-opos6ul.html
> http://www.opossom.com/english/products-development_boards-opos6ul_dev.html
>
> Signed-off-by: S?bastien Szymanski <sebastien.szymanski@armadeus.com>
s/AND/and in patch subject.
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6ul-opos6ul.dtsi | 192 +++++++++++++++
> arch/arm/boot/dts/imx6ul-opos6uldev.dts | 414 ++++++++++++++++++++++++++++++++
> 3 files changed, 607 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6ul-opos6ul.dtsi
> create mode 100644 arch/arm/boot/dts/imx6ul-opos6uldev.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 7327250..f839c75 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -435,6 +435,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
> imx6ul-14x14-evk.dtb \
> imx6ul-geam-kit.dtb \
> imx6ul-liteboard.dtb \
> + imx6ul-opos6uldev.dtb \
> imx6ul-pico-hobbit.dtb \
> imx6ul-tx6ul-0010.dtb \
> imx6ul-tx6ul-0011.dtb \
> diff --git a/arch/arm/boot/dts/imx6ul-opos6ul.dtsi b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
> new file mode 100644
> index 0000000..4673dde
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
> @@ -0,0 +1,192 @@
> +/*
> + * Copyright 2016 Armadeus Systems <support@armadeus.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public
> + * License along with this file; if not, write to the Free
> + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "imx6ul.dtsi"
> +
> +/ {
> + memory {
> + reg = <0x80000000 0>; /* will be filled by U-Boot */
> + };
> +
> + reg_3v3: regulator-3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + usdhc3_pwrseq: usdhc3_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&fec1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet1>;
> + phy-mode = "rmii";
> + phy-reset-duration = <1>;
> + phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
> + phy-handle = <ðphy1>;
> + phy-supply = <®_3v3>;
> + status = "okay";
> +
> + mdio: mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethphy1: ethernet-phy at 1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <1>;
> + interrupt-parent = <&gpio4>;
> + interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
> + status = "okay";
> + };
> + };
> +};
> +
> +/* Bluetooth */
> +&uart8 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart8>;
> + fsl,uart-has-rtscts;
Use generic one "uart-has-rtscts" instead.
> + status = "okay";
> +};
> +
> +/* eMMC */
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1>;
> + bus-width = <8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +/* WiFi */
> +&usdhc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc2>;
> + bus-width = <4>;
> + no-1-8-v;
> + non-removable;
> + mmc-pwrseq = <&usdhc3_pwrseq>;
> + status = "okay";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + brcmf: bcrmf at 1 {
> + compatible = "brcm,bcm4329-fmac";
> + reg = <1>;
> + interrupt-parent = <&gpio2>;
> + interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "host-wake";
> + };
> +};
> +
> +&iomuxc {
> + pinctrl_enet1: enet1grp {
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
> + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
> + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x130b0
> + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x130b0
> + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x130b0
> + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x130b0
> + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
> + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
> + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
> + /* INT# */
> + MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x1b0b0
> + /* RST# */
> + MX6UL_PAD_NAND_DATA00__GPIO4_IO02 0x130b0
> + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
> + >;
> + };
> +
> + pinctrl_uart8: uart8grp {
> + fsl,pins = <
> + MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX 0x1b0b0
> + MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX 0x1b0b0
> + MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS 0x1b0b0
> + MX6UL_PAD_ENET2_TX_CLK__UART8_DCE_CTS 0x1b0b0
> + /* BT_REG_ON */
> + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x130b0
> + >;
> + };
> +
> + pinctrl_usdhc1: usdhc1grp {
> + fsl,pins = <
> + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
> + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
> + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
> + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
> + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
> + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
> + MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x17059
> + MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5 0x17059
> + MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6 0x17059
> + MX6UL_PAD_NAND_CLE__USDHC1_DATA7 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc2: usdhc2grp {
> + fsl,pins = <
> + MX6UL_PAD_LCD_DATA18__USDHC2_CMD 0x1b0b0
> + MX6UL_PAD_LCD_DATA19__USDHC2_CLK 0x100b0
> + MX6UL_PAD_LCD_DATA20__USDHC2_DATA0 0x1b0b0
> + MX6UL_PAD_LCD_DATA21__USDHC2_DATA1 0x1b0b0
> + MX6UL_PAD_LCD_DATA22__USDHC2_DATA2 0x1b0b0
> + MX6UL_PAD_LCD_DATA23__USDHC2_DATA3 0x1b0b0
> + /* WL_REG_ON */
> + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x130b0
> + /* WL_IRQ */
> + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x1b0b0
> + >;
> + };
> +};
> diff --git a/arch/arm/boot/dts/imx6ul-opos6uldev.dts b/arch/arm/boot/dts/imx6ul-opos6uldev.dts
> new file mode 100644
> index 0000000..a373562
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6ul-opos6uldev.dts
> @@ -0,0 +1,414 @@
> +/*
> + * Copyright 2016 Armadeus Systems <support@armadeus.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public
> + * License along with this file; if not, write to the Free
> + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "imx6ul-opos6ul.dtsi"
> +
> +/ {
> + model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board";
> + compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul";
> +
> + chosen {
> + stdout-path = &uart1;
> + };
> +
> + lcd_backlight {
s/lcd_backlight/backlight. The node name should be generic, while label
name can be specific.
> + compatible = "pwm-backlight";
> + pwms = <&pwm3 0 191000>;
> + brightness-levels = <0 4 8 16 32 64 128 255>;
> + default-brightness-level = <7>;
> + power-supply = <®_5v>;
> + status = "okay";
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_keys>;
> +
> + user-button {
> + label = "User button";
> + gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
> + linux,code = <BTN_MISC>;
> + wakeup-source;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + user_led {
Hyphen instead of underscore should be used in node name, while
underscore should be used in label name.
> + label = "User";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_led>;
> + gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + onewire {
> + compatible = "w1-gpio";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_w1>;
> + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
> + status = "okay";
The "status" line is not really needed for this case.
> + };
> +
> + reg_5v: regulator-5v {
> + compatible = "regulator-fixed";
> + regulator-name = "5V";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +
> + reg_usbotg1_vbus: regulator-usbotg1vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usbotg1vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg1_vbus>;
> + gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_usbotg2_vbus: regulator-usbotg2vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usbotg2vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg2_vbus>;
> + gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +};
> +
> +&pwm3 {
This node is not sorted.
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm3>;
> + status = "okay";
> +};
> +
> +&adc1 {
> + vref-supply = <®_3v3>;
> + status = "okay";
> +};
> +
> +&can1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + xceiver-supply = <®_5v>;
> + status = "okay";
> +};
> +
> +&can2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan2>;
> + xceiver-supply = <®_5v>;
> + status = "okay";
> +};
> +
> +&ecspi4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ecspi4>;
> + fsl,spi-num-chipselects = <2>;
This property is obsolete. Drop it.
> + cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +
> + spidev0: spi at 0 {
> + compatible = "spidev";
> + reg = <0>;
> + spi-max-frequency = <5000000>;
> + };
> +
> + spidev1: spi at 1 {
> + compatible = "spidev";
> + reg = <1>;
> + spi-max-frequency = <5000000>;
> + };
> +};
> +
> +&i2c1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + clock_frequency = <400000>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + clock_frequency = <400000>;
> + status = "okay";
> +};
> +
> +&lcdif {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_lcdif>;
> + display = <&display0>;
> + lcd-supply = <®_3v3>;
> + status = "okay";
> +
> + display0: display0 {
> + bits-per-pixel = <32>;
> + bus-width = <18>;
> +
> + display-timings {
> + timing0: timing0 {
> + clock-frequency = <33000033>;
> + hactive = <800>;
> + vactive = <480>;
> + hback-porch = <96>;
> + hfront-porch = <96>;
> + vback-porch = <20>;
> + vfront-porch = <21>;
> + hsync-len = <64>;
> + vsync-len = <4>;
> + de-active = <1>;
> + pixelclk-active = <0>;
> + };
> + };
> + };
> +};
> +
> +&snvs_pwrkey {
> + status = "disabled";
> +};
> +
> +&tsc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_tsc>;
> + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
> + measure-delay-time = <0xffff>;
> + pre-charge-time = <0xffff>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart1>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +&usbotg1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg1_id>;
> + vbus-supply = <®_usbotg1_vbus>;
> + dr_mode = "otg";
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbotg2 {
> + vbus-supply = <®_usbotg2_vbus>;
> + dr_mode = "host";
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpios>;
> +
> + pinctrl_pwm3: pwm3grp {
This one is not sorted.
> + fsl,pins = <
> + MX6UL_PAD_NAND_ALE__PWM3_OUT 0x1b0b0
> + >;
> + };
> +
> + pinctrl_ecspi4: ecspi4grp {
> + fsl,pins = <
> + MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b0b0
> + MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI 0x1b0b0
> + MX6UL_PAD_NAND_DATA06__ECSPI4_MISO 0x1b0b0
> + MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x1b0b0
> + MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x1b0b0
> + >;
> + };
> +
> + pinctrl_flexcan1: flexcan1grp {
> + fsl,pins = <
> + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0
> + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0
> + >;
> + };
> +
> + pinctrl_flexcan2: flexcan2grp {
> + fsl,pins = <
> + MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x0b0b0
> + MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x0b0b0
> + >;
> + };
> +
> + pinctrl_gpios: gpiosgrp {
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x0b0b0
> + MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x0b0b0
> + MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x0b0b0
> + MX6UL_PAD_NAND_RE_B__GPIO4_IO00 0x0b0b0
> + MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x0b0b0
> + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0b0b0
> + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0b0b0
> + MX6UL_PAD_NAND_WE_B__GPIO4_IO01 0x0b0b0
> + MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
> + MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
> + MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
> + MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
> + MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
> + MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
> + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
> + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
> + >;
> + };
> +
> + pinctrl_w1: w1grp {
> + fsl,pins = <
> + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
> + >;
> + };
> +
> + pinctrl_gpio_keys: gpio_keysgrp {
gpiokeysgrp
> + fsl,pins = <
> + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0b0b0
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
> + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
> + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
> + >;
> + };
> +
> + pinctrl_lcdif: lcdifgrp {
> + fsl,pins = <
> + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x100b1
> + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x100b1
> + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x100b1
> + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x100b1
> + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x100b1
> + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x100b1
> + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x100b1
> + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x100b1
> + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x100b1
> + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x100b1
> + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x100b1
> + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x100b1
> + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x100b1
> + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x100b1
> + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x100b1
> + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x100b1
> + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x100b1
> + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x100b1
> + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x100b1
> + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x100b1
> + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x100b1
> + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x100b1
> + >;
> + };
> +
> + pinctrl_led: ledgrp {
> + fsl,pins = <
> + MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x0b0b0
> + >;
> + };
> +
> + pinctrl_tsc: tscgrp {
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
> + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
> + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
> + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
> + >;
> + };
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
> + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
> + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbotg1_id: usbotg1_idgrp {
usbotg1idgrp
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x1b0b0
> + >;
> + };
> +
> + pinctrl_usbotg1_vbus: usbotg1_vbusgrp {
usbotg1vbusgrp
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0
> + >;
> + };
> +
> + pinctrl_usbotg2_vbus: usbotg2_vbusgrp {
usbotg2vbusgrp
Shawn
> + fsl,pins = <
> + MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
> + >;
> + };
> +};
> --
> 2.7.3
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH] clk: cs2000: add Suspend/Redume feature
From: Kuninori Morimoto @ 2017-01-10 6:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
CS2000 needs re-setup when redume, otherwise, it can't
handle correct clock rate.
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
[Kuninori: cleanup original patch]
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/clk/clk-cs2000-cp.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/clk/clk-cs2000-cp.c b/drivers/clk/clk-cs2000-cp.c
index 021f3da..3fca052 100644
--- a/drivers/clk/clk-cs2000-cp.c
+++ b/drivers/clk/clk-cs2000-cp.c
@@ -59,6 +59,10 @@ struct cs2000_priv {
struct i2c_client *client;
struct clk *clk_in;
struct clk *ref_clk;
+
+ /* suspend/resume */
+ unsigned long saved_rate;
+ unsigned long saved_parent_rate;
};
static const struct of_device_id cs2000_of_match[] = {
@@ -286,6 +290,9 @@ static int __cs2000_set_rate(struct cs2000_priv *priv, int ch,
if (ret < 0)
return ret;
+ priv->saved_rate = rate;
+ priv->saved_parent_rate = parent_rate;
+
return 0;
}
@@ -489,9 +496,24 @@ static int cs2000_probe(struct i2c_client *client,
return ret;
}
+static int cs2000_resume(struct device *dev)
+{
+ struct cs2000_priv *priv = dev_get_drvdata(dev);
+ int ch = 0; /* it uses ch0 only at this point */
+
+ return __cs2000_set_rate(priv, ch,
+ priv->saved_rate,
+ priv->saved_parent_rate);
+}
+
+static const struct dev_pm_ops cs2000_pm_ops = {
+ .resume_early = cs2000_resume,
+};
+
static struct i2c_driver cs2000_driver = {
.driver = {
.name = "cs2000-cp",
+ .pm = &cs2000_pm_ops,
.of_match_table = cs2000_of_match,
},
.probe = cs2000_probe,
--
1.9.1
^ permalink raw reply related
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