* [PATCH v2 2/2] arm64: process: dump memory around registers when displaying regs
From: Enric Balletbo i Serra @ 2017-04-25 13:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425134430.5545-1-enric.balletbo@collabora.com>
From: Greg Hackmann <ghackmann@google.com>
Dump a block of kernel memory from around the registers in the kernel oops
dump. This is behind a config option (DEBUG_AROUND_REGS), since it adds
a bunch of noise to the kernel logs (which someone can find valuable but
not everyone else will).
This is extremely useful in diagnosing remote crashes, and is based heavily
on original work by Michael Davidson <md@google.com> and San Mehat
<san@google.com>.
Signed-off-by: Greg Hackmann <ghackmann@google.com>
[rework to use dump_mem]
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Same as 1/2 but for arm64 architecture.
Changes since v1:
- Did not exists.
---
arch/arm64/include/asm/traps.h | 3 +++
arch/arm64/kernel/process.c | 26 ++++++++++++++++++++++++++
arch/arm64/kernel/traps.c | 4 ++--
3 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/traps.h b/arch/arm64/include/asm/traps.h
index 02e9035..140f642 100644
--- a/arch/arm64/include/asm/traps.h
+++ b/arch/arm64/include/asm/traps.h
@@ -60,4 +60,7 @@ static inline int in_exception_text(unsigned long ptr)
return in ? : __in_irqentry_text(ptr);
}
+void dump_mem(const char *lvl, const char *str, unsigned long bottom,
+ unsigned long top);
+
#endif
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index ae2a835..5ee2f48 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -58,6 +58,7 @@
#include <asm/mmu_context.h>
#include <asm/processor.h>
#include <asm/stacktrace.h>
+#include <asm/traps.h>
#ifdef CONFIG_CC_STACKPROTECTOR
#include <linux/stackprotector.h>
@@ -170,6 +171,28 @@ void machine_restart(char *cmd)
while (1);
}
+/*
+ * Dump a block of kernel memory from around the given address
+ */
+static void __show_regs_extra_data(struct pt_regs *regs, int nbytes)
+{
+#ifdef CONFIG_DEBUG_AROUND_REGS
+ int i;
+
+ dump_mem("", "PC ", regs->pc - nbytes, regs->pc + nbytes);
+ dump_mem("", "LR ", regs->regs[30] - nbytes, regs->regs[30] + nbytes);
+ dump_mem("", "SP ", regs->sp - nbytes, regs->sp + nbytes);
+
+ for (i = 0; i < 30; i++) {
+ char name[4];
+
+ snprintf(name, sizeof(name), "X%u", i);
+ dump_mem("", name, regs->regs[i] - nbytes,
+ regs->regs[i] + nbytes);
+ }
+#endif
+}
+
void __show_regs(struct pt_regs *regs)
{
int i, top_reg;
@@ -205,6 +228,9 @@ void __show_regs(struct pt_regs *regs)
pr_cont("\n");
}
+
+ if (!user_mode(regs))
+ __show_regs_extra_data(regs, 128);
}
void show_regs(struct pt_regs * regs)
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 1de444e..6d07675 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -59,8 +59,8 @@ int show_unhandled_signals = 1;
/*
* Dump out the contents of some kernel memory nicely...
*/
-static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
- unsigned long top)
+void dump_mem(const char *lvl, const char *str, unsigned long bottom,
+ unsigned long top)
{
unsigned long first;
mm_segment_t fs;
--
2.9.3
^ permalink raw reply related
* [PATCH V9 1/3] irq: Allow to pass the IRQF_TIMER flag with percpu irq request
From: Daniel Lezcano @ 2017-04-25 13:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a4faf3bb-1641-8b6d-3e15-9f8ef46c9411@arm.com>
On 25/04/2017 15:22, Marc Zyngier wrote:
> On 25/04/17 13:51, Daniel Lezcano wrote:
>> On Tue, Apr 25, 2017 at 11:21:21AM +0100, Marc Zyngier wrote:
>>> On 25/04/17 10:49, Daniel Lezcano wrote:
>>>> On Tue, Apr 25, 2017 at 10:10:12AM +0100, Marc Zyngier wrote:
>>>
>>> [...]
>>>
>>>>>> +static inline void setup_timings(struct irq_desc *desc, struct irqaction *act)
>>>>>> +{
>>>>>> + /*
>>>>>> + * We don't need the measurement because the idle code already
>>>>>> + * knows the next expiry event.
>>>>>> + */
>>>>>> + if (act->flags & __IRQF_TIMER)
>>>>>> + return;
>>>>>
>>>>> And that's where this is really wrong for the KVM guest timer. As I
>>>>> said, this timer is under complete control of the guest, and the rest of
>>>>> the system doesn't know about it. KVM itself will only find out when the
>>>>> vcpu does a VM exit for a reason or another, and will just save/restore
>>>>> the state in order to be able to give the timer to another guest.
>>>>>
>>>>> The idle code is very much *not* aware of anything concerning that guest
>>>>> timer.
>>>>
>>>> Just for my own curiosity, if there are two VM (VM1 and VM2). VM1 sets a timer1
>>>> at <time> and exits, VM2 runs and sets a timer2 at <time+delta>.
>>>>
>>>> The timer1 for VM1 is supposed to expire while VM2 is running. IIUC the virtual
>>>> timer is under control of VM2 and will expire at <time+delta>.
>>>>
>>>> Is the host wake up with the SW timer and switch in VM1 which in turn restores
>>>> the timer and jump in the virtual timer irq handler?
>>>
>>> Indeed. The SW timer causes VM1 to wake-up, either on the same CPU
>>> (preempting VM2) or on another. The timer is then restored with the
>>> pending virtual interrupt injected, and the guest does what it has to
>>> with it.
>>
>> Thanks for clarification.
>>
>> So there is a virtual timer with real registers / interruption (waking up the
>> host) for the running VMs and SW timers for non-running VMs.
>>
>> What is the benefit of having such mechanism instead of real timers injecting
>> interrupts in the VM without the virtual timer + save/restore? Efficiency in
>> the running VMs when setting up timers (saving privileges change overhead)?
>
>
> You can't dedicate HW resources to virtual CPUs. It just doesn't scale.
> Also, injecting HW interrupts in a guest is pretty hard work, and for
> multiple reasons:
> - the host needs to be in control of interrupt delivery (don't hog the
> CPU with guest interrupts)
> - you want to be able to remap interrupts (id X on the host becomes id
> Y on the guest),
> - you want to deal with migrating vcpus,
> - you want deliver an interrupt to a vcpu that is *not* running.
>
> It *is* doable, but it is not cheap at all from a HW point of view.
Ok, I see.
Thanks!
-- Daniel
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply
* [PATCH] arm64: pmuv3: handle pmuv3+
From: Jayachandran C @ 2017-04-25 13:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1493118530-5314-1-git-send-email-mark.rutland@arm.com>
On Tue, Apr 25, 2017 at 12:08:50PM +0100, Mark Rutland wrote:
> Commit f1b36dcb5c316c27 ("arm64: pmuv3: handle !PMUv3 when probing") is
> a little too restrictive, and prevents the use of of backwards
> compatible PMUv3 extenstions, which have a PMUver value other than 1.
>
> For instance, ARMv8.1 PMU extensions (as implemented by ThunderX2) are
> reported with PMUver value 4.
>
> Per the usual ID register principles, at least 0x1-0x7 imply a
> PMUv3-compatible PMU. It's not currently clear whether 0x8-0xe imply the
> same.
>
> For the time being, treat the value as signed, and with 0x1-0x7 treated
> as meaning PMUv3 is implemented. This may be relaxed by future patches.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Reported-by: Jayachandran C <jnair@caviumnetworks.com>
> Cc: Will Deacon <will.deacon@arm.com>
> ---
> arch/arm64/kernel/perf_event.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> Will, would you be happy to queue this fixup for v4.12?
>
> Thanks,
> Mark.
>
> diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
> index 98c7493..5f64d19 100644
> --- a/arch/arm64/kernel/perf_event.c
> +++ b/arch/arm64/kernel/perf_event.c
> @@ -966,13 +966,14 @@ static void __armv8pmu_probe_pmu(void *info)
> {
> struct armv8pmu_probe_info *probe = info;
> struct arm_pmu *cpu_pmu = probe->pmu;
> - u64 dfr0, pmuver;
> + u64 dfr0;
> u32 pmceid[2];
> + int pmuver;
>
> dfr0 = read_sysreg(id_aa64dfr0_el1);
> - pmuver = cpuid_feature_extract_unsigned_field(dfr0,
> + pmuver = cpuid_feature_extract_signed_field(dfr0,
> ID_AA64DFR0_PMUVER_SHIFT);
> - if (pmuver != 1)
> + if (pmuver < 1)
> return;
>
> probe->present = true;
The fixes the issue. So FWIW,
Tested-by: Jayachandran C <jnair@caviumnetworks.com>
Would appreciate it if this is queued with the ACPI PMU patchset which caused
the problem.
JC.
^ permalink raw reply
* [PATCH] arm64: pmuv3: handle pmuv3+
From: Will Deacon @ 2017-04-25 14:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1493118530-5314-1-git-send-email-mark.rutland@arm.com>
On Tue, Apr 25, 2017 at 12:08:50PM +0100, Mark Rutland wrote:
> Commit f1b36dcb5c316c27 ("arm64: pmuv3: handle !PMUv3 when probing") is
> a little too restrictive, and prevents the use of of backwards
> compatible PMUv3 extenstions, which have a PMUver value other than 1.
>
> For instance, ARMv8.1 PMU extensions (as implemented by ThunderX2) are
> reported with PMUver value 4.
>
> Per the usual ID register principles, at least 0x1-0x7 imply a
> PMUv3-compatible PMU. It's not currently clear whether 0x8-0xe imply the
> same.
>
> For the time being, treat the value as signed, and with 0x1-0x7 treated
> as meaning PMUv3 is implemented. This may be relaxed by future patches.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Reported-by: Jayachandran C <jnair@caviumnetworks.com>
> Cc: Will Deacon <will.deacon@arm.com>
> ---
> arch/arm64/kernel/perf_event.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
Acked-by: Will Deacon <will.deacon@arm.com>
> Will, would you be happy to queue this fixup for v4.12?
Catalin: please can you pick this up via arm64 with my Ack and
Jayachandran's tested-by?
Will
>
> Thanks,
> Mark.
>
> diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
> index 98c7493..5f64d19 100644
> --- a/arch/arm64/kernel/perf_event.c
> +++ b/arch/arm64/kernel/perf_event.c
> @@ -966,13 +966,14 @@ static void __armv8pmu_probe_pmu(void *info)
> {
> struct armv8pmu_probe_info *probe = info;
> struct arm_pmu *cpu_pmu = probe->pmu;
> - u64 dfr0, pmuver;
> + u64 dfr0;
> u32 pmceid[2];
> + int pmuver;
>
> dfr0 = read_sysreg(id_aa64dfr0_el1);
> - pmuver = cpuid_feature_extract_unsigned_field(dfr0,
> + pmuver = cpuid_feature_extract_signed_field(dfr0,
> ID_AA64DFR0_PMUVER_SHIFT);
> - if (pmuver != 1)
> + if (pmuver < 1)
> return;
>
> probe->present = true;
> --
> 1.9.1
>
^ permalink raw reply
* [PATCH] arm64/dma-mapping: fix DMA_ATTR_FORCE_CONTIGUOUS mmaping code
From: Catalin Marinas @ 2017-04-25 14:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a344c9c8-8a1f-cfc4-4dcd-1b49f3e1ac6c@redhat.com>
On Mon, Apr 24, 2017 at 09:58:23AM -0700, Laura Abbott wrote:
> On 04/21/2017 09:12 AM, Catalin Marinas wrote:
> > On Wed, Mar 29, 2017 at 01:55:32PM +0100, Robin Murphy wrote:
> >> On 29/03/17 11:05, Andrzej Hajda wrote:
> >>> In case of DMA_ATTR_FORCE_CONTIGUOUS allocations vm_area->pages
> >>> is invalid. __iommu_mmap_attrs and __iommu_get_sgtable cannot use
> >>> it. In first case temporary pages array is passed to iommu_dma_mmap,
> >>> in 2nd case single entry sg table is created directly instead
> >>> of calling helper.
> >>>
> >>> Fixes: 44176bb ("arm64: Add support for DMA_ATTR_FORCE_CONTIGUOUS to IOMMU")
> >>> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
> >>> ---
> >>> Hi,
> >>>
> >>> I am not familiar with this framework so please don't be too cruel ;)
> >>> Alternative solution I see is to always create vm_area->pages,
> >>> I do not know which approach is preferred.
> >>>
> >>> Regards
> >>> Andrzej
> >>> ---
> >>> arch/arm64/mm/dma-mapping.c | 40 ++++++++++++++++++++++++++++++++++++++--
> >>> 1 file changed, 38 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
> >>> index f7b5401..bba2bc8 100644
> >>> --- a/arch/arm64/mm/dma-mapping.c
> >>> +++ b/arch/arm64/mm/dma-mapping.c
> >>> @@ -704,7 +704,30 @@ static int __iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
> >>> return ret;
> >>>
> >>> area = find_vm_area(cpu_addr);
> >>> - if (WARN_ON(!area || !area->pages))
> >>> + if (WARN_ON(!area))
> >>
> >> From the look of things, it doesn't seem strictly necessary to change
> >> this, but whether that's a good thing is another matter. I'm not sure
> >> that dma_common_contiguous_remap() should really be leaving a dangling
> >> pointer in area->pages as it apparently does... :/
> >
> > On this specific point, I don't think area->pages should be set either
> > (cc'ing Laura). As in the vmalloc vs vmap case, area->pages when pages
> > need to be freed (via vfree), which is not the case here. The
> > dma_common_pages_remap() would need to set area->pages when called
> > directly from the iommu DMA ops. Proposal below, not tested with the
> > iommu ops. I assume the patch would cause __iommu_mmap_attrs() to return
> > -ENXIO if DMA_ATTR_FORCE_CONTIGUOUS is set.
[...]
> From a quick glance, this looks okay. I can give a proper tag when
> the fix to allow mmaping comes in since I'm guessing -ENXIO is not the
> end goal.
I'll post a proper patch and description. Strictly speaking, the above
fix is independent and we should rather get -ENXIO on arm64's
__iommu_mmap_attrs than dereferencing an already freed pointer. However,
I'm not sure anyone else would trigger this. Even on arm64, once we fix
the mmap case with DMA_ATTR_FORCE_CONTIGUOUS, we wouldn't dereference
the dangling area->pages pointer.
--
Catalin
^ permalink raw reply
* [PATCH] arm64: fix the overlap between the kernel image and vmalloc address
From: zhong jiang @ 2017-04-25 14:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170424155125.GA5972@leverpostej>
On 2017/4/24 23:51, Mark Rutland wrote:
> On Mon, Apr 24, 2017 at 09:28:48PM +0800, zhong jiang wrote:
>> On 2017/4/24 18:44, Mark Rutland wrote:
>>> So the issue is that we have the callchain below for a kernel image
>>> address:
>>>
>>> read_kcore()
>>> ->is_vmalloc_or_module_addr() // returns true
>>> ->vread()
>>> -->aligned_vread()
>>> --->vmalloc_to_page()
>>>
>>> In is_vmalloc{,or_module}_addr() we just check the addr against
>>> VMALLOC_START and VMALLOC_END, so they will return true for a kernel
>>> image address.
>>>
>>> Then, we call vmalloc_to_page(). While this only handles mappings made
>>> at page granularity, the kernel image mapping may have used sections. So
>>> this tries a bogus walk to the pte level.
>>> Should we special-case kernel image handling, e.g. with new
>>> is_kernel_image_addr() / kernel_image_to_page() helpers?
>> yes , it seems to the best way to implents it without performance back.
>> The following patch is the implment. Any thought?
>>
>> Signed-off-by: zhong jiang <zhongjiang@huawei.com>
>>
>> diff --git a/include/linux/mm.h b/include/linux/mm.h
>> index b84615b..851ac35 100644
>> --- a/include/linux/mm.h
>> +++ b/include/linux/mm.h
>> @@ -475,6 +475,15 @@ static inline bool is_vmalloc_addr(const void *x)
>> return false;
>> #endif
>> }
>> +
>> +static inline bool is_kernel_image_addr(const void *x)
>> +{
>> + unsigned long addr = (unsigned long)x;
>> +
>> + return addr >= (unsigned long)_stext && addr < (unsigned long)_end;
>> +
>> +}
>> +
>> #ifdef CONFIG_MMU
>> extern int is_vmalloc_or_module_addr(const void *x);
>> #else
>> diff --git a/mm/vmalloc.c b/mm/vmalloc.c
>> index 3ca82d4..9a9ef65 100644
>> --- a/mm/vmalloc.c
>> +++ b/mm/vmalloc.c
>> @@ -229,6 +229,42 @@ int is_vmalloc_or_module_addr(const void *x)
>> return is_vmalloc_addr(x);
>> }
>>
>> +static struct page *kernel_image_to_page(const void *kernel_addr, pgd_t *pgd)
>> +{
>> + unsigned long addr = (unsigned long)kernel_addr;
>> + struct page *page = NULL;
>> + pud_t *pud;
>> + pmd_t *pmd;
>> + pte_t *pte;
>> +
>> + if (pgd_none(*pgd))
>> + goto out;
>> +
>> + pud = pud_offset(pgd, addr);
>> + if (pud_none(*pud))
>> + goto out;
>> +
>> + if (pud_sect(*pud))
>> + return pud_page(*pud);
> The *_sect() helpers are arch-specific, so we cannot use them in generic
> code. This would need to be architecture-specific.
>
> Secondly, this will return head page of the section regardless of which
> page in the section the address corresponds to
yes, the code is too harry to finish. it is so mess. we will send the formal patch later.
if you still accept the approach.
Thanks
zhongjiang
>> +
>> + pmd = pmd_offset(*pmd, addr);
>> + if (pmd_none(*pmd))
>> + goto out;
>> +
>> + if (pmd_sect(*pmd))
>> + return pmd_page(*pmd);
> Likewise on both counts.
>
>> +
>> + pte = pte_offset_kernel(pmd, addr);
>> + if (pte_none(*pte))
>> + goto out;
>> +
>> + page = pte_page(*pte);
>> +
>> +out:
>> + return page;
>> +
>> +}
> Given we know what the address should map to, I don't think we need to
> walk the page tables here. I think this can be:
>
> static struct page *kernel_image_to_page(const void *addr)
> {
> return virt_to_page(lm_alias(vmalloc_addr));
> }
>
>> +
>> /*
>> * Walk a vmap address to the struct page it maps.
>> */
>> @@ -244,6 +280,9 @@ struct page *vmalloc_to_page(const void *vmalloc_addr)
>> */
>> VIRTUAL_BUG_ON(!is_vmalloc_or_module_addr(vmalloc_addr));
>>
>> + if (is_kernel_image_addr(vmalloc_addr))
>> + return kernel_image_to_page(vmalloc_addr, pgd);
> It's not clear to me that this is the right place for this to live.
>
> It might be best to code the kernel image logic directly in kcore (and
> kmem), assuming everyone's OK with that approach.
>
> Thanks,
> Mark.
> .
>
^ permalink raw reply
* [PATCH v7 1/4] syscalls: Restore address limit after a syscall
From: Thomas Garnier @ 2017-04-25 14:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425062324.pdpi5v7ypobw74ki@gmail.com>
On Mon, Apr 24, 2017 at 11:23 PM, Ingo Molnar <mingo@kernel.org> wrote:
>
> * Kees Cook <keescook@chromium.org> wrote:
>
>> On Mon, Apr 10, 2017 at 9:44 AM, Thomas Garnier <thgarnie@google.com> wrote:
>> > This patch ensures a syscall does not return to user-mode with a kernel
>> > address limit. If that happened, a process can corrupt kernel-mode
>> > memory and elevate privileges.
>> >
>> > For example, it would mitigation this bug:
>> >
>> > - https://bugs.chromium.org/p/project-zero/issues/detail?id=990
>> >
>> > The CONFIG_ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE option is also
>> > added so each architecture can optimize this change.
>> >
>> > Signed-off-by: Thomas Garnier <thgarnie@google.com>
>> > Tested-by: Kees Cook <keescook@chromium.org>
>>
>> Ingo, I think this series is ready. Can you pull it? (And if not, what
>> should next steps be?)
>
> I have some feedback for other patches in this series, plus for this one as well:
>
>> > +/*
>> > + * Called before coming back to user-mode. Returning to user-mode with an
>> > + * address limit different than USER_DS can allow to overwrite kernel memory.
>> > + */
>> > +static inline void verify_pre_usermode_state(void) {
>> > + BUG_ON(!segment_eq(get_fs(), USER_DS));
>> > +}
>
> That's not standard kernel coding style.
>
> Also, patch titles should start with a verb - 75% of the series doesn't.
Will fix both.
>
>> > +#ifndef CONFIG_ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE
>> > +#define __CHECK_USER_CALLER() \
>> > + bool user_caller = segment_eq(get_fs(), USER_DS)
>> > +#define __VERIFY_PRE_USERMODE_STATE() \
>> > + if (user_caller) verify_pre_usermode_state()
>> > +#else
>> > +#define __CHECK_USER_CALLER()
>> > +#define __VERIFY_PRE_USERMODE_STATE()
>> > +asmlinkage void address_limit_check_failed(void);
>> > +#endif
>
>> > +#ifdef CONFIG_ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE
>
> That Kconfig name is way too long.
>
> Plus please don't put logical operations into Kconfig names.
>
>> > +/*
>> > + * This function is called when an architecture specific implementation detected
>> > + * an invalid address limit. The generic user-mode state checker will finish on
>> > + * the appropriate BUG_ON.
>> > + */
>> > +asmlinkage void address_limit_check_failed(void)
>> > +{
>> > + verify_pre_usermode_state();
>> > + panic("address_limit_check_failed called with a valid user-mode state");
>> > +}
>> > +#endif
>
> Awful naming all around:
>
> verify_pre_usermode_state()
> address_limit_check_failed()
>
> Both names start with very common names that makes one read these again and again.
> (And yes, there's lots of bad names in the kernel, but we should not follow bad
> examples.)
>
> Best practice for such functionality is to use a common prefix that is both easy
> to recognize and easy to skip. For example we could use 'addr_limit_check' as the
> prefix:
>
> addr_limit_check_failed()
> addr_limit_check_syscall()
>
> No need to over-specify it that it's a "pre" check - it's obvious from existing
> implementation and should be documented in the function itself for new
> implementations.
>
> Harmonize the Kconfig namespace to the common prefix as well, i.e. use something
> like:
>
> CONFIG_ADDR_LIMIT_CHECK
>
> No need to add 'ARCH' I think - an architecture that enables this should get it
> unconditionally.
>
> etc.
>
> It's all cobbled together I'm afraid and will need more iterations.
Make sense. Thanks for the feedback.
>
> Thanks,
>
> Ingo
--
Thomas
^ permalink raw reply
* [PATCH] arm64: pmuv3: handle pmuv3+
From: Catalin Marinas @ 2017-04-25 14:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425140538.GO24484@arm.com>
On Tue, Apr 25, 2017 at 03:05:39PM +0100, Will Deacon wrote:
> On Tue, Apr 25, 2017 at 12:08:50PM +0100, Mark Rutland wrote:
> > Commit f1b36dcb5c316c27 ("arm64: pmuv3: handle !PMUv3 when probing") is
> > a little too restrictive, and prevents the use of of backwards
> > compatible PMUv3 extenstions, which have a PMUver value other than 1.
> >
> > For instance, ARMv8.1 PMU extensions (as implemented by ThunderX2) are
> > reported with PMUver value 4.
> >
> > Per the usual ID register principles, at least 0x1-0x7 imply a
> > PMUv3-compatible PMU. It's not currently clear whether 0x8-0xe imply the
> > same.
> >
> > For the time being, treat the value as signed, and with 0x1-0x7 treated
> > as meaning PMUv3 is implemented. This may be relaxed by future patches.
> >
> > Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> > Reported-by: Jayachandran C <jnair@caviumnetworks.com>
> > Cc: Will Deacon <will.deacon@arm.com>
> > ---
> > arch/arm64/kernel/perf_event.c | 7 ++++---
> > 1 file changed, 4 insertions(+), 3 deletions(-)
>
> Acked-by: Will Deacon <will.deacon@arm.com>
>
> > Will, would you be happy to queue this fixup for v4.12?
>
> Catalin: please can you pick this up via arm64 with my Ack and
> Jayachandran's tested-by?
Done. Thanks.
--
Catalin
^ permalink raw reply
* [PATCH v7 1/4] syscalls: Restore address limit after a syscall
From: Thomas Garnier @ 2017-04-25 14:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425063305.hwjuxupa37rwe6zj@gmail.com>
On Mon, Apr 24, 2017 at 11:33 PM, Ingo Molnar <mingo@kernel.org> wrote:
>
> * Thomas Garnier <thgarnie@google.com> wrote:
>
>> This patch ensures a syscall does not return to user-mode with a kernel
>> address limit. If that happened, a process can corrupt kernel-mode
>> memory and elevate privileges.
>
> Don't start changelogs with 'This patch' - it's obvious that we are talking about
> this patch. Writing:
>
> Ensure that a syscall does not return to user-mode with a kernel address limit.
> If that happens, a process can corrupt kernel-mode memory and elevate
> privileges.
>
> also note the spelling fix I did. (There's another spelling error elsewhere in
> this changelog as well.)
I will take your change and go over other commits.
>
> Please read changelogs!
>
>> For example, it would mitigation this bug:
>>
>> - https://bugs.chromium.org/p/project-zero/issues/detail?id=990
>>
>> The CONFIG_ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE option is also
>> added so each architecture can optimize this change.
>
> As I pointed it out in my previous reply this Kconfig name is awfully long - but
> it should have been obvious when this changelog was written ...
>
>> Signed-off-by: Thomas Garnier <thgarnie@google.com>
>> Tested-by: Kees Cook <keescook@chromium.org>
>> ---
>> Based on next-20170410
>> ---
>> arch/s390/Kconfig | 1 +
>> include/linux/syscalls.h | 26 +++++++++++++++++++++++++-
>> init/Kconfig | 6 ++++++
>> kernel/sys.c | 13 +++++++++++++
>> 4 files changed, 45 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
>> index d25435d94b6e..489a0cc6e46b 100644
>> --- a/arch/s390/Kconfig
>> +++ b/arch/s390/Kconfig
>> @@ -103,6 +103,7 @@ config S390
>> select ARCH_INLINE_WRITE_UNLOCK_BH
>> select ARCH_INLINE_WRITE_UNLOCK_IRQ
>> select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE
>> + select ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE
>> select ARCH_SAVE_PAGE_KEYS if HIBERNATION
>> select ARCH_SUPPORTS_ATOMIC_RMW
>> select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT
>> diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
>> index 980c3c9b06f8..801a7a74fe28 100644
>> --- a/include/linux/syscalls.h
>> +++ b/include/linux/syscalls.h
>> @@ -191,6 +191,27 @@ extern struct trace_event_functions exit_syscall_print_funcs;
>> SYSCALL_METADATA(sname, x, __VA_ARGS__) \
>> __SYSCALL_DEFINEx(x, sname, __VA_ARGS__)
>>
>> +
>> +/*
>> + * Called before coming back to user-mode. Returning to user-mode with an
>> + * address limit different than USER_DS can allow to overwrite kernel memory.
>> + */
>> +static inline void verify_pre_usermode_state(void) {
>> + BUG_ON(!segment_eq(get_fs(), USER_DS));
>> +}
>
> Non-standard coding style.
>
>> +
>> +#ifndef CONFIG_ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE
>> +#define __CHECK_USER_CALLER() \
>> + bool user_caller = segment_eq(get_fs(), USER_DS)
>> +#define __VERIFY_PRE_USERMODE_STATE() \
>> + if (user_caller) verify_pre_usermode_state()
>> +#else
>> +#define __CHECK_USER_CALLER()
>> +#define __VERIFY_PRE_USERMODE_STATE()
>> +asmlinkage void address_limit_check_failed(void);
>> +#endif
>> +
>> +
>> #define __PROTECT(...) asmlinkage_protect(__VA_ARGS__)
>> #define __SYSCALL_DEFINEx(x, name, ...) \
>> asmlinkage long sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) \
>> @@ -199,7 +220,10 @@ extern struct trace_event_functions exit_syscall_print_funcs;
>> asmlinkage long SyS##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \
>> asmlinkage long SyS##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \
>> { \
>> - long ret = SYSC##name(__MAP(x,__SC_CAST,__VA_ARGS__)); \
>> + long ret; \
>> + __CHECK_USER_CALLER(); \
>> + ret = SYSC##name(__MAP(x,__SC_CAST,__VA_ARGS__)); \
>> + __VERIFY_PRE_USERMODE_STATE(); \
>> __MAP(x,__SC_TEST,__VA_ARGS__); \
>> __PROTECT(x, ret,__MAP(x,__SC_ARGS,__VA_ARGS__)); \
>> return ret; \
>
> BTW., the '__VERIFY_PRE_USERMODE_STATE()' name is highly misleading: the 'pre'
> prefix suggests that this is done before a system call - while it's done
> afterwards.
>
> The solution is to not try to specify the exact call placement in the name, just
> describe the functionality (and harmonize along the common prefix).
Yes, I think BEFORE would have made more sense but things are getting
really long so I am fine with your proposal in the previous thread.
>
>> +config ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE
>> + bool
>> + help
>> + Disable the generic pre-usermode state verification. Allow each
>> + architecture to optimize how and when the verification is done.
>> +
>
> Please name the Kconfig symbols something like this:
>
> CONFIG_ADDR_LIMIT_CHECK
> CONFIG_ADDR_LIMIT_CHECK_ARCH
>
> or so, which tells us whether the check is done by the architecture code, without
> breaking the col80 limit with a single Kconfig name.
>
> BTW:
>
>> +#ifdef CONFIG_ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE
>> +/*
>> + * This function is called when an architecture specific implementation detected
>> + * an invalid address limit. The generic user-mode state checker will finish on
>> + * the appropriate BUG_ON.
>> + */
>> +asmlinkage void address_limit_check_failed(void)
>> +{
>> + verify_pre_usermode_state();
>> + panic("address_limit_check_failed called with a valid user-mode state");
>
> It's very unconstructive to unconditionally panic the system, just because some
> kernel code leaked the address limit! Do a warn-once printout and kill the current
> task (i.e. don't continue execution), but don't crash everything else!
The original change did not crash the kernel for this exact reason.
Through reviews, there was an overall agreement that the kernel should
not continue in this state.
>
> Thanks,
>
> Ingo
--
Thomas
^ permalink raw reply
* Touchscreen failure with CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND
From: Adam Ford @ 2017-04-25 14:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOMZO5CPtKAh6wMJ06BO4YFLPmOTvrpv5Q_3RJoj9dup46ukTQ@mail.gmail.com>
On Tue, Apr 25, 2017 at 8:43 AM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Adam,
>
> On Tue, Apr 25, 2017 at 9:41 AM, Adam Ford <aford173@gmail.com> wrote:
>
>> I don't have that board, so I can't test, but I have seen other issues on my
>> imx6 board where operating at 'performance' instead of on-demand worked
>> better for me as well in different areas. I was assuming it was something
>
> What are the issues you observed with 'on-demand' on your mx6 board?
>
My board does not always wake from sleep, and I was having some issues
on reboot unless I ran at 'performance' and that is what made me think
my board was having voltage dips too low.
>> regarding the voltage levels of various regulators for my board, and I am
>> going to run tests on my board by playing with regulators on my device tree
>> to make sure they are properly regulating to the right voltages. Since
>> 'performance' runs the processor at both a higher speed and higher voltage,
>> it's conceivable to me that something is just below some limit/level and
>> needs some minor adjustment. At least that is my theory with my board
>> issues. Have you looked considered that possibility?
>
> One test I have already tried was to run all other cpufreq operating
> points with the same ARM and SOC-PU voltages as the 996MHz.
>
> Still in this case I do see touchscreen failure.
I have a touch screen (using tsc2004 touch controller) on my board. I
can run some tests if you tell me how you're able to reproduce your
issue. I can at least confirm whether or not I see it too. I won't
be able to do it until later tonight or tomorrow however.
adam
^ permalink raw reply
* [PATCH -next] crypto: stm32 - Fix OF module alias information
From: Wei Yongjun @ 2017-04-25 14:35 UTC (permalink / raw)
To: linux-arm-kernel
From: Wei Yongjun <weiyongjun1@huawei.com>
The module alias information passed to MODULE_DEVICE_TABLE()
should use stm32_dt_ids instead of undefined sti_dt_ids.
Fixes: b51dbe90912a ("crypto: stm32 - Support for STM32 CRC32 crypto module")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
---
drivers/crypto/stm32/stm32_crc32.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/stm32/stm32_crc32.c b/drivers/crypto/stm32/stm32_crc32.c
index 7652822..ec83b1e 100644
--- a/drivers/crypto/stm32/stm32_crc32.c
+++ b/drivers/crypto/stm32/stm32_crc32.c
@@ -306,7 +306,7 @@ static const struct of_device_id stm32_dt_ids[] = {
{ .compatible = "st,stm32f7-crc", },
{},
};
-MODULE_DEVICE_TABLE(of, sti_dt_ids);
+MODULE_DEVICE_TABLE(of, stm32_dt_ids);
static struct platform_driver stm32_crc_driver = {
.probe = stm32_crc_probe,
^ permalink raw reply related
* [kvmtool PATCH v10 00/15] kvmtool: arm: ITS emulation and GSI routing support
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
another update to the ITS emulation series for kvmtool.
This addresses the comments Marc and Jean-Philippe had on the last
version (thanks for that!): I moved the DevID feature detection to avoid
static variables, rewrote the error path on creating IRQ routes and
extended the MMIO reservation to cover the ITS doorbell page as well.
Not sure if that's the right way to do, though.
Also we now ignore writes to the PBA region, which is what the spec
somewhat recommends.
-------------------------------------------
This series teaches kvmtool how to support KVM's ITS emulation. Also
(as this is somewhat related and has been co-developed) it enables GSI
routing for ARM/ARM64, which allows IRQFDs to be used, for instance
to use vhost_net. At the moment this is dependent on the guest
using the ITS emulation, but GICv2M support may be added at a later time.
The first six patches are generic fixes and refactoring to pave the
road for the rest of the patches. Most importantly patch 3/15 pulls
the GSI routing code from x86 into generic code.
Patch 7 updates the Linux headers to pull the new ITS and 32-bit
GICv3 definitions in. This allows us to enable GICv3 emulation for 32-bit
ARM and also get rid of some placeholder lines in patch 8.
The following four patches add ITS emulation support. They reserve and
register the required ITS register frame and populate a DT node with
the necessary data. Also the patches add the required device ID to the
KVM_SIGNAL_MSI ioctl.
Patches 13 and 14 enable IRQ GSI routing for ARM/ARM64.
This is needed to use IRQFDs, which is a prerequisite for vhost
functionality, for instance. The code sets up the (dummy) SPI
routing table and adds the device ID to the routing entry.
The last patch finally enables the guest ITS support by extending the
existing --irqchip= parameter to allow "--irqchip=gicv3-its".
These patches make use of the KVM kernel functionality merged into
4.8-rc: both Eric's IRQ routing series and the ITS emulation.
It can also be found in my kvmtool git repository [1].
Cheers,
Andre.
[1] git://linux-arm.org/kvmtool.git (branch: its/v10)
http://www.linux-arm.org/git?p=kvmtool.git;a=log;h=refs/heads/its/v10
Changelog v9 ... v10:
- [04/15]: ignore PBA writes
- [06/15]: reorder error checking for clarity
- [07/15]: update Linux headers with the latest HEAD (4.11-rc7+)
- [09/15]: extend ITS MMIO frame to cover doorbell page
- [11/15]: use actual function name in commit message
- [12/15]: check KVM_CAP_MSI_DEVID capability once and store it in struct kvm
- [14/15]: use stored KVM_CAP_MSI_DEVID capability
Andre Przywara (14):
FDT: use static phandles
arm: use static DT phandle for the GIC
irq: move IRQ routing into irq.c
MSI-X: update GSI routing after changed MSI-X configuration
virtio: fix endianness check for vhost support
PCI: Only allocate IRQ routing entry when available
update public Linux headers for GICv3 ITS emulation
arm: allow creation of an MSI register frame region
arm: FDT: create MSI controller DT node
add kvm__supports_vm_extension()
PCI: inject PCI device ID on MSI injection
arm: setup SPI IRQ routing tables
extend GSI IRQ routing to take a device ID
arm64: enable GICv3-ITS emulation
Vladimir Murzin (1):
arm: allow vGICv3 emulation
Makefile | 4 +-
arm/aarch32/arm-cpu.c | 4 +-
arm/aarch32/include/asm/kvm.h | 26 +++++-
arm/aarch32/include/kvm/fdt-arch.h | 6 ++
arm/aarch32/include/kvm/kvm-arch.h | 3 -
arm/aarch64/arm-cpu.c | 5 +-
arm/aarch64/include/asm/kvm.h | 15 ++++
arm/aarch64/include/kvm/fdt-arch.h | 6 ++
arm/aarch64/include/kvm/kvm-arch.h | 3 -
arm/fdt.c | 9 +--
arm/gic.c | 134 ++++++++++++++++++++++++++++---
arm/include/arm-common/fdt-arch.h | 6 ++
arm/include/arm-common/gic.h | 3 +-
arm/include/arm-common/kvm-arch.h | 2 +
arm/include/arm-common/kvm-config-arch.h | 2 +-
arm/include/arm-common/kvm-cpu-arch.h | 3 +-
arm/include/arm-common/pci.h | 2 +-
arm/irq.c | 9 ---
arm/pci.c | 9 ++-
hw/pci-shmem.c | 5 +-
include/kvm/fdt.h | 8 +-
include/kvm/irq.h | 8 +-
include/kvm/kvm.h | 2 +
include/kvm/virtio.h | 9 ++-
include/linux/kvm.h | 50 +++++++++++-
irq.c | 127 +++++++++++++++++++++++++++++
kvm.c | 28 +++++++
mips/include/asm/kvm.h | 2 +
mips/include/kvm/fdt-arch.h | 6 ++
mips/irq.c | 10 ---
powerpc/include/asm/kvm.h | 27 +++++++
powerpc/include/kvm/fdt-arch.h | 6 ++
powerpc/irq.c | 31 -------
powerpc/kvm.c | 2 -
virtio/net.c | 2 +-
virtio/pci.c | 105 ++++++++++++++++++++----
x86/include/asm/kvm.h | 6 +-
x86/include/kvm/fdt-arch.h | 6 ++
x86/irq.c | 45 ++---------
39 files changed, 572 insertions(+), 164 deletions(-)
create mode 100644 arm/aarch32/include/kvm/fdt-arch.h
create mode 100644 arm/aarch64/include/kvm/fdt-arch.h
create mode 100644 arm/include/arm-common/fdt-arch.h
delete mode 100644 arm/irq.c
create mode 100644 mips/include/kvm/fdt-arch.h
delete mode 100644 mips/irq.c
create mode 100644 powerpc/include/kvm/fdt-arch.h
delete mode 100644 powerpc/irq.c
create mode 100644 x86/include/kvm/fdt-arch.h
--
2.9.0
^ permalink raw reply
* [kvmtool PATCH v10 01/15] FDT: use static phandles
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
The current implementation of fdt__alloc_phandle() suffers from being
implemented in a static inline function situated in a header file.
This will only create expected results within a single compilation
unit.
It seems a bit over the top to use a function to allocate phandles,
when at the end of the day a phandle is just a unique identifier.
To simplify things - especially with upcoming patches - we just
introduce an enum per architecture to hold all possible phandle sources
and use that instead of the dynamic allocation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arm/aarch32/include/kvm/fdt-arch.h | 6 ++++++
arm/aarch64/include/kvm/fdt-arch.h | 6 ++++++
arm/fdt.c | 7 +++----
arm/include/arm-common/fdt-arch.h | 6 ++++++
include/kvm/fdt.h | 8 ++------
mips/include/kvm/fdt-arch.h | 6 ++++++
powerpc/include/kvm/fdt-arch.h | 6 ++++++
powerpc/kvm.c | 2 --
x86/include/kvm/fdt-arch.h | 6 ++++++
9 files changed, 41 insertions(+), 12 deletions(-)
create mode 100644 arm/aarch32/include/kvm/fdt-arch.h
create mode 100644 arm/aarch64/include/kvm/fdt-arch.h
create mode 100644 arm/include/arm-common/fdt-arch.h
create mode 100644 mips/include/kvm/fdt-arch.h
create mode 100644 powerpc/include/kvm/fdt-arch.h
create mode 100644 x86/include/kvm/fdt-arch.h
diff --git a/arm/aarch32/include/kvm/fdt-arch.h b/arm/aarch32/include/kvm/fdt-arch.h
new file mode 100644
index 0000000..e448bf1
--- /dev/null
+++ b/arm/aarch32/include/kvm/fdt-arch.h
@@ -0,0 +1,6 @@
+#ifndef KVM__KVM_FDT_H
+#define KVM__KVM_FDT_H
+
+#include "arm-common/fdt-arch.h"
+
+#endif /* KVM__KVM_FDT_H */
diff --git a/arm/aarch64/include/kvm/fdt-arch.h b/arm/aarch64/include/kvm/fdt-arch.h
new file mode 100644
index 0000000..e448bf1
--- /dev/null
+++ b/arm/aarch64/include/kvm/fdt-arch.h
@@ -0,0 +1,6 @@
+#ifndef KVM__KVM_FDT_H
+#define KVM__KVM_FDT_H
+
+#include "arm-common/fdt-arch.h"
+
+#endif /* KVM__KVM_FDT_H */
diff --git a/arm/fdt.c b/arm/fdt.c
index 381d48f..bcd0c3a 100644
--- a/arm/fdt.c
+++ b/arm/fdt.c
@@ -114,7 +114,6 @@ static int setup_fdt(struct kvm *kvm)
{
struct device_header *dev_hdr;
u8 staging_fdt[FDT_MAX_SIZE];
- u32 gic_phandle = fdt__alloc_phandle();
u64 mem_reg_prop[] = {
cpu_to_fdt64(kvm->arch.memory_guest_start),
cpu_to_fdt64(kvm->ram_size),
@@ -134,7 +133,7 @@ static int setup_fdt(struct kvm *kvm)
/* Header */
_FDT(fdt_begin_node(fdt, ""));
- _FDT(fdt_property_cell(fdt, "interrupt-parent", gic_phandle));
+ _FDT(fdt_property_cell(fdt, "interrupt-parent", PHANDLE_GIC));
_FDT(fdt_property_string(fdt, "compatible", "linux,dummy-virt"));
_FDT(fdt_property_cell(fdt, "#address-cells", 0x2));
_FDT(fdt_property_cell(fdt, "#size-cells", 0x2));
@@ -166,7 +165,7 @@ static int setup_fdt(struct kvm *kvm)
/* CPU and peripherals (interrupt controller, timers, etc) */
generate_cpu_nodes(fdt, kvm);
if (generate_cpu_peripheral_fdt_nodes)
- generate_cpu_peripheral_fdt_nodes(fdt, kvm, gic_phandle);
+ generate_cpu_peripheral_fdt_nodes(fdt, kvm, PHANDLE_GIC);
/* Virtio MMIO devices */
dev_hdr = device__first_dev(DEVICE_BUS_MMIO);
@@ -185,7 +184,7 @@ static int setup_fdt(struct kvm *kvm)
}
/* PCI host controller */
- pci__generate_fdt_nodes(fdt, gic_phandle);
+ pci__generate_fdt_nodes(fdt, PHANDLE_GIC);
/* PSCI firmware */
_FDT(fdt_begin_node(fdt, "psci"));
diff --git a/arm/include/arm-common/fdt-arch.h b/arm/include/arm-common/fdt-arch.h
new file mode 100644
index 0000000..53ba633
--- /dev/null
+++ b/arm/include/arm-common/fdt-arch.h
@@ -0,0 +1,6 @@
+#ifndef ARM__FDT_H
+#define ARM__FDT_H
+
+enum phandles {PHANDLE_RESERVED = 0, PHANDLE_GIC, PHANDLES_MAX};
+
+#endif /* ARM__FDT_H */
diff --git a/include/kvm/fdt.h b/include/kvm/fdt.h
index 53d85a4..beadc7f 100644
--- a/include/kvm/fdt.h
+++ b/include/kvm/fdt.h
@@ -7,6 +7,8 @@
#include <linux/types.h>
+#include "kvm/fdt-arch.h"
+
#define FDT_MAX_SIZE 0x10000
/* Those definitions are generic FDT values for specifying IRQ
@@ -33,10 +35,4 @@ enum irq_type {
} \
} while (0)
-static inline u32 fdt__alloc_phandle(void)
-{
- static u32 phandle = 0;
- return ++phandle;
-}
-
#endif /* KVM__FDT_H */
diff --git a/mips/include/kvm/fdt-arch.h b/mips/include/kvm/fdt-arch.h
new file mode 100644
index 0000000..b030245
--- /dev/null
+++ b/mips/include/kvm/fdt-arch.h
@@ -0,0 +1,6 @@
+#ifndef KVM__KVM_FDT_H
+#define KVM__KVM_FDT_H
+
+enum phandles {PHANDLE_RESERVED = 0, PHANDLES_MAX};
+
+#endif /* KVM__KVM_FDT_H */
diff --git a/powerpc/include/kvm/fdt-arch.h b/powerpc/include/kvm/fdt-arch.h
new file mode 100644
index 0000000..d48c055
--- /dev/null
+++ b/powerpc/include/kvm/fdt-arch.h
@@ -0,0 +1,6 @@
+#ifndef KVM__KVM_FDT_H
+#define KVM__KVM_FDT_H
+
+enum phandles {PHANDLE_RESERVED = 0, PHANDLE_XICP, PHANDLES_MAX};
+
+#endif /* KVM__KVM_FDT_H */
diff --git a/powerpc/kvm.c b/powerpc/kvm.c
index 3c1596d..c738c1d 100644
--- a/powerpc/kvm.c
+++ b/powerpc/kvm.c
@@ -40,8 +40,6 @@
#define HUGETLBFS_PATH "/var/lib/hugetlbfs/global/pagesize-16MB/"
-#define PHANDLE_XICP 0x00001111
-
static char kern_cmdline[2048];
struct kvm_ext kvm_req_ext[] = {
diff --git a/x86/include/kvm/fdt-arch.h b/x86/include/kvm/fdt-arch.h
new file mode 100644
index 0000000..eebd73f
--- /dev/null
+++ b/x86/include/kvm/fdt-arch.h
@@ -0,0 +1,6 @@
+#ifndef X86__FDT_ARCH_H
+#define X86__FDT_ARCH_H
+
+enum phandles {PHANDLE_RESERVED = 0, PHANDLES_MAX};
+
+#endif /* KVM__KVM_FDT_H */
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 02/15] arm: use static DT phandle for the GIC
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
As KVM supports only onc (v)GIC per guest and it's hard to imagine that
we will ever need more than that, lets simplify the FDT generation by
not passing that single, constant phandle around.
Let's just reference that one global symbol from enum phandles instead.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arm/aarch32/arm-cpu.c | 4 ++--
arm/aarch64/arm-cpu.c | 5 +++--
arm/fdt.c | 6 +++---
arm/gic.c | 4 ++--
arm/include/arm-common/gic.h | 2 +-
arm/include/arm-common/kvm-cpu-arch.h | 3 +--
arm/include/arm-common/pci.h | 2 +-
arm/pci.c | 4 ++--
8 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/arm/aarch32/arm-cpu.c b/arm/aarch32/arm-cpu.c
index d8d6293..27a8e17 100644
--- a/arm/aarch32/arm-cpu.c
+++ b/arm/aarch32/arm-cpu.c
@@ -8,11 +8,11 @@
#include <linux/byteorder.h>
#include <linux/types.h>
-static void generate_fdt_nodes(void *fdt, struct kvm *kvm, u32 gic_phandle)
+static void generate_fdt_nodes(void *fdt, struct kvm *kvm)
{
int timer_interrupts[4] = {13, 14, 11, 10};
- gic__generate_fdt_nodes(fdt, gic_phandle, IRQCHIP_GICV2);
+ gic__generate_fdt_nodes(fdt, IRQCHIP_GICV2);
timer__generate_fdt_nodes(fdt, kvm, timer_interrupts);
}
diff --git a/arm/aarch64/arm-cpu.c b/arm/aarch64/arm-cpu.c
index c21c0bb..d7572b7 100644
--- a/arm/aarch64/arm-cpu.c
+++ b/arm/aarch64/arm-cpu.c
@@ -10,10 +10,11 @@
#include <linux/byteorder.h>
#include <linux/types.h>
-static void generate_fdt_nodes(void *fdt, struct kvm *kvm, u32 gic_phandle)
+static void generate_fdt_nodes(void *fdt, struct kvm *kvm)
{
int timer_interrupts[4] = {13, 14, 11, 10};
- gic__generate_fdt_nodes(fdt, gic_phandle, kvm->cfg.arch.irqchip);
+
+ gic__generate_fdt_nodes(fdt, kvm->cfg.arch.irqchip);
timer__generate_fdt_nodes(fdt, kvm, timer_interrupts);
pmu__generate_fdt_nodes(fdt, kvm);
}
diff --git a/arm/fdt.c b/arm/fdt.c
index bcd0c3a..f90207a 100644
--- a/arm/fdt.c
+++ b/arm/fdt.c
@@ -124,7 +124,7 @@ static int setup_fdt(struct kvm *kvm)
kvm->arch.dtb_guest_start);
void (*generate_mmio_fdt_nodes)(void *, struct device_header *,
void (*)(void *, u8, enum irq_type));
- void (*generate_cpu_peripheral_fdt_nodes)(void *, struct kvm *, u32)
+ void (*generate_cpu_peripheral_fdt_nodes)(void *, struct kvm *)
= kvm->cpus[0]->generate_fdt_nodes;
/* Create new tree without a reserve map */
@@ -165,7 +165,7 @@ static int setup_fdt(struct kvm *kvm)
/* CPU and peripherals (interrupt controller, timers, etc) */
generate_cpu_nodes(fdt, kvm);
if (generate_cpu_peripheral_fdt_nodes)
- generate_cpu_peripheral_fdt_nodes(fdt, kvm, PHANDLE_GIC);
+ generate_cpu_peripheral_fdt_nodes(fdt, kvm);
/* Virtio MMIO devices */
dev_hdr = device__first_dev(DEVICE_BUS_MMIO);
@@ -184,7 +184,7 @@ static int setup_fdt(struct kvm *kvm)
}
/* PCI host controller */
- pci__generate_fdt_nodes(fdt, PHANDLE_GIC);
+ pci__generate_fdt_nodes(fdt);
/* PSCI firmware */
_FDT(fdt_begin_node(fdt, "psci"));
diff --git a/arm/gic.c b/arm/gic.c
index d6d6dd0..ff032d2 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -194,7 +194,7 @@ static int gic__init_gic(struct kvm *kvm)
}
late_init(gic__init_gic)
-void gic__generate_fdt_nodes(void *fdt, u32 phandle, enum irqchip_type type)
+void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type)
{
const char *compatible;
u64 reg_prop[] = {
@@ -222,7 +222,7 @@ void gic__generate_fdt_nodes(void *fdt, u32 phandle, enum irqchip_type type)
_FDT(fdt_property_cell(fdt, "#interrupt-cells", GIC_FDT_IRQ_NUM_CELLS));
_FDT(fdt_property(fdt, "interrupt-controller", NULL, 0));
_FDT(fdt_property(fdt, "reg", reg_prop, sizeof(reg_prop)));
- _FDT(fdt_property_cell(fdt, "phandle", phandle));
+ _FDT(fdt_property_cell(fdt, "phandle", PHANDLE_GIC));
_FDT(fdt_end_node(fdt));
}
diff --git a/arm/include/arm-common/gic.h b/arm/include/arm-common/gic.h
index 4fde5ac..b43a180 100644
--- a/arm/include/arm-common/gic.h
+++ b/arm/include/arm-common/gic.h
@@ -30,6 +30,6 @@ struct kvm;
int gic__alloc_irqnum(void);
int gic__create(struct kvm *kvm, enum irqchip_type type);
-void gic__generate_fdt_nodes(void *fdt, u32 phandle, enum irqchip_type type);
+void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type);
#endif /* ARM_COMMON__GIC_H */
diff --git a/arm/include/arm-common/kvm-cpu-arch.h b/arm/include/arm-common/kvm-cpu-arch.h
index 8a6a6e7..923d2c4 100644
--- a/arm/include/arm-common/kvm-cpu-arch.h
+++ b/arm/include/arm-common/kvm-cpu-arch.h
@@ -25,8 +25,7 @@ struct kvm_cpu {
struct kvm_coalesced_mmio_ring *ring;
- void (*generate_fdt_nodes)(void *fdt, struct kvm* kvm,
- u32 gic_phandle);
+ void (*generate_fdt_nodes)(void *fdt, struct kvm* kvm);
};
struct kvm_arm_target {
diff --git a/arm/include/arm-common/pci.h b/arm/include/arm-common/pci.h
index ee87725..9008a0e 100644
--- a/arm/include/arm-common/pci.h
+++ b/arm/include/arm-common/pci.h
@@ -1,6 +1,6 @@
#ifndef ARM_COMMON__PCI_H
#define ARM_COMMON__PCI_H
-void pci__generate_fdt_nodes(void *fdt, u32 gic_phandle);
+void pci__generate_fdt_nodes(void *fdt);
#endif /* ARM_COMMON__PCI_H */
diff --git a/arm/pci.c b/arm/pci.c
index 86f4a15..d393c46 100644
--- a/arm/pci.c
+++ b/arm/pci.c
@@ -21,7 +21,7 @@ struct of_interrupt_map_entry {
struct of_gic_irq gic_irq;
} __attribute__((packed));
-void pci__generate_fdt_nodes(void *fdt, u32 gic_phandle)
+void pci__generate_fdt_nodes(void *fdt)
{
struct device_header *dev_hdr;
struct of_interrupt_map_entry irq_map[OF_PCI_IRQ_MAP_MAX];
@@ -84,7 +84,7 @@ void pci__generate_fdt_nodes(void *fdt, u32 gic_phandle)
},
.pci_pin = cpu_to_fdt32(pin),
},
- .gic_phandle = cpu_to_fdt32(gic_phandle),
+ .gic_phandle = cpu_to_fdt32(PHANDLE_GIC),
.gic_irq = {
.type = cpu_to_fdt32(GIC_FDT_IRQ_TYPE_SPI),
.num = cpu_to_fdt32(irq - GIC_SPI_IRQ_BASE),
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 03/15] irq: move IRQ routing into irq.c
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
The current IRQ routing code in x86/irq.c is mostly implementing a
generic KVM interface which other architectures may use too.
Move the code to set up an MSI route into the generic irq.c file and
guard it with the KVM_CAP_IRQ_ROUTING capability to return an error
if the kernel does not support interrupt routing.
This also removes the dummy implementations for all other
architectures and only leaves the x86 specific code in x86/irq.c.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
---
Makefile | 4 +--
arm/irq.c | 9 ------
hw/pci-shmem.c | 2 ++
include/kvm/irq.h | 5 ++++
irq.c | 87 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
mips/irq.c | 10 -------
powerpc/irq.c | 31 --------------------
virtio/pci.c | 21 +++++++++-----
x86/irq.c | 45 ++++------------------------
9 files changed, 114 insertions(+), 100 deletions(-)
delete mode 100644 arm/irq.c
delete mode 100644 mips/irq.c
delete mode 100644 powerpc/irq.c
diff --git a/Makefile b/Makefile
index eeb54a4..5771481 100644
--- a/Makefile
+++ b/Makefile
@@ -137,7 +137,6 @@ ifeq ($(ARCH), powerpc)
DEFINES += -DCONFIG_PPC
OBJS += powerpc/boot.o
OBJS += powerpc/ioport.o
- OBJS += powerpc/irq.o
OBJS += powerpc/kvm.o
OBJS += powerpc/cpu_info.o
OBJS += powerpc/kvm-cpu.o
@@ -152,7 +151,7 @@ ifeq ($(ARCH), powerpc)
endif
# ARM
-OBJS_ARM_COMMON := arm/fdt.o arm/gic.o arm/ioport.o arm/irq.o \
+OBJS_ARM_COMMON := arm/fdt.o arm/gic.o arm/ioport.o \
arm/kvm.o arm/kvm-cpu.o arm/pci.o arm/timer.o \
arm/pmu.o
HDRS_ARM_COMMON := arm/include
@@ -185,7 +184,6 @@ ifeq ($(ARCH),mips)
ARCH_INCLUDE := mips/include
OBJS += mips/kvm.o
OBJS += mips/kvm-cpu.o
- OBJS += mips/irq.o
endif
###
diff --git a/arm/irq.c b/arm/irq.c
deleted file mode 100644
index d8f44df..0000000
--- a/arm/irq.c
+++ /dev/null
@@ -1,9 +0,0 @@
-#include "kvm/irq.h"
-#include "kvm/kvm.h"
-#include "kvm/util.h"
-
-int irq__add_msix_route(struct kvm *kvm, struct msi_msg *msg)
-{
- die(__FUNCTION__);
- return 0;
-}
diff --git a/hw/pci-shmem.c b/hw/pci-shmem.c
index a1c5ab7..7ce98cb 100644
--- a/hw/pci-shmem.c
+++ b/hw/pci-shmem.c
@@ -136,6 +136,8 @@ int pci_shmem__get_local_irqfd(struct kvm *kvm)
if (pci_shmem_pci_device.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE)) {
gsi = irq__add_msix_route(kvm, &msix_table[0].msg);
+ if (gsi < 0)
+ return gsi;
} else {
gsi = pci_shmem_pci_device.irq_line;
}
diff --git a/include/kvm/irq.h b/include/kvm/irq.h
index 8a78e43..bb71521 100644
--- a/include/kvm/irq.h
+++ b/include/kvm/irq.h
@@ -10,11 +10,16 @@
struct kvm;
+extern struct kvm_irq_routing *irq_routing;
+extern int next_gsi;
+
int irq__alloc_line(void);
int irq__get_nr_allocated_lines(void);
int irq__init(struct kvm *kvm);
int irq__exit(struct kvm *kvm);
+
+int irq__allocate_routing_entry(void);
int irq__add_msix_route(struct kvm *kvm, struct msi_msg *msg);
#endif
diff --git a/irq.c b/irq.c
index 71eaa05..a742aa2 100644
--- a/irq.c
+++ b/irq.c
@@ -1,7 +1,19 @@
+#include <stdlib.h>
+#include <sys/ioctl.h>
+#include <linux/types.h>
+#include <linux/kvm.h>
+#include <errno.h>
+
+#include "kvm/kvm.h"
#include "kvm/irq.h"
#include "kvm/kvm-arch.h"
static u8 next_line = KVM_IRQ_OFFSET;
+static int allocated_gsis = 0;
+
+int next_gsi;
+
+struct kvm_irq_routing *irq_routing = NULL;
int irq__alloc_line(void)
{
@@ -12,3 +24,78 @@ int irq__get_nr_allocated_lines(void)
{
return next_line - KVM_IRQ_OFFSET;
}
+
+int irq__allocate_routing_entry(void)
+{
+ size_t table_size = sizeof(struct kvm_irq_routing);
+ size_t old_size = table_size;
+ int nr_entries = 0;
+
+ if (irq_routing)
+ nr_entries = irq_routing->nr;
+
+ if (nr_entries < allocated_gsis)
+ return 0;
+
+ old_size += sizeof(struct kvm_irq_routing_entry) * allocated_gsis;
+ allocated_gsis = ALIGN(nr_entries + 1, 32);
+ table_size += sizeof(struct kvm_irq_routing_entry) * allocated_gsis;
+ irq_routing = realloc(irq_routing, table_size);
+
+ if (irq_routing == NULL)
+ return -ENOMEM;
+ memset((void *)irq_routing + old_size, 0, table_size - old_size);
+
+ irq_routing->nr = nr_entries;
+ irq_routing->flags = 0;
+
+ return 0;
+}
+
+static bool check_for_irq_routing(struct kvm *kvm)
+{
+ static int has_irq_routing = 0;
+
+ if (has_irq_routing == 0) {
+ if (kvm__supports_extension(kvm, KVM_CAP_IRQ_ROUTING))
+ has_irq_routing = 1;
+ else
+ has_irq_routing = -1;
+ }
+
+ return has_irq_routing > 0;
+}
+
+int irq__add_msix_route(struct kvm *kvm, struct msi_msg *msg)
+{
+ int r;
+
+ if (!check_for_irq_routing(kvm))
+ return -ENXIO;
+
+ r = irq__allocate_routing_entry();
+ if (r)
+ return r;
+
+ irq_routing->entries[irq_routing->nr++] =
+ (struct kvm_irq_routing_entry) {
+ .gsi = next_gsi,
+ .type = KVM_IRQ_ROUTING_MSI,
+ .u.msi.address_hi = msg->address_hi,
+ .u.msi.address_lo = msg->address_lo,
+ .u.msi.data = msg->data,
+ };
+
+ r = ioctl(kvm->vm_fd, KVM_SET_GSI_ROUTING, irq_routing);
+ if (r)
+ return r;
+
+ return next_gsi++;
+}
+
+int __attribute__((weak)) irq__exit(struct kvm *kvm)
+{
+ free(irq_routing);
+ return 0;
+}
+dev_base_exit(irq__exit);
diff --git a/mips/irq.c b/mips/irq.c
deleted file mode 100644
index c1ff6bb..0000000
--- a/mips/irq.c
+++ /dev/null
@@ -1,10 +0,0 @@
-#include "kvm/irq.h"
-#include "kvm/kvm.h"
-
-#include <stdlib.h>
-
-int irq__add_msix_route(struct kvm *kvm, struct msi_msg *msg)
-{
- pr_warning("irq__add_msix_route");
- return 1;
-}
diff --git a/powerpc/irq.c b/powerpc/irq.c
deleted file mode 100644
index 03f2fe7..0000000
--- a/powerpc/irq.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * PPC64 IRQ routines
- *
- * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include "kvm/devices.h"
-#include "kvm/irq.h"
-#include "kvm/kvm.h"
-#include "kvm/util.h"
-
-#include <linux/types.h>
-#include <linux/rbtree.h>
-#include <linux/list.h>
-#include <linux/kvm.h>
-#include <sys/ioctl.h>
-
-#include <stddef.h>
-#include <stdlib.h>
-
-#include "kvm/pci.h"
-
-int irq__add_msix_route(struct kvm *kvm, struct msi_msg *msg)
-{
- die(__FUNCTION__);
- return 0;
-}
diff --git a/virtio/pci.c b/virtio/pci.c
index 90fcd64..072e5b7 100644
--- a/virtio/pci.c
+++ b/virtio/pci.c
@@ -156,7 +156,8 @@ static bool virtio_pci__specific_io_out(struct kvm *kvm, struct virtio_device *v
void *data, int size, int offset)
{
struct virtio_pci *vpci = vdev->virtio;
- u32 config_offset, gsi, vec;
+ u32 config_offset, vec;
+ int gsi;
int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci),
&config_offset);
if (type == VIRTIO_PCI_O_MSIX) {
@@ -166,21 +167,27 @@ static bool virtio_pci__specific_io_out(struct kvm *kvm, struct virtio_device *v
if (vec == VIRTIO_MSI_NO_VECTOR)
break;
- gsi = irq__add_msix_route(kvm, &vpci->msix_table[vec].msg);
-
- vpci->config_gsi = gsi;
+ gsi = irq__add_msix_route(kvm,
+ &vpci->msix_table[vec].msg);
+ if (gsi >= 0)
+ vpci->config_gsi = gsi;
break;
case VIRTIO_MSI_QUEUE_VECTOR:
- vec = vpci->vq_vector[vpci->queue_selector] = ioport__read16(data);
+ vec = ioport__read16(data);
+ vpci->vq_vector[vpci->queue_selector] = vec;
if (vec == VIRTIO_MSI_NO_VECTOR)
break;
- gsi = irq__add_msix_route(kvm, &vpci->msix_table[vec].msg);
+ gsi = irq__add_msix_route(kvm,
+ &vpci->msix_table[vec].msg);
+ if (gsi < 0)
+ break;
vpci->gsis[vpci->queue_selector] = gsi;
if (vdev->ops->notify_vq_gsi)
vdev->ops->notify_vq_gsi(kvm, vpci->dev,
- vpci->queue_selector, gsi);
+ vpci->queue_selector,
+ gsi);
break;
};
diff --git a/x86/irq.c b/x86/irq.c
index 72177e7..db465a1 100644
--- a/x86/irq.c
+++ b/x86/irq.c
@@ -11,20 +11,15 @@
#include <stddef.h>
#include <stdlib.h>
-#define IRQ_MAX_GSI 64
#define IRQCHIP_MASTER 0
#define IRQCHIP_SLAVE 1
#define IRQCHIP_IOAPIC 2
-/* First 24 GSIs are routed between IRQCHIPs and IOAPICs */
-static u32 gsi = 24;
-
-struct kvm_irq_routing *irq_routing;
-
static int irq__add_routing(u32 gsi, u32 type, u32 irqchip, u32 pin)
{
- if (gsi >= IRQ_MAX_GSI)
- return -ENOSPC;
+ int r = irq__allocate_routing_entry();
+ if (r)
+ return r;
irq_routing->entries[irq_routing->nr++] =
(struct kvm_irq_routing_entry) {
@@ -41,11 +36,6 @@ int irq__init(struct kvm *kvm)
{
int i, r;
- irq_routing = calloc(sizeof(struct kvm_irq_routing) +
- IRQ_MAX_GSI * sizeof(struct kvm_irq_routing_entry), 1);
- if (irq_routing == NULL)
- return -ENOMEM;
-
/* Hook first 8 GSIs to master IRQCHIP */
for (i = 0; i < 8; i++)
if (i != 2)
@@ -69,33 +59,8 @@ int irq__init(struct kvm *kvm)
return errno;
}
- return 0;
-}
-dev_base_init(irq__init);
+ next_gsi = i;
-int irq__exit(struct kvm *kvm)
-{
- free(irq_routing);
return 0;
}
-dev_base_exit(irq__exit);
-
-int irq__add_msix_route(struct kvm *kvm, struct msi_msg *msg)
-{
- int r;
-
- irq_routing->entries[irq_routing->nr++] =
- (struct kvm_irq_routing_entry) {
- .gsi = gsi,
- .type = KVM_IRQ_ROUTING_MSI,
- .u.msi.address_hi = msg->address_hi,
- .u.msi.address_lo = msg->address_lo,
- .u.msi.data = msg->data,
- };
-
- r = ioctl(kvm->vm_fd, KVM_SET_GSI_ROUTING, irq_routing);
- if (r)
- return r;
-
- return gsi++;
-}
+dev_base_init(irq__init);
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 04/15] MSI-X: update GSI routing after changed MSI-X configuration
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
When we set up GSI routing to map MSIs to KVM's GSI numbers, we
write the current device's MSI setup into the kernel routing table.
However the device driver in the guest can use PCI configuration space
accesses to change the MSI configuration (address and/or payload data).
Whenever this happens after we have setup the routing table already,
we must amend the previously sent data.
So when MSI-X PCI config space accesses write address or payload,
find the associated GSI number and the matching routing table entry
and update the kernel routing table (only if the data has changed).
This fixes vhost-net, where the queue's IRQFD was setup before the
MSI vectors.
To avoid issues, we ignore writes to the PBA region. The spec says:
"Software should never write, and should only read Pending Bits.
If software writes to Pending Bits, the result is undefined."
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
include/kvm/irq.h | 1 +
irq.c | 34 ++++++++++++++++++++++++++++++++++
virtio/pci.c | 55 +++++++++++++++++++++++++++++++++++++++++++++----------
3 files changed, 80 insertions(+), 10 deletions(-)
diff --git a/include/kvm/irq.h b/include/kvm/irq.h
index bb71521..f35eb7e 100644
--- a/include/kvm/irq.h
+++ b/include/kvm/irq.h
@@ -21,5 +21,6 @@ int irq__exit(struct kvm *kvm);
int irq__allocate_routing_entry(void);
int irq__add_msix_route(struct kvm *kvm, struct msi_msg *msg);
+void irq__update_msix_route(struct kvm *kvm, u32 gsi, struct msi_msg *msg);
#endif
diff --git a/irq.c b/irq.c
index a742aa2..6ec71c3 100644
--- a/irq.c
+++ b/irq.c
@@ -93,6 +93,40 @@ int irq__add_msix_route(struct kvm *kvm, struct msi_msg *msg)
return next_gsi++;
}
+static bool update_data(u32 *ptr, u32 newdata)
+{
+ if (*ptr == newdata)
+ return false;
+
+ *ptr = newdata;
+ return true;
+}
+
+void irq__update_msix_route(struct kvm *kvm, u32 gsi, struct msi_msg *msg)
+{
+ struct kvm_irq_routing_msi *entry;
+ unsigned int i;
+ bool changed;
+
+ for (i = 0; i < irq_routing->nr; i++)
+ if (gsi == irq_routing->entries[i].gsi)
+ break;
+ if (i == irq_routing->nr)
+ return;
+
+ entry = &irq_routing->entries[i].u.msi;
+
+ changed = update_data(&entry->address_hi, msg->address_hi);
+ changed |= update_data(&entry->address_lo, msg->address_lo);
+ changed |= update_data(&entry->data, msg->data);
+
+ if (!changed)
+ return;
+
+ if (ioctl(kvm->vm_fd, KVM_SET_GSI_ROUTING, irq_routing) == -1)
+ die_perror("KVM_SET_GSI_ROUTING");
+}
+
int __attribute__((weak)) irq__exit(struct kvm *kvm)
{
free(irq_routing);
diff --git a/virtio/pci.c b/virtio/pci.c
index 072e5b7..e9f36c7 100644
--- a/virtio/pci.c
+++ b/virtio/pci.c
@@ -152,6 +152,30 @@ static bool virtio_pci__io_in(struct ioport *ioport, struct kvm_cpu *vcpu, u16 p
return ret;
}
+static void update_msix_map(struct virtio_pci *vpci,
+ struct msix_table *msix_entry, u32 vecnum)
+{
+ u32 gsi, i;
+
+ /* Find the GSI number used for that vector */
+ if (vecnum == vpci->config_vector) {
+ gsi = vpci->config_gsi;
+ } else {
+ for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++)
+ if (vpci->vq_vector[i] == vecnum)
+ break;
+ if (i == VIRTIO_PCI_MAX_VQ)
+ return;
+ gsi = vpci->gsis[i];
+ }
+
+ if (gsi == 0)
+ return;
+
+ msix_entry = &msix_entry[vecnum];
+ irq__update_msix_route(vpci->kvm, gsi, &msix_entry->msg);
+}
+
static bool virtio_pci__specific_io_out(struct kvm *kvm, struct virtio_device *vdev, u16 port,
void *data, int size, int offset)
{
@@ -259,21 +283,32 @@ static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu,
u8 is_write, void *ptr)
{
struct virtio_pci *vpci = ptr;
- void *table;
- u32 offset;
+ struct msix_table *table;
+ int vecnum;
+ size_t offset;
if (addr > vpci->msix_io_block + PCI_IO_SIZE) {
- table = &vpci->msix_pba;
- offset = vpci->msix_io_block + PCI_IO_SIZE;
+ if (is_write)
+ return;
+ table = (struct msix_table *)&vpci->msix_pba;
+ offset = addr - (vpci->msix_io_block + PCI_IO_SIZE);
} else {
- table = &vpci->msix_table;
- offset = vpci->msix_io_block;
+ table = vpci->msix_table;
+ offset = addr - vpci->msix_io_block;
}
+ vecnum = offset / sizeof(struct msix_table);
+ offset = offset % sizeof(struct msix_table);
+
+ if (!is_write) {
+ memcpy(data, (void *)&table[vecnum] + offset, len);
+ return;
+ }
+
+ memcpy((void *)&table[vecnum] + offset, data, len);
- if (is_write)
- memcpy(table + addr - offset, data, len);
- else
- memcpy(data, table + addr - offset, len);
+ /* Did we just update the address or payload? */
+ if (offset < offsetof(struct msix_table, ctrl))
+ update_msix_map(vpci, table, vecnum);
}
static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, int vec)
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 05/15] virtio: fix endianness check for vhost support
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
Currently we deny any VHOST_* functionality if the architecture
supports guests with different endianness than the host. Most of the
time even on those architectures the endianness of guest and host are
the same, though, so we are denying the glory of VHOST needlessly.
Switch from compile time determination to a run time scheme, which
takes the actual endianness of the guest into account.
For this we change the semantics of VIRTIO_ENDIAN_HOST to return the
actual endianness of the host (the endianness of kvmtool at compile
time, really). The actual check in vhost_net now compares this against
the guest endianness.
This enables vhost support on ARM and ARM64.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
include/kvm/virtio.h | 9 +++++++--
virtio/net.c | 2 +-
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/include/kvm/virtio.h b/include/kvm/virtio.h
index 8324ba7..00a791a 100644
--- a/include/kvm/virtio.h
+++ b/include/kvm/virtio.h
@@ -17,10 +17,15 @@
#define VIRTIO_PCI_O_CONFIG 0
#define VIRTIO_PCI_O_MSIX 1
-#define VIRTIO_ENDIAN_HOST 0
#define VIRTIO_ENDIAN_LE (1 << 0)
#define VIRTIO_ENDIAN_BE (1 << 1)
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+#define VIRTIO_ENDIAN_HOST VIRTIO_ENDIAN_LE
+#else
+#define VIRTIO_ENDIAN_HOST VIRTIO_ENDIAN_BE
+#endif
+
struct virt_queue {
struct vring vring;
u32 pfn;
@@ -40,7 +45,7 @@ struct virt_queue {
#define VIRTIO_RING_ENDIAN VIRTIO_ENDIAN_HOST
#endif
-#if (VIRTIO_RING_ENDIAN & (VIRTIO_ENDIAN_LE | VIRTIO_ENDIAN_BE))
+#if VIRTIO_RING_ENDIAN != VIRTIO_ENDIAN_HOST
static inline __u16 __virtio_g2h_u16(u16 endian, __u16 val)
{
diff --git a/virtio/net.c b/virtio/net.c
index ffa83ab..9fb9f1e 100644
--- a/virtio/net.c
+++ b/virtio/net.c
@@ -530,7 +530,7 @@ static int init_vq(struct kvm *kvm, void *dev, u32 vq, u32 page_size, u32 align,
}
if (queue->endian != VIRTIO_ENDIAN_HOST)
- die_perror("VHOST requires VIRTIO_ENDIAN_HOST");
+ die_perror("VHOST requires the same endianness in guest and host");
state.num = queue->vring.num;
r = ioctl(ndev->vhost_fd, VHOST_SET_VRING_NUM, &state);
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 06/15] PCI: Only allocate IRQ routing entry when available
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
If we need to inject an MSI into the guest, we rely at the moment on a
working GSI MSI routing functionality. However we can get away without
IRQ routing, if the host supports MSI injection via the KVM_SIGNAL_MSI
ioctl.
So we try the GSI routing first, but if that fails due to a missing
IRQ routing functionality, we fall back to KVM_SIGNAL_MSI (if that is
supported).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
virtio/pci.c | 29 ++++++++++++++++++++++++++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/virtio/pci.c b/virtio/pci.c
index e9f36c7..04176c1 100644
--- a/virtio/pci.c
+++ b/virtio/pci.c
@@ -193,8 +193,20 @@ static bool virtio_pci__specific_io_out(struct kvm *kvm, struct virtio_device *v
gsi = irq__add_msix_route(kvm,
&vpci->msix_table[vec].msg);
- if (gsi >= 0)
- vpci->config_gsi = gsi;
+ /*
+ * We don't need IRQ routing if we can use
+ * MSI injection via the KVM_SIGNAL_MSI ioctl.
+ */
+ if (gsi == -ENXIO &&
+ vpci->features & VIRTIO_PCI_F_SIGNAL_MSI)
+ break;
+
+ if (gsi < 0) {
+ die("failed to configure MSIs");
+ break;
+ }
+
+ vpci->config_gsi = gsi;
break;
case VIRTIO_MSI_QUEUE_VECTOR:
vec = ioport__read16(data);
@@ -205,8 +217,19 @@ static bool virtio_pci__specific_io_out(struct kvm *kvm, struct virtio_device *v
gsi = irq__add_msix_route(kvm,
&vpci->msix_table[vec].msg);
- if (gsi < 0)
+ /*
+ * We don't need IRQ routing if we can use
+ * MSI injection via the KVM_SIGNAL_MSI ioctl.
+ */
+ if (gsi == -ENXIO &&
+ vpci->features & VIRTIO_PCI_F_SIGNAL_MSI)
break;
+
+ if (gsi < 0) {
+ die("failed to configure MSIs");
+ break;
+ }
+
vpci->gsis[vpci->queue_selector] = gsi;
if (vdev->ops->notify_vq_gsi)
vdev->ops->notify_vq_gsi(kvm, vpci->dev,
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 07/15] update public Linux headers for GICv3 ITS emulation
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
The GICv3 ITS emulation brings some additions to the headers, so
lets update kvmtool's version of the headers to Linux' v4.11-rc7-57.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arm/aarch32/include/asm/kvm.h | 26 ++++++++++++++++++++--
arm/aarch64/include/asm/kvm.h | 15 +++++++++++++
include/linux/kvm.h | 50 +++++++++++++++++++++++++++++++++++++++----
mips/include/asm/kvm.h | 2 ++
powerpc/include/asm/kvm.h | 27 +++++++++++++++++++++++
x86/include/asm/kvm.h | 6 +++---
6 files changed, 117 insertions(+), 9 deletions(-)
diff --git a/arm/aarch32/include/asm/kvm.h b/arm/aarch32/include/asm/kvm.h
index df3f60c..6ebd3e6 100644
--- a/arm/aarch32/include/asm/kvm.h
+++ b/arm/aarch32/include/asm/kvm.h
@@ -84,6 +84,15 @@ struct kvm_regs {
#define KVM_VGIC_V2_DIST_SIZE 0x1000
#define KVM_VGIC_V2_CPU_SIZE 0x2000
+/* Supported VGICv3 address types */
+#define KVM_VGIC_V3_ADDR_TYPE_DIST 2
+#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3
+#define KVM_VGIC_ITS_ADDR_TYPE 4
+
+#define KVM_VGIC_V3_DIST_SIZE SZ_64K
+#define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K)
+#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K)
+
#define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
#define KVM_ARM_VCPU_PSCI_0_2 1 /* CPU uses PSCI v0.2 */
@@ -139,8 +148,8 @@ struct kvm_arch_memory_slot {
#define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__)
#define KVM_REG_ARM_TIMER_CTL ARM_CP15_REG32(0, 14, 3, 1)
-#define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14)
-#define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14)
+#define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14)
+#define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14)
/* Normal registers are mapped as coprocessor 16. */
#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT)
@@ -172,10 +181,23 @@ struct kvm_arch_memory_slot {
#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32
#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
+#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32
+#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \
+ (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT)
#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
+#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff)
#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
#define KVM_DEV_ARM_VGIC_GRP_CTRL 4
+#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5
+#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6
+#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \
+ (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff
+#define VGIC_LEVEL_INFO_LINE_LEVEL 0
+
#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
/* KVM_IRQ_LINE irq field index values */
diff --git a/arm/aarch64/include/asm/kvm.h b/arm/aarch64/include/asm/kvm.h
index f209ea1..c286035 100644
--- a/arm/aarch64/include/asm/kvm.h
+++ b/arm/aarch64/include/asm/kvm.h
@@ -87,9 +87,11 @@ struct kvm_regs {
/* Supported VGICv3 address types */
#define KVM_VGIC_V3_ADDR_TYPE_DIST 2
#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3
+#define KVM_VGIC_ITS_ADDR_TYPE 4
#define KVM_VGIC_V3_DIST_SIZE SZ_64K
#define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K)
+#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K)
#define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
#define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */
@@ -199,10 +201,23 @@ struct kvm_arch_memory_slot {
#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32
#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
+#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32
+#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \
+ (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT)
#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
+#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff)
#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
#define KVM_DEV_ARM_VGIC_GRP_CTRL 4
+#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5
+#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6
+#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \
+ (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff
+#define VGIC_LEVEL_INFO_LINE_LEVEL 0
+
#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
/* Device Control API on vcpu fd */
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index a7f1f80..f51d508 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -218,7 +218,8 @@ struct kvm_hyperv_exit {
struct kvm_run {
/* in */
__u8 request_interrupt_window;
- __u8 padding1[7];
+ __u8 immediate_exit;
+ __u8 padding1[6];
/* out */
__u32 exit_reason;
@@ -651,6 +652,9 @@ struct kvm_enable_cap {
};
/* for KVM_PPC_GET_PVINFO */
+
+#define KVM_PPC_PVINFO_FLAGS_EV_IDLE (1<<0)
+
struct kvm_ppc_pvinfo {
/* out */
__u32 flags;
@@ -682,7 +686,12 @@ struct kvm_ppc_smmu_info {
struct kvm_ppc_one_seg_page_size sps[KVM_PPC_PAGE_SIZES_MAX_SZ];
};
-#define KVM_PPC_PVINFO_FLAGS_EV_IDLE (1<<0)
+/* for KVM_PPC_RESIZE_HPT_{PREPARE,COMMIT} */
+struct kvm_ppc_resize_hpt {
+ __u64 flags;
+ __u32 shift;
+ __u32 pad;
+};
#define KVMIO 0xAE
@@ -865,6 +874,15 @@ struct kvm_ppc_smmu_info {
#define KVM_CAP_SPAPR_TCE_64 125
#define KVM_CAP_ARM_PMU_V3 126
#define KVM_CAP_VCPU_ATTRIBUTES 127
+#define KVM_CAP_MAX_VCPU_ID 128
+#define KVM_CAP_X2APIC_API 129
+#define KVM_CAP_S390_USER_INSTR0 130
+#define KVM_CAP_MSI_DEVID 131
+#define KVM_CAP_PPC_HTM 132
+#define KVM_CAP_SPAPR_RESIZE_HPT 133
+#define KVM_CAP_PPC_MMU_RADIX 134
+#define KVM_CAP_PPC_MMU_HASH_V3 135
+#define KVM_CAP_IMMEDIATE_EXIT 136
#ifdef KVM_CAP_IRQ_ROUTING
@@ -877,7 +895,10 @@ struct kvm_irq_routing_msi {
__u32 address_lo;
__u32 address_hi;
__u32 data;
- __u32 pad;
+ union {
+ __u32 pad;
+ __u32 devid;
+ };
};
struct kvm_irq_routing_s390_adapter {
@@ -964,12 +985,19 @@ struct kvm_irqfd {
__u8 pad[16];
};
+/* For KVM_CAP_ADJUST_CLOCK */
+
+/* Do not use 1, KVM_CHECK_EXTENSION returned it before we had flags. */
+#define KVM_CLOCK_TSC_STABLE 2
+
struct kvm_clock_data {
__u64 clock;
__u32 flags;
__u32 pad[9];
};
+/* For KVM_CAP_SW_TLB */
+
#define KVM_MMU_FSL_BOOKE_NOHV 0
#define KVM_MMU_FSL_BOOKE_HV 1
@@ -1023,12 +1051,14 @@ struct kvm_one_reg {
__u64 addr;
};
+#define KVM_MSI_VALID_DEVID (1U << 0)
struct kvm_msi {
__u32 address_lo;
__u32 address_hi;
__u32 data;
__u32 flags;
- __u8 pad[16];
+ __u32 devid;
+ __u8 pad[12];
};
struct kvm_arm_device_addr {
@@ -1073,6 +1103,8 @@ enum kvm_device_type {
#define KVM_DEV_TYPE_FLIC KVM_DEV_TYPE_FLIC
KVM_DEV_TYPE_ARM_VGIC_V3,
#define KVM_DEV_TYPE_ARM_VGIC_V3 KVM_DEV_TYPE_ARM_VGIC_V3
+ KVM_DEV_TYPE_ARM_VGIC_ITS,
+#define KVM_DEV_TYPE_ARM_VGIC_ITS KVM_DEV_TYPE_ARM_VGIC_ITS
KVM_DEV_TYPE_MAX,
};
@@ -1167,6 +1199,13 @@ struct kvm_s390_ucas_mapping {
#define KVM_ARM_SET_DEVICE_ADDR _IOW(KVMIO, 0xab, struct kvm_arm_device_addr)
/* Available with KVM_CAP_PPC_RTAS */
#define KVM_PPC_RTAS_DEFINE_TOKEN _IOW(KVMIO, 0xac, struct kvm_rtas_token_args)
+/* Available with KVM_CAP_SPAPR_RESIZE_HPT */
+#define KVM_PPC_RESIZE_HPT_PREPARE _IOR(KVMIO, 0xad, struct kvm_ppc_resize_hpt)
+#define KVM_PPC_RESIZE_HPT_COMMIT _IOR(KVMIO, 0xae, struct kvm_ppc_resize_hpt)
+/* Available with KVM_CAP_PPC_RADIX_MMU or KVM_CAP_PPC_HASH_MMU_V3 */
+#define KVM_PPC_CONFIGURE_V3_MMU _IOW(KVMIO, 0xaf, struct kvm_ppc_mmuv3_cfg)
+/* Available with KVM_CAP_PPC_RADIX_MMU */
+#define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_info)
/* ioctl for vm fd */
#define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device)
@@ -1312,4 +1351,7 @@ struct kvm_assigned_msix_entry {
__u16 padding[3];
};
+#define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0)
+#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1)
+
#endif /* __LINUX_KVM_H */
diff --git a/mips/include/asm/kvm.h b/mips/include/asm/kvm.h
index 6985eb5..a8a0199 100644
--- a/mips/include/asm/kvm.h
+++ b/mips/include/asm/kvm.h
@@ -19,6 +19,8 @@
* Some parts derived from the x86 version of this file.
*/
+#define __KVM_HAVE_READONLY_MEM
+
/*
* for KVM_GET_REGS and KVM_SET_REGS
*
diff --git a/powerpc/include/asm/kvm.h b/powerpc/include/asm/kvm.h
index c93cf35..4edbe4b 100644
--- a/powerpc/include/asm/kvm.h
+++ b/powerpc/include/asm/kvm.h
@@ -413,6 +413,26 @@ struct kvm_get_htab_header {
__u16 n_invalid;
};
+/* For KVM_PPC_CONFIGURE_V3_MMU */
+struct kvm_ppc_mmuv3_cfg {
+ __u64 flags;
+ __u64 process_table; /* second doubleword of partition table entry */
+};
+
+/* Flag values for KVM_PPC_CONFIGURE_V3_MMU */
+#define KVM_PPC_MMUV3_RADIX 1 /* 1 = radix mode, 0 = HPT */
+#define KVM_PPC_MMUV3_GTSE 2 /* global translation shootdown enb. */
+
+/* For KVM_PPC_GET_RMMU_INFO */
+struct kvm_ppc_rmmu_info {
+ struct kvm_ppc_radix_geom {
+ __u8 page_shift;
+ __u8 level_bits[4];
+ __u8 pad[3];
+ } geometries[8];
+ __u32 ap_encodings[8];
+};
+
/* Per-vcpu XICS interrupt controller state */
#define KVM_REG_PPC_ICP_STATE (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x8c)
@@ -573,6 +593,10 @@ struct kvm_get_htab_header {
#define KVM_REG_PPC_SPRG9 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xba)
#define KVM_REG_PPC_DBSR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbb)
+/* POWER9 registers */
+#define KVM_REG_PPC_TIDR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbc)
+#define KVM_REG_PPC_PSSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbd)
+
/* Transactional Memory checkpointed state:
* This is all GPRs, all VSX regs and a subset of SPRs
*/
@@ -596,6 +620,7 @@ struct kvm_get_htab_header {
#define KVM_REG_PPC_TM_VSCR (KVM_REG_PPC_TM | KVM_REG_SIZE_U32 | 0x67)
#define KVM_REG_PPC_TM_DSCR (KVM_REG_PPC_TM | KVM_REG_SIZE_U64 | 0x68)
#define KVM_REG_PPC_TM_TAR (KVM_REG_PPC_TM | KVM_REG_SIZE_U64 | 0x69)
+#define KVM_REG_PPC_TM_XER (KVM_REG_PPC_TM | KVM_REG_SIZE_U64 | 0x6a)
/* PPC64 eXternal Interrupt Controller Specification */
#define KVM_DEV_XICS_GRP_SOURCES 1 /* 64-bit source attributes */
@@ -608,5 +633,7 @@ struct kvm_get_htab_header {
#define KVM_XICS_LEVEL_SENSITIVE (1ULL << 40)
#define KVM_XICS_MASKED (1ULL << 41)
#define KVM_XICS_PENDING (1ULL << 42)
+#define KVM_XICS_PRESENTED (1ULL << 43)
+#define KVM_XICS_QUEUED (1ULL << 44)
#endif /* __LINUX_KVM_POWERPC_H */
diff --git a/x86/include/asm/kvm.h b/x86/include/asm/kvm.h
index cd54147..739c0c5 100644
--- a/x86/include/asm/kvm.h
+++ b/x86/include/asm/kvm.h
@@ -216,9 +216,9 @@ struct kvm_cpuid_entry2 {
__u32 padding[3];
};
-#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0)
-#define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1)
-#define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2)
+#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
+#define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
+#define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
/* for KVM_SET_CPUID2 */
struct kvm_cpuid2 {
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 08/15] arm: allow vGICv3 emulation
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
From: Vladimir Murzin <vladimir.murzin@arm.com>
KVM/arm recently got support for vGICv3 (and vITS), which is evident
in the updated header file. So as now ARM has feature parity when it
comes to the GIC emulation, we can remove the special defines we had
in place to allow compilation for ARM(32).
For simplicity we now use 64K sized GIC regions everywhere, as GICv3
mandates them.
[Andre: some update, reword commit message]
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arm/aarch32/arm-cpu.c | 2 +-
arm/aarch32/include/kvm/kvm-arch.h | 3 ---
arm/aarch64/include/kvm/kvm-arch.h | 3 ---
arm/gic.c | 9 ---------
arm/include/arm-common/kvm-arch.h | 2 ++
5 files changed, 3 insertions(+), 16 deletions(-)
diff --git a/arm/aarch32/arm-cpu.c b/arm/aarch32/arm-cpu.c
index 27a8e17..16bba55 100644
--- a/arm/aarch32/arm-cpu.c
+++ b/arm/aarch32/arm-cpu.c
@@ -12,7 +12,7 @@ static void generate_fdt_nodes(void *fdt, struct kvm *kvm)
{
int timer_interrupts[4] = {13, 14, 11, 10};
- gic__generate_fdt_nodes(fdt, IRQCHIP_GICV2);
+ gic__generate_fdt_nodes(fdt, kvm->cfg.arch.irqchip);
timer__generate_fdt_nodes(fdt, kvm, timer_interrupts);
}
diff --git a/arm/aarch32/include/kvm/kvm-arch.h b/arm/aarch32/include/kvm/kvm-arch.h
index 1632e3c..cd31e72 100644
--- a/arm/aarch32/include/kvm/kvm-arch.h
+++ b/arm/aarch32/include/kvm/kvm-arch.h
@@ -1,9 +1,6 @@
#ifndef KVM__KVM_ARCH_H
#define KVM__KVM_ARCH_H
-#define ARM_GIC_DIST_SIZE 0x1000
-#define ARM_GIC_CPUI_SIZE 0x2000
-
#define ARM_KERN_OFFSET(...) 0x8000
#define ARM_MAX_MEMORY(...) ARM_LOMAP_MAX_MEMORY
diff --git a/arm/aarch64/include/kvm/kvm-arch.h b/arm/aarch64/include/kvm/kvm-arch.h
index 4925736..9de623a 100644
--- a/arm/aarch64/include/kvm/kvm-arch.h
+++ b/arm/aarch64/include/kvm/kvm-arch.h
@@ -1,9 +1,6 @@
#ifndef KVM__KVM_ARCH_H
#define KVM__KVM_ARCH_H
-#define ARM_GIC_DIST_SIZE 0x10000
-#define ARM_GIC_CPUI_SIZE 0x20000
-
#define ARM_KERN_OFFSET(kvm) ((kvm)->cfg.arch.aarch32_guest ? \
0x8000 : \
0x80000)
diff --git a/arm/gic.c b/arm/gic.c
index ff032d2..8479b89 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -9,15 +9,6 @@
#include <linux/kernel.h>
#include <linux/kvm.h>
-/* Those names are not defined for ARM (yet) */
-#ifndef KVM_VGIC_V3_ADDR_TYPE_DIST
-#define KVM_VGIC_V3_ADDR_TYPE_DIST 2
-#endif
-
-#ifndef KVM_VGIC_V3_ADDR_TYPE_REDIST
-#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3
-#endif
-
static int gic_fd = -1;
static u64 gic_redists_base;
static u64 gic_redists_size;
diff --git a/arm/include/arm-common/kvm-arch.h b/arm/include/arm-common/kvm-arch.h
index 0f5fb7f..c83c45f 100644
--- a/arm/include/arm-common/kvm-arch.h
+++ b/arm/include/arm-common/kvm-arch.h
@@ -18,6 +18,8 @@
#define ARM_GIC_DIST_BASE (ARM_AXI_AREA - ARM_GIC_DIST_SIZE)
#define ARM_GIC_CPUI_BASE (ARM_GIC_DIST_BASE - ARM_GIC_CPUI_SIZE)
#define ARM_GIC_SIZE (ARM_GIC_DIST_SIZE + ARM_GIC_CPUI_SIZE)
+#define ARM_GIC_DIST_SIZE 0x10000
+#define ARM_GIC_CPUI_SIZE 0x20000
#define ARM_IOPORT_SIZE (ARM_MMIO_AREA - ARM_IOPORT_AREA)
#define ARM_VIRTIO_MMIO_SIZE (ARM_AXI_AREA - (ARM_MMIO_AREA + ARM_GIC_SIZE))
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 09/15] arm: allow creation of an MSI register frame region
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
The GICv3 ITS expects a separate 64K page to hold ITS registers.
Add a function to reserve such a page in the guest's I/O memory and
use that for the ITS vGIC type.
To cover the 64K page with the MSI doorbell (which directly follows the
page with the register frames), we reserve this as well, although
the guest is never expected to write into this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arm/gic.c | 64 ++++++++++++++++++++++++++++++++++++++++++++
arm/include/arm-common/gic.h | 1 +
2 files changed, 65 insertions(+)
diff --git a/arm/gic.c b/arm/gic.c
index 8479b89..95e26a9 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -8,10 +8,13 @@
#include <linux/byteorder.h>
#include <linux/kernel.h>
#include <linux/kvm.h>
+#include <linux/sizes.h>
static int gic_fd = -1;
static u64 gic_redists_base;
static u64 gic_redists_size;
+static u64 gic_msi_base;
+static u64 gic_msi_size = 0;
int irqchip_parser(const struct option *opt, const char *arg, int unset)
{
@@ -29,6 +32,56 @@ int irqchip_parser(const struct option *opt, const char *arg, int unset)
return 0;
}
+static int gic__create_its_frame(struct kvm *kvm, u64 its_frame_addr)
+{
+ struct kvm_create_device its_device = {
+ .type = KVM_DEV_TYPE_ARM_VGIC_ITS,
+ .flags = 0,
+ };
+ struct kvm_device_attr its_attr = {
+ .group = KVM_DEV_ARM_VGIC_GRP_ADDR,
+ .attr = KVM_VGIC_ITS_ADDR_TYPE,
+ .addr = (u64)(unsigned long)&its_frame_addr,
+ };
+ struct kvm_device_attr its_init_attr = {
+ .group = KVM_DEV_ARM_VGIC_GRP_CTRL,
+ .attr = KVM_DEV_ARM_VGIC_CTRL_INIT,
+ };
+ int err;
+
+ err = ioctl(kvm->vm_fd, KVM_CREATE_DEVICE, &its_device);
+ if (err) {
+ fprintf(stderr,
+ "GICv3 ITS requested, but kernel does not support it.\n");
+ fprintf(stderr, "Try --irqchip=gicv3 instead\n");
+ return err;
+ }
+
+ err = ioctl(its_device.fd, KVM_HAS_DEVICE_ATTR, &its_attr);
+ if (err) {
+ close(its_device.fd);
+ its_device.fd = -1;
+ return err;
+ }
+
+ err = ioctl(its_device.fd, KVM_SET_DEVICE_ATTR, &its_attr);
+ if (err)
+ return err;
+
+ return ioctl(its_device.fd, KVM_SET_DEVICE_ATTR, &its_init_attr);
+}
+
+static int gic__create_msi_frame(struct kvm *kvm, enum irqchip_type type,
+ u64 msi_frame_addr)
+{
+ switch (type) {
+ case IRQCHIP_GICV3_ITS:
+ return gic__create_its_frame(kvm, msi_frame_addr);
+ default: /* No MSI frame needed */
+ return 0;
+ }
+}
+
static int gic__create_device(struct kvm *kvm, enum irqchip_type type)
{
int err;
@@ -58,6 +111,7 @@ static int gic__create_device(struct kvm *kvm, enum irqchip_type type)
dist_attr.attr = KVM_VGIC_V2_ADDR_TYPE_DIST;
break;
case IRQCHIP_GICV3:
+ case IRQCHIP_GICV3_ITS:
gic_device.type = KVM_DEV_TYPE_ARM_VGIC_V3;
dist_attr.attr = KVM_VGIC_V3_ADDR_TYPE_DIST;
break;
@@ -73,6 +127,7 @@ static int gic__create_device(struct kvm *kvm, enum irqchip_type type)
case IRQCHIP_GICV2:
err = ioctl(gic_fd, KVM_SET_DEVICE_ATTR, &cpu_if_attr);
break;
+ case IRQCHIP_GICV3_ITS:
case IRQCHIP_GICV3:
err = ioctl(gic_fd, KVM_SET_DEVICE_ATTR, &redist_attr);
break;
@@ -84,6 +139,10 @@ static int gic__create_device(struct kvm *kvm, enum irqchip_type type)
if (err)
goto out_err;
+ err = gic__create_msi_frame(kvm, type, gic_msi_base);
+ if (err)
+ goto out_err;
+
return 0;
out_err:
@@ -127,9 +186,14 @@ int gic__create(struct kvm *kvm, enum irqchip_type type)
switch (type) {
case IRQCHIP_GICV2:
break;
+ case IRQCHIP_GICV3_ITS:
+ /* We reserve the 64K page with the doorbell as well. */
+ gic_msi_size = KVM_VGIC_V3_ITS_SIZE + SZ_64K;
+ /* fall through */
case IRQCHIP_GICV3:
gic_redists_size = kvm->cfg.nrcpus * ARM_GIC_REDIST_SIZE;
gic_redists_base = ARM_GIC_DIST_BASE - gic_redists_size;
+ gic_msi_base = gic_redists_base - gic_msi_size;
break;
default:
return -ENODEV;
diff --git a/arm/include/arm-common/gic.h b/arm/include/arm-common/gic.h
index b43a180..433dd23 100644
--- a/arm/include/arm-common/gic.h
+++ b/arm/include/arm-common/gic.h
@@ -24,6 +24,7 @@
enum irqchip_type {
IRQCHIP_GICV2,
IRQCHIP_GICV3,
+ IRQCHIP_GICV3_ITS,
};
struct kvm;
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 10/15] arm: FDT: create MSI controller DT node
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
The ARM GICv3 ITS requires a separate device tree node to describe
the ITS. Add this as a child to the GIC interrupt controller node
to let a guest discover and use the ITS if the user requests it.
Since we now need to specify #address-cells for the GIC node, we
have to add two zeroes to the interrupt map to match that.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arm/gic.c | 22 +++++++++++++++++++++-
arm/include/arm-common/fdt-arch.h | 2 +-
arm/pci.c | 5 +++++
3 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/arm/gic.c b/arm/gic.c
index 95e26a9..056fd09 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -251,7 +251,8 @@ late_init(gic__init_gic)
void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type)
{
- const char *compatible;
+ const char *compatible, *msi_compatible = NULL;
+ u64 msi_prop[2];
u64 reg_prop[] = {
cpu_to_fdt64(ARM_GIC_DIST_BASE), cpu_to_fdt64(ARM_GIC_DIST_SIZE),
0, 0, /* to be filled */
@@ -263,6 +264,9 @@ void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type)
reg_prop[2] = cpu_to_fdt64(ARM_GIC_CPUI_BASE);
reg_prop[3] = cpu_to_fdt64(ARM_GIC_CPUI_SIZE);
break;
+ case IRQCHIP_GICV3_ITS:
+ msi_compatible = "arm,gic-v3-its";
+ /* fall-through */
case IRQCHIP_GICV3:
compatible = "arm,gic-v3";
reg_prop[2] = cpu_to_fdt64(gic_redists_base);
@@ -278,6 +282,22 @@ void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type)
_FDT(fdt_property(fdt, "interrupt-controller", NULL, 0));
_FDT(fdt_property(fdt, "reg", reg_prop, sizeof(reg_prop)));
_FDT(fdt_property_cell(fdt, "phandle", PHANDLE_GIC));
+ _FDT(fdt_property_cell(fdt, "#address-cells", 2));
+ _FDT(fdt_property_cell(fdt, "#size-cells", 2));
+
+ if (msi_compatible) {
+ _FDT(fdt_property(fdt, "ranges", NULL, 0));
+
+ _FDT(fdt_begin_node(fdt, "msic"));
+ _FDT(fdt_property_string(fdt, "compatible", msi_compatible));
+ _FDT(fdt_property(fdt, "msi-controller", NULL, 0));
+ _FDT(fdt_property_cell(fdt, "phandle", PHANDLE_MSI));
+ msi_prop[0] = cpu_to_fdt64(gic_msi_base);
+ msi_prop[1] = cpu_to_fdt64(gic_msi_size);
+ _FDT(fdt_property(fdt, "reg", msi_prop, sizeof(msi_prop)));
+ _FDT(fdt_end_node(fdt));
+ }
+
_FDT(fdt_end_node(fdt));
}
diff --git a/arm/include/arm-common/fdt-arch.h b/arm/include/arm-common/fdt-arch.h
index 53ba633..60c2d40 100644
--- a/arm/include/arm-common/fdt-arch.h
+++ b/arm/include/arm-common/fdt-arch.h
@@ -1,6 +1,6 @@
#ifndef ARM__FDT_H
#define ARM__FDT_H
-enum phandles {PHANDLE_RESERVED = 0, PHANDLE_GIC, PHANDLES_MAX};
+enum phandles {PHANDLE_RESERVED = 0, PHANDLE_GIC, PHANDLE_MSI, PHANDLES_MAX};
#endif /* ARM__FDT_H */
diff --git a/arm/pci.c b/arm/pci.c
index d393c46..813df26 100644
--- a/arm/pci.c
+++ b/arm/pci.c
@@ -18,6 +18,8 @@ struct of_gic_irq {
struct of_interrupt_map_entry {
struct of_pci_irq_mask pci_irq_mask;
u32 gic_phandle;
+ u32 gic_addr_hi;
+ u32 gic_addr_lo;
struct of_gic_irq gic_irq;
} __attribute__((packed));
@@ -65,6 +67,7 @@ void pci__generate_fdt_nodes(void *fdt)
_FDT(fdt_property(fdt, "bus-range", bus_range, sizeof(bus_range)));
_FDT(fdt_property(fdt, "reg", &cfg_reg_prop, sizeof(cfg_reg_prop)));
_FDT(fdt_property(fdt, "ranges", ranges, sizeof(ranges)));
+ _FDT(fdt_property_cell(fdt, "msi-parent", PHANDLE_MSI));
/* Generate the interrupt map ... */
dev_hdr = device__first_dev(DEVICE_BUS_PCI);
@@ -85,6 +88,8 @@ void pci__generate_fdt_nodes(void *fdt)
.pci_pin = cpu_to_fdt32(pin),
},
.gic_phandle = cpu_to_fdt32(PHANDLE_GIC),
+ .gic_addr_hi = 0,
+ .gic_addr_lo = 0,
.gic_irq = {
.type = cpu_to_fdt32(GIC_FDT_IRQ_TYPE_SPI),
.num = cpu_to_fdt32(irq - GIC_SPI_IRQ_BASE),
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 11/15] add kvm__supports_vm_extension()
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
KVM capabilities can be per-VM, in this case the ioctl should be
issued on the VM file descriptor, not on the system fd.
Since this feature is guarded by a (system) capability itself, wrap
the call into a function of its own.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
include/kvm/kvm.h | 1 +
kvm.c | 28 ++++++++++++++++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/include/kvm/kvm.h b/include/kvm/kvm.h
index 4a76ec2..a76a25d 100644
--- a/include/kvm/kvm.h
+++ b/include/kvm/kvm.h
@@ -129,6 +129,7 @@ static inline bool host_ptr_in_ram(struct kvm *kvm, void *p)
}
bool kvm__supports_extension(struct kvm *kvm, unsigned int extension);
+bool kvm__supports_vm_extension(struct kvm *kvm, unsigned int extension);
static inline void kvm__set_thread_name(const char *name)
{
diff --git a/kvm.c b/kvm.c
index 7fa76f7..665ed14 100644
--- a/kvm.c
+++ b/kvm.c
@@ -93,6 +93,34 @@ const char *kvm__get_dir(void)
return kvm_dir;
}
+bool kvm__supports_vm_extension(struct kvm *kvm, unsigned int extension)
+{
+ static int supports_vm_ext_check = 0;
+ int ret;
+
+ switch (supports_vm_ext_check) {
+ case 0:
+ ret = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION,
+ KVM_CAP_CHECK_EXTENSION_VM);
+ if (ret <= 0) {
+ supports_vm_ext_check = -1;
+ return false;
+ }
+ supports_vm_ext_check = 1;
+ /* fall through */
+ case 1:
+ break;
+ case -1:
+ return false;
+ }
+
+ ret = ioctl(kvm->vm_fd, KVM_CHECK_EXTENSION, extension);
+ if (ret < 0)
+ return false;
+
+ return ret;
+}
+
bool kvm__supports_extension(struct kvm *kvm, unsigned int extension)
{
int ret;
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 12/15] PCI: inject PCI device ID on MSI injection
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
The ITS emulation requires a unique device ID to be passed along the
MSI payload when kvmtool wants to trigger an MSI in the guest.
According to the proposed changes to the interface add the PCI
bus/device/function triple to the structure passed with the ioctl.
Check the respective capability before actually adding the device ID
to the kvm_msi struct.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arm/gic.c | 3 +++
include/kvm/kvm.h | 1 +
virtio/pci.c | 8 +++++++-
3 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/arm/gic.c b/arm/gic.c
index 056fd09..651ede7 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -245,6 +245,9 @@ static int gic__init_gic(struct kvm *kvm)
return ret;
}
+ kvm->msix_needs_devid = kvm__supports_vm_extension(kvm,
+ KVM_CAP_MSI_DEVID);
+
return 0;
}
late_init(gic__init_gic)
diff --git a/include/kvm/kvm.h b/include/kvm/kvm.h
index a76a25d..90463b8 100644
--- a/include/kvm/kvm.h
+++ b/include/kvm/kvm.h
@@ -63,6 +63,7 @@ struct kvm {
struct list_head mem_banks;
bool nmi_disabled;
+ bool msix_needs_devid;
const char *vmlinux;
struct disk_image **disks;
diff --git a/virtio/pci.c b/virtio/pci.c
index 04176c1..f0e884c 100644
--- a/virtio/pci.c
+++ b/virtio/pci.c
@@ -334,7 +334,8 @@ static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu,
update_msix_map(vpci, table, vecnum);
}
-static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, int vec)
+static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci,
+ int vec)
{
struct kvm_msi msi = {
.address_lo = vpci->msix_table[vec].msg.address_lo,
@@ -342,6 +343,11 @@ static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, int
.data = vpci->msix_table[vec].msg.data,
};
+ if (kvm->msix_needs_devid) {
+ msi.flags = KVM_MSI_VALID_DEVID;
+ msi.devid = vpci->dev_hdr.dev_num << 3;
+ }
+
ioctl(kvm->vm_fd, KVM_SIGNAL_MSI, &msi);
}
--
2.9.0
^ permalink raw reply related
* [kvmtool PATCH v10 13/15] arm: setup SPI IRQ routing tables
From: Andre Przywara @ 2017-04-25 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170425143932.17235-1-andre.przywara@arm.com>
Since we soon start using GSI routing on ARM platforms too, we have
to setup the initial SPI routing table. Before the first call to
KVM_SET_GSI_ROUTING, the kernel holds this table internally, but this
is overwritten with the ioctl, so we have to explicitly set it up
here.
The routing is actually not used for IRQs triggered by KVM_IRQ_LINE,
but it needs to be here anyway. We use a simple 1:1 mapping.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arm/gic.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arm/gic.c b/arm/gic.c
index 651ede7..d9c3175 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -10,6 +10,8 @@
#include <linux/kvm.h>
#include <linux/sizes.h>
+#define IRQCHIP_GIC 0
+
static int gic_fd = -1;
static u64 gic_redists_base;
static u64 gic_redists_size;
@@ -32,6 +34,34 @@ int irqchip_parser(const struct option *opt, const char *arg, int unset)
return 0;
}
+static int irq__routing_init(struct kvm *kvm)
+{
+ int r;
+ int irqlines = ALIGN(irq__get_nr_allocated_lines(), 32);
+
+ /*
+ * This describes the default routing that the kernel uses without
+ * any routing explicitly set up via KVM_SET_GSI_ROUTING. So we
+ * don't need to commit these setting right now. The first actual
+ * user (MSI routing) will engage these mappings then.
+ */
+ for (next_gsi = 0; next_gsi < irqlines; next_gsi++) {
+ r = irq__allocate_routing_entry();
+ if (r)
+ return r;
+
+ irq_routing->entries[irq_routing->nr++] =
+ (struct kvm_irq_routing_entry) {
+ .gsi = next_gsi,
+ .type = KVM_IRQ_ROUTING_IRQCHIP,
+ .u.irqchip.irqchip = IRQCHIP_GIC,
+ .u.irqchip.pin = next_gsi,
+ };
+ }
+
+ return 0;
+}
+
static int gic__create_its_frame(struct kvm *kvm, u64 its_frame_addr)
{
struct kvm_create_device its_device = {
@@ -239,6 +269,8 @@ static int gic__init_gic(struct kvm *kvm)
return ret;
}
+ irq__routing_init(kvm);
+
if (!ioctl(gic_fd, KVM_HAS_DEVICE_ATTR, &vgic_init_attr)) {
ret = ioctl(gic_fd, KVM_SET_DEVICE_ATTR, &vgic_init_attr);
if (ret)
--
2.9.0
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