* [PATCH] iio: stm32: fix adc/trigger link error
From: Jonathan Cameron @ 2017-12-02 11:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <da83af87-6c70-8b00-b602-342a9274f81f@st.com>
On Mon, 27 Nov 2017 10:09:47 +0100
Fabrice Gasnier <fabrice.gasnier@st.com> wrote:
> On 09/25/2017 07:26 PM, Jonathan Cameron wrote:
> > On Mon, 25 Sep 2017 11:16:04 +0100
> > Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> >
> >> On Mon, 25 Sep 2017 11:54:06 +0200
> >> Fabrice Gasnier <fabrice.gasnier@st.com> wrote:
> >>
> >>> On 09/10/2017 06:00 PM, Jonathan Cameron wrote:
> >>>> On Wed, 6 Sep 2017 18:16:33 +0200
> >>>> Fabrice Gasnier <fabrice.gasnier@st.com> wrote:
> >>>>
> >>>>> On 09/06/2017 02:56 PM, Arnd Bergmann wrote:
> >>>>>> The ADC driver can trigger on either the timer or the lptim
> >>>>>> trigger, but it only uses a Kconfig 'select' statement
> >>>>>> to ensure that the first of the two is present. When the lptim
> >>>>>> trigger is enabled as a loadable module, and the adc driver
> >>>>>> is built-in, we now get a link error:
> >>>>>>
> >>>>>> drivers/iio/adc/stm32-adc.o: In function `stm32_adc_get_trig_extsel':
> >>>>>> stm32-adc.c:(.text+0x4e0): undefined reference to `is_stm32_lptim_trigger'
> >>>>>>
> >>>>>> We could use a second 'select' statement and always have both
> >>>>>> trigger drivers enabled when the adc driver is, but it seems that
> >>>>>> the lptimer trigger was intentionally left optional, so it seems
> >>>>>> better to keep it that way.
> >>>>> Hi Arnd,
> >>>>>
> >>>>> This is correct, not all stm32 have this hardware.
> >>>>>>
> >>>>>> This adds a hack to use 'IS_REACHABLE()' rather than 'IS_ENABLED()',
> >>>>>> which avoids the link error, but instead leads to the lptimer trigger
> >>>>>> not being used in the broken configuration. I've added a runtime
> >>>>>> warning for this case to help users figure out what they did wrong
> >>>>>> if this should ever be done by accident.
> >>>>>>
> >>>>>> Fixes: f0b638a7f6db ("iio: adc: stm32: add support for lptimer triggers")
> >>>>>> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> >>>>> Tested-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> >>>>
> >>>> This may take me a few weeks to pick up. I don't want to
> >>>> pull the mfd immutable branch in just to have this fix, so this will
> >>>> get sorted after rc1 is out.
> >>>>
> >>>> As ever, poke me if it looks like I've forgotten about it.
> >>>
> >>> Hi Jonathan,
> >>>
> >>> Di you apply this one?
> >>
> >> I think I still need to rebase my branch. Greg took my fixes pull this morning
> >> so I can fast forward that branch next time I'm on the right PC and then pick
> >> this up.
> >>
> >> Thanks for the reminder.
> >
> > Applied to the fixes-togreg branch of iio.git.
>
> Hi Jonathan,
>
> Sorry to raise this again. Maybe I missed something, but I can't find
> this fix on recent tag (4.15-rc1). Do you know if this patch from Arnd
> is on its way in ?
Hi Fabrice,
You are absolutely correct to raise this (and please do so if similar
seems to have happened in the future).
I dropped this one somehow - now applied to my fixes-togreg branch of iio.git
and definitely pushed out.
Sorry about that. Will hopefully get a pull request out in the next
day or so.
Thanks,
Jonathan
>
> Please kindly let me know.
> BR,
> Fabrice
> >
> > Thanks,
> >
> > Jonathan
> >>
> >> Jonathan
> >>
> >>>
> >>> Thanks,
> >>> Best Regards,
> >>> Fabrice
> >>>> Sorry for the delay!
> >>>>
> >>>> Jonathan
> >>>>
> >>>>>
> >>>>> Many thanks for the fix,
> >>>>> Best Regards,
> >>>>> Fabrice
> >>>>>> ---
> >>>>>> include/linux/iio/timer/stm32-lptim-trigger.h | 5 ++++-
> >>>>>> 1 file changed, 4 insertions(+), 1 deletion(-)
> >>>>>>
> >>>>>> diff --git a/include/linux/iio/timer/stm32-lptim-trigger.h b/include/linux/iio/timer/stm32-lptim-trigger.h
> >>>>>> index 34d59bfdce2d..464458d20b16 100644
> >>>>>> --- a/include/linux/iio/timer/stm32-lptim-trigger.h
> >>>>>> +++ b/include/linux/iio/timer/stm32-lptim-trigger.h
> >>>>>> @@ -16,11 +16,14 @@
> >>>>>> #define LPTIM2_OUT "lptim2_out"
> >>>>>> #define LPTIM3_OUT "lptim3_out"
> >>>>>>
> >>>>>> -#if IS_ENABLED(CONFIG_IIO_STM32_LPTIMER_TRIGGER)
> >>>>>> +#if IS_REACHABLE(CONFIG_IIO_STM32_LPTIMER_TRIGGER)
> >>>>>> bool is_stm32_lptim_trigger(struct iio_trigger *trig);
> >>>>>> #else
> >>>>>> static inline bool is_stm32_lptim_trigger(struct iio_trigger *trig)
> >>>>>> {
> >>>>>> +#if IS_ENABLED(CONFIG_IIO_STM32_LPTIMER_TRIGGER)
> >>>>>> + pr_warn_once("stm32 lptim_trigger not linked in\n");
> >>>>>> +#endif
> >>>>>> return false;
> >>>>>> }
> >>>>>> #endif
> >>>>>>
> >>>>> --
> >>>>> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> >>>>> the body of a message to majordomo at vger.kernel.org
> >>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
> >>>>
> >>>
> >>> _______________________________________________
> >>> linux-arm-kernel mailing list
> >>> linux-arm-kernel at lists.infradead.org
> >>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >>
> >> --
> >> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> >> the body of a message to majordomo at vger.kernel.org
> >> More majordomo info at http://vger.kernel.org/majordomo-info.html
> >
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* linux-next on Nokia N900: hang on boot
From: Pali Rohár @ 2017-12-02 11:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171202101456.GA1810@amd>
On Saturday 02 December 2017 11:14:56 Pavel Machek wrote:
> Hi!
>
> next from 2017-12-01 was tested.
>
> MMC is detected, but then I see wtl4030_bci: .. battery temperature
> out of range, and machine halts. This is just before userspace would
> be started.
>
> 4.15-rc1 seems to work ok on the box.
>
> Any ideas?
twl4030_bci is not available on Nokia N900, so we should not try to read
its registers.
--
Pali Roh?r
pali.rohar at gmail.com
^ permalink raw reply
* [PATCH 0/5] crypto: arm64 - disable NEON across scatterwalk API calls
From: Ard Biesheuvel @ 2017-12-02 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKv+Gu-dG0Zc35NZZ85U36K2TXCpN+wJTYOyjkhxRjXbdiJTAQ@mail.gmail.com>
On 2 December 2017 at 09:11, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> On 2 December 2017 at 09:01, Peter Zijlstra <peterz@infradead.org> wrote:
>> On Fri, Dec 01, 2017 at 09:19:22PM +0000, Ard Biesheuvel wrote:
>>> Note that the remaining crypto drivers simply operate on fixed buffers, so
>>> while the RT crowd may still feel the need to disable those (and the ones
>>> below as well, perhaps), they don't call back into the crypto layer like
>>> the ones updated by this series, and so there's no room for improvement
>>> there AFAICT.
>>
>> Do these other drivers process all the blocks fed to them in one go
>> under a single NEON section, or do they do a single fixed block per
>> NEON invocation?
>
> They consume the entire input in a single go, yes. But making it more
> granular than that is going to hurt performance, unless we introduce
> some kind of kernel_neon_yield(), which does a end+begin but only if
> the task is being scheduled out.
>
> For example, the SHA256 keeps 256 bytes of round constants in NEON
> registers, and reloading those from memory for each 64 byte block of
> input is going to be noticeable. The same applies to the AES code
> (although the numbers are slightly different)
Something like below should do the trick I think (apologies for the
patch soup). I.e., check TIF_NEED_RESCHED at a point where only very
few NEON registers are live, and preserve/restore the live registers
across calls to kernel_neon_end + kernel_neon_begin. Would that work
for RT?
diff --git a/arch/arm64/crypto/sha2-ce-core.S b/arch/arm64/crypto/sha2-ce-core.S
index 679c6c002f4f..4f12038574f3 100644
--- a/arch/arm64/crypto/sha2-ce-core.S
+++ b/arch/arm64/crypto/sha2-ce-core.S
@@ -77,6 +77,10 @@
* int blocks)
*/
ENTRY(sha2_ce_transform)
+ stp x29, x30, [sp, #-48]!
+ mov x29, sp
+
+restart:
/* load round constants */
adr x8, .Lsha2_rcon
ld1 { v0.4s- v3.4s}, [x8], #64
@@ -129,14 +133,17 @@ CPU_LE( rev32 v19.16b, v19.16b )
add dgbv.4s, dgbv.4s, dg1v.4s
/* handled all input blocks? */
- cbnz w2, 0b
+ cbz w2, 2f
+
+ tif_need_resched 4f, 5
+ b 0b
/*
* Final block: add padding and total bit count.
* Skip if the input size was not a round multiple of the block size,
* the padding is handled by the C code in that case.
*/
- cbz x4, 3f
+2: cbz x4, 3f
ldr_l w4, sha256_ce_offsetof_count, x4
ldr x4, [x0, x4]
movi v17.2d, #0
@@ -151,5 +158,15 @@ CPU_LE( rev32 v19.16b, v19.16b )
/* store new state */
3: st1 {dgav.4s, dgbv.4s}, [x0]
+ ldp x29, x30, [sp], #48
ret
+
+4: st1 {dgav.4s, dgbv.4s}, [x0]
+ stp x0, x1, [sp, #16]
+ stp x2, x4, [sp, #32]
+ bl kernel_neon_end
+ bl kernel_neon_begin
+ ldp x0, x1, [sp, #16]
+ ldp x2, x4, [sp, #32]
+ b restart
ENDPROC(sha2_ce_transform)
diff --git a/arch/arm64/include/asm/assembler.h
b/arch/arm64/include/asm/assembler.h
index aef72d886677..e3e7e15ebefd 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -512,4 +512,15 @@ alternative_else_nop_endif
#endif
.endm
+/*
+ * Check TIF_NEED_RESCHED flag from assembler (for kernel mode NEON)
+ */
+ .macro tif_need_resched, lbl:req, regnum:req
+#ifdef CONFIG_PREEMPT
+ get_thread_info x\regnum
+ ldr w\regnum, [x\regnum, #TSK_TI_FLAGS] // get flags
+ tbnz w\regnum, #TIF_NEED_RESCHED, \lbl // needs rescheduling?
+#endif
+ .endm
+
#endif /* __ASM_ASSEMBLER_H */
^ permalink raw reply related
* [PATCH net-next 1/2 v6] net: ethernet: Add DT bindings for the Gemini ethernet
From: Linus Walleij @ 2017-12-02 11:06 UTC (permalink / raw)
To: linux-arm-kernel
This adds the device tree bindings for the Gemini ethernet
controller. It is pretty straight-forward, using standard
bindings and modelling the two child ports as child devices
under the parent ethernet controller device.
Cc: devicetree at vger.kernel.org
Cc: Tobias Waldvogel <tobias.waldvogel@gmail.com>
Cc: Micha? Miros?aw <mirq-linux@rere.qmqm.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
.../bindings/net/cortina,gemini-ethernet.txt | 92 ++++++++++++++++++++++
1 file changed, 92 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
diff --git a/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
new file mode 100644
index 000000000000..35fa3abd1c73
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
@@ -0,0 +1,92 @@
+Cortina Systems Gemini Ethernet Controller
+==========================================
+
+This ethernet controller is found in the Gemini SoC family:
+StorLink SL3512 and SL3516, also known as Cortina Systems
+CS3512 and CS3516.
+
+Required properties:
+- compatible: must be "cortina,gemini-ethernet"
+- reg: must contain the global registers and the V-bit and A-bit
+ memory areas, in total three register sets.
+- syscon: a phandle to the system controller
+- #address-cells: must be specified, must be <1>
+- #size-cells: must be specified, must be <1>
+- ranges: should be state like this giving a 1:1 address translation
+ for the subnodes
+
+The subnodes represents the two ethernet ports in this device.
+They are not independent of each other since they share resources
+in the parent node, and are thus children.
+
+Required subnodes:
+- port0: contains the resources for ethernet port 0
+- port1: contains the resources for ethernet port 1
+
+Required subnode properties:
+- compatible: must be "cortina,gemini-ethernet-port"
+- reg: must contain two register areas: the DMA/TOE memory and
+ the GMAC memory area of the port
+- interrupts: should contain the interrupt line of the port.
+ this is nominally a level interrupt active high.
+- resets: this must provide an SoC-integrated reset line for
+ the port.
+- clocks: this should contain a handle to the PCLK clock for
+ clocking the silicon in this port
+- clock-names: must be "PCLK"
+
+Optional subnode properties:
+- phy-mode: see ethernet.txt
+- phy-handle: see ethernet.txt
+
+Example:
+
+mdio-bus {
+ (...)
+ phy0: ethernet-phy at 1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ phy1: ethernet-phy at 3 {
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+};
+
+
+ethernet at 60000000 {
+ compatible = "cortina,gemini-ethernet";
+ reg = <0x60000000 0x4000>, /* Global registers, queue */
+ <0x60004000 0x2000>, /* V-bit */
+ <0x60006000 0x2000>; /* A-bit */
+ syscon = <&syscon>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gmac0: port0 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */
+ <0x6000a000 0x2000>; /* Port 0 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC0>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC0>;
+ clock-names = "PCLK";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+
+ gmac1: port1 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */
+ <0x6000e000 0x2000>; /* Port 1 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC1>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC1>;
+ clock-names = "PCLK";
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+};
--
2.14.3
^ permalink raw reply related
* [PATCH] firmware: ti_sci: Use %zu for size_t print format
From: Nishanth Menon @ 2017-12-02 10:20 UTC (permalink / raw)
To: linux-arm-kernel
mbox_msg->len is of type size_t and %d is incorrect format. Instead
use %zu for handling size_t correctly.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
drivers/firmware/ti_sci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index 23b12d99ddfe..5229036dcfbf 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -287,13 +287,13 @@ static void ti_sci_rx_callback(struct mbox_client *cl, void *m)
/* Is the message of valid length? */
if (mbox_msg->len > info->desc->max_msg_size) {
- dev_err(dev, "Unable to handle %d xfer(max %d)\n",
+ dev_err(dev, "Unable to handle %zu xfer(max %d)\n",
mbox_msg->len, info->desc->max_msg_size);
ti_sci_dump_header_dbg(dev, hdr);
return;
}
if (mbox_msg->len < xfer->rx_len) {
- dev_err(dev, "Recv xfer %d < expected %d length\n",
+ dev_err(dev, "Recv xfer %zu < expected %d length\n",
mbox_msg->len, xfer->rx_len);
ti_sci_dump_header_dbg(dev, hdr);
return;
--
2.14.1
^ permalink raw reply related
* linux-next on Nokia N900: hang on boot
From: Pavel Machek @ 2017-12-02 10:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
next from 2017-12-01 was tested.
MMC is detected, but then I see wtl4030_bci: .. battery temperature
out of range, and machine halts. This is just before userspace would
be started.
4.15-rc1 seems to work ok on the box.
Any ideas?
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 181 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20171202/ae9b369f/attachment.sig>
^ permalink raw reply
* [PATCH] pinctrl: pxa2xx: add MODULE_LICENSE
From: Daniel Axtens @ 2017-12-02 9:40 UTC (permalink / raw)
To: linux-arm-kernel
This fixes the following warning on an allmodconfig build:
WARNING: modpost: missing MODULE_LICENSE() in drivers/pinctrl/pxa/pinctrl-pxa2xx.o
This matches the license in the header.
Signed-off-by: Daniel Axtens <dja@axtens.net>
---
drivers/pinctrl/pxa/pinctrl-pxa2xx.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/pxa/pinctrl-pxa2xx.c b/drivers/pinctrl/pxa/pinctrl-pxa2xx.c
index 866aa3ce1ac9..3d67fca5ae21 100644
--- a/drivers/pinctrl/pxa/pinctrl-pxa2xx.c
+++ b/drivers/pinctrl/pxa/pinctrl-pxa2xx.c
@@ -436,3 +436,5 @@ int pxa2xx_pinctrl_exit(struct platform_device *pdev)
return 0;
}
EXPORT_SYMBOL_GPL(pxa2xx_pinctrl_exit);
+
+MODULE_LICENSE("GPL v2");
--
2.11.0
^ permalink raw reply related
* [PATCH 0/5] crypto: arm64 - disable NEON across scatterwalk API calls
From: Ard Biesheuvel @ 2017-12-02 9:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171202090107.GT3326@worktop>
On 2 December 2017 at 09:01, Peter Zijlstra <peterz@infradead.org> wrote:
> On Fri, Dec 01, 2017 at 09:19:22PM +0000, Ard Biesheuvel wrote:
>> Note that the remaining crypto drivers simply operate on fixed buffers, so
>> while the RT crowd may still feel the need to disable those (and the ones
>> below as well, perhaps), they don't call back into the crypto layer like
>> the ones updated by this series, and so there's no room for improvement
>> there AFAICT.
>
> Do these other drivers process all the blocks fed to them in one go
> under a single NEON section, or do they do a single fixed block per
> NEON invocation?
They consume the entire input in a single go, yes. But making it more
granular than that is going to hurt performance, unless we introduce
some kind of kernel_neon_yield(), which does a end+begin but only if
the task is being scheduled out.
For example, the SHA256 keeps 256 bytes of round constants in NEON
registers, and reloading those from memory for each 64 byte block of
input is going to be noticeable. The same applies to the AES code
(although the numbers are slightly different)
^ permalink raw reply
* [PATCH 0/5] crypto: arm64 - disable NEON across scatterwalk API calls
From: Peter Zijlstra @ 2017-12-02 9:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171201211927.24653-1-ard.biesheuvel@linaro.org>
On Fri, Dec 01, 2017 at 09:19:22PM +0000, Ard Biesheuvel wrote:
> Note that the remaining crypto drivers simply operate on fixed buffers, so
> while the RT crowd may still feel the need to disable those (and the ones
> below as well, perhaps), they don't call back into the crypto layer like
> the ones updated by this series, and so there's no room for improvement
> there AFAICT.
Do these other drivers process all the blocks fed to them in one go
under a single NEON section, or do they do a single fixed block per
NEON invocation?
^ permalink raw reply
* [PATCH 0/2] Add devicetree for Axentia Nattis
From: Peter Rosin @ 2017-12-02 7:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CABxcv=k6K8gRDSRu1r6=mELcOQLcNr6EOQGj0Q0wDXrGa58sqw@mail.gmail.com>
On 2017-12-02 02:05, Javier Martinez Canillas wrote:
> Hello Peter,
>
> On Fri, Dec 1, 2017 at 11:44 PM, Peter Rosin <peda@axentia.se> wrote:
>> Hi!
>>
>> I'd like to add a devicetree for our Nattis to the kernel. The
>> Nattis is a device for showing departures for public transportation
>> (optionally including a text-to-speech module for the visually
>> impaired).
>>
>> I'm a bit unsure if the tfa9879 sound codec binding is needed,
>> but I suppose it belongs in trivial-devices?
>>
>
> There's a DT binding for this device now:
>
> https://patchwork.ozlabs.org/patch/816157/
What do you know, thanks for the hint. I even reviewed a followup
patch for that one, so I guess I should have known...
Anyway, I should probably add a #sound-dai-cells entry. v2 coming up.
Cheers,
peda
^ permalink raw reply
* [PATCH 1/1] timecounter: Make cyclecounter struct part of timecounter struct
From: Sagar Arun Kamble @ 2017-12-02 4:31 UTC (permalink / raw)
To: linux-arm-kernel
There is no real need for the users of timecounters to define cyclecounter
and timecounter variables separately. Since timecounter will always be
based on cyclecounter, have cyclecounter struct as member of timecounter
struct.
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-kernel at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: netdev at vger.kernel.org
Cc: intel-wired-lan at lists.osuosl.org
Cc: linux-rdma at vger.kernel.org
Cc: alsa-devel at alsa-project.org
Cc: kvmarm at lists.cs.columbia.edu
---
arch/microblaze/kernel/timer.c | 20 ++++++------
drivers/clocksource/arm_arch_timer.c | 19 ++++++------
drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 3 +-
drivers/net/ethernet/amd/xgbe/xgbe-ptp.c | 9 +++---
drivers/net/ethernet/amd/xgbe/xgbe.h | 1 -
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | 1 -
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 20 ++++++------
drivers/net/ethernet/freescale/fec.h | 1 -
drivers/net/ethernet/freescale/fec_ptp.c | 30 +++++++++---------
drivers/net/ethernet/intel/e1000e/e1000.h | 1 -
drivers/net/ethernet/intel/e1000e/netdev.c | 27 ++++++++--------
drivers/net/ethernet/intel/e1000e/ptp.c | 2 +-
drivers/net/ethernet/intel/igb/igb.h | 1 -
drivers/net/ethernet/intel/igb/igb_ptp.c | 25 ++++++++-------
drivers/net/ethernet/intel/ixgbe/ixgbe.h | 1 -
drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c | 17 +++++-----
drivers/net/ethernet/mellanox/mlx4/en_clock.c | 28 ++++++++---------
drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 1 -
.../net/ethernet/mellanox/mlx5/core/lib/clock.c | 34 ++++++++++----------
drivers/net/ethernet/qlogic/qede/qede_ptp.c | 20 ++++++------
drivers/net/ethernet/ti/cpts.c | 36 ++++++++++++----------
drivers/net/ethernet/ti/cpts.h | 1 -
include/linux/mlx5/driver.h | 1 -
include/linux/timecounter.h | 4 +--
include/sound/hdaudio.h | 1 -
kernel/time/timecounter.c | 28 ++++++++---------
sound/hda/hdac_stream.c | 7 +++--
virt/kvm/arm/arch_timer.c | 6 ++--
28 files changed, 163 insertions(+), 182 deletions(-)
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
index 7de941c..b7f89e9 100644
--- a/arch/microblaze/kernel/timer.c
+++ b/arch/microblaze/kernel/timer.c
@@ -199,27 +199,25 @@ static u64 xilinx_read(struct clocksource *cs)
return (u64)xilinx_clock_read();
}
-static struct timecounter xilinx_tc = {
- .cc = NULL,
-};
-
static u64 xilinx_cc_read(const struct cyclecounter *cc)
{
return xilinx_read(NULL);
}
-static struct cyclecounter xilinx_cc = {
- .read = xilinx_cc_read,
- .mask = CLOCKSOURCE_MASK(32),
- .shift = 8,
+static struct timecounter xilinx_tc = {
+ .cc.read = xilinx_cc_read,
+ .cc.mask = CLOCKSOURCE_MASK(32),
+ .cc.mult = 0,
+ .cc.shift = 8,
};
static int __init init_xilinx_timecounter(void)
{
- xilinx_cc.mult = div_sc(timer_clock_freq, NSEC_PER_SEC,
- xilinx_cc.shift);
+ struct cyclecounter *cc = &xilinx_tc.cc;
+
+ cc->mult = div_sc(timer_clock_freq, NSEC_PER_SEC, cc->shift);
- timecounter_init(&xilinx_tc, &xilinx_cc, sched_clock());
+ timecounter_init(&xilinx_tc, sched_clock());
return 0;
}
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 57cb2f0..31543e5 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -179,11 +179,6 @@ static u64 arch_counter_read_cc(const struct cyclecounter *cc)
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
-static struct cyclecounter cyclecounter __ro_after_init = {
- .read = arch_counter_read_cc,
- .mask = CLOCKSOURCE_MASK(56),
-};
-
struct ate_acpi_oem_info {
char oem_id[ACPI_OEM_ID_SIZE + 1];
char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
@@ -915,7 +910,10 @@ static u64 arch_counter_get_cntvct_mem(void)
return ((u64) vct_hi << 32) | vct_lo;
}
-static struct arch_timer_kvm_info arch_timer_kvm_info;
+static struct arch_timer_kvm_info arch_timer_kvm_info = {
+ .timecounter.cc.read = arch_counter_read_cc,
+ .timecounter.cc.mask = CLOCKSOURCE_MASK(56),
+};
struct arch_timer_kvm_info *arch_timer_get_kvm_info(void)
{
@@ -925,6 +923,7 @@ struct arch_timer_kvm_info *arch_timer_get_kvm_info(void)
static void __init arch_counter_register(unsigned type)
{
u64 start_count;
+ struct cyclecounter *cc = &arch_timer_kvm_info.timecounter.cc;
/* Register the CP15 based counter if we have one */
if (type & ARCH_TIMER_TYPE_CP15) {
@@ -943,10 +942,10 @@ static void __init arch_counter_register(unsigned type)
clocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;
start_count = arch_timer_read_counter();
clocksource_register_hz(&clocksource_counter, arch_timer_rate);
- cyclecounter.mult = clocksource_counter.mult;
- cyclecounter.shift = clocksource_counter.shift;
- timecounter_init(&arch_timer_kvm_info.timecounter,
- &cyclecounter, start_count);
+
+ cc->mult = clocksource_counter.mult;
+ cc->shift = clocksource_counter.shift;
+ timecounter_init(&arch_timer_kvm_info.timecounter, start_count);
/* 56 bits minimum, so we assume worst case rollover */
sched_clock_register(arch_timer_read_counter, 56, arch_timer_rate);
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
index e107e18..5005c87 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
@@ -1622,8 +1622,7 @@ static int xgbe_config_tstamp(struct xgbe_prv_data *pdata,
xgbe_set_tstamp_time(pdata, 0, 0);
/* Initialize the timecounter */
- timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc,
- ktime_to_ns(ktime_get_real()));
+ timecounter_init(&pdata->tstamp_tc, ktime_to_ns(ktime_get_real()));
return 0;
}
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
index d06d260..5ea4edf 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
@@ -126,7 +126,7 @@ static u64 xgbe_cc_read(const struct cyclecounter *cc)
{
struct xgbe_prv_data *pdata = container_of(cc,
struct xgbe_prv_data,
- tstamp_cc);
+ tstamp_tc.cc);
u64 nsec;
nsec = pdata->hw_if.get_tstamp_time(pdata);
@@ -211,7 +211,7 @@ static int xgbe_settime(struct ptp_clock_info *info,
spin_lock_irqsave(&pdata->tstamp_lock, flags);
- timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, nsec);
+ timecounter_init(&pdata->tstamp_tc, nsec);
spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
@@ -228,7 +228,7 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)
{
struct ptp_clock_info *info = &pdata->ptp_clock_info;
struct ptp_clock *clock;
- struct cyclecounter *cc = &pdata->tstamp_cc;
+ struct cyclecounter *cc = &pdata->tstamp_tc.cc;
u64 dividend;
snprintf(info->name, sizeof(info->name), "%s",
@@ -263,8 +263,7 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)
cc->mult = 1;
cc->shift = 0;
- timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc,
- ktime_to_ns(ktime_get_real()));
+ timecounter_init(&pdata->tstamp_tc, ktime_to_ns(ktime_get_real()));
/* Disable all timestamping to start */
XGMAC_IOWRITE(pdata, MAC_TSCR, 0);
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h
index ad102c8..2445103 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe.h
+++ b/drivers/net/ethernet/amd/xgbe/xgbe.h
@@ -1168,7 +1168,6 @@ struct xgbe_prv_data {
struct ptp_clock_info ptp_clock_info;
struct ptp_clock *ptp_clock;
struct hwtstamp_config tstamp_config;
- struct cyclecounter tstamp_cc;
struct timecounter tstamp_tc;
unsigned int tstamp_addend;
struct work_struct tx_tstamp_work;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index 352beff..f164fe0 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -1827,7 +1827,6 @@ struct bnx2x {
struct ptp_clock *ptp_clock;
struct ptp_clock_info ptp_clock_info;
struct work_struct ptp_task;
- struct cyclecounter cyclecounter;
struct timecounter timecounter;
bool timecounter_init_done;
struct sk_buff *ptp_tx_skb;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 91e2a75..83624ad 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -13850,7 +13850,7 @@ static int bnx2x_ptp_settime(struct ptp_clock_info *ptp,
DP(BNX2X_MSG_PTP, "PTP settime called, ns = %llu\n", ns);
/* Re-init the timecounter */
- timecounter_init(&bp->timecounter, &bp->cyclecounter, ns);
+ timecounter_init(&bp->timecounter, ns);
return 0;
}
@@ -15254,7 +15254,7 @@ void bnx2x_set_rx_ts(struct bnx2x *bp, struct sk_buff *skb)
/* Read the PHC */
static u64 bnx2x_cyclecounter_read(const struct cyclecounter *cc)
{
- struct bnx2x *bp = container_of(cc, struct bnx2x, cyclecounter);
+ struct bnx2x *bp = container_of(cc, struct bnx2x, timecounter.cc);
int port = BP_PORT(bp);
u32 wb_data[2];
u64 phc_cycles;
@@ -15269,13 +15269,13 @@ static u64 bnx2x_cyclecounter_read(const struct cyclecounter *cc)
return phc_cycles;
}
-static void bnx2x_init_cyclecounter(struct bnx2x *bp)
+static void bnx2x_init_cyclecounter(struct cyclecounter *cc)
{
- memset(&bp->cyclecounter, 0, sizeof(bp->cyclecounter));
- bp->cyclecounter.read = bnx2x_cyclecounter_read;
- bp->cyclecounter.mask = CYCLECOUNTER_MASK(64);
- bp->cyclecounter.shift = 0;
- bp->cyclecounter.mult = 1;
+ memset(cc, 0, sizeof(*cc));
+ cc->read = bnx2x_cyclecounter_read;
+ cc->mask = CYCLECOUNTER_MASK(64);
+ cc->shift = 0;
+ cc->mult = 1;
}
static int bnx2x_send_reset_timesync_ramrod(struct bnx2x *bp)
@@ -15511,8 +15511,8 @@ void bnx2x_init_ptp(struct bnx2x *bp)
* unload / load (e.g. MTU change) while it is running.
*/
if (!bp->timecounter_init_done) {
- bnx2x_init_cyclecounter(bp);
- timecounter_init(&bp->timecounter, &bp->cyclecounter,
+ bnx2x_init_cyclecounter(&bp->timecounter.cc);
+ timecounter_init(&bp->timecounter,
ktime_to_ns(ktime_get_real()));
bp->timecounter_init_done = 1;
}
diff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h
index 5385074..d54b501 100644
--- a/drivers/net/ethernet/freescale/fec.h
+++ b/drivers/net/ethernet/freescale/fec.h
@@ -549,7 +549,6 @@ struct fec_enet_private {
struct ptp_clock_info ptp_caps;
unsigned long last_overflow_check;
spinlock_t tmreg_lock;
- struct cyclecounter cc;
struct timecounter tc;
int rx_hwtstamp_filter;
u32 base_incval;
diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c
index f814397..b1261d1 100644
--- a/drivers/net/ethernet/freescale/fec_ptp.c
+++ b/drivers/net/ethernet/freescale/fec_ptp.c
@@ -186,13 +186,14 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)
* ptp counter, which maybe cause 32-bit wrap. Since the
* (NSEC_PER_SEC - (u32)ts.tv_nsec) is less than 2 second.
* We can ensure the wrap will not cause issue. If the offset
- * is bigger than fep->cc.mask would be a error.
+ * is bigger than fep->tc.cc.mask would be a error.
*/
- val &= fep->cc.mask;
+ val &= fep->tc.cc.mask;
writel(val, fep->hwp + FEC_TCCR(fep->pps_channel));
/* Calculate the second the compare event timestamp */
- fep->next_counter = (val + fep->reload_period) & fep->cc.mask;
+ fep->next_counter = (val + fep->reload_period) &
+ fep->tc.cc.mask;
/* * Enable compare event when overflow */
val = readl(fep->hwp + FEC_ATIME_CTRL);
@@ -211,7 +212,8 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)
* the third timestamp. Refer the TCCR register detail in the spec.
*/
writel(fep->next_counter, fep->hwp + FEC_TCCR(fep->pps_channel));
- fep->next_counter = (fep->next_counter + fep->reload_period) & fep->cc.mask;
+ fep->next_counter = (fep->next_counter + fep->reload_period) &
+ fep->tc.cc.mask;
} else {
writel(0, fep->hwp + FEC_TCSR(fep->pps_channel));
}
@@ -233,7 +235,7 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)
static u64 fec_ptp_read(const struct cyclecounter *cc)
{
struct fec_enet_private *fep =
- container_of(cc, struct fec_enet_private, cc);
+ container_of(cc, struct fec_enet_private, tc.cc);
const struct platform_device_id *id_entry =
platform_get_device_id(fep->pdev);
u32 tempval;
@@ -276,14 +278,14 @@ void fec_ptp_start_cyclecounter(struct net_device *ndev)
writel(FEC_T_CTRL_ENABLE | FEC_T_CTRL_PERIOD_RST,
fep->hwp + FEC_ATIME_CTRL);
- memset(&fep->cc, 0, sizeof(fep->cc));
- fep->cc.read = fec_ptp_read;
- fep->cc.mask = CLOCKSOURCE_MASK(31);
- fep->cc.shift = 31;
- fep->cc.mult = FEC_CC_MULT;
+ memset(&fep->tc.cc, 0, sizeof(fep->tc.cc));
+ fep->tc.cc.read = fec_ptp_read;
+ fep->tc.cc.mask = CLOCKSOURCE_MASK(31);
+ fep->tc.cc.shift = 31;
+ fep->tc.cc.mult = FEC_CC_MULT;
/* reset the ns time counter */
- timecounter_init(&fep->tc, &fep->cc, ktime_to_ns(ktime_get_real()));
+ timecounter_init(&fep->tc, ktime_to_ns(ktime_get_real()));
spin_unlock_irqrestore(&fep->tmreg_lock, flags);
}
@@ -434,11 +436,11 @@ static int fec_ptp_settime(struct ptp_clock_info *ptp,
/* Get the timer value based on timestamp.
* Update the counter with the masked value.
*/
- counter = ns & fep->cc.mask;
+ counter = ns & fep->tc.cc.mask;
spin_lock_irqsave(&fep->tmreg_lock, flags);
writel(counter, fep->hwp + FEC_ATIME);
- timecounter_init(&fep->tc, &fep->cc, ns);
+ timecounter_init(&fep->tc, ns);
spin_unlock_irqrestore(&fep->tmreg_lock, flags);
mutex_unlock(&fep->ptp_clk_mutex);
return 0;
@@ -570,7 +572,7 @@ static irqreturn_t fec_pps_interrupt(int irq, void *dev_id)
/* Update the counter; */
fep->next_counter = (fep->next_counter + fep->reload_period) &
- fep->cc.mask;
+ fep->tc.cc.mask;
event.type = PTP_CLOCK_PPS;
ptp_clock_event(fep->ptp_clock, &event);
diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h
index 2311b31..b59f82a 100644
--- a/drivers/net/ethernet/intel/e1000e/e1000.h
+++ b/drivers/net/ethernet/intel/e1000e/e1000.h
@@ -340,7 +340,6 @@ struct e1000_adapter {
unsigned long tx_hwtstamp_start;
struct work_struct tx_hwtstamp_work;
spinlock_t systim_lock; /* protects SYSTIML/H regsters */
- struct cyclecounter cc;
struct timecounter tc;
struct ptp_clock *ptp_clock;
struct ptp_clock_info ptp_clock_info;
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index 9f18d39..c9f7ba3 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -3536,7 +3536,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
incperiod = INCPERIOD_96MHZ;
incvalue = INCVALUE_96MHZ;
shift = INCVALUE_SHIFT_96MHZ;
- adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
+ adapter->tc.cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
break;
case e1000_pch_lpt:
if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
@@ -3544,13 +3544,13 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
incperiod = INCPERIOD_96MHZ;
incvalue = INCVALUE_96MHZ;
shift = INCVALUE_SHIFT_96MHZ;
- adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
+ adapter->tc.cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
} else {
/* Stable 25MHz frequency */
incperiod = INCPERIOD_25MHZ;
incvalue = INCVALUE_25MHZ;
shift = INCVALUE_SHIFT_25MHZ;
- adapter->cc.shift = shift;
+ adapter->tc.cc.shift = shift;
}
break;
case e1000_pch_spt:
@@ -3559,7 +3559,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
incperiod = INCPERIOD_24MHZ;
incvalue = INCVALUE_24MHZ;
shift = INCVALUE_SHIFT_24MHZ;
- adapter->cc.shift = shift;
+ adapter->tc.cc.shift = shift;
break;
}
return -EINVAL;
@@ -3569,13 +3569,13 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
incperiod = INCPERIOD_24MHZ;
incvalue = INCVALUE_24MHZ;
shift = INCVALUE_SHIFT_24MHZ;
- adapter->cc.shift = shift;
+ adapter->tc.cc.shift = shift;
} else {
/* Stable 38400KHz frequency */
incperiod = INCPERIOD_38400KHZ;
incvalue = INCVALUE_38400KHZ;
shift = INCVALUE_SHIFT_38400KHZ;
- adapter->cc.shift = shift;
+ adapter->tc.cc.shift = shift;
}
break;
case e1000_82574:
@@ -3584,7 +3584,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
incperiod = INCPERIOD_25MHZ;
incvalue = INCVALUE_25MHZ;
shift = INCVALUE_SHIFT_25MHZ;
- adapter->cc.shift = shift;
+ adapter->tc.cc.shift = shift;
break;
default:
return -EINVAL;
@@ -3955,8 +3955,7 @@ static void e1000e_systim_reset(struct e1000_adapter *adapter)
/* reset the systim ns time counter */
spin_lock_irqsave(&adapter->systim_lock, flags);
- timecounter_init(&adapter->tc, &adapter->cc,
- ktime_to_ns(ktime_get_real()));
+ timecounter_init(&adapter->tc, ktime_to_ns(ktime_get_real()));
spin_unlock_irqrestore(&adapter->systim_lock, flags);
/* restore the previous hwtstamp configuration settings */
@@ -4389,7 +4388,7 @@ static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim)
static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
{
struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
- cc);
+ tc.cc);
struct e1000_hw *hw = &adapter->hw;
u32 systimel, systimeh;
u64 systim;
@@ -4449,10 +4448,10 @@ static int e1000_sw_init(struct e1000_adapter *adapter)
/* Setup hardware time stamping cyclecounter */
if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
- adapter->cc.read = e1000e_cyclecounter_read;
- adapter->cc.mask = CYCLECOUNTER_MASK(64);
- adapter->cc.mult = 1;
- /* cc.shift set in e1000e_get_base_tininca() */
+ adapter->tc.cc.read = e1000e_cyclecounter_read;
+ adapter->tc.cc.mask = CYCLECOUNTER_MASK(64);
+ adapter->tc.cc.mult = 1;
+ /* tc.cc.shift set in e1000e_get_base_tininca() */
spin_lock_init(&adapter->systim_lock);
INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
diff --git a/drivers/net/ethernet/intel/e1000e/ptp.c b/drivers/net/ethernet/intel/e1000e/ptp.c
index b366885..03d5f2a 100644
--- a/drivers/net/ethernet/intel/e1000e/ptp.c
+++ b/drivers/net/ethernet/intel/e1000e/ptp.c
@@ -222,7 +222,7 @@ static int e1000e_phc_settime(struct ptp_clock_info *ptp,
/* reset the timecounter */
spin_lock_irqsave(&adapter->systim_lock, flags);
- timecounter_init(&adapter->tc, &adapter->cc, ns);
+ timecounter_init(&adapter->tc, ns);
spin_unlock_irqrestore(&adapter->systim_lock, flags);
return 0;
diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h
index 9284569..4eac4f2 100644
--- a/drivers/net/ethernet/intel/igb/igb.h
+++ b/drivers/net/ethernet/intel/igb/igb.h
@@ -565,7 +565,6 @@ struct igb_adapter {
unsigned long last_rx_timestamp;
unsigned int ptp_flags;
spinlock_t tmreg_lock;
- struct cyclecounter cc;
struct timecounter tc;
u32 tx_hwtstamp_timeouts;
u32 tx_hwtstamp_skipped;
diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c
index 841c2a0..0745eff 100644
--- a/drivers/net/ethernet/intel/igb/igb_ptp.c
+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c
@@ -79,7 +79,7 @@
/* SYSTIM read access for the 82576 */
static u64 igb_ptp_read_82576(const struct cyclecounter *cc)
{
- struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
+ struct igb_adapter *igb = container_of(cc, struct igb_adapter, tc.cc);
struct e1000_hw *hw = &igb->hw;
u64 val;
u32 lo, hi;
@@ -96,7 +96,7 @@ static u64 igb_ptp_read_82576(const struct cyclecounter *cc)
/* SYSTIM read access for the 82580 */
static u64 igb_ptp_read_82580(const struct cyclecounter *cc)
{
- struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
+ struct igb_adapter *igb = container_of(cc, struct igb_adapter, tc.cc);
struct e1000_hw *hw = &igb->hw;
u32 lo, hi;
u64 val;
@@ -330,7 +330,7 @@ static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,
spin_lock_irqsave(&igb->tmreg_lock, flags);
- timecounter_init(&igb->tc, &igb->cc, ns);
+ timecounter_init(&igb->tc, ns);
spin_unlock_irqrestore(&igb->tmreg_lock, flags);
@@ -1126,10 +1126,10 @@ void igb_ptp_init(struct igb_adapter *adapter)
adapter->ptp_caps.gettime64 = igb_ptp_gettime_82576;
adapter->ptp_caps.settime64 = igb_ptp_settime_82576;
adapter->ptp_caps.enable = igb_ptp_feature_enable;
- adapter->cc.read = igb_ptp_read_82576;
- adapter->cc.mask = CYCLECOUNTER_MASK(64);
- adapter->cc.mult = 1;
- adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
+ adapter->tc.cc.read = igb_ptp_read_82576;
+ adapter->tc.cc.mask = CYCLECOUNTER_MASK(64);
+ adapter->tc.cc.mult = 1;
+ adapter->tc.cc.shift = IGB_82576_TSYNC_SHIFT;
adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;
break;
case e1000_82580:
@@ -1145,10 +1145,10 @@ void igb_ptp_init(struct igb_adapter *adapter)
adapter->ptp_caps.gettime64 = igb_ptp_gettime_82576;
adapter->ptp_caps.settime64 = igb_ptp_settime_82576;
adapter->ptp_caps.enable = igb_ptp_feature_enable;
- adapter->cc.read = igb_ptp_read_82580;
- adapter->cc.mask = CYCLECOUNTER_MASK(IGB_NBITS_82580);
- adapter->cc.mult = 1;
- adapter->cc.shift = 0;
+ adapter->tc.cc.read = igb_ptp_read_82580;
+ adapter->tc.cc.mask = CYCLECOUNTER_MASK(IGB_NBITS_82580);
+ adapter->tc.cc.mult = 1;
+ adapter->tc.cc.shift = 0;
adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;
break;
case e1000_i210:
@@ -1289,8 +1289,7 @@ void igb_ptp_reset(struct igb_adapter *adapter)
igb_ptp_write_i210(adapter, &ts);
} else {
- timecounter_init(&adapter->tc, &adapter->cc,
- ktime_to_ns(ktime_get_real()));
+ timecounter_init(&adapter->tc, ktime_to_ns(ktime_get_real()));
}
out:
spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
index 468c355..5c391a0 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
@@ -738,7 +738,6 @@ struct ixgbe_adapter {
unsigned long last_rx_ptp_check;
unsigned long last_rx_timestamp;
spinlock_t tmreg_lock;
- struct cyclecounter hw_cc;
struct timecounter hw_tc;
u32 base_incval;
u32 tx_hwtstamp_timeouts;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
index ae312c4..6e9f2c0 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
@@ -179,7 +179,7 @@
static void ixgbe_ptp_setup_sdp_x540(struct ixgbe_adapter *adapter)
{
struct ixgbe_hw *hw = &adapter->hw;
- int shift = adapter->hw_cc.shift;
+ int shift = adapter->hw_tc.cc.shift;
u32 esdp, tsauxc, clktiml, clktimh, trgttiml, trgttimh, rem;
u64 ns = 0, clock_edge = 0;
@@ -237,7 +237,7 @@ static void ixgbe_ptp_setup_sdp_x540(struct ixgbe_adapter *adapter)
/**
* ixgbe_ptp_read_X550 - read cycle counter value
- * @hw_cc: cyclecounter structure
+ * @cc: cyclecounter structure
*
* This function reads SYSTIME registers. It is called by the cyclecounter
* structure to convert from internal representation into nanoseconds. We need
@@ -245,10 +245,10 @@ static void ixgbe_ptp_setup_sdp_x540(struct ixgbe_adapter *adapter)
* result of SYSTIME is 32bits of "billions of cycles" and 32 bits of
* "cycles", rather than seconds and nanoseconds.
*/
-static u64 ixgbe_ptp_read_X550(const struct cyclecounter *hw_cc)
+static u64 ixgbe_ptp_read_X550(const struct cyclecounter *cc)
{
struct ixgbe_adapter *adapter =
- container_of(hw_cc, struct ixgbe_adapter, hw_cc);
+ container_of(cc, struct ixgbe_adapter, hw_tc.cc);
struct ixgbe_hw *hw = &adapter->hw;
struct timespec64 ts;
@@ -285,7 +285,7 @@ static u64 ixgbe_ptp_read_X550(const struct cyclecounter *hw_cc)
static u64 ixgbe_ptp_read_82599(const struct cyclecounter *cc)
{
struct ixgbe_adapter *adapter =
- container_of(cc, struct ixgbe_adapter, hw_cc);
+ container_of(cc, struct ixgbe_adapter, hw_tc.cc);
struct ixgbe_hw *hw = &adapter->hw;
u64 stamp = 0;
@@ -508,7 +508,7 @@ static int ixgbe_ptp_settime(struct ptp_clock_info *ptp,
/* reset the timecounter */
spin_lock_irqsave(&adapter->tmreg_lock, flags);
- timecounter_init(&adapter->hw_tc, &adapter->hw_cc, ns);
+ timecounter_init(&adapter->hw_tc, ns);
spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
if (adapter->ptp_setup_sdp)
@@ -1164,7 +1164,7 @@ void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter)
/* need lock to prevent incorrect read while modifying cyclecounter */
spin_lock_irqsave(&adapter->tmreg_lock, flags);
- memcpy(&adapter->hw_cc, &cc, sizeof(adapter->hw_cc));
+ memcpy(&adapter->hw_tc.cc, &cc, sizeof(adapter->hw_tc.cc));
spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
}
@@ -1195,8 +1195,7 @@ void ixgbe_ptp_reset(struct ixgbe_adapter *adapter)
ixgbe_ptp_start_cyclecounter(adapter);
spin_lock_irqsave(&adapter->tmreg_lock, flags);
- timecounter_init(&adapter->hw_tc, &adapter->hw_cc,
- ktime_to_ns(ktime_get_real()));
+ timecounter_init(&adapter->hw_tc, ktime_to_ns(ktime_get_real()));
spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
adapter->last_overflow_check = jiffies;
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c
index 0247885..35987b5 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_clock.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_clock.c
@@ -38,13 +38,13 @@
/* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
*/
-static u64 mlx4_en_read_clock(const struct cyclecounter *tc)
+static u64 mlx4_en_read_clock(const struct cyclecounter *cc)
{
struct mlx4_en_dev *mdev =
- container_of(tc, struct mlx4_en_dev, cycles);
+ container_of(cc, struct mlx4_en_dev, clock.cc);
struct mlx4_dev *dev = mdev->dev;
- return mlx4_read_clock(dev) & tc->mask;
+ return mlx4_read_clock(dev) & cc->mask;
}
u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
@@ -138,7 +138,7 @@ static int mlx4_en_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
write_seqlock_irqsave(&mdev->clock_lock, flags);
timecounter_read(&mdev->clock);
- mdev->cycles.mult = neg_adj ? mult - diff : mult + diff;
+ mdev->clock.cc.mult = neg_adj ? mult - diff : mult + diff;
write_sequnlock_irqrestore(&mdev->clock_lock, flags);
return 0;
@@ -207,7 +207,7 @@ static int mlx4_en_phc_settime(struct ptp_clock_info *ptp,
/* reset the timecounter */
write_seqlock_irqsave(&mdev->clock_lock, flags);
- timecounter_init(&mdev->clock, &mdev->cycles, ns);
+ timecounter_init(&mdev->clock, ns);
write_sequnlock_irqrestore(&mdev->clock_lock, flags);
return 0;
@@ -274,17 +274,17 @@ void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)
seqlock_init(&mdev->clock_lock);
- memset(&mdev->cycles, 0, sizeof(mdev->cycles));
- mdev->cycles.read = mlx4_en_read_clock;
- mdev->cycles.mask = CLOCKSOURCE_MASK(48);
- mdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock);
- mdev->cycles.mult =
- clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);
- mdev->nominal_c_mult = mdev->cycles.mult;
+ memset(&mdev->clock.cc, 0, sizeof(mdev->clock.cc));
+ mdev->clock.cc.read = mlx4_en_read_clock;
+ mdev->clock.cc.mask = CLOCKSOURCE_MASK(48);
+ mdev->clock.cc.shift = freq_to_shift(dev->caps.hca_core_clock);
+ mdev->clock.cc.mult =
+ clocksource_khz2mult(1000 * dev->caps.hca_core_clock,
+ mdev->clock.cc.shift);
+ mdev->nominal_c_mult = mdev->clock.cc.mult;
write_seqlock_irqsave(&mdev->clock_lock, flags);
- timecounter_init(&mdev->clock, &mdev->cycles,
- ktime_to_ns(ktime_get_real()));
+ timecounter_init(&mdev->clock, ktime_to_ns(ktime_get_real()));
write_sequnlock_irqrestore(&mdev->clock_lock, flags);
/* Configure the PHC */
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
index 1856e27..e301dcf 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
@@ -422,7 +422,6 @@ struct mlx4_en_dev {
spinlock_t uar_lock;
u8 mac_removed[MLX4_MAX_PORTS + 1];
u32 nominal_c_mult;
- struct cyclecounter cycles;
seqlock_t clock_lock;
struct timecounter clock;
unsigned long last_overflow_check;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
index fa8aed6..8cb6838 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
@@ -64,7 +64,7 @@ enum {
static u64 read_internal_timer(const struct cyclecounter *cc)
{
- struct mlx5_clock *clock = container_of(cc, struct mlx5_clock, cycles);
+ struct mlx5_clock *clock = container_of(cc, struct mlx5_clock, tc.cc);
struct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev,
clock);
@@ -122,7 +122,7 @@ static int mlx5_ptp_settime(struct ptp_clock_info *ptp,
unsigned long flags;
write_lock_irqsave(&clock->lock, flags);
- timecounter_init(&clock->tc, &clock->cycles, ns);
+ timecounter_init(&clock->tc, ns);
write_unlock_irqrestore(&clock->lock, flags);
return 0;
@@ -177,8 +177,8 @@ static int mlx5_ptp_adjfreq(struct ptp_clock_info *ptp, s32 delta)
write_lock_irqsave(&clock->lock, flags);
timecounter_read(&clock->tc);
- clock->cycles.mult = neg_adj ? clock->nominal_c_mult - diff :
- clock->nominal_c_mult + diff;
+ clock->tc.cc.mult = neg_adj ? clock->nominal_c_mult - diff :
+ clock->nominal_c_mult + diff;
write_unlock_irqrestore(&clock->lock, flags);
return 0;
@@ -281,8 +281,8 @@ static int mlx5_perout_configure(struct ptp_clock_info *ptp,
write_lock_irqsave(&clock->lock, flags);
nsec_now = timecounter_cyc2time(&clock->tc, cycles_now);
nsec_delta = ns - nsec_now;
- cycles_delta = div64_u64(nsec_delta << clock->cycles.shift,
- clock->cycles.mult);
+ cycles_delta = div64_u64(nsec_delta << clock->tc.cc.shift,
+ clock->tc.cc.mult);
write_unlock_irqrestore(&clock->lock, flags);
time_stamp = cycles_now + cycles_delta;
field_select = MLX5_MTPPS_FS_PIN_MODE |
@@ -440,8 +440,8 @@ void mlx5_pps_event(struct mlx5_core_dev *mdev,
write_lock_irqsave(&clock->lock, flags);
nsec_now = timecounter_cyc2time(&clock->tc, cycles_now);
nsec_delta = ns - nsec_now;
- cycles_delta = div64_u64(nsec_delta << clock->cycles.shift,
- clock->cycles.mult);
+ cycles_delta = div64_u64(nsec_delta << clock->tc.cc.shift,
+ clock->tc.cc.mult);
clock->pps_info.start[pin] = cycles_now + cycles_delta;
schedule_work(&clock->pps_info.out_work);
write_unlock_irqrestore(&clock->lock, flags);
@@ -454,6 +454,7 @@ void mlx5_pps_event(struct mlx5_core_dev *mdev,
void mlx5_init_clock(struct mlx5_core_dev *mdev)
{
struct mlx5_clock *clock = &mdev->clock;
+ struct cyclecounter *cc = &clock->tc.cc;
u64 ns;
u64 frac = 0;
u32 dev_freq;
@@ -464,21 +465,18 @@ void mlx5_init_clock(struct mlx5_core_dev *mdev)
return;
}
rwlock_init(&clock->lock);
- clock->cycles.read = read_internal_timer;
- clock->cycles.shift = MLX5_CYCLES_SHIFT;
- clock->cycles.mult = clocksource_khz2mult(dev_freq,
- clock->cycles.shift);
- clock->nominal_c_mult = clock->cycles.mult;
- clock->cycles.mask = CLOCKSOURCE_MASK(41);
+ cc->read = read_internal_timer;
+ cc->shift = MLX5_CYCLES_SHIFT;
+ cc->mult = clocksource_khz2mult(dev_freq, cc->shift);
+ clock->nominal_c_mult = cc->mult;
+ cc->mask = CLOCKSOURCE_MASK(41);
- timecounter_init(&clock->tc, &clock->cycles,
- ktime_to_ns(ktime_get_real()));
+ timecounter_init(&clock->tc, ktime_to_ns(ktime_get_real()));
/* Calculate period in seconds to call the overflow watchdog - to make
* sure counter is checked at least once every wrap around.
*/
- ns = cyclecounter_cyc2ns(&clock->cycles, clock->cycles.mask,
- frac, &frac);
+ ns = cyclecounter_cyc2ns(cc, cc->mask, frac, &frac);
do_div(ns, NSEC_PER_SEC / 2 / HZ);
clock->overflow_period = ns;
diff --git a/drivers/net/ethernet/qlogic/qede/qede_ptp.c b/drivers/net/ethernet/qlogic/qede/qede_ptp.c
index 9b2280b..95bb8a8 100644
--- a/drivers/net/ethernet/qlogic/qede/qede_ptp.c
+++ b/drivers/net/ethernet/qlogic/qede/qede_ptp.c
@@ -34,7 +34,6 @@
struct qede_ptp {
const struct qed_eth_ptp_ops *ops;
struct ptp_clock_info clock_info;
- struct cyclecounter cc;
struct timecounter tc;
struct ptp_clock *clock;
struct work_struct work;
@@ -132,7 +131,7 @@ static int qede_ptp_settime(struct ptp_clock_info *info,
/* Re-init the timecounter */
spin_lock_bh(&ptp->lock);
- timecounter_init(&ptp->tc, &ptp->cc, ns);
+ timecounter_init(&ptp->tc, ns);
spin_unlock_bh(&ptp->lock);
return 0;
@@ -196,7 +195,7 @@ static u64 qede_ptp_read_cc(const struct cyclecounter *cc)
u64 phc_cycles;
int rc;
- ptp = container_of(cc, struct qede_ptp, cc);
+ ptp = container_of(cc, struct qede_ptp, tc.cc);
edev = ptp->edev;
rc = ptp->ops->read_cc(edev->cdev, &phc_cycles);
if (rc)
@@ -428,14 +427,13 @@ static int qede_ptp_init(struct qede_dev *edev, bool init_tc)
* unload / load (e.g. MTU change) while it is running.
*/
if (init_tc) {
- memset(&ptp->cc, 0, sizeof(ptp->cc));
- ptp->cc.read = qede_ptp_read_cc;
- ptp->cc.mask = CYCLECOUNTER_MASK(64);
- ptp->cc.shift = 0;
- ptp->cc.mult = 1;
-
- timecounter_init(&ptp->tc, &ptp->cc,
- ktime_to_ns(ktime_get_real()));
+ memset(&ptp->tc.cc, 0, sizeof(ptp->tc.cc));
+ ptp->tc.cc.read = qede_ptp_read_cc;
+ ptp->tc.cc.mask = CYCLECOUNTER_MASK(64);
+ ptp->tc.cc.shift = 0;
+ ptp->tc.cc.mult = 1;
+
+ timecounter_init(&ptp->tc, ktime_to_ns(ktime_get_real()));
}
return rc;
diff --git a/drivers/net/ethernet/ti/cpts.c b/drivers/net/ethernet/ti/cpts.c
index e7b76f6..b8fe843 100644
--- a/drivers/net/ethernet/ti/cpts.c
+++ b/drivers/net/ethernet/ti/cpts.c
@@ -182,7 +182,7 @@ static u64 cpts_systim_read(const struct cyclecounter *cc)
u64 val = 0;
struct cpts_event *event;
struct list_head *this, *next;
- struct cpts *cpts = container_of(cc, struct cpts, cc);
+ struct cpts *cpts = container_of(cc, struct cpts, tc.cc);
cpts_write32(cpts, TS_PUSH, ts_push);
if (cpts_fifo_read(cpts, CPTS_EV_PUSH))
@@ -224,7 +224,7 @@ static int cpts_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
timecounter_read(&cpts->tc);
- cpts->cc.mult = neg_adj ? mult - diff : mult + diff;
+ cpts->tc.cc.mult = neg_adj ? mult - diff : mult + diff;
spin_unlock_irqrestore(&cpts->lock, flags);
@@ -268,7 +268,7 @@ static int cpts_ptp_settime(struct ptp_clock_info *ptp,
ns = timespec64_to_ns(ts);
spin_lock_irqsave(&cpts->lock, flags);
- timecounter_init(&cpts->tc, &cpts->cc, ns);
+ timecounter_init(&cpts->tc, ns);
spin_unlock_irqrestore(&cpts->lock, flags);
return 0;
@@ -447,7 +447,7 @@ int cpts_register(struct cpts *cpts)
cpts_write32(cpts, CPTS_EN, control);
cpts_write32(cpts, TS_PEND_EN, int_enable);
- timecounter_init(&cpts->tc, &cpts->cc, ktime_to_ns(ktime_get_real()));
+ timecounter_init(&cpts->tc, ktime_to_ns(ktime_get_real()));
cpts->clock = ptp_clock_register(&cpts->info, cpts->dev);
if (IS_ERR(cpts->clock)) {
@@ -486,6 +486,7 @@ void cpts_unregister(struct cpts *cpts)
static void cpts_calc_mult_shift(struct cpts *cpts)
{
+ struct cyclecounter *cc = &cpts->tc.cc;
u64 frac, maxsec, ns;
u32 freq;
@@ -494,7 +495,7 @@ static void cpts_calc_mult_shift(struct cpts *cpts)
/* Calc the maximum number of seconds which we can run before
* wrapping around.
*/
- maxsec = cpts->cc.mask;
+ maxsec = cc->mask;
do_div(maxsec, freq);
/* limit conversation rate to 10 sec as higher values will produce
* too small mult factors and so reduce the conversion accuracy
@@ -507,18 +508,19 @@ static void cpts_calc_mult_shift(struct cpts *cpts)
dev_info(cpts->dev, "cpts: overflow check period %lu (jiffies)\n",
cpts->ov_check_period);
- if (cpts->cc.mult || cpts->cc.shift)
+ if (cc->mult || cc->shift)
return;
- clocks_calc_mult_shift(&cpts->cc.mult, &cpts->cc.shift,
+ clocks_calc_mult_shift(&cc->mult, &cc->shift,
freq, NSEC_PER_SEC, maxsec);
frac = 0;
- ns = cyclecounter_cyc2ns(&cpts->cc, freq, cpts->cc.mask, &frac);
+ ns = cyclecounter_cyc2ns(cc, freq, cc->mask, &frac);
dev_info(cpts->dev,
"CPTS: ref_clk_freq:%u calc_mult:%u calc_shift:%u error:%lld nsec/sec\n",
- freq, cpts->cc.mult, cpts->cc.shift, (ns - NSEC_PER_SEC));
+ freq, cc->mult, cc->shift,
+ (ns - NSEC_PER_SEC));
}
static int cpts_of_parse(struct cpts *cpts, struct device_node *node)
@@ -527,13 +529,13 @@ static int cpts_of_parse(struct cpts *cpts, struct device_node *node)
u32 prop;
if (!of_property_read_u32(node, "cpts_clock_mult", &prop))
- cpts->cc.mult = prop;
+ cpts->tc.cc.mult = prop;
if (!of_property_read_u32(node, "cpts_clock_shift", &prop))
- cpts->cc.shift = prop;
+ cpts->tc.cc.shift = prop;
- if ((cpts->cc.mult && !cpts->cc.shift) ||
- (!cpts->cc.mult && cpts->cc.shift))
+ if ((cpts->tc.cc.mult && !cpts->tc.cc.shift) ||
+ (!cpts->tc.cc.mult && cpts->tc.cc.shift))
goto of_error;
return 0;
@@ -569,15 +571,15 @@ struct cpts *cpts_create(struct device *dev, void __iomem *regs,
clk_prepare(cpts->refclk);
- cpts->cc.read = cpts_systim_read;
- cpts->cc.mask = CLOCKSOURCE_MASK(32);
+ cpts->tc.cc.read = cpts_systim_read;
+ cpts->tc.cc.mask = CLOCKSOURCE_MASK(32);
cpts->info = cpts_info;
cpts_calc_mult_shift(cpts);
- /* save cc.mult original value as it can be modified
+ /* save tc.cc.mult original value as it can be modified
* by cpts_ptp_adjfreq().
*/
- cpts->cc_mult = cpts->cc.mult;
+ cpts->cc_mult = cpts->tc.cc.mult;
return cpts;
}
diff --git a/drivers/net/ethernet/ti/cpts.h b/drivers/net/ethernet/ti/cpts.h
index 73d73fa..a7174eb 100644
--- a/drivers/net/ethernet/ti/cpts.h
+++ b/drivers/net/ethernet/ti/cpts.h
@@ -117,7 +117,6 @@ struct cpts {
struct ptp_clock *clock;
spinlock_t lock; /* protects time registers */
u32 cc_mult; /* for the nominal frequency */
- struct cyclecounter cc;
struct timecounter tc;
int phc_index;
struct clk *refclk;
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index a886b51..c81c615 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -780,7 +780,6 @@ struct mlx5_pps {
struct mlx5_clock {
rwlock_t lock;
- struct cyclecounter cycles;
struct timecounter tc;
struct hwtstamp_config hwtstamp_config;
u32 nominal_c_mult;
diff --git a/include/linux/timecounter.h b/include/linux/timecounter.h
index 2496ad4..6daca06 100644
--- a/include/linux/timecounter.h
+++ b/include/linux/timecounter.h
@@ -62,7 +62,7 @@ struct cyclecounter {
* @frac: accumulated fractional nanoseconds
*/
struct timecounter {
- const struct cyclecounter *cc;
+ struct cyclecounter cc;
u64 cycle_last;
u64 nsec;
u64 mask;
@@ -98,7 +98,6 @@ static inline void timecounter_adjtime(struct timecounter *tc, s64 delta)
/**
* timecounter_init - initialize a time counter
* @tc: Pointer to time counter which is to be initialized/reset
- * @cc: A cycle counter, ready to be used.
* @start_tstamp: Arbitrary initial time stamp.
*
* After this call the current cycle register (roughly) corresponds to
@@ -106,7 +105,6 @@ static inline void timecounter_adjtime(struct timecounter *tc, s64 delta)
* the time stamp counter by the number of elapsed nanoseconds.
*/
extern void timecounter_init(struct timecounter *tc,
- const struct cyclecounter *cc,
u64 start_tstamp);
/**
diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
index 68169e3..3061f44 100644
--- a/include/sound/hdaudio.h
+++ b/include/sound/hdaudio.h
@@ -445,7 +445,6 @@ struct hdac_stream {
unsigned long start_wallclk; /* start + minimum wallclk */
unsigned long period_wallclk; /* wallclk for period */
struct timecounter tc;
- struct cyclecounter cc;
int delay_negative_threshold;
struct list_head list;
diff --git a/kernel/time/timecounter.c b/kernel/time/timecounter.c
index 8afd789..7919acb 100644
--- a/kernel/time/timecounter.c
+++ b/kernel/time/timecounter.c
@@ -18,11 +18,10 @@
#include <linux/export.h>
#include <linux/timecounter.h>
-void timecounter_init(struct timecounter *tc,
- const struct cyclecounter *cc,
- u64 start_tstamp)
+void timecounter_init(struct timecounter *tc, u64 start_tstamp)
{
- tc->cc = cc;
+ struct cyclecounter *cc = &tc->cc;
+
tc->cycle_last = cc->read(cc);
tc->nsec = start_tstamp;
tc->mask = (1ULL << cc->shift) - 1;
@@ -43,17 +42,18 @@ void timecounter_init(struct timecounter *tc,
*/
static u64 timecounter_read_delta(struct timecounter *tc)
{
+ struct cyclecounter *cc = &tc->cc;
u64 cycle_now, cycle_delta;
u64 ns_offset;
/* read cycle counter: */
- cycle_now = tc->cc->read(tc->cc);
+ cycle_now = cc->read(cc);
/* calculate the delta since the last timecounter_read_delta(): */
- cycle_delta = (cycle_now - tc->cycle_last) & tc->cc->mask;
+ cycle_delta = (cycle_now - tc->cycle_last) & cc->mask;
/* convert to nanoseconds: */
- ns_offset = cyclecounter_cyc2ns(tc->cc, cycle_delta,
+ ns_offset = cyclecounter_cyc2ns(cc, cycle_delta,
tc->mask, &tc->frac);
/* update time stamp of timecounter_read_delta() call: */
@@ -89,10 +89,10 @@ static u64 cc_cyc2ns_backwards(const struct cyclecounter *cc,
return ns;
}
-u64 timecounter_cyc2time(struct timecounter *tc,
- u64 cycle_tstamp)
+u64 timecounter_cyc2time(struct timecounter *tc, u64 cycle_tstamp)
{
- u64 delta = (cycle_tstamp - tc->cycle_last) & tc->cc->mask;
+ struct cyclecounter *cc = &tc->cc;
+ u64 delta = (cycle_tstamp - tc->cycle_last) & cc->mask;
u64 nsec = tc->nsec, frac = tc->frac;
/*
@@ -100,11 +100,11 @@ u64 timecounter_cyc2time(struct timecounter *tc,
* than tc->cycle_last, detect when it is too far in the
* future and treat it as old time stamp instead.
*/
- if (delta > tc->cc->mask / 2) {
- delta = (tc->cycle_last - cycle_tstamp) & tc->cc->mask;
- nsec -= cc_cyc2ns_backwards(tc->cc, delta, tc->mask, frac);
+ if (delta > cc->mask / 2) {
+ delta = (tc->cycle_last - cycle_tstamp) & cc->mask;
+ nsec -= cc_cyc2ns_backwards(cc, delta, tc->mask, frac);
} else {
- nsec += cyclecounter_cyc2ns(tc->cc, delta, tc->mask, &frac);
+ nsec += cyclecounter_cyc2ns(cc, delta, tc->mask, &frac);
}
return nsec;
diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c
index e1472c7..9426c1a 100644
--- a/sound/hda/hdac_stream.c
+++ b/sound/hda/hdac_stream.c
@@ -467,7 +467,8 @@ int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
static u64 azx_cc_read(const struct cyclecounter *cc)
{
- struct hdac_stream *azx_dev = container_of(cc, struct hdac_stream, cc);
+ struct hdac_stream *azx_dev = container_of(cc, struct hdac_stream,
+ tc.cc);
return snd_hdac_chip_readl(azx_dev->bus, WALLCLK);
}
@@ -476,7 +477,7 @@ static void azx_timecounter_init(struct hdac_stream *azx_dev,
bool force, u64 last)
{
struct timecounter *tc = &azx_dev->tc;
- struct cyclecounter *cc = &azx_dev->cc;
+ struct cyclecounter *cc = &azx_dev->tc.cc;
u64 nsec;
cc->read = azx_cc_read;
@@ -496,7 +497,7 @@ static void azx_timecounter_init(struct hdac_stream *azx_dev,
cc->shift = 0;
nsec = 0; /* audio time is elapsed time since trigger */
- timecounter_init(tc, cc, nsec);
+ timecounter_init(tc, nsec);
if (force) {
/*
* force timecounter to use predefined value,
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index 4151250..f3505bd 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_timer.c
@@ -53,7 +53,7 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,
u64 kvm_phys_timer_read(void)
{
- return timecounter->cc->read(timecounter->cc);
+ return timecounter->cc.read(&timecounter->cc);
}
static void soft_timer_start(struct hrtimer *hrt, u64 ns)
@@ -138,7 +138,7 @@ static u64 kvm_timer_compute_delta(struct arch_timer_context *timer_ctx)
if (now < cval) {
u64 ns;
- ns = cyclecounter_cyc2ns(timecounter->cc,
+ ns = cyclecounter_cyc2ns(&timecounter->cc,
cval - now,
timecounter->mask,
&timecounter->frac);
@@ -734,7 +734,7 @@ int kvm_timer_hyp_init(void)
info = arch_timer_get_kvm_info();
timecounter = &info->timecounter;
- if (!timecounter->cc) {
+ if (!timecounter->cc.mask) {
kvm_err("kvm_arch_timer: uninitialized timecounter\n");
return -ENODEV;
}
--
1.9.1
^ permalink raw reply related
* [PATCH V5 7/7] dmaengine: qcom_hidma: Add identity register support
From: Sinan Kaya @ 2017-12-02 4:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512188864-773-1-git-send-email-okaya@codeaurora.org>
The location for destination event channel register has been relocated from
offset 0x28 to 0x40. Update the code accordingly.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/dma/qcom/hidma.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/qcom/hidma.c b/drivers/dma/qcom/hidma.c
index c146c6d..963cc52 100644
--- a/drivers/dma/qcom/hidma.c
+++ b/drivers/dma/qcom/hidma.c
@@ -107,6 +107,7 @@ static void hidma_free(struct hidma_dev *dmadev)
enum hidma_cap {
HIDMA_MSI_CAP = 1,
+ HIDMA_IDENTITY_CAP,
};
/* process completed descriptors */
@@ -838,7 +839,10 @@ static int hidma_probe(struct platform_device *pdev)
if (!dmadev->nr_descriptors)
dmadev->nr_descriptors = HIDMA_NR_DEFAULT_DESC;
- dmadev->chidx = readl(dmadev->dev_trca + 0x28);
+ if (hidma_test_capability(&pdev->dev, HIDMA_IDENTITY_CAP))
+ dmadev->chidx = readl(dmadev->dev_trca + 0x40);
+ else
+ dmadev->chidx = readl(dmadev->dev_trca + 0x28);
/* Set DMA mask to 64 bits. */
rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
@@ -944,7 +948,7 @@ static int hidma_remove(struct platform_device *pdev)
static const struct acpi_device_id hidma_acpi_ids[] = {
{"QCOM8061"},
{"QCOM8062", HIDMA_MSI_CAP},
- {"QCOM8063", HIDMA_MSI_CAP},
+ {"QCOM8063", (HIDMA_MSI_CAP | HIDMA_IDENTITY_CAP)},
{},
};
MODULE_DEVICE_TABLE(acpi, hidma_acpi_ids);
@@ -953,7 +957,8 @@ static int hidma_remove(struct platform_device *pdev)
static const struct of_device_id hidma_match[] = {
{.compatible = "qcom,hidma-1.0",},
{.compatible = "qcom,hidma-1.1", .data = (void *)(HIDMA_MSI_CAP),},
- {.compatible = "qcom,hidma-1.2", .data = (void *)(HIDMA_MSI_CAP),},
+ {.compatible = "qcom,hidma-1.2",
+ .data = (void *)(HIDMA_MSI_CAP | HIDMA_IDENTITY_CAP),},
{},
};
MODULE_DEVICE_TABLE(of, hidma_match);
--
1.9.1
^ permalink raw reply related
* [PATCH V5 6/7] dmaengine: qcom_hidma: Add support for the new revision
From: Sinan Kaya @ 2017-12-02 4:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512188864-773-1-git-send-email-okaya@codeaurora.org>
Add support for probing the newer HW and also organize MSI capable hardware
into an array for maintenance reasons.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/dma/qcom/hidma.c | 34 +++++++++++++---------------------
1 file changed, 13 insertions(+), 21 deletions(-)
diff --git a/drivers/dma/qcom/hidma.c b/drivers/dma/qcom/hidma.c
index e366985..c146c6d 100644
--- a/drivers/dma/qcom/hidma.c
+++ b/drivers/dma/qcom/hidma.c
@@ -50,6 +50,7 @@
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/of_dma.h>
+#include <linux/of_device.h>
#include <linux/property.h>
#include <linux/delay.h>
#include <linux/acpi.h>
@@ -104,6 +105,9 @@ static void hidma_free(struct hidma_dev *dmadev)
module_param(nr_desc_prm, uint, 0644);
MODULE_PARM_DESC(nr_desc_prm, "number of descriptors (default: 0)");
+enum hidma_cap {
+ HIDMA_MSI_CAP = 1,
+};
/* process completed descriptors */
static void hidma_process_completed(struct hidma_chan *mchan)
@@ -736,25 +740,12 @@ static int hidma_request_msi(struct hidma_dev *dmadev,
#endif
}
-static bool hidma_msi_capable(struct device *dev)
+static bool hidma_test_capability(struct device *dev, enum hidma_cap test_cap)
{
- struct acpi_device *adev = ACPI_COMPANION(dev);
- const char *of_compat;
- int ret = -EINVAL;
-
- if (!adev || acpi_disabled) {
- ret = device_property_read_string(dev, "compatible",
- &of_compat);
- if (ret)
- return false;
+ enum hidma_cap cap;
- ret = strcmp(of_compat, "qcom,hidma-1.1");
- } else {
-#ifdef CONFIG_ACPI
- ret = strcmp(acpi_device_hid(adev), "QCOM8062");
-#endif
- }
- return ret == 0;
+ cap = (enum hidma_cap) device_get_match_data(dev);
+ return cap ? ((cap & test_cap) > 0) : 0;
}
static int hidma_probe(struct platform_device *pdev)
@@ -834,8 +825,7 @@ static int hidma_probe(struct platform_device *pdev)
* Determine the MSI capability of the platform. Old HW doesn't
* support MSI.
*/
- msi = hidma_msi_capable(&pdev->dev);
-
+ msi = hidma_test_capability(&pdev->dev, HIDMA_MSI_CAP);
device_property_read_u32(&pdev->dev, "desc-count",
&dmadev->nr_descriptors);
@@ -953,7 +943,8 @@ static int hidma_remove(struct platform_device *pdev)
#if IS_ENABLED(CONFIG_ACPI)
static const struct acpi_device_id hidma_acpi_ids[] = {
{"QCOM8061"},
- {"QCOM8062"},
+ {"QCOM8062", HIDMA_MSI_CAP},
+ {"QCOM8063", HIDMA_MSI_CAP},
{},
};
MODULE_DEVICE_TABLE(acpi, hidma_acpi_ids);
@@ -961,7 +952,8 @@ static int hidma_remove(struct platform_device *pdev)
static const struct of_device_id hidma_match[] = {
{.compatible = "qcom,hidma-1.0",},
- {.compatible = "qcom,hidma-1.1",},
+ {.compatible = "qcom,hidma-1.1", .data = (void *)(HIDMA_MSI_CAP),},
+ {.compatible = "qcom,hidma-1.2", .data = (void *)(HIDMA_MSI_CAP),},
{},
};
MODULE_DEVICE_TABLE(of, hidma_match);
--
1.9.1
^ permalink raw reply related
* [PATCH V5 5/7] ACPI: properties: Implement get_match_data() callback
From: Sinan Kaya @ 2017-12-02 4:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512188864-773-1-git-send-email-okaya@codeaurora.org>
Now that we have a get_match_data() callback as part of the firmware node,
implement the ACPI specific piece for it.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/acpi/property.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/acpi/property.c b/drivers/acpi/property.c
index e26ea20..49dd50b 100644
--- a/drivers/acpi/property.c
+++ b/drivers/acpi/property.c
@@ -1271,6 +1271,17 @@ static int acpi_fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode,
return 0;
}
+static void *acpi_fwnode_get_match_data(const struct fwnode_handle *fwnode,
+ const struct device_driver *drv)
+{
+ struct acpi_device *adev = to_acpi_device_node(fwnode);
+
+ if (!adev)
+ return NULL;
+
+ return acpi_get_match_data(adev, drv->acpi_match_table);
+}
+
#define DECLARE_ACPI_FWNODE_OPS(ops) \
const struct fwnode_operations ops = { \
.device_is_available = acpi_fwnode_device_is_available, \
@@ -1289,6 +1300,7 @@ static int acpi_fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode,
acpi_fwnode_graph_get_remote_endpoint, \
.graph_get_port_parent = acpi_fwnode_get_parent, \
.graph_parse_endpoint = acpi_fwnode_graph_parse_endpoint, \
+ .get_match_data = acpi_fwnode_get_match_data, \
}; \
EXPORT_SYMBOL_GPL(ops)
--
1.9.1
^ permalink raw reply related
* [PATCH V5 4/7] OF: properties: Implement get_match_data() callback
From: Sinan Kaya @ 2017-12-02 4:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512188864-773-1-git-send-email-okaya@codeaurora.org>
Now that we have a get_match_data() callback as part of the firmware node,
implement the OF specific piece for it.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/of/property.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/of/property.c b/drivers/of/property.c
index 264c355..adcde1a 100644
--- a/drivers/of/property.c
+++ b/drivers/of/property.c
@@ -981,6 +981,22 @@ static int of_fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode,
return 0;
}
+void *of_fwnode_get_match_data(const struct fwnode_handle *fwnode,
+ const struct device_driver *drv)
+{
+ const struct device_node *node = to_of_node(fwnode);
+ const struct of_device_id *match;
+
+ if (!node)
+ return NULL;
+
+ match = of_match_node(drv->of_match_table, node);
+ if (!match)
+ return NULL;
+
+ return (void *)match->data;
+}
+
const struct fwnode_operations of_fwnode_ops = {
.get = of_fwnode_get,
.put = of_fwnode_put,
@@ -996,5 +1012,6 @@ static int of_fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode,
.graph_get_remote_endpoint = of_fwnode_graph_get_remote_endpoint,
.graph_get_port_parent = of_fwnode_graph_get_port_parent,
.graph_parse_endpoint = of_fwnode_graph_parse_endpoint,
+ .get_match_data = of_fwnode_get_match_data,
};
EXPORT_SYMBOL_GPL(of_fwnode_ops);
--
1.9.1
^ permalink raw reply related
* [PATCH V5 3/7] device property: Introduce a common API to fetch device match data
From: Sinan Kaya @ 2017-12-02 4:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512188864-773-1-git-send-email-okaya@codeaurora.org>
There is an OF/ACPI function to obtain the driver data. We want to hide
OF/ACPI details from the device drivers and abstract following the device
family of functions.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/base/property.c | 7 +++++++
include/linux/fwnode.h | 4 ++++
include/linux/property.h | 2 ++
3 files changed, 13 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 7ed99c1..dfc53af 100644
--- a/drivers/base/property.c
+++ b/drivers/base/property.c
@@ -1335,3 +1335,10 @@ int fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode,
return fwnode_call_int_op(fwnode, graph_parse_endpoint, endpoint);
}
EXPORT_SYMBOL(fwnode_graph_parse_endpoint);
+
+void *device_get_match_data(struct device *dev)
+{
+ return fwnode_call_ptr_op(dev_fwnode(dev), get_match_data,
+ dev->driver);
+}
+EXPORT_SYMBOL_GPL(device_get_match_data);
diff --git a/include/linux/fwnode.h b/include/linux/fwnode.h
index 0c35b6c..6e5e1dd 100644
--- a/include/linux/fwnode.h
+++ b/include/linux/fwnode.h
@@ -15,6 +15,7 @@
#include <linux/types.h>
struct fwnode_operations;
+struct device_driver;
struct fwnode_handle {
struct fwnode_handle *secondary;
@@ -66,6 +67,7 @@ struct fwnode_reference_args {
* endpoint node.
* @graph_get_port_parent: Return the parent node of a port node.
* @graph_parse_endpoint: Parse endpoint for port and endpoint id.
+ * @get_match_data: Return the driver match data.
*/
struct fwnode_operations {
void (*get)(struct fwnode_handle *fwnode);
@@ -101,6 +103,8 @@ struct fwnode_operations {
(*graph_get_port_parent)(struct fwnode_handle *fwnode);
int (*graph_parse_endpoint)(const struct fwnode_handle *fwnode,
struct fwnode_endpoint *endpoint);
+ void *(*get_match_data)(const struct fwnode_handle *fwnode,
+ const struct device_driver *drv);
};
#define fwnode_has_op(fwnode, op) \
diff --git a/include/linux/property.h b/include/linux/property.h
index 6bebee1..01fa55b 100644
--- a/include/linux/property.h
+++ b/include/linux/property.h
@@ -275,6 +275,8 @@ int device_add_properties(struct device *dev,
enum dev_dma_attr device_get_dma_attr(struct device *dev);
+void *device_get_match_data(struct device *dev);
+
int device_get_phy_mode(struct device *dev);
void *device_get_mac_address(struct device *dev, char *addr, int alen);
--
1.9.1
^ permalink raw reply related
* [PATCH V5 2/7] ACPI / bus: Introduce acpi_get_match_data() function
From: Sinan Kaya @ 2017-12-02 4:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512188864-773-1-git-send-email-okaya@codeaurora.org>
OF has of_device_get_match_data() function to extract driver specific data
structure. Add a similar function for ACPI.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/acpi/bus.c | 13 +++++++++++++
include/linux/acpi.h | 8 ++++++++
2 files changed, 21 insertions(+)
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 4d0979e..05d8d9a 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -785,6 +785,19 @@ const struct acpi_device_id *acpi_match_device(const struct acpi_device_id *ids,
}
EXPORT_SYMBOL_GPL(acpi_match_device);
+void *acpi_get_match_data(struct acpi_device *device,
+ const struct acpi_device_id *ids)
+{
+ const struct acpi_device_id *match;
+
+ match = __acpi_match_device(device, ids, NULL);
+ if (!match)
+ return NULL;
+
+ return (void *)match->driver_data;
+}
+EXPORT_SYMBOL_GPL(acpi_get_match_data);
+
int acpi_match_device_ids(struct acpi_device *device,
const struct acpi_device_id *ids)
{
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 502af53..196bc7a 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -584,6 +584,8 @@ extern int acpi_nvs_for_each_region(int (*func)(__u64, __u64, void *),
const struct acpi_device_id *acpi_match_device(const struct acpi_device_id *ids,
const struct device *dev);
+void *acpi_get_match_data(struct acpi_device *device,
+ const struct acpi_device_id *ids);
extern bool acpi_driver_match_device(struct device *dev,
const struct device_driver *drv);
int acpi_device_uevent_modalias(struct device *, struct kobj_uevent_env *);
@@ -755,6 +757,12 @@ static inline const struct acpi_device_id *acpi_match_device(
return NULL;
}
+static inline void *acpi_get_match_data(struct acpi_device *device,
+ const struct acpi_device_id *ids)
+{
+ return NULL;
+}
+
static inline bool acpi_driver_match_device(struct device *dev,
const struct device_driver *drv)
{
--
1.9.1
^ permalink raw reply related
* [PATCH V5 1/7] Documentation: DT: qcom_hidma: Bump HW revision for the bugfixed HW
From: Sinan Kaya @ 2017-12-02 4:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512188864-773-1-git-send-email-okaya@codeaurora.org>
A new version of the HIDMA IP has been released with bug fixes. Bumping the
hardware version to differentiate from others.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
index 55492c2..5d93d6d 100644
--- a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
+++ b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
@@ -47,8 +47,8 @@ When the OS is not in control of the management interface (i.e. it's a guest),
the channel nodes appear on their own, not under a management node.
Required properties:
-- compatible: must contain "qcom,hidma-1.0" for initial HW or "qcom,hidma-1.1"
-for MSI capable HW.
+- compatible: must contain "qcom,hidma-1.0" for initial HW or
+ "qcom,hidma-1.1"/"qcom,hidma-1.2" for MSI capable HW.
- reg: Addresses for the transfer and event channel
- interrupts: Should contain the event interrupt
- desc-count: Number of asynchronous requests this channel can handle
--
1.9.1
^ permalink raw reply related
* [PATCH V5 0/7] dmaengine: qcom_hidma: add support for bugfixed HW
From: Sinan Kaya @ 2017-12-02 4:27 UTC (permalink / raw)
To: linux-arm-kernel
Introduce new ACPI and OF device ids for thw HW along with the helper
functions.
Changes from v4:
* rework the device_get_match_data() to use fwnode callbacks
* change calling parameter of acpi_get_match_data() to struct acpi_device()
Sinan Kaya (7):
Documentation: DT: qcom_hidma: Bump HW revision for the bugfixed HW
ACPI / bus: Introduce acpi_get_match_data() function
device property: Introduce a common API to fetch device match data
OF: properties: Implement get_match_data() callback
ACPI: properties: Implement get_match_data() callback
dmaengine: qcom_hidma: Add support for the new revision
dmaengine: qcom_hidma: Add identity register support
.../devicetree/bindings/dma/qcom_hidma_mgmt.txt | 4 +--
drivers/acpi/bus.c | 13 +++++++
drivers/acpi/property.c | 12 +++++++
drivers/base/property.c | 7 ++++
drivers/dma/qcom/hidma.c | 41 ++++++++++------------
drivers/of/property.c | 17 +++++++++
include/linux/acpi.h | 8 +++++
include/linux/fwnode.h | 4 +++
include/linux/property.h | 2 ++
9 files changed, 84 insertions(+), 24 deletions(-)
--
1.9.1
^ permalink raw reply
* [PATCH 07/12] ARM: dts: imx6qdl-aristainetos: Move display node out of 'soc'
From: Heiko Schocher @ 2017-12-02 3:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512156285-18451-7-git-send-email-festevam@gmail.com>
Hello Fabio,
Am 01.12.2017 um 20:24 schrieb Fabio Estevam:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> Move disp0 node from soc node to root node.
>
> disp0 node does not have any register properties and thus
> shouldn't be placed on the bus.
>
> This fixes the following build warnings with W=1:
>
> arch/arm/boot/dts/imx6dl-aristainetos_4.dtb: Warning (simple_bus_reg): Node /soc/disp0 missing or empty reg/ranges property
>
> Cc: Heiko Schocher <hs@denx.de>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
> arch/arm/boot/dts/imx6dl-aristainetos_4.dts | 50 ++++++++++++++---------------
> arch/arm/boot/dts/imx6dl-aristainetos_7.dts | 48 +++++++++++++--------------
> 2 files changed, 47 insertions(+), 51 deletions(-)
Thanks for fixing!
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
bye,
Heiko
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: hs at denx.de
^ permalink raw reply
* [PATCH 06/12] ARM: dts: imx6qdl-aristainetos: Move regulators out of simple-bus
From: Heiko Schocher @ 2017-12-02 3:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512156285-18451-6-git-send-email-festevam@gmail.com>
Hello fabio,
Am 01.12.2017 um 20:24 schrieb Fabio Estevam:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> It is not recommended to place regulator nodes inside simple-bus, so
> move them out in order to fix the following build warnings with W=1:
>
> arch/arm/boot/dts/imx6dl-aristainetos_4.dtb: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
This is not fixed through this patch.
> arch/arm/boot/dts/imx6dl-aristainetos_4.dtb: Warning (unit_address_vs_reg): Node /regulators/regulator at 0 has a unit name, but no reg property
> arch/arm/boot/dts/imx6dl-aristainetos_4.dtb: Warning (unit_address_vs_reg): Node /regulators/regulator at 1 has a unit name, but no reg property
> arch/arm/boot/dts/imx6dl-aristainetos_4.dtb: Warning (unit_address_vs_reg): Node /regulators/regulator at 2 has a unit name, but no reg property
> arch/arm/boot/dts/imx6dl-aristainetos_4.dtb: Warning (unit_address_vs_reg): Node /regulators/regulator at 3 has a unit name, but no reg property
>
> Cc: Heiko Schocher <hs@denx.de>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
> arch/arm/boot/dts/imx6qdl-aristainetos.dtsi | 73 +++++++++++++-------------
> arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi | 76 +++++++++++++---------------
> 2 files changed, 70 insertions(+), 79 deletions(-)
Beside of the nitpick, Thanks for fixing!
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
bye,
Heiko
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: hs at denx.de
^ permalink raw reply
* [PATCH v1 6/6] ARM: davinci: remove clock debugfs
From: David Lechner @ 2017-12-02 2:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512182054-17410-1-git-send-email-david@lechnology.com>
This removed the debugfs entry for mach-davinci clocks. The clocks now use
the common clock framework, which provides debugfs already, so this code is
redundant.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/mach-davinci/clock.c | 79 -------------------------------------------
1 file changed, 79 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 0e63d93..347902e 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -626,82 +626,3 @@ void __init davinci_clk_init(struct davinci_clk *clk, const char *con_id,
if (clk->flags & ALWAYS_ENABLED)
clk_prepare_enable(clk->hw.clk);
}
-
-#ifdef CONFIG_DEBUG_FS
-
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-
-#define CLKNAME_MAX 10 /* longest clock name */
-#define NEST_DELTA 2
-#define NEST_MAX 4
-
-static void
-dump_clock(struct seq_file *s, unsigned nest, struct davinci_clk *parent)
-{
- char *state;
- char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX];
- struct davinci_clk *clk;
- unsigned i;
-
- if (parent->flags & CLK_PLL)
- state = "pll";
- else if (parent->flags & CLK_PSC)
- state = "psc";
- else
- state = "";
-
- /* <nest spaces> name <pad to end> */
- memset(buf, ' ', sizeof(buf) - 1);
- buf[sizeof(buf) - 1] = 0;
- i = strlen(parent->name);
- memcpy(buf + nest, parent->name,
- min(i, (unsigned)(sizeof(buf) - 1 - nest)));
-
- seq_printf(s, "%s users=%2d %-3s %9ld Hz\n",
- buf, parent->usecount, state, parent->rate);
- /* REVISIT show device associations too */
-
- /* cost is now small, but not linear... */
- list_for_each_entry(clk, &parent->children, childnode) {
- dump_clock(s, nest + NEST_DELTA, clk);
- }
-}
-
-static int davinci_ck_show(struct seq_file *m, void *v)
-{
- struct davinci_clk *clk;
-
- /*
- * Show clock tree; We trust nonzero usecounts equate to PSC enables...
- */
- mutex_lock(&clocks_mutex);
- list_for_each_entry(clk, &clocks, node)
- if (!clk->parent)
- dump_clock(m, 0, clk);
- mutex_unlock(&clocks_mutex);
-
- return 0;
-}
-
-static int davinci_ck_open(struct inode *inode, struct file *file)
-{
- return single_open(file, davinci_ck_show, NULL);
-}
-
-static const struct file_operations davinci_ck_operations = {
- .open = davinci_ck_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int __init davinci_clk_debugfs_init(void)
-{
- debugfs_create_file("davinci_clocks", S_IFREG | S_IRUGO, NULL, NULL,
- &davinci_ck_operations);
- return 0;
-
-}
-device_initcall(davinci_clk_debugfs_init);
-#endif /* CONFIG_DEBUG_FS */
--
2.7.4
^ permalink raw reply related
* [PATCH v1 5/6] ARM: davinci: convert to common clock framework
From: David Lechner @ 2017-12-02 2:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512182054-17410-1-git-send-email-david@lechnology.com>
This converts the clocks in mach-davinci to the common clock framework.
Most of the patch just involves renaming struct clk to struct davinci_clk.
There is also a struct clk_hw added to provide the bridge between the
existing clock implementation and the common clock framework.
In clock.c:
* The clk_get_parent and clk_set_parent callbacks are dropped because
all clocks currently (effectively) have a single parent, in which
case the common clock framework does not want you to implement these
functions yourself.
* clk_unregister() is dropped because it is not used anywhere in
mach-davinci.
* EXPORT_SYMBOL() is removed from functions not used outside of
mach-davinci.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-davinci/clock.c | 162 ++++++++++++-----------------
arch/arm/mach-davinci/clock.h | 40 ++++---
arch/arm/mach-davinci/da830.c | 100 +++++++++---------
arch/arm/mach-davinci/da850.c | 153 +++++++++++++--------------
arch/arm/mach-davinci/devices-da8xx.c | 6 +-
arch/arm/mach-davinci/dm355.c | 84 +++++++--------
arch/arm/mach-davinci/dm365.c | 112 ++++++++++----------
arch/arm/mach-davinci/dm644x.c | 72 ++++++-------
arch/arm/mach-davinci/dm646x.c | 78 +++++++-------
arch/arm/mach-davinci/include/mach/clock.h | 3 -
arch/arm/mach-davinci/usb-da8xx.c | 48 +++++----
12 files changed, 425 insertions(+), 435 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7888c98..1bd667d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -611,7 +611,7 @@ config ARCH_S3C24XX
config ARCH_DAVINCI
bool "TI DaVinci"
select ARCH_HAS_HOLES_MEMORYMODEL
- select CLKDEV_LOOKUP
+ select COMMON_CLK
select CPU_ARM926T
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index c149b24..0e63d93 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -31,7 +31,7 @@ static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
static DEFINE_SPINLOCK(clockfw_lock);
-void davinci_clk_enable(struct clk *clk)
+void davinci_clk_enable(struct davinci_clk *clk)
{
if (clk->parent)
davinci_clk_enable(clk->parent);
@@ -44,7 +44,7 @@ void davinci_clk_enable(struct clk *clk)
}
}
-void davinci_clk_disable(struct clk *clk)
+void davinci_clk_disable(struct davinci_clk *clk)
{
if (WARN_ON(clk->usecount == 0))
return;
@@ -59,7 +59,7 @@ void davinci_clk_disable(struct clk *clk)
davinci_clk_disable(clk->parent);
}
-static int davinci_clk_reset(struct clk *clk, bool reset)
+static int davinci_clk_reset(struct davinci_clk *clk, bool reset)
{
unsigned long flags;
@@ -76,24 +76,29 @@ static int davinci_clk_reset(struct clk *clk, bool reset)
int davinci_clk_reset_assert(struct clk *clk)
{
- if (clk == NULL || IS_ERR(clk) || !clk->reset)
+ struct davinci_clk *dclk = to_davinci_clk(__clk_get_hw(clk));
+
+ if (IS_ERR_OR_NULL(dclk) || !dclk->reset)
return -EINVAL;
- return clk->reset(clk, true);
+ return dclk->reset(dclk, true);
}
EXPORT_SYMBOL(davinci_clk_reset_assert);
int davinci_clk_reset_deassert(struct clk *clk)
{
- if (clk == NULL || IS_ERR(clk) || !clk->reset)
+ struct davinci_clk *dclk = to_davinci_clk(__clk_get_hw(clk));
+
+ if (IS_ERR_OR_NULL(dclk) || !dclk->reset)
return -EINVAL;
- return clk->reset(clk, false);
+ return dclk->reset(dclk, false);
}
EXPORT_SYMBOL(davinci_clk_reset_deassert);
-int clk_enable(struct clk *clk)
+static int _clk_enable(struct clk_hw *hw)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
unsigned long flags;
if (!clk)
@@ -107,10 +112,10 @@ int clk_enable(struct clk *clk)
return 0;
}
-EXPORT_SYMBOL(clk_enable);
-void clk_disable(struct clk *clk)
+static void _clk_disable(struct clk_hw *hw)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
unsigned long flags;
if (clk == NULL || IS_ERR(clk))
@@ -120,19 +125,26 @@ void clk_disable(struct clk *clk)
davinci_clk_disable(clk);
spin_unlock_irqrestore(&clockfw_lock, flags);
}
-EXPORT_SYMBOL(clk_disable);
-unsigned long clk_get_rate(struct clk *clk)
+static unsigned long _clk_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
+
if (clk == NULL || IS_ERR(clk))
return 0;
+ if (clk->recalc)
+ return clk->recalc(clk);
+
return clk->rate;
}
-EXPORT_SYMBOL(clk_get_rate);
-long clk_round_rate(struct clk *clk, unsigned long rate)
+static long _clk_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
+
if (clk == NULL || IS_ERR(clk))
return 0;
@@ -141,12 +153,11 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
return clk->rate;
}
-EXPORT_SYMBOL(clk_round_rate);
/* Propagate rate to children */
-static void propagate_rate(struct clk *root)
+static void propagate_rate(struct davinci_clk *root)
{
- struct clk *clk;
+ struct davinci_clk *clk;
list_for_each_entry(clk, &root->children, childnode) {
if (clk->recalc)
@@ -155,8 +166,10 @@ static void propagate_rate(struct clk *root)
}
}
-int clk_set_rate(struct clk *clk, unsigned long rate)
+static int _clk_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
unsigned long flags;
int ret = -EINVAL;
@@ -178,56 +191,20 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
return ret;
}
-EXPORT_SYMBOL(clk_set_rate);
-
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
- unsigned long flags;
-
- if (!clk)
- return 0;
- else if (IS_ERR(clk))
- return -EINVAL;
-
- /* Cannot change parent on enabled clock */
- if (WARN_ON(clk->usecount))
- return -EINVAL;
-
- mutex_lock(&clocks_mutex);
- if (clk->set_parent) {
- int ret = clk->set_parent(clk, parent);
-
- if (ret) {
- mutex_unlock(&clocks_mutex);
- return ret;
- }
- }
- clk->parent = parent;
- list_del_init(&clk->childnode);
- list_add(&clk->childnode, &clk->parent->children);
- mutex_unlock(&clocks_mutex);
-
- spin_lock_irqsave(&clockfw_lock, flags);
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
- propagate_rate(clk);
- spin_unlock_irqrestore(&clockfw_lock, flags);
- return 0;
-}
-EXPORT_SYMBOL(clk_set_parent);
+static const struct clk_ops davinci_clk_ops = {
+ .enable = _clk_enable,
+ .disable = _clk_disable,
+ .recalc_rate = _clk_recalc_rate,
+ .round_rate = _clk_round_rate,
+ .set_rate = _clk_set_rate,
+};
-struct clk *clk_get_parent(struct clk *clk)
+int davinci_clk_register(struct davinci_clk *clk)
{
- if (!clk)
- return NULL;
-
- return clk->parent;
-}
-EXPORT_SYMBOL(clk_get_parent);
+ struct clk_init_data init = {};
+ int ret;
-int clk_register(struct clk *clk)
-{
if (clk == NULL || IS_ERR(clk))
return -EINVAL;
@@ -242,7 +219,7 @@ int clk_register(struct clk *clk)
list_add_tail(&clk->node, &clocks);
if (clk->parent) {
if (clk->set_parent) {
- int ret = clk->set_parent(clk, clk->parent);
+ ret = clk->set_parent(clk, clk->parent);
if (ret) {
mutex_unlock(&clocks_mutex);
@@ -253,6 +230,18 @@ int clk_register(struct clk *clk)
}
mutex_unlock(&clocks_mutex);
+ init.name = clk->name;
+ init.ops = &davinci_clk_ops;
+ if (clk->parent) {
+ init.parent_names = &clk->parent->name;
+ init.num_parents = 1;
+ }
+ clk->hw.init = &init;
+
+ ret = clk_hw_register(NULL, &clk->hw);
+ if (WARN(ret, "Failed to register clock '%s'\n", clk->name))
+ return ret;
+
/* If rate is already set, use it */
if (clk->rate)
return 0;
@@ -267,19 +256,6 @@ int clk_register(struct clk *clk)
return 0;
}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
- if (clk == NULL || IS_ERR(clk))
- return;
-
- mutex_lock(&clocks_mutex);
- list_del(&clk->node);
- list_del(&clk->childnode);
- mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
#ifdef CONFIG_DAVINCI_RESET_CLOCKS
/*
@@ -287,7 +263,7 @@ EXPORT_SYMBOL(clk_unregister);
*/
int __init davinci_clk_disable_unused(void)
{
- struct clk *ck;
+ struct davinci_clk *ck;
spin_lock_irq(&clockfw_lock);
list_for_each_entry(ck, &clocks, node) {
@@ -311,7 +287,7 @@ int __init davinci_clk_disable_unused(void)
}
#endif
-static unsigned long clk_sysclk_recalc(struct clk *clk)
+static unsigned long clk_sysclk_recalc(struct davinci_clk *clk)
{
u32 v, plldiv;
struct pll_data *pll;
@@ -349,7 +325,7 @@ static unsigned long clk_sysclk_recalc(struct clk *clk)
return rate;
}
-int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
+int davinci_set_sysclk_rate(struct davinci_clk *clk, unsigned long rate)
{
unsigned v;
struct pll_data *pll;
@@ -420,9 +396,8 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
return 0;
}
-EXPORT_SYMBOL(davinci_set_sysclk_rate);
-static unsigned long clk_leafclk_recalc(struct clk *clk)
+static unsigned long clk_leafclk_recalc(struct davinci_clk *clk)
{
if (WARN_ON(!clk->parent))
return clk->rate;
@@ -430,13 +405,13 @@ static unsigned long clk_leafclk_recalc(struct clk *clk)
return clk->parent->rate;
}
-int davinci_simple_set_rate(struct clk *clk, unsigned long rate)
+int davinci_simple_set_rate(struct davinci_clk *clk, unsigned long rate)
{
clk->rate = rate;
return 0;
}
-static unsigned long clk_pllclk_recalc(struct clk *clk)
+static unsigned long clk_pllclk_recalc(struct davinci_clk *clk)
{
u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
u8 bypass;
@@ -572,7 +547,6 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
return 0;
}
-EXPORT_SYMBOL(davinci_set_pllrate);
/**
* davinci_set_refclk_rate() - Set the reference clock rate
@@ -606,7 +580,7 @@ int davinci_set_refclk_rate(unsigned long rate)
return 0;
}
-void __init davinci_clk_init(struct clk *clk, const char *con_id,
+void __init davinci_clk_init(struct davinci_clk *clk, const char *con_id,
const char *dev_id)
{
if (!clk->recalc) {
@@ -645,12 +619,12 @@ void __init davinci_clk_init(struct clk *clk, const char *con_id,
if (clk->flags & PSC_LRST)
clk->reset = davinci_clk_reset;
- clk_register(clk);
- clk_register_clkdev(clk, con_id, dev_id);
+ davinci_clk_register(clk);
+ clk_register_clkdev(clk->hw.clk, con_id, dev_id);
/* Turn on clocks that Linux doesn't otherwise manage */
if (clk->flags & ALWAYS_ENABLED)
- clk_enable(clk);
+ clk_prepare_enable(clk->hw.clk);
}
#ifdef CONFIG_DEBUG_FS
@@ -663,11 +637,11 @@ void __init davinci_clk_init(struct clk *clk, const char *con_id,
#define NEST_MAX 4
static void
-dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
+dump_clock(struct seq_file *s, unsigned int nest, struct davinci_clk *parent)
{
char *state;
char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX];
- struct clk *clk;
+ struct davinci_clk *clk;
unsigned i;
if (parent->flags & CLK_PLL)
@@ -685,7 +659,7 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
min(i, (unsigned)(sizeof(buf) - 1 - nest)));
seq_printf(s, "%s users=%2d %-3s %9ld Hz\n",
- buf, parent->usecount, state, clk_get_rate(parent));
+ buf, parent->usecount, state, parent->rate);
/* REVISIT show device associations too */
/* cost is now small, but not linear... */
@@ -696,7 +670,7 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
static int davinci_ck_show(struct seq_file *m, void *v)
{
- struct clk *clk;
+ struct davinci_clk *clk;
/*
* Show clock tree; We trust nonzero usecounts equate to PSC enables...
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index bf60cdf..aea4f14 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -68,6 +68,7 @@
#ifndef __ASSEMBLER__
#include <linux/list.h>
+#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#define PLLSTAT_GOSTAT BIT(0)
@@ -84,7 +85,8 @@ struct pll_data {
#define PLL_HAS_PREDIV 0x01
#define PLL_HAS_POSTDIV 0x02
-struct clk {
+struct davinci_clk {
+ struct clk_hw hw;
struct list_head node;
struct module *owner;
const char *name;
@@ -95,18 +97,18 @@ struct clk {
u8 gpsc;
u8 domain;
u32 flags;
- struct clk *parent;
+ struct davinci_clk *parent;
struct list_head children; /* list of children */
struct list_head childnode; /* parent's child list node */
struct pll_data *pll_data;
u32 div_reg;
- unsigned long (*recalc) (struct clk *);
- int (*set_rate) (struct clk *clk, unsigned long rate);
- int (*round_rate) (struct clk *clk, unsigned long rate);
- int (*reset) (struct clk *clk, bool reset);
- void (*clk_enable) (struct clk *clk);
- void (*clk_disable) (struct clk *clk);
- int (*set_parent) (struct clk *clk, struct clk *parent);
+ unsigned long (*recalc)(struct davinci_clk *clk);
+ int (*set_rate)(struct davinci_clk *clk, unsigned long rate);
+ int (*round_rate)(struct davinci_clk *clk, unsigned long rate);
+ int (*reset)(struct davinci_clk *clk, bool reset);
+ void (*clk_enable)(struct davinci_clk *clk);
+ void (*clk_disable)(struct davinci_clk *clk);
+ int (*set_parent)(struct davinci_clk *clk, struct davinci_clk *parent);
};
/* Clock flags: SoC-specific flags start at BIT(16) */
@@ -118,18 +120,28 @@ struct clk {
#define PSC_FORCE BIT(6) /* Force module state transtition */
#define PSC_LRST BIT(8) /* Use local reset on enable/disable */
-void davinci_clk_init(struct clk *clk, const char *con_id, const char *dev_id);
+void davinci_clk_init(struct davinci_clk *clk, const char *con_id,
+ const char *dev_id);
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
unsigned int mult, unsigned int postdiv);
-int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
+int davinci_set_sysclk_rate(struct davinci_clk *clk, unsigned long rate);
int davinci_set_refclk_rate(unsigned long rate);
-int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
-void davinci_clk_enable(struct clk *clk);
-void davinci_clk_disable(struct clk *clk);
+int davinci_simple_set_rate(struct davinci_clk *clk, unsigned long rate);
+void davinci_clk_enable(struct davinci_clk *clk);
+void davinci_clk_disable(struct davinci_clk *clk);
+int davinci_clk_register(struct davinci_clk *clk);
extern struct platform_device davinci_wdt_device;
extern void davinci_watchdog_reset(struct platform_device *);
+static inline struct davinci_clk *to_davinci_clk(struct clk_hw *hw)
+{
+ if (IS_ERR_OR_NULL(hw))
+ return (struct davinci_clk *)hw;
+
+ return container_of(hw, struct davinci_clk, hw);
+}
+
#endif
#endif
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 7771161..ba77209 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -43,322 +43,322 @@ static struct pll_data pll0_data = {
.flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DA830_REF_FREQ,
};
-static struct clk pll0_clk = {
+static struct davinci_clk pll0_clk = {
.name = "pll0",
.parent = &ref_clk,
.pll_data = &pll0_data,
.flags = CLK_PLL,
};
-static struct clk pll0_aux_clk = {
+static struct davinci_clk pll0_aux_clk = {
.name = "pll0_aux_clk",
.parent = &pll0_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll0_sysclk2 = {
+static struct davinci_clk pll0_sysclk2 = {
.name = "pll0_sysclk2",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll0_sysclk3 = {
+static struct davinci_clk pll0_sysclk3 = {
.name = "pll0_sysclk3",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll0_sysclk4 = {
+static struct davinci_clk pll0_sysclk4 = {
.name = "pll0_sysclk4",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll0_sysclk5 = {
+static struct davinci_clk pll0_sysclk5 = {
.name = "pll0_sysclk5",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll0_sysclk6 = {
+static struct davinci_clk pll0_sysclk6 = {
.name = "pll0_sysclk6",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll0_sysclk7 = {
+static struct davinci_clk pll0_sysclk7 = {
.name = "pll0_sysclk7",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV7,
};
-static struct clk i2c0_clk = {
+static struct davinci_clk i2c0_clk = {
.name = "i2c0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_0_clk = {
+static struct davinci_clk timerp64_0_clk = {
.name = "timer0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_1_clk = {
+static struct davinci_clk timerp64_1_clk = {
.name = "timer1",
.parent = &pll0_aux_clk,
};
-static struct clk arm_rom_clk = {
+static struct davinci_clk arm_rom_clk = {
.name = "arm_rom",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
.flags = ALWAYS_ENABLED,
};
-static struct clk scr0_ss_clk = {
+static struct davinci_clk scr0_ss_clk = {
.name = "scr0_ss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SCR0_SS,
.flags = ALWAYS_ENABLED,
};
-static struct clk scr1_ss_clk = {
+static struct davinci_clk scr1_ss_clk = {
.name = "scr1_ss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SCR1_SS,
.flags = ALWAYS_ENABLED,
};
-static struct clk scr2_ss_clk = {
+static struct davinci_clk scr2_ss_clk = {
.name = "scr2_ss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SCR2_SS,
.flags = ALWAYS_ENABLED,
};
-static struct clk dmax_clk = {
+static struct davinci_clk dmax_clk = {
.name = "dmax",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_PRUSS,
.flags = ALWAYS_ENABLED,
};
-static struct clk tpcc_clk = {
+static struct davinci_clk tpcc_clk = {
.name = "tpcc",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPCC,
.flags = ALWAYS_ENABLED | CLK_PSC,
};
-static struct clk tptc0_clk = {
+static struct davinci_clk tptc0_clk = {
.name = "tptc0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC0,
.flags = ALWAYS_ENABLED,
};
-static struct clk tptc1_clk = {
+static struct davinci_clk tptc1_clk = {
.name = "tptc1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC1,
.flags = ALWAYS_ENABLED,
};
-static struct clk mmcsd_clk = {
+static struct davinci_clk mmcsd_clk = {
.name = "mmcsd",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_MMC_SD,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_UART1,
.gpsc = 1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_UART2,
.gpsc = 1,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SPI0,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_SPI1,
.gpsc = 1,
};
-static struct clk ecap0_clk = {
+static struct davinci_clk ecap0_clk = {
.name = "ecap0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk ecap1_clk = {
+static struct davinci_clk ecap1_clk = {
.name = "ecap1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk ecap2_clk = {
+static struct davinci_clk ecap2_clk = {
.name = "ecap2",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk eqep0_clk = {
+static struct davinci_clk eqep0_clk = {
.name = "eqep0",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_EQEP,
.gpsc = 1,
};
-static struct clk eqep1_clk = {
+static struct davinci_clk eqep1_clk = {
.name = "eqep1",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_EQEP,
.gpsc = 1,
};
-static struct clk lcdc_clk = {
+static struct davinci_clk lcdc_clk = {
.name = "lcdc",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_LCDC,
.gpsc = 1,
};
-static struct clk mcasp0_clk = {
+static struct davinci_clk mcasp0_clk = {
.name = "mcasp0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_McASP0,
.gpsc = 1,
};
-static struct clk mcasp1_clk = {
+static struct davinci_clk mcasp1_clk = {
.name = "mcasp1",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_McASP1,
.gpsc = 1,
};
-static struct clk mcasp2_clk = {
+static struct davinci_clk mcasp2_clk = {
.name = "mcasp2",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_McASP2,
.gpsc = 1,
};
-static struct clk usb20_clk = {
+static struct davinci_clk usb20_clk = {
.name = "usb20",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_USB20,
.gpsc = 1,
};
-static struct clk cppi41_clk = {
+static struct davinci_clk cppi41_clk = {
.name = "cppi41",
.parent = &usb20_clk,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll0_sysclk3,
.lpsc = DA8XX_LPSC0_EMIF25,
.flags = ALWAYS_ENABLED,
};
-static struct clk aintc_clk = {
+static struct davinci_clk aintc_clk = {
.name = "aintc",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC0_AINTC,
.flags = ALWAYS_ENABLED,
};
-static struct clk secu_mgr_clk = {
+static struct davinci_clk secu_mgr_clk = {
.name = "secu_mgr",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC0_SECU_MGR,
.flags = ALWAYS_ENABLED,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_CPGMAC,
.gpsc = 1,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_GPIO,
.gpsc = 1,
};
-static struct clk i2c1_clk = {
+static struct davinci_clk i2c1_clk = {
.name = "i2c1",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_I2C,
.gpsc = 1,
};
-static struct clk usb11_clk = {
+static struct davinci_clk usb11_clk = {
.name = "usb11",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_USB11,
.gpsc = 1,
};
-static struct clk emif3_clk = {
+static struct davinci_clk emif3_clk = {
.name = "emif3",
.parent = &pll0_sysclk5,
.lpsc = DA8XX_LPSC1_EMIF3C,
@@ -366,14 +366,14 @@ static struct clk emif3_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll0_sysclk6,
.lpsc = DA8XX_LPSC0_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk rmii_clk = {
+static struct davinci_clk rmii_clk = {
.name = "rmii",
.parent = &pll0_sysclk7,
};
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index a7484e6..b8d65d7 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -44,9 +44,9 @@
#define CFGCHIP3_PLL1_MASTER_LOCK BIT(5)
#define CFGCHIP0_PLL_MASTER_LOCK BIT(4)
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
+static int da850_set_armrate(struct davinci_clk *clk, unsigned long rate);
+static int da850_round_armrate(struct davinci_clk *clk, unsigned long rate);
+static int da850_set_pll0rate(struct davinci_clk *clk, unsigned long armrate);
static struct pll_data pll0_data = {
.num = 1,
@@ -54,13 +54,13 @@ static struct pll_data pll0_data = {
.flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DA850_REF_FREQ,
.set_rate = davinci_simple_set_rate,
};
-static struct clk pll0_clk = {
+static struct davinci_clk pll0_clk = {
.name = "pll0",
.parent = &ref_clk,
.pll_data = &pll0_data,
@@ -68,27 +68,27 @@ static struct clk pll0_clk = {
.set_rate = da850_set_pll0rate,
};
-static struct clk pll0_aux_clk = {
+static struct davinci_clk pll0_aux_clk = {
.name = "pll0_aux_clk",
.parent = &pll0_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll0_sysclk1 = {
+static struct davinci_clk pll0_sysclk1 = {
.name = "pll0_sysclk1",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll0_sysclk2 = {
+static struct davinci_clk pll0_sysclk2 = {
.name = "pll0_sysclk2",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll0_sysclk3 = {
+static struct davinci_clk pll0_sysclk3 = {
.name = "pll0_sysclk3",
.parent = &pll0_clk,
.flags = CLK_PLL,
@@ -97,28 +97,28 @@ static struct clk pll0_sysclk3 = {
.maxrate = 100000000,
};
-static struct clk pll0_sysclk4 = {
+static struct davinci_clk pll0_sysclk4 = {
.name = "pll0_sysclk4",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll0_sysclk5 = {
+static struct davinci_clk pll0_sysclk5 = {
.name = "pll0_sysclk5",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll0_sysclk6 = {
+static struct davinci_clk pll0_sysclk6 = {
.name = "pll0_sysclk6",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll0_sysclk7 = {
+static struct davinci_clk pll0_sysclk7 = {
.name = "pll0_sysclk7",
.parent = &pll0_clk,
.flags = CLK_PLL,
@@ -131,34 +131,35 @@ static struct pll_data pll1_data = {
.flags = PLL_HAS_POSTDIV,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.pll_data = &pll1_data,
.flags = CLK_PLL,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static int da850_async3_set_parent(struct clk *clk, struct clk *parent)
+static int da850_async3_set_parent(struct davinci_clk *clk,
+ struct davinci_clk *parent)
{
u32 val;
@@ -178,56 +179,56 @@ static int da850_async3_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static struct clk async3_clk = {
+static struct davinci_clk async3_clk = {
.name = "async3",
.parent = &pll1_sysclk2,
.set_parent = da850_async3_set_parent,
};
-static struct clk i2c0_clk = {
+static struct davinci_clk i2c0_clk = {
.name = "i2c0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_0_clk = {
+static struct davinci_clk timerp64_0_clk = {
.name = "timer0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_1_clk = {
+static struct davinci_clk timerp64_1_clk = {
.name = "timer1",
.parent = &pll0_aux_clk,
};
-static struct clk arm_rom_clk = {
+static struct davinci_clk arm_rom_clk = {
.name = "arm_rom",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
.flags = ALWAYS_ENABLED,
};
-static struct clk tpcc0_clk = {
+static struct davinci_clk tpcc0_clk = {
.name = "tpcc0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPCC,
.flags = ALWAYS_ENABLED | CLK_PSC,
};
-static struct clk tptc0_clk = {
+static struct davinci_clk tptc0_clk = {
.name = "tptc0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC0,
.flags = ALWAYS_ENABLED,
};
-static struct clk tptc1_clk = {
+static struct davinci_clk tptc1_clk = {
.name = "tptc1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC1,
.flags = ALWAYS_ENABLED,
};
-static struct clk tpcc1_clk = {
+static struct davinci_clk tpcc1_clk = {
.name = "tpcc1",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_TPCC1,
@@ -235,7 +236,7 @@ static struct clk tpcc1_clk = {
.flags = CLK_PSC | ALWAYS_ENABLED,
};
-static struct clk tptc2_clk = {
+static struct davinci_clk tptc2_clk = {
.name = "tptc2",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_TPTC2,
@@ -243,54 +244,54 @@ static struct clk tptc2_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk pruss_clk = {
+static struct davinci_clk pruss_clk = {
.name = "pruss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_PRUSS,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_UART1,
.gpsc = 1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_UART2,
.gpsc = 1,
};
-static struct clk aintc_clk = {
+static struct davinci_clk aintc_clk = {
.name = "aintc",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC0_AINTC,
.flags = ALWAYS_ENABLED,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_GPIO,
.gpsc = 1,
};
-static struct clk i2c1_clk = {
+static struct davinci_clk i2c1_clk = {
.name = "i2c1",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_I2C,
.gpsc = 1,
};
-static struct clk emif3_clk = {
+static struct davinci_clk emif3_clk = {
.name = "emif3",
.parent = &pll0_sysclk5,
.lpsc = DA8XX_LPSC1_EMIF3C,
@@ -298,7 +299,7 @@ static struct clk emif3_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll0_sysclk6,
.lpsc = DA8XX_LPSC0_ARM,
@@ -307,12 +308,12 @@ static struct clk arm_clk = {
.round_rate = da850_round_armrate,
};
-static struct clk rmii_clk = {
+static struct davinci_clk rmii_clk = {
.name = "rmii",
.parent = &pll0_sysclk7,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_CPGMAC,
@@ -324,53 +325,53 @@ static struct clk emac_clk = {
* screwing up the linked list in the process) create a separate clock for
* mdio inheriting the rate from emac_clk.
*/
-static struct clk mdio_clk = {
+static struct davinci_clk mdio_clk = {
.name = "mdio",
.parent = &emac_clk,
};
-static struct clk mcasp_clk = {
+static struct davinci_clk mcasp_clk = {
.name = "mcasp",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_McASP0,
.gpsc = 1,
};
-static struct clk mcbsp0_clk = {
+static struct davinci_clk mcbsp0_clk = {
.name = "mcbsp0",
.parent = &async3_clk,
.lpsc = DA850_LPSC1_McBSP0,
.gpsc = 1,
};
-static struct clk mcbsp1_clk = {
+static struct davinci_clk mcbsp1_clk = {
.name = "mcbsp1",
.parent = &async3_clk,
.lpsc = DA850_LPSC1_McBSP1,
.gpsc = 1,
};
-static struct clk lcdc_clk = {
+static struct davinci_clk lcdc_clk = {
.name = "lcdc",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_LCDC,
.gpsc = 1,
};
-static struct clk mmcsd0_clk = {
+static struct davinci_clk mmcsd0_clk = {
.name = "mmcsd0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_MMC_SD,
};
-static struct clk mmcsd1_clk = {
+static struct davinci_clk mmcsd1_clk = {
.name = "mmcsd1",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_MMC_SD1,
.gpsc = 1,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll0_sysclk3,
.lpsc = DA8XX_LPSC0_EMIF25,
@@ -382,51 +383,51 @@ static struct clk aemif_clk = {
* screwing up the linked list in the process) create a separate clock for
* nand inheriting the rate from aemif_clk.
*/
-static struct clk aemif_nand_clk = {
+static struct davinci_clk aemif_nand_clk = {
.name = "nand",
.parent = &aemif_clk,
};
-static struct clk usb11_clk = {
+static struct davinci_clk usb11_clk = {
.name = "usb11",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_USB11,
.gpsc = 1,
};
-static struct clk usb20_clk = {
+static struct davinci_clk usb20_clk = {
.name = "usb20",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_USB20,
.gpsc = 1,
};
-static struct clk cppi41_clk = {
+static struct davinci_clk cppi41_clk = {
.name = "cppi41",
.parent = &usb20_clk,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SPI0,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_SPI1,
.gpsc = 1,
};
-static struct clk vpif_clk = {
+static struct davinci_clk vpif_clk = {
.name = "vpif",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_VPIF,
.gpsc = 1,
};
-static struct clk sata_clk = {
+static struct davinci_clk sata_clk = {
.name = "sata",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_SATA,
@@ -434,7 +435,7 @@ static struct clk sata_clk = {
.flags = PSC_FORCE,
};
-static struct clk dsp_clk = {
+static struct davinci_clk dsp_clk = {
.name = "dsp",
.parent = &pll0_sysclk1,
.domain = DAVINCI_GPSC_DSPDOMAIN,
@@ -442,26 +443,26 @@ static struct clk dsp_clk = {
.flags = PSC_LRST | PSC_FORCE,
};
-static struct clk ehrpwm_clk = {
+static struct davinci_clk ehrpwm_clk = {
.name = "ehrpwm",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk ehrpwm0_clk = {
+static struct davinci_clk ehrpwm0_clk = {
.name = "ehrpwm0",
.parent = &ehrpwm_clk,
};
-static struct clk ehrpwm1_clk = {
+static struct davinci_clk ehrpwm1_clk = {
.name = "ehrpwm1",
.parent = &ehrpwm_clk,
};
#define DA8XX_EHRPWM_TBCLKSYNC BIT(12)
-static void ehrpwm_tblck_enable(struct clk *clk)
+static void ehrpwm_tblck_enable(struct davinci_clk *clk)
{
u32 val;
@@ -470,7 +471,7 @@ static void ehrpwm_tblck_enable(struct clk *clk)
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
-static void ehrpwm_tblck_disable(struct clk *clk)
+static void ehrpwm_tblck_disable(struct davinci_clk *clk)
{
u32 val;
@@ -479,41 +480,41 @@ static void ehrpwm_tblck_disable(struct clk *clk)
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
-static struct clk ehrpwm_tbclk = {
+static struct davinci_clk ehrpwm_tbclk = {
.name = "ehrpwm_tbclk",
.parent = &ehrpwm_clk,
.clk_enable = ehrpwm_tblck_enable,
.clk_disable = ehrpwm_tblck_disable,
};
-static struct clk ehrpwm0_tbclk = {
+static struct davinci_clk ehrpwm0_tbclk = {
.name = "ehrpwm0_tbclk",
.parent = &ehrpwm_tbclk,
};
-static struct clk ehrpwm1_tbclk = {
+static struct davinci_clk ehrpwm1_tbclk = {
.name = "ehrpwm1_tbclk",
.parent = &ehrpwm_tbclk,
};
-static struct clk ecap_clk = {
+static struct davinci_clk ecap_clk = {
.name = "ecap",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk ecap0_clk = {
+static struct davinci_clk ecap0_clk = {
.name = "ecap0_clk",
.parent = &ecap_clk,
};
-static struct clk ecap1_clk = {
+static struct davinci_clk ecap1_clk = {
.name = "ecap1_clk",
.parent = &ecap_clk,
};
-static struct clk ecap2_clk = {
+static struct davinci_clk ecap2_clk = {
.name = "ecap2_clk",
.parent = &ecap_clk,
};
@@ -1170,7 +1171,7 @@ int da850_register_cpufreq(char *async_clk)
return platform_device_register(&da850_cpufreq_device);
}
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
+static int da850_round_armrate(struct davinci_clk *clk, unsigned long rate)
{
int ret = 0, diff;
unsigned int best = (unsigned int) -1;
@@ -1193,14 +1194,14 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate)
return ret * 1000;
}
-static int da850_set_armrate(struct clk *clk, unsigned long index)
+static int da850_set_armrate(struct davinci_clk *clk, unsigned long index)
{
- struct clk *pllclk = &pll0_clk;
+ struct davinci_clk *pllclk = &pll0_clk;
- return clk_set_rate(pllclk, index);
+ return clk_set_rate(pllclk->hw.clk, index);
}
-static int da850_set_pll0rate(struct clk *clk, unsigned long rate)
+static int da850_set_pll0rate(struct davinci_clk *clk, unsigned long rate)
{
struct pll_data *pll = clk->pll_data;
struct cpufreq_frequency_table *freq;
@@ -1238,17 +1239,17 @@ int __init da850_register_cpufreq(char *async_clk)
return 0;
}
-static int da850_set_armrate(struct clk *clk, unsigned long rate)
+static int da850_set_armrate(struct davinci_clk *clk, unsigned long rate)
{
return -EINVAL;
}
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate)
+static int da850_set_pll0rate(struct davinci_clk *clk, unsigned long armrate)
{
return -EINVAL;
}
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
+static int da850_round_armrate(struct davinci_clk *clk, unsigned long rate)
{
return clk->rate;
}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index cc497f4..8d6deee 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -1054,7 +1054,7 @@ int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
}
#ifdef CONFIG_ARCH_DAVINCI_DA850
-static struct clk sata_refclk = {
+static struct davinci_clk sata_refclk = {
.name = "sata_refclk",
.set_rate = davinci_simple_set_rate,
};
@@ -1064,11 +1064,11 @@ int __init da850_register_sata_refclk(int rate)
int ret;
sata_refclk.rate = rate;
- ret = clk_register(&sata_refclk);
+ ret = davinci_clk_register(&sata_refclk);
if (ret)
return ret;
- clk_register_clkdev(&sata_refclk, "refclk", "ahci_da850");
+ clk_register_clkdev(sata_refclk.hw.clk, "refclk", "ahci_da850");
return 0;
}
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 555b99d..af4f28a 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -55,118 +55,118 @@ static struct pll_data pll2_data = {
.flags = PLL_HAS_PREDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
/* FIXME -- crystal rate is board-specific */
.rate = DM355_REF_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll1_data,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk4 = {
+static struct davinci_clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk vpss_dac_clk = {
+static struct davinci_clk vpss_dac_clk = {
.name = "vpss_dac",
.parent = &pll1_sysclk3,
.lpsc = DM355_LPSC_VPSS_DAC,
};
-static struct clk vpss_master_clk = {
+static struct davinci_clk vpss_master_clk = {
.name = "vpss_master",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_VPSSMSTR,
.flags = CLK_PSC,
};
-static struct clk vpss_slave_clk = {
+static struct davinci_clk vpss_slave_clk = {
.name = "vpss_slave",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-static struct clk clkout1_clk = {
+static struct davinci_clk clkout1_clk = {
.name = "clkout1",
.parent = &pll1_aux_clk,
/* NOTE: clkout1 can be externally gated by muxing GPIO-18 */
};
-static struct clk clkout2_clk = {
+static struct davinci_clk clkout2_clk = {
.name = "clkout2",
.parent = &pll1_sysclkbp,
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll2_data,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll2_sysclkbp = {
+static struct davinci_clk pll2_sysclkbp = {
.name = "pll2_sysclkbp",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk clkout3_clk = {
+static struct davinci_clk clkout3_clk = {
.name = "clkout3",
.parent = &pll2_sysclkbp,
/* NOTE: clkout3 can be externally gated by muxing GPIO-16 */
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm_clk",
.parent = &pll1_sysclk1,
.lpsc = DAVINCI_LPSC_ARM,
@@ -192,146 +192,146 @@ static struct clk arm_clk = {
* .lpsc = DAVINCI_LPSC_CFG5, // "test"
*/
-static struct clk mjcp_clk = {
+static struct davinci_clk mjcp_clk = {
.name = "mjcp",
.parent = &pll1_sysclk1,
.lpsc = DAVINCI_LPSC_IMCOP,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_UART2,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "i2c",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_I2C,
};
-static struct clk asp0_clk = {
+static struct davinci_clk asp0_clk = {
.name = "asp0",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_McBSP,
};
-static struct clk asp1_clk = {
+static struct davinci_clk asp1_clk = {
.name = "asp1",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_McBSP1,
};
-static struct clk mmcsd0_clk = {
+static struct davinci_clk mmcsd0_clk = {
.name = "mmcsd0",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_MMC_SD,
};
-static struct clk mmcsd1_clk = {
+static struct davinci_clk mmcsd1_clk = {
.name = "mmcsd1",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_MMC_SD1,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_SPI,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_SPI1,
};
-static struct clk spi2_clk = {
+static struct davinci_clk spi2_clk = {
.name = "spi2",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_SPI2,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_GPIO,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_AEMIF,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM0,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM2,
};
-static struct clk pwm3_clk = {
+static struct davinci_clk pwm3_clk = {
.name = "pwm3",
.parent = &pll1_aux_clk,
.lpsc = DM355_LPSC_PWM3,
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER2,
.usecount = 1, /* REVISIT: why can't this be disabled? */
};
-static struct clk timer3_clk = {
+static struct davinci_clk timer3_clk = {
.name = "timer3",
.parent = &pll1_aux_clk,
.lpsc = DM355_LPSC_TIMER3,
};
-static struct clk rto_clk = {
+static struct davinci_clk rto_clk = {
.name = "rto",
.parent = &pll1_aux_clk,
.lpsc = DM355_LPSC_RTO,
};
-static struct clk usb_clk = {
+static struct davinci_clk usb_clk = {
.name = "usb",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_USB,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 44bbfae..4311975 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -66,360 +66,360 @@ static struct pll_data pll2_data = {
.flags = PLL_HAS_POSTDIV | PLL_HAS_PREDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DM365_REF_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll1_data,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk clkout0_clk = {
+static struct davinci_clk clkout0_clk = {
.name = "clkout0",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk4 = {
+static struct davinci_clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll1_sysclk5 = {
+static struct davinci_clk pll1_sysclk5 = {
.name = "pll1_sysclk5",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll1_sysclk6 = {
+static struct davinci_clk pll1_sysclk6 = {
.name = "pll1_sysclk6",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll1_sysclk7 = {
+static struct davinci_clk pll1_sysclk7 = {
.name = "pll1_sysclk7",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV7,
};
-static struct clk pll1_sysclk8 = {
+static struct davinci_clk pll1_sysclk8 = {
.name = "pll1_sysclk8",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV8,
};
-static struct clk pll1_sysclk9 = {
+static struct davinci_clk pll1_sysclk9 = {
.name = "pll1_sysclk9",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV9,
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll2_data,
};
-static struct clk pll2_aux_clk = {
+static struct davinci_clk pll2_aux_clk = {
.name = "pll2_aux_clk",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk clkout1_clk = {
+static struct davinci_clk clkout1_clk = {
.name = "clkout1",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll2_sysclk2 = {
+static struct davinci_clk pll2_sysclk2 = {
.name = "pll2_sysclk2",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll2_sysclk3 = {
+static struct davinci_clk pll2_sysclk3 = {
.name = "pll2_sysclk3",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll2_sysclk4 = {
+static struct davinci_clk pll2_sysclk4 = {
.name = "pll2_sysclk4",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll2_sysclk5 = {
+static struct davinci_clk pll2_sysclk5 = {
.name = "pll2_sysclk5",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll2_sysclk6 = {
+static struct davinci_clk pll2_sysclk6 = {
.name = "pll2_sysclk6",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll2_sysclk7 = {
+static struct davinci_clk pll2_sysclk7 = {
.name = "pll2_sysclk7",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV7,
};
-static struct clk pll2_sysclk8 = {
+static struct davinci_clk pll2_sysclk8 = {
.name = "pll2_sysclk8",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV8,
};
-static struct clk pll2_sysclk9 = {
+static struct davinci_clk pll2_sysclk9 = {
.name = "pll2_sysclk9",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV9,
};
-static struct clk vpss_dac_clk = {
+static struct davinci_clk vpss_dac_clk = {
.name = "vpss_dac",
.parent = &pll1_sysclk3,
.lpsc = DM365_LPSC_DAC_CLK,
};
-static struct clk vpss_master_clk = {
+static struct davinci_clk vpss_master_clk = {
.name = "vpss_master",
.parent = &pll1_sysclk5,
.lpsc = DM365_LPSC_VPSSMSTR,
.flags = CLK_PSC,
};
-static struct clk vpss_slave_clk = {
+static struct davinci_clk vpss_slave_clk = {
.name = "vpss_slave",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm_clk",
.parent = &pll2_sysclk2,
.lpsc = DAVINCI_LPSC_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_UART1,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "i2c",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_I2C,
};
-static struct clk mmcsd0_clk = {
+static struct davinci_clk mmcsd0_clk = {
.name = "mmcsd0",
.parent = &pll1_sysclk8,
.lpsc = DAVINCI_LPSC_MMC_SD,
};
-static struct clk mmcsd1_clk = {
+static struct davinci_clk mmcsd1_clk = {
.name = "mmcsd1",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_MMC_SD1,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_SPI,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_SPI1,
};
-static struct clk spi2_clk = {
+static struct davinci_clk spi2_clk = {
.name = "spi2",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_SPI2,
};
-static struct clk spi3_clk = {
+static struct davinci_clk spi3_clk = {
.name = "spi3",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_SPI3,
};
-static struct clk spi4_clk = {
+static struct davinci_clk spi4_clk = {
.name = "spi4",
.parent = &pll1_aux_clk,
.lpsc = DM365_LPSC_SPI4,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_GPIO,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_AEMIF,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM0,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM2,
};
-static struct clk pwm3_clk = {
+static struct davinci_clk pwm3_clk = {
.name = "pwm3",
.parent = &ref_clk,
.lpsc = DM365_LPSC_PWM3,
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER2,
.usecount = 1,
};
-static struct clk timer3_clk = {
+static struct davinci_clk timer3_clk = {
.name = "timer3",
.parent = &pll1_aux_clk,
.lpsc = DM365_LPSC_TIMER3,
};
-static struct clk usb_clk = {
+static struct davinci_clk usb_clk = {
.name = "usb",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_USB,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_EMAC,
};
-static struct clk voicecodec_clk = {
+static struct davinci_clk voicecodec_clk = {
.name = "voice_codec",
.parent = &pll2_sysclk4,
.lpsc = DM365_LPSC_VOICE_CODEC,
};
-static struct clk asp0_clk = {
+static struct davinci_clk asp0_clk = {
.name = "asp0",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_McBSP1,
};
-static struct clk rto_clk = {
+static struct davinci_clk rto_clk = {
.name = "rto",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_RTO,
};
-static struct clk mjcp_clk = {
+static struct davinci_clk mjcp_clk = {
.name = "mjcp",
.parent = &pll1_sysclk3,
.lpsc = DM365_LPSC_MJCP,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 5d5f70d..64989aa 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -53,88 +53,88 @@ static struct pll_data pll2_data = {
.phys_base = DAVINCI_PLL2_BASE,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DM644X_REF_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.pll_data = &pll1_data,
.flags = CLK_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk5 = {
+static struct davinci_clk pll1_sysclk5 = {
.name = "pll1_sysclk5",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2",
.parent = &ref_clk,
.pll_data = &pll2_data,
.flags = CLK_PLL,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll2_sysclk2 = {
+static struct davinci_clk pll2_sysclk2 = {
.name = "pll2_sysclk2",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll2_sysclkbp = {
+static struct davinci_clk pll2_sysclkbp = {
.name = "pll2_sysclkbp",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk dsp_clk = {
+static struct davinci_clk dsp_clk = {
.name = "dsp",
.parent = &pll1_sysclk1,
.lpsc = DAVINCI_LPSC_GEM,
@@ -142,14 +142,14 @@ static struct clk dsp_clk = {
.usecount = 1, /* REVISIT how to disable? */
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk vicp_clk = {
+static struct davinci_clk vicp_clk = {
.name = "vicp",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_IMCOP,
@@ -157,128 +157,128 @@ static struct clk vicp_clk = {
.usecount = 1, /* REVISIT how to disable? */
};
-static struct clk vpss_master_clk = {
+static struct davinci_clk vpss_master_clk = {
.name = "vpss_master",
.parent = &pll1_sysclk3,
.lpsc = DAVINCI_LPSC_VPSSMSTR,
.flags = CLK_PSC,
};
-static struct clk vpss_slave_clk = {
+static struct davinci_clk vpss_slave_clk = {
.name = "vpss_slave",
.parent = &pll1_sysclk3,
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART2,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "i2c",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_I2C,
};
-static struct clk ide_clk = {
+static struct davinci_clk ide_clk = {
.name = "ide",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_ATA,
};
-static struct clk asp_clk = {
+static struct davinci_clk asp_clk = {
.name = "asp0",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_McBSP,
};
-static struct clk mmcsd_clk = {
+static struct davinci_clk mmcsd_clk = {
.name = "mmcsd",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_MMC_SD,
};
-static struct clk spi_clk = {
+static struct davinci_clk spi_clk = {
.name = "spi",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_SPI,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_GPIO,
};
-static struct clk usb_clk = {
+static struct davinci_clk usb_clk = {
.name = "usb",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_USB,
};
-static struct clk vlynq_clk = {
+static struct davinci_clk vlynq_clk = {
.name = "vlynq",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_VLYNQ,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_AEMIF,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM0,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM2,
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER2,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 9b09e5d..a494cba 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -63,258 +63,258 @@ static struct pll_data pll2_data = {
.phys_base = DAVINCI_PLL2_BASE,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DM646X_REF_FREQ,
.set_rate = davinci_simple_set_rate,
};
-static struct clk aux_clkin = {
+static struct davinci_clk aux_clkin = {
.name = "aux_clkin",
.rate = DM646X_AUX_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.pll_data = &pll1_data,
.flags = CLK_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk4 = {
+static struct davinci_clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll1_sysclk5 = {
+static struct davinci_clk pll1_sysclk5 = {
.name = "pll1_sysclk5",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll1_sysclk6 = {
+static struct davinci_clk pll1_sysclk6 = {
.name = "pll1_sysclk6",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll1_sysclk8 = {
+static struct davinci_clk pll1_sysclk8 = {
.name = "pll1_sysclk8",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV8,
};
-static struct clk pll1_sysclk9 = {
+static struct davinci_clk pll1_sysclk9 = {
.name = "pll1_sysclk9",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV9,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2_clk",
.parent = &ref_clk,
.pll_data = &pll2_data,
.flags = CLK_PLL,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk dsp_clk = {
+static struct davinci_clk dsp_clk = {
.name = "dsp",
.parent = &pll1_sysclk1,
.lpsc = DM646X_LPSC_C64X_CPU,
.usecount = 1, /* REVISIT how to disable? */
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_cc_clk = {
+static struct davinci_clk edma_cc_clk = {
.name = "edma_cc",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPCC,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc0_clk = {
+static struct davinci_clk edma_tc0_clk = {
.name = "edma_tc0",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC0,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc1_clk = {
+static struct davinci_clk edma_tc1_clk = {
.name = "edma_tc1",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC1,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc2_clk = {
+static struct davinci_clk edma_tc2_clk = {
.name = "edma_tc2",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC2,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc3_clk = {
+static struct davinci_clk edma_tc3_clk = {
.name = "edma_tc3",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC3,
.flags = ALWAYS_ENABLED,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &aux_clkin,
.lpsc = DM646X_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &aux_clkin,
.lpsc = DM646X_LPSC_UART1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &aux_clkin,
.lpsc = DM646X_LPSC_UART2,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "I2CCLK",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_I2C,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_GPIO,
};
-static struct clk mcasp0_clk = {
+static struct davinci_clk mcasp0_clk = {
.name = "mcasp0",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_McASP0,
};
-static struct clk mcasp1_clk = {
+static struct davinci_clk mcasp1_clk = {
.name = "mcasp1",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_McASP1,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_AEMIF,
.flags = ALWAYS_ENABLED,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_EMAC,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_PWM0,
.usecount = 1, /* REVIST: disabling hangs system */
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_PWM1,
.usecount = 1, /* REVIST: disabling hangs system */
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_sysclk3,
.flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */
};
-static struct clk ide_clk = {
+static struct davinci_clk ide_clk = {
.name = "ide",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_ATA,
};
-static struct clk vpif0_clk = {
+static struct davinci_clk vpif0_clk = {
.name = "vpif0",
.parent = &ref_clk,
.lpsc = DM646X_LPSC_VPSSMSTR,
.flags = ALWAYS_ENABLED,
};
-static struct clk vpif1_clk = {
+static struct davinci_clk vpif1_clk = {
.name = "vpif1",
.parent = &ref_clk,
.lpsc = DM646X_LPSC_VPSSSLV,
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h
index 3e8af6a..42ed4f2 100644
--- a/arch/arm/mach-davinci/include/mach/clock.h
+++ b/arch/arm/mach-davinci/include/mach/clock.h
@@ -15,9 +15,6 @@
struct clk;
-extern int clk_register(struct clk *clk);
-extern void clk_unregister(struct clk *clk);
-
int davinci_clk_reset_assert(struct clk *c);
int davinci_clk_reset_deassert(struct clk *c);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index 2630efa9e..007b51f 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -22,7 +22,7 @@
#define DA8XX_USB0_BASE 0x01e00000
#define DA8XX_USB1_BASE 0x01e25000
-static struct clk *usb20_clk;
+static struct davinci_clk *usb20_clk;
static struct platform_device da8xx_usb_phy = {
.name = "da8xx-usb-phy",
@@ -127,7 +127,7 @@ int __init da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata)
return platform_device_register(&da8xx_usb11_device);
}
-static struct clk usb_refclkin = {
+static struct davinci_clk usb_refclkin = {
.name = "usb_refclkin",
.set_rate = davinci_simple_set_rate,
};
@@ -146,16 +146,16 @@ int __init da8xx_register_usb_refclkin(int rate)
int ret;
usb_refclkin.rate = rate;
- ret = clk_register(&usb_refclkin);
+ ret = davinci_clk_register(&usb_refclkin);
if (ret)
return ret;
- clk_register_clkdev(&usb_refclkin, "usb_refclkin", NULL);
+ clk_register_clkdev(usb_refclkin.hw.clk, "usb_refclkin", NULL);
return 0;
}
-static void usb20_phy_clk_enable(struct clk *clk)
+static void usb20_phy_clk_enable(struct davinci_clk *clk)
{
u32 val;
u32 timeout = 500000; /* 500 msec */
@@ -186,7 +186,7 @@ static void usb20_phy_clk_enable(struct clk *clk)
davinci_clk_disable(usb20_clk);
}
-static void usb20_phy_clk_disable(struct clk *clk)
+static void usb20_phy_clk_disable(struct davinci_clk *clk)
{
u32 val;
@@ -195,7 +195,8 @@ static void usb20_phy_clk_disable(struct clk *clk)
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
}
-static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+static int usb20_phy_clk_set_parent(struct davinci_clk *clk,
+ struct davinci_clk *parent)
{
u32 val;
@@ -213,7 +214,7 @@ static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
/* reference frequency also comes from parent clock */
val &= ~CFGCHIP2_REFFREQ_MASK;
- switch (clk_get_rate(parent)) {
+ switch (parent->rate) {
case 12000000:
val |= CFGCHIP2_REFFREQ_12MHZ;
break;
@@ -251,7 +252,7 @@ static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static struct clk usb20_phy_clk = {
+static struct davinci_clk usb20_phy_clk = {
.name = "usb20_phy",
.clk_enable = usb20_phy_clk_enable,
.clk_disable = usb20_phy_clk_disable,
@@ -266,32 +267,36 @@ static struct clk usb20_phy_clk = {
*/
int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
{
- struct clk *parent;
+ struct clk *clk, *parent;
int ret;
- usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
- ret = PTR_ERR_OR_ZERO(usb20_clk);
+ clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
+ ret = PTR_ERR_OR_ZERO(clk);
if (ret)
return ret;
parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux");
ret = PTR_ERR_OR_ZERO(parent);
if (ret) {
- clk_put(usb20_clk);
+ clk_put(clk);
return ret;
}
- usb20_phy_clk.parent = parent;
- ret = clk_register(&usb20_phy_clk);
+ usb20_clk = to_davinci_clk(__clk_get_hw(clk));
+
+ usb20_phy_clk.parent = to_davinci_clk(__clk_get_hw(parent));
+ ret = davinci_clk_register(&usb20_phy_clk);
if (!ret)
- clk_register_clkdev(&usb20_phy_clk, "usb20_phy", "da8xx-usb-phy");
+ clk_register_clkdev(usb20_phy_clk.hw.clk, "usb20_phy",
+ "da8xx-usb-phy");
clk_put(parent);
return ret;
}
-static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+static int usb11_phy_clk_set_parent(struct davinci_clk *clk,
+ struct davinci_clk *parent)
{
u32 val;
@@ -312,7 +317,7 @@ static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static struct clk usb11_phy_clk = {
+static struct davinci_clk usb11_phy_clk = {
.name = "usb11_phy",
.set_parent = usb11_phy_clk_set_parent,
};
@@ -335,10 +340,11 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
if (IS_ERR(parent))
return PTR_ERR(parent);
- usb11_phy_clk.parent = parent;
- ret = clk_register(&usb11_phy_clk);
+ usb11_phy_clk.parent = to_davinci_clk(__clk_get_hw(parent));
+ ret = davinci_clk_register(&usb11_phy_clk);
if (!ret)
- clk_register_clkdev(&usb11_phy_clk, "usb11_phy", "da8xx-usb-phy");
+ clk_register_clkdev(usb11_phy_clk.hw.clk, "usb11_phy",
+ "da8xx-usb-phy");
clk_put(parent);
--
2.7.4
^ permalink raw reply related
* [PATCH v1 4/6] ARM: davinci: make davinci_clk_reset() static
From: David Lechner @ 2017-12-02 2:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512182054-17410-1-git-send-email-david@lechnology.com>
This makes davinci_clk_reset() static. It is not used anywhere else.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/mach-davinci/clock.c | 3 +--
arch/arm/mach-davinci/clock.h | 1 -
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 5f0a31d..c149b24 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -59,7 +59,7 @@ void davinci_clk_disable(struct clk *clk)
davinci_clk_disable(clk->parent);
}
-int davinci_clk_reset(struct clk *clk, bool reset)
+static int davinci_clk_reset(struct clk *clk, bool reset)
{
unsigned long flags;
@@ -73,7 +73,6 @@ int davinci_clk_reset(struct clk *clk, bool reset)
return 0;
}
-EXPORT_SYMBOL(davinci_clk_reset);
int davinci_clk_reset_assert(struct clk *clk)
{
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index e4afaa9..bf60cdf 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -124,7 +124,6 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
int davinci_set_refclk_rate(unsigned long rate);
int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
-int davinci_clk_reset(struct clk *clk, bool reset);
void davinci_clk_enable(struct clk *clk);
void davinci_clk_disable(struct clk *clk);
--
2.7.4
^ permalink raw reply related
* [PATCH v1 3/6] ARM: davinci: don't use static clk_lookup
From: David Lechner @ 2017-12-02 2:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512182054-17410-1-git-send-email-david@lechnology.com>
In preparation of moving to the common clock framework, usage of static
struct clk_lookup is removed. The common clock framework uses an opaque
struct clk, so we won't be able to use static tables as was previously
done.
Each CPU family is given a new CPU-specific init_time function that
registers the clocks individually via function calls instead of using
a clk_lookup table.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/mach-davinci/board-da830-evm.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 4 +-
arch/arm/mach-davinci/board-mityomapl138.c | 2 +-
arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 2 +-
arch/arm/mach-davinci/board-sffsdr.c | 2 +-
arch/arm/mach-davinci/clock.c | 75 +++++++--------
arch/arm/mach-davinci/clock.h | 9 +-
arch/arm/mach-davinci/da830.c | 115 ++++++++++++-----------
arch/arm/mach-davinci/da850.c | 137 ++++++++++++++--------------
arch/arm/mach-davinci/da8xx-dt.c | 2 +-
arch/arm/mach-davinci/davinci.h | 4 +
arch/arm/mach-davinci/devices-da8xx.c | 5 +-
arch/arm/mach-davinci/dm355.c | 97 ++++++++++----------
arch/arm/mach-davinci/dm365.c | 127 +++++++++++++-------------
arch/arm/mach-davinci/dm644x.c | 89 +++++++++---------
arch/arm/mach-davinci/dm646x.c | 99 +++++++++++---------
arch/arm/mach-davinci/include/mach/common.h | 1 -
arch/arm/mach-davinci/include/mach/da8xx.h | 3 +
arch/arm/mach-davinci/time.c | 8 --
arch/arm/mach-davinci/usb-da8xx.c | 15 +--
26 files changed, 407 insertions(+), 403 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index db656d4..524049a 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -633,7 +633,7 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
.atag_offset = 0x100,
.map_io = da830_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da830_init_time,
.init_machine = da830_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 7333ade..f766823 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1476,7 +1476,7 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
.atag_offset = 0x100,
.map_io = da850_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = da850_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index da462e7..ef27f55 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -411,7 +411,7 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
.atag_offset = 0x100,
.map_io = dm355_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm355_init_time,
.init_machine = dm355_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 21fd713..e705a6e 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -266,7 +266,7 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
.atag_offset = 0x100,
.map_io = dm355_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm355_init_time,
.init_machine = dm355_leopard_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 4ec759b..4232c09 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -769,7 +769,7 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.atag_offset = 0x100,
.map_io = dm365_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm365_init_time,
.init_machine = dm365_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 8f6e9ea..2f6c0c4 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -811,7 +811,7 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
.atag_offset = 0x100,
.map_io = dm644x_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm644x_init_time,
.init_machine = davinci_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index f0e2762..de28f75 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -787,7 +787,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
.atag_offset = 0x100,
.map_io = dm646x_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm646x_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
@@ -798,7 +798,7 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
.atag_offset = 0x100,
.map_io = dm646x_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm646x_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 9ea2628..d178932 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -565,7 +565,7 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
.atag_offset = 0x100,
.map_io = da850_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = mityomapl138_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 6f4e7dc..bd01108 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -222,7 +222,7 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
.atag_offset = 0x100,
.map_io = dm644x_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm644x_init_time,
.init_machine = davinci_ntosd2_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 0fdb7b7..c1af201 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -329,7 +329,7 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
.atag_offset = 0x100,
.map_io = da850_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = omapl138_hawk_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 3c1059a..8e659e1 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -145,7 +145,7 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
.atag_offset = 0x100,
.map_io = dm644x_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm644x_init_time,
.init_machine = davinci_sffsdr_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index f77a4f7..5f0a31d 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -607,62 +607,51 @@ int davinci_set_refclk_rate(unsigned long rate)
return 0;
}
-int __init davinci_clk_init(struct clk_lookup *clocks)
+void __init davinci_clk_init(struct clk *clk, const char *con_id,
+ const char *dev_id)
{
- struct clk_lookup *c;
- struct clk *clk;
- size_t num_clocks = 0;
-
- for (c = clocks; c->clk; c++) {
- clk = c->clk;
+ if (!clk->recalc) {
- if (!clk->recalc) {
+ /* Check if clock is a PLL */
+ if (clk->pll_data)
+ clk->recalc = clk_pllclk_recalc;
- /* Check if clock is a PLL */
- if (clk->pll_data)
- clk->recalc = clk_pllclk_recalc;
+ /* Else, if it is a PLL-derived clock */
+ else if (clk->flags & CLK_PLL)
+ clk->recalc = clk_sysclk_recalc;
- /* Else, if it is a PLL-derived clock */
- else if (clk->flags & CLK_PLL)
- clk->recalc = clk_sysclk_recalc;
-
- /* Otherwise, it is a leaf clock (PSC clock) */
- else if (clk->parent)
- clk->recalc = clk_leafclk_recalc;
- }
+ /* Otherwise, it is a leaf clock (PSC clock) */
+ else if (clk->parent)
+ clk->recalc = clk_leafclk_recalc;
+ }
- if (clk->pll_data) {
- struct pll_data *pll = clk->pll_data;
+ if (clk->pll_data) {
+ struct pll_data *pll = clk->pll_data;
- if (!pll->div_ratio_mask)
- pll->div_ratio_mask = PLLDIV_RATIO_MASK;
+ if (!pll->div_ratio_mask)
+ pll->div_ratio_mask = PLLDIV_RATIO_MASK;
- if (pll->phys_base && !pll->base) {
- pll->base = ioremap(pll->phys_base, SZ_4K);
- WARN_ON(!pll->base);
- }
+ if (pll->phys_base && !pll->base) {
+ pll->base = ioremap(pll->phys_base, SZ_4K);
+ WARN_ON(!pll->base);
}
+ }
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
-
- if (clk->lpsc)
- clk->flags |= CLK_PSC;
-
- if (clk->flags & PSC_LRST)
- clk->reset = davinci_clk_reset;
+ if (clk->recalc)
+ clk->rate = clk->recalc(clk);
- clk_register(clk);
- num_clocks++;
+ if (clk->lpsc)
+ clk->flags |= CLK_PSC;
- /* Turn on clocks that Linux doesn't otherwise manage */
- if (clk->flags & ALWAYS_ENABLED)
- clk_enable(clk);
- }
+ if (clk->flags & PSC_LRST)
+ clk->reset = davinci_clk_reset;
- clkdev_add_table(clocks, num_clocks);
+ clk_register(clk);
+ clk_register_clkdev(clk, con_id, dev_id);
- return 0;
+ /* Turn on clocks that Linux doesn't otherwise manage */
+ if (clk->flags & ALWAYS_ENABLED)
+ clk_enable(clk);
}
#ifdef CONFIG_DEBUG_FS
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index fa2b837..e4afaa9 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -118,14 +118,7 @@ struct clk {
#define PSC_FORCE BIT(6) /* Force module state transtition */
#define PSC_LRST BIT(8) /* Use local reset on enable/disable */
-#define CLK(dev, con, ck) \
- { \
- .dev_id = dev, \
- .con_id = con, \
- .clk = ck, \
- } \
-
-int davinci_clk_init(struct clk_lookup *clocks);
+void davinci_clk_init(struct clk *clk, const char *con_id, const char *dev_id);
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
unsigned int mult, unsigned int postdiv);
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index f28eda1..7771161 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -378,60 +378,60 @@ static struct clk rmii_clk = {
.parent = &pll0_sysclk7,
};
-static struct clk_lookup da830_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("davinci-wdt", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "scr0_ss", &scr0_ss_clk),
- CLK(NULL, "scr1_ss", &scr1_ss_clk),
- CLK(NULL, "scr2_ss", &scr2_ss_clk),
- CLK(NULL, "dmax", &dmax_clk),
- CLK(NULL, "tpcc", &tpcc_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK("da830-mmc.0", NULL, &mmcsd_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK(NULL, "ecap0", &ecap0_clk),
- CLK(NULL, "ecap1", &ecap1_clk),
- CLK(NULL, "ecap2", &ecap2_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK("eqep.0", NULL, &eqep0_clk),
- CLK("eqep.1", NULL, &eqep1_clk),
- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
- CLK("musb-da8xx", "usb20", &usb20_clk),
- CLK("cppi41-dmaengine", NULL, &cppi41_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "secu_mgr", &secu_mgr_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK("ohci-da8xx", "usb11", &usb11_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void da830_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll0_clk, "pll0", NULL);
+ davinci_clk_init(&pll0_aux_clk, "pll0_aux", NULL);
+ davinci_clk_init(&pll0_sysclk2, "pll0_sysclk2", NULL);
+ davinci_clk_init(&pll0_sysclk3, "pll0_sysclk3", NULL);
+ davinci_clk_init(&pll0_sysclk4, "pll0_sysclk4", NULL);
+ davinci_clk_init(&pll0_sysclk5, "pll0_sysclk5", NULL);
+ davinci_clk_init(&pll0_sysclk6, "pll0_sysclk6", NULL);
+ davinci_clk_init(&pll0_sysclk7, "pll0_sysclk7", NULL);
+ davinci_clk_init(&i2c0_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&timerp64_0_clk, "timer0", NULL);
+ davinci_clk_init(&timerp64_1_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&arm_rom_clk, "arm_rom", NULL);
+ davinci_clk_init(&scr0_ss_clk, "scr0_ss", NULL);
+ davinci_clk_init(&scr1_ss_clk, "scr1_ss", NULL);
+ davinci_clk_init(&scr2_ss_clk, "scr2_ss", NULL);
+ davinci_clk_init(&dmax_clk, "dmax", NULL);
+ davinci_clk_init(&tpcc_clk, "tpcc", NULL);
+ davinci_clk_init(&tptc0_clk, "tptc0", NULL);
+ davinci_clk_init(&tptc1_clk, "tptc1", NULL);
+ davinci_clk_init(&mmcsd_clk, NULL, "da830-mmc.0");
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&ecap0_clk, "ecap0", NULL);
+ davinci_clk_init(&ecap1_clk, "ecap1", NULL);
+ davinci_clk_init(&ecap2_clk, "ecap2", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&eqep0_clk, NULL, "eqep.0");
+ davinci_clk_init(&eqep1_clk, NULL, "eqep.1");
+ davinci_clk_init(&lcdc_clk, "fck", "da8xx_lcdc.0");
+ davinci_clk_init(&mcasp0_clk, NULL, "davinci-mcasp.0");
+ davinci_clk_init(&mcasp1_clk, NULL, "davinci-mcasp.1");
+ davinci_clk_init(&mcasp2_clk, NULL, "davinci-mcasp.2");
+ davinci_clk_init(&usb20_clk, "usb20", "musb-da8xx");
+ davinci_clk_init(&cppi41_clk, NULL, "cppi41-dmaengine");
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&aintc_clk, "aintc", NULL);
+ davinci_clk_init(&secu_mgr_clk, "secu_mgr", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&i2c1_clk, NULL, "i2c_davinci.2");
+ davinci_clk_init(&usb11_clk, "usb11", "ohci-da8xx");
+ davinci_clk_init(&emif3_clk, "emif3", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&rmii_clk, "rmii", NULL);
+}
/*
* Device specific mux setup
@@ -1200,7 +1200,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
.ids = da830_ids,
.ids_num = ARRAY_SIZE(da830_ids),
- .cpu_clks = da830_clks,
.psc_bases = da830_psc_bases,
.psc_bases_num = ARRAY_SIZE(da830_psc_bases),
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
@@ -1221,3 +1220,9 @@ void __init da830_map_io(void)
da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
}
+
+void __init da830_init_time(void)
+{
+ da830_clk_init();
+ davinci_timer_init();
+}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 28d8ec2..a7484e6 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -518,71 +518,71 @@ static struct clk ecap2_clk = {
.parent = &ecap_clk,
};
-static struct clk_lookup da850_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk1", &pll0_sysclk1),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "async3", &async3_clk),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("davinci-wdt", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "tpcc0", &tpcc0_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK(NULL, "tpcc1", &tpcc1_clk),
- CLK(NULL, "tptc2", &tptc2_clk),
- CLK("pruss_uio", "pruss", &pruss_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &mdio_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp_clk),
- CLK("davinci-mcbsp.0", NULL, &mcbsp0_clk),
- CLK("davinci-mcbsp.1", NULL, &mcbsp1_clk),
- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
- CLK("da830-mmc.0", NULL, &mmcsd0_clk),
- CLK("da830-mmc.1", NULL, &mmcsd1_clk),
- CLK("ti-aemif", NULL, &aemif_clk),
- CLK("davinci-nand.0", "aemif", &aemif_nand_clk),
- CLK("ohci-da8xx", "usb11", &usb11_clk),
- CLK("musb-da8xx", "usb20", &usb20_clk),
- CLK("cppi41-dmaengine", NULL, &cppi41_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("vpif", NULL, &vpif_clk),
- CLK("ahci_da850", "fck", &sata_clk),
- CLK("davinci-rproc.0", NULL, &dsp_clk),
- CLK(NULL, NULL, &ehrpwm_clk),
- CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
- CLK("ehrpwm.1", "fck", &ehrpwm1_clk),
- CLK(NULL, NULL, &ehrpwm_tbclk),
- CLK("ehrpwm.0", "tbclk", &ehrpwm0_tbclk),
- CLK("ehrpwm.1", "tbclk", &ehrpwm1_tbclk),
- CLK(NULL, NULL, &ecap_clk),
- CLK("ecap.0", "fck", &ecap0_clk),
- CLK("ecap.1", "fck", &ecap1_clk),
- CLK("ecap.2", "fck", &ecap2_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void da850_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll0_clk, "pll0", NULL);
+ davinci_clk_init(&pll0_aux_clk, "pll0_aux", NULL);
+ davinci_clk_init(&pll0_sysclk1, "pll0_sysclk1", NULL);
+ davinci_clk_init(&pll0_sysclk2, "pll0_sysclk2", NULL);
+ davinci_clk_init(&pll0_sysclk3, "pll0_sysclk3", NULL);
+ davinci_clk_init(&pll0_sysclk4, "pll0_sysclk4", NULL);
+ davinci_clk_init(&pll0_sysclk5, "pll0_sysclk5", NULL);
+ davinci_clk_init(&pll0_sysclk6, "pll0_sysclk6", NULL);
+ davinci_clk_init(&pll0_sysclk7, "pll0_sysclk7", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&async3_clk, "async3", NULL);
+ davinci_clk_init(&i2c0_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&timerp64_0_clk, "timer0", NULL);
+ davinci_clk_init(&timerp64_1_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&arm_rom_clk, "arm_rom", NULL);
+ davinci_clk_init(&tpcc0_clk, "tpcc0", NULL);
+ davinci_clk_init(&tptc0_clk, "tptc0", NULL);
+ davinci_clk_init(&tptc1_clk, "tptc1", NULL);
+ davinci_clk_init(&tpcc1_clk, "tpcc1", NULL);
+ davinci_clk_init(&tptc2_clk, "tptc2", NULL);
+ davinci_clk_init(&pruss_clk, "pruss", "pruss_uio");
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&aintc_clk, "aintc", NULL);
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&i2c1_clk, NULL, "i2c_davinci.2");
+ davinci_clk_init(&emif3_clk, "emif3", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&rmii_clk, "rmii", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&mdio_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&mcasp_clk, NULL, "davinci-mcasp.0");
+ davinci_clk_init(&mcbsp0_clk, NULL, "davinci-mcbsp.0");
+ davinci_clk_init(&mcbsp1_clk, NULL, "davinci-mcbsp.1");
+ davinci_clk_init(&lcdc_clk, "fck", "da8xx_lcdc.0");
+ davinci_clk_init(&mmcsd0_clk, NULL, "da830-mmc.0");
+ davinci_clk_init(&mmcsd1_clk, NULL, "da830-mmc.1");
+ davinci_clk_init(&aemif_clk, NULL, "ti-aemif");
+ davinci_clk_init(&aemif_nand_clk, "aemif", "davinci-nand.0");
+ davinci_clk_init(&usb11_clk, "usb11", "ohci-da8xx");
+ davinci_clk_init(&usb20_clk, "usb20", "musb-da8xx");
+ davinci_clk_init(&cppi41_clk, NULL, "cppi41-dmaengine");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&vpif_clk, NULL, "vpif");
+ davinci_clk_init(&sata_clk, "fck", "ahci_da850");
+ davinci_clk_init(&dsp_clk, NULL, "davinci-rproc.0");
+ davinci_clk_init(&ehrpwm_clk, NULL, NULL);
+ davinci_clk_init(&ehrpwm0_clk, "fck", "ehrpwm.0");
+ davinci_clk_init(&ehrpwm1_clk, "fck", "ehrpwm.1");
+ davinci_clk_init(&ehrpwm_tbclk, NULL, NULL);
+ davinci_clk_init(&ehrpwm0_tbclk, "tbclk", "ehrpwm.0");
+ davinci_clk_init(&ehrpwm1_tbclk, "tbclk", "ehrpwm.1");
+ davinci_clk_init(&ecap_clk, NULL, NULL);
+ davinci_clk_init(&ecap0_clk, "fck", "ecap.0");
+ davinci_clk_init(&ecap1_clk, "fck", "ecap.1");
+ davinci_clk_init(&ecap2_clk, "fck", "ecap.2");
+}
/*
* Device specific mux setup
@@ -1353,7 +1353,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
.ids = da850_ids,
.ids_num = ARRAY_SIZE(da850_ids),
- .cpu_clks = da850_clks,
.psc_bases = da850_psc_bases,
.psc_bases_num = ARRAY_SIZE(da850_psc_bases),
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
@@ -1393,3 +1392,9 @@ void __init da850_map_io(void)
v &= ~CFGCHIP3_PLL1_MASTER_LOCK;
__raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
}
+
+void __init da850_init_time(void)
+{
+ da850_clk_init();
+ davinci_timer_init();
+}
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 92c7c34..1a09215 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -96,7 +96,7 @@ static const char *const da850_boards_compat[] __initconst = {
DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
.map_io = da850_map_io,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = da850_init_machine,
.dt_compat = da850_boards_compat,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index d550717..ce67a65 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -83,6 +83,7 @@ int davinci_init_wdt(void);
/* DM355 function declarations */
void dm355_map_io(void);
+void dm355_init_time(void);
void dm355_init_spi0(unsigned chipselect_mask,
const struct spi_board_info *info, unsigned len);
void dm355_init_asp1(u32 evt_enable);
@@ -91,6 +92,7 @@ int dm355_gpio_register(void);
/* DM365 function declarations */
void dm365_map_io(void);
+void dm365_init_time(void);
void dm365_init_asp(void);
void dm365_init_vc(void);
void dm365_init_ks(struct davinci_ks_platform_data *pdata);
@@ -102,12 +104,14 @@ int dm365_gpio_register(void);
/* DM644x function declarations */
void dm644x_map_io(void);
+void dm644x_init_time(void);
void dm644x_init_asp(void);
int dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
int dm644x_gpio_register(void);
/* DM646x function declarations */
void dm646x_map_io(void);
+void dm646x_init_time(void);
void dm646x_init_mcasp0(struct snd_platform_data *pdata);
void dm646x_init_mcasp1(struct snd_platform_data *pdata);
int dm646x_init_edma(struct edma_rsv_info *rsv);
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 22440c0..cc497f4 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -1059,9 +1059,6 @@ static struct clk sata_refclk = {
.set_rate = davinci_simple_set_rate,
};
-static struct clk_lookup sata_refclk_lookup =
- CLK("ahci_da850", "refclk", &sata_refclk);
-
int __init da850_register_sata_refclk(int rate)
{
int ret;
@@ -1071,7 +1068,7 @@ int __init da850_register_sata_refclk(int rate)
if (ret)
return ret;
- clkdev_add(&sata_refclk_lookup);
+ clk_register_clkdev(&sata_refclk, "refclk", "ahci_da850");
return 0;
}
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 164ff27..555b99d 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -337,51 +337,51 @@ static struct clk usb_clk = {
.lpsc = DAVINCI_LPSC_USB,
};
-static struct clk_lookup dm355_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "vpss_dac", &vpss_dac_clk),
- CLK("vpss", "master", &vpss_master_clk),
- CLK("vpss", "slave", &vpss_slave_clk),
- CLK(NULL, "clkout1", &clkout1_clk),
- CLK(NULL, "clkout2", &clkout2_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
- CLK(NULL, "clkout3", &clkout3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "mjcp", &mjcp_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("davinci-mcbsp.0", NULL, &asp0_clk),
- CLK("davinci-mcbsp.1", NULL, &asp1_clk),
- CLK("dm6441-mmc.0", NULL, &mmcsd0_clk),
- CLK("dm6441-mmc.1", NULL, &mmcsd1_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("spi_davinci.2", NULL, &spi2_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "pwm3", &pwm3_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK(NULL, "timer3", &timer3_clk),
- CLK(NULL, "rto", &rto_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm355_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk1", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&pll1_sysclk4, "pll1_sysclk4", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclkbp", NULL);
+ davinci_clk_init(&vpss_dac_clk, "vpss_dac", NULL);
+ davinci_clk_init(&vpss_master_clk, "master", "vpss");
+ davinci_clk_init(&vpss_slave_clk, "slave", "vpss");
+ davinci_clk_init(&clkout1_clk, "clkout1", NULL);
+ davinci_clk_init(&clkout2_clk, "clkout2", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&pll2_sysclkbp, "pll2_sysclkbp", NULL);
+ davinci_clk_init(&clkout3_clk, "clkout3", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&mjcp_clk, "mjcp", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&asp0_clk, NULL, "davinci-mcbsp.0");
+ davinci_clk_init(&asp1_clk, NULL, "davinci-mcbsp.1");
+ davinci_clk_init(&mmcsd0_clk, NULL, "dm6441-mmc.0");
+ davinci_clk_init(&mmcsd1_clk, NULL, "dm6441-mmc.1");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&spi2_clk, NULL, "spi_davinci.2");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&pwm3_clk, "pwm3", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&timer3_clk, "timer3", NULL);
+ davinci_clk_init(&rto_clk, "rto", NULL);
+ davinci_clk_init(&usb_clk, "usb", NULL);
+}
/*----------------------------------------------------------------------*/
@@ -1012,7 +1012,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
.jtag_id_reg = 0x01c40028,
.ids = dm355_ids,
.ids_num = ARRAY_SIZE(dm355_ids),
- .cpu_clks = dm355_clks,
.psc_bases = dm355_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm355_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -1045,6 +1044,12 @@ void __init dm355_map_io(void)
davinci_map_sysmod();
}
+void __init dm355_init_time(void)
+{
+ dm355_clk_init();
+ davinci_timer_init();
+}
+
int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
struct vpbe_config *vpbe_cfg)
{
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6076085..44bbfae 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -425,66 +425,66 @@ static struct clk mjcp_clk = {
.lpsc = DM365_LPSC_MJCP,
};
-static struct clk_lookup dm365_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "clkout0", &clkout0_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
- CLK(NULL, "pll1_sysclk8", &pll1_sysclk8),
- CLK(NULL, "pll1_sysclk9", &pll1_sysclk9),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_aux", &pll2_aux_clk),
- CLK(NULL, "clkout1", &clkout1_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
- CLK(NULL, "pll2_sysclk3", &pll2_sysclk3),
- CLK(NULL, "pll2_sysclk4", &pll2_sysclk4),
- CLK(NULL, "pll2_sysclk5", &pll2_sysclk5),
- CLK(NULL, "pll2_sysclk6", &pll2_sysclk6),
- CLK(NULL, "pll2_sysclk7", &pll2_sysclk7),
- CLK(NULL, "pll2_sysclk8", &pll2_sysclk8),
- CLK(NULL, "pll2_sysclk9", &pll2_sysclk9),
- CLK(NULL, "vpss_dac", &vpss_dac_clk),
- CLK("vpss", "master", &vpss_master_clk),
- CLK("vpss", "slave", &vpss_slave_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("da830-mmc.0", NULL, &mmcsd0_clk),
- CLK("da830-mmc.1", NULL, &mmcsd1_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("spi_davinci.2", NULL, &spi2_clk),
- CLK("spi_davinci.3", NULL, &spi3_clk),
- CLK("spi_davinci.4", NULL, &spi4_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "pwm3", &pwm3_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK(NULL, "timer3", &timer3_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK("davinci_voicecodec", NULL, &voicecodec_clk),
- CLK("davinci-mcbsp", NULL, &asp0_clk),
- CLK(NULL, "rto", &rto_clk),
- CLK(NULL, "mjcp", &mjcp_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm365_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclkbp", NULL);
+ davinci_clk_init(&clkout0_clk, "clkout0", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk1", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&pll1_sysclk4, "pll1_sysclk4", NULL);
+ davinci_clk_init(&pll1_sysclk5, "pll1_sysclk5", NULL);
+ davinci_clk_init(&pll1_sysclk6, "pll1_sysclk6", NULL);
+ davinci_clk_init(&pll1_sysclk7, "pll1_sysclk7", NULL);
+ davinci_clk_init(&pll1_sysclk8, "pll1_sysclk8", NULL);
+ davinci_clk_init(&pll1_sysclk9, "pll1_sysclk9", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_aux_clk, "pll2_aux", NULL);
+ davinci_clk_init(&clkout1_clk, "clkout1", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&pll2_sysclk2, "pll2_sysclk2", NULL);
+ davinci_clk_init(&pll2_sysclk3, "pll2_sysclk3", NULL);
+ davinci_clk_init(&pll2_sysclk4, "pll2_sysclk4", NULL);
+ davinci_clk_init(&pll2_sysclk5, "pll2_sysclk5", NULL);
+ davinci_clk_init(&pll2_sysclk6, "pll2_sysclk6", NULL);
+ davinci_clk_init(&pll2_sysclk7, "pll2_sysclk7", NULL);
+ davinci_clk_init(&pll2_sysclk8, "pll2_sysclk8", NULL);
+ davinci_clk_init(&pll2_sysclk9, "pll2_sysclk9", NULL);
+ davinci_clk_init(&vpss_dac_clk, "vpss_dac", NULL);
+ davinci_clk_init(&vpss_master_clk, "master", "vpss");
+ davinci_clk_init(&vpss_slave_clk, "slave", "vpss");
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&mmcsd0_clk, NULL, "da830-mmc.0");
+ davinci_clk_init(&mmcsd1_clk, NULL, "da830-mmc.1");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&spi2_clk, NULL, "spi_davinci.2");
+ davinci_clk_init(&spi3_clk, NULL, "spi_davinci.3");
+ davinci_clk_init(&spi4_clk, NULL, "spi_davinci.4");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&pwm3_clk, "pwm3", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&timer3_clk, "timer3", NULL);
+ davinci_clk_init(&usb_clk, "usb", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&voicecodec_clk, NULL, "davinci_voicecodec");
+ davinci_clk_init(&asp0_clk, NULL, "davinci-mcbsp");
+ davinci_clk_init(&rto_clk, "rto", NULL);
+ davinci_clk_init(&mjcp_clk, "mjcp", NULL);
+}
/*----------------------------------------------------------------------*/
@@ -1114,7 +1114,6 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
.jtag_id_reg = 0x01c40028,
.ids = dm365_ids,
.ids_num = ARRAY_SIZE(dm365_ids),
- .cpu_clks = dm365_clks,
.psc_bases = dm365_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm365_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -1168,6 +1167,12 @@ void __init dm365_map_io(void)
davinci_map_sysmod();
}
+void __init dm365_init_time(void)
+{
+ dm365_clk_init();
+ davinci_timer_init();
+}
+
static struct resource dm365_vpss_resources[] = {
{
/* VPSS ISP5 Base address */
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index c5b1cf3..5d5f70d 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -285,47 +285,47 @@ static struct clk timer2_clk = {
.usecount = 1, /* REVISIT: why can't this be disabled? */
};
-static struct clk_lookup dm644x_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
- CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
- CLK(NULL, "dsp", &dsp_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "vicp", &vicp_clk),
- CLK("vpss", "master", &vpss_master_clk),
- CLK("vpss", "slave", &vpss_slave_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("palm_bk3710", NULL, &ide_clk),
- CLK("davinci-mcbsp", NULL, &asp_clk),
- CLK("dm6441-mmc.0", NULL, &mmcsd_clk),
- CLK(NULL, "spi", &spi_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK(NULL, "vlynq", &vlynq_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm644x_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk1", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&pll1_sysclk5, "pll1_sysclk5", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclkbp", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&pll2_sysclk2, "pll2_sysclk2", NULL);
+ davinci_clk_init(&pll2_sysclkbp, "pll2_sysclkbp", NULL);
+ davinci_clk_init(&dsp_clk, "dsp", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&vicp_clk, "vicp", NULL);
+ davinci_clk_init(&vpss_master_clk, "master", "vpss");
+ davinci_clk_init(&vpss_slave_clk, "slave", "vpss");
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&ide_clk, NULL, "palm_bk3710");
+ davinci_clk_init(&asp_clk, NULL, "davinci-mcbsp");
+ davinci_clk_init(&mmcsd_clk, NULL, "dm6441-mmc.0");
+ davinci_clk_init(&spi_clk, "spi", NULL);
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&usb_clk, "usb", NULL);
+ davinci_clk_init(&vlynq_clk, "vlynq", NULL);
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+}
static struct emac_platform_data dm644x_emac_pdata = {
.ctrl_reg_offset = DM644X_EMAC_CNTRL_OFFSET,
@@ -905,7 +905,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
.jtag_id_reg = 0x01c40028,
.ids = dm644x_ids,
.ids_num = ARRAY_SIZE(dm644x_ids),
- .cpu_clks = dm644x_clks,
.psc_bases = dm644x_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm644x_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -933,6 +932,12 @@ void __init dm644x_map_io(void)
davinci_map_sysmod();
}
+void __init dm644x_init_time(void)
+{
+ dm644x_clk_init();
+ davinci_timer_init();
+}
+
int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
struct vpbe_config *vpbe_cfg)
{
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index a844f7b..9b09e5d 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -17,6 +17,7 @@
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
+#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
@@ -320,49 +321,54 @@ static struct clk vpif1_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk_lookup dm646x_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "aux", &aux_clkin),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk8),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk9),
- CLK(NULL, "pll1_sysclk", &pll1_sysclkbp),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "dsp", &dsp_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "edma_cc", &edma_cc_clk),
- CLK(NULL, "edma_tc0", &edma_tc0_clk),
- CLK(NULL, "edma_tc1", &edma_tc1_clk),
- CLK(NULL, "edma_tc2", &edma_tc2_clk),
- CLK(NULL, "edma_tc3", &edma_tc3_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK("palm_bk3710", NULL, &ide_clk),
- CLK(NULL, "vpif0", &vpif0_clk),
- CLK(NULL, "vpif1", &vpif1_clk),
- CLK(NULL, NULL, NULL),
-};
+#define DM6467T_EVM_REF_FREQ 33000000
+
+static __init void dm646x_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&aux_clkin, "aux", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk4, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk5, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk6, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk8, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk9, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&dsp_clk, "dsp", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&edma_cc_clk, "edma_cc", NULL);
+ davinci_clk_init(&edma_tc0_clk, "edma_tc0", NULL);
+ davinci_clk_init(&edma_tc1_clk, "edma_tc1", NULL);
+ davinci_clk_init(&edma_tc2_clk, "edma_tc2", NULL);
+ davinci_clk_init(&edma_tc3_clk, "edma_tc3", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&mcasp0_clk, NULL, "davinci-mcasp.0");
+ davinci_clk_init(&mcasp1_clk, NULL, "davinci-mcasp.1");
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&ide_clk, NULL, "palm_bk3710");
+ davinci_clk_init(&vpif0_clk, "vpif0", NULL);
+ davinci_clk_init(&vpif1_clk, "vpif1", NULL);
+
+ if (machine_is_davinci_dm6467tevm())
+ davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
+}
static struct emac_platform_data dm646x_emac_pdata = {
.ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET,
@@ -888,7 +894,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
.jtag_id_reg = 0x01c40028,
.ids = dm646x_ids,
.ids_num = ARRAY_SIZE(dm646x_ids),
- .cpu_clks = dm646x_clks,
.psc_bases = dm646x_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm646x_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -958,6 +963,12 @@ void __init dm646x_map_io(void)
davinci_map_sysmod();
}
+void __init dm646x_init_time(void)
+{
+ dm646x_clk_init();
+ davinci_timer_init();
+}
+
static int __init dm646x_init_devices(void)
{
int ret = 0;
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 037aa66..9b85d5d 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -53,7 +53,6 @@ struct davinci_soc_info {
u32 jtag_id_reg;
struct davinci_id *ids;
unsigned long ids_num;
- struct clk_lookup *cpu_clks;
u32 *psc_bases;
unsigned long psc_bases_num;
u32 pinmux_base;
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index c760c1b..90b00d0 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -87,7 +87,10 @@ extern unsigned int da850_max_speed;
#define DA8XX_ARM_RAM_BASE 0xffff0000
void da830_map_io(void);
+void da830_init_time(void);
+
void da850_map_io(void);
+void da850_init_time(void);
int da830_register_edma(struct edma_rsv_info *rsv);
int da850_register_edma(struct edma_rsv_info *rsv[2]);
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 6ba156e..65b28e6 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -20,7 +20,6 @@
#include <linux/platform_device.h>
#include <linux/sched_clock.h>
-#include <asm/mach-types.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
@@ -342,8 +341,6 @@ static struct clock_event_device clockevent_davinci = {
.set_state_oneshot = davinci_set_oneshot,
};
-#define DM6467T_EVM_REF_FREQ 33000000
-
void __init davinci_timer_init(void)
{
struct clk *timer_clk;
@@ -352,11 +349,6 @@ void __init davinci_timer_init(void)
unsigned int clocksource_id;
int i;
- davinci_clk_init(soc_info->cpu_clks);
-
- if (machine_is_davinci_dm6467tevm())
- davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
-
clockevent_id = soc_info->timer_info->clockevent_id;
clocksource_id = soc_info->timer_info->clocksource_id;
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index 9a6af0b..2630efa9e 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -132,9 +132,6 @@ static struct clk usb_refclkin = {
.set_rate = davinci_simple_set_rate,
};
-static struct clk_lookup usb_refclkin_lookup =
- CLK(NULL, "usb_refclkin", &usb_refclkin);
-
/**
* da8xx_register_usb_refclkin - register USB_REFCLKIN clock
*
@@ -153,7 +150,7 @@ int __init da8xx_register_usb_refclkin(int rate)
if (ret)
return ret;
- clkdev_add(&usb_refclkin_lookup);
+ clk_register_clkdev(&usb_refclkin, "usb_refclkin", NULL);
return 0;
}
@@ -261,9 +258,6 @@ static struct clk usb20_phy_clk = {
.set_parent = usb20_phy_clk_set_parent,
};
-static struct clk_lookup usb20_phy_clk_lookup =
- CLK("da8xx-usb-phy", "usb20_phy", &usb20_phy_clk);
-
/**
* da8xx_register_usb20_phy_clk - register USB0PHYCLKMUX clock
*
@@ -290,7 +284,7 @@ int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
usb20_phy_clk.parent = parent;
ret = clk_register(&usb20_phy_clk);
if (!ret)
- clkdev_add(&usb20_phy_clk_lookup);
+ clk_register_clkdev(&usb20_phy_clk, "usb20_phy", "da8xx-usb-phy");
clk_put(parent);
@@ -323,9 +317,6 @@ static struct clk usb11_phy_clk = {
.set_parent = usb11_phy_clk_set_parent,
};
-static struct clk_lookup usb11_phy_clk_lookup =
- CLK("da8xx-usb-phy", "usb11_phy", &usb11_phy_clk);
-
/**
* da8xx_register_usb11_phy_clk - register USB1PHYCLKMUX clock
*
@@ -347,7 +338,7 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
usb11_phy_clk.parent = parent;
ret = clk_register(&usb11_phy_clk);
if (!ret)
- clkdev_add(&usb11_phy_clk_lookup);
+ clk_register_clkdev(&usb11_phy_clk, "usb11_phy", "da8xx-usb-phy");
clk_put(parent);
--
2.7.4
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox