* [PATCH 50/61] ARM: dts: r8a7794: Update CMT compat strings
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Magnus Damm <damm+renesas@opensource.se>
Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.
With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 90050565114c..67aa409b32bf 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -188,7 +188,7 @@
};
cmt0: timer at ffca0000 {
- compatible = "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
@@ -203,7 +203,7 @@
};
cmt1: timer at e6130000 {
- compatible = "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
--
2.11.0
^ permalink raw reply related
* [PATCH 49/61] ARM: dts: r8a7793: Update CMT compat strings
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Magnus Damm <damm+renesas@opensource.se>
Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.
With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7793.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 6e74d0855931..4a79da3ddbef 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -248,7 +248,7 @@
};
cmt0: timer at ffca0000 {
- compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7793-cmt0", "renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
@@ -263,7 +263,7 @@
};
cmt1: timer at e6130000 {
- compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7793-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
--
2.11.0
^ permalink raw reply related
* [PATCH 48/61] ARM: dts: r8a7791: Update CMT compat strings
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Magnus Damm <damm+renesas@opensource.se>
Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.
With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index e888b5b0e135..a69d6f883b34 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -257,7 +257,7 @@
};
cmt0: timer at ffca0000 {
- compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7791-cmt0", "renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
@@ -272,7 +272,7 @@
};
cmt1: timer at e6130000 {
- compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7791-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
--
2.11.0
^ permalink raw reply related
* [PATCH 47/61] ARM: dts: r8a7790: Update CMT compat strings
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Magnus Damm <damm+renesas@opensource.se>
Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.
With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 6ea06455c0d1..d3c6ab806616 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -311,7 +311,7 @@
};
cmt0: timer at ffca0000 {
- compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
@@ -326,7 +326,7 @@
};
cmt1: timer at e6130000 {
- compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
--
2.11.0
^ permalink raw reply related
* [PATCH 46/61] ARM: dts: r8a73a4: Update CMT compat string
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Magnus Damm <damm+renesas@opensource.se>
Use the recently updated r8a73a4 CMT1 compat string.
With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a73a4.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index dd4d09712a2a..805b0fd70f53 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -132,7 +132,7 @@
};
cmt1: timer at e6130000 {
- compatible = "renesas,cmt-48-r8a73a4", "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a73a4-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A73A4_CLK_CMT1>;
--
2.11.0
^ permalink raw reply related
* [PATCH 45/61] ARM: dts: r8a7794: Add SMP support
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Add the device tree node for the Advanced Power Management Unit (APMU).
Use the "enable-method" prop to point out that the APMU should be used
for the SMP support.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 95206c25e6a1..90050565114c 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -37,6 +37,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+ enable-method = "renesas,apmu";
cpu0: cpu at 0 {
device_type = "cpu";
@@ -66,6 +67,12 @@
};
};
+ apmu at e6151000 {
+ compatible = "renesas,r8a7794-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
+
gic: interrupt-controller at f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.11.0
^ permalink raw reply related
* [PATCH 44/61] ARM: dts: genmai: Correct primary compatible value for eeprom
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Renesas part number of the two-wire serial interface EEPROM is not
24C128, but R1EX24128ASA00A.
Hence change its primary compatible value to "renesas,r1ex24128".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r7s72100-genmai.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
index cd4d5ff7749e..5af2a0116ff2 100644
--- a/arch/arm/boot/dts/r7s72100-genmai.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
@@ -123,7 +123,7 @@
pinctrl-0 = <&i2c2_pins>;
eeprom at 50 {
- compatible = "renesas,24c128", "atmel,24c128";
+ compatible = "renesas,r1ex24128", "atmel,24c128";
reg = <0x50>;
pagesize = <64>;
};
--
2.11.0
^ permalink raw reply related
* [PATCH 43/61] ARM: dts: koelsch: Correct primary compatible value for eeprom
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Renesas part number of the two-wire serial interface EEPROM is not
24C02, but R1EX24002ATAS0G.
Hence change its primary compatible value to "renesas,r1ex24002", like
on Gose.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 4126de417922..fac9cdea4965 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -708,7 +708,7 @@
};
eeprom at 50 {
- compatible = "renesas,24c02", "atmel,24c02";
+ compatible = "renesas,r1ex24002", "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
--
2.11.0
^ permalink raw reply related
* [GIT PULL] Renesas ARM Based SoC DT Updates for v4.16
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC DT updates for v4.16.
The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v4.16
for you to fetch changes up to 7f32eddb81ecc06131a643babe2d0f961fbd7f08:
ARM: dts: alt: Convert to named i2c-gpio bindings (2017-12-04 09:34:53 +0100)
----------------------------------------------------------------
Renesas ARM Based SoC DT Updates for v4.16
* Convert to named i2c-gpio bindings
Geert Uytterhoeven says "Commits 7d29f509d2cfd807 ("dt-bindings: i2c:
i2c-gpio: Add support for named gpios") and 05c74778858d7d99 ("i2c: gpio:
Add support for named gpios in DT") introduced named i2c-gpio DT
bindings, and deprecated the more error-prone unnamed variant.
This patch series switches all Renesas boards to the new bindings, and
adds the missing GPIO_OPEN_DRAIN I/O flags, which were implicitly
assumed before..."
... Note that after this series is applied, the i2c-gpio buses are no
longer detected when booting new DTBs on old (v4.14 and older) kernels,
which should not be an issue. Booting old DTBs on new kernels is not
affected."
* Update DTS for CMT DT binding rework
Geert Uytterhoeven says "This patch series updates the CMT device nodes
in the various Renesas DTS files sh_cmt clocksource driver for the recent
DT binding rework that was merged in v4.14-rc1 and v4.15-rc1..."
* Add SMP support to r8a7794 (R-Car E2) SoC
Sergei Shtylyov says "Add the device tree node for the Advanced Power
Management Unit (APMU). Use the "enable-method" prop to point out that
the APMU should be used for the SMP support."
* Correct primary compatible value for eeprom
on r7s72100 (RZ/A1H) genmai and r8a7791 (R-Car M2-W) koelsh boards
Geert Uytterhoeven says "The Renesas part numbers of the two-wire serial
interface EEPROMs do not follow the 24Cxx pattern, but the R1EX24xxx
pattern.
Hence change the primary compatible values to the appropriate variant of
"renesas,r1ex24xxx", like is already done on Gose.""
* Move cec_clock to root node on r8a7791 (R-Car M2-W) koelsh board
r8a7791 (R-Car M2-W) koelsh board
* Use R-Car SDHI and Ether Gen1 and 2 fallback compat strings
Use recently posted R-Car SDHI and Ether Gen 1 and 2 fallback
compat strings in the DT of Renesas ARM based SoCs.
* Add IIC cores to dtsi of r8a7745 (RZ/G1E) SoC
* Rework DT architecture for r8a7745 (RZ/G1E) iW-RainboW-G22D development
platform and add serial support.
Fabrizio Castro says "... define a new DT architecture for the
iW-RainboW-G22D SODIMM Development Platform to include the configuration
with the HDMI daughter board and to define the serial interfaces."
* Add USB function support to
r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
* Add PCIEC and ttySC3 support to r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
* Add VIN support to r8a7743 (RZ/G1M) and r8a7745 (RZ/G1E) SoCs
* Add CAN and HDMI support to r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven and
r8a7745 (RZ/G1E) iW-RainboW-G22D development platforms
----------------------------------------------------------------
Biju Das (7):
ARM: dts: r8a7745: Add HS-USB device node
ARM: dts: r8a7745: Add USB-DMAC device nodes
ARM: dts: r8a7745: Enable DMA for HSUSB
ARM: dts: iwg22d-sodimm: Enable HS-USB
ARM: dts: r8a7743: Add default PCIe bus clock
ARM: dts: r8a7743: Add PCIe Controller device node
ARM: dts: iwg20d-q7: Enable PCIe Controller
Fabrizio Castro (18):
ARM: dts: r8a7743: Add DU support
ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video output
ARM: dts: iwg22d: Use /dev/ttySC3 as debug console
ARM: dts: iwg22d: Add /dev/ttySC5 support
ARM: dts: iwg22d-sodimm-dbhd-ca: Add device tree for HDMI DB
ARM: dts: iwg22d-sodimm: sort dt nodes
ARM: dts: r8a7745: Add IIC cores to dtsi
ARM: dts: iwg20d-q7: Add support for ttySC3
ARM: dts: r8a7745: Add DU support
ARM: dts: iwg22d-sodimm-dbhd-ca: Add HDMI video output
ARM: dts: r8a7745: Add CAN[01] SoC support
ARM: dts: iwg22d-sodimm: Add can0 support to carrier board
ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB
ARM: dts: r8a7743: Add CAN[01] SoC support
ARM: dts: iwg20d-q7-common: Add can0 support to carrier board
ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DB
ARM: dts: r8a7743: add VIN dt support
ARM: dts: r8a7745: add VIN dt support
Geert Uytterhoeven (6):
ARM: dts: koelsch: Correct primary compatible value for eeprom
ARM: dts: genmai: Correct primary compatible value for eeprom
ARM: dts: armadillo800eva: Convert to named i2c-gpio bindings
ARM: dts: lager: Convert to named i2c-gpio bindings
ARM: dts: koelsch: Convert to named i2c-gpio bindings
ARM: dts: alt: Convert to named i2c-gpio bindings
Magnus Damm (12):
ARM: dts: r8a73a4: Update CMT compat string
ARM: dts: r8a7790: Update CMT compat strings
ARM: dts: r8a7791: Update CMT compat strings
ARM: dts: r8a7793: Update CMT compat strings
ARM: dts: r8a7794: Update CMT compat strings
ARM: dts: r8a73a4: Remove CMT renesas,channels-mask
ARM: dts: r8a7740: Remove CMT renesas,channels-mask
ARM: dts: r8a7790: Remove CMT renesas,channels-mask
ARM: dts: r8a7791: Remove CMT renesas,channels-mask
ARM: dts: r8a7793: Remove CMT renesas,channels-mask
ARM: dts: r8a7794: Remove CMT renesas,channels-mask
ARM: dts: sh73a0: Remove CMT renesas,channels-mask
Sergei Shtylyov (1):
ARM: dts: r8a7794: Add SMP support
Simon Horman (17):
ARM: dts: r8a7743: Use R-Car Gen2 Ether fallback compat string
ARM: dts: r8a7745: Use R-Car Gen2 Ether fallback compat string
ARM: dts: r8a7778: Use R-Car Gen1 Ether fallback compat string
ARM: dts: r8a7790: Use R-Car Gen2 Ether fallback compat string
ARM: dts: r8a7791: Use R-Car Gen2 Ether fallback compat string
ARM: dts: r8a7793: Use R-Car Gen2 Ether fallback compat string
ARM: dts: r8a7794: Use R-Car Gen2 Ether fallback compat string
ARM: dts: r8a7743: Use R-Car SDHI Gen2 fallback compat string
ARM: dts: r8a7745: Use R-Car SDHI Gen2 fallback compat string
ARM: dts: r8a7778: Use R-Car SDHI Gen1 fallback compat string
ARM: dts: r8a7779: Use R-Car SDHI Gen1 fallback compat string
ARM: dts: r8a7790: Use R-Car SDHI Gen2 fallback compat string
ARM: dts: r8a7791: Use R-Car SDHI Gen2 fallback compat string
ARM: dts: r8a7792: Use R-Car SDHI Gen2 fallback compat string
ARM: dts: r8a7793: Use R-Car SDHI Gen2 fallback compat string
ARM: dts: r8a7794: Use R-Car SDHI Gen2 fallback compat string
ARM: dts: koelsch: Move cec_clock to root node
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 34 ++++
arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 87 ++++++++++
arch/arm/boot/dts/r7s72100-genmai.dts | 2 +-
arch/arm/boot/dts/r8a73a4.dtsi | 5 +-
arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 5 +-
arch/arm/boot/dts/r8a7740.dtsi | 3 -
arch/arm/boot/dts/r8a7743.dtsi | 149 ++++++++++++++++-
.../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 158 ++++++++++++++++++
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 99 ++++++++----
arch/arm/boot/dts/r8a7745.dtsi | 180 ++++++++++++++++++++-
arch/arm/boot/dts/r8a7778.dtsi | 12 +-
arch/arm/boot/dts/r8a7779.dtsi | 12 +-
arch/arm/boot/dts/r8a7790-lager.dts | 5 +-
arch/arm/boot/dts/r8a7790.dtsi | 23 +--
arch/arm/boot/dts/r8a7791-koelsch.dts | 19 ++-
arch/arm/boot/dts/r8a7791.dtsi | 20 +--
arch/arm/boot/dts/r8a7792.dtsi | 3 +-
arch/arm/boot/dts/r8a7793.dtsi | 20 +--
arch/arm/boot/dts/r8a7794-alt.dts | 5 +-
arch/arm/boot/dts/r8a7794.dtsi | 27 ++--
arch/arm/boot/dts/sh73a0.dtsi | 3 -
22 files changed, 753 insertions(+), 119 deletions(-)
create mode 100644 arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
^ permalink raw reply
* [PATCH 42/61] ARM: dts: r8a7745: add VIN dt support
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Add VIN[01] support to SoC dt. Also, add aliases.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 52f13246fc8a..de13e156f071 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -31,6 +31,8 @@
spi1 = &msiof0;
spi2 = &msiof1;
spi3 = &msiof2;
+ vin0 = &vin0;
+ vin1 = &vin1;
};
cpus {
@@ -821,6 +823,28 @@
status = "disabled";
};
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7745",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
+ };
+
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7745",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
+ };
+
du: display at feb00000 {
compatible = "renesas,du-r8a7745";
reg = <0 0xfeb00000 0 0x40000>;
--
2.11.0
^ permalink raw reply related
* [PATCH 41/61] ARM: dts: r8a7743: add VIN dt support
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Add VIN[012] support to SoC dt. Also, add aliases.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7743.dtsi | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 9e26c40976ff..c09c6672ca37 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -32,6 +32,9 @@
spi1 = &msiof0;
spi2 = &msiof1;
spi3 = &msiof2;
+ vin0 = &vin0;
+ vin1 = &vin1;
+ vin2 = &vin2;
};
cpus {
@@ -1037,6 +1040,39 @@
};
};
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7743",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
+ };
+
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7743",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
+ };
+
+ vin2: video at e6ef2000 {
+ compatible = "renesas,vin-r8a7743",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ status = "disabled";
+ };
+
du: display at feb00000 {
compatible = "renesas,du-r8a7743";
reg = <0 0xfeb00000 0 0x40000>,
--
2.11.0
^ permalink raw reply related
* [PATCH 40/61] ARM: dts: iwg20d-q7: Enable PCIe Controller
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Enable PCIe Controller & set PCIe bus clock frequency.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 3e4bc4d6b9d3..54470c6de891 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -96,6 +96,14 @@
pinctrl-names = "default";
};
+&pcie_bus_clk {
+ clock-frequency = <100000000>;
+};
+
+&pciec {
+ status = "okay";
+};
+
&pfc {
can0_pins: can0 {
groups = "can0_data_d";
--
2.11.0
^ permalink raw reply related
* [PATCH 39/61] ARM: dts: r8a7743: Add PCIe Controller device node
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7743.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index de4b8c64d56b..9e26c40976ff 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1164,6 +1164,34 @@
phy-names = "usb";
};
};
+
+ pciec: pcie at fe000000 {
+ compatible = "renesas,pcie-r8a7743",
+ "renesas,pcie-rcar-gen2";
+ reg = <0 0xfe000000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
+ 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
+ };
};
/* External root clock */
--
2.11.0
^ permalink raw reply related
* [PATCH 38/61] ARM: dts: r8a7743: Add default PCIe bus clock
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
This patch adds a default PCIe bus clock node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7743.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 12c7b9267fd7..de4b8c64d56b 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1189,6 +1189,13 @@
clock-frequency = <0>;
};
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related
* [PATCH 37/61] ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DB
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
CAN1 interface is exposed via connector J3 found on the camera daughter
board. This patch enables can1 DT node from within the daughter board
specific dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
index 4db18f2ef303..476273b3f994 100644
--- a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
@@ -32,6 +32,13 @@
};
};
+&can1 {
+ pinctrl-0 = <&can1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
@@ -94,6 +101,11 @@
};
&pfc {
+ can1_pins: can1 {
+ groups = "can1_data_d";
+ function = "can1";
+ };
+
du_pins: du {
groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
function = "du";
--
2.11.0
^ permalink raw reply related
* [PATCH 36/61] ARM: dts: iwg20d-q7-common: Add can0 support to carrier board
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
This patch enables CAN0 interface exposed through connector J20 on the
carrier board.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index c865499ad2a1..3e4bc4d6b9d3 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -59,6 +59,13 @@
};
};
+&can0 {
+ pinctrl-0 = <&can0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&hsusb {
status = "okay";
pinctrl-0 = <&usb0_pins>;
@@ -90,6 +97,11 @@
};
&pfc {
+ can0_pins: can0 {
+ groups = "can0_data_d";
+ function = "can0";
+ };
+
avb_pins: avb {
groups = "avb_mdio", "avb_gmii";
function = "avb";
--
2.11.0
^ permalink raw reply related
* [PATCH 35/61] ARM: dts: r8a7743: Add CAN[01] SoC support
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Add the definitions for can0 and can1 to the SoC .dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7743.dtsi | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 6aa86b75b80c..12c7b9267fd7 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1067,6 +1067,34 @@
};
};
+ can0: can at e6e80000 {
+ compatible = "renesas,can-r8a7743",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7743_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+ can1: can at e6e88000 {
+ compatible = "renesas,can-r8a7743",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7743_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
pci0: pci at ee090000 {
compatible = "renesas,pci-r8a7743",
"renesas,pci-rcar-gen2";
@@ -1153,6 +1181,14 @@
clock-frequency = <48000000>;
};
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related
* [PATCH 34/61] ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
CAN1 interface is exposed via connector J1 found on the HDMI daughter
board. This patch enables can1 DT node from within the daughter board
specific device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
index a8a4ec87378d..d34de8266ccd 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
@@ -54,6 +54,13 @@
};
};
+&can1 {
+ pinctrl-0 = <&can1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&hscif2 {
pinctrl-0 = <&hscif2_pins>;
pinctrl-names = "default";
@@ -105,6 +112,11 @@
};
&pfc {
+ can1_pins: can1 {
+ groups = "can1_data_b";
+ function = "can1";
+ };
+
du0_pins: du0 {
groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
function = "du0";
--
2.11.0
^ permalink raw reply related
* [PATCH 33/61] ARM: dts: iwg22d-sodimm: Add can0 support to carrier board
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
This patch enables CAN0 interface exposed through connector J15 on the
carrier board.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 80c82aa94c06..39ce7e7101c7 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -59,6 +59,13 @@
};
};
+&can0 {
+ pinctrl-0 = <&can0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&hscif1 {
pinctrl-0 = <&hscif1_pins>;
pinctrl-names = "default";
@@ -85,6 +92,11 @@
function = "avb";
};
+ can0_pins: can0 {
+ groups = "can0_data";
+ function = "can0";
+ };
+
hscif1_pins: hscif1 {
groups = "hscif1_data", "hscif1_ctrl";
function = "hscif1";
--
2.11.0
^ permalink raw reply related
* [PATCH 32/61] ARM: dts: r8a7745: Add CAN[01] SoC support
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Add the definitions for can0 and can1 to the SoC .dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745.dtsi | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 53eb1ce446a4..52f13246fc8a 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1049,6 +1049,34 @@
#phy-cells = <1>;
};
};
+
+ can0: can at e6e80000 {
+ compatible = "renesas,can-r8a7745",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7745_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+ can1: can at e6e88000 {
+ compatible = "renesas,can-r8a7745",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7745_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
};
/* External root clock */
@@ -1066,6 +1094,14 @@
clock-frequency = <48000000>;
};
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related
* [PATCH 31/61] ARM: dts: iwg22d-sodimm-dbhd-ca: Add HDMI video output
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
This patch enables the HDMI interface found on the expansion board.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 85 ++++++++++++++++++++++
1 file changed, 85 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
index f925388454da..a8a4ec87378d 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
@@ -20,6 +20,38 @@
serial4 = &scif5;
serial6 = &hscif2;
};
+
+ cec_clock: cec-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <12000000>;
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <&adv7511_out>;
+ };
+ };
+ };
+};
+
+&du {
+ pinctrl-0 = <&du0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ ports {
+ port at 0 {
+ endpoint {
+ remote-endpoint = <&adv7511_in>;
+ };
+ };
+ };
};
&hscif2 {
@@ -29,12 +61,65 @@
status = "okay";
};
+&i2c1 {
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ hdmi at 39 {
+ compatible = "adi,adv7511w";
+ reg = <0x39>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&cec_clock>;
+ clock-names = "cec";
+ pd-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+ adi,input-style = <1>;
+ adi,input-justification = "evenly";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ adv7511_in: endpoint {
+ remote-endpoint = <&du_out_rgb0>;
+ };
+ };
+
+ port at 1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+};
+
&pfc {
+ du0_pins: du0 {
+ groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
+ function = "du0";
+ };
+
hscif2_pins: hscif2 {
groups = "hscif2_data";
function = "hscif2";
};
+ i2c1_pins: i2c1 {
+ groups = "i2c1_d";
+ function = "i2c1";
+ };
+
scif1_pins: scif1 {
groups = "scif1_data";
function = "scif1";
--
2.11.0
^ permalink raw reply related
* [PATCH 30/61] ARM: dts: r8a7745: Add DU support
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Add du node to r8a7745 SoC DT. Boards that want to enable the DU
need to specify the output topology.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745.dtsi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 846c27a00c54..53eb1ce446a4 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -821,6 +821,33 @@
status = "disabled";
};
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a7745";
+ reg = <0 0xfeb00000 0 0x40000>;
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ du_out_rgb0: endpoint {
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ du_out_rgb1: endpoint {
+ };
+ };
+ };
+ };
+
msiof0: spi at e6e20000 {
compatible = "renesas,msiof-r8a7745",
"renesas,rcar-gen2-msiof";
--
2.11.0
^ permalink raw reply related
* [PATCH 29/61] ARM: dts: koelsch: Move cec_clock to root node
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
cec-clock is a fixed clock generator that is not controlled by i2c5 and
thus should not be a child of the i2c5 bus node. Rather, it should be
a child of the root node of the DT.
Fixes: 02a5ab18d366 ("ARM: dts: koelsch: Add CEC clock for HDMI transmitter")
Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index e164eda69baf..4126de417922 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -278,6 +278,12 @@
};
};
+ cec_clock: cec-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <12000000>;
+ };
+
hdmi-out {
compatible = "hdmi-connector";
type = "a";
@@ -640,12 +646,6 @@
};
};
- cec_clock: cec-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <12000000>;
- };
-
hdmi at 39 {
compatible = "adi,adv7511w";
reg = <0x39>;
--
2.11.0
^ permalink raw reply related
* [PATCH 28/61] ARM: dts: iwg20d-q7: Add support for ttySC3
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index efd8af9242d1..c865499ad2a1 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -11,6 +11,7 @@
/ {
aliases {
serial0 = &scif0;
+ serial3 = &scifb1;
ethernet0 = &avb;
};
@@ -104,6 +105,11 @@
function = "scif0";
};
+ scifb1_pins: scifb1 {
+ groups = "scifb1_data_d", "scifb1_ctrl";
+ function = "scifb1";
+ };
+
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
@@ -134,6 +140,14 @@
status = "okay";
};
+&scifb1 {
+ pinctrl-0 = <&scifb1_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+ status = "okay";
+};
+
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
pinctrl-1 = <&sdhi1_pins_uhs>;
--
2.11.0
^ permalink raw reply related
* [PATCH 27/61] ARM: dts: r8a7794: Use R-Car SDHI Gen2 fallback compat string
From: Simon Horman @ 2017-12-06 10:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1512555546.git.horms+renesas@verge.net.au>
Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7794 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 148c2567a6ce..95206c25e6a1 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -792,7 +792,8 @@
};
sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7794";
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
@@ -806,7 +807,8 @@
};
sdhi1: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7794";
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
@@ -820,7 +822,8 @@
};
sdhi2: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7794";
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
--
2.11.0
^ permalink raw reply related
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