* [PATCH v6 2/5] dt-bindings: scsi: ufs: add document for hisi-ufs
From: Rob Herring @ 2017-12-07 23:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207102026.14977-3-liwei213@huawei.com>
On Thu, Dec 07, 2017 at 06:20:23PM +0800, Li Wei wrote:
> add ufs node document for Hisilicon.
>
> Signed-off-by: Li Wei <liwei213@huawei.com>
> ---
Version history?
> Documentation/devicetree/bindings/ufs/ufs-hisi.txt | 38 ++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
>
> diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
> new file mode 100644
> index 000000000000..73e10698960e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
> @@ -0,0 +1,38 @@
> +* Hisilicon Universal Flash Storage (UFS) Host Controller
> +
> +UFS nodes are defined to describe on-chip UFS hardware macro.
> +Each UFS Host Controller should have its own node.
> +
> +Required properties:
> +- compatible : compatible list, contains one of the following -
> + "hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs
> + host controller present on Hi36xx chipset.
> +- reg : should contain UFS register address space & UFS SYS CTRL register address,
> +- interrupt-parent : interrupt device
> +- interrupts : interrupt number
> +- clocks : List of phandle and clock specifier pairs
> +- clock-names : List of clock input name strings sorted in the same
> + order as the clocks property. "ref_clk", "phy_clk" is optional
> +- resets : reset node register, one reset the clk and the other reset the controller
> +- reset-names : describe reset node register
> +
> +Example:
> +
> + ufs: ufs at ff3b0000 {
> + compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
> + /* 0: HCI standard */
> + /* 1: UFS SYS CTRL */
> + reg = <0x0 0xff3b0000 0x0 0x1000>,
> + <0x0 0xff3b1000 0x0 0x1000>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
> + <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
> + clock-names = "ref_clk", "phy_clk";
> + freq-table-hz = <0 0>, <0 0>;
? Not documented.
> + /* offset: 0x84; bit: 12 */
> + /* offset: 0x84; bit: 7 */
> + resets = <&crg_rst 0x84 12>,
> + <&crg_rst 0x84 7>;
> + reset-names = "rst", "assert";
> + };
> --
> 2.15.0
>
^ permalink raw reply
* [PATCH v2 1/7] dt-bindings: marvell: Add documentation for the North Bridge PM on Armada 37xx
From: Rob Herring @ 2017-12-07 23:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207135616.23670-2-gregory.clement@free-electrons.com>
On Thu, Dec 07, 2017 at 02:56:10PM +0100, Gregory CLEMENT wrote:
> Extend the documentation of the Armada 37xx SoC with the the North
> Bridge Power Management component.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> .../devicetree/bindings/arm/marvell/armada-37xx.txt | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v4 1/2] of: documentation: add bindings documentation for TS-7970
From: Rob Herring @ 2017-12-07 23:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207160550.2782-1-sebastien.bourdelin@savoirfairelinux.com>
On Thu, Dec 07, 2017 at 11:05:49AM -0500, Sebastien Bourdelin wrote:
> This adds the documentation for the TS-7970 by Technologic Systems.
>
> Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
> ---
> Changes v3 -> v4:
> - rebase on master
>
> Changes v1 -> v2:
> - rebase on master
> ---
> Documentation/devicetree/bindings/arm/technologic.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v2 1/3] regulator: axp20x: add drivevbus support for axp803
From: Rob Herring @ 2017-12-07 23:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512673460-7865-1-git-send-email-jagan@amarulasolutions.com>
On Fri, Dec 08, 2017 at 12:34:18AM +0530, Jagan Teki wrote:
> Like axp221, axp223, axp813 the axp803 is also supporting external
> regulator to drive the OTG VBus through N_VBUSEN PMIC pin.
>
> Add support for it.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> Changes for v2:
> - New patch
>
> Documentation/devicetree/bindings/mfd/axp20x.txt | 2 +-
> drivers/regulator/axp20x-regulator.c | 2 ++
> 2 files changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH net-next v3 0/2] net: thunderx: add support for PTP clock
From: Jakub Kicinski @ 2017-12-07 23:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171206133100.26436-1-aleksey.makarov@cavium.com>
On Wed, 6 Dec 2017 16:30:56 +0300, Aleksey Makarov wrote:
> This series adds support for IEEE 1588 Precision Time Protocol
> to Cavium ethernet driver.
>
> The first patch adds support for the Precision Time Protocol Clocks and
> Timestamping coprocessor (PTP) found on Cavium processors.
> It registers a new PTP clock in the PTP core and provides functions
> to use the counter in BGX, TNS, GTI, and NIC blocks.
>
> The second patch introduces support for the PTP protocol to the
> Cavium ThunderX ethernet driver.
Since this is PTP-related, would it make sense to CC Richard Cochran
on the next revision?
^ permalink raw reply
* [PATCH v3 00/20] arm64: Unmap the kernel whilst running in userspace (KPTI)
From: Laura Abbott @ 2017-12-08 0:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512563739-25239-1-git-send-email-will.deacon@arm.com>
On 12/06/2017 04:35 AM, Will Deacon wrote:
> Hi everybody,
>
> This is version three of the patches formerly known as KAISER (?).
>
> v1: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-November/542751.html
> v2: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-November/544817.html
>
> Changes since v2 include:
>
> * Rename command-line option from "kaiser=" to "kpti=" for parity with x86
> * Fixed Falkor erratum workaround (missing '~')
> * Moved vectors base from literal pool into separate data page
> * Added TTBR_ASID_MASK instead of open-coded constants
> * Added missing newline to error message
> * Fail to probe SPE if KPTI is enabled
> * Addressed minor review comments
> * Added tags
> * Based on -rc2
>
> Patches are also pushed here:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git kpti
>
> Feedback and testing welcome. At this point, I'd like to start thinking
> about getting this merged for 4.16.
>
You can add
Tested-by: Laura Abbott <labbott@redhat.com>
> Cheers,
>
> Will
>
> --->8
>
> Will Deacon (20):
> arm64: mm: Use non-global mappings for kernel space
> arm64: mm: Temporarily disable ARM64_SW_TTBR0_PAN
> arm64: mm: Move ASID from TTBR0 to TTBR1
> arm64: mm: Remove pre_ttbr0_update_workaround for Falkor erratum
> #E1003
> arm64: mm: Rename post_ttbr0_update_workaround
> arm64: mm: Fix and re-enable ARM64_SW_TTBR0_PAN
> arm64: mm: Allocate ASIDs in pairs
> arm64: mm: Add arm64_kernel_unmapped_at_el0 helper
> arm64: mm: Invalidate both kernel and user ASIDs when performing TLBI
> arm64: entry: Add exception trampoline page for exceptions from EL0
> arm64: mm: Map entry trampoline into trampoline and kernel page tables
> arm64: entry: Explicitly pass exception level to kernel_ventry macro
> arm64: entry: Hook up entry trampoline to exception vectors
> arm64: erratum: Work around Falkor erratum #E1003 in trampoline code
> arm64: tls: Avoid unconditional zeroing of tpidrro_el0 for native
> tasks
> arm64: entry: Add fake CPU feature for unmapping the kernel at EL0
> arm64: Kconfig: Add CONFIG_UNMAP_KERNEL_AT_EL0
> perf: arm_spe: Fail device probe when arm64_kernel_unmapped_at_el0()
> arm64: mm: Introduce TTBR_ASID_MASK for getting at the ASID in the
> TTBR
> arm64: kaslr: Put kernel vectors address in separate data page
>
> arch/arm64/Kconfig | 30 +++--
> arch/arm64/include/asm/asm-uaccess.h | 26 ++--
> arch/arm64/include/asm/assembler.h | 27 +----
> arch/arm64/include/asm/cpucaps.h | 3 +-
> arch/arm64/include/asm/fixmap.h | 5 +
> arch/arm64/include/asm/kernel-pgtable.h | 12 +-
> arch/arm64/include/asm/mmu.h | 11 ++
> arch/arm64/include/asm/mmu_context.h | 9 +-
> arch/arm64/include/asm/pgtable-hwdef.h | 1 +
> arch/arm64/include/asm/pgtable-prot.h | 21 +++-
> arch/arm64/include/asm/pgtable.h | 1 +
> arch/arm64/include/asm/proc-fns.h | 6 -
> arch/arm64/include/asm/tlbflush.h | 16 ++-
> arch/arm64/include/asm/uaccess.h | 21 +++-
> arch/arm64/kernel/asm-offsets.c | 6 +-
> arch/arm64/kernel/cpufeature.c | 41 +++++++
> arch/arm64/kernel/entry.S | 203 +++++++++++++++++++++++++++-----
> arch/arm64/kernel/process.c | 12 +-
> arch/arm64/kernel/vmlinux.lds.S | 40 ++++++-
> arch/arm64/lib/clear_user.S | 2 +-
> arch/arm64/lib/copy_from_user.S | 2 +-
> arch/arm64/lib/copy_in_user.S | 2 +-
> arch/arm64/lib/copy_to_user.S | 2 +-
> arch/arm64/mm/cache.S | 2 +-
> arch/arm64/mm/context.c | 36 +++---
> arch/arm64/mm/mmu.c | 31 +++++
> arch/arm64/mm/proc.S | 12 +-
> arch/arm64/xen/hypercall.S | 2 +-
> drivers/perf/arm_spe_pmu.c | 9 ++
> 29 files changed, 454 insertions(+), 137 deletions(-)
>
^ permalink raw reply
* [PATCH 1/2] ARM: BUG if jumping to usermode address in kernel mode
From: Alex Shi @ 2017-12-08 1:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E1eIYiX-0007t0-AH@rmk-PC.armlinux.org.uk>
CC GregKH, since this patch would better to get to stable kernel.
This patch also expose a qemu issue which fixed by upstream commit:
3aaf33bebda8d4ffcc0f ARM: avoid faulting on qemu
Both of patches are tested in linaro's kernelci and LKFT on stable
kernel 4.4/4.9/4.14, no regressions. The lts 3.18 isn't applicable for
this patches.
Regards
Alex
On 11/25/2017 07:33 PM, Russell King wrote:
> Detect if we are returning to usermode via the normal kernel exit paths
> but the saved PSR value indicates that we are in kernel mode. This
> could occur due to corrupted stack state, which has been observed with
> "ftracetest".
>
> This ensures that we catch the problem case before we get to user code.
>
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> ---
> arch/arm/include/asm/assembler.h | 18 ++++++++++++++++++
> arch/arm/kernel/entry-header.S | 6 ++++++
> 2 files changed, 24 insertions(+)
>
> diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
> index ad301f107dd2..bc8d4bbd82e2 100644
> --- a/arch/arm/include/asm/assembler.h
> +++ b/arch/arm/include/asm/assembler.h
> @@ -518,4 +518,22 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
> #endif
> .endm
>
> + .macro bug, msg, line
> +#ifdef CONFIG_THUMB2_KERNEL
> +1: .inst 0xde02
> +#else
> +1: .inst 0xe7f001f2
> +#endif
> +#ifdef CONFIG_DEBUG_BUGVERBOSE
> + .pushsection .rodata.str, "aMS", %progbits, 1
> +2: .asciz "\msg"
> + .popsection
> + .pushsection __bug_table, "aw"
> + .align 2
> + .word 1b, 2b
> + .hword \line
> + .popsection
> +#endif
> + .endm
> +
> #endif /* __ASM_ASSEMBLER_H__ */
> diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
> index d523cd8439a3..7f4d80c2db6b 100644
> --- a/arch/arm/kernel/entry-header.S
> +++ b/arch/arm/kernel/entry-header.S
> @@ -300,6 +300,8 @@
> mov r2, sp
> ldr r1, [r2, #\offset + S_PSR] @ get calling cpsr
> ldr lr, [r2, #\offset + S_PC]! @ get pc
> + tst r1, #0xcf
> + bne 1f
> msr spsr_cxsf, r1 @ save in spsr_svc
> #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
> @ We must avoid clrex due to Cortex-A15 erratum #830321
> @@ -314,6 +316,7 @@
> @ after ldm {}^
> add sp, sp, #\offset + PT_REGS_SIZE
> movs pc, lr @ return & move spsr_svc into cpsr
> +1: bug "Returning to usermode but unexpected PSR bits set?", \@
> #elif defined(CONFIG_CPU_V7M)
> @ V7M restore.
> @ Note that we don't need to do clrex here as clearing the local
> @@ -329,6 +332,8 @@
> ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
> ldr lr, [sp, #\offset + S_PC] @ get pc
> add sp, sp, #\offset + S_SP
> + tst r1, #0xcf
> + bne 1f
> msr spsr_cxsf, r1 @ save in spsr_svc
>
> @ We must avoid clrex due to Cortex-A15 erratum #830321
> @@ -341,6 +346,7 @@
> .endif
> add sp, sp, #PT_REGS_SIZE - S_SP
> movs pc, lr @ return & move spsr_svc into cpsr
> +1: bug "Returning to usermode but unexpected PSR bits set?", \@
> #endif /* !CONFIG_THUMB2_KERNEL */
> .endm
>
>
^ permalink raw reply
* [PATCH v5 2/4] clk: meson-axg: add clocks dt-bindings required header
From: Yixun Lan @ 2017-12-08 1:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207221014.6qwcb43w5hms4ma5@rob-hp-laptop>
On 12/08/17 06:10, Rob Herring wrote:
> On Thu, Dec 07, 2017 at 05:52:58PM +0800, Yixun Lan wrote:
>> From: Qiufang Dai <qiufang.dai@amlogic.com>
>>
>> Add the required header for the clocks ID dt-bindings
>> exported from various subsystem in the Meson-AXG SoC.
>>
>> Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
>> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
>> ---
>> include/dt-bindings/clock/axg-clkc.h | 71 ++++++++++++++++++++++++++++++++++++
>> 1 file changed, 71 insertions(+)
>> create mode 100644 include/dt-bindings/clock/axg-clkc.h
>
> Please add acks when posting new versions.
>
HI Rob
thanks for the suggestion, I will keep this in mind
^ permalink raw reply
* 答复: [PATCH v6 2/5] dt-bindings: scsi: ufs: add document for hisi-ufs
From: liwei (CM) @ 2017-12-08 1:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207233548.kcgtlxfdsh3ibsxu@rob-hp-laptop>
Hi, Rob
Thank you for your attention ,it's the new version. The bellow is no use, so I'll remove it next patch.
> + freq-table-hz = <0 0>, <0 0>;
In the new version, we remove some no use codes in the driver; And taking into account the our next hi3670 platform, some of the public functions in the drive are extracted.
In addition:
1) we do not have a single area that controls PHY as Qualcomm, so "phy_clk" remains the same.
2?"rst", "assert" is not generic and related with our soc implementation, So it's kept and there's no change.
-----????-----
???: Rob Herring [mailto:robh at kernel.org]
????: 2017?12?8? 7:36
???: liwei (CM)
??: mark.rutland at arm.com; xuwei (O); catalin.marinas at arm.com; will.deacon at arm.com; vinholikatti at gmail.com; jejb at linux.vnet.ibm.com; martin.petersen at oracle.com; khilman at baylibre.com; arnd at arndb.de; gregory.clement at free-electrons.com; thomas.petazzoni at free-electrons.com; yamada.masahiro at socionext.com; riku.voipio at linaro.org; treding at nvidia.com; krzk at kernel.org; eric at anholt.net; devicetree at vger.kernel.org; linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-scsi at vger.kernel.org; zangleigang; Gengjianfeng; guodong.xu at linaro.org; zhangfei.gao at linaro.org; Fengbaopeng (kevin, Kirin Solution Dept)
??: Re: [PATCH v6 2/5] dt-bindings: scsi: ufs: add document for hisi-ufs
On Thu, Dec 07, 2017 at 06:20:23PM +0800, Li Wei wrote:
> add ufs node document for Hisilicon.
>
> Signed-off-by: Li Wei <liwei213@huawei.com>
> ---
Version history?
> Documentation/devicetree/bindings/ufs/ufs-hisi.txt | 38 ++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
>
> diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
> new file mode 100644
> index 000000000000..73e10698960e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
> @@ -0,0 +1,38 @@
> +* Hisilicon Universal Flash Storage (UFS) Host Controller
> +
> +UFS nodes are defined to describe on-chip UFS hardware macro.
> +Each UFS Host Controller should have its own node.
> +
> +Required properties:
> +- compatible : compatible list, contains one of the following -
> + "hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs
> + host controller present on Hi36xx chipset.
> +- reg : should contain UFS register address space & UFS SYS CTRL register address,
> +- interrupt-parent : interrupt device
> +- interrupts : interrupt number
> +- clocks : List of phandle and clock specifier pairs
> +- clock-names : List of clock input name strings sorted in the same
> + order as the clocks property. "ref_clk", "phy_clk" is optional
> +- resets : reset node register, one reset the clk and the other reset the controller
> +- reset-names : describe reset node register
> +
> +Example:
> +
> + ufs: ufs at ff3b0000 {
> + compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
> + /* 0: HCI standard */
> + /* 1: UFS SYS CTRL */
> + reg = <0x0 0xff3b0000 0x0 0x1000>,
> + <0x0 0xff3b1000 0x0 0x1000>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
> + <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
> + clock-names = "ref_clk", "phy_clk";
> + freq-table-hz = <0 0>, <0 0>;
? Not documented.
> + /* offset: 0x84; bit: 12 */
> + /* offset: 0x84; bit: 7 */
> + resets = <&crg_rst 0x84 12>,
> + <&crg_rst 0x84 7>;
> + reset-names = "rst", "assert";
> + };
> --
> 2.15.0
>
^ permalink raw reply
* 答复: [PATCH v6 1/5] scsi: ufs: add Hisilicon ufs driver code
From: liwei (CM) @ 2017-12-08 1:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOFm3uEgT4gzusQpXb3SnriTdU0nAha2tcVKOoZJRjZw=dx7sg@mail.gmail.com>
Hi,Philippe,
Thank you for your suggestion, and I'll consider that next patch.
-----????-----
???: Philippe Ombredanne [mailto:pombredanne at nexb.com]
????: 2017?12?7? 18:34
???: liwei (CM)
??: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; vinholikatti at gmail.com; James E.J. Bottomley; Martin K. Petersen; khilman at baylibre.com; Arnd Bergmann; gregory.clement at free-electrons.com; Thomas Petazzoni; yamada.masahiro at socionext.com; riku.voipio at linaro.org; treding at nvidia.com; krzk at kernel.org; eric at anholt.net; open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS; LKML; moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE; linux-scsi at vger.kernel.org; zangleigang; Gengjianfeng; guodong.xu at linaro.org; zhangfei.gao at linaro.org; Fengbaopeng (kevin, Kirin Solution Dept)
??: Re: [PATCH v6 1/5] scsi: ufs: add Hisilicon ufs driver code
Dear Li,
On Thu, Dec 7, 2017 at 11:20 AM, Li Wei <liwei213@huawei.com> wrote:
> add Hisilicon ufs driver code.
>
> Signed-off-by: Li Wei <liwei213@huawei.com>
> Signed-off-by: Geng Jianfeng <gengjianfeng@hisilicon.com>
> Signed-off-by: Zang Leigang <zangleigang@hisilicon.com>
> Signed-off-by: Yu Jianfeng <steven.yujianfeng@hisilicon.com>
[]
> --- /dev/null
> +++ b/drivers/scsi/ufs/ufs-hisi.c
> @@ -0,0 +1,624 @@
> +/*
> + *
> + * HiSilicon Hixxxx UFS Driver
> + *
> + * Copyright (c) 2016-2017 Linaro Ltd.
> + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or
> +modify
> + * it under the terms of the GNU General Public License as published
> +by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
Would you consider using the new SPDX license ids instead?
Check Thomas doc patches for instructions.
This would be great and while you are it may be this could be adopted for all HiSilicon and Huawei past, present and future contributions?
Thank you for your kind consideration!
--
Cordially
Philippe Ombredanne
^ permalink raw reply
* [PATCH v7 2/2] media: i2c: Add the ov7740 image sensor driver
From: Yang, Wenyou @ 2017-12-08 1:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207131643.syotl3iwtsqacqay@valkosipuli.retiisi.org.uk>
Hi Sakari,
On 2017/12/7 21:16, Sakari Ailus wrote:
> Hi Wenyou,
>
> On Wed, Dec 06, 2017 at 10:23:43AM +0800, Wenyou Yang wrote:
>> The ov7740 (color) image sensor is a high performance VGA CMOS
>> image snesor, which supports for output formats: RAW RGB and YUV
>> and image sizes: VGA, and QVGA, CIF and any size smaller.
>>
>> Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
>> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
>> ---
>>
>> Changes in v7:
>> - Fix the wrong handle of default register configuration.
>> - Add the missed assignment of ov7740->frmsize.
>>
>> Changes in v6:
>> - Remove unnecessary #include <linux/init>.
>> - Remove unnecessary comments and extra newline.
>> - Add const for some structures.
>> - Add the check of the return value from regmap_write().
>> - Simplify the calling of __v4l2_ctrl_handler_setup().
>> - Add the default format initialization function.
>> - Integrate the set_power() and enable/disable the clock into
>> one function.
>>
>> Changes in v5:
>> - Squash the driver and MAINTAINERS entry patches to one.
>> - Precede the driver patch with the bindings patch.
>>
>> Changes in v4:
>> - Assign 'val' a initial value to avoid warning: 'val' may be
>> used uninitialized.
>> - Rename REG_REG15 to avoid warning: "REG_REG15" redefined.
>>
>> Changes in v3:
>> - Put the MAINTAINERS change to a separate patch.
>>
>> Changes in v2:
>> - Split off the bindings into a separate patch.
>> - Add a new entry to the MAINTAINERS file.
>>
>> MAINTAINERS | 8 +
>> drivers/media/i2c/Kconfig | 8 +
>> drivers/media/i2c/Makefile | 1 +
>> drivers/media/i2c/ov7740.c | 1234 ++++++++++++++++++++++++++++++++++++++++++++
>> 4 files changed, 1251 insertions(+)
>> create mode 100644 drivers/media/i2c/ov7740.c
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 7a52a66aa991..1de965009b13 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -10053,6 +10053,14 @@ S: Maintained
>> F: drivers/media/i2c/ov7670.c
>> F: Documentation/devicetree/bindings/media/i2c/ov7670.txt
>>
>> +OMNIVISION OV7740 SENSOR DRIVER
>> +M: Wenyou Yang <wenyou.yang@microchip.com>
>> +L: linux-media at vger.kernel.org
>> +T: git git://linuxtv.org/media_tree.git
>> +S: Maintained
>> +F: drivers/media/i2c/ov7740.c
>> +F: Documentation/devicetree/bindings/media/i2c/ov7740.txt
>> +
>> ONENAND FLASH DRIVER
>> M: Kyungmin Park <kyungmin.park@samsung.com>
>> L: linux-mtd at lists.infradead.org
>> diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
>> index cb5d7ff82915..00b1c4c031d4 100644
>> --- a/drivers/media/i2c/Kconfig
>> +++ b/drivers/media/i2c/Kconfig
>> @@ -665,6 +665,14 @@ config VIDEO_OV7670
>> OV7670 VGA camera. It currently only works with the M88ALP01
>> controller.
>>
>> +config VIDEO_OV7740
>> + tristate "OmniVision OV7740 sensor support"
>> + depends on I2C && VIDEO_V4L2
>> + depends on MEDIA_CAMERA_SUPPORT
>> + ---help---
>> + This is a Video4Linux2 sensor-level driver for the OmniVision
>> + OV7740 VGA camera sensor.
>> +
>> config VIDEO_OV9650
>> tristate "OmniVision OV9650/OV9652 sensor support"
>> depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
>> diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
>> index 548a9efce966..9b19ec7fcaf4 100644
>> --- a/drivers/media/i2c/Makefile
>> +++ b/drivers/media/i2c/Makefile
>> @@ -68,6 +68,7 @@ obj-$(CONFIG_VIDEO_OV5670) += ov5670.o
>> obj-$(CONFIG_VIDEO_OV6650) += ov6650.o
>> obj-$(CONFIG_VIDEO_OV7640) += ov7640.o
>> obj-$(CONFIG_VIDEO_OV7670) += ov7670.o
>> +obj-$(CONFIG_VIDEO_OV7740) += ov7740.o
>> obj-$(CONFIG_VIDEO_OV9650) += ov9650.o
>> obj-$(CONFIG_VIDEO_OV13858) += ov13858.o
>> obj-$(CONFIG_VIDEO_MT9M032) += mt9m032.o
>> diff --git a/drivers/media/i2c/ov7740.c b/drivers/media/i2c/ov7740.c
>> new file mode 100644
>> index 000000000000..26b56a627377
>> --- /dev/null
>> +++ b/drivers/media/i2c/ov7740.c
>> @@ -0,0 +1,1234 @@
>> +/*
>> + * Copyright (c) 2017 Microchip Corporation.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License version
>> + * 2 as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + */
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/gpio.h>
>> +#include <linux/i2c.h>
>> +#include <linux/module.h>
>> +#include <linux/pm_runtime.h>
>> +#include <linux/regmap.h>
>> +#include <media/v4l2-ctrls.h>
>> +#include <media/v4l2-event.h>
>> +#include <media/v4l2-image-sizes.h>
>> +#include <media/v4l2-subdev.h>
>> +
>> +#define REG_OUTSIZE_LSB 0x34
>> +
>> +/* OV7740 register tables */
>> +#define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
>> +#define REG_BGAIN 0x01 /* blue gain */
>> +#define REG_RGAIN 0x02 /* red gain */
>> +#define REG_GGAIN 0x03 /* green gain */
>> +#define REG_REG04 0x04 /* analog setting, dont change*/
>> +#define REG_BAVG 0x05 /* b channel average */
>> +#define REG_GAVG 0x06 /* g channel average */
>> +#define REG_RAVG 0x07 /* r channel average */
>> +
>> +#define REG_REG0C 0x0C /* filp enable */
>> +#define REG0C_IMG_FLIP 0x80
>> +#define REG0C_IMG_MIRROR 0x40
>> +
>> +#define REG_REG0E 0x0E /* blc line */
>> +#define REG_HAEC 0x0F /* auto exposure cntrl */
>> +#define REG_AEC 0x10 /* auto exposure cntrl */
>> +
>> +#define REG_CLK 0x11 /* Clock control */
>> +#define REG_REG55 0x55 /* Clock PLL DIV/PreDiv */
>> +
>> +#define REG_REG12 0x12
>> +
>> +#define REG_REG13 0x13 /* auto/manual AGC, AEC, Write Balance*/
>> +#define REG13_AEC_EN 0x01
>> +#define REG13_AGC_EN 0x04
>> +
>> +#define REG_REG14 0x14
>> +#define REG_CTRL15 0x15
>> +#define REG15_GAIN_MSB 0x03
>> +
>> +#define REG_REG16 0x16
>> +
>> +#define REG_MIDH 0x1C /* manufacture id byte */
>> +#define REG_MIDL 0x1D /* manufacture id byre */
>> +#define REG_PIDH 0x0A /* Product ID MSB */
>> +#define REG_PIDL 0x0B /* Product ID LSB */
>> +
>> +#define REG_84 0x84 /* lots of stuff */
>> +#define REG_REG38 0x38 /* sub-addr */
>> +
>> +#define REG_AHSTART 0x17 /* Horiz start high bits */
>> +#define REG_AHSIZE 0x18
>> +#define REG_AVSTART 0x19 /* Vert start high bits */
>> +#define REG_AVSIZE 0x1A
>> +#define REG_PSHFT 0x1b /* Pixel delay after HREF */
>> +
>> +#define REG_HOUTSIZE 0x31
>> +#define REG_VOUTSIZE 0x32
>> +#define REG_HVSIZEOFF 0x33
>> +#define REG_REG34 0x34 /* DSP output size H/V LSB*/
>> +
>> +#define REG_ISP_CTRL00 0x80
>> +#define ISPCTRL00_AWB_EN 0x10
>> +#define ISPCTRL00_AWB_GAIN_EN 0x04
>> +
>> +#define REG_YGAIN 0xE2 /* ygain for contrast control */
>> +
>> +#define REG_YBRIGHT 0xE3
>> +#define REG_SGNSET 0xE4
>> +#define SGNSET_YBRIGHT_MASK 0x08
>> +
>> +#define REG_USAT 0xDD
>> +#define REG_VSAT 0xDE
>> +
>> +
>> +struct ov7740 {
>> + struct v4l2_subdev subdev;
>> +#if defined(CONFIG_MEDIA_CONTROLLER)
>> + struct media_pad pad;
>> +#endif
>> + struct v4l2_mbus_framefmt format;
>> + const struct ov7740_pixfmt *fmt; /* Current format */
>> + const struct ov7740_framesize *frmsize;
>> + struct regmap *regmap;
>> + struct clk *xvclk;
>> + struct v4l2_ctrl_handler ctrl_handler;
>> + struct {
>> + /* gain cluster */
>> + struct v4l2_ctrl *auto_gain;
>> + struct v4l2_ctrl *gain;
>> + };
>> + struct {
>> + struct v4l2_ctrl *auto_wb;
>> + struct v4l2_ctrl *blue_balance;
>> + struct v4l2_ctrl *red_balance;
>> + };
>> + struct {
>> + struct v4l2_ctrl *hflip;
>> + struct v4l2_ctrl *vflip;
>> + };
>> + struct {
>> + /* exposure cluster */
>> + struct v4l2_ctrl *auto_exposure;
>> + struct v4l2_ctrl *exposure;
>> + };
>> + struct {
>> + /* saturation/hue cluster */
>> + struct v4l2_ctrl *saturation;
>> + struct v4l2_ctrl *hue;
>> + };
>> + struct v4l2_ctrl *brightness;
>> + struct v4l2_ctrl *contrast;
>> +
>> + struct mutex mutex; /* To serialize asynchronus callbacks */
>> + bool streaming; /* Streaming on/off */
>> +
>> + struct gpio_desc *resetb_gpio;
>> + struct gpio_desc *pwdn_gpio;
>> +};
>> +
>> +struct ov7740_pixfmt {
>> + u32 mbus_code;
>> + enum v4l2_colorspace colorspace;
>> + const struct reg_sequence *regs;
>> + u32 reg_num;
>> +};
>> +
>> +struct ov7740_framesize {
>> + u16 width;
>> + u16 height;
>> + const struct reg_sequence *regs;
>> + u32 reg_num;
>> +};
>> +
>> +static const struct reg_sequence ov7740_vga[] = {
>> + {0x55, 0x40},
>> + {0x11, 0x02},
>> +
>> + {0xd5, 0x10},
>> + {0x0c, 0x12},
>> + {0x0d, 0x34},
>> + {0x17, 0x25},
>> + {0x18, 0xa0},
>> + {0x19, 0x03},
>> + {0x1a, 0xf0},
>> + {0x1b, 0x89},
>> + {0x22, 0x03},
>> + {0x29, 0x18},
>> + {0x2b, 0xf8},
>> + {0x2c, 0x01},
>> + {REG_HOUTSIZE, 0xa0},
>> + {REG_VOUTSIZE, 0xf0},
>> + {0x33, 0xc4},
>> + {REG_OUTSIZE_LSB, 0x0},
>> + {0x35, 0x05},
>> + {0x04, 0x60},
>> + {0x27, 0x80},
>> + {0x3d, 0x0f},
>> + {0x3e, 0x80},
>> + {0x3f, 0x40},
>> + {0x40, 0x7f},
>> + {0x41, 0x6a},
>> + {0x42, 0x29},
>> + {0x44, 0x22},
>> + {0x45, 0x41},
>> + {0x47, 0x02},
>> + {0x49, 0x64},
>> + {0x4a, 0xa1},
>> + {0x4b, 0x40},
>> + {0x4c, 0x1a},
>> + {0x4d, 0x50},
>> + {0x4e, 0x13},
>> + {0x64, 0x00},
>> + {0x67, 0x88},
>> + {0x68, 0x1a},
>> +
>> + {0x14, 0x28},
>> + {0x24, 0x3c},
>> + {0x25, 0x30},
>> + {0x26, 0x72},
>> + {0x50, 0x97},
>> + {0x51, 0x1f},
>> + {0x52, 0x00},
>> + {0x53, 0x00},
>> + {0x20, 0x00},
>> + {0x21, 0xcf},
>> + {0x50, 0x4b},
>> + {0x38, 0x14},
>> + {0xe9, 0x00},
>> + {0x56, 0x55},
>> + {0x57, 0xff},
>> + {0x58, 0xff},
>> + {0x59, 0xff},
>> + {0x5f, 0x04},
>> + {0xec, 0x00},
>> + {0x13, 0xff},
>> +
>> + {0x81, 0x3f},
>> + {0x82, 0x32},
>> + {0x38, 0x11},
>> + {0x84, 0x70},
>> + {0x85, 0x00},
>> + {0x86, 0x03},
>> + {0x87, 0x01},
>> + {0x88, 0x05},
>> + {0x89, 0x30},
>> + {0x8d, 0x30},
>> + {0x8f, 0x85},
>> + {0x93, 0x30},
>> + {0x95, 0x85},
>> + {0x99, 0x30},
>> + {0x9b, 0x85},
>> +
>> + {0x9c, 0x08},
>> + {0x9d, 0x12},
>> + {0x9e, 0x23},
>> + {0x9f, 0x45},
>> + {0xa0, 0x55},
>> + {0xa1, 0x64},
>> + {0xa2, 0x72},
>> + {0xa3, 0x7f},
>> + {0xa4, 0x8b},
>> + {0xa5, 0x95},
>> + {0xa6, 0xa7},
>> + {0xa7, 0xb5},
>> + {0xa8, 0xcb},
>> + {0xa9, 0xdd},
>> + {0xaa, 0xec},
>> + {0xab, 0x1a},
>> +
>> + {0xce, 0x78},
>> + {0xcf, 0x6e},
>> + {0xd0, 0x0a},
>> + {0xd1, 0x0c},
>> + {0xd2, 0x84},
>> + {0xd3, 0x90},
>> + {0xd4, 0x1e},
>> +
>> + {0x5a, 0x24},
>> + {0x5b, 0x1f},
>> + {0x5c, 0x88},
>> + {0x5d, 0x60},
>> +
>> + {0xac, 0x6e},
>> + {0xbe, 0xff},
>> + {0xbf, 0x00},
>> +
>> + {0x0f, 0x1d},
>> + {0x0f, 0x1f},
>> +};
>> +
>> +static const struct ov7740_framesize ov7740_framesizes[] = {
>> + {
>> + .width = VGA_WIDTH,
>> + .height = VGA_HEIGHT,
>> + .regs = ov7740_vga,
>> + .reg_num = ARRAY_SIZE(ov7740_vga),
>> + },
>> +};
>> +
>> +#ifdef CONFIG_VIDEO_ADV_DEBUG
>> +static int ov7740_get_register(struct v4l2_subdev *sd,
>> + struct v4l2_dbg_register *reg)
>> +{
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> + struct regmap *regmap = ov7740->regmap;
>> + unsigned int val = 0;
>> + int ret;
>> +
>> + ret = regmap_read(regmap, reg->reg & 0xff, &val);
>> + reg->val = val;
>> + reg->size = 1;
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_set_register(struct v4l2_subdev *sd,
>> + const struct v4l2_dbg_register *reg)
>> +{
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> + struct regmap *regmap = ov7740->regmap;
>> +
>> + regmap_write(regmap, reg->reg & 0xff, reg->val & 0xff);
>> +
>> + return 0;
>> +}
>> +#endif
>> +
>> +static int ov7740_set_power(struct ov7740 *ov7740, int on)
>> +{
>> + int ret;
>> +
>> + if (on) {
>> + ret = clk_prepare_enable(ov7740->xvclk);
>> + if (ret)
>> + return ret;
>> +
>> + if (ov7740->pwdn_gpio)
>> + gpiod_direction_output(ov7740->pwdn_gpio, 0);
>> +
>> + if (ov7740->resetb_gpio) {
>> + gpiod_set_value(ov7740->resetb_gpio, 1);
>> + usleep_range(500, 1000);
>> + gpiod_set_value(ov7740->resetb_gpio, 0);
>> + usleep_range(3000, 5000);
>> + }
>> + } else {
>> + clk_disable_unprepare(ov7740->xvclk);
>> +
>> + if (ov7740->pwdn_gpio)
>> + gpiod_direction_output(ov7740->pwdn_gpio, 0);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static struct v4l2_subdev_core_ops ov7740_subdev_core_ops = {
>> + .log_status = v4l2_ctrl_subdev_log_status,
>> +#ifdef CONFIG_VIDEO_ADV_DEBUG
>> + .g_register = ov7740_get_register,
>> + .s_register = ov7740_set_register,
>> +#endif
>> + .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
>> + .unsubscribe_event = v4l2_event_subdev_unsubscribe,
>> +};
>> +
>> +static int ov7740_set_white_balance(struct ov7740 *ov7740, int awb)
>> +{
>> + struct regmap *regmap = ov7740->regmap;
>> + unsigned int value;
>> + int ret;
>> +
>> + ret = regmap_read(regmap, REG_ISP_CTRL00, &value);
>> + if (!ret) {
>> + if (awb)
>> + value |= (ISPCTRL00_AWB_EN | ISPCTRL00_AWB_GAIN_EN);
>> + else
>> + value &= ~(ISPCTRL00_AWB_EN | ISPCTRL00_AWB_GAIN_EN);
>> + ret = regmap_write(regmap, REG_ISP_CTRL00, value);
>> + if (ret)
>> + return ret;
>> + }
>> +
>> + if (!awb) {
>> + ret = regmap_write(regmap, REG_BGAIN,
>> + ov7740->blue_balance->val);
>> + if (ret)
>> + return ret;
>> +
>> + ret = regmap_write(regmap, REG_RGAIN, ov7740->red_balance->val);
>> + if (ret)
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_set_saturation(struct regmap *regmap, int value)
>> +{
>> + int ret;
>> +
>> + ret = regmap_write(regmap, REG_USAT, (unsigned char)value);
>> + if (ret)
>> + return ret;
>> +
>> + return regmap_write(regmap, REG_VSAT, (unsigned char)value);
>> +}
>> +
>> +static int ov7740_set_gain(struct regmap *regmap, int value)
>> +{
>> + int ret;
>> +
>> + ret = regmap_write(regmap, REG_GAIN, value & 0xff);
>> + if (ret)
>> + return ret;
>> +
>> + ret = regmap_update_bits(regmap, REG_CTRL15,
>> + REG15_GAIN_MSB, (value >> 8) & 0x3);
>> + if (!ret)
>> + ret = regmap_update_bits(regmap, REG_REG13, REG13_AGC_EN, 0);
>> +
>> + return ret;
>> +}
>> +
>> +static int ov7740_set_autogain(struct regmap *regmap, int value)
>> +{
>> + unsigned int reg;
>> + int ret;
>> +
>> + ret = regmap_read(regmap, REG_REG13, ®);
>> + if (ret)
>> + return ret;
>> + if (value)
>> + reg |= REG13_AGC_EN;
>> + else
>> + reg &= ~REG13_AGC_EN;
>> + return regmap_write(regmap, REG_REG13, reg);
>> +}
>> +
>> +static int ov7740_set_brightness(struct regmap *regmap, int value)
>> +{
>> + /* Turn off AEC/AGC */
>> + regmap_update_bits(regmap, REG_REG13, REG13_AEC_EN, 0);
>> + regmap_update_bits(regmap, REG_REG13, REG13_AGC_EN, 0);
>> +
>> + if (value >= 0) {
>> + regmap_write(regmap, REG_YBRIGHT, (unsigned char)value);
>> + regmap_update_bits(regmap, REG_SGNSET, SGNSET_YBRIGHT_MASK, 0);
>> + } else{
>> + regmap_write(regmap, REG_YBRIGHT, (unsigned char)(-value));
>> + regmap_update_bits(regmap, REG_SGNSET, SGNSET_YBRIGHT_MASK, 1);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_set_contrast(struct regmap *regmap, int value)
>> +{
>> + return regmap_write(regmap, REG_YGAIN, (unsigned char)value);
>> +}
>> +
>> +static int ov7740_get_gain(struct ov7740 *ov7740, struct v4l2_ctrl *ctrl)
>> +{
>> + struct regmap *regmap = ov7740->regmap;
>> + unsigned int value0, value1;
>> + int ret;
>> +
>> + if (!ctrl->val)
>> + return 0;
>> +
>> + ret = regmap_read(regmap, REG_GAIN, &value0);
>> + if (ret)
>> + return ret;
>> + ret = regmap_read(regmap, REG_CTRL15, &value1);
>> + if (ret)
>> + return ret;
>> +
>> + ov7740->gain->val = (value1 << 8) | (value0 & 0xff);
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_set_exp(struct regmap *regmap, int value)
>> +{
>> + int ret;
>> +
>> + /* Turn off AEC/AGC */
>> + ret = regmap_update_bits(regmap, REG_REG13,
>> + REG13_AEC_EN | REG13_AGC_EN, 0);
>> + if (ret)
>> + return ret;
>> +
>> + ret = regmap_write(regmap, REG_AEC, (unsigned char)value);
>> + if (ret)
>> + return ret;
>> +
>> + return regmap_write(regmap, REG_HAEC, (unsigned char)(value >> 8));
>> +}
>> +
>> +static int ov7740_set_autoexp(struct regmap *regmap,
>> + enum v4l2_exposure_auto_type value)
>> +{
>> + unsigned int reg;
>> + int ret;
>> +
>> + ret = regmap_read(regmap, REG_REG13, ®);
>> + if (!ret) {
>> + if (value == V4L2_EXPOSURE_AUTO)
>> + reg |= (REG13_AEC_EN | REG13_AGC_EN);
>> + else
>> + reg &= ~(REG13_AEC_EN | REG13_AGC_EN);
>> + ret = regmap_write(regmap, REG_REG13, reg);
>> + }
>> +
>> + return ret;
>> +}
>> +
>> +
>> +static int ov7740_get_volatile_ctrl(struct v4l2_ctrl *ctrl)
>> +{
>> + struct ov7740 *ov7740 = container_of(ctrl->handler,
>> + struct ov7740, ctrl_handler);
>> + int ret;
>> +
>> + switch (ctrl->id) {
>> + case V4L2_CID_AUTOGAIN:
>> + ret = ov7740_get_gain(ov7740, ctrl);
>> + break;
>> + default:
>> + ret = -EINVAL;
>> + break;
>> + }
>> + return ret;
>> +}
>> +
>> +static int ov7740_set_ctrl(struct v4l2_ctrl *ctrl)
>> +{
>> + struct ov7740 *ov7740 = container_of(ctrl->handler,
>> + struct ov7740, ctrl_handler);
>> + struct i2c_client *client = v4l2_get_subdevdata(&ov7740->subdev);
>> + struct regmap *regmap = ov7740->regmap;
>> + int ret;
>> + u8 val = 0;
>> +
>> + if (pm_runtime_get_if_in_use(&client->dev) <= 0)
>> + return 0;
>> +
>> + switch (ctrl->id) {
>> + case V4L2_CID_AUTO_WHITE_BALANCE:
>> + ret = ov7740_set_white_balance(ov7740, ctrl->val);
>> + break;
>> + case V4L2_CID_SATURATION:
>> + ret = ov7740_set_saturation(regmap, ctrl->val);
>> + break;
>> + case V4L2_CID_BRIGHTNESS:
>> + ret = ov7740_set_brightness(regmap, ctrl->val);
>> + break;
>> + case V4L2_CID_CONTRAST:
>> + ret = ov7740_set_contrast(regmap, ctrl->val);
>> + break;
>> + case V4L2_CID_VFLIP:
>> + ret = regmap_update_bits(regmap, REG_REG0C,
>> + REG0C_IMG_FLIP, val);
>> + break;
>> + case V4L2_CID_HFLIP:
>> + val = ctrl->val ? REG0C_IMG_MIRROR : 0x00;
>> + ret = regmap_update_bits(regmap, REG_REG0C,
>> + REG0C_IMG_MIRROR, val);
>> + break;
>> + case V4L2_CID_AUTOGAIN:
>> + if (!ctrl->val)
>> + return ov7740_set_gain(regmap, ov7740->gain->val);
>> +
>> + ret = ov7740_set_autogain(regmap, ctrl->val);
>> + break;
>> +
>> + case V4L2_CID_EXPOSURE_AUTO:
>> + if (ctrl->val == V4L2_EXPOSURE_MANUAL)
>> + return ov7740_set_exp(regmap, ov7740->exposure->val);
>> +
>> + ret = ov7740_set_autoexp(regmap, ctrl->val);
>> + break;
>> + default:
>> + ret = -EINVAL;
>> + break;
>> + }
>> +
>> + pm_runtime_put(&client->dev);
>> +
>> + return ret;
>> +}
>> +
>> +static const struct v4l2_ctrl_ops ov7740_ctrl_ops = {
>> + .g_volatile_ctrl = ov7740_get_volatile_ctrl,
>> + .s_ctrl = ov7740_set_ctrl,
>> +};
>> +
>> +static int ov7740_start_streaming(struct ov7740 *ov7740)
>> +{
>> + int ret;
>> +
>> + if (ov7740->fmt) {
>> + ret = regmap_multi_reg_write(ov7740->regmap,
>> + ov7740->fmt->regs,
>> + ov7740->fmt->reg_num);
>> + if (ret)
>> + return ret;
>> + }
>> +
>> + if (ov7740->frmsize) {
>> + ret = regmap_multi_reg_write(ov7740->regmap,
>> + ov7740->frmsize->regs,
>> + ov7740->frmsize->reg_num);
>> + if (ret)
>> + return ret;
>> + }
>> +
>> + return __v4l2_ctrl_handler_setup(ov7740->subdev.ctrl_handler);
>> +}
>> +
>> +static int ov7740_set_stream(struct v4l2_subdev *sd, int enable)
>> +{
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> + struct i2c_client *client = v4l2_get_subdevdata(sd);
>> + int ret = 0;
>> +
>> + mutex_lock(&ov7740->mutex);
>> + if (ov7740->streaming == enable) {
>> + mutex_unlock(&ov7740->mutex);
>> + return 0;
>> + }
>> +
>> + if (enable) {
>> + ret = pm_runtime_get_sync(&client->dev);
>> + if (ret < 0) {
>> + pm_runtime_put_noidle(&client->dev);
>> + goto err_unlock;
>> + }
>> +
>> + ret = ov7740_start_streaming(ov7740);
>> + if (ret)
>> + goto err_rpm_put;
>> + } else {
>> + pm_runtime_put(&client->dev);
>> + }
>> +
>> + ov7740->streaming = enable;
>> +
>> + mutex_unlock(&ov7740->mutex);
>> + return ret;
>> +
>> +err_rpm_put:
>> + pm_runtime_put(&client->dev);
>> +err_unlock:
>> + mutex_unlock(&ov7740->mutex);
>> + return ret;
>> +}
>> +
>> +static int ov7740_get_parm(struct v4l2_subdev *sd,
>> + struct v4l2_streamparm *parms)
>> +{
>> + struct v4l2_captureparm *cp = &parms->parm.capture;
>> + struct v4l2_fract *tpf = &cp->timeperframe;
>> +
>> + if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
>> + return -EINVAL;
>> +
>> + memset(cp, 0, sizeof(struct v4l2_captureparm));
>> + cp->capability = V4L2_CAP_TIMEPERFRAME;
>> +
>> + tpf->numerator = 1;
>> + tpf->denominator = 60;
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_set_parm(struct v4l2_subdev *sd,
>> + struct v4l2_streamparm *parms)
>> +{
>> + struct v4l2_captureparm *cp = &parms->parm.capture;
>> + struct v4l2_fract *tpf = &cp->timeperframe;
>> +
>> + if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
>> + return -EINVAL;
>> + if (cp->extendedmode != 0)
>> + return -EINVAL;
>> +
>> + cp->capability = V4L2_CAP_TIMEPERFRAME;
>> +
>> + tpf->numerator = 1;
>> + tpf->denominator = 60;
>> +
>> + return 0;
>> +}
>> +
>> +static struct v4l2_subdev_video_ops ov7740_subdev_video_ops = {
>> + .s_stream = ov7740_set_stream,
>> + .s_parm = ov7740_set_parm,
>> + .g_parm = ov7740_get_parm,
>> +};
>> +
>> +static const struct reg_sequence ov7740_format_yuyv[] = {
>> + {0x12, 0x00},
>> + {0x36, 0x3f},
>> + {0x80, 0x7f},
>> + {0x83, 0x01},
>> +};
>> +
>> +static const struct reg_sequence ov7740_format_bggr8[] = {
>> + {0x36, 0x2f},
>> + {0x80, 0x01},
>> + {0x83, 0x04},
>> +};
>> +
>> +static const struct ov7740_pixfmt ov7740_formats[] = {
>> + {
>> + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
>> + .colorspace = V4L2_COLORSPACE_SRGB,
>> + .regs = ov7740_format_yuyv,
>> + .reg_num = ARRAY_SIZE(ov7740_format_yuyv),
>> + },
>> + {
>> + .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
>> + .colorspace = V4L2_COLORSPACE_SRGB,
>> + .regs = ov7740_format_bggr8,
>> + .reg_num = ARRAY_SIZE(ov7740_format_bggr8),
>> + }
>> +};
>> +#define N_OV7740_FMTS ARRAY_SIZE(ov7740_formats)
>> +
>> +static int ov7740_enum_mbus_code(struct v4l2_subdev *sd,
>> + struct v4l2_subdev_pad_config *cfg,
>> + struct v4l2_subdev_mbus_code_enum *code)
>> +{
>> + if (code->pad || code->index >= N_OV7740_FMTS)
>> + return -EINVAL;
>> +
>> + code->code = ov7740_formats[code->index].mbus_code;
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_enum_frame_interval(struct v4l2_subdev *sd,
>> + struct v4l2_subdev_pad_config *cfg,
>> + struct v4l2_subdev_frame_interval_enum *fie)
>> +{
>> + if (fie->pad)
>> + return -EINVAL;
>> +
>> + if (fie->index >= 1)
>> + return -EINVAL;
>> +
>> + if ((fie->width != VGA_WIDTH) || (fie->height != VGA_HEIGHT))
>> + return -EINVAL;
>> +
>> + fie->interval.numerator = 1;
>> + fie->interval.denominator = 60;
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_enum_frame_size(struct v4l2_subdev *sd,
>> + struct v4l2_subdev_pad_config *cfg,
>> + struct v4l2_subdev_frame_size_enum *fse)
>> +{
>> + if (fse->pad)
>> + return -EINVAL;
>> +
>> + if (fse->index > 0)
>> + return -EINVAL;
>> +
>> + fse->min_width = fse->max_width = VGA_WIDTH;
>> + fse->min_height = fse->max_height = VGA_HEIGHT;
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_try_fmt_internal(struct v4l2_subdev *sd,
>> + struct v4l2_mbus_framefmt *fmt,
>> + const struct ov7740_pixfmt **ret_fmt,
>> + const struct ov7740_framesize **ret_frmsize)
>> +{
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> + const struct ov7740_framesize *fsize = &ov7740_framesizes[0];
>> + int index, i;
>> +
>> + for (index = 0; index < N_OV7740_FMTS; index++) {
>> + if (ov7740_formats[index].mbus_code == fmt->code)
>> + break;
>> + }
>> + if (index >= N_OV7740_FMTS) {
>> + /* default to first format */
>> + index = 0;
>> + fmt->code = ov7740_formats[0].mbus_code;
>> + }
>> + if (ret_fmt != NULL)
>> + *ret_fmt = ov7740_formats + index;
>> +
>> + for (i = 0; i < ARRAY_SIZE(ov7740_framesizes); i++) {
>> + if ((fsize->width >= fmt->width) &&
>> + (fsize->height >= fmt->height)) {
>> + fmt->width = fsize->width;
>> + fmt->height = fsize->height;
>> + break;
>> + }
>> +
>> + fsize++;
>> + }
>> +
>> + if (ret_frmsize != NULL)
>> + *ret_frmsize = fsize;
>> +
>> + fmt->field = V4L2_FIELD_NONE;
>> + fmt->colorspace = ov7740_formats[index].colorspace;
>> +
>> + ov7740->format = *fmt;
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_set_fmt(struct v4l2_subdev *sd,
>> + struct v4l2_subdev_pad_config *cfg,
>> + struct v4l2_subdev_format *format)
>> +{
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> + const struct ov7740_pixfmt *ovfmt;
>> + const struct ov7740_framesize *fsize;
>> +#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
>> + struct v4l2_mbus_framefmt *mbus_fmt;
>> +#endif
>> + int ret;
>> +
>> + mutex_lock(&ov7740->mutex);
>> + if (format->pad) {
>> + ret = -EINVAL;
>> + goto error;
>> + }
>> +
>> + if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
>> + ret = ov7740_try_fmt_internal(sd, &format->format, NULL, NULL);
>> + if (ret)
>> + goto error;
>> +#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
>> + mbus_fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);
>> + *mbus_fmt = format->format;
>> +
>> + mutex_unlock(&ov7740->mutex);
>> + return 0;
>> +#else
>> + ret = -ENOTTY;
>> + goto error;
>> +#endif
>> + }
>> +
>> + ret = ov7740_try_fmt_internal(sd, &format->format, &ovfmt, &fsize);
>> + if (ret)
>> + goto error;
>> +
>> + if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
>> + regmap_multi_reg_write(ov7740->regmap,
>> + ovfmt->regs, ovfmt->reg_num);
>> +
>> + regmap_multi_reg_write(ov7740->regmap,
>> + fsize->regs, fsize->reg_num);
>> + }
> Now that these registers are written at stream start, shouldn't you omit
> the writes here?
Yes, Agree.
>
> Further on, it would appear that the registers that contain the format
> configuration, also will contain the command to start streaming. If this is
> the case, shouldn't this be the last operation in the streaming start
> sequence?
Right.
>
>> +
>> + ov7740->fmt = ovfmt;
>> + ov7740->frmsize = fsize;
>> +
>> + mutex_unlock(&ov7740->mutex);
>> + return 0;
>> +
>> +error:
>> + mutex_unlock(&ov7740->mutex);
>> + return ret;
>> +}
>> +
>> +static int ov7740_get_fmt(struct v4l2_subdev *sd,
>> + struct v4l2_subdev_pad_config *cfg,
>> + struct v4l2_subdev_format *format)
>> +{
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> +#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
>> + struct v4l2_mbus_framefmt *mbus_fmt;
>> +#endif
>> + int ret = 0;
>> +
>> + mutex_lock(&ov7740->mutex);
>> + if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
>> +#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
>> + mbus_fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
>> + format->format = *mbus_fmt;
>> + ret = 0;
>> +#else
>> + ret = -ENOTTY;
>> +#endif
>> + } else {
>> + format->format = ov7740->format;
>> + }
>> + mutex_unlock(&ov7740->mutex);
>> +
>> + return ret;
>> +}
>> +
>> +static const struct v4l2_subdev_pad_ops ov7740_subdev_pad_ops = {
>> + .enum_frame_interval = ov7740_enum_frame_interval,
>> + .enum_frame_size = ov7740_enum_frame_size,
>> + .enum_mbus_code = ov7740_enum_mbus_code,
>> + .get_fmt = ov7740_get_fmt,
>> + .set_fmt = ov7740_set_fmt,
>> +};
>> +
>> +static const struct v4l2_subdev_ops ov7740_subdev_ops = {
>> + .core = &ov7740_subdev_core_ops,
>> + .video = &ov7740_subdev_video_ops,
>> + .pad = &ov7740_subdev_pad_ops,
>> +};
>> +
>> +static void ov7740_get_default_format(struct v4l2_subdev *sd,
>> + struct v4l2_mbus_framefmt *format)
>> +{
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> +
>> + format->width = ov7740->frmsize->width;
>> + format->height = ov7740->frmsize->height;
>> + format->colorspace = ov7740->fmt->colorspace;
>> + format->code = ov7740->fmt->mbus_code;
>> + format->field = V4L2_FIELD_NONE;
>> +}
>> +
>> +#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
>> +static int ov7740_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
>> +{
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> + struct v4l2_mbus_framefmt *format =
>> + v4l2_subdev_get_try_format(sd, fh->pad, 0);
>> +
>> + mutex_lock(&ov7740->mutex);
>> + ov7740_get_default_format(sd, format);
>> + mutex_unlock(&ov7740->mutex);
>> +
>> + return 0;
>> +}
>> +
>> +static const struct v4l2_subdev_internal_ops ov7740_subdev_internal_ops = {
>> + .open = ov7740_open,
>> +};
>> +#endif
>> +
>> +static int ov7740_probe_dt(struct i2c_client *client,
>> + struct ov7740 *ov7740)
>> +{
>> + ov7740->resetb_gpio = devm_gpiod_get_optional(&client->dev, "reset",
>> + GPIOD_OUT_HIGH);
>> + if (IS_ERR(ov7740->resetb_gpio)) {
>> + dev_info(&client->dev, "can't get %s GPIO\n", "reset");
>> + return PTR_ERR(ov7740->resetb_gpio);
>> + }
>> +
>> + ov7740->pwdn_gpio = devm_gpiod_get_optional(&client->dev, "powerdown",
>> + GPIOD_OUT_LOW);
>> + if (IS_ERR(ov7740->pwdn_gpio)) {
>> + dev_info(&client->dev, "can't get %s GPIO\n", "powerdown");
>> + return PTR_ERR(ov7740->pwdn_gpio);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_detect(struct ov7740 *ov7740)
>> +{
>> + struct regmap *regmap = ov7740->regmap;
>> + unsigned int midh, midl, pidh, pidl;
>> + int ret;
>> +
>> + ret = regmap_read(regmap, REG_MIDH, &midh);
>> + if (ret)
>> + return ret;
>> + if (midh != 0x7f)
>> + return -ENODEV;
>> +
>> + ret = regmap_read(regmap, REG_MIDL, &midl);
>> + if (ret)
>> + return ret;
>> + if (midl != 0xa2)
>> + return -ENODEV;
>> +
>> + ret = regmap_read(regmap, REG_PIDH, &pidh);
>> + if (ret)
>> + return ret;
>> + if (pidh != 0x77)
>> + return -ENODEV;
>> +
>> + ret = regmap_read(regmap, REG_PIDL, &pidl);
>> + if (ret)
>> + return ret;
>> + if ((pidl != 0x40) && (pidl != 0x41) && (pidl != 0x42))
>> + return -ENODEV;
>> +
>> + return 0;
>> +}
>> +
>> +static int ov7740_init_controls(struct ov7740 *ov7740)
>> +{
>> + struct i2c_client *client = v4l2_get_subdevdata(&ov7740->subdev);
>> + struct v4l2_ctrl_handler *ctrl_hdlr = &ov7740->ctrl_handler;
>> + int ret;
>> +
>> + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 2);
>> + if (ret < 0)
>> + return ret;
>> +
>> + ctrl_hdlr->lock = &ov7740->mutex;
>> + ov7740->auto_wb = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_AUTO_WHITE_BALANCE,
>> + 0, 1, 1, 1);
>> + ov7740->blue_balance = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_BLUE_BALANCE,
>> + 0, 0xff, 1, 0x80);
>> + ov7740->red_balance = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_RED_BALANCE,
>> + 0, 0xff, 1, 0x80);
>> +
>> + ov7740->brightness = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_BRIGHTNESS,
>> + -255, 255, 1, 0);
>> + ov7740->contrast = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_CONTRAST,
>> + 0, 127, 1, 0x20);
>> + ov7740->saturation = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_SATURATION, 0, 256, 1, 0x80);
>> + ov7740->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_HFLIP, 0, 1, 1, 0);
>> + ov7740->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_VFLIP, 0, 1, 1, 0);
>> + ov7740->gain = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_GAIN, 0, 1023, 1, 500);
>> + ov7740->auto_gain = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
>> + ov7740->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
>> + V4L2_CID_EXPOSURE, 0, 65535, 1, 500);
>> + ov7740->auto_exposure = v4l2_ctrl_new_std_menu(ctrl_hdlr,
>> + &ov7740_ctrl_ops,
>> + V4L2_CID_EXPOSURE_AUTO,
>> + V4L2_EXPOSURE_MANUAL, 0,
>> + V4L2_EXPOSURE_AUTO);
>> +
>> + ov7740->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
>> + ov7740->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
>> +
>> + v4l2_ctrl_auto_cluster(3, &ov7740->auto_wb, 0, false);
>> + v4l2_ctrl_auto_cluster(2, &ov7740->auto_gain, 0, true);
>> + v4l2_ctrl_auto_cluster(2, &ov7740->auto_exposure,
>> + V4L2_EXPOSURE_MANUAL, false);
>> + v4l2_ctrl_cluster(2, &ov7740->hflip);
>> +
>> + ret = v4l2_ctrl_handler_setup(ctrl_hdlr);
>> + if (ret) {
>> + dev_err(&client->dev, "%s control init failed (%d)\n",
>> + __func__, ret);
>> + goto error;
>> + }
>> +
>> + ov7740->subdev.ctrl_handler = ctrl_hdlr;
>> + return 0;
>> +
>> +error:
>> + v4l2_ctrl_handler_free(ctrl_hdlr);
>> + mutex_destroy(&ov7740->mutex);
>> + return ret;
>> +}
>> +
>> +static void ov7740_free_controls(struct ov7740 *ov7740)
>> +{
>> + v4l2_ctrl_handler_free(ov7740->subdev.ctrl_handler);
>> + mutex_destroy(&ov7740->mutex);
>> +}
>> +
>> +#define OV7740_MAX_REGISTER 0xff
>> +static const struct regmap_config ov7740_regmap_config = {
>> + .reg_bits = 8,
>> + .val_bits = 8,
>> + .max_register = OV7740_MAX_REGISTER,
>> +};
>> +
>> +static int ov7740_probe(struct i2c_client *client,
>> + const struct i2c_device_id *id)
>> +{
>> + struct ov7740 *ov7740;
>> + struct v4l2_subdev *sd;
>> + int ret;
>> +
>> + if (!i2c_check_functionality(client->adapter,
>> + I2C_FUNC_SMBUS_BYTE_DATA)) {
>> + dev_err(&client->dev,
>> + "OV7740: I2C-Adapter doesn't support SMBUS\n");
>> + return -EIO;
>> + }
>> +
>> + ov7740 = devm_kzalloc(&client->dev, sizeof(*ov7740), GFP_KERNEL);
>> + if (!ov7740)
>> + return -ENOMEM;
>> +
>> + ov7740->xvclk = devm_clk_get(&client->dev, "xvclk");
>> + if (IS_ERR(ov7740->xvclk)) {
>> + ret = PTR_ERR(ov7740->xvclk);
>> + dev_err(&client->dev,
>> + "OV7740: fail to get xvclk: %d\n", ret);
>> + return ret;
>> + }
>> +
>> + ret = ov7740_probe_dt(client, ov7740);
>> + if (ret)
>> + return ret;
>> +
>> + ov7740->regmap = devm_regmap_init_i2c(client, &ov7740_regmap_config);
>> + if (IS_ERR(ov7740->regmap)) {
>> + ret = PTR_ERR(ov7740->regmap);
>> + dev_err(&client->dev, "Failed to allocate register map: %d\n",
>> + ret);
>> + return ret;
>> + }
>> +
>> + sd = &ov7740->subdev;
>> + client->flags |= I2C_CLIENT_SCCB;
>> + v4l2_i2c_subdev_init(sd, client, &ov7740_subdev_ops);
>> +
>> +#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
>> + sd->internal_ops = &ov7740_subdev_internal_ops;
>> + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
>> +#endif
>> +
>> +#if defined(CONFIG_MEDIA_CONTROLLER)
>> + ov7740->pad.flags = MEDIA_PAD_FL_SOURCE;
>> + sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
>> + ret = media_entity_pads_init(&sd->entity, 1, &ov7740->pad);
>> + if (ret)
>> + return ret;
>> +#endif
>> +
>> + ret = ov7740_set_power(ov7740, 1);
>> + if (ret)
>> + return ret;
>> +
>> + ret = ov7740_detect(ov7740);
>> + if (ret)
>> + goto error_detect;
>> +
>> + mutex_init(&ov7740->mutex);
>> +
>> + ret = ov7740_init_controls(ov7740);
>> + if (ret)
>> + goto error_init_controls;
>> +
>> + v4l_info(client, "chip found @ 0x%02x (%s)\n",
>> + client->addr << 1, client->adapter->name);
>> +
>> + ov7740->fmt = &ov7740_formats[0];
>> + ov7740->frmsize = &ov7740_framesizes[0];
>> +
>> + ov7740_get_default_format(sd, &ov7740->format);
>> +
>> + ret = v4l2_async_register_subdev(sd);
>> + if (ret)
>> + goto error_async_register;
>> +
>> + pm_runtime_set_active(&client->dev);
>> + pm_runtime_enable(&client->dev);
>> + pm_runtime_idle(&client->dev);
>> +
>> + return 0;
>> +
>> +error_async_register:
>> + v4l2_ctrl_handler_free(ov7740->subdev.ctrl_handler);
>> +error_init_controls:
>> + ov7740_free_controls(ov7740);
>> +error_detect:
>> + ov7740_set_power(ov7740, 0);
>> + media_entity_cleanup(&ov7740->subdev.entity);
>> +
>> + return ret;
>> +}
>> +
>> +static int ov7740_remove(struct i2c_client *client)
>> +{
>> + struct v4l2_subdev *sd = i2c_get_clientdata(client);
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> +
>> + mutex_destroy(&ov7740->mutex);
>> + v4l2_ctrl_handler_free(ov7740->subdev.ctrl_handler);
>> +#if defined(CONFIG_MEDIA_CONTROLLER)
>> + media_entity_cleanup(&ov7740->subdev.entity);
>> +#endif
>> + v4l2_async_unregister_subdev(sd);
>> + ov7740_free_controls(ov7740);
>> +
>> + pm_runtime_get_sync(&client->dev);
>> + pm_runtime_disable(&client->dev);
>> + pm_runtime_set_suspended(&client->dev);
>> + pm_runtime_put_noidle(&client->dev);
>> +
>> + ov7740_set_power(ov7740, 0);
>> + return 0;
>> +}
>> +
>> +static int __maybe_unused ov7740_runtime_suspend(struct device *dev)
>> +{
>> + struct i2c_client *client = to_i2c_client(dev);
>> + struct v4l2_subdev *sd = i2c_get_clientdata(client);
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> +
>> + ov7740_set_power(ov7740, 0);
>> +
>> + return 0;
>> +}
>> +
>> +static int __maybe_unused ov7740_runtime_resume(struct device *dev)
>> +{
>> + struct i2c_client *client = to_i2c_client(dev);
>> + struct v4l2_subdev *sd = i2c_get_clientdata(client);
>> + struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
>> +
>> + return ov7740_set_power(ov7740, 1);
>> +}
>> +
>> +static const struct i2c_device_id ov7740_id[] = {
>> + { "ov7740", 0 },
>> + { /* sentinel */ }
>> +};
>> +MODULE_DEVICE_TABLE(i2c, ov7740_id);
>> +
>> +static const struct dev_pm_ops ov7740_pm_ops = {
>> + SET_RUNTIME_PM_OPS(ov7740_runtime_suspend, ov7740_runtime_resume, NULL)
>> +};
>> +
>> +static const struct of_device_id ov7740_of_match[] = {
>> + {.compatible = "ovti,ov7740", },
>> + { /* sentinel */ },
>> +};
>> +MODULE_DEVICE_TABLE(of, ov7740_of_match);
>> +
>> +static struct i2c_driver ov7740_i2c_driver = {
>> + .driver = {
>> + .name = "ov7740",
>> + .pm = &ov7740_pm_ops,
>> + .of_match_table = of_match_ptr(ov7740_of_match),
>> + },
>> + .probe = ov7740_probe,
>> + .remove = ov7740_remove,
>> + .id_table = ov7740_id,
>> +};
>> +module_i2c_driver(ov7740_i2c_driver);
>> +
>> +MODULE_DESCRIPTION("The V4L2 driver for Omnivision 7740 sensor");
>> +MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
>> +MODULE_LICENSE("GPL v2");
>> --
>> 2.15.0
>>
Best Regards,
Weyou Yang
^ permalink raw reply
* [PATCH v4 0/2] dt: add pinctrl driver for Meson-AXG SoC
From: Yixun Lan @ 2017-12-08 1:54 UTC (permalink / raw)
To: linux-arm-kernel
This is DT part patchset for adding pinctrl support for
the Amlogic's Meson-AXG SoC.
Changes since v3 at [3]
-- rebase to khilman's v4.16/dt64 branch and re-send
-- add Rob's Ack
Changes since v2 at [2]:
-- Resend this patch series due to fail to send patch [2/2]
Changes since v1 at [1]:
-- Separate DT part patches
-- Add Neil Armstrong's Ack
[3]
http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005392.html
http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005393.html
http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005394.html
[2]
http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005390.html
[1]
http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005270.html
http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005271.html
http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005272.html
http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005273.html
http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005274.html
Xingyu Chen (2):
documentation: Add compatibles for Amlogic Meson AXG pin controllers
ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC
.../devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 +
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 44 ++++++++++++++++++++++
2 files changed, 46 insertions(+)
--
2.15.1
^ permalink raw reply
* [PATCH v4 1/2] documentation: Add compatibles for Amlogic Meson AXG pin controllers
From: Yixun Lan @ 2017-12-08 1:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208015418.9632-1-yixun.lan@amlogic.com>
From: Xingyu Chen <xingyu.chen@amlogic.com>
Add compatibles for Amlogic Meson AXG pin controllers
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
index 2392557ede27..2c12f9789116 100644
--- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
@@ -9,6 +9,8 @@ Required properties for the root node:
"amlogic,meson-gxbb-aobus-pinctrl"
"amlogic,meson-gxl-periphs-pinctrl"
"amlogic,meson-gxl-aobus-pinctrl"
+ "amlogic,meson-axg-periphs-pinctrl"
+ "amlogic,meson-axg-aobus-pinctrl"
- reg: address and size of registers controlling irq functionality
=== GPIO sub-nodes ===
--
2.15.1
^ permalink raw reply related
* [PATCH v4 2/2] ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC
From: Yixun Lan @ 2017-12-08 1:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208015418.9632-1-yixun.lan@amlogic.com>
From: Xingyu Chen <xingyu.chen@amlogic.com>
Add new pinctrl DT info for the Amlogic's Meson-AXG SoC.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 44 ++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index e7213eb53958..7b24f83ab4bf 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/meson-axg-gpio.h>
/ {
compatible = "amlogic,meson-axg";
@@ -157,6 +158,32 @@
#mbox-cells = <1>;
};
+ periphs: periphs at ff634000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xff634000 0x0 0x2000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
+
+ pinctrl_periphs: pinctrl at 480 {
+ compatible = "amlogic,meson-axg-periphs-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio: bank at 480 {
+ reg = <0x0 0x00480 0x0 0x40>,
+ <0x0 0x004e8 0x0 0x14>,
+ <0x0 0x00520 0x0 0x14>,
+ <0x0 0x00430 0x0 0x3c>;
+ reg-names = "mux", "pull", "pull-enable", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_periphs 0 0 86>;
+ };
+ };
+ };
+
sram: sram at fffc0000 {
compatible = "amlogic,meson-axg-sram", "mmio-sram";
reg = <0x0 0xfffc0000 0x0 0x20000>;
@@ -182,6 +209,23 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
+ pinctrl_aobus: pinctrl at 14 {
+ compatible = "amlogic,meson-axg-aobus-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio_ao: bank at 14 {
+ reg = <0x0 0x00014 0x0 0x8>,
+ <0x0 0x0002c 0x0 0x4>,
+ <0x0 0x00024 0x0 0x8>;
+ reg-names = "mux", "pull", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_aobus 0 0 15>;
+ };
+ };
+
uart_AO: serial at 3000 {
compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
reg = <0x0 0x3000 0x0 0x18>;
--
2.15.1
^ permalink raw reply related
* [PATCH v8 0/2] media: ov7740: Add a V4L2 sensor-level driver
From: Wenyou Yang @ 2017-12-08 1:55 UTC (permalink / raw)
To: linux-arm-kernel
Add a Video4Linux2 sensor-level driver for the OmniVision OV7740
VGA camera image sensor.
Changes in v8:
- As the registers are written at stream start, remove the written
code from the set fmt function.
Changes in v7:
- Add Acked-by tag.
- Fix the wrong handle of default register configuration.
- Add the missed assignment of ov7740->frmsize.
Changes in v6:
- Remove unnecessary #include <linux/init>.
- Remove unnecessary comments and extra newline.
- Add const for some structures.
- Add the check of the return value from regmap_write().
- Simplify the calling of __v4l2_ctrl_handler_setup().
- Add the default format initialization function.
- Integrate the set_power() and enable/disable the clock into
one function.
Changes in v5:
- Squash the driver and MAINTAINERS entry patches to one.
- Precede the driver patch with the bindings patch.
Changes in v4:
- Assign 'val' a initial value to avoid warning: 'val' may be
used uninitialized.
- Rename REG_REG15 to avoid warning: "REG_REG15" redefined.
Changes in v3:
- Explicitly document the "remote-endpoint" property.
- Put the MAINTAINERS change to a separate patch.
Changes in v2:
- Split off the bindings into a separate patch.
- Add a new entry to the MAINTAINERS file.
Wenyou Yang (2):
media: ov7740: Document device tree bindings
media: i2c: Add the ov7740 image sensor driver
.../devicetree/bindings/media/i2c/ov7740.txt | 47 +
MAINTAINERS | 8 +
drivers/media/i2c/Kconfig | 8 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/ov7740.c | 1226 ++++++++++++++++++++
5 files changed, 1290 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/i2c/ov7740.txt
create mode 100644 drivers/media/i2c/ov7740.c
--
2.15.0
^ permalink raw reply
* [PATCH v8 1/2] media: ov7740: Document device tree bindings
From: Wenyou Yang @ 2017-12-08 1:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208015542.15444-1-wenyou.yang@microchip.com>
Add the device tree binding documentation for the ov7740 sensor driver.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Changes in v8: None
Changes in v7:
- Add Acked-by tag.
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Explicitly document the "remote-endpoint" property.
Changes in v2: None
.../devicetree/bindings/media/i2c/ov7740.txt | 47 ++++++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/i2c/ov7740.txt
diff --git a/Documentation/devicetree/bindings/media/i2c/ov7740.txt b/Documentation/devicetree/bindings/media/i2c/ov7740.txt
new file mode 100644
index 000000000000..af781c3a5f0e
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/ov7740.txt
@@ -0,0 +1,47 @@
+* Omnivision OV7740 CMOS image sensor
+
+The Omnivision OV7740 image sensor supports multiple output image
+size, such as VGA, and QVGA, CIF and any size smaller. It also
+supports the RAW RGB and YUV output formats.
+
+The common video interfaces bindings (see video-interfaces.txt) should
+be used to specify link to the image data receiver. The OV7740 device
+node should contain one 'port' child node with an 'endpoint' subnode.
+
+Required Properties:
+- compatible: "ovti,ov7740".
+- reg: I2C slave address of the sensor.
+- clocks: Reference to the xvclk input clock.
+- clock-names: "xvclk".
+
+Optional Properties:
+- reset-gpios: Rreference to the GPIO connected to the reset_b pin,
+ if any. Active low with pull-ip resistor.
+- powerdown-gpios: Reference to the GPIO connected to the pwdn pin,
+ if any. Active high with pull-down resistor.
+
+Endpoint node mandatory properties:
+- remote-endpoint: A phandle to the bus receiver's endpoint node.
+
+Example:
+
+ i2c1: i2c at fc028000 {
+ ov7740: camera at 21 {
+ compatible = "ovti,ov7740";
+ reg = <0x21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sensor_power &pinctrl_sensor_reset>;
+ clocks = <&isc>;
+ clock-names = "xvclk";
+ assigned-clocks = <&isc>;
+ assigned-clock-rates = <24000000>;
+ reset-gpios = <&pioA 43 GPIO_ACTIVE_LOW>;
+ powerdown-gpios = <&pioA 44 GPIO_ACTIVE_HIGH>;
+
+ port {
+ ov7740_0: endpoint {
+ remote-endpoint = <&isc_0>;
+ };
+ };
+ };
+ };
--
2.15.0
^ permalink raw reply related
* [PATCH v8 2/2] media: i2c: Add the ov7740 image sensor driver
From: Wenyou Yang @ 2017-12-08 1:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208015542.15444-1-wenyou.yang@microchip.com>
The ov7740 (color) image sensor is a high performance VGA CMOS
image snesor, which supports for output formats: RAW RGB and YUV
and image sizes: VGA, and QVGA, CIF and any size smaller.
Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
---
Changes in v8:
- As the registers are written at stream start, remove the written
code from the set fmt function.
Changes in v7:
- Fix the wrong handle of default register configuration.
- Add the missed assignment of ov7740->frmsize.
Changes in v6:
- Remove unnecessary #include <linux/init>.
- Remove unnecessary comments and extra newline.
- Add const for some structures.
- Add the check of the return value from regmap_write().
- Simplify the calling of __v4l2_ctrl_handler_setup().
- Add the default format initialization function.
- Integrate the set_power() and enable/disable the clock into
one function.
Changes in v5:
- Squash the driver and MAINTAINERS entry patches to one.
- Precede the driver patch with the bindings patch.
Changes in v4:
- Assign 'val' a initial value to avoid warning: 'val' may be
used uninitialized.
- Rename REG_REG15 to avoid warning: "REG_REG15" redefined.
Changes in v3:
- Put the MAINTAINERS change to a separate patch.
Changes in v2:
- Split off the bindings into a separate patch.
- Add a new entry to the MAINTAINERS file.
MAINTAINERS | 8 +
drivers/media/i2c/Kconfig | 8 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/ov7740.c | 1226 ++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 1243 insertions(+)
create mode 100644 drivers/media/i2c/ov7740.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 7a52a66aa991..1de965009b13 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10053,6 +10053,14 @@ S: Maintained
F: drivers/media/i2c/ov7670.c
F: Documentation/devicetree/bindings/media/i2c/ov7670.txt
+OMNIVISION OV7740 SENSOR DRIVER
+M: Wenyou Yang <wenyou.yang@microchip.com>
+L: linux-media at vger.kernel.org
+T: git git://linuxtv.org/media_tree.git
+S: Maintained
+F: drivers/media/i2c/ov7740.c
+F: Documentation/devicetree/bindings/media/i2c/ov7740.txt
+
ONENAND FLASH DRIVER
M: Kyungmin Park <kyungmin.park@samsung.com>
L: linux-mtd at lists.infradead.org
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index cb5d7ff82915..00b1c4c031d4 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -665,6 +665,14 @@ config VIDEO_OV7670
OV7670 VGA camera. It currently only works with the M88ALP01
controller.
+config VIDEO_OV7740
+ tristate "OmniVision OV7740 sensor support"
+ depends on I2C && VIDEO_V4L2
+ depends on MEDIA_CAMERA_SUPPORT
+ ---help---
+ This is a Video4Linux2 sensor-level driver for the OmniVision
+ OV7740 VGA camera sensor.
+
config VIDEO_OV9650
tristate "OmniVision OV9650/OV9652 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 548a9efce966..9b19ec7fcaf4 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -68,6 +68,7 @@ obj-$(CONFIG_VIDEO_OV5670) += ov5670.o
obj-$(CONFIG_VIDEO_OV6650) += ov6650.o
obj-$(CONFIG_VIDEO_OV7640) += ov7640.o
obj-$(CONFIG_VIDEO_OV7670) += ov7670.o
+obj-$(CONFIG_VIDEO_OV7740) += ov7740.o
obj-$(CONFIG_VIDEO_OV9650) += ov9650.o
obj-$(CONFIG_VIDEO_OV13858) += ov13858.o
obj-$(CONFIG_VIDEO_MT9M032) += mt9m032.o
diff --git a/drivers/media/i2c/ov7740.c b/drivers/media/i2c/ov7740.c
new file mode 100644
index 000000000000..536971e8ce8b
--- /dev/null
+++ b/drivers/media/i2c/ov7740.c
@@ -0,0 +1,1226 @@
+/*
+ * Copyright (c) 2017 Microchip Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version
+ * 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-event.h>
+#include <media/v4l2-image-sizes.h>
+#include <media/v4l2-subdev.h>
+
+#define REG_OUTSIZE_LSB 0x34
+
+/* OV7740 register tables */
+#define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
+#define REG_BGAIN 0x01 /* blue gain */
+#define REG_RGAIN 0x02 /* red gain */
+#define REG_GGAIN 0x03 /* green gain */
+#define REG_REG04 0x04 /* analog setting, dont change*/
+#define REG_BAVG 0x05 /* b channel average */
+#define REG_GAVG 0x06 /* g channel average */
+#define REG_RAVG 0x07 /* r channel average */
+
+#define REG_REG0C 0x0C /* filp enable */
+#define REG0C_IMG_FLIP 0x80
+#define REG0C_IMG_MIRROR 0x40
+
+#define REG_REG0E 0x0E /* blc line */
+#define REG_HAEC 0x0F /* auto exposure cntrl */
+#define REG_AEC 0x10 /* auto exposure cntrl */
+
+#define REG_CLK 0x11 /* Clock control */
+#define REG_REG55 0x55 /* Clock PLL DIV/PreDiv */
+
+#define REG_REG12 0x12
+
+#define REG_REG13 0x13 /* auto/manual AGC, AEC, Write Balance*/
+#define REG13_AEC_EN 0x01
+#define REG13_AGC_EN 0x04
+
+#define REG_REG14 0x14
+#define REG_CTRL15 0x15
+#define REG15_GAIN_MSB 0x03
+
+#define REG_REG16 0x16
+
+#define REG_MIDH 0x1C /* manufacture id byte */
+#define REG_MIDL 0x1D /* manufacture id byre */
+#define REG_PIDH 0x0A /* Product ID MSB */
+#define REG_PIDL 0x0B /* Product ID LSB */
+
+#define REG_84 0x84 /* lots of stuff */
+#define REG_REG38 0x38 /* sub-addr */
+
+#define REG_AHSTART 0x17 /* Horiz start high bits */
+#define REG_AHSIZE 0x18
+#define REG_AVSTART 0x19 /* Vert start high bits */
+#define REG_AVSIZE 0x1A
+#define REG_PSHFT 0x1b /* Pixel delay after HREF */
+
+#define REG_HOUTSIZE 0x31
+#define REG_VOUTSIZE 0x32
+#define REG_HVSIZEOFF 0x33
+#define REG_REG34 0x34 /* DSP output size H/V LSB*/
+
+#define REG_ISP_CTRL00 0x80
+#define ISPCTRL00_AWB_EN 0x10
+#define ISPCTRL00_AWB_GAIN_EN 0x04
+
+#define REG_YGAIN 0xE2 /* ygain for contrast control */
+
+#define REG_YBRIGHT 0xE3
+#define REG_SGNSET 0xE4
+#define SGNSET_YBRIGHT_MASK 0x08
+
+#define REG_USAT 0xDD
+#define REG_VSAT 0xDE
+
+
+struct ov7740 {
+ struct v4l2_subdev subdev;
+#if defined(CONFIG_MEDIA_CONTROLLER)
+ struct media_pad pad;
+#endif
+ struct v4l2_mbus_framefmt format;
+ const struct ov7740_pixfmt *fmt; /* Current format */
+ const struct ov7740_framesize *frmsize;
+ struct regmap *regmap;
+ struct clk *xvclk;
+ struct v4l2_ctrl_handler ctrl_handler;
+ struct {
+ /* gain cluster */
+ struct v4l2_ctrl *auto_gain;
+ struct v4l2_ctrl *gain;
+ };
+ struct {
+ struct v4l2_ctrl *auto_wb;
+ struct v4l2_ctrl *blue_balance;
+ struct v4l2_ctrl *red_balance;
+ };
+ struct {
+ struct v4l2_ctrl *hflip;
+ struct v4l2_ctrl *vflip;
+ };
+ struct {
+ /* exposure cluster */
+ struct v4l2_ctrl *auto_exposure;
+ struct v4l2_ctrl *exposure;
+ };
+ struct {
+ /* saturation/hue cluster */
+ struct v4l2_ctrl *saturation;
+ struct v4l2_ctrl *hue;
+ };
+ struct v4l2_ctrl *brightness;
+ struct v4l2_ctrl *contrast;
+
+ struct mutex mutex; /* To serialize asynchronus callbacks */
+ bool streaming; /* Streaming on/off */
+
+ struct gpio_desc *resetb_gpio;
+ struct gpio_desc *pwdn_gpio;
+};
+
+struct ov7740_pixfmt {
+ u32 mbus_code;
+ enum v4l2_colorspace colorspace;
+ const struct reg_sequence *regs;
+ u32 reg_num;
+};
+
+struct ov7740_framesize {
+ u16 width;
+ u16 height;
+ const struct reg_sequence *regs;
+ u32 reg_num;
+};
+
+static const struct reg_sequence ov7740_vga[] = {
+ {0x55, 0x40},
+ {0x11, 0x02},
+
+ {0xd5, 0x10},
+ {0x0c, 0x12},
+ {0x0d, 0x34},
+ {0x17, 0x25},
+ {0x18, 0xa0},
+ {0x19, 0x03},
+ {0x1a, 0xf0},
+ {0x1b, 0x89},
+ {0x22, 0x03},
+ {0x29, 0x18},
+ {0x2b, 0xf8},
+ {0x2c, 0x01},
+ {REG_HOUTSIZE, 0xa0},
+ {REG_VOUTSIZE, 0xf0},
+ {0x33, 0xc4},
+ {REG_OUTSIZE_LSB, 0x0},
+ {0x35, 0x05},
+ {0x04, 0x60},
+ {0x27, 0x80},
+ {0x3d, 0x0f},
+ {0x3e, 0x80},
+ {0x3f, 0x40},
+ {0x40, 0x7f},
+ {0x41, 0x6a},
+ {0x42, 0x29},
+ {0x44, 0x22},
+ {0x45, 0x41},
+ {0x47, 0x02},
+ {0x49, 0x64},
+ {0x4a, 0xa1},
+ {0x4b, 0x40},
+ {0x4c, 0x1a},
+ {0x4d, 0x50},
+ {0x4e, 0x13},
+ {0x64, 0x00},
+ {0x67, 0x88},
+ {0x68, 0x1a},
+
+ {0x14, 0x28},
+ {0x24, 0x3c},
+ {0x25, 0x30},
+ {0x26, 0x72},
+ {0x50, 0x97},
+ {0x51, 0x1f},
+ {0x52, 0x00},
+ {0x53, 0x00},
+ {0x20, 0x00},
+ {0x21, 0xcf},
+ {0x50, 0x4b},
+ {0x38, 0x14},
+ {0xe9, 0x00},
+ {0x56, 0x55},
+ {0x57, 0xff},
+ {0x58, 0xff},
+ {0x59, 0xff},
+ {0x5f, 0x04},
+ {0xec, 0x00},
+ {0x13, 0xff},
+
+ {0x81, 0x3f},
+ {0x82, 0x32},
+ {0x38, 0x11},
+ {0x84, 0x70},
+ {0x85, 0x00},
+ {0x86, 0x03},
+ {0x87, 0x01},
+ {0x88, 0x05},
+ {0x89, 0x30},
+ {0x8d, 0x30},
+ {0x8f, 0x85},
+ {0x93, 0x30},
+ {0x95, 0x85},
+ {0x99, 0x30},
+ {0x9b, 0x85},
+
+ {0x9c, 0x08},
+ {0x9d, 0x12},
+ {0x9e, 0x23},
+ {0x9f, 0x45},
+ {0xa0, 0x55},
+ {0xa1, 0x64},
+ {0xa2, 0x72},
+ {0xa3, 0x7f},
+ {0xa4, 0x8b},
+ {0xa5, 0x95},
+ {0xa6, 0xa7},
+ {0xa7, 0xb5},
+ {0xa8, 0xcb},
+ {0xa9, 0xdd},
+ {0xaa, 0xec},
+ {0xab, 0x1a},
+
+ {0xce, 0x78},
+ {0xcf, 0x6e},
+ {0xd0, 0x0a},
+ {0xd1, 0x0c},
+ {0xd2, 0x84},
+ {0xd3, 0x90},
+ {0xd4, 0x1e},
+
+ {0x5a, 0x24},
+ {0x5b, 0x1f},
+ {0x5c, 0x88},
+ {0x5d, 0x60},
+
+ {0xac, 0x6e},
+ {0xbe, 0xff},
+ {0xbf, 0x00},
+
+ {0x0f, 0x1d},
+ {0x0f, 0x1f},
+};
+
+static const struct ov7740_framesize ov7740_framesizes[] = {
+ {
+ .width = VGA_WIDTH,
+ .height = VGA_HEIGHT,
+ .regs = ov7740_vga,
+ .reg_num = ARRAY_SIZE(ov7740_vga),
+ },
+};
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static int ov7740_get_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+ struct regmap *regmap = ov7740->regmap;
+ unsigned int val = 0;
+ int ret;
+
+ ret = regmap_read(regmap, reg->reg & 0xff, &val);
+ reg->val = val;
+ reg->size = 1;
+
+ return 0;
+}
+
+static int ov7740_set_register(struct v4l2_subdev *sd,
+ const struct v4l2_dbg_register *reg)
+{
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+ struct regmap *regmap = ov7740->regmap;
+
+ regmap_write(regmap, reg->reg & 0xff, reg->val & 0xff);
+
+ return 0;
+}
+#endif
+
+static int ov7740_set_power(struct ov7740 *ov7740, int on)
+{
+ int ret;
+
+ if (on) {
+ ret = clk_prepare_enable(ov7740->xvclk);
+ if (ret)
+ return ret;
+
+ if (ov7740->pwdn_gpio)
+ gpiod_direction_output(ov7740->pwdn_gpio, 0);
+
+ if (ov7740->resetb_gpio) {
+ gpiod_set_value(ov7740->resetb_gpio, 1);
+ usleep_range(500, 1000);
+ gpiod_set_value(ov7740->resetb_gpio, 0);
+ usleep_range(3000, 5000);
+ }
+ } else {
+ clk_disable_unprepare(ov7740->xvclk);
+
+ if (ov7740->pwdn_gpio)
+ gpiod_direction_output(ov7740->pwdn_gpio, 0);
+ }
+
+ return 0;
+}
+
+static struct v4l2_subdev_core_ops ov7740_subdev_core_ops = {
+ .log_status = v4l2_ctrl_subdev_log_status,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+ .g_register = ov7740_get_register,
+ .s_register = ov7740_set_register,
+#endif
+ .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
+ .unsubscribe_event = v4l2_event_subdev_unsubscribe,
+};
+
+static int ov7740_set_white_balance(struct ov7740 *ov7740, int awb)
+{
+ struct regmap *regmap = ov7740->regmap;
+ unsigned int value;
+ int ret;
+
+ ret = regmap_read(regmap, REG_ISP_CTRL00, &value);
+ if (!ret) {
+ if (awb)
+ value |= (ISPCTRL00_AWB_EN | ISPCTRL00_AWB_GAIN_EN);
+ else
+ value &= ~(ISPCTRL00_AWB_EN | ISPCTRL00_AWB_GAIN_EN);
+ ret = regmap_write(regmap, REG_ISP_CTRL00, value);
+ if (ret)
+ return ret;
+ }
+
+ if (!awb) {
+ ret = regmap_write(regmap, REG_BGAIN,
+ ov7740->blue_balance->val);
+ if (ret)
+ return ret;
+
+ ret = regmap_write(regmap, REG_RGAIN, ov7740->red_balance->val);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ov7740_set_saturation(struct regmap *regmap, int value)
+{
+ int ret;
+
+ ret = regmap_write(regmap, REG_USAT, (unsigned char)value);
+ if (ret)
+ return ret;
+
+ return regmap_write(regmap, REG_VSAT, (unsigned char)value);
+}
+
+static int ov7740_set_gain(struct regmap *regmap, int value)
+{
+ int ret;
+
+ ret = regmap_write(regmap, REG_GAIN, value & 0xff);
+ if (ret)
+ return ret;
+
+ ret = regmap_update_bits(regmap, REG_CTRL15,
+ REG15_GAIN_MSB, (value >> 8) & 0x3);
+ if (!ret)
+ ret = regmap_update_bits(regmap, REG_REG13, REG13_AGC_EN, 0);
+
+ return ret;
+}
+
+static int ov7740_set_autogain(struct regmap *regmap, int value)
+{
+ unsigned int reg;
+ int ret;
+
+ ret = regmap_read(regmap, REG_REG13, ®);
+ if (ret)
+ return ret;
+ if (value)
+ reg |= REG13_AGC_EN;
+ else
+ reg &= ~REG13_AGC_EN;
+ return regmap_write(regmap, REG_REG13, reg);
+}
+
+static int ov7740_set_brightness(struct regmap *regmap, int value)
+{
+ /* Turn off AEC/AGC */
+ regmap_update_bits(regmap, REG_REG13, REG13_AEC_EN, 0);
+ regmap_update_bits(regmap, REG_REG13, REG13_AGC_EN, 0);
+
+ if (value >= 0) {
+ regmap_write(regmap, REG_YBRIGHT, (unsigned char)value);
+ regmap_update_bits(regmap, REG_SGNSET, SGNSET_YBRIGHT_MASK, 0);
+ } else{
+ regmap_write(regmap, REG_YBRIGHT, (unsigned char)(-value));
+ regmap_update_bits(regmap, REG_SGNSET, SGNSET_YBRIGHT_MASK, 1);
+ }
+
+ return 0;
+}
+
+static int ov7740_set_contrast(struct regmap *regmap, int value)
+{
+ return regmap_write(regmap, REG_YGAIN, (unsigned char)value);
+}
+
+static int ov7740_get_gain(struct ov7740 *ov7740, struct v4l2_ctrl *ctrl)
+{
+ struct regmap *regmap = ov7740->regmap;
+ unsigned int value0, value1;
+ int ret;
+
+ if (!ctrl->val)
+ return 0;
+
+ ret = regmap_read(regmap, REG_GAIN, &value0);
+ if (ret)
+ return ret;
+ ret = regmap_read(regmap, REG_CTRL15, &value1);
+ if (ret)
+ return ret;
+
+ ov7740->gain->val = (value1 << 8) | (value0 & 0xff);
+
+ return 0;
+}
+
+static int ov7740_set_exp(struct regmap *regmap, int value)
+{
+ int ret;
+
+ /* Turn off AEC/AGC */
+ ret = regmap_update_bits(regmap, REG_REG13,
+ REG13_AEC_EN | REG13_AGC_EN, 0);
+ if (ret)
+ return ret;
+
+ ret = regmap_write(regmap, REG_AEC, (unsigned char)value);
+ if (ret)
+ return ret;
+
+ return regmap_write(regmap, REG_HAEC, (unsigned char)(value >> 8));
+}
+
+static int ov7740_set_autoexp(struct regmap *regmap,
+ enum v4l2_exposure_auto_type value)
+{
+ unsigned int reg;
+ int ret;
+
+ ret = regmap_read(regmap, REG_REG13, ®);
+ if (!ret) {
+ if (value == V4L2_EXPOSURE_AUTO)
+ reg |= (REG13_AEC_EN | REG13_AGC_EN);
+ else
+ reg &= ~(REG13_AEC_EN | REG13_AGC_EN);
+ ret = regmap_write(regmap, REG_REG13, reg);
+ }
+
+ return ret;
+}
+
+
+static int ov7740_get_volatile_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct ov7740 *ov7740 = container_of(ctrl->handler,
+ struct ov7740, ctrl_handler);
+ int ret;
+
+ switch (ctrl->id) {
+ case V4L2_CID_AUTOGAIN:
+ ret = ov7740_get_gain(ov7740, ctrl);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ return ret;
+}
+
+static int ov7740_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct ov7740 *ov7740 = container_of(ctrl->handler,
+ struct ov7740, ctrl_handler);
+ struct i2c_client *client = v4l2_get_subdevdata(&ov7740->subdev);
+ struct regmap *regmap = ov7740->regmap;
+ int ret;
+ u8 val = 0;
+
+ if (pm_runtime_get_if_in_use(&client->dev) <= 0)
+ return 0;
+
+ switch (ctrl->id) {
+ case V4L2_CID_AUTO_WHITE_BALANCE:
+ ret = ov7740_set_white_balance(ov7740, ctrl->val);
+ break;
+ case V4L2_CID_SATURATION:
+ ret = ov7740_set_saturation(regmap, ctrl->val);
+ break;
+ case V4L2_CID_BRIGHTNESS:
+ ret = ov7740_set_brightness(regmap, ctrl->val);
+ break;
+ case V4L2_CID_CONTRAST:
+ ret = ov7740_set_contrast(regmap, ctrl->val);
+ break;
+ case V4L2_CID_VFLIP:
+ ret = regmap_update_bits(regmap, REG_REG0C,
+ REG0C_IMG_FLIP, val);
+ break;
+ case V4L2_CID_HFLIP:
+ val = ctrl->val ? REG0C_IMG_MIRROR : 0x00;
+ ret = regmap_update_bits(regmap, REG_REG0C,
+ REG0C_IMG_MIRROR, val);
+ break;
+ case V4L2_CID_AUTOGAIN:
+ if (!ctrl->val)
+ return ov7740_set_gain(regmap, ov7740->gain->val);
+
+ ret = ov7740_set_autogain(regmap, ctrl->val);
+ break;
+
+ case V4L2_CID_EXPOSURE_AUTO:
+ if (ctrl->val == V4L2_EXPOSURE_MANUAL)
+ return ov7740_set_exp(regmap, ov7740->exposure->val);
+
+ ret = ov7740_set_autoexp(regmap, ctrl->val);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ pm_runtime_put(&client->dev);
+
+ return ret;
+}
+
+static const struct v4l2_ctrl_ops ov7740_ctrl_ops = {
+ .g_volatile_ctrl = ov7740_get_volatile_ctrl,
+ .s_ctrl = ov7740_set_ctrl,
+};
+
+static int ov7740_start_streaming(struct ov7740 *ov7740)
+{
+ int ret;
+
+ if (ov7740->fmt) {
+ ret = regmap_multi_reg_write(ov7740->regmap,
+ ov7740->fmt->regs,
+ ov7740->fmt->reg_num);
+ if (ret)
+ return ret;
+ }
+
+ if (ov7740->frmsize) {
+ ret = regmap_multi_reg_write(ov7740->regmap,
+ ov7740->frmsize->regs,
+ ov7740->frmsize->reg_num);
+ if (ret)
+ return ret;
+ }
+
+ return __v4l2_ctrl_handler_setup(ov7740->subdev.ctrl_handler);
+}
+
+static int ov7740_set_stream(struct v4l2_subdev *sd, int enable)
+{
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret = 0;
+
+ mutex_lock(&ov7740->mutex);
+ if (ov7740->streaming == enable) {
+ mutex_unlock(&ov7740->mutex);
+ return 0;
+ }
+
+ if (enable) {
+ ret = pm_runtime_get_sync(&client->dev);
+ if (ret < 0) {
+ pm_runtime_put_noidle(&client->dev);
+ goto err_unlock;
+ }
+
+ ret = ov7740_start_streaming(ov7740);
+ if (ret)
+ goto err_rpm_put;
+ } else {
+ pm_runtime_put(&client->dev);
+ }
+
+ ov7740->streaming = enable;
+
+ mutex_unlock(&ov7740->mutex);
+ return ret;
+
+err_rpm_put:
+ pm_runtime_put(&client->dev);
+err_unlock:
+ mutex_unlock(&ov7740->mutex);
+ return ret;
+}
+
+static int ov7740_get_parm(struct v4l2_subdev *sd,
+ struct v4l2_streamparm *parms)
+{
+ struct v4l2_captureparm *cp = &parms->parm.capture;
+ struct v4l2_fract *tpf = &cp->timeperframe;
+
+ if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
+ return -EINVAL;
+
+ memset(cp, 0, sizeof(struct v4l2_captureparm));
+ cp->capability = V4L2_CAP_TIMEPERFRAME;
+
+ tpf->numerator = 1;
+ tpf->denominator = 60;
+
+ return 0;
+}
+
+static int ov7740_set_parm(struct v4l2_subdev *sd,
+ struct v4l2_streamparm *parms)
+{
+ struct v4l2_captureparm *cp = &parms->parm.capture;
+ struct v4l2_fract *tpf = &cp->timeperframe;
+
+ if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
+ return -EINVAL;
+ if (cp->extendedmode != 0)
+ return -EINVAL;
+
+ cp->capability = V4L2_CAP_TIMEPERFRAME;
+
+ tpf->numerator = 1;
+ tpf->denominator = 60;
+
+ return 0;
+}
+
+static struct v4l2_subdev_video_ops ov7740_subdev_video_ops = {
+ .s_stream = ov7740_set_stream,
+ .s_parm = ov7740_set_parm,
+ .g_parm = ov7740_get_parm,
+};
+
+static const struct reg_sequence ov7740_format_yuyv[] = {
+ {0x12, 0x00},
+ {0x36, 0x3f},
+ {0x80, 0x7f},
+ {0x83, 0x01},
+};
+
+static const struct reg_sequence ov7740_format_bggr8[] = {
+ {0x36, 0x2f},
+ {0x80, 0x01},
+ {0x83, 0x04},
+};
+
+static const struct ov7740_pixfmt ov7740_formats[] = {
+ {
+ .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
+ .colorspace = V4L2_COLORSPACE_SRGB,
+ .regs = ov7740_format_yuyv,
+ .reg_num = ARRAY_SIZE(ov7740_format_yuyv),
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
+ .colorspace = V4L2_COLORSPACE_SRGB,
+ .regs = ov7740_format_bggr8,
+ .reg_num = ARRAY_SIZE(ov7740_format_bggr8),
+ }
+};
+#define N_OV7740_FMTS ARRAY_SIZE(ov7740_formats)
+
+static int ov7740_enum_mbus_code(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+ if (code->pad || code->index >= N_OV7740_FMTS)
+ return -EINVAL;
+
+ code->code = ov7740_formats[code->index].mbus_code;
+
+ return 0;
+}
+
+static int ov7740_enum_frame_interval(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_frame_interval_enum *fie)
+{
+ if (fie->pad)
+ return -EINVAL;
+
+ if (fie->index >= 1)
+ return -EINVAL;
+
+ if ((fie->width != VGA_WIDTH) || (fie->height != VGA_HEIGHT))
+ return -EINVAL;
+
+ fie->interval.numerator = 1;
+ fie->interval.denominator = 60;
+
+ return 0;
+}
+
+static int ov7740_enum_frame_size(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_frame_size_enum *fse)
+{
+ if (fse->pad)
+ return -EINVAL;
+
+ if (fse->index > 0)
+ return -EINVAL;
+
+ fse->min_width = fse->max_width = VGA_WIDTH;
+ fse->min_height = fse->max_height = VGA_HEIGHT;
+
+ return 0;
+}
+
+static int ov7740_try_fmt_internal(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *fmt,
+ const struct ov7740_pixfmt **ret_fmt,
+ const struct ov7740_framesize **ret_frmsize)
+{
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+ const struct ov7740_framesize *fsize = &ov7740_framesizes[0];
+ int index, i;
+
+ for (index = 0; index < N_OV7740_FMTS; index++) {
+ if (ov7740_formats[index].mbus_code == fmt->code)
+ break;
+ }
+ if (index >= N_OV7740_FMTS) {
+ /* default to first format */
+ index = 0;
+ fmt->code = ov7740_formats[0].mbus_code;
+ }
+ if (ret_fmt != NULL)
+ *ret_fmt = ov7740_formats + index;
+
+ for (i = 0; i < ARRAY_SIZE(ov7740_framesizes); i++) {
+ if ((fsize->width >= fmt->width) &&
+ (fsize->height >= fmt->height)) {
+ fmt->width = fsize->width;
+ fmt->height = fsize->height;
+ break;
+ }
+
+ fsize++;
+ }
+
+ if (ret_frmsize != NULL)
+ *ret_frmsize = fsize;
+
+ fmt->field = V4L2_FIELD_NONE;
+ fmt->colorspace = ov7740_formats[index].colorspace;
+
+ ov7740->format = *fmt;
+
+ return 0;
+}
+
+static int ov7740_set_fmt(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *format)
+{
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+ const struct ov7740_pixfmt *ovfmt;
+ const struct ov7740_framesize *fsize;
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+ struct v4l2_mbus_framefmt *mbus_fmt;
+#endif
+ int ret;
+
+ mutex_lock(&ov7740->mutex);
+ if (format->pad) {
+ ret = -EINVAL;
+ goto error;
+ }
+
+ if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
+ ret = ov7740_try_fmt_internal(sd, &format->format, NULL, NULL);
+ if (ret)
+ goto error;
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+ mbus_fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);
+ *mbus_fmt = format->format;
+
+ mutex_unlock(&ov7740->mutex);
+ return 0;
+#else
+ ret = -ENOTTY;
+ goto error;
+#endif
+ }
+
+ ret = ov7740_try_fmt_internal(sd, &format->format, &ovfmt, &fsize);
+ if (ret)
+ goto error;
+
+ ov7740->fmt = ovfmt;
+ ov7740->frmsize = fsize;
+
+ mutex_unlock(&ov7740->mutex);
+ return 0;
+
+error:
+ mutex_unlock(&ov7740->mutex);
+ return ret;
+}
+
+static int ov7740_get_fmt(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *format)
+{
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+ struct v4l2_mbus_framefmt *mbus_fmt;
+#endif
+ int ret = 0;
+
+ mutex_lock(&ov7740->mutex);
+ if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+ mbus_fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
+ format->format = *mbus_fmt;
+ ret = 0;
+#else
+ ret = -ENOTTY;
+#endif
+ } else {
+ format->format = ov7740->format;
+ }
+ mutex_unlock(&ov7740->mutex);
+
+ return ret;
+}
+
+static const struct v4l2_subdev_pad_ops ov7740_subdev_pad_ops = {
+ .enum_frame_interval = ov7740_enum_frame_interval,
+ .enum_frame_size = ov7740_enum_frame_size,
+ .enum_mbus_code = ov7740_enum_mbus_code,
+ .get_fmt = ov7740_get_fmt,
+ .set_fmt = ov7740_set_fmt,
+};
+
+static const struct v4l2_subdev_ops ov7740_subdev_ops = {
+ .core = &ov7740_subdev_core_ops,
+ .video = &ov7740_subdev_video_ops,
+ .pad = &ov7740_subdev_pad_ops,
+};
+
+static void ov7740_get_default_format(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *format)
+{
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+
+ format->width = ov7740->frmsize->width;
+ format->height = ov7740->frmsize->height;
+ format->colorspace = ov7740->fmt->colorspace;
+ format->code = ov7740->fmt->mbus_code;
+ format->field = V4L2_FIELD_NONE;
+}
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int ov7740_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+ struct v4l2_mbus_framefmt *format =
+ v4l2_subdev_get_try_format(sd, fh->pad, 0);
+
+ mutex_lock(&ov7740->mutex);
+ ov7740_get_default_format(sd, format);
+ mutex_unlock(&ov7740->mutex);
+
+ return 0;
+}
+
+static const struct v4l2_subdev_internal_ops ov7740_subdev_internal_ops = {
+ .open = ov7740_open,
+};
+#endif
+
+static int ov7740_probe_dt(struct i2c_client *client,
+ struct ov7740 *ov7740)
+{
+ ov7740->resetb_gpio = devm_gpiod_get_optional(&client->dev, "reset",
+ GPIOD_OUT_HIGH);
+ if (IS_ERR(ov7740->resetb_gpio)) {
+ dev_info(&client->dev, "can't get %s GPIO\n", "reset");
+ return PTR_ERR(ov7740->resetb_gpio);
+ }
+
+ ov7740->pwdn_gpio = devm_gpiod_get_optional(&client->dev, "powerdown",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(ov7740->pwdn_gpio)) {
+ dev_info(&client->dev, "can't get %s GPIO\n", "powerdown");
+ return PTR_ERR(ov7740->pwdn_gpio);
+ }
+
+ return 0;
+}
+
+static int ov7740_detect(struct ov7740 *ov7740)
+{
+ struct regmap *regmap = ov7740->regmap;
+ unsigned int midh, midl, pidh, pidl;
+ int ret;
+
+ ret = regmap_read(regmap, REG_MIDH, &midh);
+ if (ret)
+ return ret;
+ if (midh != 0x7f)
+ return -ENODEV;
+
+ ret = regmap_read(regmap, REG_MIDL, &midl);
+ if (ret)
+ return ret;
+ if (midl != 0xa2)
+ return -ENODEV;
+
+ ret = regmap_read(regmap, REG_PIDH, &pidh);
+ if (ret)
+ return ret;
+ if (pidh != 0x77)
+ return -ENODEV;
+
+ ret = regmap_read(regmap, REG_PIDL, &pidl);
+ if (ret)
+ return ret;
+ if ((pidl != 0x40) && (pidl != 0x41) && (pidl != 0x42))
+ return -ENODEV;
+
+ return 0;
+}
+
+static int ov7740_init_controls(struct ov7740 *ov7740)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(&ov7740->subdev);
+ struct v4l2_ctrl_handler *ctrl_hdlr = &ov7740->ctrl_handler;
+ int ret;
+
+ ret = v4l2_ctrl_handler_init(ctrl_hdlr, 2);
+ if (ret < 0)
+ return ret;
+
+ ctrl_hdlr->lock = &ov7740->mutex;
+ ov7740->auto_wb = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_AUTO_WHITE_BALANCE,
+ 0, 1, 1, 1);
+ ov7740->blue_balance = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_BLUE_BALANCE,
+ 0, 0xff, 1, 0x80);
+ ov7740->red_balance = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_RED_BALANCE,
+ 0, 0xff, 1, 0x80);
+
+ ov7740->brightness = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_BRIGHTNESS,
+ -255, 255, 1, 0);
+ ov7740->contrast = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_CONTRAST,
+ 0, 127, 1, 0x20);
+ ov7740->saturation = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_SATURATION, 0, 256, 1, 0x80);
+ ov7740->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_HFLIP, 0, 1, 1, 0);
+ ov7740->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_VFLIP, 0, 1, 1, 0);
+ ov7740->gain = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_GAIN, 0, 1023, 1, 500);
+ ov7740->auto_gain = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
+ ov7740->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
+ V4L2_CID_EXPOSURE, 0, 65535, 1, 500);
+ ov7740->auto_exposure = v4l2_ctrl_new_std_menu(ctrl_hdlr,
+ &ov7740_ctrl_ops,
+ V4L2_CID_EXPOSURE_AUTO,
+ V4L2_EXPOSURE_MANUAL, 0,
+ V4L2_EXPOSURE_AUTO);
+
+ ov7740->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
+ ov7740->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
+
+ v4l2_ctrl_auto_cluster(3, &ov7740->auto_wb, 0, false);
+ v4l2_ctrl_auto_cluster(2, &ov7740->auto_gain, 0, true);
+ v4l2_ctrl_auto_cluster(2, &ov7740->auto_exposure,
+ V4L2_EXPOSURE_MANUAL, false);
+ v4l2_ctrl_cluster(2, &ov7740->hflip);
+
+ ret = v4l2_ctrl_handler_setup(ctrl_hdlr);
+ if (ret) {
+ dev_err(&client->dev, "%s control init failed (%d)\n",
+ __func__, ret);
+ goto error;
+ }
+
+ ov7740->subdev.ctrl_handler = ctrl_hdlr;
+ return 0;
+
+error:
+ v4l2_ctrl_handler_free(ctrl_hdlr);
+ mutex_destroy(&ov7740->mutex);
+ return ret;
+}
+
+static void ov7740_free_controls(struct ov7740 *ov7740)
+{
+ v4l2_ctrl_handler_free(ov7740->subdev.ctrl_handler);
+ mutex_destroy(&ov7740->mutex);
+}
+
+#define OV7740_MAX_REGISTER 0xff
+static const struct regmap_config ov7740_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = OV7740_MAX_REGISTER,
+};
+
+static int ov7740_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct ov7740 *ov7740;
+ struct v4l2_subdev *sd;
+ int ret;
+
+ if (!i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_err(&client->dev,
+ "OV7740: I2C-Adapter doesn't support SMBUS\n");
+ return -EIO;
+ }
+
+ ov7740 = devm_kzalloc(&client->dev, sizeof(*ov7740), GFP_KERNEL);
+ if (!ov7740)
+ return -ENOMEM;
+
+ ov7740->xvclk = devm_clk_get(&client->dev, "xvclk");
+ if (IS_ERR(ov7740->xvclk)) {
+ ret = PTR_ERR(ov7740->xvclk);
+ dev_err(&client->dev,
+ "OV7740: fail to get xvclk: %d\n", ret);
+ return ret;
+ }
+
+ ret = ov7740_probe_dt(client, ov7740);
+ if (ret)
+ return ret;
+
+ ov7740->regmap = devm_regmap_init_i2c(client, &ov7740_regmap_config);
+ if (IS_ERR(ov7740->regmap)) {
+ ret = PTR_ERR(ov7740->regmap);
+ dev_err(&client->dev, "Failed to allocate register map: %d\n",
+ ret);
+ return ret;
+ }
+
+ sd = &ov7740->subdev;
+ client->flags |= I2C_CLIENT_SCCB;
+ v4l2_i2c_subdev_init(sd, client, &ov7740_subdev_ops);
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+ sd->internal_ops = &ov7740_subdev_internal_ops;
+ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+#endif
+
+#if defined(CONFIG_MEDIA_CONTROLLER)
+ ov7740->pad.flags = MEDIA_PAD_FL_SOURCE;
+ sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
+ ret = media_entity_pads_init(&sd->entity, 1, &ov7740->pad);
+ if (ret)
+ return ret;
+#endif
+
+ ret = ov7740_set_power(ov7740, 1);
+ if (ret)
+ return ret;
+
+ ret = ov7740_detect(ov7740);
+ if (ret)
+ goto error_detect;
+
+ mutex_init(&ov7740->mutex);
+
+ ret = ov7740_init_controls(ov7740);
+ if (ret)
+ goto error_init_controls;
+
+ v4l_info(client, "chip found @ 0x%02x (%s)\n",
+ client->addr << 1, client->adapter->name);
+
+ ov7740->fmt = &ov7740_formats[0];
+ ov7740->frmsize = &ov7740_framesizes[0];
+
+ ov7740_get_default_format(sd, &ov7740->format);
+
+ ret = v4l2_async_register_subdev(sd);
+ if (ret)
+ goto error_async_register;
+
+ pm_runtime_set_active(&client->dev);
+ pm_runtime_enable(&client->dev);
+ pm_runtime_idle(&client->dev);
+
+ return 0;
+
+error_async_register:
+ v4l2_ctrl_handler_free(ov7740->subdev.ctrl_handler);
+error_init_controls:
+ ov7740_free_controls(ov7740);
+error_detect:
+ ov7740_set_power(ov7740, 0);
+ media_entity_cleanup(&ov7740->subdev.entity);
+
+ return ret;
+}
+
+static int ov7740_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+
+ mutex_destroy(&ov7740->mutex);
+ v4l2_ctrl_handler_free(ov7740->subdev.ctrl_handler);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+ media_entity_cleanup(&ov7740->subdev.entity);
+#endif
+ v4l2_async_unregister_subdev(sd);
+ ov7740_free_controls(ov7740);
+
+ pm_runtime_get_sync(&client->dev);
+ pm_runtime_disable(&client->dev);
+ pm_runtime_set_suspended(&client->dev);
+ pm_runtime_put_noidle(&client->dev);
+
+ ov7740_set_power(ov7740, 0);
+ return 0;
+}
+
+static int __maybe_unused ov7740_runtime_suspend(struct device *dev)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+
+ ov7740_set_power(ov7740, 0);
+
+ return 0;
+}
+
+static int __maybe_unused ov7740_runtime_resume(struct device *dev)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
+
+ return ov7740_set_power(ov7740, 1);
+}
+
+static const struct i2c_device_id ov7740_id[] = {
+ { "ov7740", 0 },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(i2c, ov7740_id);
+
+static const struct dev_pm_ops ov7740_pm_ops = {
+ SET_RUNTIME_PM_OPS(ov7740_runtime_suspend, ov7740_runtime_resume, NULL)
+};
+
+static const struct of_device_id ov7740_of_match[] = {
+ {.compatible = "ovti,ov7740", },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, ov7740_of_match);
+
+static struct i2c_driver ov7740_i2c_driver = {
+ .driver = {
+ .name = "ov7740",
+ .pm = &ov7740_pm_ops,
+ .of_match_table = of_match_ptr(ov7740_of_match),
+ },
+ .probe = ov7740_probe,
+ .remove = ov7740_remove,
+ .id_table = ov7740_id,
+};
+module_i2c_driver(ov7740_i2c_driver);
+
+MODULE_DESCRIPTION("The V4L2 driver for Omnivision 7740 sensor");
+MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
+MODULE_LICENSE("GPL v2");
--
2.15.0
^ permalink raw reply related
* [PATCH v2 1/3] regulator: axp20x: add drivevbus support for axp803
From: Chen-Yu Tsai @ 2017-12-08 2:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512673460-7865-1-git-send-email-jagan@amarulasolutions.com>
On Fri, Dec 8, 2017 at 3:04 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
> Like axp221, axp223, axp813 the axp803 is also supporting external
> regulator to drive the OTG VBus through N_VBUSEN PMIC pin.
>
> Add support for it.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> Changes for v2:
> - New patch
>
> Documentation/devicetree/bindings/mfd/axp20x.txt | 2 +-
> drivers/regulator/axp20x-regulator.c | 2 ++
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
> index 9455503..34f24a2 100644
> --- a/Documentation/devicetree/bindings/mfd/axp20x.txt
> +++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
> @@ -43,7 +43,7 @@ Optional properties:
> regulator to drive the OTG VBus, rather then
> as an input pin which signals whether the
> board is driving OTG VBus or not.
> - (axp221 / axp223 / axp813 only)
> + (axp221 / axp223 / axp803/ axp813 only)
There is also a table of regulators in that file. Please update it.
ChenYu
>
> - x-powers,master-mode: Boolean (axp806 only). Set this when the PMIC is
> wired for master mode. The default is slave mode.
> diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c
> index 181622b..91b8ff8 100644
> --- a/drivers/regulator/axp20x-regulator.c
> +++ b/drivers/regulator/axp20x-regulator.c
> @@ -721,6 +721,8 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
> case AXP803_ID:
> regulators = axp803_regulators;
> nregulators = AXP803_REG_ID_MAX;
> + drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
> + "x-powers,drive-vbus-en");
> break;
> case AXP806_ID:
> regulators = axp806_regulators;
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH v2 2/3] arm64: allwinner: axp803: Add drivevbus regulator
From: Chen-Yu Tsai @ 2017-12-08 2:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512673460-7865-2-git-send-email-jagan@amarulasolutions.com>
On Fri, Dec 8, 2017 at 3:04 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
> Add reg_drivevbus regualtor for boards which are using
> external regulator to drive the OTG VBus through N_VBUSEN
> PMIC pin.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> Changes for v2:
> - New patch
>
> arch/arm64/boot/dts/allwinner/axp803.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/axp803.dtsi b/arch/arm64/boot/dts/allwinner/axp803.dtsi
> index ff8af52..e5eae8b 100644
> --- a/arch/arm64/boot/dts/allwinner/axp803.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/axp803.dtsi
> @@ -146,5 +146,10 @@
> regulator-max-microvolt = <3000000>;
> regulator-name = "rtc-ldo";
> };
> +
> + reg_drivevbus: drivevbus {
Could you keep the nodes in alphabetical order please?
Thanks
ChenYu
> + regulator-name = "drivevbus";
> + status = "disabled";
> + };
> };
> };
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH v4 4/8] arm: OMAP: Move dmtimer driver out of plat-omap to drivers under clocksource
From: Keerthy @ 2017-12-08 3:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <e71f4c7b-e5c7-6305-dc1c-274da6fbf07d@linaro.org>
On Thursday 07 December 2017 04:24 PM, Daniel Lezcano wrote:
> On 01/12/2017 06:16, Keerthy wrote:
>> Move the dmtimer driver out of plat-omap to clocksource.
>> So that non-omap devices also could use this.
>>
>> No Code changes done to the driver file.
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
>> ---
>>
>> Changes in v3:
>>
>> * Added Sebastian's Reviewed-by.
>>
>> Changes in v2:
>>
>> * No code changes in this v2 version. Only enhanced patch
>> statistics for renames.
>>
>> arch/arm/plat-omap/Kconfig | 6 ------
>> arch/arm/plat-omap/Makefile | 1 -
>> drivers/clocksource/Kconfig | 6 ++++++
>> drivers/clocksource/Makefile | 1 +
>> {arch/arm/plat-omap => drivers/clocksource}/dmtimer.c | 0
>> 5 files changed, 7 insertions(+), 7 deletions(-)
>> rename {arch/arm/plat-omap => drivers/clocksource}/dmtimer.c (100%)
>
> Take the opportunity to rename it timer-dm.c
okay.
>
>> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
>> index 7276afe..afc1a1d 100644
>> --- a/arch/arm/plat-omap/Kconfig
>> +++ b/arch/arm/plat-omap/Kconfig
>> @@ -106,12 +106,6 @@ config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
>> help
>> PPA routine service ID for setting L2 auxiliary control register.
>>
>> -config OMAP_DM_TIMER
>> - bool "Use dual-mode timer"
>> - depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
>> - help
>> - Select this option if you want to use OMAP Dual-Mode timers.
>> -
>> config OMAP_SERIAL_WAKE
>> bool "Enable wake-up events for serial ports"
>> depends on ARCH_OMAP1 && OMAP_MUX
>> diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
>> index 47e1867..7215ada 100644
>> --- a/arch/arm/plat-omap/Makefile
>> +++ b/arch/arm/plat-omap/Makefile
>> @@ -9,5 +9,4 @@ obj-y := sram.o dma.o counter_32k.o
>>
>> # omap_device support (OMAP2+ only at the moment)
>>
>> -obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
>> obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
>> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
>> index c729a88..4da66cf 100644
>> --- a/drivers/clocksource/Kconfig
>> +++ b/drivers/clocksource/Kconfig
>> @@ -46,6 +46,12 @@ config DIGICOLOR_TIMER
>> help
>> Enables the support for the digicolor timer driver.
>>
>> +config OMAP_DM_TIMER
>> + bool "Use dual-mode timer"
>> + depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
>> + help
>> + Select this option if you want to use Dual-Mode timers.
>> +
>
> So in the clocksource directory the rule is the following:
>
> The config option is silent except if COMPILE_TEST is set.
>
> It is the Kconfig's platform which select the driver so there is no deps
> on the ARCH.
Okay understood.
>
> config OMAP_DM_TIMER
> bool "Use dual-mode timer" if COMPILE_TEST
> help
> Select this option if you want to use Dual-Mode timers.
>
> Here you will have to make sure the driver compiles on x86.
Okay. I will check that in my next version.
Thanks for reviewing!
>
>> config DW_APB_TIMER
>> bool "DW APB timer driver" if COMPILE_TEST
>> help
>> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
>> index 72711f1..b077076 100644
>> --- a/drivers/clocksource/Makefile
>> +++ b/drivers/clocksource/Makefile
>> @@ -16,6 +16,7 @@ obj-$(CONFIG_EM_TIMER_STI) += em_sti.o
>> obj-$(CONFIG_CLKBLD_I8253) += i8253.o
>> obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
>> obj-$(CONFIG_DIGICOLOR_TIMER) += timer-digicolor.o
>> +obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
>> obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
>> obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
>> obj-$(CONFIG_FTTMR010_TIMER) += timer-fttmr010.o
>> diff --git a/arch/arm/plat-omap/dmtimer.c b/drivers/clocksource/dmtimer.c
>> similarity index 100%
>> rename from arch/arm/plat-omap/dmtimer.c
>> rename to drivers/clocksource/dmtimer.c
>>
>
>
^ permalink raw reply
* [PATCH V3] ACPI / GED: unregister interrupts during shutdown
From: Sinan Kaya @ 2017-12-08 4:40 UTC (permalink / raw)
To: linux-arm-kernel
Some GED interrupts could be pending by the time we are doing a reboot.
Even though GED driver uses devm_request_irq() to register the interrupt
handler, the handler is not being freed on time during a shutdown since
the driver is missing a shutdown callback.
If the ACPI handler is no longer available, this causes an interrupt
storm and delays shutdown.
1. Don't use devm family of functions for IRQ registration/free
2. Keep track of the events since free_irq() requires the dev_id parameter
passed into the request_irq() function.
3. Call free_irq() on both remove and shutdown explicitly.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/acpi/evged.c | 55 ++++++++++++++++++++++++++++++++++++++++++++++------
1 file changed, 49 insertions(+), 6 deletions(-)
diff --git a/drivers/acpi/evged.c b/drivers/acpi/evged.c
index 46f0603..38cb00e 100644
--- a/drivers/acpi/evged.c
+++ b/drivers/acpi/evged.c
@@ -49,6 +49,11 @@
#define MODULE_NAME "acpi-ged"
+struct acpi_ged_device {
+ struct device *dev;
+ struct list_head event_list;
+};
+
struct acpi_ged_event {
struct list_head node;
struct device *dev;
@@ -76,7 +81,8 @@ static acpi_status acpi_ged_request_interrupt(struct acpi_resource *ares,
unsigned int irq;
unsigned int gsi;
unsigned int irqflags = IRQF_ONESHOT;
- struct device *dev = context;
+ struct acpi_ged_device *geddev = context;
+ struct device *dev = geddev->dev;
acpi_handle handle = ACPI_HANDLE(dev);
acpi_handle evt_handle;
struct resource r;
@@ -102,8 +108,6 @@ static acpi_status acpi_ged_request_interrupt(struct acpi_resource *ares,
return AE_ERROR;
}
- dev_info(dev, "GED listening GSI %u @ IRQ %u\n", gsi, irq);
-
event = devm_kzalloc(dev, sizeof(*event), GFP_KERNEL);
if (!event)
return AE_ERROR;
@@ -116,26 +120,63 @@ static acpi_status acpi_ged_request_interrupt(struct acpi_resource *ares,
if (r.flags & IORESOURCE_IRQ_SHAREABLE)
irqflags |= IRQF_SHARED;
- if (devm_request_threaded_irq(dev, irq, NULL, acpi_ged_irq_handler,
- irqflags, "ACPI:Ged", event)) {
+ if (request_threaded_irq(irq, NULL, acpi_ged_irq_handler,
+ irqflags, "ACPI:Ged", event)) {
dev_err(dev, "failed to setup event handler for irq %u\n", irq);
return AE_ERROR;
}
+ dev_dbg(dev, "GED listening GSI %u @ IRQ %u\n", gsi, irq);
+ list_add_tail(&event->node, &geddev->event_list);
return AE_OK;
}
static int ged_probe(struct platform_device *pdev)
{
+ struct acpi_ged_device *geddev;
acpi_status acpi_ret;
+ geddev = devm_kzalloc(&pdev->dev, sizeof(*geddev), GFP_KERNEL);
+ if (!geddev)
+ return -ENOMEM;
+
+ geddev->dev = &pdev->dev;
+ INIT_LIST_HEAD(&geddev->event_list);
acpi_ret = acpi_walk_resources(ACPI_HANDLE(&pdev->dev), "_CRS",
- acpi_ged_request_interrupt, &pdev->dev);
+ acpi_ged_request_interrupt, geddev);
if (ACPI_FAILURE(acpi_ret)) {
dev_err(&pdev->dev, "unable to parse the _CRS record\n");
return -EINVAL;
}
+ platform_set_drvdata(pdev, geddev);
+
+ return 0;
+}
+
+static void ged_cleanup_irq(struct acpi_ged_device *geddev)
+{
+ struct acpi_ged_event *event, *next;
+
+ list_for_each_entry_safe(event, next, &geddev->event_list, node) {
+ free_irq(event->irq, event);
+ list_del(&event->node);
+ dev_dbg(geddev->dev, "GED releasing GSI %u @ IRQ %u\n",
+ event->gsi, event->irq);
+ }
+}
+
+static void ged_shutdown(struct platform_device *pdev)
+{
+ struct acpi_ged_device *geddev = platform_get_drvdata(pdev);
+
+ ged_cleanup_irq(geddev);
+}
+
+static int ged_remove(struct platform_device *pdev)
+{
+ struct acpi_ged_device *geddev = platform_get_drvdata(pdev);
+ ged_cleanup_irq(geddev);
return 0;
}
@@ -146,6 +187,8 @@ static int ged_probe(struct platform_device *pdev)
static struct platform_driver ged_driver = {
.probe = ged_probe,
+ .remove = ged_remove,
+ .shutdown = ged_shutdown,
.driver = {
.name = MODULE_NAME,
.acpi_match_table = ACPI_PTR(ged_acpi_ids),
--
1.9.1
^ permalink raw reply related
* [PATCH RESEND] arm64: fault: avoid send SIGBUS two times
From: gengdongjiu @ 2017-12-08 4:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5A295114.7020409@arm.com>
Hi James, Will
On 2017/12/7 22:32, James Morse wrote:
> Hi gengdongjiu, Will,
>
> On 07/12/17 05:55, gengdongjiu wrote:
>> On 2017/12/7 0:15, Will Deacon wrote:
>>>> --- a/arch/arm64/mm/fault.c
>>>> +++ b/arch/arm64/mm/fault.c
>>>> @@ -570,7 +570,6 @@ static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
>>>> {
>>>> struct siginfo info;
>>>> const struct fault_info *inf;
>>>> - int ret = 0;
>>>>
>>>> inf = esr_to_fault_info(esr);
>>>> pr_err("Synchronous External Abort: %s (0x%08x) at 0x%016lx\n",
>>>> @@ -585,7 +584,7 @@ static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
>>>> if (interrupts_enabled(regs))
>>>> nmi_enter();
>>>>
>>>> - ret = ghes_notify_sea();
>>>> + ghes_notify_sea();
>>>>
>>>> if (interrupts_enabled(regs))
>>>> nmi_exit();
>>>> @@ -600,7 +599,7 @@ static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
>>>> info.si_addr = (void __user *)addr;
>>>> arm64_notify_die("", regs, &info, esr);
>>>>
>>>> - return ret;
>>>> + return 0;
>
>>> Hmm, so this code is a bit of mess.
>>>
>>> Wouldn't it be better to have the signal dispatching code in do_mem_abort
>>> check ESR.ESR_ELx_FnV, so then do_sea wouldn't have to, and we could just
>>> return an error instead?
>
> FnV only applies to one of the Synchronous External Abort ESRs, hence it ended
> up in her>
>> Regardless ghes_notify_sea()'s return value, it always needs to deliver signal,
>> because ghes_notify_sea()'s return value does not reflect whether the memory error
>> handler(memory_failure()) handle the error successfully or failed. If let do_mem_abort()
>> delivers the signal, we should always let do_sea() return error, then the do_mem_abort() can
>> always deliver signal. Then we will see the strange log as shown below when happen Synchronous External Abort.
>>
>> [ 676.700652] Synchronous External Abort: synchronous external abort (0x96000410) at 0x0000000033ff7008
>> [ 676.723301] Unhandled fault: synchronous external abort (0x96000410) at 0x0000000033ff7008
>>
>> so I think it is better send the signal in the do_sea(), not send it in the do_mem_abort().
>
> I agree: I think improving the commit message would help here, something like:
> ---------
> do_sea() calls arm64_notify_die() which will always signal user-space.
> It also returns whether APEI claimed the external abort as a RAS notification.
> If it returns failure do_mem_abort() will signal user-space too.
>
> do_mem_abort() wants to know if we handled the error, we always call
> arm64_notify_die() so can always return success.
> ---------
Thanks for the agreement and good example. surely I will update the commit message to clearly describe it.
by the way, I think also change the info.si_code to "BUS_MCEERR_AR" is better, as shown [1].
BUS_MCEERR_AR can tell user space "Hardware memory error consumed on a error; action required".
so it is better than "0". In the X86 platform, it also use the "BUS_MCEERR_AR" for si_code[2] in "arch/x86/mm/fault.c".
what do you think about it?
[1]:
static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
{
.........
info.si_signo = SIGBUS;
info.si_errno = 0;
- info.si_code = 0;
+ info.si_code = BUS_MCEERR_AR;
}
[2]:
arch/x86/mm/fault.c:
static void
do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address,
u32 *pkey, unsigned int fault)
{
......
#ifdef CONFIG_MEMORY_FAILURE
if (fault & (VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE)) {
printk(KERN_ERR
"MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n",
tsk->comm, tsk->pid, address);
code = BUS_MCEERR_AR;
}
#endif
force_sig_info_fault(SIGBUS, code, address, tsk, pkey, fault);
}
>
> APEI's return value matters for KVM, and it will matter here too if we support
> kernel-first.
yes.
>
>
>> do_mem_abort() only send the signal when the exception does not defined in fault_info[]. Another benefit
>> is that do_sea() can send different signal according to the Synchronous External Abort type, such as SIGBUS or SIGKILL.
>> the do_mem_abort() can only send one kind signal.
>
> (I'm not convinced we want to do this other than via the firwmare/kernel RAS
> code, but that is a separate issue)
yes, that is a separate issue.
>
>
> Thanks,
>
> James
>
>
> .
>
^ permalink raw reply
* [PATCH v2 2/3] arm64: allwinner: axp803: Add drivevbus regulator
From: Jagan Teki @ 2017-12-08 5:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGb2v671Gra_Fq3Oa96zsQVeABxu0VKRyzVsiba93s5j+WqboA@mail.gmail.com>
On Fri, Dec 8, 2017 at 8:22 AM, Chen-Yu Tsai <wens@csie.org> wrote:
> On Fri, Dec 8, 2017 at 3:04 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
>> Add reg_drivevbus regualtor for boards which are using
>> external regulator to drive the OTG VBus through N_VBUSEN
>> PMIC pin.
>>
>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>> ---
>> Changes for v2:
>> - New patch
>>
>> arch/arm64/boot/dts/allwinner/axp803.dtsi | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/axp803.dtsi b/arch/arm64/boot/dts/allwinner/axp803.dtsi
>> index ff8af52..e5eae8b 100644
>> --- a/arch/arm64/boot/dts/allwinner/axp803.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/axp803.dtsi
>> @@ -146,5 +146,10 @@
>> regulator-max-microvolt = <3000000>;
>> regulator-name = "rtc-ldo";
>> };
>> +
>> + reg_drivevbus: drivevbus {
>
> Could you keep the nodes in alphabetical order please?
thought the same, but this seems to be different regulator from above
AXP_DESC regulators and even binding documentation follow this order.
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply
* [PATCH v1 0/4] add support of cpufreq to mt8173 and mt2712
From: Andrew-sh Cheng @ 2017-12-08 6:07 UTC (permalink / raw)
To: linux-arm-kernel
This series is based on v4.15-rc1 and [1].
Mediatek projects will use mediate-cpufreq.c as cpufreq driver,
so add mediatek related projects into black list of cpufreq_dt.c
mt8173 and mt2712 both support 2 clusters, and the main difference
is that mt2712 currently only support fixed voltage.
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-November/544072.html
Andrew-sh Cheng (4):
cpufreq: mediatek: add mt2712 into compatible list
cpufreq: mediatek: Add mediatek related projects into blacklist
arm64: dts: mediatek: add mt8173 cpufreq related device nodes
arm64: dts: mediatek: add mt2712 cpufreq related device nodes
arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 +++++++++
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 ++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++
drivers/cpufreq/cpufreq-dt-platdev.c | 8 +++
drivers/cpufreq/mediatek-cpufreq.c | 1 +
6 files changed, 201 insertions(+)
--
2.6.4
^ permalink raw reply
* [PATCH v1 1/4] cpufreq: mediatek: add mt2712 into compatible list
From: Andrew-sh Cheng @ 2017-12-08 6:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512713278-17807-1-git-send-email-andrew-sh.cheng@mediatek.com>
Support mt2712 in mediatek-cpufreq.c
Signed-off-by: Andrew-sh Cheng <andrew-sh.cheng@mediatek.com>
---
drivers/cpufreq/mediatek-cpufreq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
index 18c4bd9..62aec5c 100644
--- a/drivers/cpufreq/mediatek-cpufreq.c
+++ b/drivers/cpufreq/mediatek-cpufreq.c
@@ -574,6 +574,7 @@ static struct platform_driver mtk_cpufreq_platdrv = {
/* List of machines supported by this driver */
static const struct of_device_id mtk_cpufreq_machines[] __initconst = {
{ .compatible = "mediatek,mt2701", },
+ { .compatible = "mediatek,mt2712", },
{ .compatible = "mediatek,mt7622", },
{ .compatible = "mediatek,mt7623", },
{ .compatible = "mediatek,mt817x", },
--
2.6.4
^ permalink raw reply related
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