* [PATCH v2 3/5] ARM: davinci: make davinci_clk_reset() static
From: David Lechner @ 2017-12-09 1:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512783831-19487-1-git-send-email-david@lechnology.com>
This makes davinci_clk_reset() static. It is not used anywhere else.
Signed-off-by: David Lechner <david@lechnology.com>
---
v2 changes: None
arch/arm/mach-davinci/clock.c | 3 +--
arch/arm/mach-davinci/clock.h | 1 -
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 5f0a31d..c149b24 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -59,7 +59,7 @@ void davinci_clk_disable(struct clk *clk)
davinci_clk_disable(clk->parent);
}
-int davinci_clk_reset(struct clk *clk, bool reset)
+static int davinci_clk_reset(struct clk *clk, bool reset)
{
unsigned long flags;
@@ -73,7 +73,6 @@ int davinci_clk_reset(struct clk *clk, bool reset)
return 0;
}
-EXPORT_SYMBOL(davinci_clk_reset);
int davinci_clk_reset_assert(struct clk *clk)
{
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index e4afaa9..bf60cdf 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -124,7 +124,6 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
int davinci_set_refclk_rate(unsigned long rate);
int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
-int davinci_clk_reset(struct clk *clk, bool reset);
void davinci_clk_enable(struct clk *clk);
void davinci_clk_disable(struct clk *clk);
--
2.7.4
^ permalink raw reply related
* [PATCH v2 2/5] ARM: davinci: don't use static clk_lookup
From: David Lechner @ 2017-12-09 1:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512783831-19487-1-git-send-email-david@lechnology.com>
In preparation of moving to the common clock framework, usage of static
struct clk_lookup is removed. The common clock framework uses an opaque
struct clk, so we won't be able to use static tables as was previously
done.
davinci_clk_init() is changed to init a single clock instead of a table.
Signed-off-by: David Lechner <david@lechnology.com>
---
v2 changes:
* No longer introduces init_time functions since those are now in the previous
patch.
arch/arm/mach-davinci/clock.c | 75 +++++++---------
arch/arm/mach-davinci/clock.h | 9 +-
arch/arm/mach-davinci/da830.c | 111 ++++++++++++-----------
arch/arm/mach-davinci/da850.c | 133 ++++++++++++++--------------
arch/arm/mach-davinci/devices-da8xx.c | 5 +-
arch/arm/mach-davinci/dm355.c | 93 ++++++++++---------
arch/arm/mach-davinci/dm365.c | 123 +++++++++++++------------
arch/arm/mach-davinci/dm644x.c | 85 +++++++++---------
arch/arm/mach-davinci/dm646x.c | 94 ++++++++++----------
arch/arm/mach-davinci/include/mach/common.h | 1 -
arch/arm/mach-davinci/usb-da8xx.c | 15 +---
11 files changed, 356 insertions(+), 388 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index f77a4f7..5f0a31d 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -607,62 +607,51 @@ int davinci_set_refclk_rate(unsigned long rate)
return 0;
}
-int __init davinci_clk_init(struct clk_lookup *clocks)
+void __init davinci_clk_init(struct clk *clk, const char *con_id,
+ const char *dev_id)
{
- struct clk_lookup *c;
- struct clk *clk;
- size_t num_clocks = 0;
-
- for (c = clocks; c->clk; c++) {
- clk = c->clk;
+ if (!clk->recalc) {
- if (!clk->recalc) {
+ /* Check if clock is a PLL */
+ if (clk->pll_data)
+ clk->recalc = clk_pllclk_recalc;
- /* Check if clock is a PLL */
- if (clk->pll_data)
- clk->recalc = clk_pllclk_recalc;
+ /* Else, if it is a PLL-derived clock */
+ else if (clk->flags & CLK_PLL)
+ clk->recalc = clk_sysclk_recalc;
- /* Else, if it is a PLL-derived clock */
- else if (clk->flags & CLK_PLL)
- clk->recalc = clk_sysclk_recalc;
-
- /* Otherwise, it is a leaf clock (PSC clock) */
- else if (clk->parent)
- clk->recalc = clk_leafclk_recalc;
- }
+ /* Otherwise, it is a leaf clock (PSC clock) */
+ else if (clk->parent)
+ clk->recalc = clk_leafclk_recalc;
+ }
- if (clk->pll_data) {
- struct pll_data *pll = clk->pll_data;
+ if (clk->pll_data) {
+ struct pll_data *pll = clk->pll_data;
- if (!pll->div_ratio_mask)
- pll->div_ratio_mask = PLLDIV_RATIO_MASK;
+ if (!pll->div_ratio_mask)
+ pll->div_ratio_mask = PLLDIV_RATIO_MASK;
- if (pll->phys_base && !pll->base) {
- pll->base = ioremap(pll->phys_base, SZ_4K);
- WARN_ON(!pll->base);
- }
+ if (pll->phys_base && !pll->base) {
+ pll->base = ioremap(pll->phys_base, SZ_4K);
+ WARN_ON(!pll->base);
}
+ }
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
-
- if (clk->lpsc)
- clk->flags |= CLK_PSC;
-
- if (clk->flags & PSC_LRST)
- clk->reset = davinci_clk_reset;
+ if (clk->recalc)
+ clk->rate = clk->recalc(clk);
- clk_register(clk);
- num_clocks++;
+ if (clk->lpsc)
+ clk->flags |= CLK_PSC;
- /* Turn on clocks that Linux doesn't otherwise manage */
- if (clk->flags & ALWAYS_ENABLED)
- clk_enable(clk);
- }
+ if (clk->flags & PSC_LRST)
+ clk->reset = davinci_clk_reset;
- clkdev_add_table(clocks, num_clocks);
+ clk_register(clk);
+ clk_register_clkdev(clk, con_id, dev_id);
- return 0;
+ /* Turn on clocks that Linux doesn't otherwise manage */
+ if (clk->flags & ALWAYS_ENABLED)
+ clk_enable(clk);
}
#ifdef CONFIG_DEBUG_FS
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index fa2b837..e4afaa9 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -118,14 +118,7 @@ struct clk {
#define PSC_FORCE BIT(6) /* Force module state transtition */
#define PSC_LRST BIT(8) /* Use local reset on enable/disable */
-#define CLK(dev, con, ck) \
- { \
- .dev_id = dev, \
- .con_id = con, \
- .clk = ck, \
- } \
-
-int davinci_clk_init(struct clk_lookup *clocks);
+void davinci_clk_init(struct clk *clk, const char *con_id, const char *dev_id);
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
unsigned int mult, unsigned int postdiv);
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 4c95bac..1a99d22 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -378,60 +378,60 @@ static struct clk rmii_clk = {
.parent = &pll0_sysclk7,
};
-static struct clk_lookup da830_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("davinci-wdt", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "scr0_ss", &scr0_ss_clk),
- CLK(NULL, "scr1_ss", &scr1_ss_clk),
- CLK(NULL, "scr2_ss", &scr2_ss_clk),
- CLK(NULL, "dmax", &dmax_clk),
- CLK(NULL, "tpcc", &tpcc_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK("da830-mmc.0", NULL, &mmcsd_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK(NULL, "ecap0", &ecap0_clk),
- CLK(NULL, "ecap1", &ecap1_clk),
- CLK(NULL, "ecap2", &ecap2_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK("eqep.0", NULL, &eqep0_clk),
- CLK("eqep.1", NULL, &eqep1_clk),
- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
- CLK("musb-da8xx", "usb20", &usb20_clk),
- CLK("cppi41-dmaengine", NULL, &cppi41_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "secu_mgr", &secu_mgr_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK("ohci-da8xx", "usb11", &usb11_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void da830_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll0_clk, "pll0", NULL);
+ davinci_clk_init(&pll0_aux_clk, "pll0_aux", NULL);
+ davinci_clk_init(&pll0_sysclk2, "pll0_sysclk2", NULL);
+ davinci_clk_init(&pll0_sysclk3, "pll0_sysclk3", NULL);
+ davinci_clk_init(&pll0_sysclk4, "pll0_sysclk4", NULL);
+ davinci_clk_init(&pll0_sysclk5, "pll0_sysclk5", NULL);
+ davinci_clk_init(&pll0_sysclk6, "pll0_sysclk6", NULL);
+ davinci_clk_init(&pll0_sysclk7, "pll0_sysclk7", NULL);
+ davinci_clk_init(&i2c0_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&timerp64_0_clk, "timer0", NULL);
+ davinci_clk_init(&timerp64_1_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&arm_rom_clk, "arm_rom", NULL);
+ davinci_clk_init(&scr0_ss_clk, "scr0_ss", NULL);
+ davinci_clk_init(&scr1_ss_clk, "scr1_ss", NULL);
+ davinci_clk_init(&scr2_ss_clk, "scr2_ss", NULL);
+ davinci_clk_init(&dmax_clk, "dmax", NULL);
+ davinci_clk_init(&tpcc_clk, "tpcc", NULL);
+ davinci_clk_init(&tptc0_clk, "tptc0", NULL);
+ davinci_clk_init(&tptc1_clk, "tptc1", NULL);
+ davinci_clk_init(&mmcsd_clk, NULL, "da830-mmc.0");
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&ecap0_clk, "ecap0", NULL);
+ davinci_clk_init(&ecap1_clk, "ecap1", NULL);
+ davinci_clk_init(&ecap2_clk, "ecap2", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&eqep0_clk, NULL, "eqep.0");
+ davinci_clk_init(&eqep1_clk, NULL, "eqep.1");
+ davinci_clk_init(&lcdc_clk, "fck", "da8xx_lcdc.0");
+ davinci_clk_init(&mcasp0_clk, NULL, "davinci-mcasp.0");
+ davinci_clk_init(&mcasp1_clk, NULL, "davinci-mcasp.1");
+ davinci_clk_init(&mcasp2_clk, NULL, "davinci-mcasp.2");
+ davinci_clk_init(&usb20_clk, "usb20", "musb-da8xx");
+ davinci_clk_init(&cppi41_clk, NULL, "cppi41-dmaengine");
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&aintc_clk, "aintc", NULL);
+ davinci_clk_init(&secu_mgr_clk, "secu_mgr", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&i2c1_clk, NULL, "i2c_davinci.2");
+ davinci_clk_init(&usb11_clk, "usb11", "ohci-da8xx");
+ davinci_clk_init(&emif3_clk, "emif3", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&rmii_clk, "rmii", NULL);
+}
/*
* Device specific mux setup
@@ -1200,7 +1200,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
.ids = da830_ids,
.ids_num = ARRAY_SIZE(da830_ids),
- .cpu_clks = da830_clks,
.psc_bases = da830_psc_bases,
.psc_bases_num = ARRAY_SIZE(da830_psc_bases),
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
@@ -1224,6 +1223,6 @@ void __init da830_init(void)
void __init da830_init_time(void)
{
- davinci_clk_init(davinci_soc_info_da830.cpu_clks);
+ da830_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 14c0579..ab287d4 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -518,71 +518,71 @@ static struct clk ecap2_clk = {
.parent = &ecap_clk,
};
-static struct clk_lookup da850_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk1", &pll0_sysclk1),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "async3", &async3_clk),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("davinci-wdt", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "tpcc0", &tpcc0_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK(NULL, "tpcc1", &tpcc1_clk),
- CLK(NULL, "tptc2", &tptc2_clk),
- CLK("pruss_uio", "pruss", &pruss_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &mdio_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp_clk),
- CLK("davinci-mcbsp.0", NULL, &mcbsp0_clk),
- CLK("davinci-mcbsp.1", NULL, &mcbsp1_clk),
- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
- CLK("da830-mmc.0", NULL, &mmcsd0_clk),
- CLK("da830-mmc.1", NULL, &mmcsd1_clk),
- CLK("ti-aemif", NULL, &aemif_clk),
- CLK("davinci-nand.0", "aemif", &aemif_nand_clk),
- CLK("ohci-da8xx", "usb11", &usb11_clk),
- CLK("musb-da8xx", "usb20", &usb20_clk),
- CLK("cppi41-dmaengine", NULL, &cppi41_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("vpif", NULL, &vpif_clk),
- CLK("ahci_da850", "fck", &sata_clk),
- CLK("davinci-rproc.0", NULL, &dsp_clk),
- CLK(NULL, NULL, &ehrpwm_clk),
- CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
- CLK("ehrpwm.1", "fck", &ehrpwm1_clk),
- CLK(NULL, NULL, &ehrpwm_tbclk),
- CLK("ehrpwm.0", "tbclk", &ehrpwm0_tbclk),
- CLK("ehrpwm.1", "tbclk", &ehrpwm1_tbclk),
- CLK(NULL, NULL, &ecap_clk),
- CLK("ecap.0", "fck", &ecap0_clk),
- CLK("ecap.1", "fck", &ecap1_clk),
- CLK("ecap.2", "fck", &ecap2_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void da850_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll0_clk, "pll0", NULL);
+ davinci_clk_init(&pll0_aux_clk, "pll0_aux", NULL);
+ davinci_clk_init(&pll0_sysclk1, "pll0_sysclk1", NULL);
+ davinci_clk_init(&pll0_sysclk2, "pll0_sysclk2", NULL);
+ davinci_clk_init(&pll0_sysclk3, "pll0_sysclk3", NULL);
+ davinci_clk_init(&pll0_sysclk4, "pll0_sysclk4", NULL);
+ davinci_clk_init(&pll0_sysclk5, "pll0_sysclk5", NULL);
+ davinci_clk_init(&pll0_sysclk6, "pll0_sysclk6", NULL);
+ davinci_clk_init(&pll0_sysclk7, "pll0_sysclk7", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&async3_clk, "async3", NULL);
+ davinci_clk_init(&i2c0_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&timerp64_0_clk, "timer0", NULL);
+ davinci_clk_init(&timerp64_1_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&arm_rom_clk, "arm_rom", NULL);
+ davinci_clk_init(&tpcc0_clk, "tpcc0", NULL);
+ davinci_clk_init(&tptc0_clk, "tptc0", NULL);
+ davinci_clk_init(&tptc1_clk, "tptc1", NULL);
+ davinci_clk_init(&tpcc1_clk, "tpcc1", NULL);
+ davinci_clk_init(&tptc2_clk, "tptc2", NULL);
+ davinci_clk_init(&pruss_clk, "pruss", "pruss_uio");
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&aintc_clk, "aintc", NULL);
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&i2c1_clk, NULL, "i2c_davinci.2");
+ davinci_clk_init(&emif3_clk, "emif3", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&rmii_clk, "rmii", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&mdio_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&mcasp_clk, NULL, "davinci-mcasp.0");
+ davinci_clk_init(&mcbsp0_clk, NULL, "davinci-mcbsp.0");
+ davinci_clk_init(&mcbsp1_clk, NULL, "davinci-mcbsp.1");
+ davinci_clk_init(&lcdc_clk, "fck", "da8xx_lcdc.0");
+ davinci_clk_init(&mmcsd0_clk, NULL, "da830-mmc.0");
+ davinci_clk_init(&mmcsd1_clk, NULL, "da830-mmc.1");
+ davinci_clk_init(&aemif_clk, NULL, "ti-aemif");
+ davinci_clk_init(&aemif_nand_clk, "aemif", "davinci-nand.0");
+ davinci_clk_init(&usb11_clk, "usb11", "ohci-da8xx");
+ davinci_clk_init(&usb20_clk, "usb20", "musb-da8xx");
+ davinci_clk_init(&cppi41_clk, NULL, "cppi41-dmaengine");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&vpif_clk, NULL, "vpif");
+ davinci_clk_init(&sata_clk, "fck", "ahci_da850");
+ davinci_clk_init(&dsp_clk, NULL, "davinci-rproc.0");
+ davinci_clk_init(&ehrpwm_clk, NULL, NULL);
+ davinci_clk_init(&ehrpwm0_clk, "fck", "ehrpwm.0");
+ davinci_clk_init(&ehrpwm1_clk, "fck", "ehrpwm.1");
+ davinci_clk_init(&ehrpwm_tbclk, NULL, NULL);
+ davinci_clk_init(&ehrpwm0_tbclk, "tbclk", "ehrpwm.0");
+ davinci_clk_init(&ehrpwm1_tbclk, "tbclk", "ehrpwm.1");
+ davinci_clk_init(&ecap_clk, NULL, NULL);
+ davinci_clk_init(&ecap0_clk, "fck", "ecap.0");
+ davinci_clk_init(&ecap1_clk, "fck", "ecap.1");
+ davinci_clk_init(&ecap2_clk, "fck", "ecap.2");
+}
/*
* Device specific mux setup
@@ -1353,7 +1353,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
.ids = da850_ids,
.ids_num = ARRAY_SIZE(da850_ids),
- .cpu_clks = da850_clks,
.psc_bases = da850_psc_bases,
.psc_bases_num = ARRAY_SIZE(da850_psc_bases),
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
@@ -1396,6 +1395,6 @@ void __init da850_init(void)
void __init da850_init_time(void)
{
- davinci_clk_init(davinci_soc_info_da850.cpu_clks);
+ da850_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 22440c0..cc497f4 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -1059,9 +1059,6 @@ static struct clk sata_refclk = {
.set_rate = davinci_simple_set_rate,
};
-static struct clk_lookup sata_refclk_lookup =
- CLK("ahci_da850", "refclk", &sata_refclk);
-
int __init da850_register_sata_refclk(int rate)
{
int ret;
@@ -1071,7 +1068,7 @@ int __init da850_register_sata_refclk(int rate)
if (ret)
return ret;
- clkdev_add(&sata_refclk_lookup);
+ clk_register_clkdev(&sata_refclk, "refclk", "ahci_da850");
return 0;
}
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 67fc2d4..5d8a986 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -337,51 +337,51 @@ static struct clk usb_clk = {
.lpsc = DAVINCI_LPSC_USB,
};
-static struct clk_lookup dm355_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "vpss_dac", &vpss_dac_clk),
- CLK("vpss", "master", &vpss_master_clk),
- CLK("vpss", "slave", &vpss_slave_clk),
- CLK(NULL, "clkout1", &clkout1_clk),
- CLK(NULL, "clkout2", &clkout2_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
- CLK(NULL, "clkout3", &clkout3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "mjcp", &mjcp_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("davinci-mcbsp.0", NULL, &asp0_clk),
- CLK("davinci-mcbsp.1", NULL, &asp1_clk),
- CLK("dm6441-mmc.0", NULL, &mmcsd0_clk),
- CLK("dm6441-mmc.1", NULL, &mmcsd1_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("spi_davinci.2", NULL, &spi2_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "pwm3", &pwm3_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK(NULL, "timer3", &timer3_clk),
- CLK(NULL, "rto", &rto_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm355_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk1", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&pll1_sysclk4, "pll1_sysclk4", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclkbp", NULL);
+ davinci_clk_init(&vpss_dac_clk, "vpss_dac", NULL);
+ davinci_clk_init(&vpss_master_clk, "master", "vpss");
+ davinci_clk_init(&vpss_slave_clk, "slave", "vpss");
+ davinci_clk_init(&clkout1_clk, "clkout1", NULL);
+ davinci_clk_init(&clkout2_clk, "clkout2", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&pll2_sysclkbp, "pll2_sysclkbp", NULL);
+ davinci_clk_init(&clkout3_clk, "clkout3", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&mjcp_clk, "mjcp", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&asp0_clk, NULL, "davinci-mcbsp.0");
+ davinci_clk_init(&asp1_clk, NULL, "davinci-mcbsp.1");
+ davinci_clk_init(&mmcsd0_clk, NULL, "dm6441-mmc.0");
+ davinci_clk_init(&mmcsd1_clk, NULL, "dm6441-mmc.1");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&spi2_clk, NULL, "spi_davinci.2");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&pwm3_clk, "pwm3", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&timer3_clk, "timer3", NULL);
+ davinci_clk_init(&rto_clk, "rto", NULL);
+ davinci_clk_init(&usb_clk, "usb", NULL);
+}
/*----------------------------------------------------------------------*/
@@ -1012,7 +1012,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
.jtag_id_reg = 0x01c40028,
.ids = dm355_ids,
.ids_num = ARRAY_SIZE(dm355_ids),
- .cpu_clks = dm355_clks,
.psc_bases = dm355_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm355_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -1047,7 +1046,7 @@ void __init dm355_init(void)
void __init dm355_init_time(void)
{
- davinci_clk_init(davinci_soc_info_dm355.cpu_clks);
+ dm355_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 99958e6..74037a6 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -425,66 +425,66 @@ static struct clk mjcp_clk = {
.lpsc = DM365_LPSC_MJCP,
};
-static struct clk_lookup dm365_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "clkout0", &clkout0_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
- CLK(NULL, "pll1_sysclk8", &pll1_sysclk8),
- CLK(NULL, "pll1_sysclk9", &pll1_sysclk9),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_aux", &pll2_aux_clk),
- CLK(NULL, "clkout1", &clkout1_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
- CLK(NULL, "pll2_sysclk3", &pll2_sysclk3),
- CLK(NULL, "pll2_sysclk4", &pll2_sysclk4),
- CLK(NULL, "pll2_sysclk5", &pll2_sysclk5),
- CLK(NULL, "pll2_sysclk6", &pll2_sysclk6),
- CLK(NULL, "pll2_sysclk7", &pll2_sysclk7),
- CLK(NULL, "pll2_sysclk8", &pll2_sysclk8),
- CLK(NULL, "pll2_sysclk9", &pll2_sysclk9),
- CLK(NULL, "vpss_dac", &vpss_dac_clk),
- CLK("vpss", "master", &vpss_master_clk),
- CLK("vpss", "slave", &vpss_slave_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("da830-mmc.0", NULL, &mmcsd0_clk),
- CLK("da830-mmc.1", NULL, &mmcsd1_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("spi_davinci.2", NULL, &spi2_clk),
- CLK("spi_davinci.3", NULL, &spi3_clk),
- CLK("spi_davinci.4", NULL, &spi4_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "pwm3", &pwm3_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK(NULL, "timer3", &timer3_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK("davinci_voicecodec", NULL, &voicecodec_clk),
- CLK("davinci-mcbsp", NULL, &asp0_clk),
- CLK(NULL, "rto", &rto_clk),
- CLK(NULL, "mjcp", &mjcp_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm365_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclkbp", NULL);
+ davinci_clk_init(&clkout0_clk, "clkout0", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk1", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&pll1_sysclk4, "pll1_sysclk4", NULL);
+ davinci_clk_init(&pll1_sysclk5, "pll1_sysclk5", NULL);
+ davinci_clk_init(&pll1_sysclk6, "pll1_sysclk6", NULL);
+ davinci_clk_init(&pll1_sysclk7, "pll1_sysclk7", NULL);
+ davinci_clk_init(&pll1_sysclk8, "pll1_sysclk8", NULL);
+ davinci_clk_init(&pll1_sysclk9, "pll1_sysclk9", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_aux_clk, "pll2_aux", NULL);
+ davinci_clk_init(&clkout1_clk, "clkout1", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&pll2_sysclk2, "pll2_sysclk2", NULL);
+ davinci_clk_init(&pll2_sysclk3, "pll2_sysclk3", NULL);
+ davinci_clk_init(&pll2_sysclk4, "pll2_sysclk4", NULL);
+ davinci_clk_init(&pll2_sysclk5, "pll2_sysclk5", NULL);
+ davinci_clk_init(&pll2_sysclk6, "pll2_sysclk6", NULL);
+ davinci_clk_init(&pll2_sysclk7, "pll2_sysclk7", NULL);
+ davinci_clk_init(&pll2_sysclk8, "pll2_sysclk8", NULL);
+ davinci_clk_init(&pll2_sysclk9, "pll2_sysclk9", NULL);
+ davinci_clk_init(&vpss_dac_clk, "vpss_dac", NULL);
+ davinci_clk_init(&vpss_master_clk, "master", "vpss");
+ davinci_clk_init(&vpss_slave_clk, "slave", "vpss");
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&mmcsd0_clk, NULL, "da830-mmc.0");
+ davinci_clk_init(&mmcsd1_clk, NULL, "da830-mmc.1");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&spi2_clk, NULL, "spi_davinci.2");
+ davinci_clk_init(&spi3_clk, NULL, "spi_davinci.3");
+ davinci_clk_init(&spi4_clk, NULL, "spi_davinci.4");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&pwm3_clk, "pwm3", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&timer3_clk, "timer3", NULL);
+ davinci_clk_init(&usb_clk, "usb", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&voicecodec_clk, NULL, "davinci_voicecodec");
+ davinci_clk_init(&asp0_clk, NULL, "davinci-mcbsp");
+ davinci_clk_init(&rto_clk, "rto", NULL);
+ davinci_clk_init(&mjcp_clk, "mjcp", NULL);
+}
/*----------------------------------------------------------------------*/
@@ -1114,7 +1114,6 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
.jtag_id_reg = 0x01c40028,
.ids = dm365_ids,
.ids_num = ARRAY_SIZE(dm365_ids),
- .cpu_clks = dm365_clks,
.psc_bases = dm365_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm365_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -1170,7 +1169,7 @@ void __init dm365_init(void)
void __init dm365_init_time(void)
{
- davinci_clk_init(davinci_soc_info_dm365.cpu_clks);
+ dm365_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 903cfeb..1b27849 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -285,47 +285,47 @@ static struct clk timer2_clk = {
.usecount = 1, /* REVISIT: why can't this be disabled? */
};
-static struct clk_lookup dm644x_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
- CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
- CLK(NULL, "dsp", &dsp_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "vicp", &vicp_clk),
- CLK("vpss", "master", &vpss_master_clk),
- CLK("vpss", "slave", &vpss_slave_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("palm_bk3710", NULL, &ide_clk),
- CLK("davinci-mcbsp", NULL, &asp_clk),
- CLK("dm6441-mmc.0", NULL, &mmcsd_clk),
- CLK(NULL, "spi", &spi_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK(NULL, "vlynq", &vlynq_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm644x_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk1", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&pll1_sysclk5, "pll1_sysclk5", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclkbp", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&pll2_sysclk2, "pll2_sysclk2", NULL);
+ davinci_clk_init(&pll2_sysclkbp, "pll2_sysclkbp", NULL);
+ davinci_clk_init(&dsp_clk, "dsp", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&vicp_clk, "vicp", NULL);
+ davinci_clk_init(&vpss_master_clk, "master", "vpss");
+ davinci_clk_init(&vpss_slave_clk, "slave", "vpss");
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&ide_clk, NULL, "palm_bk3710");
+ davinci_clk_init(&asp_clk, NULL, "davinci-mcbsp");
+ davinci_clk_init(&mmcsd_clk, NULL, "dm6441-mmc.0");
+ davinci_clk_init(&spi_clk, "spi", NULL);
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&usb_clk, "usb", NULL);
+ davinci_clk_init(&vlynq_clk, "vlynq", NULL);
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+}
static struct emac_platform_data dm644x_emac_pdata = {
.ctrl_reg_offset = DM644X_EMAC_CNTRL_OFFSET,
@@ -905,7 +905,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
.jtag_id_reg = 0x01c40028,
.ids = dm644x_ids,
.ids_num = ARRAY_SIZE(dm644x_ids),
- .cpu_clks = dm644x_clks,
.psc_bases = dm644x_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm644x_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -935,7 +934,7 @@ void __init dm644x_init(void)
void __init dm644x_init_time(void)
{
- davinci_clk_init(davinci_soc_info_dm644x.cpu_clks);
+ dm644x_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 6136d35..56c0bdb 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -320,49 +320,54 @@ static struct clk vpif1_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk_lookup dm646x_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "aux", &aux_clkin),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk8),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk9),
- CLK(NULL, "pll1_sysclk", &pll1_sysclkbp),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "dsp", &dsp_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "edma_cc", &edma_cc_clk),
- CLK(NULL, "edma_tc0", &edma_tc0_clk),
- CLK(NULL, "edma_tc1", &edma_tc1_clk),
- CLK(NULL, "edma_tc2", &edma_tc2_clk),
- CLK(NULL, "edma_tc3", &edma_tc3_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK("palm_bk3710", NULL, &ide_clk),
- CLK(NULL, "vpif0", &vpif0_clk),
- CLK(NULL, "vpif1", &vpif1_clk),
- CLK(NULL, NULL, NULL),
-};
+#define DM6467T_EVM_REF_FREQ 33000000
+
+static __init void dm646x_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&aux_clkin, "aux", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk4, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk5, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk6, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk8, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk9, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&dsp_clk, "dsp", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&edma_cc_clk, "edma_cc", NULL);
+ davinci_clk_init(&edma_tc0_clk, "edma_tc0", NULL);
+ davinci_clk_init(&edma_tc1_clk, "edma_tc1", NULL);
+ davinci_clk_init(&edma_tc2_clk, "edma_tc2", NULL);
+ davinci_clk_init(&edma_tc3_clk, "edma_tc3", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&mcasp0_clk, NULL, "davinci-mcasp.0");
+ davinci_clk_init(&mcasp1_clk, NULL, "davinci-mcasp.1");
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&ide_clk, NULL, "palm_bk3710");
+ davinci_clk_init(&vpif0_clk, "vpif0", NULL);
+ davinci_clk_init(&vpif1_clk, "vpif1", NULL);
+
+ if (machine_is_davinci_dm6467tevm())
+ davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
+}
static struct emac_platform_data dm646x_emac_pdata = {
.ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET,
@@ -888,7 +893,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
.jtag_id_reg = 0x01c40028,
.ids = dm646x_ids,
.ids_num = ARRAY_SIZE(dm646x_ids),
- .cpu_clks = dm646x_clks,
.psc_bases = dm646x_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm646x_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -960,7 +964,7 @@ void __init dm646x_init(void)
void __init dm646x_init_time(void)
{
- davinci_clk_init(davinci_soc_info_dm646x.cpu_clks);
+ dm646x_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 037aa66..9b85d5d 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -53,7 +53,6 @@ struct davinci_soc_info {
u32 jtag_id_reg;
struct davinci_id *ids;
unsigned long ids_num;
- struct clk_lookup *cpu_clks;
u32 *psc_bases;
unsigned long psc_bases_num;
u32 pinmux_base;
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index d480a02..a2e575e 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -133,9 +133,6 @@ static struct clk usb_refclkin = {
.set_rate = davinci_simple_set_rate,
};
-static struct clk_lookup usb_refclkin_lookup =
- CLK(NULL, "usb_refclkin", &usb_refclkin);
-
/**
* da8xx_register_usb_refclkin - register USB_REFCLKIN clock
*
@@ -154,7 +151,7 @@ int __init da8xx_register_usb_refclkin(int rate)
if (ret)
return ret;
- clkdev_add(&usb_refclkin_lookup);
+ clk_register_clkdev(&usb_refclkin, "usb_refclkin", NULL);
return 0;
}
@@ -262,9 +259,6 @@ static struct clk usb20_phy_clk = {
.set_parent = usb20_phy_clk_set_parent,
};
-static struct clk_lookup usb20_phy_clk_lookup =
- CLK("da8xx-usb-phy", "usb20_phy", &usb20_phy_clk);
-
/**
* da8xx_register_usb20_phy_clk - register USB0PHYCLKMUX clock
*
@@ -291,7 +285,7 @@ int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
usb20_phy_clk.parent = parent;
ret = clk_register(&usb20_phy_clk);
if (!ret)
- clkdev_add(&usb20_phy_clk_lookup);
+ clk_register_clkdev(&usb20_phy_clk, "usb20_phy", "da8xx-usb-phy");
clk_put(parent);
@@ -324,9 +318,6 @@ static struct clk usb11_phy_clk = {
.set_parent = usb11_phy_clk_set_parent,
};
-static struct clk_lookup usb11_phy_clk_lookup =
- CLK("da8xx-usb-phy", "usb11_phy", &usb11_phy_clk);
-
/**
* da8xx_register_usb11_phy_clk - register USB1PHYCLKMUX clock
*
@@ -348,7 +339,7 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
usb11_phy_clk.parent = parent;
ret = clk_register(&usb11_phy_clk);
if (!ret)
- clkdev_add(&usb11_phy_clk_lookup);
+ clk_register_clkdev(&usb11_phy_clk, "usb11_phy", "da8xx-usb-phy");
clk_put(parent);
--
2.7.4
^ permalink raw reply related
* [PATCH v2 1/5] ARM: davinci: move davinci_clk_init() to init_time
From: David Lechner @ 2017-12-09 1:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512783831-19487-1-git-send-email-david@lechnology.com>
This moves the call of davinci_clk_init() from map_io to init_time for all
boards.
This is the proper place to init clocks. This is also done in preparation
for moving to the common clock framework.
Signed-off-by: David Lechner <david@lechnology.com>
---
v2 changes:
* Introduce new init_time function for each SoC instead of having a common call
to davinci_clk_init() in davinci_timer_init(). (This change used to be in a
later patch in the series.)
arch/arm/mach-davinci/board-da830-evm.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 11 +++++++----
arch/arm/mach-davinci/board-mityomapl138.c | 2 +-
arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 2 +-
arch/arm/mach-davinci/board-sffsdr.c | 2 +-
arch/arm/mach-davinci/da830.c | 4 ++++
arch/arm/mach-davinci/da850.c | 4 ++++
arch/arm/mach-davinci/da8xx-dt.c | 2 +-
arch/arm/mach-davinci/davinci.h | 4 ++++
arch/arm/mach-davinci/dm355.c | 5 +++++
arch/arm/mach-davinci/dm365.c | 5 +++++
arch/arm/mach-davinci/dm644x.c | 5 +++++
arch/arm/mach-davinci/dm646x.c | 5 +++++
arch/arm/mach-davinci/include/mach/da8xx.h | 3 +++
20 files changed, 53 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index f673cd7..2cc5426 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -638,7 +638,7 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
.atag_offset = 0x100,
.map_io = da830_evm_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da830_init_time,
.init_machine = da830_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index cbde003..458f26d 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1481,7 +1481,7 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
.atag_offset = 0x100,
.map_io = da850_evm_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = da850_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 62e7bc3..2b4d553 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -416,7 +416,7 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
.atag_offset = 0x100,
.map_io = dm355_evm_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm355_init_time,
.init_machine = dm355_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index be99724..69399d7 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -271,7 +271,7 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
.atag_offset = 0x100,
.map_io = dm355_leopard_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm355_init_time,
.init_machine = dm355_leopard_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index e75741f..e414cb9 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -774,7 +774,7 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.atag_offset = 0x100,
.map_io = dm365_evm_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm365_init_time,
.init_machine = dm365_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index b07c9b1..6b26786 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -817,7 +817,7 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
.atag_offset = 0x100,
.map_io = davinci_evm_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm644x_init_time,
.init_machine = davinci_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index cb0a41e..b3b81a8 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -721,9 +721,12 @@ static void __init evm_init_i2c(void)
static void __init davinci_map_io(void)
{
dm646x_init();
+}
- if (machine_is_davinci_dm6467tevm())
- davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
+static void __init dm6467t_evm_init_time(void)
+{
+ dm646x_init_time();
+ davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
}
#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
@@ -797,7 +800,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm646x_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
@@ -808,7 +811,7 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm6467t_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index b73ce7b..c930c31 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -570,7 +570,7 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
.atag_offset = 0x100,
.map_io = mityomapl138_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = mityomapl138_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 0c02aaa..925ada1 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -227,7 +227,7 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
.atag_offset = 0x100,
.map_io = davinci_ntosd2_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm644x_init_time,
.init_machine = davinci_ntosd2_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index a3e7807..c1277b3 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -334,7 +334,7 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
.atag_offset = 0x100,
.map_io = omapl138_hawk_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = omapl138_hawk_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index d85accf..4038de8 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -150,7 +150,7 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
.atag_offset = 0x100,
.map_io = davinci_sffsdr_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm644x_init_time,
.init_machine = davinci_sffsdr_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index bd88470..4c95bac 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1220,6 +1220,10 @@ void __init da830_init(void)
da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
+}
+void __init da830_init_time(void)
+{
davinci_clk_init(davinci_soc_info_da830.cpu_clks);
+ davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 07d6f0e..14c0579 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1392,6 +1392,10 @@ void __init da850_init(void)
v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
v &= ~CFGCHIP3_PLL1_MASTER_LOCK;
__raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
+}
+void __init da850_init_time(void)
+{
davinci_clk_init(davinci_soc_info_da850.cpu_clks);
+ davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index f06db67..3630f0a 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -96,7 +96,7 @@ static const char *const da850_boards_compat[] __initconst = {
DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
.map_io = da850_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = da850_init_machine,
.dt_compat = da850_boards_compat,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index c62b90c..d70f4d9 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -83,6 +83,7 @@ int davinci_init_wdt(void);
/* DM355 function declarations */
void dm355_init(void);
+void dm355_init_time(void);
void dm355_init_spi0(unsigned chipselect_mask,
const struct spi_board_info *info, unsigned len);
void dm355_init_asp1(u32 evt_enable);
@@ -91,6 +92,7 @@ int dm355_gpio_register(void);
/* DM365 function declarations */
void dm365_init(void);
+void dm365_init_time(void);
void dm365_init_asp(void);
void dm365_init_vc(void);
void dm365_init_ks(struct davinci_ks_platform_data *pdata);
@@ -102,12 +104,14 @@ int dm365_gpio_register(void);
/* DM644x function declarations */
void dm644x_init(void);
+void dm644x_init_time(void);
void dm644x_init_asp(void);
int dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
int dm644x_gpio_register(void);
/* DM646x function declarations */
void dm646x_init(void);
+void dm646x_init_time(void);
void dm646x_init_mcasp0(struct snd_platform_data *pdata);
void dm646x_init_mcasp1(struct snd_platform_data *pdata);
int dm646x_init_edma(struct edma_rsv_info *rsv);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index bd50367..67fc2d4 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -1043,7 +1043,12 @@ void __init dm355_init(void)
{
davinci_common_init(&davinci_soc_info_dm355);
davinci_map_sysmod();
+}
+
+void __init dm355_init_time(void)
+{
davinci_clk_init(davinci_soc_info_dm355.cpu_clks);
+ davinci_timer_init();
}
int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 8be04ec..99958e6 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1166,7 +1166,12 @@ void __init dm365_init(void)
{
davinci_common_init(&davinci_soc_info_dm365);
davinci_map_sysmod();
+}
+
+void __init dm365_init_time(void)
+{
davinci_clk_init(davinci_soc_info_dm365.cpu_clks);
+ davinci_timer_init();
}
static struct resource dm365_vpss_resources[] = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index b437c37..903cfeb 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -931,7 +931,12 @@ void __init dm644x_init(void)
{
davinci_common_init(&davinci_soc_info_dm644x);
davinci_map_sysmod();
+}
+
+void __init dm644x_init_time(void)
+{
davinci_clk_init(davinci_soc_info_dm644x.cpu_clks);
+ davinci_timer_init();
}
int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index da21353..6136d35 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -956,7 +956,12 @@ void __init dm646x_init(void)
{
davinci_common_init(&davinci_soc_info_dm646x);
davinci_map_sysmod();
+}
+
+void __init dm646x_init_time(void)
+{
davinci_clk_init(davinci_soc_info_dm646x.cpu_clks);
+ davinci_timer_init();
}
static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 93ff156..dd12e39 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -87,7 +87,10 @@ extern unsigned int da850_max_speed;
#define DA8XX_ARM_RAM_BASE 0xffff0000
void da830_init(void);
+void da830_init_time(void);
+
void da850_init(void);
+void da850_init_time(void);
int da830_register_edma(struct edma_rsv_info *rsv);
int da850_register_edma(struct edma_rsv_info *rsv[2]);
--
2.7.4
^ permalink raw reply related
* [PATCH v2 0/5] ARM: davinci: convert to common clock framework
From: David Lechner @ 2017-12-09 1:43 UTC (permalink / raw)
To: linux-arm-kernel
This series takes the first steps towards moving mach-davinci to the common
clock framework.
Basically, this series does some cleanup and rearranging to get things
ready for the conversion. Then in "ARM: davinci: convert to common clock
framework" we actually make the conversion. This is done by just creating
a thin layer around the existing mach clock code.
There is certainly more to be done to make full use of the common clock
framework, but this seems like the smallest logical set of patches to get
CONFIG_COMMON_CLK switched on. Otherwise, I think we would end up with a
series of 20+ patches that would be harder to review.
I have tested this on LEGO MINDSTORMS EV3 (TI AM1808), so I am confident
that I haven't broken anything (too badly) in da850. But, I don't have
other hardware to test.
v2 changes:
* Dropped "ARM: davinci: clean up map_io functions" - will resend as separate
patch series
* Reworked remaining patches so that there is less shuffling around
David Lechner (5):
ARM: davinci: move davinci_clk_init() to init_time
ARM: davinci: don't use static clk_lookup
ARM: davinci: make davinci_clk_reset() static
ARM: davinci: convert to common clock framework
ARM: davinci: remove clock debugfs
arch/arm/Kconfig | 2 +-
arch/arm/mach-davinci/board-da830-evm.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 11 +-
arch/arm/mach-davinci/board-mityomapl138.c | 2 +-
arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 2 +-
arch/arm/mach-davinci/board-sffsdr.c | 2 +-
arch/arm/mach-davinci/clock.c | 299 +++++++++-------------------
arch/arm/mach-davinci/clock.h | 48 +++--
arch/arm/mach-davinci/da830.c | 215 ++++++++++----------
arch/arm/mach-davinci/da850.c | 290 ++++++++++++++-------------
arch/arm/mach-davinci/da8xx-dt.c | 2 +-
arch/arm/mach-davinci/davinci.h | 4 +
arch/arm/mach-davinci/devices-da8xx.c | 9 +-
arch/arm/mach-davinci/dm355.c | 182 ++++++++---------
arch/arm/mach-davinci/dm365.c | 240 +++++++++++-----------
arch/arm/mach-davinci/dm644x.c | 162 +++++++--------
arch/arm/mach-davinci/dm646x.c | 177 ++++++++--------
arch/arm/mach-davinci/include/mach/clock.h | 3 -
arch/arm/mach-davinci/include/mach/common.h | 1 -
arch/arm/mach-davinci/include/mach/da8xx.h | 3 +
arch/arm/mach-davinci/usb-da8xx.c | 57 +++---
27 files changed, 820 insertions(+), 905 deletions(-)
--
2.7.4
^ permalink raw reply
* [PATCH 4/5] Input: edt-ft5x06 - Add support for regulator
From: Dmitry Torokhov @ 2017-12-09 1:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171209011629.4nkcjxj2l2j7zyph@dtor-ws>
On Fri, Dec 08, 2017 at 05:16:29PM -0800, Dmitry Torokhov wrote:
> Hi Myl?ne,
>
> On Fri, Dec 08, 2017 at 10:54:18PM +0100, Myl?ne Josserand wrote:
> > Add the support of regulator to use them as VCC source.
> >
> > Signed-off-by: Myl?ne Josserand <mylene.josserand@free-electrons.com>
> > ---
> > drivers/input/touchscreen/edt-ft5x06.c | 33 +++++++++++++++++++++++++++++++++
> > 1 file changed, 33 insertions(+)
> >
> > diff --git a/drivers/input/touchscreen/edt-ft5x06.c b/drivers/input/touchscreen/edt-ft5x06.c
> > index c53a3d7239e7..44b0e04a8f35 100644
> > --- a/drivers/input/touchscreen/edt-ft5x06.c
> > +++ b/drivers/input/touchscreen/edt-ft5x06.c
> > @@ -39,6 +39,7 @@
> > #include <linux/input/mt.h>
> > #include <linux/input/touchscreen.h>
> > #include <linux/of_device.h>
> > +#include <linux/regulator/consumer.h>
> >
> > #define WORK_REGISTER_THRESHOLD 0x00
> > #define WORK_REGISTER_REPORT_RATE 0x08
> > @@ -91,6 +92,7 @@ struct edt_ft5x06_ts_data {
> > struct touchscreen_properties prop;
> > u16 num_x;
> > u16 num_y;
> > + struct regulator *supply;
> >
> > struct gpio_desc *reset_gpio;
> > struct gpio_desc *wake_gpio;
> > @@ -993,6 +995,23 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
> >
> > tsdata->max_support_points = chip_data->max_support_points;
> >
> > + tsdata->supply = devm_regulator_get_optional(&client->dev, "power");
>
> I'd prefer if we used devm_regulator_get() instead. On a
> fully-constrained systems a missing regulator will be substituted with a
> dummy one that you can then use in regulator_enable() and
> regulator_disable(). The _optional regulator API is reserved for cases
> where some of chip functionality is optional and you can engage it by
> powering up parts of the chip. The reset is not such case: it is always
> present, but may not be exposed to the OS to control.
>
> I think the preference is to call the supply by the name is a datasheet,
> something like "vcc" or "vdd", etc.
Looking at this some more, you need to make sure your new regulator
support plays well with reset/wake GPIOs. I.e. you probably want to
properly bring the chip out of reset in edt_ft5x06_ts_resume() and maybe
driver the reset line low in suspend to make sure you do not leak into
the unpowered chip?
Also, please update
Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt with
the additional binding data and cc device tree folks and Rob Herring.
Thanks.
--
Dmitry
^ permalink raw reply
* [PATCH 4/5] Input: edt-ft5x06 - Add support for regulator
From: Dmitry Torokhov @ 2017-12-09 1:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208215419.30396-5-mylene.josserand@free-electrons.com>
Hi Myl?ne,
On Fri, Dec 08, 2017 at 10:54:18PM +0100, Myl?ne Josserand wrote:
> Add the support of regulator to use them as VCC source.
>
> Signed-off-by: Myl?ne Josserand <mylene.josserand@free-electrons.com>
> ---
> drivers/input/touchscreen/edt-ft5x06.c | 33 +++++++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/drivers/input/touchscreen/edt-ft5x06.c b/drivers/input/touchscreen/edt-ft5x06.c
> index c53a3d7239e7..44b0e04a8f35 100644
> --- a/drivers/input/touchscreen/edt-ft5x06.c
> +++ b/drivers/input/touchscreen/edt-ft5x06.c
> @@ -39,6 +39,7 @@
> #include <linux/input/mt.h>
> #include <linux/input/touchscreen.h>
> #include <linux/of_device.h>
> +#include <linux/regulator/consumer.h>
>
> #define WORK_REGISTER_THRESHOLD 0x00
> #define WORK_REGISTER_REPORT_RATE 0x08
> @@ -91,6 +92,7 @@ struct edt_ft5x06_ts_data {
> struct touchscreen_properties prop;
> u16 num_x;
> u16 num_y;
> + struct regulator *supply;
>
> struct gpio_desc *reset_gpio;
> struct gpio_desc *wake_gpio;
> @@ -993,6 +995,23 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
>
> tsdata->max_support_points = chip_data->max_support_points;
>
> + tsdata->supply = devm_regulator_get_optional(&client->dev, "power");
I'd prefer if we used devm_regulator_get() instead. On a
fully-constrained systems a missing regulator will be substituted with a
dummy one that you can then use in regulator_enable() and
regulator_disable(). The _optional regulator API is reserved for cases
where some of chip functionality is optional and you can engage it by
powering up parts of the chip. The reset is not such case: it is always
present, but may not be exposed to the OS to control.
I think the preference is to call the supply by the name is a datasheet,
something like "vcc" or "vdd", etc.
Thanks.
--
Dmitry
^ permalink raw reply
* [PATCH V2] arm64: fault: avoid send SIGBUS two times
From: Dongjiu Geng @ 2017-12-09 1:15 UTC (permalink / raw)
To: linux-arm-kernel
do_sea() calls arm64_notify_die() which will always signal
user-space. It also returns whether APEI claimed the external
abort as a RAS notification. If it returns failure do_mem_abort()
will signal user-space too.
do_mem_abort() wants to know if we handled the error, we always
call arm64_notify_die() so can always return success.
The si_code BUS_MCEERR_AR can tell user-space there is a hardware
error that needs to be dealt with immediately
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
arch/arm64/mm/fault.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index b64958b..38b9f3e 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -610,7 +610,6 @@ static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
{
struct siginfo info;
const struct fault_info *inf;
- int ret = 0;
inf = esr_to_fault_info(esr);
pr_err("Synchronous External Abort: %s (0x%08x) at 0x%016lx\n",
@@ -625,7 +624,7 @@ static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
if (interrupts_enabled(regs))
nmi_enter();
- ret = ghes_notify_sea();
+ ghes_notify_sea();
if (interrupts_enabled(regs))
nmi_exit();
@@ -633,14 +632,14 @@ static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
info.si_signo = SIGBUS;
info.si_errno = 0;
- info.si_code = 0;
+ info.si_code = BUS_MCEERR_AR;
if (esr & ESR_ELx_FnV)
info.si_addr = NULL;
else
info.si_addr = (void __user *)addr;
arm64_notify_die("", regs, &info, esr);
- return ret;
+ return 0;
}
static const struct fault_info fault_info[] = {
--
2.10.1
^ permalink raw reply related
* [PATCH 3/3] arm64: dts: rockchip: enable gpu on rk3328-rock64
From: Heiko Stuebner @ 2017-12-09 0:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171209000738.32187-1-heiko@sntech.de>
Enable the Mali450MP2 on the Rock64 board.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index d4f80786e7c2..4351fdd1f101 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -144,6 +144,10 @@
status = "okay";
};
+&gpu {
+ status = "okay";
+};
+
&i2c1 {
status = "okay";
--
2.14.2
^ permalink raw reply related
* [PATCH 2/3] arm64: dts: rockchip: add rk3328 mali gpu node
From: Heiko Stuebner @ 2017-12-09 0:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171209000738.32187-1-heiko@sntech.de>
Add the core gpu node for the rk3328, a Mali450MP2.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 41d61840fb99..4bff6422f4da 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -543,6 +543,29 @@
status = "disabled";
};
+ gpu: gpu at ff300000 {
+ compatible = "rockchip,rk3328-mali", "arm,mali-450";
+ reg = <0x0 0xff300000 0x0 0x40000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gp",
+ "gpmmu",
+ "pp",
+ "pp0",
+ "ppmmu0",
+ "pp1",
+ "ppmmu1";
+ clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
+ clock-names = "bus", "core";
+ resets = <&cru SRST_GPU_A>;
+ status = "disabled";
+ };
+
h265e_mmu: iommu at ff330200 {
compatible = "rockchip,iommu";
reg = <0x0 0xff330200 0 0x100>;
--
2.14.2
^ permalink raw reply related
* [PATCH 1/3] dt-bindings: gpu: mali-utgard: add rockchip, rk3328-mali compatible
From: Heiko Stuebner @ 2017-12-09 0:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171209000738.32187-1-heiko@sntech.de>
The rk3328 quad-core Cortex A53 uses a Mali-450MP2 with 2 PPs, so
add a compatible for it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
index c6814d7cc2b2..ad876548ab5d 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
@@ -17,6 +17,7 @@ Required properties:
+ rockchip,rk3066-mali
+ rockchip,rk3188-mali
+ rockchip,rk3228-mali
+ + rockchip,rk3328-mali
+ stericsson,db8500-mali
- reg: Physical base address and length of the GPU registers
--
2.14.2
^ permalink raw reply related
* [PATCH 0/3] arm64: dts: Support Mali450 on rk3328
From: Heiko Stuebner @ 2017-12-09 0:07 UTC (permalink / raw)
To: linux-arm-kernel
Pretty standard setup. Tested with the kmscube demo running
using the lima kernel and gallium driver.
Heiko Stuebner (3):
dt-bindings: gpu: mali-utgard: add rockchip,rk3328-mali compatible
arm64: dts: rockchip: add rk3328 mali gpu node
arm64: dts: rockchip: enable gpu on rk3328-rock64
.../devicetree/bindings/gpu/arm,mali-utgard.txt | 1 +
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 4 ++++
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 23 ++++++++++++++++++++++
3 files changed, 28 insertions(+)
--
2.14.2
^ permalink raw reply
* [PATCH v3 1/8] SOC: brcmstb: add memory API
From: Florian Fainelli @ 2017-12-08 23:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171205205926.GJ23510@bhelgaas-glaptop.roam.corp.google.com>
On 12/05/2017 12:59 PM, Bjorn Helgaas wrote:
> On Tue, Nov 14, 2017 at 05:12:05PM -0500, Jim Quinlan wrote:
>> From: Florian Fainelli <f.fainelli@gmail.com>
>>
>> This commit adds a memory API suitable for ascertaining the sizes of
>> each of the N memory controllers in a Broadcom STB chip. Its first
>> user will be the Broadcom STB PCIe root complex driver, which needs
>> to know these sizes to properly set up DMA mappings for inbound
>> regions.
>>
>> We cannot use memblock here or anything like what Linux provides
>> because it collapses adjacent regions within a larger block, and here
>> we actually need per-memory controller addresses and sizes, which is
>> why we resort to manual DT parsing.
>>
>> Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
>> ---
>> drivers/soc/bcm/brcmstb/Makefile | 2 +-
>> drivers/soc/bcm/brcmstb/memory.c | 172 +++++++++++++++++++++++++++++++++++++++
>> include/soc/brcmstb/memory_api.h | 25 ++++++
>> 3 files changed, 198 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/soc/bcm/brcmstb/memory.c
>> create mode 100644 include/soc/brcmstb/memory_api.h
>>
>> diff --git a/drivers/soc/bcm/brcmstb/Makefile b/drivers/soc/bcm/brcmstb/Makefile
>> index 9120b27..4cea7b6 100644
>> --- a/drivers/soc/bcm/brcmstb/Makefile
>> +++ b/drivers/soc/bcm/brcmstb/Makefile
>> @@ -1 +1 @@
>> -obj-y += common.o biuctrl.o
>> +obj-y += common.o biuctrl.o memory.o
>> diff --git a/drivers/soc/bcm/brcmstb/memory.c b/drivers/soc/bcm/brcmstb/memory.c
>> new file mode 100644
>> index 0000000..eb647ad9
>> --- /dev/null
>> +++ b/drivers/soc/bcm/brcmstb/memory.c
>
> I sort of assume based on [1] that every new file should have an SPDX
> identifier ("The Linux kernel requires the precise SPDX identifier in
> all source files") and that the actual text of the GPL can be omitted.
>
> Only a few files in drivers/pci currently have an SPDX identifier. I
> don't know if that's oversight or work-in-progress or what.
>
> [1] https://lkml.kernel.org/r/20171204212120.484179273 at linutronix.de
This was submitted before SPDX was consistently enforced tree wide, so
yes we should fix this.
Any other comment besides that?
--
Florian
^ permalink raw reply
* [PATCH v2 1/2] media: exynos-gsc: fix lockdep warning
From: Shuah Khan @ 2017-12-08 22:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <16599447-c4ee-1400-edae-6c3160a162e5@osg.samsung.com>
On 11/07/2017 09:53 AM, Shuah Khan wrote:
> On 10/16/2017 09:18 AM, Hans Verkuil wrote:
>> On 10/16/2017 05:16 PM, Shuah Khan wrote:
>>> The driver mmap functions shouldn't take lock when calling vb2_mmap().
>>> Fix it to not take the lock.
>>>
>>> Reference: commit log for f035eb4e976ef5a059e30bc91cfd310ff030a7d3
>>> and e752577ed7bf55c81e10343fced8b378cda2b63b
>>>
>>> The following lockdep warning is fixed with this change.
>>>
>>> [ 1990.972058] ======================================================
>>> [ 1990.978172] WARNING: possible circular locking dependency detected
>>> [ 1990.984327] 4.14.0-rc2-00002-gfab205f-dirty #4 Not tainted
>>> [ 1990.989783] ------------------------------------------------------
>>> [ 1990.995937] qtdemux0:sink/2765 is trying to acquire lock:
>>> [ 1991.001309] (&gsc->lock){+.+.}, at: [<bf1729f0>] gsc_m2m_mmap+0x24/0x5c [exynos_gsc]
>>> [ 1991.009108]
>>> but task is already holding lock:
>>> [ 1991.014913] (&mm->mmap_sem){++++}, at: [<c01df2e4>] vm_mmap_pgoff+0x44/0xb8
>>> [ 1991.021932]
>>> which lock already depends on the new lock.
>>>
>>> [ 1991.030078]
>>> the existing dependency chain (in reverse order) is:
>>> [ 1991.037530]
>>> -> #1 (&mm->mmap_sem){++++}:
>>> [ 1991.042913] __might_fault+0x80/0xb0
>>> [ 1991.047096] video_usercopy+0x1cc/0x510 [videodev]
>>> [ 1991.052297] v4l2_ioctl+0xa4/0xdc [videodev]
>>> [ 1991.057036] do_vfs_ioctl+0xa0/0xa18
>>> [ 1991.061102] SyS_ioctl+0x34/0x5c
>>> [ 1991.064834] ret_fast_syscall+0x0/0x28
>>> [ 1991.069072]
>>> -> #0 (&gsc->lock){+.+.}:
>>> [ 1991.074193] lock_acquire+0x6c/0x88
>>> [ 1991.078179] __mutex_lock+0x68/0xa34
>>> [ 1991.082247] mutex_lock_interruptible_nested+0x1c/0x24
>>> [ 1991.087888] gsc_m2m_mmap+0x24/0x5c [exynos_gsc]
>>> [ 1991.093029] v4l2_mmap+0x54/0x88 [videodev]
>>> [ 1991.097673] mmap_region+0x3a8/0x638
>>> [ 1991.101743] do_mmap+0x330/0x3a4
>>> [ 1991.105470] vm_mmap_pgoff+0x90/0xb8
>>> [ 1991.109542] SyS_mmap_pgoff+0x90/0xc0
>>> [ 1991.113702] ret_fast_syscall+0x0/0x28
>>> [ 1991.117945]
>>> other info that might help us debug this:
>>>
>>> [ 1991.125918] Possible unsafe locking scenario:
>>>
>>> [ 1991.131810] CPU0 CPU1
>>> [ 1991.136315] ---- ----
>>> [ 1991.140821] lock(&mm->mmap_sem);
>>> [ 1991.144201] lock(&gsc->lock);
>>> [ 1991.149833] lock(&mm->mmap_sem);
>>> [ 1991.155725] lock(&gsc->lock);
>>> [ 1991.158845]
>>> *** DEADLOCK ***
>>>
>>> [ 1991.164740] 1 lock held by qtdemux0:sink/2765:
>>> [ 1991.169157] #0: (&mm->mmap_sem){++++}, at: [<c01df2e4>] vm_mmap_pgoff+0x44/0xb8
>>> [ 1991.176609]
>>> stack backtrace:
>>> [ 1991.180946] CPU: 2 PID: 2765 Comm: qtdemux0:sink Not tainted 4.14.0-rc2-00002-gfab205f-dirty #4
>>> [ 1991.189608] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
>>> [ 1991.195686] [<c01102c8>] (unwind_backtrace) from [<c010cabc>] (show_stack+0x10/0x14)
>>> [ 1991.203393] [<c010cabc>] (show_stack) from [<c08543a4>] (dump_stack+0x98/0xc4)
>>> [ 1991.210586] [<c08543a4>] (dump_stack) from [<c016b2fc>] (print_circular_bug+0x254/0x410)
>>> [ 1991.218644] [<c016b2fc>] (print_circular_bug) from [<c016c580>] (check_prev_add+0x468/0x938)
>>> [ 1991.227049] [<c016c580>] (check_prev_add) from [<c016f4dc>] (__lock_acquire+0x1314/0x14fc)
>>> [ 1991.235281] [<c016f4dc>] (__lock_acquire) from [<c016fefc>] (lock_acquire+0x6c/0x88)
>>> [ 1991.242993] [<c016fefc>] (lock_acquire) from [<c0869fb4>] (__mutex_lock+0x68/0xa34)
>>> [ 1991.250620] [<c0869fb4>] (__mutex_lock) from [<c086aa08>] (mutex_lock_interruptible_nested+0x1c/0x24)
>>> [ 1991.259812] [<c086aa08>] (mutex_lock_interruptible_nested) from [<bf1729f0>] (gsc_m2m_mmap+0x24/0x5c [exynos_gsc])
>>> [ 1991.270159] [<bf1729f0>] (gsc_m2m_mmap [exynos_gsc]) from [<bf037120>] (v4l2_mmap+0x54/0x88 [videodev])
>>> [ 1991.279510] [<bf037120>] (v4l2_mmap [videodev]) from [<c01f4798>] (mmap_region+0x3a8/0x638)
>>> [ 1991.287792] [<c01f4798>] (mmap_region) from [<c01f4d58>] (do_mmap+0x330/0x3a4)
>>> [ 1991.294986] [<c01f4d58>] (do_mmap) from [<c01df330>] (vm_mmap_pgoff+0x90/0xb8)
>>> [ 1991.302178] [<c01df330>] (vm_mmap_pgoff) from [<c01f28cc>] (SyS_mmap_pgoff+0x90/0xc0)
>>> [ 1991.309977] [<c01f28cc>] (SyS_mmap_pgoff) from [<c0108820>] (ret_fast_syscall+0x0/0x28)
>>>
>>> Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
>>> Suggested-by: Hans Verkuil <hansverk@cisco.com>
>>> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
>>
>> Acked-by: Hans Verkuil <hansverk@cisco.com>
>>
>> Regards,
>>
>> Hans
>
> Hi Mauro,
>
> Are you planning to take this in for 4.15-rc1? This patch is applicable
> to stable as well.
>
> thanks,
> -- Shuah
>
Hi Mauro,
Doesn't look like this fox made it into 4.15-rc2 - do you plan to get this
into 4.15 at some point?
I am seeing this lockdep warning in 4.15-rc2
thanks,
-- Shuah
^ permalink raw reply
* [PATCH] soc: fsl: support GUTS driver for ls1012a/ls1046a
From: Li Yang @ 2017-12-08 22:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207083615.17689-1-yangbo.lu@nxp.com>
On Thu, Dec 7, 2017 at 2:36 AM, Yangbo Lu <yangbo.lu@nxp.com> wrote:
> This patch is to add compatible strings "fsl,ls1021a-dcfg" and
> "fsl,ls1043a-dcfg" into device match table of GUTS driver.
>
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> ---
> drivers/soc/fsl/guts.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
> index d89a6a80c8ef..d98de2c76659 100644
> --- a/drivers/soc/fsl/guts.c
> +++ b/drivers/soc/fsl/guts.c
> @@ -214,6 +214,8 @@ static const struct of_device_id fsl_guts_of_match[] = {
> { .compatible = "fsl,ls1043a-dcfg", },
> { .compatible = "fsl,ls2080a-dcfg", },
> { .compatible = "fsl,ls1088a-dcfg", },
> + { .compatible = "fsl,ls1012a-dcfg", },
> + { .compatible = "fsl,ls1046a-dcfg", },
Looks good. Merged.
Regards,
Leo
^ permalink raw reply
* [PATCH 2/9] ASoC: sun4i-i2s: Add compatibility with A64 codec I2S
From: Vasily Khoruzhick @ 2017-12-08 22:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAEKpxBnG2DXxZ=qMJBPDq5MZzo-eo7-D7n51n0rySDA-Qua9-A@mail.gmail.com>
On Thu, Dec 7, 2017 at 10:40 PM, Code Kipper <codekipper@gmail.com> wrote:
> On 7 December 2017 at 23:48, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
>> On Thu, Dec 7, 2017 at 1:21 AM, Code Kipper <codekipper@gmail.com> wrote:
>>> On 4 December 2017 at 08:34, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
>>>> I'd keep it sun50i_a64_acodec_i2s, since other 3 I2S modules aren't
>>>> compatible with this one, but similar to H3.
>>>
>>> Well I wouldn't and the description of it is usage is clearly stated
>>> in the devicetree
>>> for the dai.
>>
>> OK, how would you name 3 other I2S modules that are present in A64?
> https://github.com/codekipper/linux-sunxi/commit/34f37778fbc08247e3bd1556f7ed02303053f5ab
>>
>>>> On Sun, Dec 3, 2017 at 10:42 PM, Code Kipper <codekipper@gmail.com> wrote:
>>>>> On 3 December 2017 at 21:41, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
>>>>>> From: Marcus Cooper <codekipper@gmail.com>
>>>>>>
>>>>>> The I2S block used for the audio codec in the A64 is very similar
>>>>>> to what is used by the A10(sun4i) devices. However, its TX FIFO is
>>>>>> located at a different address.
>>>>>>
>>>>>> [vasilykh: - added fixed_wss and wss_value to A64 quirks,
>>>>>> - changed compatible to 'allwinner,sun50i-a64-acodec-i2s,
>>>>>> since A64 has 3 more I2S blocks that are not compatible
>>>>>> with audio codec I2S]
>>> This needs to be investigated more...I'm suspicious of the
>>> SUN8I_I2S_FMT0_LRCK_PERIOD value which is hardcoded to 0x1f.
>>> I've made this following change
>>> https://github.com/codekipper/linux-sunxi/commit/4c5fe5f5576cfbb2e1e94a99cd19dfdc9403ea50
>>> which seems to work for me but I would like to look at it with a logic
I tried this change and now it works fine for me as well without
hardcoded WSS value. So problem was in hardcoded
LRCK period. Are you OK with me submitting this patch as a part of my
A64 audio series?
>>> analyser and test other sample depths.
>>> CK
>>
>> I'm afraid it's not possible to get inside of SoC, since internal I2S
>> pins do not go out. And other 3 I2S modules are different from one for
>> internal codec.
> I just think this needs more of an investigation, I've git a similar patch
> https://github.com/codekipper/linux-sunxi/commit/282d986b6f9ed441ecdc996c6dceed63cbe32652
> which I've not delivered for that very reason.
> CK
>>
>>>>>>
>>>>>> Signed-off-by: Marcus Cooper <codekipper@gmail.com>
>>>>>> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
>>>>>> ---
>>>>>> .../devicetree/bindings/sound/sun4i-i2s.txt | 2 ++
>>>>>> sound/soc/sunxi/sun4i-i2s.c | 23 ++++++++++++++++++++++
>>>>>> 2 files changed, 25 insertions(+)
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>>>>>> index 05d7135a8d2f..ab86f266962a 100644
>>>>>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>>>>>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>>>>>> @@ -9,6 +9,7 @@ Required properties:
>>>>>> - "allwinner,sun4i-a10-i2s"
>>>>>> - "allwinner,sun6i-a31-i2s"
>>>>>> - "allwinner,sun8i-h3-i2s"
>>>>>> + - "allwinner,sun50i-a64-acodec-i2s"
>>>>>> - reg: physical base address of the controller and length of memory mapped
>>>>>> region.
>>>>>> - interrupts: should contain the I2S interrupt.
>>>>>> @@ -24,6 +25,7 @@ Required properties:
>>>>>> Required properties for the following compatibles:
>>>>>> - "allwinner,sun6i-a31-i2s"
>>>>>> - "allwinner,sun8i-h3-i2s"
>>>>>> + - "allwinner,sun50i-a64-acodec-i2s"
>>>>> I would keep the compatible format the same. ie.
>>>>> allwinner,sun50i-a64-i2s. The A33 for example uses the sun6i-a31-i2s
>>>>> for it's dai.
>>>>>
>>>>>> - resets: phandle to the reset line for this codec
>>>>>>
>>>>>> Example:
>>>>>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>>>>>> index 54c16eb64713..2c060e015725 100644
>>>>>> --- a/sound/soc/sunxi/sun4i-i2s.c
>>>>>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>>>>>> @@ -942,6 +942,25 @@ static const struct sun4i_i2s_quirks sun8i_h3_i2s_quirks = {
>>>>>> .field_rxchansel = REG_FIELD(SUN8I_I2S_RX_CHAN_SEL_REG, 0, 2),
>>>>>> };
>>>>>>
>>>>>> +static const struct sun4i_i2s_quirks sun50i_a64_acodec_i2s_quirks = {
>>>>> ditto
>>>>>> + .has_reset = true,
>>>>>> + .reg_offset_txdata = SUN8I_I2S_FIFO_TX_REG,
>>>>>> + .sun4i_i2s_regmap = &sun4i_i2s_regmap_config,
>>>>>> + .has_slave_select_bit = true,
>>>>>> + .fixed_wss = true,
>>>>>> + .wss_value = 3,
>>>>>> + .field_clkdiv_mclk_en = REG_FIELD(SUN4I_I2S_CLK_DIV_REG, 7, 7),
>>>>>> + .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 2, 3),
>>>>>> + .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5),
>>>>>> + .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6),
>>>>>> + .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
>>>>>> + .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
>>>>>> + .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
>>>>>> + .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
>>>>>> + .field_txchansel = REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
>>>>>> + .field_rxchansel = REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
>>>>>> +};
>>>>>> +
>>>>>> static int sun4i_i2s_init_regmap_fields(struct device *dev,
>>>>>> struct sun4i_i2s *i2s)
>>>>>> {
>>>>>> @@ -1146,6 +1165,10 @@ static const struct of_device_id sun4i_i2s_match[] = {
>>>>>> .compatible = "allwinner,sun8i-h3-i2s",
>>>>>> .data = &sun8i_h3_i2s_quirks,
>>>>>> },
>>>>>> + {
>>>>>> + .compatible = "allwinner,sun50i-a64-acodec-i2s",
>>>>>> + .data = &sun50i_a64_acodec_i2s_quirks,
>>>>> ditto
>>>>> BR,
>>>>> CK
>>>>>> + },
>>>>>> {}
>>>>>> };
>>>>>> MODULE_DEVICE_TABLE(of, sun4i_i2s_match);
>>>>>> --
>>>>>> 2.15.0
>>>>>>
^ permalink raw reply
* [PATCH 0/5] sun8i-a83t: Add touchscreen support on TBS A711
From: Mylene JOSSERAND @ 2017-12-08 22:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208215419.30396-1-mylene.josserand@free-electrons.com>
Hi,
Le Fri, 8 Dec 2017 22:54:14 +0100,
Myl?ne Josserand <mylene.josserand@free-electrons.com> a ?crit :
> Hello everyone,
>
> This patch series adds touchscreen support (FocalTech EDT-FT5x06
> Polytouch) for TBS A711 (Allwinner sun8i-a83t SoC).
> This touchscreen is using i2c so this series adds support of this bus
> on A83T.
>
> Series information:
> - Based on last linux-next (next-20171208)
> - Had dependencies on AXP209 Quentin Schultz's series:
> https://www.spinics.net/lists/linux-gpio/msg26913.htmlx
I forgot to mention a dependency on Maxime Ripard's patch that
reinstate AXP813 PMIC:
https://patchwork.kernel.org/patch/10077037/
Thanks,
Myl?ne
>
> Patch 01: Add i2c0 node on a83t device tree.
> Patch 02: Add i2c0 pin group.
> Patch 03: Enable i2c0 on TBS A711.
> Patch 04: Add support for regulator in the FocalTech touchscreen
> driver because A711 tablet is using a regulator to power-up the
> touchscreen. Patch 05: Add the touchscreen node in A711 TBS tablet.
>
> Thank you in advance for any review.
> Best regards,
> Myl?ne
>
> Myl?ne Josserand (5):
> arm: dts: sun8i: a83t: Add I2C0 node
> arm: dts: sun8i: a83t: Add I2C0 pins group
> arm: dts: sun8i: a83t: a711: Enable I2C0
> Input: edt-ft5x06 - Add support for regulator
> arm: dts: sun8i: a83t: a711: Add touchscreen node
>
> arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 18 +++++++++++++++++
> arch/arm/boot/dts/sun8i-a83t.dtsi | 16 +++++++++++++++
> drivers/input/touchscreen/edt-ft5x06.c | 33
> +++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+)
>
^ permalink raw reply
* [PATCH 5/5] arm: dts: sun8i: a83t: a711: Add touchscreen node
From: Mylène Josserand @ 2017-12-08 21:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208215419.30396-1-mylene.josserand@free-electrons.com>
Tha A711 tablet has a FocalTech EDT-FT5x06 Polytouch touchscreen.
It is connected via I2C0 so add his node in i2c0's node.
The reset line is PD5, the interrupt line is PL7 and the power
supply is the ldo_io0 regulator.
Signed-off-by: Myl?ne Josserand <mylene.josserand@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 84cca1a48cea..738359917a34 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -110,6 +110,17 @@
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <400000>;
status = "okay";
+
+ polytouch: edt-ft5x06 at 38 {
+ compatible = "edt,edt-ft5x06";
+ reg = <0x38>;
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&pio 3 5 GPIO_ACTIVE_LOW>;
+ power-supply = <®_ldo_io0>;
+ touchscreen-size-x = <1024>;
+ touchscreen-size-y = <600>;
+ };
};
&mmc0 {
--
2.11.0
^ permalink raw reply related
* [PATCH 4/5] Input: edt-ft5x06 - Add support for regulator
From: Mylène Josserand @ 2017-12-08 21:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208215419.30396-1-mylene.josserand@free-electrons.com>
Add the support of regulator to use them as VCC source.
Signed-off-by: Myl?ne Josserand <mylene.josserand@free-electrons.com>
---
drivers/input/touchscreen/edt-ft5x06.c | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/drivers/input/touchscreen/edt-ft5x06.c b/drivers/input/touchscreen/edt-ft5x06.c
index c53a3d7239e7..44b0e04a8f35 100644
--- a/drivers/input/touchscreen/edt-ft5x06.c
+++ b/drivers/input/touchscreen/edt-ft5x06.c
@@ -39,6 +39,7 @@
#include <linux/input/mt.h>
#include <linux/input/touchscreen.h>
#include <linux/of_device.h>
+#include <linux/regulator/consumer.h>
#define WORK_REGISTER_THRESHOLD 0x00
#define WORK_REGISTER_REPORT_RATE 0x08
@@ -91,6 +92,7 @@ struct edt_ft5x06_ts_data {
struct touchscreen_properties prop;
u16 num_x;
u16 num_y;
+ struct regulator *supply;
struct gpio_desc *reset_gpio;
struct gpio_desc *wake_gpio;
@@ -993,6 +995,23 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
tsdata->max_support_points = chip_data->max_support_points;
+ tsdata->supply = devm_regulator_get_optional(&client->dev, "power");
+ if (IS_ERR(tsdata->supply)) {
+ error = PTR_ERR(tsdata->supply);
+ dev_err(&client->dev, "failed to request regulator: %d\n",
+ error);
+ return error;
+ };
+
+ if (tsdata->supply) {
+ error = regulator_enable(tsdata->supply);
+ if (error < 0) {
+ dev_err(&client->dev, "failed to enable supply: %d\n",
+ error);
+ return error;
+ }
+ }
+
tsdata->reset_gpio = devm_gpiod_get_optional(&client->dev,
"reset", GPIOD_OUT_HIGH);
if (IS_ERR(tsdata->reset_gpio)) {
@@ -1122,20 +1141,34 @@ static int edt_ft5x06_ts_remove(struct i2c_client *client)
static int __maybe_unused edt_ft5x06_ts_suspend(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client);
if (device_may_wakeup(dev))
enable_irq_wake(client->irq);
+ if (tsdata->supply)
+ regulator_disable(tsdata->supply);
+
return 0;
}
static int __maybe_unused edt_ft5x06_ts_resume(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client);
+ int ret;
if (device_may_wakeup(dev))
disable_irq_wake(client->irq);
+ if (tsdata->supply) {
+ ret = regulator_enable(tsdata->supply);
+ if (ret < 0) {
+ dev_err(dev, "failed to enable supply: %d\n", ret);
+ return ret;
+ }
+ }
+
return 0;
}
--
2.11.0
^ permalink raw reply related
* [PATCH 3/5] arm: dts: sun8i: a83t: a711: Enable I2C0
From: Mylène Josserand @ 2017-12-08 21:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208215419.30396-1-mylene.josserand@free-electrons.com>
The A711 has a touchscreen connected by I2C0.
Enable only I2C0 node for the moment.
Signed-off-by: Myl?ne Josserand <mylene.josserand@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index a021ee6da396..84cca1a48cea 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -105,6 +105,13 @@
status = "okay";
};
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
&mmc0 {
vmmc-supply = <®_dcdc1>;
pinctrl-names = "default";
--
2.11.0
^ permalink raw reply related
* [PATCH 2/5] arm: dts: sun8i: a83t: Add I2C0 pins group
From: Mylène Josserand @ 2017-12-08 21:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208215419.30396-1-mylene.josserand@free-electrons.com>
Add pins group to configure it as I2C0.
Signed-off-by: Myl?ne Josserand <mylene.josserand@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 848cf3f19962..3bce6bd3dc79 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -347,6 +347,11 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ i2c0_pins: i2c0-pins {
+ pins = "PH0", "PH1";
+ function = "i2c0";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
--
2.11.0
^ permalink raw reply related
* [PATCH 1/5] arm: dts: sun8i: a83t: Add I2C0 node
From: Mylène Josserand @ 2017-12-08 21:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208215419.30396-1-mylene.josserand@free-electrons.com>
Add I2C0 node for A83T.
Signed-off-by: Myl?ne Josserand <mylene.josserand@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 19acae1b4089..848cf3f19962 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -177,6 +177,17 @@
#dma-cells = <1>;
};
+ i2c0: i2c at 01c2ac00 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C0>;
+ resets = <&ccu RST_BUS_I2C0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
mmc0: mmc at 1c0f000 {
compatible = "allwinner,sun8i-a83t-mmc",
"allwinner,sun7i-a20-mmc";
--
2.11.0
^ permalink raw reply related
* [PATCH 0/5] sun8i-a83t: Add touchscreen support on TBS A711
From: Mylène Josserand @ 2017-12-08 21:54 UTC (permalink / raw)
To: linux-arm-kernel
Hello everyone,
This patch series adds touchscreen support (FocalTech EDT-FT5x06
Polytouch) for TBS A711 (Allwinner sun8i-a83t SoC).
This touchscreen is using i2c so this series adds support of this bus
on A83T.
Series information:
- Based on last linux-next (next-20171208)
- Had dependencies on AXP209 Quentin Schultz's series:
https://www.spinics.net/lists/linux-gpio/msg26913.htmlx
Patch 01: Add i2c0 node on a83t device tree.
Patch 02: Add i2c0 pin group.
Patch 03: Enable i2c0 on TBS A711.
Patch 04: Add support for regulator in the FocalTech touchscreen driver
because A711 tablet is using a regulator to power-up the touchscreen.
Patch 05: Add the touchscreen node in A711 TBS tablet.
Thank you in advance for any review.
Best regards,
Myl?ne
Myl?ne Josserand (5):
arm: dts: sun8i: a83t: Add I2C0 node
arm: dts: sun8i: a83t: Add I2C0 pins group
arm: dts: sun8i: a83t: a711: Enable I2C0
Input: edt-ft5x06 - Add support for regulator
arm: dts: sun8i: a83t: a711: Add touchscreen node
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 18 +++++++++++++++++
arch/arm/boot/dts/sun8i-a83t.dtsi | 16 +++++++++++++++
drivers/input/touchscreen/edt-ft5x06.c | 33 +++++++++++++++++++++++++++++++
3 files changed, 67 insertions(+)
--
2.11.0
^ permalink raw reply
* [kernel-hardening][PATCH] arm: mm: idmap: Mark variables as ro_after_init
From: Kees Cook @ 2017-12-08 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208111318.GA12346@pjb1027-Latitude-E5410>
On Fri, Dec 8, 2017 at 3:13 AM, Jinbum Park <jinb.park7@gmail.com> wrote:
> idmap_pgd, arch_phys_to_idmap_offset are setup once
> while init stage, and never changed after that.
> so, it is good candidate for __ro_after_init.
>
> Signed-off-by: Jinbum Park <jinb.park7@gmail.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Does arm64 have anything like this? Just grepping for similar names,
idmap_t0sz looks like it could actually be const.
-Kees
> ---
> arch/arm/mm/idmap.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
> index 10bfba8..1d1edd0 100644
> --- a/arch/arm/mm/idmap.c
> +++ b/arch/arm/mm/idmap.c
> @@ -16,8 +16,8 @@
> * are not supported on any CPU using the idmap tables as its current
> * page tables.
> */
> -pgd_t *idmap_pgd;
> -long long arch_phys_to_idmap_offset;
> +pgd_t *idmap_pgd __ro_after_init;
> +long long arch_phys_to_idmap_offset __ro_after_init;
>
> #ifdef CONFIG_ARM_LPAE
> static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
> --
> 1.9.1
>
--
Kees Cook
Pixel Security
^ permalink raw reply
* [PATCH 01/12] dt-bindings: mtd: add Marvell NAND controller documentation
From: Boris Brezillon @ 2017-12-08 20:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207201814.30411-2-miquel.raynal@free-electrons.com>
On Thu, 7 Dec 2017 21:18:03 +0100
Miquel Raynal <miquel.raynal@free-electrons.com> wrote:
> Document the legacy and the new bindings for Marvell NAND controller.
>
> The pxa3xx_nand.c driver does only support legacy bindings, which are
> incomplete and inaccurate. A rework of this controller (called
> marvell_nand.c) does support both.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> ---
> .../devicetree/bindings/mtd/marvell-nand.txt | 84 ++++++++++++++++++++++
> 1 file changed, 84 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/marvell-nand.txt
>
> diff --git a/Documentation/devicetree/bindings/mtd/marvell-nand.txt b/Documentation/devicetree/bindings/mtd/marvell-nand.txt
> new file mode 100644
> index 000000000000..0b3d5e0bab83
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/marvell-nand.txt
> @@ -0,0 +1,84 @@
> +Marvell NAND Flash Controller (NFC)
> +
> +Required properties:
> +- compatible: can be one of the following:
> + * "marvell,armada-8k-nand-controller"
> + * "marvell,armada370-nand-controller"
> + * "marvell,pxa3xx-nand-controller"
> + * "marvell,armada-8k-nand" (deprecated)
> + * "marvell,armada370-nand" (deprecated)
> + * "marvell,pxa3xx-nand" (deprecated)
> +- reg: NAND flash controller memory area.
> +- #address-cells: shall be set to 1. Encode the NAND CS.
> +- #size-cells: shall be set to 0.
> +- interrupts: shall define the NAND controller interrupt.
> +- clocks: shall reference the NAND controller clock.
> +- marvell,system-controller: Set to retrieve the syscon node that handles
> + NAND controller related registers (only required with the
> + "marvell,armada-8k-nand[-controller]" compatibles).
> +
> +Optional properties:
> +- label: see partition.txt. New platforms shall omit this property.
> +- dmas: shall reference DMA channel associated to the NAND controller.
> +- dma-names: shall be "rxtx".
> +
> +Optional children nodes:
> +Children nodes represent the available NAND chips.
> +
> +Required properties:
> +- reg: shall contain the native Chip Select ids (0-3)
> +- marvell,rb: shall contain the native Ready/Busy ids (0-1)
> +
> +Optional properties:
> +- marvell,nand-keep-config: orders the driver not to take the timings
> + from the core and leaving them completely untouched. Bootloader
> + timings will then be used.
> +- nand-on-flash-bbt: see nand.txt.
> +- nand-ecc-mode: see nand.txt. Will use hardware ECC if not specified.
> +- nand-ecc-algo: see nand.txt. This property may be added when using
> + hardware ECC for clarification but will be ignored by the driver
> + because ECC mode is chosen depending on the page size and the strength
> + required by the NAND chip. This value may be overwritten with
> + nand-ecc-strength property.
> +- nand-ecc-strength: see nand.txt.
> +- nand-ecc-step-size: see nand.txt. This has no effect and will be
> + ignored by the driver when using hardware ECC because Marvell's NAND
> + flash controller does use fixed strength (1-bit for Hamming, 16-bit
> + for BCH), so the step size will shrink or grow in order to fit the
> + required strength. Step sizes are not completely random for all and
> + follow certain patterns described in AN-379, "Marvell SoC NFC ECC".
> +
> +See Documentation/devicetree/bindings/mtd/nand.txt for more details on
> +generic bindings.
> +
> +
> +Example:
> +nand_controller: nand-controller at d0000 {
> + compatible = "marvell,armada370-nand-controller";
> + reg = <0xd0000 0x54>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&coredivclk 0>;
> +
> + nand at 0 {
> + reg = <0>;
> + marvell,rb = <0>;
> + nand-ecc-mode = "hw";
> + marvell,nand-keep-config;
> + nand-on-flash-bbt;
> + nand-ecc-strength = <4>;
> + nand-ecc-step-size = <512>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition at 0 {
> + label = "Rootfs";
> + reg = <0x00000000 0x40000000>;
> + };
> + };
> + };
> +};
Maybe you should also give an example for the old bindings.
BTW, given your properties description, it's not clear which properties
are deprecated. Maybe you should split the doc in 2 sections: one
describing the new bindings, and the other one describing the deprecated
bindings.
^ permalink raw reply
* [PATCH] pinctrl: meson-axg: adjust spicc pin naming
From: Kevin Hilman @ 2017-12-08 19:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171208152909.15632-1-yixun.lan@amlogic.com>
Yixun Lan <yixun.lan@amlogic.com> writes:
> According to datasheet, we should use numbers for the pin naming
> instead of letters. The patch here try to fix this to keep
> the consistency.
>
> This patch should not bring any functional change.
>
> Fixes: 83c566806a68 ("pinctrl: meson-axg: Add new pinctrl driver for Meson AXG SoC")
> Suggested-by: Kevin Hilman <khilman@baylibre.com>
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
> ---
> The issue was raised by Kevin while review the SPI DT part patches, see [1]
> [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005641.html
>
> Note: the 'Fixes' is coming from pinctrl's tree 'for-next' branch
Linus, please consider this change for your next branch. I'd like to
get the names aligned with the datasheet before we have any users in DT.
Thanks,
Kevin
^ permalink raw reply
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