* [PATCH 2/3] arm64: dts: renesas: r8a7796: move nodes which have no reg property out of bus
From: Simon Horman @ 2017-12-13 8:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMuHMdVx-cEHwV+mBcZfM903DrkxjyNqOiT6KQvm5fNUpcW2Ww@mail.gmail.com>
On Tue, Dec 12, 2017 at 10:44:53AM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Tue, Dec 12, 2017 at 9:24 AM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > Move pmu_a5[73], timer and thermal-zones nodes from soc node to root node.
> > The nodes that have been moved do not have any register properties and thus
> > shouldn't be placed on the bus.
>
> [...]
>
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> but a few minor comments below...
>
> > --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> > @@ -154,6 +154,26 @@
> > clock-frequency = <0>;
> > };
> >
> > + pmu_a57 {
> > + compatible = "arm,cortex-a57-pmu";
> > + interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
> > + <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-affinity = <&a57_0>,
> > + <&a57_1>;
> > + };
> > +
> > + pmu_a53 {
> > + compatible = "arm,cortex-a53-pmu";
> > + interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
> > + <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
> > + <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
> > + <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-affinity = <&a53_0>,
> > + <&a53_1>,
> > + <&a53_2>,
> > + <&a53_3>;
>
> Merge these 4 into a single line?
>
> > @@ -2027,4 +1971,64 @@
> > resets = <&cpg 822>;
> > };
> > };
> > +
> > + timer {
> > + compatible = "arm,armv8-timer";
> > + interrupts-extended = <&gic GIC_PPI 13
> > + (GIC_CPU_MASK_SIMPLE(6) |
> > + IRQ_TYPE_LEVEL_LOW)>,
> > + <&gic GIC_PPI 14
> > + (GIC_CPU_MASK_SIMPLE(6) |
> > + IRQ_TYPE_LEVEL_LOW)>,
> > + <&gic GIC_PPI 11
> > + (GIC_CPU_MASK_SIMPLE(6) |
> > + IRQ_TYPE_LEVEL_LOW)>,
> > + <&gic GIC_PPI 10
> > + (GIC_CPU_MASK_SIMPLE(6) |
> > + IRQ_TYPE_LEVEL_LOW)>;
>
> I think you can do a better job here, by trying not to break entries across
> multiple lines ;-)
>
> (Oops, we already have it this way in r8a7795.dtsi)
That can be fixed.
For now I've applied the following:
From: Simon Horman <horms+renesas@verge.net.au>
Date: Tue, 12 Dec 2017 09:24:35 +0100
Subject: [PATCH] arm64: dts: renesas: r8a7796: move nodes which have no reg
property out of bus
Move pmu_a5[73], timer and thermal-zones nodes from soc node to root node.
The nodes that have been moved do not have any register properties and thus
shouldn't be placed on the bus.
This problem is flagged by the compiler as follows:
$ make
...
DTC arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb
...
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/pmu_a57 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/pmu_a53 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property
...
DTC arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb
...
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb: Warning (simple_bus_reg): Node /soc/pmu_a57 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb: Warning (simple_bus_reg): Node /soc/pmu_a53 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property
...
DTC arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb
...
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb: Warning (simple_bus_reg): Node /soc/pmu_a57 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb: Warning (simple_bus_reg): Node /soc/pmu_a53 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property
...
DTC arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb
...
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (simple_bus_reg): Node /soc/pmu_a57 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (simple_bus_reg): Node /soc/pmu_a53 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property
...
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 145 +++++++++++++++----------------
1 file changed, 69 insertions(+), 76 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index c1b0d0344329..e82b4db1ad1a 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -154,6 +154,23 @@
clock-frequency = <0>;
};
+ pmu_a57 {
+ compatible = "arm,cortex-a57-pmu";
+ interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a57_0>,
+ <&a57_1>;
+ };
+
+ pmu_a53 {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
+ };
+
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
@@ -190,18 +207,6 @@
resets = <&cpg 408>;
};
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13
- (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14
- (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11
- (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10
- (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
wdt0: watchdog at e6020000 {
compatible = "renesas,r8a7796-wdt",
"renesas,rcar-gen3-wdt";
@@ -337,26 +342,6 @@
reg = <0 0xe6060000 0 0x50c>;
};
- pmu_a57 {
- compatible = "arm,cortex-a57-pmu";
- interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&a57_0>,
- <&a57_1>;
- };
-
- pmu_a53 {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&a53_0>,
- <&a53_1>,
- <&a53_2>,
- <&a53_3>;
- };
-
ipmmu_vi0: mmu at febd0000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xfebd0000 0 0x1000>;
@@ -1577,50 +1562,6 @@
status = "okay";
};
- thermal-zones {
- sensor_thermal1: sensor-thermal1 {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
- thermal-sensors = <&tsc 0>;
-
- trips {
- sensor1_crit: sensor1-crit {
- temperature = <120000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- sensor_thermal2: sensor-thermal2 {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
- thermal-sensors = <&tsc 1>;
-
- trips {
- sensor2_crit: sensor2-crit {
- temperature = <120000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- sensor_thermal3: sensor-thermal3 {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
- thermal-sensors = <&tsc 2>;
-
- trips {
- sensor3_crit: sensor3-crit {
- temperature = <120000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
- };
-
rcar_sound: sound at ec500000 {
/*
* #sound-dai-cells is required
@@ -2027,4 +1968,56 @@
resets = <&cpg 822>;
};
};
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ thermal-zones {
+ sensor_thermal1: sensor-thermal1 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 0>;
+
+ trips {
+ sensor1_crit: sensor1-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal2: sensor-thermal2 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 1>;
+
+ trips {
+ sensor2_crit: sensor2-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal3: sensor-thermal3 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 2>;
+
+ trips {
+ sensor3_crit: sensor3-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
};
--
2.11.0
^ permalink raw reply related
* [PATCH 1/3] arm64: dts: renesas: r8a7796: sort subnodes of root node alphabetically
From: Simon Horman @ 2017-12-13 8:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMuHMdW8OJ91FrbUV98iSNd6S3GcLg0b4qRjn2vhtjs7amg++g@mail.gmail.com>
On Tue, Dec 12, 2017 at 10:30:34AM +0100, Geert Uytterhoeven wrote:
> On Tue, Dec 12, 2017 at 9:24 AM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > Sort root sub-nodes alphabetically for allow for easier maintenance
> > of this file.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thanks, applied.
^ permalink raw reply
* [PATCH 1/3] arm64: dts: renesas: r8a7796: sort subnodes of root node alphabetically
From: Simon Horman @ 2017-12-13 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMuHMdW8OJ91FrbUV98iSNd6S3GcLg0b4qRjn2vhtjs7amg++g@mail.gmail.com>
On Tue, Dec 12, 2017 at 10:30:34AM +0100, Geert Uytterhoeven wrote:
> On Tue, Dec 12, 2017 at 9:24 AM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > Sort root sub-nodes alphabetically for allow for easier maintenance
> > of this file.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thanks, applied.
^ permalink raw reply
* [PATCH] arm64: dts: renesas: r8a7795: sort subnodes of root node alphabetically
From: Simon Horman @ 2017-12-13 8:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMuHMdXRxSjcR9nTfUeD-Xo2pJp2p=d3WEd9as3VQxP69frwbQ@mail.gmail.com>
On Tue, Dec 12, 2017 at 10:45:58AM +0100, Geert Uytterhoeven wrote:
> On Tue, Dec 12, 2017 at 9:27 AM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > Sort root sub-nodes alphabetically for allow for easier maintenance
> > of this file.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thanks, applied.
^ permalink raw reply
* [PATCH] dt-bindings: pinctrl: stm32: fix copyright and adopt SPDX identifier
From: Linus Walleij @ 2017-12-13 8:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512748391-22004-1-git-send-email-alexandre.torgue@st.com>
On Fri, Dec 8, 2017 at 4:53 PM, Alexandre Torgue
<alexandre.torgue@st.com> wrote:
> Add missing copyright and add SPDX identifier.
>
> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH V3 09/29] drm/i915: deprecate pci_get_bus_and_slot()
From: Joonas Lahtinen @ 2017-12-13 8:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <055279d0-5e1b-621c-af8e-4c2704d54e8c@codeaurora.org>
On Tue, 2017-12-12 at 19:07 -0500, Sinan Kaya wrote:
> On 12/12/2017 9:04 AM, Joonas Lahtinen wrote:
> > Hi,
> >
> > I sent this individual i915 patch to our CI, and it is passing on
> > all platforms:
> >
> > https://patchwork.freedesktop.org/series/34822/
> >
> > Is it ok if I merge this to drm-tip already?
>
> As long as you have this change in your tree, it should be safe.
>
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/include/linux/pci.h?id=7912af5c835bd86f2b0347a480e0f40e2fab30d0
>
We don't yet.
Rodrigo, can you please pull the above patch in once we get a
backmerge?
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
^ permalink raw reply
* [PATCH] firmware: ti_sci: Use %zu for size_t print format
From: Lokesh Vutla @ 2017-12-13 7:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171202102012.354-1-nm@ti.com>
On Saturday 02 December 2017 03:50 PM, Nishanth Menon wrote:
> mbox_msg->len is of type size_t and %d is incorrect format. Instead
> use %zu for handling size_t correctly.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Thanks and regards,
Lokesh
^ permalink raw reply
* [PATCH 1/1] arm: sunxi: Add alternative pins for spi0
From: Stefan Mavrodiev @ 2017-12-13 7:44 UTC (permalink / raw)
To: linux-arm-kernel
Allwinner A10/A13/A20 SoCs have pinmux for spi0
on port C. The patch adds these pins in the respective
dts includes.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
---
arch/arm/boot/dts/sun4i-a10.dtsi | 10 ++++++++++
arch/arm/boot/dts/sun5i.dtsi | 10 ++++++++++
arch/arm/boot/dts/sun7i-a20.dtsi | 10 ++++++++++
3 files changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 5840f5c..d835741 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -705,11 +705,21 @@
bias-pull-up;
};
+ spi0_pc_pins: spi0-pc-pins {
+ pins = "PC0", "PC1", "PC2";
+ function = "spi0";
+ };
+
spi0_pi_pins: spi0-pi-pins {
pins = "PI11", "PI12", "PI13";
function = "spi0";
};
+ spi0_cs0_pc_pin: spi0-cs0-pc-pin {
+ pins = "PC23";
+ function = "spi0";
+ };
+
spi0_cs0_pi_pin: spi0-cs0-pi-pin {
pins = "PI10";
function = "spi0";
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 07f2248..9290e26 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -492,6 +492,16 @@
function = "nand0";
};
+ spi0_pins_a: spi0 at 0 {
+ pins = "PC0", "PC1", "PC2";
+ function = "spi0";
+ };
+
+ spi0_cs0_pins_a: spi0-cs0 at 0 {
+ pins = "PC3";
+ function = "spi0";
+ };
+
spi2_pins_a: spi2 at 0 {
pins = "PE1", "PE2", "PE3";
function = "spi2";
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 59655e4..6930527 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -838,11 +838,21 @@
function = "spi0";
};
+ spi0_pins_b: spi0 at 1 {
+ pins = "PC0", "PC1", "PC2";
+ function = "spi0";
+ };
+
spi0_cs0_pins_a: spi0_cs0 at 0 {
pins = "PI10";
function = "spi0";
};
+ spi0_cs0_pins_b: spi0_cs0 at 1 {
+ pins = "PC23";
+ function = "spi0";
+ };
+
spi0_cs1_pins_a: spi0_cs1 at 0 {
pins = "PI14";
function = "spi0";
--
2.7.4
^ permalink raw reply related
* [PATCH v5 8/9] pinctrl: axp209: add support for AXP813 GPIOs
From: Linus Walleij @ 2017-12-13 7:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <96bc20e3-97ca-ae76-9e35-e6af644659c7@free-electrons.com>
On Fri, Dec 8, 2017 at 2:41 PM, Quentin Schulz
<quentin.schulz@free-electrons.com> wrote:
>> - pctl->desc = &axp20x_data;
>> + pctl->desc = (struct axp20x_pctrl_desc *)of_device_get_match_data(dev);
>> pctl->regmap = axp20x->regmap;
>> pctl->dev = &pdev->dev;
>>
>
> I am using pctl->desc before retrieving it, thus dereferencing from a
> null pointer.
>
> We just have to move
> pctl->chip.ngpio = pctl->desc->npins;
> after
> pctl->desc = (struct axp20x_pctrl_desc *)of_device_get_match_data(dev);
>
> Linus, I guess that I should send a patch to fix this or is there an
> other way not to have to apply such a small and dumb patch?
Just send a patch based on my pin control tree "devel" branch or
linux-next, it's cool.
Things like this happens all the time.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v5 0/4] ARM: ep93xx: ts72xx: Add support for BK3 board
From: Linus Walleij @ 2017-12-13 7:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171211233625.5689-1-lukma@denx.de>
On Tue, Dec 12, 2017 at 12:36 AM, Lukasz Majewski <lukma@denx.de> wrote:
> This patch series adds support for Liebherr's BK3 board, being
> a derivative of TS72XX design.
All looks good.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Out of curiosity: Liebherr is obviously doing heavy-duty industrial
control systems. Likewise Hartley is doing similar business over
at Vision Engravings.
Is the situation such that there is a whole bunch of industrial
systems out there, in active use and needing future upgrades,
that use the EP93xx?
Arnd has been nudging me to do DT conversion for EP93xx
so if there are many active industrial users of these
I should prioritize it, because these things have 20+ years
support cycles.
We also need to think about upholding support in GCC for
ARMv4(t) for the foreseeable future if there is a big web of
random deeply embedded systems out there that will need
updates.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH V8 7/7] dmaengine: qcom_hidma: Add identity register support
From: Sinan Kaya @ 2017-12-13 7:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513149653-19451-1-git-send-email-okaya@codeaurora.org>
The location for destination event channel register has been relocated from
offset 0x28 to 0x40. Update the code accordingly.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/dma/qcom/hidma.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/qcom/hidma.c b/drivers/dma/qcom/hidma.c
index c146c6d..963cc52 100644
--- a/drivers/dma/qcom/hidma.c
+++ b/drivers/dma/qcom/hidma.c
@@ -107,6 +107,7 @@ static void hidma_free(struct hidma_dev *dmadev)
enum hidma_cap {
HIDMA_MSI_CAP = 1,
+ HIDMA_IDENTITY_CAP,
};
/* process completed descriptors */
@@ -838,7 +839,10 @@ static int hidma_probe(struct platform_device *pdev)
if (!dmadev->nr_descriptors)
dmadev->nr_descriptors = HIDMA_NR_DEFAULT_DESC;
- dmadev->chidx = readl(dmadev->dev_trca + 0x28);
+ if (hidma_test_capability(&pdev->dev, HIDMA_IDENTITY_CAP))
+ dmadev->chidx = readl(dmadev->dev_trca + 0x40);
+ else
+ dmadev->chidx = readl(dmadev->dev_trca + 0x28);
/* Set DMA mask to 64 bits. */
rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
@@ -944,7 +948,7 @@ static int hidma_remove(struct platform_device *pdev)
static const struct acpi_device_id hidma_acpi_ids[] = {
{"QCOM8061"},
{"QCOM8062", HIDMA_MSI_CAP},
- {"QCOM8063", HIDMA_MSI_CAP},
+ {"QCOM8063", (HIDMA_MSI_CAP | HIDMA_IDENTITY_CAP)},
{},
};
MODULE_DEVICE_TABLE(acpi, hidma_acpi_ids);
@@ -953,7 +957,8 @@ static int hidma_remove(struct platform_device *pdev)
static const struct of_device_id hidma_match[] = {
{.compatible = "qcom,hidma-1.0",},
{.compatible = "qcom,hidma-1.1", .data = (void *)(HIDMA_MSI_CAP),},
- {.compatible = "qcom,hidma-1.2", .data = (void *)(HIDMA_MSI_CAP),},
+ {.compatible = "qcom,hidma-1.2",
+ .data = (void *)(HIDMA_MSI_CAP | HIDMA_IDENTITY_CAP),},
{},
};
MODULE_DEVICE_TABLE(of, hidma_match);
--
1.9.1
^ permalink raw reply related
* [PATCH V8 6/7] dmaengine: qcom_hidma: Add support for the new revision
From: Sinan Kaya @ 2017-12-13 7:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513149653-19451-1-git-send-email-okaya@codeaurora.org>
Add support for probing the newer HW and also organize MSI capable hardware
into an array for maintenance reasons.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/dma/qcom/hidma.c | 34 +++++++++++++---------------------
1 file changed, 13 insertions(+), 21 deletions(-)
diff --git a/drivers/dma/qcom/hidma.c b/drivers/dma/qcom/hidma.c
index e366985..c146c6d 100644
--- a/drivers/dma/qcom/hidma.c
+++ b/drivers/dma/qcom/hidma.c
@@ -50,6 +50,7 @@
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/of_dma.h>
+#include <linux/of_device.h>
#include <linux/property.h>
#include <linux/delay.h>
#include <linux/acpi.h>
@@ -104,6 +105,9 @@ static void hidma_free(struct hidma_dev *dmadev)
module_param(nr_desc_prm, uint, 0644);
MODULE_PARM_DESC(nr_desc_prm, "number of descriptors (default: 0)");
+enum hidma_cap {
+ HIDMA_MSI_CAP = 1,
+};
/* process completed descriptors */
static void hidma_process_completed(struct hidma_chan *mchan)
@@ -736,25 +740,12 @@ static int hidma_request_msi(struct hidma_dev *dmadev,
#endif
}
-static bool hidma_msi_capable(struct device *dev)
+static bool hidma_test_capability(struct device *dev, enum hidma_cap test_cap)
{
- struct acpi_device *adev = ACPI_COMPANION(dev);
- const char *of_compat;
- int ret = -EINVAL;
-
- if (!adev || acpi_disabled) {
- ret = device_property_read_string(dev, "compatible",
- &of_compat);
- if (ret)
- return false;
+ enum hidma_cap cap;
- ret = strcmp(of_compat, "qcom,hidma-1.1");
- } else {
-#ifdef CONFIG_ACPI
- ret = strcmp(acpi_device_hid(adev), "QCOM8062");
-#endif
- }
- return ret == 0;
+ cap = (enum hidma_cap) device_get_match_data(dev);
+ return cap ? ((cap & test_cap) > 0) : 0;
}
static int hidma_probe(struct platform_device *pdev)
@@ -834,8 +825,7 @@ static int hidma_probe(struct platform_device *pdev)
* Determine the MSI capability of the platform. Old HW doesn't
* support MSI.
*/
- msi = hidma_msi_capable(&pdev->dev);
-
+ msi = hidma_test_capability(&pdev->dev, HIDMA_MSI_CAP);
device_property_read_u32(&pdev->dev, "desc-count",
&dmadev->nr_descriptors);
@@ -953,7 +943,8 @@ static int hidma_remove(struct platform_device *pdev)
#if IS_ENABLED(CONFIG_ACPI)
static const struct acpi_device_id hidma_acpi_ids[] = {
{"QCOM8061"},
- {"QCOM8062"},
+ {"QCOM8062", HIDMA_MSI_CAP},
+ {"QCOM8063", HIDMA_MSI_CAP},
{},
};
MODULE_DEVICE_TABLE(acpi, hidma_acpi_ids);
@@ -961,7 +952,8 @@ static int hidma_remove(struct platform_device *pdev)
static const struct of_device_id hidma_match[] = {
{.compatible = "qcom,hidma-1.0",},
- {.compatible = "qcom,hidma-1.1",},
+ {.compatible = "qcom,hidma-1.1", .data = (void *)(HIDMA_MSI_CAP),},
+ {.compatible = "qcom,hidma-1.2", .data = (void *)(HIDMA_MSI_CAP),},
{},
};
MODULE_DEVICE_TABLE(of, hidma_match);
--
1.9.1
^ permalink raw reply related
* [PATCH V8 5/7] ACPI: properties: Implement get_match_data() callback
From: Sinan Kaya @ 2017-12-13 7:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513149653-19451-1-git-send-email-okaya@codeaurora.org>
Now that we have a get_match_data() callback as part of the firmware node,
implement the ACPI specific piece for it.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
---
drivers/acpi/property.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/acpi/property.c b/drivers/acpi/property.c
index e26ea20..466d150 100644
--- a/drivers/acpi/property.c
+++ b/drivers/acpi/property.c
@@ -1271,9 +1271,17 @@ static int acpi_fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode,
return 0;
}
+static void *
+acpi_fwnode_device_get_match_data(const struct fwnode_handle *fwnode,
+ const struct device *dev)
+{
+ return acpi_get_match_data(dev);
+}
+
#define DECLARE_ACPI_FWNODE_OPS(ops) \
const struct fwnode_operations ops = { \
.device_is_available = acpi_fwnode_device_is_available, \
+ .device_get_match_data = acpi_fwnode_device_get_match_data, \
.property_present = acpi_fwnode_property_present, \
.property_read_int_array = \
acpi_fwnode_property_read_int_array, \
--
1.9.1
^ permalink raw reply related
* [PATCH V8 4/7] OF: properties: Implement get_match_data() callback
From: Sinan Kaya @ 2017-12-13 7:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513149653-19451-1-git-send-email-okaya@codeaurora.org>
Now that we have a get_match_data() callback as part of the firmware node,
implement the OF specific piece for it.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
---
drivers/of/property.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/of/property.c b/drivers/of/property.c
index 8ad33a4..f25d363 100644
--- a/drivers/of/property.c
+++ b/drivers/of/property.c
@@ -981,10 +981,18 @@ static int of_fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode,
return 0;
}
+static void *
+of_fwnode_device_get_match_data(const struct fwnode_handle *fwnode,
+ const struct device *dev)
+{
+ return (void *)of_device_get_match_data(dev);
+}
+
const struct fwnode_operations of_fwnode_ops = {
.get = of_fwnode_get,
.put = of_fwnode_put,
.device_is_available = of_fwnode_device_is_available,
+ .device_get_match_data = of_fwnode_device_get_match_data,
.property_present = of_fwnode_property_present,
.property_read_int_array = of_fwnode_property_read_int_array,
.property_read_string_array = of_fwnode_property_read_string_array,
--
1.9.1
^ permalink raw reply related
* [PATCH V8 3/7] device property: Introduce a common API to fetch device match data
From: Sinan Kaya @ 2017-12-13 7:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513149653-19451-1-git-send-email-okaya@codeaurora.org>
There is an OF/ACPI function to obtain the driver data. We want to hide
OF/ACPI details from the device drivers and abstract following the device
family of functions.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
---
drivers/base/property.c | 7 +++++++
include/linux/fwnode.h | 4 ++++
include/linux/property.h | 2 ++
3 files changed, 13 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..09eaac9 100644
--- a/drivers/base/property.c
+++ b/drivers/base/property.c
@@ -1340,3 +1340,10 @@ int fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode,
return fwnode_call_int_op(fwnode, graph_parse_endpoint, endpoint);
}
EXPORT_SYMBOL(fwnode_graph_parse_endpoint);
+
+void *device_get_match_data(struct device *dev)
+{
+ return fwnode_call_ptr_op(dev_fwnode(dev), device_get_match_data,
+ dev);
+}
+EXPORT_SYMBOL_GPL(device_get_match_data);
diff --git a/include/linux/fwnode.h b/include/linux/fwnode.h
index 411a84c..4fa1a48 100644
--- a/include/linux/fwnode.h
+++ b/include/linux/fwnode.h
@@ -15,6 +15,7 @@
#include <linux/types.h>
struct fwnode_operations;
+struct device;
struct fwnode_handle {
struct fwnode_handle *secondary;
@@ -51,6 +52,7 @@ struct fwnode_reference_args {
* struct fwnode_operations - Operations for fwnode interface
* @get: Get a reference to an fwnode.
* @put: Put a reference to an fwnode.
+ * @device_get_match_data: Return the device driver match data.
* @property_present: Return true if a property is present.
* @property_read_integer_array: Read an array of integer properties. Return
* zero on success, a negative error code
@@ -71,6 +73,8 @@ struct fwnode_operations {
struct fwnode_handle *(*get)(struct fwnode_handle *fwnode);
void (*put)(struct fwnode_handle *fwnode);
bool (*device_is_available)(const struct fwnode_handle *fwnode);
+ void *(*device_get_match_data)(const struct fwnode_handle *fwnode,
+ const struct device *dev);
bool (*property_present)(const struct fwnode_handle *fwnode,
const char *propname);
int (*property_read_int_array)(const struct fwnode_handle *fwnode,
diff --git a/include/linux/property.h b/include/linux/property.h
index f6189a3..6653ed4 100644
--- a/include/linux/property.h
+++ b/include/linux/property.h
@@ -275,6 +275,8 @@ int device_add_properties(struct device *dev,
enum dev_dma_attr device_get_dma_attr(struct device *dev);
+void *device_get_match_data(struct device *dev);
+
int device_get_phy_mode(struct device *dev);
void *device_get_mac_address(struct device *dev, char *addr, int alen);
--
1.9.1
^ permalink raw reply related
* [PATCH V8 2/7] ACPI / bus: Introduce acpi_get_match_data() function
From: Sinan Kaya @ 2017-12-13 7:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513149653-19451-1-git-send-email-okaya@codeaurora.org>
OF has of_device_get_match_data() function to extract driver specific data
structure. Add a similar function for ACPI.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
---
drivers/acpi/bus.c | 18 ++++++++++++++++++
include/linux/acpi.h | 6 ++++++
2 files changed, 24 insertions(+)
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 4d0979e..f87ed3b 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -785,6 +785,24 @@ const struct acpi_device_id *acpi_match_device(const struct acpi_device_id *ids,
}
EXPORT_SYMBOL_GPL(acpi_match_device);
+void *acpi_get_match_data(const struct device *dev)
+{
+ const struct acpi_device_id *match;
+
+ if (!dev->driver)
+ return NULL;
+
+ if (!dev->driver->acpi_match_table)
+ return NULL;
+
+ match = acpi_match_device(dev->driver->acpi_match_table, dev);
+ if (!match)
+ return NULL;
+
+ return (void *)match->driver_data;
+}
+EXPORT_SYMBOL_GPL(acpi_get_match_data);
+
int acpi_match_device_ids(struct acpi_device *device,
const struct acpi_device_id *ids)
{
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index dc1ebfe..9278737 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -584,6 +584,7 @@ extern int acpi_nvs_for_each_region(int (*func)(__u64, __u64, void *),
const struct acpi_device_id *acpi_match_device(const struct acpi_device_id *ids,
const struct device *dev);
+void *acpi_get_match_data(const struct device *dev);
extern bool acpi_driver_match_device(struct device *dev,
const struct device_driver *drv);
int acpi_device_uevent_modalias(struct device *, struct kobj_uevent_env *);
@@ -755,6 +756,11 @@ static inline const struct acpi_device_id *acpi_match_device(
return NULL;
}
+static inline void *acpi_get_match_data(const struct device *dev)
+{
+ return NULL;
+}
+
static inline bool acpi_driver_match_device(struct device *dev,
const struct device_driver *drv)
{
--
1.9.1
^ permalink raw reply related
* [PATCH V8 1/7] Documentation: DT: qcom_hidma: Bump HW revision for the bugfixed HW
From: Sinan Kaya @ 2017-12-13 7:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513149653-19451-1-git-send-email-okaya@codeaurora.org>
A new version of the HIDMA IP has been released with bug fixes. Bumping the
hardware version to differentiate from others.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
index 55492c2..5d93d6d 100644
--- a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
+++ b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
@@ -47,8 +47,8 @@ When the OS is not in control of the management interface (i.e. it's a guest),
the channel nodes appear on their own, not under a management node.
Required properties:
-- compatible: must contain "qcom,hidma-1.0" for initial HW or "qcom,hidma-1.1"
-for MSI capable HW.
+- compatible: must contain "qcom,hidma-1.0" for initial HW or
+ "qcom,hidma-1.1"/"qcom,hidma-1.2" for MSI capable HW.
- reg: Addresses for the transfer and event channel
- interrupts: Should contain the event interrupt
- desc-count: Number of asynchronous requests this channel can handle
--
1.9.1
^ permalink raw reply related
* [PATCH V8 0/7] dmaengine: qcom_hidma: add support for bugfixed HW
From: Sinan Kaya @ 2017-12-13 7:20 UTC (permalink / raw)
To: linux-arm-kernel
Introduce new ACPI and OF device ids for thw HW along with the helper
functions.
Changes from v7:
* rebase to 4.15-rc1
Sinan Kaya (7):
Documentation: DT: qcom_hidma: Bump HW revision for the bugfixed HW
ACPI / bus: Introduce acpi_get_match_data() function
device property: Introduce a common API to fetch device match data
OF: properties: Implement get_match_data() callback
ACPI: properties: Implement get_match_data() callback
dmaengine: qcom_hidma: Add support for the new revision
dmaengine: qcom_hidma: Add identity register support
.../devicetree/bindings/dma/qcom_hidma_mgmt.txt | 4 +--
drivers/acpi/bus.c | 18 ++++++++++
drivers/acpi/property.c | 8 +++++
drivers/base/property.c | 7 ++++
drivers/dma/qcom/hidma.c | 41 ++++++++++------------
drivers/of/property.c | 8 +++++
include/linux/acpi.h | 6 ++++
include/linux/fwnode.h | 4 +++
include/linux/property.h | 2 ++
9 files changed, 74 insertions(+), 24 deletions(-)
--
1.9.1
^ permalink raw reply
* [PATCH] KVM: arm/arm64: don't set vtimer->cnt_ctl in kvm_arch_timer_handler
From: Jia He @ 2017-12-13 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In our Armv8a server (qualcomm Amberwing, non VHE), after applying
Christoffer's timer optimizing patchset(Optimize arch timer register
handling), the guest is hang during kernel booting.
The error root cause might be as follows:
1. in kvm_arch_timer_handler, it reset vtimer->cnt_ctl with current
cntv_ctl register value. And then it missed some cases to update timer's
irq (irq.level) when kvm_timer_irq_can_fire() is false
2. It causes kvm_vcpu_check_block return 0 instead of -EINTR
kvm_vcpu_check_block
kvm_cpu_has_pending_timer
kvm_timer_is_pending
kvm_timer_should_fire
3. Thus, the kvm hyp code can not break the loop in kvm_vcpu_block (halt
poll process) and the guest is hang forever
Fixes: b103cc3f10c0 ("KVM: arm/arm64: Avoid timer save/restore in vcpu entry/exit")
Signed-off-by: Jia He <jia.he@hxt-semitech.com>
---
virt/kvm/arm/arch_timer.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index f9555b1..bb86433 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_timer.c
@@ -100,7 +100,6 @@ static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
vtimer = vcpu_vtimer(vcpu);
if (!vtimer->irq.level) {
- vtimer->cnt_ctl = read_sysreg_el0(cntv_ctl);
if (kvm_timer_irq_can_fire(vtimer))
kvm_timer_update_irq(vcpu, true, vtimer);
}
--
2.7.4
^ permalink raw reply related
* [GIT PULL 2/2] Rockchip dts64 fixes for 4.15
From: Heiko Stuebner @ 2017-12-13 6:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6469701.IcmEy0bVhn@phil>
The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v4.15-rockchip-dts64fixes-1
for you to fetch changes up to bc631943faba6fc3f755748091ada31798fb7d50:
arm64: dts: rockchip: limit rk3328-rock64 gmac speed to 100MBit for now (2017-12-06 01:14:20 +0100)
----------------------------------------------------------------
Another trailing interrupt-cell 0 removed.
Removed as well got the vdd_log regulator from the rk3399-puma board.
While it is there, the absence of any user makes it prone to configuration
problems when the pwm-regulator takes over the boot-up default and wiggles
settings there. Case in question was the PCIe host not working anymore.
With vdd_log removed for the time being, PCIe on Puma works again.
And a second stopgap is limiting the speed of the gmac on the rk3328-rock64
to 100MBit. While the hardware can reach 1GBit, currently it is not stable.
Limiting it to 100MBit for the time being allows nfsroots to be used again
until the problem is identified.
----------------------------------------------------------------
Heiko Stuebner (2):
arm64: dts: rockchip: fix trailing 0 in rk3328 tsadc interrupts
arm64: dts: rockchip: limit rk3328-rock64 gmac speed to 100MBit for now
Klaus Goger (1):
arm64: dts: rockchip: remove vdd_log from rk3399-puma
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 2 ++
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 11 -----------
3 files changed, 3 insertions(+), 12 deletions(-)
^ permalink raw reply
* [GIT PULL 1/2] Rockchip dts32 fixes for 4.15
From: Heiko Stuebner @ 2017-12-13 6:56 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Kevin, Olof,
please find below and in the next mail some fixes for things cropping up
recently, which may hopefully go into 4.15-rc.
Please pull
Thanks
Heiko
The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v4.15-rockchip-dts32fixes-1
for you to fetch changes up to 912d7985f3cef1b901a4fd9fede549b919fe7ac3:
ARM: dts: rockchip: fix rk3288 iep-IOMMU interrupts property cells (2017-12-04 11:44:20 +0100)
----------------------------------------------------------------
Removed another trailing interrupt-cell 0 and added the cpu regulator
on the rk3066a-marsboard to make it not fail from cpufreq changes.
----------------------------------------------------------------
Heiko Stuebner (1):
ARM: dts: rockchip: add cpu0-regulator on rk3066a-marsboard
Rob Herring (1):
ARM: dts: rockchip: fix rk3288 iep-IOMMU interrupts property cells
arch/arm/boot/dts/rk3066a-marsboard.dts | 4 ++++
arch/arm/boot/dts/rk3288.dtsi | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
^ permalink raw reply
* [PATCH v2 2/2] nvmem: rockchip-efuse: add support for rk3328-efuse
From: Heiko Stuebner @ 2017-12-13 6:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171213065155.32020-1-heiko@sntech.de>
From: Finley Xiao <finley.xiao@rock-chips.com>
This adds the necessary data for handling eFuse on the rk3328.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../devicetree/bindings/nvmem/rockchip-efuse.txt | 1 +
drivers/nvmem/rockchip-efuse.c | 66 ++++++++++++++++++++++
2 files changed, 67 insertions(+)
diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
index a6ef46dd1283..265bdb7dc8aa 100644
--- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
+++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
@@ -6,6 +6,7 @@ Required properties:
- "rockchip,rk3188-efuse" - for RK3188 SoCs.
- "rockchip,rk3228-efuse" - for RK3228 SoCs.
- "rockchip,rk3288-efuse" - for RK3288 SoCs.
+ - "rockchip,rk3328-efuse" - for RK3328 SoCs.
- "rockchip,rk3368-efuse" - for RK3368 SoCs.
- "rockchip,rk3399-efuse" - for RK3399 SoCs.
- reg: Should contain the registers location and exact eFuse size
diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c
index a91372816c0a..b3fa41162973 100644
--- a/drivers/nvmem/rockchip-efuse.c
+++ b/drivers/nvmem/rockchip-efuse.c
@@ -32,6 +32,14 @@
#define RK3288_STROBE BIT(1)
#define RK3288_CSB BIT(0)
+#define RK3328_SECURE_SIZES 96
+#define RK3328_INT_STATUS 0x0018
+#define RK3328_DOUT 0x0020
+#define RK3328_AUTO_CTRL 0x0024
+#define RK3328_INT_FINISH BIT(0)
+#define RK3328_AUTO_ENB BIT(0)
+#define RK3328_AUTO_RD BIT(1)
+
#define RK3399_A_SHIFT 16
#define RK3399_A_MASK 0x3ff
#define RK3399_NBYTES 4
@@ -92,6 +100,60 @@ static int rockchip_rk3288_efuse_read(void *context, unsigned int offset,
return 0;
}
+static int rockchip_rk3328_efuse_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ struct rockchip_efuse_chip *efuse = context;
+ unsigned int addr_start, addr_end, addr_offset, addr_len;
+ u32 out_value, status;
+ u8 *buf;
+ int ret, i = 0;
+
+ ret = clk_prepare_enable(efuse->clk);
+ if (ret < 0) {
+ dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
+ return ret;
+ }
+
+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
+ offset += RK3328_SECURE_SIZES;
+ addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
+ addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
+ addr_offset = offset % RK3399_NBYTES;
+ addr_len = addr_end - addr_start;
+
+ buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto nomem;
+ }
+
+ while (addr_len--) {
+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+ efuse->base + RK3328_AUTO_CTRL);
+ udelay(4);
+ status = readl(efuse->base + RK3328_INT_STATUS);
+ if (!(status & RK3328_INT_FINISH)) {
+ ret = -EIO;
+ goto err;
+ }
+ out_value = readl(efuse->base + RK3328_DOUT);
+ writel(RK3328_INT_FINISH, efuse->base + RK3328_INT_STATUS);
+
+ memcpy(&buf[i], &out_value, RK3399_NBYTES);
+ i += RK3399_NBYTES;
+ }
+
+ memcpy(val, buf + addr_offset, bytes);
+err:
+ kfree(buf);
+nomem:
+ clk_disable_unprepare(efuse->clk);
+
+ return ret;
+}
+
static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
void *val, size_t bytes)
{
@@ -180,6 +242,10 @@ static const struct of_device_id rockchip_efuse_match[] = {
.compatible = "rockchip,rk3368-efuse",
.data = (void *)&rockchip_rk3288_efuse_read,
},
+ {
+ .compatible = "rockchip,rk3328-efuse",
+ .data = (void *)&rockchip_rk3328_efuse_read,
+ },
{
.compatible = "rockchip,rk3399-efuse",
.data = (void *)&rockchip_rk3399_efuse_read,
--
2.14.2
^ permalink raw reply related
* [PATCH v2 1/2] nvmem: rockchip-efuse: parse 'rockchip,efuse-size'
From: Heiko Stuebner @ 2017-12-13 6:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171213065155.32020-1-heiko@sntech.de>
From: Finley Xiao <finley.xiao@rock-chips.com>
The eFuse size is defined in property <reg> before, but the length
of registers is not equal to the size on some platforms, so we
add a new property to redefine it.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt | 4 ++++
drivers/nvmem/rockchip-efuse.c | 4 +++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
index 60bec4782806..a6ef46dd1283 100644
--- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
+++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
@@ -12,6 +12,10 @@ Required properties:
- clocks: Should be the clock id of eFuse
- clock-names: Should be "pclk_efuse"
+Optional properties:
+- rockchip,efuse-size: Should be exact eFuse size in byte, the eFuse
+ size in property <reg> will be invalid if define this property.
+
Deprecated properties:
- compatible: "rockchip,rockchip-efuse"
Old efuse compatible value compatible to rk3066a, rk3188 and rk3288
diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c
index 123de77ca5d6..a91372816c0a 100644
--- a/drivers/nvmem/rockchip-efuse.c
+++ b/drivers/nvmem/rockchip-efuse.c
@@ -217,7 +217,9 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
return PTR_ERR(efuse->clk);
efuse->dev = &pdev->dev;
- econfig.size = resource_size(res);
+ if (of_property_read_u32(dev->of_node, "rockchip,efuse-size",
+ &econfig.size))
+ econfig.size = resource_size(res);
econfig.reg_read = match->data;
econfig.priv = efuse;
econfig.dev = efuse->dev;
--
2.14.2
^ permalink raw reply related
* [PATCH v2 0/2] nvmem: efuse support for rk3328
From: Heiko Stuebner @ 2017-12-13 6:51 UTC (permalink / raw)
To: linux-arm-kernel
Pretty similar to the other variants.
changes in v2:
- rebased on 4.15-rc2
- added Acks by Rob Herring
- increased udelay a tiny bit, due to infrequent read errors
Finley Xiao (2):
nvmem: rockchip-efuse: parse 'rockchip,efuse-size'
nvmem: rockchip-efuse: add support for rk3328-efuse
.../devicetree/bindings/nvmem/rockchip-efuse.txt | 5 ++
drivers/nvmem/rockchip-efuse.c | 70 +++++++++++++++++++++-
2 files changed, 74 insertions(+), 1 deletion(-)
--
2.14.2
^ permalink raw reply
* [xlnx:2017.3_video_ea 6589/6607] warning: (VIDEO_XILINX && ..) selects XILINX_FRMBUF which has unmet direct dependencies (DMADEVICES && ..)
From: kbuild test robot @ 2017-12-13 6:28 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://github.com/Xilinx/linux-xlnx 2017.3_video_ea
head: af045f9682c65a0c26afb2f638603d3c01079222
commit: 62a7ed2f02d28f73f2c09d61ecbe1f289aecc6e5 [6589/6607] staging: xilinx: mixer: Initial commit of Xilinx Video Mixer IP DRM driver
config: x86_64-randconfig-x008-12131414 (attached as .config)
compiler: gcc-7 (Debian 7.2.0-12) 7.2.1 20171025
reproduce:
git checkout 62a7ed2f02d28f73f2c09d61ecbe1f289aecc6e5
# save the attached .config to linux build tree
make ARCH=x86_64
All warnings (new ones prefixed by >>):
warning: (VIDEO_XILINX && DRM_XILINX && DRM_XILINX_XVMIXER) selects XILINX_FRMBUF which has unmet direct dependencies (DMADEVICES && XILINX_DMA_ENGINES)
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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