* [patch v14 1/4] drivers: jtag: Add JTAG core driver
From: Oleksandr Shamray @ 2017-12-14 16:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513268971-13518-1-git-send-email-oleksandrs@mellanox.com>
Initial patch for JTAG driver
JTAG class driver provide infrastructure to support hardware/software
JTAG platform drivers. It provide user layer API interface for flashing
and debugging external devices which equipped with JTAG interface
using standard transactions.
Driver exposes set of IOCTL to user space for:
- XFER:
- SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
- SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks).
- SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
v13->v14
Comments pointed by Philippe Ombredanne <pombredanne@nexb.com>
- Change style of head block comment from /**/ to //
v12->v13
Comments pointed by Philippe Ombredanne <pombredanne@nexb.com>
- Change jtag.c licence type to
SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
and reorder line with license in description
v11->v12
Comments pointed by Greg KH <gregkh@linuxfoundation.org>
- Change jtag.h licence type to
SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
and reorder line with license in description
Chip Bilbrey <chip@bilbrey.org>
- Remove Apeed reference from uapi jtag.h header
- Remove access mode from xfer and idle transactions
- Add new ioctl JTAG_SIOCMODE for set hw mode
- Add only one open per JTAG port blocking with mutex blocking
v10->v11
Notifications from kbuild test robot <lkp@intel.com>
- include types.h headeri to jtag.h
- fix incompatible type of xfer callback
- remove rdundant class defination
- Fix return order in case of xfer error
V9->v10
Comments pointed by Greg KH <gregkh@linuxfoundation.org>
- remove unnecessary alignment for pirv data
- move jtag_copy_to_user and jtag_copy_from_user code just to ioctl
- move int jtag_run_test_idle_op and jtag_xfer_op code
just to ioctl
- change return error codes to more applicable
- add missing error checks
- fix error check order in ioctl
- remove unnecessary blank lines
- add param validation to ioctl
- remove compat_ioctl
- remove only one open per JTAG port blocking.
User will care about this.
- Fix idr memory leak on jtag_exit
- change cdev device type to misc
V8->v9
Comments pointed by Arnd Bergmann <arnd@arndb.de>
- use get_user() instead of __get_user().
- change jtag->open type from int to atomic_t
- remove spinlock on jtg_open
- remove mutex on jtag_register
- add unregister_chrdev_region on jtag_init err
- add unregister_chrdev_region on jtag_exit
- remove unnecessary pointer casts
- add *data parameter to xfer function prototype
v7->v8
Comments pointed by Moritz Fischer <moritz.fischer@ettus.com>
- Fix misspelling s/friver/driver
v6->v7
Notifications from kbuild test robot <lkp@intel.com>
- Remove include asm/types.h from jtag.h
- Add include <linux/types.h> to jtag.c
v5->v6
v4->v5
v3->v4
Comments pointed by Arnd Bergmann <arnd@arndb.de>
- change transaction pointer tdio type to __u64
- change internal status type from enum to __u32
- reorder jtag_xfer members to avoid the implied padding
- add __packed attribute to jtag_xfer and jtag_run_test_idle
v2->v3
Notifications from kbuild test robot <lkp@intel.com>
- Change include path to <linux/types.h> in jtag.h
v1->v2
Comments pointed by Greg KH <gregkh@linuxfoundation.org>
- Change license type from GPLv2/BSD to GPLv2
- Change type of variables which crossed user/kernel to __type
- Remove "default n" from Kconfig
Comments pointed by Andrew Lunn <andrew@lunn.ch>
- Change list_add_tail in jtag_unregister to list_del
Comments pointed by Neil Armstrong <narmstrong@baylibre.com>
- Add SPDX-License-Identifier instead of license text
Comments pointed by Arnd Bergmann <arnd@arndb.de>
- Change __copy_to_user to memdup_user
- Change __put_user to put_user
- Change type of variables to __type for compatible 32 and 64-bit systems
- Add check for maximum xfer data size
- Change lookup data mechanism to get jtag data from inode
- Add .compat_ioctl to file ops
- Add mem alignment for jtag priv data
Comments pointed by Tobias Klauser <tklauser@distanz.ch>
- Change function names to avoid match with variable types
- Fix description for jtag_ru_test_idle in uapi jtag.h
- Fix misprints IDEL/IDLE, trough/through
---
Documentation/ioctl/ioctl-number.txt | 2 +
MAINTAINERS | 10 ++
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/jtag/Kconfig | 16 ++
drivers/jtag/Makefile | 1 +
drivers/jtag/jtag.c | 288 ++++++++++++++++++++++++++++++++++
include/linux/jtag.h | 45 ++++++
include/uapi/linux/jtag.h | 104 ++++++++++++
9 files changed, 469 insertions(+), 0 deletions(-)
create mode 100644 drivers/jtag/Kconfig
create mode 100644 drivers/jtag/Makefile
create mode 100644 drivers/jtag/jtag.c
create mode 100644 include/linux/jtag.h
create mode 100644 include/uapi/linux/jtag.h
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 3e3fdae..1af2508 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -321,6 +321,8 @@ Code Seq#(hex) Include File Comments
0xB0 all RATIO devices in development:
<mailto:vgo@ratio.de>
0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
+0xB2 00-0f linux/jtag.h JTAG driver
+ <mailto:oleksandrs@mellanox.com>
0xB3 00 linux/mmc/ioctl.h
0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org>
0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org>
diff --git a/MAINTAINERS b/MAINTAINERS
index 205d397..dfcf49c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7292,6 +7292,16 @@ L: linux-serial at vger.kernel.org
S: Maintained
F: drivers/tty/serial/jsm/
+JTAG SUBSYSTEM
+M: Oleksandr Shamray <oleksandrs@mellanox.com>
+M: Vadim Pasternak <vadimp@mellanox.com>
+S: Maintained
+F: include/linux/jtag.h
+F: include/uapi/linux/jtag.h
+F: drivers/jtag/
+F: Documentation/devicetree/bindings/jtag/
+F: Documentation/ABI/testing/jtag-cdev
+
K10TEMP HARDWARE MONITORING DRIVER
M: Clemens Ladisch <clemens@ladisch.de>
L: linux-hwmon at vger.kernel.org
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 505c676..2214678 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -208,4 +208,6 @@ source "drivers/tee/Kconfig"
source "drivers/mux/Kconfig"
+source "drivers/jtag/Kconfig"
+
endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index dfdcda0..6a2059b 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -182,3 +182,4 @@ obj-$(CONFIG_FPGA) += fpga/
obj-$(CONFIG_FSI) += fsi/
obj-$(CONFIG_TEE) += tee/
obj-$(CONFIG_MULTIPLEXER) += mux/
+obj-$(CONFIG_JTAG) += jtag/
diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
new file mode 100644
index 0000000..0fad1a3
--- /dev/null
+++ b/drivers/jtag/Kconfig
@@ -0,0 +1,16 @@
+menuconfig JTAG
+ tristate "JTAG support"
+ ---help---
+ This provides basic core functionality support for jtag class devices
+ Hardware equipped with JTAG microcontroller which can be built
+ on top of this drivers. Driver exposes the set of IOCTL to the
+ user space for:
+ SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
+ SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
+ RUNTEST (Forces IEEE 1149.1 bus to a run state for specified
+ number of clocks).
+
+ If you want this support, you should say Y here.
+
+ To compile this driver as a module, choose M here: the module will
+ be called jtag.
diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
new file mode 100644
index 0000000..af37493
--- /dev/null
+++ b/drivers/jtag/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_JTAG) += jtag.o
diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c
new file mode 100644
index 0000000..39cbce9
--- /dev/null
+++ b/drivers/jtag/jtag.c
@@ -0,0 +1,288 @@
+// SPDX-License-Identifier: GPL-2.0
+// drivers/jtag/jtag.c
+//
+// Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+// Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/jtag.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/miscdevice.h>
+#include <linux/module.h>
+#include <linux/rtnetlink.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <uapi/linux/jtag.h>
+
+#define JTAG_NAME "jtag0"
+#define MAX_JTAG_NAME_LEN (sizeof("jtag") + 5)
+
+struct jtag {
+ struct miscdevice miscdev;
+ struct device *dev;
+ const struct jtag_ops *ops;
+ int id;
+ bool opened;
+ struct mutex open_lock;
+ unsigned long priv[0];
+};
+
+static DEFINE_IDA(jtag_ida);
+
+void *jtag_priv(struct jtag *jtag)
+{
+ return jtag->priv;
+}
+EXPORT_SYMBOL_GPL(jtag_priv);
+
+static long jtag_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ struct jtag *jtag = file->private_data;
+ struct jtag_run_test_idle idle;
+ struct jtag_xfer xfer;
+ u8 *xfer_data;
+ u32 data_size;
+ u32 value;
+ int err;
+
+ if (!arg)
+ return -EINVAL;
+
+ switch (cmd) {
+ case JTAG_GIOCFREQ:
+
+ if (jtag->ops->freq_get)
+ err = jtag->ops->freq_get(jtag, &value);
+ else
+ err = -EOPNOTSUPP;
+ if (err)
+ break;
+
+ if (put_user(value, (__u32 *)arg))
+ err = -EFAULT;
+ break;
+
+ case JTAG_SIOCFREQ:
+ if (get_user(value, (__u32 *)arg))
+ return -EFAULT;
+ if (value == 0)
+ return -EINVAL;
+
+ if (jtag->ops->freq_set)
+ err = jtag->ops->freq_set(jtag, value);
+ else
+ err = -EOPNOTSUPP;
+ break;
+
+ case JTAG_IOCRUNTEST:
+ if (copy_from_user(&idle, (void *)arg,
+ sizeof(struct jtag_run_test_idle)))
+ return -EFAULT;
+
+ if (idle.endstate > JTAG_STATE_PAUSEDR)
+ return -EINVAL;
+
+ if (jtag->ops->idle)
+ err = jtag->ops->idle(jtag, &idle);
+ else
+ err = -EOPNOTSUPP;
+ break;
+
+ case JTAG_IOCXFER:
+ if (copy_from_user(&xfer, (void *)arg,
+ sizeof(struct jtag_xfer)))
+ return -EFAULT;
+
+ if (xfer.length >= JTAG_MAX_XFER_DATA_LEN)
+ return -EINVAL;
+
+ if (xfer.type > JTAG_SDR_XFER)
+ return -EINVAL;
+
+ if (xfer.direction > JTAG_WRITE_XFER)
+ return -EINVAL;
+
+ if (xfer.endstate > JTAG_STATE_PAUSEDR)
+ return -EINVAL;
+
+ data_size = DIV_ROUND_UP(xfer.length, BITS_PER_BYTE);
+ xfer_data = memdup_user(u64_to_user_ptr(xfer.tdio), data_size);
+
+ if (!xfer_data)
+ return -EFAULT;
+
+ if (jtag->ops->xfer) {
+ err = jtag->ops->xfer(jtag, &xfer, xfer_data);
+ } else {
+ kfree(xfer_data);
+ return -EOPNOTSUPP;
+ }
+
+ if (err) {
+ kfree(xfer_data);
+ return -EFAULT;
+ }
+
+ err = copy_to_user(u64_to_user_ptr(xfer.tdio),
+ (void *)(xfer_data), data_size);
+
+ if (err) {
+ kfree(xfer_data);
+ return -EFAULT;
+ }
+
+ kfree(xfer_data);
+ if (copy_to_user((void *)arg, &xfer, sizeof(struct jtag_xfer)))
+ return -EFAULT;
+ break;
+
+ case JTAG_GIOCSTATUS:
+ if (jtag->ops->status_get)
+ err = jtag->ops->status_get(jtag, &value);
+ else
+ err = -EOPNOTSUPP;
+ if (err)
+ break;
+
+ err = put_user(value, (__u32 *)arg);
+ if (err)
+ err = -EFAULT;
+ break;
+ case JTAG_SIOCMODE:
+ if (get_user(value, (__u32 *)arg))
+ return -EFAULT;
+ if (value == 0)
+ return -EINVAL;
+
+ if (jtag->ops->mode_set)
+ err = jtag->ops->mode_set(jtag, value);
+ else
+ err = -EOPNOTSUPP;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ return err;
+}
+
+static int jtag_open(struct inode *inode, struct file *file)
+{
+ struct jtag *jtag = container_of(file->private_data, struct jtag,
+ miscdev);
+
+ if (mutex_lock_interruptible(&jtag->open_lock))
+ return -ERESTARTSYS;
+
+ if (jtag->opened) {
+ mutex_unlock(&jtag->open_lock);
+ return -EINVAL;
+ }
+
+ nonseekable_open(inode, file);
+ file->private_data = jtag;
+ jtag->opened = true;
+ mutex_unlock(&jtag->open_lock);
+ return 0;
+}
+
+static int jtag_release(struct inode *inode, struct file *file)
+{
+ struct jtag *jtag = file->private_data;
+
+ mutex_lock(&jtag->open_lock);
+ jtag->opened = false;
+ mutex_unlock(&jtag->open_lock);
+ return 0;
+}
+
+static const struct file_operations jtag_fops = {
+ .owner = THIS_MODULE,
+ .open = jtag_open,
+ .release = jtag_release,
+ .llseek = noop_llseek,
+ .unlocked_ioctl = jtag_ioctl,
+};
+
+struct jtag *jtag_alloc(size_t priv_size, const struct jtag_ops *ops)
+{
+ struct jtag *jtag;
+
+ jtag = kzalloc(sizeof(*jtag) + round_up(priv_size, ARCH_DMA_MINALIGN),
+ GFP_KERNEL);
+ if (!jtag)
+ return NULL;
+
+ jtag->ops = ops;
+ return jtag;
+}
+EXPORT_SYMBOL_GPL(jtag_alloc);
+
+void jtag_free(struct jtag *jtag)
+{
+ kfree(jtag);
+}
+EXPORT_SYMBOL_GPL(jtag_free);
+
+int jtag_register(struct jtag *jtag)
+{
+ char *name;
+ int err;
+ int id;
+
+ id = ida_simple_get(&jtag_ida, 0, 0, GFP_KERNEL);
+ if (id < 0)
+ return id;
+
+ jtag->id = id;
+
+ name = kzalloc(MAX_JTAG_NAME_LEN, GFP_KERNEL);
+ if (!name) {
+ err = -ENOMEM;
+ goto err_jtag_alloc;
+ }
+
+ err = snprintf(name, MAX_JTAG_NAME_LEN, "jtag%d", id);
+ if (err < 0)
+ goto err_jtag_name;
+
+ mutex_init(&jtag->open_lock);
+ jtag->miscdev.fops = &jtag_fops;
+ jtag->miscdev.minor = MISC_DYNAMIC_MINOR;
+ jtag->miscdev.name = name;
+
+ err = misc_register(&jtag->miscdev);
+ if (err)
+ dev_err(jtag->dev, "Unable to register device\n");
+ else
+ return 0;
+ jtag->opened = false;
+
+err_jtag_name:
+ kfree(name);
+err_jtag_alloc:
+ ida_simple_remove(&jtag_ida, id);
+ return err;
+}
+EXPORT_SYMBOL_GPL(jtag_register);
+
+void jtag_unregister(struct jtag *jtag)
+{
+ misc_deregister(&jtag->miscdev);
+ kfree(jtag->miscdev.name);
+ ida_simple_remove(&jtag_ida, jtag->id);
+}
+EXPORT_SYMBOL_GPL(jtag_unregister);
+
+static void __exit jtag_exit(void)
+{
+ ida_destroy(&jtag_ida);
+}
+
+module_exit(jtag_exit);
+
+MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>");
+MODULE_DESCRIPTION("Generic jtag support");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/jtag.h b/include/linux/jtag.h
new file mode 100644
index 0000000..312c641
--- /dev/null
+++ b/include/linux/jtag.h
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0
+// include/linux/jtag.h - JTAG class driver
+//
+// Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+// Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+
+#ifndef __JTAG_H
+#define __JTAG_H
+
+#include <uapi/linux/jtag.h>
+
+#ifndef ARCH_DMA_MINALIGN
+#define ARCH_DMA_MINALIGN 1
+#endif
+
+#define jtag_u64_to_ptr(arg) ((void *)(uintptr_t)arg)
+
+#define JTAG_MAX_XFER_DATA_LEN 65535
+
+struct jtag;
+/**
+ * struct jtag_ops - callbacks for jtag control functions:
+ *
+ * @freq_get: get frequency function. Filled by device driver
+ * @freq_set: set frequency function. Filled by device driver
+ * @status_get: set status function. Filled by device driver
+ * @idle: set JTAG to idle state function. Filled by device driver
+ * @xfer: send JTAG xfer function. Filled by device driver
+ */
+struct jtag_ops {
+ int (*freq_get)(struct jtag *jtag, u32 *freq);
+ int (*freq_set)(struct jtag *jtag, u32 freq);
+ int (*status_get)(struct jtag *jtag, u32 *state);
+ int (*idle)(struct jtag *jtag, struct jtag_run_test_idle *idle);
+ int (*xfer)(struct jtag *jtag, struct jtag_xfer *xfer, u8 *xfer_data);
+ int (*mode_set)(struct jtag *jtag, u32 mode_mask);
+};
+
+void *jtag_priv(struct jtag *jtag);
+int jtag_register(struct jtag *jtag);
+void jtag_unregister(struct jtag *jtag);
+struct jtag *jtag_alloc(size_t priv_size, const struct jtag_ops *ops);
+void jtag_free(struct jtag *jtag);
+
+#endif /* __JTAG_H */
diff --git a/include/uapi/linux/jtag.h b/include/uapi/linux/jtag.h
new file mode 100644
index 0000000..cda2520
--- /dev/null
+++ b/include/uapi/linux/jtag.h
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+// include/uapi/linux/jtag.h - JTAG class driver uapi
+//
+// Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+// Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+
+#ifndef __UAPI_LINUX_JTAG_H
+#define __UAPI_LINUX_JTAG_H
+
+#include <linux/types.h>
+/*
+ * JTAG_XFER_HW_MODE: JTAG hardware mode. Used to set HW drived or bitbang
+ * mode. This is bitmask param of ioctl JTAG_SIOCMODE command
+ */
+#define JTAG_XFER_HW_MODE 1
+
+/**
+ * enum jtag_endstate:
+ *
+ * @JTAG_STATE_IDLE: JTAG state machine IDLE state
+ * @JTAG_STATE_PAUSEIR: JTAG state machine PAUSE_IR state
+ * @JTAG_STATE_PAUSEDR: JTAG state machine PAUSE_DR state
+ */
+enum jtag_endstate {
+ JTAG_STATE_IDLE,
+ JTAG_STATE_PAUSEIR,
+ JTAG_STATE_PAUSEDR,
+};
+
+/**
+ * enum jtag_xfer_type:
+ *
+ * @JTAG_SIR_XFER: SIR transfer
+ * @JTAG_SDR_XFER: SDR transfer
+ */
+enum jtag_xfer_type {
+ JTAG_SIR_XFER,
+ JTAG_SDR_XFER,
+};
+
+/**
+ * enum jtag_xfer_direction:
+ *
+ * @JTAG_READ_XFER: read transfer
+ * @JTAG_WRITE_XFER: write transfer
+ */
+enum jtag_xfer_direction {
+ JTAG_READ_XFER,
+ JTAG_WRITE_XFER,
+};
+
+/**
+ * struct jtag_run_test_idle - forces JTAG state machine to
+ * RUN_TEST/IDLE state
+ *
+ * @reset: 0 - run IDLE/PAUSE from current state
+ * 1 - go through TEST_LOGIC/RESET state before IDLE/PAUSE
+ * @end: completion flag
+ * @tck: clock counter
+ *
+ * Structure represents interface to JTAG device for jtag idle
+ * execution.
+ */
+struct jtag_run_test_idle {
+ __u8 reset;
+ __u8 endstate;
+ __u8 tck;
+};
+
+/**
+ * struct jtag_xfer - jtag xfer:
+ *
+ * @type: transfer type
+ * @direction: xfer direction
+ * @length: xfer bits len
+ * @tdio : xfer data array
+ * @endir: xfer end state
+ *
+ * Structure represents interface to JTAG device for jtag sdr xfer
+ * execution.
+ */
+struct jtag_xfer {
+ __u8 type;
+ __u8 direction;
+ __u8 endstate;
+ __u32 length;
+ __u64 tdio;
+};
+
+/* ioctl interface */
+#define __JTAG_IOCTL_MAGIC 0xb2
+
+#define JTAG_IOCRUNTEST _IOW(__JTAG_IOCTL_MAGIC, 0,\
+ struct jtag_run_test_idle)
+#define JTAG_SIOCFREQ _IOW(__JTAG_IOCTL_MAGIC, 1, unsigned int)
+#define JTAG_GIOCFREQ _IOR(__JTAG_IOCTL_MAGIC, 2, unsigned int)
+#define JTAG_IOCXFER _IOWR(__JTAG_IOCTL_MAGIC, 3, struct jtag_xfer)
+#define JTAG_GIOCSTATUS _IOWR(__JTAG_IOCTL_MAGIC, 4, enum jtag_endstate)
+#define JTAG_SIOCMODE _IOW(__JTAG_IOCTL_MAGIC, 5, unsigned int)
+
+#define JTAG_FIRST_MINOR 0
+#define JTAG_MAX_DEVICES 32
+
+#endif /* __UAPI_LINUX_JTAG_H */
--
1.7.1
^ permalink raw reply related
* [patch v14 0/4] JTAG driver introduction
From: Oleksandr Shamray @ 2017-12-14 16:29 UTC (permalink / raw)
To: linux-arm-kernel
When a need raise up to use JTAG interface for system's devices
programming or CPU debugging, usually the user layer
application implements jtag protocol by bit-bang or using a
proprietary connection to vendor hardware.
This method can be slow and not generic.
We propose to implement general JTAG interface and infrastructure
to communicate with user layer application. In such way, we can
have the standard JTAG interface core part and separation from
specific HW implementation.
This allow new capability to debug the CPU or program system's
device via BMC without additional devices nor cost.
This patch purpose is to add JTAG master core infrastructure by
defining new JTAG class and provide generic JTAG interface
to allow hardware specific drivers to connect this interface.
This will enable all JTAG drivers to use the common interface
part and will have separate for hardware implementation.
The JTAG (Joint Test Action Group) core driver provides minimal generic
JTAG interface, which can be used by hardware specific JTAG master
controllers. By providing common interface for the JTAG controllers,
user space device programing is hardware independent.
Modern SoC which in use for embedded system' equipped with
internal JTAG master interface.
This interface is used for programming and debugging system's
hardware components, like CPLD, FPGA, CPU, voltage and
industrial controllers.
Firmware for such devices can be upgraded through JTAG interface during
Runtime. The JTAG standard support for multiple devices programming,
is in case their lines are daisy-chained together.
For example, systems which equipped with host CPU, BMC SoC or/and
number of programmable devices are capable to connect a pin and
select system components dynamically for programming and debugging,
This is using by the BMC which is equipped with internal SoC master
controller.
For example:
BMC JTAG master --> pin selected to CPLDs chain for programming (filed
upgrade, production)
BMC JTAG master --> pin selected to voltage monitors for programming
(field upgrade, production)
BMC JTAG master --> pin selected to host CPU (on-site debugging
and developers debugging)
For example, we can have application in user space which using calls
to JTAG driver executes CPLD programming directly from SVF file
The JTAG standard (IEEE 1149.1) defines the next connector pins:
- TDI (Test Data In);
- TDO (Test Data Out);
- TCK (Test Clock);
- TMS (Test Mode Select);
- TRST (Test Reset) (Optional);
The SoC equipped with JTAG master controller, performs
device programming on command or vector level. For example
a file in a standard SVF (Serial Vector Format) that contains
boundary scan vectors, can be used by sending each vector
to the JTAG interface and the JTAG controller will execute
the programming.
Initial version provides the system calls set for:
- SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
- SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Oleksandr Shamray (4):
drivers: jtag: Add JTAG core driver
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master
driver
Documentation: jtag: Add bindings for Aspeed SoC 24xx and 25xx
families JTAG master driver
Documentation: jtag: Add ABI documentation
Documentation/ABI/testing/jtag-dev | 27 +
.../devicetree/bindings/jtag/aspeed-jtag.txt | 18 +
Documentation/ioctl/ioctl-number.txt | 2 +
MAINTAINERS | 10 +
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/jtag/Kconfig | 29 +
drivers/jtag/Makefile | 2 +
drivers/jtag/jtag-aspeed.c | 783 ++++++++++++++++++++
drivers/jtag/jtag.c | 288 +++++++
include/linux/jtag.h | 45 ++
include/uapi/linux/jtag.h | 104 +++
12 files changed, 1311 insertions(+), 0 deletions(-)
create mode 100644 Documentation/ABI/testing/jtag-dev
create mode 100644 Documentation/devicetree/bindings/jtag/aspeed-jtag.txt
create mode 100644 drivers/jtag/Kconfig
create mode 100644 drivers/jtag/Makefile
create mode 100644 drivers/jtag/jtag-aspeed.c
create mode 100644 drivers/jtag/jtag.c
create mode 100644 include/linux/jtag.h
create mode 100644 include/uapi/linux/jtag.h
^ permalink raw reply
* [PATCH] iommu/arm-smmu-v3: Don't free page table ops twice
From: Robin Murphy @ 2017-12-14 16:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171214110301.2998-1-jean-philippe.brucker@arm.com>
On 14/12/17 11:03, Jean-Philippe Brucker wrote:
> Kasan reports a double free when finalise_stage_fn fails: the io_pgtable
> ops are freed by arm_smmu_domain_finalise and then again by
> arm_smmu_domain_free. Prevent this by leaving pgtbl_ops empty on failure.
It might be a tiny bit more consistent to simply clear the domain ops
again upon failure (cf. how arm_smmu_attach_dev() treats
smmu_domain->smmu), but I'm sure nobody really cares that much:
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
> Fixes: 48ec83bcbcf5 ("iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices")
> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
> ---
> drivers/iommu/arm-smmu-v3.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index f122071688fd..db4281d0e269 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -1698,13 +1698,15 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain)
> domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap;
> domain->geometry.aperture_end = (1UL << ias) - 1;
> domain->geometry.force_aperture = true;
> - smmu_domain->pgtbl_ops = pgtbl_ops;
>
> ret = finalise_stage_fn(smmu_domain, &pgtbl_cfg);
> - if (ret < 0)
> + if (ret < 0) {
> free_io_pgtable_ops(pgtbl_ops);
> + return ret;
> + }
>
> - return ret;
> + smmu_domain->pgtbl_ops = pgtbl_ops;
> + return 0;
> }
>
> static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid)
>
^ permalink raw reply
* [PATCH 1/1] dt-bindings: arm: document supported STM32 SoC family
From: Ludovic BARRE @ 2017-12-14 16:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAL_JsqJ8+NrOOpg1VcC8ZVVtm3tFTL2qvj8GSkrPU91CWDqzDA@mail.gmail.com>
On 12/14/2017 04:05 PM, Rob Herring wrote:
> On Wed, Dec 13, 2017 at 2:40 AM, Ludovic BARRE <ludovic.barre@st.com> wrote:
>> hi Rob
>>
>> Today there was no bindings documentation for STM32 SoC
>> already upstreamed. This patch adds initial list of STM32
>> existing in kernel.
>> The next serie adds just new soc and one compatible on STM32 list.
>
> Yes, and that series will go thru arm-soc tree so this patch needs to too.
You are right, to avoid merge conflict.
I will included this patch in my series
on "ARM: stm32: add initial STM32MPU support"
This patch can be abandoned.
>
>> So, I think you could apply this patch.
>
> If your series is not going into 4.16, then I can take this one.
>
> Rob
>
^ permalink raw reply
* [PATCH v12 3/3] arm64:dts:hisilicon Disable hisilicon smmu node on hip06/hip07
From: Shameer Kolothum @ 2017-12-14 16:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171214160957.13716-1-shameerali.kolothum.thodi@huawei.com>
The HiSilicon erratum 161010801 describes the limitation of
HiSilicon platforms hip06/hip07 to support the SMMUv3 mappings
for MSI transactions.
PCIe controller on these platforms has to differentiate the
MSI payload against other DMA payload and has to modify the
MSI payload. This makes it difficult for these platforms to
have SMMU translation for MSI. In order to workaround this,
ARM SMMUv3 driver requires a quirk to treat the MSI regions
separately. Such a quirk is currently missing for DT based
systems and therefore we need to explicitly disable the
hip06/hip07 smmu entries in dts.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 56 ++++++++++++++++++++++++++++++++
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 25 ++++++++++++++
2 files changed, 81 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index a049b64..35202eb 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -291,6 +291,13 @@
#interrupt-cells = <2>;
num-pins = <128>;
};
+
+ mbigen_pcie0: intc_pcie0 {
+ msi-parent = <&its_dsa 0x40085>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ num-pins = <10>;
+ };
};
mbigen_dsa at c0080000 {
@@ -312,6 +319,31 @@
};
};
+ /**
+ * HiSilicon erratum 161010801: This describes the limitation
+ * of HiSilicon platforms hip06/hip07 to support the SMMUv3
+ * mappings for PCIe MSI transactions.
+ * PCIe controller on these platforms has to differentiate the
+ * MSI payload against other DMA payload and has to modify the
+ * MSI payload. This makes it difficult for these platforms to
+ * have a SMMU translation for MSI. In order to workaround this,
+ * ARM SMMUv3 driver requires a quirk to treat the MSI regions
+ * separately. Such a quirk is currently missing for DT based
+ * systems. Hence please make sure that the smmu pcie node on
+ * hip06 is disabled as this will break the PCIe functionality
+ * when iommu-map entry is used along with the PCIe node.
+ * Refer:https://www.spinics.net/lists/arm-kernel/msg602812.html
+ */
+ smmu0: smmu_pcie {
+ compatible = "arm,smmu-v3";
+ reg = <0x0 0xa0040000 0x0 0x20000>;
+ #iommu-cells = <1>;
+ dma-coherent;
+ smmu-cb-memtype = <0x0 0x1>;
+ hisilicon,broken-prefetch-cmd;
+ status = "disabled";
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
@@ -676,6 +708,30 @@
<637 1>,<638 1>,<639 1>;
status = "disabled";
};
+
+ pcie0: pcie at a0090000 {
+ compatible = "hisilicon,hip06-pcie-ecam";
+ reg = <0 0xb0000000 0 0x2000000>,
+ <0 0xa0090000 0 0x10000>;
+ bus-range = <0 31>;
+ msi-map = <0x0000 &its_dsa 0x0000 0x2000>;
+ msi-map-mask = <0xffff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ dma-coherent;
+ ranges = <0x02000000 0 0xb2000000 0x0 0xb2000000 0
+ 0x5ff0000 0x01000000 0 0 0 0xb7ff0000
+ 0 0x10000>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0x0 0 0 1 &mbigen_pcie0 650 4
+ 0x0 0 0 2 &mbigen_pcie0 650 4
+ 0x0 0 0 3 &mbigen_pcie0 650 4
+ 0x0 0 0 4 &mbigen_pcie0 650 4>;
+ status = "disabled";
+ };
+
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 2c01a21..3e80bf3 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1083,6 +1083,31 @@
};
};
+ /**
+ * HiSilicon erratum 161010801: This describes the limitation
+ * of HiSilicon platforms hip06/hip07 to support the SMMUv3
+ * mappings for PCIe MSI transactions.
+ * PCIe controller on these platforms has to differentiate the
+ * MSI payload against other DMA payload and has to modify the
+ * MSI payload. This makes it difficult for these platforms to
+ * have a SMMU translation for MSI. In order to workaround this,
+ * ARM SMMUv3 driver requires a quirk to treat the MSI regions
+ * separately. Such a quirk is currently missing for DT based
+ * systems. Hence please make sure that the smmu pcie node on
+ * hip07 is disabled as this will break the PCIe functionality
+ * when iommu-map entry is used along with the PCIe node.
+ * Refer:https://www.spinics.net/lists/arm-kernel/msg602812.html
+ */
+ smmu0: smmu_pcie {
+ compatible = "arm,smmu-v3";
+ reg = <0x0 0xa0040000 0x0 0x20000>;
+ #iommu-cells = <1>;
+ dma-coherent;
+ smmu-cb-memtype = <0x0 0x1>;
+ hisilicon,broken-prefetch-cmd;
+ status = "disabled";
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
--
1.9.1
^ permalink raw reply related
* [PATCH v12 2/3] iommu/dma: Add HW MSI(GICv3 ITS) address regions reservation
From: Shameer Kolothum @ 2017-12-14 16:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171214160957.13716-1-shameerali.kolothum.thodi@huawei.com>
Modified iommu_dma_get_resv_regions() to include GICv3 ITS
region on ACPI based ARM platfiorms which may require HW MSI
reservations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
---
drivers/iommu/dma-iommu.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
index 25914d3..f05f3cf 100644
--- a/drivers/iommu/dma-iommu.c
+++ b/drivers/iommu/dma-iommu.c
@@ -19,6 +19,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#include <linux/acpi_iort.h>
#include <linux/device.h>
#include <linux/dma-iommu.h>
#include <linux/gfp.h>
@@ -167,13 +168,18 @@ void iommu_put_dma_cookie(struct iommu_domain *domain)
*
* IOMMU drivers can use this to implement their .get_resv_regions callback
* for general non-IOMMU-specific reservations. Currently, this covers host
- * bridge windows for PCI devices.
+ * bridge windows for PCI devices and GICv3 ITS region reservation on ACPI
+ * based ARM platforms that may require HW MSI reservation.
*/
void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list)
{
struct pci_host_bridge *bridge;
struct resource_entry *window;
+ if (!is_of_node(dev->iommu_fwspec->iommu_fwnode) &&
+ iort_iommu_msi_get_resv_regions(dev, list) < 0)
+ return;
+
if (!dev_is_pci(dev))
return;
--
1.9.1
^ permalink raw reply related
* [PATCH v12 1/3] ACPI/IORT: Add msi address regions reservation helper
From: Shameer Kolothum @ 2017-12-14 16:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171214160957.13716-1-shameerali.kolothum.thodi@huawei.com>
On some platforms msi parent address regions have to be excluded from
normal IOVA allocation in that they are detected and decoded in a HW
specific way by system components and so they cannot be considered normal
IOVA address space.
Add a helper function that retrieves ITS address regions - the msi
parent - through IORT device <-> ITS mappings and reserves it so that
these regions will not be translated by IOMMU and will be excluded from
IOVA allocations. The function checks for the smmu model number and
only applies the msi reservation if the platform requires it.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
---
drivers/acpi/arm64/iort.c | 111 +++++++++++++++++++++++++++++++++++++--
drivers/irqchip/irq-gic-v3-its.c | 3 +-
include/linux/acpi_iort.h | 7 ++-
3 files changed, 116 insertions(+), 5 deletions(-)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index 95255ec..e2f7bdd 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -39,6 +39,7 @@
struct iort_its_msi_chip {
struct list_head list;
struct fwnode_handle *fw_node;
+ phys_addr_t base_addr;
u32 translation_id;
};
@@ -161,14 +162,16 @@ typedef acpi_status (*iort_find_node_callback)
static DEFINE_SPINLOCK(iort_msi_chip_lock);
/**
- * iort_register_domain_token() - register domain token and related ITS ID
- * to the list from where we can get it back later on.
+ * iort_register_domain_token() - register domain token along with related
+ * ITS ID and base address to the list from where we can get it back later on.
* @trans_id: ITS ID.
+ * @base: ITS base address.
* @fw_node: Domain token.
*
* Returns: 0 on success, -ENOMEM if no memory when allocating list element
*/
-int iort_register_domain_token(int trans_id, struct fwnode_handle *fw_node)
+int iort_register_domain_token(int trans_id, phys_addr_t base,
+ struct fwnode_handle *fw_node)
{
struct iort_its_msi_chip *its_msi_chip;
@@ -178,6 +181,7 @@ int iort_register_domain_token(int trans_id, struct fwnode_handle *fw_node)
its_msi_chip->fw_node = fw_node;
its_msi_chip->translation_id = trans_id;
+ its_msi_chip->base_addr = base;
spin_lock(&iort_msi_chip_lock);
list_add(&its_msi_chip->list, &iort_msi_chip_list);
@@ -581,6 +585,24 @@ int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id)
return -ENODEV;
}
+static int __maybe_unused iort_find_its_base(u32 its_id, phys_addr_t *base)
+{
+ struct iort_its_msi_chip *its_msi_chip;
+ int ret = -ENODEV;
+
+ spin_lock(&iort_msi_chip_lock);
+ list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) {
+ if (its_msi_chip->translation_id == its_id) {
+ *base = its_msi_chip->base_addr;
+ ret = 0;
+ break;
+ }
+ }
+ spin_unlock(&iort_msi_chip_lock);
+
+ return ret;
+}
+
/**
* iort_dev_find_its_id() - Find the ITS identifier for a device
* @dev: The device.
@@ -766,6 +788,24 @@ static inline bool iort_iommu_driver_enabled(u8 type)
}
#ifdef CONFIG_IOMMU_API
+static struct acpi_iort_node *iort_get_msi_resv_iommu(struct device *dev)
+{
+ struct acpi_iort_node *iommu;
+ struct iommu_fwspec *fwspec = dev->iommu_fwspec;
+
+ iommu = iort_get_iort_node(fwspec->iommu_fwnode);
+
+ if (iommu && (iommu->type == ACPI_IORT_NODE_SMMU_V3)) {
+ struct acpi_iort_smmu_v3 *smmu;
+
+ smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data;
+ if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X)
+ return iommu;
+ }
+
+ return NULL;
+}
+
static inline const struct iommu_ops *iort_fwspec_iommu_ops(
struct iommu_fwspec *fwspec)
{
@@ -782,6 +822,69 @@ static inline int iort_add_device_replay(const struct iommu_ops *ops,
return err;
}
+
+/**
+ * iort_iommu_msi_get_resv_regions - Reserved region driver helper
+ * @dev: Device from iommu_get_resv_regions()
+ * @head: Reserved region list from iommu_get_resv_regions()
+ *
+ * Returns: Number of msi reserved regions on success (0 if platform
+ * doesn't require the reservation or no associated msi regions),
+ * appropriate error value otherwise. The ITS interrupt translation
+ * spaces (ITS_base + SZ_64K, SZ_64K) associated with the device
+ * are the msi reserved regions.
+ */
+int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head)
+{
+ struct acpi_iort_its_group *its;
+ struct acpi_iort_node *iommu_node, *its_node = NULL;
+ int i, resv = 0;
+
+ iommu_node = iort_get_msi_resv_iommu(dev);
+ if (!iommu_node)
+ return 0;
+
+ /*
+ * Current logic to reserve ITS regions relies on HW topologies
+ * where a given PCI or named component maps its IDs to only one
+ * ITS group; if a PCI or named component can map its IDs to
+ * different ITS groups through IORT mappings this function has
+ * to be reworked to ensure we reserve regions for all ITS groups
+ * a given PCI or named component may map IDs to.
+ */
+
+ for (i = 0; i < dev->iommu_fwspec->num_ids; i++) {
+ its_node = iort_node_map_id(iommu_node,
+ dev->iommu_fwspec->ids[i],
+ NULL, IORT_MSI_TYPE);
+ if (its_node)
+ break;
+ }
+
+ if (!its_node)
+ return 0;
+
+ /* Move to ITS specific data */
+ its = (struct acpi_iort_its_group *)its_node->node_data;
+
+ for (i = 0; i < its->its_count; i++) {
+ phys_addr_t base;
+
+ if (!iort_find_its_base(its->identifiers[i], &base)) {
+ int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
+ struct iommu_resv_region *region;
+
+ region = iommu_alloc_resv_region(base + SZ_64K, SZ_64K,
+ prot, IOMMU_RESV_MSI);
+ if (region) {
+ list_add_tail(®ion->list, head);
+ resv++;
+ }
+ }
+ }
+
+ return (resv == its->its_count) ? resv : -ENODEV;
+}
#else
static inline const struct iommu_ops *iort_fwspec_iommu_ops(
struct iommu_fwspec *fwspec)
@@ -789,6 +892,8 @@ static inline const struct iommu_ops *iort_fwspec_iommu_ops(
static inline int iort_add_device_replay(const struct iommu_ops *ops,
struct device *dev)
{ return 0; }
+int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head)
+{ return 0; }
#endif
static int iort_iommu_xlate(struct device *dev, struct acpi_iort_node *node,
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 4039e64..d4cff12 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -3450,7 +3450,8 @@ static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header,
return -ENOMEM;
}
- err = iort_register_domain_token(its_entry->translation_id, dom_handle);
+ err = iort_register_domain_token(its_entry->translation_id, res.start,
+ dom_handle);
if (err) {
pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n",
&res.start, its_entry->translation_id);
diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h
index 2f7a292..38cd77b 100644
--- a/include/linux/acpi_iort.h
+++ b/include/linux/acpi_iort.h
@@ -26,7 +26,8 @@
#define IORT_IRQ_MASK(irq) (irq & 0xffffffffULL)
#define IORT_IRQ_TRIGGER_MASK(irq) ((irq >> 32) & 0xffffffffULL)
-int iort_register_domain_token(int trans_id, struct fwnode_handle *fw_node);
+int iort_register_domain_token(int trans_id, phys_addr_t base,
+ struct fwnode_handle *fw_node);
void iort_deregister_domain_token(int trans_id);
struct fwnode_handle *iort_find_domain_token(int trans_id);
#ifdef CONFIG_ACPI_IORT
@@ -38,6 +39,7 @@
/* IOMMU interface */
void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *size);
const struct iommu_ops *iort_iommu_configure(struct device *dev);
+int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head);
#else
static inline void acpi_iort_init(void) { }
static inline u32 iort_msi_map_rid(struct device *dev, u32 req_id)
@@ -52,6 +54,9 @@ static inline void iort_dma_setup(struct device *dev, u64 *dma_addr,
static inline const struct iommu_ops *iort_iommu_configure(
struct device *dev)
{ return NULL; }
+static inline
+int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head)
+{ return 0; }
#endif
#endif /* __ACPI_IORT_H__ */
--
1.9.1
^ permalink raw reply related
* [PATCH v12 0/3] iommu/smmu-v3: Workaround for hisilicon 161010801 erratum(reserve HW MSI)
From: Shameer Kolothum @ 2017-12-14 16:09 UTC (permalink / raw)
To: linux-arm-kernel
On certain HiSilicon platforms (hip06/hip07) the GIC ITS and PCIe RC
deviates from the standard implementation and this breaks PCIe MSI
functionality when SMMU is enabled.
The HiSilicon erratum 161010801 describes this limitation of certain
HiSilicon platforms to support the SMMU mappings for MSI transactions.
On these platforms GICv3 ITS translator is presented with the deviceID
by extending the MSI payload data to 64 bits to include the deviceID.
Hence, the PCIe controller on this platforms has to differentiate the MSI
payload against other DMA payload and has to modify the MSI payload.
This basically makes it difficult for this platforms to have a SMMU
translation for MSI.
This patch implements an ACPI based quirk to reserve the hw msi regions
in the smmu-v3 driver which means these address regions will not be
translated and will be excluded from iova allocations.
To implement this quirk, the following changes are incorporated:
1. Added a generic helper function to IORT code to retrieve and reserve
the associated ITS base address from a device IORT node. The function
has a check for smmu model to determine whether the platform requires
the HW MSI reservation or not.
2. Added smmu node entries and explicitly disabled them in hip06/hip07
dts files so that users are warned about the non-DT support for this
erratum.
Changelog:
v11--> v12
-Thanks to Lorenzo, Fixed !CONFIG_IOMMU_API compile error(patch #1).
v10 --> v11
-Addressed comments from Lorenzo(patch#1)
-Added Robin's Reviewed-by to patch #2
v9 --> v10
Addressed comments:
-Moved smmu model check to iort helper function to selectively apply
the msi reservation which will make the fn call generic from iommu-dma.
-Removed PCI blacklisting patch, instead added smmu nodes(disabled)
with comments to hip06/hip07 dts file.
v8 --> v9
-Thanks to Marc, fixed IORT helper function to reserve the ITS
translater region only.
-Removed the DT support for MSI reservation and blacklisted
HiSilicon PCIe controllers on DT based systems when SMMUv3 is
enabled.
v7 --> v8
Addressed comments from Rob and Lorenzo:
-Modified to use DT compatible string for errata.
-Changed logic to retrieve the msi-parent for DT case.
v6 --> v7
Addressed request from Will to add DT support for the erratum:
- added bt binding
- add of_iommu_msi_get_resv_regions()
New arm64 silicon errata entry
Rename iort_iommu_{its->msi}_get_resv_regions
v5 --> v6
Addressed comments from Robin and Lorenzo:
-No change to patch#1 .
-Reverted v5 patch#2 as this might break the platforms where this quirk
is not applicable. Provided a generic function in iommu code and added
back the quirk implementation in SMMU v3 driver(patch#3)
v4 --> v5
Addressed comments from Robin and Lorenzo:
-Added a comment to make it clear that, for now, only straightforward
HW topologies are handled while reserving ITS regions(patch #1).
v3 --> v4
Rebased on 4.13-rc1.
Addressed comments from Robin, Will and Lorenzo:
-As suggested by Robin, moved the ITS msi reservation into
iommu_dma_get_resv_regions().
-Added its_count != resv region failure case(patch #1).
v2 --> v3
Addressed comments from Lorenzo and Robin:
-Removed dev_is_pci() check in smmuV3 driver.
-Don't treat device not having an ITS mapping as an error in
iort helper function.
v1 --> v2
-patch 2/2: Invoke iort helper fn based on fwnode type(acpi).
RFCv2 -->PATCH
-Incorporated Lorenzo's review comments.
RFC v1 --> RFC v2
Based on Robin's review comments,
-Removed the generic erratum framework.
-Using IORT/MADT tables to retrieve the ITS base addr instead
of vendor specific CSRT table.
Shameer Kolothum (3):
ACPI/IORT: Add msi address regions reservation helper
iommu/dma: Add HW MSI(GICv3 ITS) address regions reservation
arm64:dts:hisilicon Disable hisilicon smmu node on hip06/hip07
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 56 ++++++++++++++++
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 25 +++++++
drivers/acpi/arm64/iort.c | 111 ++++++++++++++++++++++++++++++-
drivers/iommu/dma-iommu.c | 8 ++-
drivers/irqchip/irq-gic-v3-its.c | 3 +-
include/linux/acpi_iort.h | 7 +-
6 files changed, 204 insertions(+), 6 deletions(-)
--
1.9.1
^ permalink raw reply
* [RFC PATCH 0/7] gpiolib: add bias support
From: Andrew Lunn @ 2017-12-14 16:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171214142138.23008-1-ludovic.desroches@microchip.com>
> I have not introduced a gpiod_set_bias() because I think the only place to
> setup this is in the device tree. It's useless to setup a bias pull up if there
> is an external pull up on the board.
Hi Ludovic
I have a use case where having gpiod_set_bias() would be good. The
DLN2 is a USB device, which offers GPIO, I2C, and SPI services on its
pins. It is a hot pluggable device, and i'm using it on Intel
machines, making it double hard to use with Device Tree.
It would be good to be able to set the pull up/down on the GPIO pins,
probably from a small kernel module which calls gpiod_set_bias(), or
via /sysfs.
Andrew
^ permalink raw reply
* [GIT PULL 3/3] dts changes for omaps for v4.16 merge window
From: Tony Lindgren @ 2017-12-14 15:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <pull-1513266986-900907@atomide.com>
From: "Tony Lindgren" <tony@atomide.com>
The following changes since commit bc686442f8a601bccac1f22506ecdb4b0d62cadd:
Merge branch 'dts-fixes' into omap-for-v4.15/fixes-dt (2017-11-28 08:12:32 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v4.16/dt-signed
for you to fetch changes up to a38867305203ef5a27f0c9ff1e943a0c2fabdbce:
ARM: dts: Move move WiFi bindings to logicpd-torpedo-37xx-devkit (2017-12-11 09:43:53 -0800)
----------------------------------------------------------------
Dts related changes for omaps for v4.16 merge window
These changes are mostly improvments for various devices.
Note that these are based on my earlier fixes branch
omap-for-v4.15/fixes-dt to avoid a pointless merge conflict
between a fix and removal. The summary of changes is:
- Fix audio codec reset pin for am335x-pepper and n900, this
has been always broken and won't get fixed until the related
driver changes are also merged in for v4.16, so not urgent
- Fix tps65917 powerhold property for dra76-evm
- Changes to logicpd boards to remove MTD partition information
and to add support for omap35xx variants by setting up common
dts files for the logicpd boards
- Disable dra7 USB metastability workaround, this won't do
anything until the related driver changes are also merged
into v4.16, so not urgent
----------------------------------------------------------------
Adam Ford (6):
ARM: dts: omap3: logicpd kits: Remove partition information
ARM: dts: Move most of logicpd-som-lv-37xx-devkit.dts to logicpd-som-lv-baseboard.dtsi
ARM: dts: Add minimal support for LogicPD OMAP35xx SOM-LV devkit
ARM: dts: Move most of logicpd-torpedo-37xx-devkit to logicpd-torpedo-baseboard
ARM: dts: Add minimal support for LogicPD OMAP35xx Torpedo devkit
ARM: dts: Move move WiFi bindings to logicpd-torpedo-37xx-devkit
Andrew F. Davis (2):
ARM: dts: am335x-pepper: Fix the audio CODEC's reset pin
ARM: dts: omap3-n900: Fix the audio CODEC's reset pin
Keerthy (1):
ARM: dts: DRA76-EVM: Set powerhold property for tps65917
Peter Ujfalusi (1):
ARM: dts: dra7: Add missing hdmi audio DMA channel information
Roger Quadros (1):
ARM: dts: dra7: Disable USB metastability workaround for USB2
Tony Lindgren (1):
Merge branch 'omap-for-v4.15/fixes-dt' into omap-for-v4.16/dt
arch/arm/boot/dts/am335x-pepper.dts | 2 +-
arch/arm/boot/dts/dra7.dtsi | 3 +
arch/arm/boot/dts/dra76-evm.dts | 1 +
arch/arm/boot/dts/logicpd-som-lv-35xx-devkit.dts | 17 +
arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts | 249 +------------
arch/arm/boot/dts/logicpd-som-lv-baseboard.dtsi | 256 ++++++++++++++
arch/arm/boot/dts/logicpd-som-lv.dtsi | 27 --
arch/arm/boot/dts/logicpd-torpedo-35xx-devkit.dts | 17 +
arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts | 411 +++-------------------
arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi | 395 +++++++++++++++++++++
arch/arm/boot/dts/logicpd-torpedo-som.dtsi | 84 -----
arch/arm/boot/dts/omap3-n900.dts | 4 +-
12 files changed, 735 insertions(+), 731 deletions(-)
create mode 100644 arch/arm/boot/dts/logicpd-som-lv-35xx-devkit.dts
create mode 100644 arch/arm/boot/dts/logicpd-som-lv-baseboard.dtsi
create mode 100644 arch/arm/boot/dts/logicpd-torpedo-35xx-devkit.dts
create mode 100644 arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi
^ permalink raw reply
* [GIT PULL 2/3] clock related dts changes for omaps for v4.16
From: Tony Lindgren @ 2017-12-14 15:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <pull-1513266986-900907@atomide.com>
From: "Tony Lindgren" <tony@atomide.com>
The following changes since commit 998601de3c05fb02795d6d9cb1d4dcb25a6019a1:
Merge commit 'fe7020e64f04' into omap-for-v4.16/dt-clk (2017-12-11 08:26:36 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v4.16/dt-clk-signed
for you to fetch changes up to 80a06c0d8357d1e75a8fbc10813fcdada4d897fb:
ARM: dts: dm816x: add clkctrl nodes (2017-12-11 08:28:37 -0800)
----------------------------------------------------------------
Clock related dts changes for omaps for v4.16 merge window
This branch contains a series of dts changes from Tero Kristo to
start using clkctrl clocks.
Note that this branch is based on a merge of omap-for-v4.16/soc-signed
and an immutable commit from Tero Kristo fe7020e64f04 ("clk: ti: omap4:
clkctrl data fixes for opt-clocks") that is also in clk-next.
----------------------------------------------------------------
Tero Kristo (20):
ARM: dts: omap5: add fck under timer1
ARM: dts: omap4: add fck under timer1
ARM: dts: am33xx: add fck under timers1/2
ARM: dts: am43xx: add fck under timers1/2
ARM: dts: dra7: add fck under timer1
ARM: dts: dm814x: add fck under timers1/2
ARM: dts: dm816x: add fck under timers1/2
ARM: dts: omap5: add bus functionality to base PRCM nodes
ARM: dts: omap4: add bus functionality to base PRCM nodes
ARM: dts: dra7: add bus functionality to base PRCM nodes
ARM: dts: am33xx: add bus functionality to base PRCM node
ARM: dts: am43xx: add bus functionality to base PRCM node
ARM: dts: dm816x: add bus functionality to base PRCM node
ARM: dts: omap4: add clkctrl nodes
ARM: dts: omap5: add clkctrl nodes
ARM: dts: dra7: add clkctrl nodes
ARM: dts: am33xx: add clkctrl nodes
ARM: dts: am43xx: add clkctrl nodes
ARM: dts: dm814x: add clkctrl nodes
ARM: dts: dm816x: add clkctrl nodes
arch/arm/boot/dts/am335x-bone-common.dtsi | 2 +-
arch/arm/boot/dts/am335x-boneblue.dts | 2 +-
arch/arm/boot/dts/am335x-evm.dts | 2 +-
arch/arm/boot/dts/am335x-evmsk.dts | 2 +-
arch/arm/boot/dts/am33xx-clocks.dtsi | 205 +++---
arch/arm/boot/dts/am33xx.dtsi | 14 +-
arch/arm/boot/dts/am4372.dtsi | 16 +-
arch/arm/boot/dts/am43x-epos-evm.dts | 2 +-
arch/arm/boot/dts/am43xx-clocks.dtsi | 230 ++----
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 2 +-
arch/arm/boot/dts/dm814x-clocks.dtsi | 30 +
arch/arm/boot/dts/dm814x.dtsi | 4 +
arch/arm/boot/dts/dm816x-clocks.dtsi | 30 +
arch/arm/boot/dts/dm816x.dtsi | 9 +-
arch/arm/boot/dts/dra7-evm-common.dtsi | 4 +-
arch/arm/boot/dts/dra7.dtsi | 84 ++-
arch/arm/boot/dts/dra72-evm-common.dtsi | 4 +-
arch/arm/boot/dts/dra72x.dtsi | 4 +-
arch/arm/boot/dts/dra74x.dtsi | 6 +-
arch/arm/boot/dts/dra7xx-clocks.dtsi | 909 ++++++------------------
arch/arm/boot/dts/omap4.dtsi | 37 +-
arch/arm/boot/dts/omap44xx-clocks.dtsi | 895 ++++++++---------------
arch/arm/boot/dts/omap5.dtsi | 46 +-
arch/arm/boot/dts/omap54xx-clocks.dtsi | 623 ++++++----------
24 files changed, 1091 insertions(+), 2071 deletions(-)
^ permalink raw reply
* [GIT PULL 1/3] soc changes for omaps for v4.16 merge window
From: Tony Lindgren @ 2017-12-14 15:58 UTC (permalink / raw)
To: linux-arm-kernel
From: "Tony Lindgren" <tony@atomide.com>
The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v4.16/soc-signed
for you to fetch changes up to fdf3632938a646c13f7407f2f8c33ff81eed9c76:
Merge branch '4.15-rc1-clkctrl-mach-omap2' of https://github.com/t-kristo/linux-pm into omap-for-v4.16/soc (2017-12-11 07:46:40 -0800)
----------------------------------------------------------------
SoC changes for omaps for v4.16 merge window
For most part this is a series from Tero Kristo to prepare things
for using clkctrl clocks with DTS data. The other changes are to
make few data structures const.
----------------------------------------------------------------
Bhumika Goyal (2):
ARM: OMAP2+: CM: make some pointers and function arguments as const
ARM: OMAP2+: CM: make cm_ll_data structures as const
Tero Kristo (7):
ARM: OMAP2+: CM: add support for getting phys address for a clkctrl register
ARM: OMAP4: CMINST: add support for translating clkctrl addresses
ARM: OMAP2+: hwmod: fix clkctrl address translation logic
ARM: OMAP2+: clockdomain: remove the obsolete clkdm_xlate_address API
ARM: AM33xx: CM: add support for getting physical address for a register
ARM: OMAP2+: hwmod: calculate physical register address on am33xx
ARM: DM816x: hwmod_data: fix clockdomain name for sata hwmod
Tony Lindgren (1):
Merge branch '4.15-rc1-clkctrl-mach-omap2' of https://github.com/t-kristo/linux-pm into omap-for-v4.16/soc
arch/arm/mach-omap2/clockdomain.c | 8 ----
arch/arm/mach-omap2/clockdomain.h | 2 -
arch/arm/mach-omap2/cm.h | 7 ++-
arch/arm/mach-omap2/cm2xxx.c | 2 +-
arch/arm/mach-omap2/cm33xx.c | 8 +++-
arch/arm/mach-omap2/cm3xxx.c | 2 +-
arch/arm/mach-omap2/cm_common.c | 16 +++++--
arch/arm/mach-omap2/cminst44xx.c | 12 ++---
arch/arm/mach-omap2/omap_hwmod.c | 73 +++++++++++++++---------------
arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 2 +-
10 files changed, 68 insertions(+), 64 deletions(-)
^ permalink raw reply
* [PATCH v2 1/2] acpi, spcr: Make SPCR avialable to other architectures
From: Lorenzo Pieralisi @ 2017-12-14 15:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6541a055-bfd4-daa7-5b91-38384bd65c3f@codeaurora.org>
On Thu, Dec 14, 2017 at 08:08:08AM -0600, Timur Tabi wrote:
> On 12/14/17 4:30 AM, Lorenzo Pieralisi wrote:
> >>I didn't want to put any ACPI code in amba-pl011.c, so putting it in spcr.c
> >>made the most sense. I agree the global variable is ugly. If you have a
> >>better idea, I'm all ears.
>
> >I told you my idea. It could have been made easier by reusing the
> >ACPI_DECLARE_PROBE_ENTRY() mechanism.
>
> Sorry, I don't mean to be difficult, but when did you tell *me* this idea of
> yours? I don't see any email from you to me that mentions
I said that IMO it would have been better if the quirk was managed in
amba-pl011.c - you had your reasons not to do it, end of the story.
> ACPI_DECLARE_PROBE_ENTRY(). I've never even heard of that macro before.
> Please note that I'm not the original author of this code.
It is what it is, let's move on, we will keep this in mind if a similar
quirk is required.
Thanks,
Lorenzo
^ permalink raw reply
* [PATCH] KVM: arm/arm64: don't set vtimer->cnt_ctl in kvm_arch_timer_handler
From: Christoffer Dall @ 2017-12-14 15:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5615f3e1-756e-0537-f0b6-20ae8626ac87@gmail.com>
On Thu, Dec 14, 2017 at 11:28:04PM +0800, Jia He wrote:
>
> On 12/14/2017 9:09 PM, Christoffer Dall Wrote:
> >On Thu, Dec 14, 2017 at 12:57:54PM +0800, Jia He wrote:
> >Hi Jia,
> >
> >>I have tried your newer level-mapped-v7 branch, but bug is still there.
> >>
> >>There is no special load in both host and guest. The guest (kernel
> >>4.14) is often hanging when booting
> >>
> >>the guest kernel log
> >>
> >>[ OK ] Reached target Remote File Systems.
> >>Starting File System Check on /dev/mapper/fedora-root...
> >>[ OK ] Started File System Check on /dev/mapper/fedora-root.
> >>Mounting /sysroot...
> >>[ 2.670764] SGI XFS with ACLs, security attributes, no debug enabled
> >>[ 2.678180] XFS (dm-0): Mounting V5 Filesystem
> >>[ 2.740364] XFS (dm-0): Ending clean mount
> >>[ OK ] Mounted /sysroot.
> >>[ OK ] Reached target Initrd Root File System.
> >>Starting Reload Configuration from the Real Root...
> >>[ 61.288215] INFO: rcu_sched detected stalls on CPUs/tasks:
> >>[ 61.290791] 1-...!: (0 ticks this GP) idle=574/0/0 softirq=5/5 fqs=1
> >>[ 61.293664] (detected by 0, t=6002 jiffies, g=-263, c=-264, q=39760)
> >>[ 61.296480] Task dump for CPU 1:
> >>[ 61.297938] swapper/1 R running task 0 0 1 0x00000020
> >>[ 61.300643] Call trace:
> >>[ 61.301260] __switch_to+0x6c/0x78
> >>[ 61.302095] cpu_number+0x0/0x8
> >>[ 61.302867] rcu_sched kthread starved for 6000 jiffies!
> >>g18446744073709551353 c18446744073709551352 f0x0 RCU_GP_WAIT_FQS(3)
> >>->state=0x402 ->cpu=1
> >>[ 61.305941] rcu_sched I 0 8 2 0x00000020
> >>[ 61.307250] Call trace:
> >>[ 61.307854] __switch_to+0x6c/0x78
> >>[ 61.308693] __schedule+0x268/0x8f0
> >>[ 61.309545] schedule+0x2c/0x88
> >>[ 61.310325] schedule_timeout+0x84/0x3b8
> >>[ 61.311278] rcu_gp_kthread+0x4d4/0x7d8
> >>[ 61.312213] kthread+0x134/0x138
> >>[ 61.313001] ret_from_fork+0x10/0x1c
> >>
> >>Maybe my previous patch is not perfect enough, thanks for your comments.
> >>
> >>I digged it futher more, do you think below code logic is possibly
> >>problematic?
> >>
> >>
> >>vtimer_save_state?????????? (vtimer->loaded = false, cntv_ctl is 0)
> >>
> >>kvm_arch_timer_handler????????(read cntv_ctl and set vtimer->cnt_ctl = 0)
> >>
> >>vtimer_restore_state ? ? ? ? ?? (write vtimer->cnt_ctl to cntv_ctl,
> >>then cntv_ctl will
> >>
> >> ??? ??? ??? ??? ?? ? ? be 0 forever)
> >>
> >>
> >>If above analysis is reasonable
> >Yes, I think there's something there if the hardware doesn't retire the
> >signal fast enough...
> >
> >>how about below patch? already
> >>tested in my arm64 server.
> >>
> >>diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
> >>index f9555b1..ee6dd3f 100644
> >>--- a/virt/kvm/arm/arch_timer.c
> >>+++ b/virt/kvm/arm/arch_timer.c
> >>@@ -99,7 +99,7 @@ static irqreturn_t kvm_arch_timer_handler(int irq,
> >>void *dev_id)
> >> ??????? }
> >> ??????? vtimer = vcpu_vtimer(vcpu);
> >>
> >>-?????? if (!vtimer->irq.level) {
> >>+?????? if (vtimer->loaded && !vtimer->irq.level) {
> >> ??????????????? vtimer->cnt_ctl = read_sysreg_el0(cntv_ctl);
> >> ??????????????? if (kvm_timer_irq_can_fire(vtimer))
> >> ??????????????????????? kvm_timer_update_irq(vcpu, true, vtimer);
> >>
> >There's nothing really wrong with that patch, I just didn't think it
> >would be necessary, as we really shouldn't see interrupts if the timer
> >is not loaded. Can you confirm that a WARN_ON(!vtimer->loaded) in
> >kvm_arch_timer_handler() gives you a splat?
> Please see the WARN_ON result (without my patch)
> [?? 72.171706] WARNING: CPU: 24 PID: 1768 at
> arch/arm64/kvm/../../../virt/kvm/arm/arch_timer.c:101
> kvm_arch_timer_handler+0xc0/0xc8
>
> >Also, could you give the following a try (without your patch):
> >
> >diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
> >index 73d262c4712b..4751255345d1 100644
> >--- a/virt/kvm/arm/arch_timer.c
> >+++ b/virt/kvm/arm/arch_timer.c
> >@@ -367,6 +367,7 @@ static void vtimer_save_state(struct kvm_vcpu *vcpu)
> > /* Disable the virtual timer */
> > write_sysreg_el0(0, cntv_ctl);
> >+ isb();
> No luck? the bug is still there
>
ok, so this is a slightly different approach to what you were trying to
do. Can you please give this a try and let me know how it goes?
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index 73d262c4712b..544ed15fbbb3 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_timer.c
@@ -46,7 +46,7 @@ static const struct kvm_irq_level default_vtimer_irq = {
.level = 1,
};
-static bool kvm_timer_irq_can_fire(struct arch_timer_context *timer_ctx);
+static bool kvm_timer_irq_can_fire(u32 cnt_ctl);
static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,
struct arch_timer_context *timer_ctx);
static bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx);
@@ -94,6 +94,7 @@ static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
{
struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)dev_id;
struct arch_timer_context *vtimer;
+ u32 cnt_ctl;
if (!vcpu) {
pr_warn_once("Spurious arch timer IRQ on non-VCPU thread\n");
@@ -101,8 +102,8 @@ static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
}
vtimer = vcpu_vtimer(vcpu);
- vtimer->cnt_ctl = read_sysreg_el0(cntv_ctl);
- if (kvm_timer_irq_can_fire(vtimer))
+ cnt_ctl = read_sysreg_el0(cntv_ctl);
+ if (kvm_timer_irq_can_fire(cnt_ctl))
kvm_timer_update_irq(vcpu, true, vtimer);
if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
@@ -148,10 +149,10 @@ static u64 kvm_timer_compute_delta(struct arch_timer_context *timer_ctx)
return 0;
}
-static bool kvm_timer_irq_can_fire(struct arch_timer_context *timer_ctx)
+static bool kvm_timer_irq_can_fire(u32 cnt_ctl)
{
- return !(timer_ctx->cnt_ctl & ARCH_TIMER_CTRL_IT_MASK) &&
- (timer_ctx->cnt_ctl & ARCH_TIMER_CTRL_ENABLE);
+ return !(cnt_ctl & ARCH_TIMER_CTRL_IT_MASK) &&
+ (cnt_ctl & ARCH_TIMER_CTRL_ENABLE);
}
/*
@@ -164,10 +165,10 @@ static u64 kvm_timer_earliest_exp(struct kvm_vcpu *vcpu)
struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
- if (kvm_timer_irq_can_fire(vtimer))
+ if (kvm_timer_irq_can_fire(vtimer->cnt_ctl))
min_virt = kvm_timer_compute_delta(vtimer);
- if (kvm_timer_irq_can_fire(ptimer))
+ if (kvm_timer_irq_can_fire(ptimer->cnt_ctl))
min_phys = kvm_timer_compute_delta(ptimer);
/* If none of timers can fire, then return 0 */
@@ -231,7 +232,7 @@ static bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx)
{
u64 cval, now;
- if (!kvm_timer_irq_can_fire(timer_ctx))
+ if (!kvm_timer_irq_can_fire(timer_ctx->cnt_ctl))
return false;
cval = timer_ctx->cnt_cval;
@@ -306,7 +307,7 @@ static void phys_timer_emulate(struct kvm_vcpu *vcpu)
* don't need to have a soft timer scheduled for the future. If the
* timer cannot fire at all, then we also don't need a soft timer.
*/
- if (kvm_timer_should_fire(ptimer) || !kvm_timer_irq_can_fire(ptimer)) {
+ if (kvm_timer_should_fire(ptimer) || !kvm_timer_irq_can_fire(ptimer->cnt_ctl)) {
soft_timer_cancel(&timer->phys_timer, NULL);
return;
}
@@ -367,6 +368,7 @@ static void vtimer_save_state(struct kvm_vcpu *vcpu)
/* Disable the virtual timer */
write_sysreg_el0(0, cntv_ctl);
+ isb();
vtimer->loaded = false;
out:
@@ -398,7 +400,8 @@ void kvm_timer_schedule(struct kvm_vcpu *vcpu)
* If both timers are not capable of raising interrupts (disabled or
* masked), then there's no more work for us to do.
*/
- if (!kvm_timer_irq_can_fire(vtimer) && !kvm_timer_irq_can_fire(ptimer))
+ if (!kvm_timer_irq_can_fire(vtimer->cnt_ctl) &&
+ !kvm_timer_irq_can_fire(ptimer->cnt_ctl))
return;
/*
Thanks,
-Christoffer
^ permalink raw reply related
* [PATCH v4 3/4] cpufreq: Add DVFS support for Armada 37xx
From: Viresh Kumar @ 2017-12-14 15:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171214150006.25438-4-gregory.clement@free-electrons.com>
On 14-12-17, 16:00, Gregory CLEMENT wrote:
> This patch adds DVFS support for the Armada 37xx SoCs
>
> There are up to four CPU frequency loads for Armada 37xx controlled by
> the hardware.
>
> This driver associates the CPU load level to a frequency, then the
> hardware will switch while selecting a load level.
>
> The hardware also can associate a voltage for each level (AVS support)
> but it is not yet supported
>
> Tested-by: Andre Heider <a.heider@gmail.com>
> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> drivers/cpufreq/Kconfig.arm | 7 +
> drivers/cpufreq/Makefile | 1 +
> drivers/cpufreq/armada-37xx-cpufreq.c | 241 ++++++++++++++++++++++++++++++++++
> 3 files changed, 249 insertions(+)
> create mode 100644 drivers/cpufreq/armada-37xx-cpufreq.c
Thanks for taking care of very minor review comments I had. All the
patches look good now to me :)
--
viresh
^ permalink raw reply
* [PATCH V5 13/13] boot_constraint: Add documentation
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
This adds boot constraint documentation.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
.../driver-api/boot-constraint/constraints.rst | 98 ++++++++++++++++++++++
Documentation/driver-api/boot-constraint/index.rst | 4 +
Documentation/driver-api/index.rst | 1 +
3 files changed, 103 insertions(+)
create mode 100644 Documentation/driver-api/boot-constraint/constraints.rst
create mode 100644 Documentation/driver-api/boot-constraint/index.rst
diff --git a/Documentation/driver-api/boot-constraint/constraints.rst b/Documentation/driver-api/boot-constraint/constraints.rst
new file mode 100644
index 000000000000..036bb77a26f9
--- /dev/null
+++ b/Documentation/driver-api/boot-constraint/constraints.rst
@@ -0,0 +1,98 @@
+.. include:: <isonum.txt>
+
+=========================
+Boot Constraint Subsystem
+=========================
+
+:Copyright: |copy| 2017 Viresh Kumar <vireshk@kernel.org>, Linaro Ltd.
+
+Introduction
+============
+
+A lot of devices are configured and powered ON by the bootloader before passing
+on control to the operating system, Linux in our case. It is important for some
+of them to keep working until the time a Linux device driver probes the device
+and reconfigure it.
+
+A typical example of that can be the LCD controller, which is used by the
+bootloaders to show image(s) while the platform boots Linux. The LCD controller
+can be using resources like clk, regulators, etc, that are shared with other
+devices. These shared resources should be configured in such a way that they
+satisfy need of all the user devices. If another device's (X) driver gets
+probed before the LCD controller driver, then it may end up disabling or
+reconfiguring these resources to ranges satisfying only the current user (device
+X) and that may make the LCD screen unstable and present a bad user experience.
+
+Another case can be a debug serial port (earlycon) enabled from the bootloader,
+which may be used to debug early kernel oops.
+
+There are also cases where the resources may not be shared, but the kernel will
+disable them forcefully as no users may have appeared until a certain point in
+the kernel boot.
+
+Of course we can have more complex cases where the same resource is getting used
+by multiple devices while the kernel boots and the order in which the devices
+get probed wouldn't matter as the other devices may break because of the chosen
+configuration of the first probed device.
+
+Adding boot constraints
+=======================
+
+A boot constraint defines a configuration requirement set for the device by the
+boot loader. For example, if a clock is enabled for a device by the bootloader
+and we want the device to be working as is until the time the device is probed
+by its driver, then keeping this clock enabled is one of the boot constraint.
+
+Following are the different type of boot constraints supported currently by the
+core:
+
+.. kernel-doc:: include/linux/boot_constraint.h
+ :functions: dev_boot_constraint_type
+
+
+A single boot constraint can be added using the following helper:
+
+.. kernel-doc:: drivers/boot_constraint/core.c
+ :functions: dev_boot_constraint_add
+
+
+The second parameter to this routine describes the constraint to add and is
+represented by following structures:
+
+.. kernel-doc:: include/linux/boot_constraint.h
+ :functions: dev_boot_constraint dev_boot_constraint_info
+
+The power domain boot constraint doesn't need any data, while the clock and
+power supply boot constraint specific data is represented by following
+structures:
+
+.. kernel-doc:: include/linux/boot_constraint.h
+ :functions: dev_boot_constraint_supply_info dev_boot_constraint_clk_info
+
+
+In order to simplify adding multiple boot constraints for a platform, the boot
+constraints core supplies another helper which can be used to add all
+constraints for the platform.
+
+.. kernel-doc:: drivers/boot_constraint/deferrable_dev.c
+ :functions: dev_boot_constraint_add_deferrable_of
+
+
+The argument of this routine is described by following structure:
+
+.. kernel-doc:: include/linux/boot_constraint.h
+ :functions: dev_boot_constraint_of
+
+
+Removing boot constraints
+=========================
+
+Once the boot constraints are added, they will be honored by the boot constraint
+core until the time a driver tries to probe the device. The constraints are
+removed by the driver core if either the driver successfully probed the device
+or failed with an error value other than -EPROBE_DEFER. The constraints are kept
+as is for deferred probe. The driver core removes the constraints using the
+following helper, which must not be called directly by the platforms:
+
+.. kernel-doc:: drivers/boot_constraint/core.c
+ :functions: dev_boot_constraints_remove
diff --git a/Documentation/driver-api/boot-constraint/index.rst b/Documentation/driver-api/boot-constraint/index.rst
new file mode 100644
index 000000000000..d6fce17626a2
--- /dev/null
+++ b/Documentation/driver-api/boot-constraint/index.rst
@@ -0,0 +1,4 @@
+.. toctree::
+ :maxdepth: 1
+
+ constraints
diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst
index d17a9876b473..e591c172b5b5 100644
--- a/Documentation/driver-api/index.rst
+++ b/Documentation/driver-api/index.rst
@@ -47,6 +47,7 @@ available subsections can be seen below.
gpio
misc_devices
dmaengine/index
+ boot-constraint/index
.. only:: subproject and html
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
* [PATCH V5 12/13] boot_constraint: Update MAINTAINERS
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
Add entry for boot constraint subsystem in MAINTAINERS.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
MAINTAINERS | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e716cdafa784..81823de0d655 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2723,6 +2723,15 @@ S: Supported
F: drivers/net/bonding/
F: include/uapi/linux/if_bonding.h
+BOOT CONSTRAINT SUBSYSTEM
+M: Viresh Kumar <vireshk@kernel.org>
+L: linux-kernel at vger.kernel.org
+S: Maintained
+T: git git://git.linaro.org/people/vireshk/linux.git
+F: Documentation/driver-api/boot_constraint/
+F: drivers/boot_constraint/
+F: include/linux/boot_constraint.h
+
BPF (Safe dynamic programs and tools)
M: Alexei Starovoitov <ast@kernel.org>
M: Daniel Borkmann <daniel@iogearbox.net>
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
* [PATCH V5 11/13] boot_constraint: Add Qualcomm display controller constraints
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
From: Rajendra Nayak <rnayak@codeaurora.org>
This sets boot constraints for the display controller used on Qualcomm
dragonboard 410c.
The display controlled is enabled by the bootloader to show a flash
screen during kernel boot. The handover to kernel should be without any
glitches on the screen.The resources of the display controller (like
regulators) are shared with other peripherals, which may reconfigure
those resources before the display driver comes up. The same problem can
happen if the display driver probes first, as the constraints of the
other devices (sharing same resources with display controller) may not
be honored anymore by the kernel.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
arch/arm64/Kconfig.platforms | 1 +
drivers/boot_constraint/Makefile | 1 +
drivers/boot_constraint/qcom.c | 122 +++++++++++++++++++++++++++++++++++++++
3 files changed, 124 insertions(+)
create mode 100644 drivers/boot_constraint/qcom.c
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index a586ed728393..b514327290ca 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -136,6 +136,7 @@ config ARCH_QCOM
bool "Qualcomm Platforms"
select GPIOLIB
select PINCTRL
+ select DEV_BOOT_CONSTRAINT
help
This enables support for the ARMv8 based Qualcomm chipsets.
diff --git a/drivers/boot_constraint/Makefile b/drivers/boot_constraint/Makefile
index f3e123b5d854..7b6b5966c908 100644
--- a/drivers/boot_constraint/Makefile
+++ b/drivers/boot_constraint/Makefile
@@ -4,3 +4,4 @@ obj-y := clk.o deferrable_dev.o core.o pm.o supply.o
obj-$(CONFIG_ARCH_HISI) += hikey.o
obj-$(CONFIG_ARCH_MXC) += imx.o
+obj-$(CONFIG_ARCH_QCOM) += qcom.o
diff --git a/drivers/boot_constraint/qcom.c b/drivers/boot_constraint/qcom.c
new file mode 100644
index 000000000000..0498f464da05
--- /dev/null
+++ b/drivers/boot_constraint/qcom.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * This sets up Dragonboard 410c constraints on behalf of the bootloader, which
+ * uses display controller to display a flash screen during system boot.
+ *
+ * Copyright (C) 2017 Linaro.
+ * Viresh Kumar <viresh.kumar@linaro.org>
+ * Rajendra Nayak <rnayak@codeaurora.org>
+ */
+
+#include <linux/boot_constraint.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+
+static struct dev_boot_constraint_clk_info iface_clk_info = {
+ .name = "iface_clk",
+};
+
+static struct dev_boot_constraint_clk_info bus_clk_info = {
+ .name = "bus_clk",
+};
+
+static struct dev_boot_constraint_clk_info core_clk_info = {
+ .name = "core_clk",
+};
+
+static struct dev_boot_constraint_clk_info vsync_clk_info = {
+ .name = "vsync_clk",
+};
+
+static struct dev_boot_constraint_clk_info esc0_clk_info = {
+ .name = "core_clk",
+};
+
+static struct dev_boot_constraint_clk_info byte_clk_info = {
+ .name = "byte_clk",
+};
+
+static struct dev_boot_constraint_clk_info pixel_clk_info = {
+ .name = "pixel_clk",
+};
+
+static struct dev_boot_constraint_supply_info vdda_info = {
+ .name = "vdda"
+};
+
+static struct dev_boot_constraint_supply_info vddio_info = {
+ .name = "vddio"
+};
+
+static struct dev_boot_constraint constraints_mdss[] = {
+ {
+ .type = DEV_BOOT_CONSTRAINT_PM,
+ .data = NULL,
+ },
+};
+
+static struct dev_boot_constraint constraints_mdp[] = {
+ {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &iface_clk_info,
+ }, {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &bus_clk_info,
+ }, {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &core_clk_info,
+ }, {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &vsync_clk_info,
+ },
+};
+
+static struct dev_boot_constraint constraints_dsi[] = {
+ {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &esc0_clk_info,
+ }, {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &byte_clk_info,
+ }, {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &pixel_clk_info,
+ }, {
+ .type = DEV_BOOT_CONSTRAINT_SUPPLY,
+ .data = &vdda_info,
+
+ }, {
+ .type = DEV_BOOT_CONSTRAINT_SUPPLY,
+ .data = &vddio_info,
+ },
+};
+
+static struct dev_boot_constraint_of constraints[] = {
+ {
+ .compat = "qcom,mdss",
+ .constraints = constraints_mdss,
+ .count = ARRAY_SIZE(constraints_mdss),
+ }, {
+ .compat = "qcom,mdp5",
+ .constraints = constraints_mdp,
+ .count = ARRAY_SIZE(constraints_mdp),
+ }, {
+ .compat = "qcom,mdss-dsi-ctrl",
+ .constraints = constraints_dsi,
+ .count = ARRAY_SIZE(constraints_dsi),
+ },
+};
+
+static int __init qcom_constraints_init(void)
+{
+ /* Only Dragonboard 410c is supported for now */
+ if (!of_machine_is_compatible("qcom,apq8016-sbc"))
+ return 0;
+
+ dev_boot_constraint_add_deferrable_of(constraints,
+ ARRAY_SIZE(constraints));
+
+ return 0;
+}
+subsys_initcall(qcom_constraints_init);
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
* [PATCH V5 10/13] boot_constraint: Add support for IMX platform
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
This adds boot constraint support for IMX platforms. Currently only one
use case is supported: earlycon. Some of the UARTs are enabled by the
bootloader and are used for early console in the kernel. The boot
constraint core handles them properly and removes them once the serial
device is probed by its driver.
This gets rid of lots of hacky code in the clock drivers.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
arch/arm/mach-imx/Kconfig | 1 +
drivers/boot_constraint/Makefile | 1 +
drivers/boot_constraint/imx.c | 126 ++++++++++++++++++++++++++++++++++++++
drivers/clk/imx/clk-imx25.c | 12 ----
drivers/clk/imx/clk-imx27.c | 13 ----
drivers/clk/imx/clk-imx31.c | 12 ----
drivers/clk/imx/clk-imx35.c | 10 ---
drivers/clk/imx/clk-imx51-imx53.c | 16 -----
drivers/clk/imx/clk-imx6q.c | 8 ---
drivers/clk/imx/clk-imx6sl.c | 8 ---
drivers/clk/imx/clk-imx6sx.c | 8 ---
drivers/clk/imx/clk-imx7d.c | 14 -----
drivers/clk/imx/clk.c | 38 ------------
drivers/clk/imx/clk.h | 1 -
14 files changed, 128 insertions(+), 140 deletions(-)
create mode 100644 drivers/boot_constraint/imx.c
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 782699e67600..f4d505fed092 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -4,6 +4,7 @@ menuconfig ARCH_MXC
select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_IMX_GPT
select GENERIC_IRQ_CHIP
+ select DEV_BOOT_CONSTRAINT
select GPIOLIB
select PINCTRL
select PM_OPP if PM
diff --git a/drivers/boot_constraint/Makefile b/drivers/boot_constraint/Makefile
index 5609280162c4..f3e123b5d854 100644
--- a/drivers/boot_constraint/Makefile
+++ b/drivers/boot_constraint/Makefile
@@ -3,3 +3,4 @@
obj-y := clk.o deferrable_dev.o core.o pm.o supply.o
obj-$(CONFIG_ARCH_HISI) += hikey.o
+obj-$(CONFIG_ARCH_MXC) += imx.o
diff --git a/drivers/boot_constraint/imx.c b/drivers/boot_constraint/imx.c
new file mode 100644
index 000000000000..a4f3af33ba86
--- /dev/null
+++ b/drivers/boot_constraint/imx.c
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * This takes care of IMX boot time device constraints, normally set by the
+ * Bootloader.
+ *
+ * Copyright (C) 2017 Linaro.
+ * Viresh Kumar <viresh.kumar@linaro.org>
+ */
+
+#include <linux/boot_constraint.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+
+static bool earlycon_boot_constraints_enabled __initdata;
+
+static int __init enable_earlycon_boot_constraints(char *str)
+{
+ earlycon_boot_constraints_enabled = true;
+
+ return 0;
+}
+
+__setup_param("earlycon", boot_constraint_earlycon,
+ enable_earlycon_boot_constraints, 0);
+__setup_param("earlyprintk", boot_constraint_earlyprintk,
+ enable_earlycon_boot_constraints, 0);
+
+
+struct imx_machine_constraints {
+ struct dev_boot_constraint_of *dev_constraints;
+ unsigned int count;
+};
+
+static struct dev_boot_constraint_clk_info uart_ipg_clk_info = {
+ .name = "ipg",
+};
+
+static struct dev_boot_constraint_clk_info uart_per_clk_info = {
+ .name = "per",
+};
+
+static struct dev_boot_constraint imx_uart_constraints[] = {
+ {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &uart_ipg_clk_info,
+ }, {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &uart_per_clk_info,
+ },
+};
+
+static struct dev_boot_constraint_of imx_dev_constraints[] = {
+ {
+ .compat = "fsl,imx21-uart",
+ .constraints = imx_uart_constraints,
+ .count = ARRAY_SIZE(imx_uart_constraints),
+ },
+};
+
+static struct imx_machine_constraints imx_constraints = {
+ .dev_constraints = imx_dev_constraints,
+ .count = ARRAY_SIZE(imx_dev_constraints),
+};
+
+/* imx7 */
+static struct dev_boot_constraint_of imx7_dev_constraints[] = {
+ {
+ .compat = "fsl,imx6q-uart",
+ .constraints = imx_uart_constraints,
+ .count = ARRAY_SIZE(imx_uart_constraints),
+ },
+};
+
+static struct imx_machine_constraints imx7_constraints = {
+ .dev_constraints = imx7_dev_constraints,
+ .count = ARRAY_SIZE(imx7_dev_constraints),
+};
+
+static const struct of_device_id machines[] __initconst = {
+ { .compatible = "fsl,imx25", .data = &imx_constraints },
+ { .compatible = "fsl,imx27", .data = &imx_constraints },
+ { .compatible = "fsl,imx31", .data = &imx_constraints },
+ { .compatible = "fsl,imx35", .data = &imx_constraints },
+ { .compatible = "fsl,imx50", .data = &imx_constraints },
+ { .compatible = "fsl,imx51", .data = &imx_constraints },
+ { .compatible = "fsl,imx53", .data = &imx_constraints },
+ { .compatible = "fsl,imx6dl", .data = &imx_constraints },
+ { .compatible = "fsl,imx6q", .data = &imx_constraints },
+ { .compatible = "fsl,imx6qp", .data = &imx_constraints },
+ { .compatible = "fsl,imx6sl", .data = &imx_constraints },
+ { .compatible = "fsl,imx6sx", .data = &imx_constraints },
+ { .compatible = "fsl,imx6ul", .data = &imx_constraints },
+ { .compatible = "fsl,imx6ull", .data = &imx_constraints },
+ { .compatible = "fsl,imx7d", .data = &imx7_constraints },
+ { .compatible = "fsl,imx7s", .data = &imx7_constraints },
+ { }
+};
+
+static int __init imx_constraints_init(void)
+{
+ const struct imx_machine_constraints *constraints;
+ const struct of_device_id *match;
+ struct device_node *np;
+
+ if (!earlycon_boot_constraints_enabled)
+ return 0;
+
+ np = of_find_node_by_path("/");
+ if (!np)
+ return -ENODEV;
+
+ match = of_match_node(machines, np);
+ of_node_put(np);
+
+ if (!match)
+ return 0;
+
+ constraints = match->data;
+
+ dev_boot_constraint_add_deferrable_of(constraints->dev_constraints,
+ constraints->count);
+
+ return 0;
+}
+subsys_initcall(imx_constraints_init);
diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
index 23686f756b5e..4df652cd912c 100644
--- a/drivers/clk/imx/clk-imx25.c
+++ b/drivers/clk/imx/clk-imx25.c
@@ -86,16 +86,6 @@ enum mx25_clks {
static struct clk *clk[clk_max];
-static struct clk ** const uart_clks[] __initconst = {
- &clk[uart_ipg_per],
- &clk[uart1_ipg],
- &clk[uart2_ipg],
- &clk[uart3_ipg],
- &clk[uart4_ipg],
- &clk[uart5_ipg],
- NULL
-};
-
static int __init __mx25_clocks_init(void __iomem *ccm_base)
{
BUG_ON(!ccm_base);
@@ -241,8 +231,6 @@ static int __init __mx25_clocks_init(void __iomem *ccm_base)
*/
clk_set_parent(clk[cko_sel], clk[ipg]);
- imx_register_uart_clocks(uart_clks);
-
return 0;
}
diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c
index 0a0ab95d16fe..379709d21b04 100644
--- a/drivers/clk/imx/clk-imx27.c
+++ b/drivers/clk/imx/clk-imx27.c
@@ -48,17 +48,6 @@ static const char *ssi_sel_clks[] = { "spll_gate", "mpll", };
static struct clk *clk[IMX27_CLK_MAX];
static struct clk_onecell_data clk_data;
-static struct clk ** const uart_clks[] __initconst = {
- &clk[IMX27_CLK_PER1_GATE],
- &clk[IMX27_CLK_UART1_IPG_GATE],
- &clk[IMX27_CLK_UART2_IPG_GATE],
- &clk[IMX27_CLK_UART3_IPG_GATE],
- &clk[IMX27_CLK_UART4_IPG_GATE],
- &clk[IMX27_CLK_UART5_IPG_GATE],
- &clk[IMX27_CLK_UART6_IPG_GATE],
- NULL
-};
-
static void __init _mx27_clocks_init(unsigned long fref)
{
BUG_ON(!ccm);
@@ -175,8 +164,6 @@ static void __init _mx27_clocks_init(unsigned long fref)
clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
- imx_register_uart_clocks(uart_clks);
-
imx_print_silicon_rev("i.MX27", mx27_revision());
}
diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c
index cbce308aad04..d0a720b61aca 100644
--- a/drivers/clk/imx/clk-imx31.c
+++ b/drivers/clk/imx/clk-imx31.c
@@ -63,16 +63,6 @@ enum mx31_clks {
static struct clk *clk[clk_max];
static struct clk_onecell_data clk_data;
-static struct clk ** const uart_clks[] __initconst = {
- &clk[ipg],
- &clk[uart1_gate],
- &clk[uart2_gate],
- &clk[uart3_gate],
- &clk[uart4_gate],
- &clk[uart5_gate],
- NULL
-};
-
static void __init _mx31_clocks_init(void __iomem *base, unsigned long fref)
{
clk[dummy] = imx_clk_fixed("dummy", 0);
@@ -208,8 +198,6 @@ int __init mx31_clocks_init(unsigned long fref)
clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma");
clk_register_clkdev(clk[iim_gate], "iim", NULL);
-
- imx_register_uart_clocks(uart_clks);
mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT, GPT_TYPE_IMX31);
return 0;
diff --git a/drivers/clk/imx/clk-imx35.c b/drivers/clk/imx/clk-imx35.c
index 203cad6c9aab..081aacd2335b 100644
--- a/drivers/clk/imx/clk-imx35.c
+++ b/drivers/clk/imx/clk-imx35.c
@@ -86,14 +86,6 @@ enum mx35_clks {
static struct clk *clk[clk_max];
-static struct clk ** const uart_clks[] __initconst = {
- &clk[ipg],
- &clk[uart1_gate],
- &clk[uart2_gate],
- &clk[uart3_gate],
- NULL
-};
-
static void __init _mx35_clocks_init(void)
{
void __iomem *base;
@@ -247,8 +239,6 @@ static void __init _mx35_clocks_init(void)
*/
clk_prepare_enable(clk[scc_gate]);
- imx_register_uart_clocks(uart_clks);
-
imx_print_silicon_rev("i.MX35", mx35_revision());
}
diff --git a/drivers/clk/imx/clk-imx51-imx53.c b/drivers/clk/imx/clk-imx51-imx53.c
index 7bcaf270db11..2da06f8ffae1 100644
--- a/drivers/clk/imx/clk-imx51-imx53.c
+++ b/drivers/clk/imx/clk-imx51-imx53.c
@@ -131,20 +131,6 @@ static const char *ieee1588_sels[] = { "pll3_sw", "pll4_sw", "dummy" /* usbphy2_
static struct clk *clk[IMX5_CLK_END];
static struct clk_onecell_data clk_data;
-static struct clk ** const uart_clks[] __initconst = {
- &clk[IMX5_CLK_UART1_IPG_GATE],
- &clk[IMX5_CLK_UART1_PER_GATE],
- &clk[IMX5_CLK_UART2_IPG_GATE],
- &clk[IMX5_CLK_UART2_PER_GATE],
- &clk[IMX5_CLK_UART3_IPG_GATE],
- &clk[IMX5_CLK_UART3_PER_GATE],
- &clk[IMX5_CLK_UART4_IPG_GATE],
- &clk[IMX5_CLK_UART4_PER_GATE],
- &clk[IMX5_CLK_UART5_IPG_GATE],
- &clk[IMX5_CLK_UART5_PER_GATE],
- NULL
-};
-
static void __init mx5_clocks_common_init(void __iomem *ccm_base)
{
clk[IMX5_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
@@ -325,8 +311,6 @@ static void __init mx5_clocks_common_init(void __iomem *ccm_base)
clk_prepare_enable(clk[IMX5_CLK_TMAX1]);
clk_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */
clk_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */
-
- imx_register_uart_clocks(uart_clks);
}
static void __init mx50_clocks_init(struct device_node *np)
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 8d518ad5dc13..255f571c0b0d 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -150,12 +150,6 @@ static inline int clk_on_imx6dl(void)
return of_machine_is_compatible("fsl,imx6dl");
}
-static struct clk ** const uart_clks[] __initconst = {
- &clk[IMX6QDL_CLK_UART_IPG],
- &clk[IMX6QDL_CLK_UART_SERIAL],
- NULL
-};
-
static int ldb_di_sel_by_clock_id(int clock_id)
{
switch (clock_id) {
@@ -918,7 +912,5 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
clk_set_parent(clk[IMX6QDL_CLK_GPU2D_CORE_SEL],
clk[IMX6QDL_CLK_PLL3_USB_OTG]);
}
-
- imx_register_uart_clocks(uart_clks);
}
CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c
index 9642cdf0fb88..97ab67783609 100644
--- a/drivers/clk/imx/clk-imx6sl.c
+++ b/drivers/clk/imx/clk-imx6sl.c
@@ -185,12 +185,6 @@ void imx6sl_set_wait_clk(bool enter)
imx6sl_enable_pll_arm(false);
}
-static struct clk ** const uart_clks[] __initconst = {
- &clks[IMX6SL_CLK_UART],
- &clks[IMX6SL_CLK_UART_SERIAL],
- NULL
-};
-
static void __init imx6sl_clocks_init(struct device_node *ccm_node)
{
struct device_node *np;
@@ -447,7 +441,5 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL],
clks[IMX6SL_CLK_PLL2_PFD2]);
-
- imx_register_uart_clocks(uart_clks);
}
CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index e6d389e333d7..e38dfb855ae8 100644
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -137,12 +137,6 @@ static u32 share_count_ssi3;
static u32 share_count_sai1;
static u32 share_count_sai2;
-static struct clk ** const uart_clks[] __initconst = {
- &clks[IMX6SX_CLK_UART_IPG],
- &clks[IMX6SX_CLK_UART_SERIAL],
- NULL
-};
-
static void __init imx6sx_clocks_init(struct device_node *ccm_node)
{
struct device_node *np;
@@ -566,7 +560,5 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
-
- imx_register_uart_clocks(uart_clks);
}
CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init);
diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
index 80dc211eb74b..91e5bda48df2 100644
--- a/drivers/clk/imx/clk-imx7d.c
+++ b/drivers/clk/imx/clk-imx7d.c
@@ -387,17 +387,6 @@ static int const clks_init_on[] __initconst = {
static struct clk_onecell_data clk_data;
-static struct clk ** const uart_clks[] __initconst = {
- &clks[IMX7D_UART1_ROOT_CLK],
- &clks[IMX7D_UART2_ROOT_CLK],
- &clks[IMX7D_UART3_ROOT_CLK],
- &clks[IMX7D_UART4_ROOT_CLK],
- &clks[IMX7D_UART5_ROOT_CLK],
- &clks[IMX7D_UART6_ROOT_CLK],
- &clks[IMX7D_UART7_ROOT_CLK],
- NULL
-};
-
static void __init imx7d_clocks_init(struct device_node *ccm_node)
{
struct device_node *np;
@@ -884,8 +873,5 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
/* set uart module clock's parent clock source that must be great then 80MHz */
clk_set_parent(clks[IMX7D_UART1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]);
-
- imx_register_uart_clocks(uart_clks);
-
}
CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init);
diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
index 9074e6974b6d..d8a64367a061 100644
--- a/drivers/clk/imx/clk.c
+++ b/drivers/clk/imx/clk.c
@@ -74,41 +74,3 @@ void imx_cscmr1_fixup(u32 *val)
*val ^= CSCMR1_FIXUP;
return;
}
-
-static int imx_keep_uart_clocks __initdata;
-static struct clk ** const *imx_uart_clocks __initdata;
-
-static int __init imx_keep_uart_clocks_param(char *str)
-{
- imx_keep_uart_clocks = 1;
-
- return 0;
-}
-__setup_param("earlycon", imx_keep_uart_earlycon,
- imx_keep_uart_clocks_param, 0);
-__setup_param("earlyprintk", imx_keep_uart_earlyprintk,
- imx_keep_uart_clocks_param, 0);
-
-void __init imx_register_uart_clocks(struct clk ** const clks[])
-{
- if (imx_keep_uart_clocks) {
- int i;
-
- imx_uart_clocks = clks;
- for (i = 0; imx_uart_clocks[i]; i++)
- clk_prepare_enable(*imx_uart_clocks[i]);
- }
-}
-
-static int __init imx_clk_disable_uart(void)
-{
- if (imx_keep_uart_clocks && imx_uart_clocks) {
- int i;
-
- for (i = 0; imx_uart_clocks[i]; i++)
- clk_disable_unprepare(*imx_uart_clocks[i]);
- }
-
- return 0;
-}
-late_initcall_sync(imx_clk_disable_uart);
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index d69c4bbf3597..c5edde073cea 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -8,7 +8,6 @@
extern spinlock_t imx_ccm_lock;
void imx_check_clocks(struct clk *clks[], unsigned int count);
-void imx_register_uart_clocks(struct clk ** const clks[]);
extern void imx_cscmr1_fixup(u32 *val);
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
* [PATCH V5 09/13] boot_constraint: Add support for Hisilicon platforms
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
This adds boot constraint support for Hisilicon platforms. Currently
only one use case is supported: earlycon. One of the UART is enabled by
the bootloader and is used for early console in the kernel. The boot
constraint core handles it properly and removes constraints once the
serial device is probed by its driver.
This is tested on hi6220-hikey 96board.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
arch/arm64/Kconfig.platforms | 1 +
drivers/boot_constraint/Makefile | 2 +
drivers/boot_constraint/hikey.c | 158 +++++++++++++++++++++++++++++++++++++++
3 files changed, 161 insertions(+)
create mode 100644 drivers/boot_constraint/hikey.c
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 2401373565ff..a586ed728393 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -87,6 +87,7 @@ config ARCH_HISI
select ARM_TIMER_SP804
select HISILICON_IRQ_MBIGEN if PCI
select PINCTRL
+ select DEV_BOOT_CONSTRAINT
help
This enables support for Hisilicon ARMv8 SoC family
diff --git a/drivers/boot_constraint/Makefile b/drivers/boot_constraint/Makefile
index a765094623a3..5609280162c4 100644
--- a/drivers/boot_constraint/Makefile
+++ b/drivers/boot_constraint/Makefile
@@ -1,3 +1,5 @@
# Makefile for device boot constraints
obj-y := clk.o deferrable_dev.o core.o pm.o supply.o
+
+obj-$(CONFIG_ARCH_HISI) += hikey.o
diff --git a/drivers/boot_constraint/hikey.c b/drivers/boot_constraint/hikey.c
new file mode 100644
index 000000000000..25acb4070569
--- /dev/null
+++ b/drivers/boot_constraint/hikey.c
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * This takes care of Hisilicon boot time device constraints, normally set by
+ * the Bootloader.
+ *
+ * Copyright (C) 2017 Linaro.
+ * Viresh Kumar <viresh.kumar@linaro.org>
+ */
+
+#include <linux/boot_constraint.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+
+static bool earlycon_boot_constraints_enabled __initdata;
+
+static int __init enable_earlycon_boot_constraints(char *str)
+{
+ earlycon_boot_constraints_enabled = true;
+
+ return 0;
+}
+
+__setup_param("earlycon", boot_constraint_earlycon,
+ enable_earlycon_boot_constraints, 0);
+__setup_param("earlyprintk", boot_constraint_earlyprintk,
+ enable_earlycon_boot_constraints, 0);
+
+
+struct hikey_machine_constraints {
+ struct dev_boot_constraint_of *dev_constraints;
+ unsigned int count;
+};
+
+static struct dev_boot_constraint_clk_info uart_iclk_info = {
+ .name = "uartclk",
+};
+
+static struct dev_boot_constraint_clk_info uart_pclk_info = {
+ .name = "apb_pclk",
+};
+
+static struct dev_boot_constraint hikey3660_uart_constraints[] = {
+ {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &uart_iclk_info,
+ }, {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &uart_pclk_info,
+ },
+};
+
+static const char * const uarts_hikey3660[] = {
+ "serial at fff32000", /* UART 6 */
+};
+
+static struct dev_boot_constraint_of hikey3660_dev_constraints[] = {
+ {
+ .compat = "arm,pl011",
+ .constraints = hikey3660_uart_constraints,
+ .count = ARRAY_SIZE(hikey3660_uart_constraints),
+
+ .dev_names = uarts_hikey3660,
+ .dev_names_count = ARRAY_SIZE(uarts_hikey3660),
+ },
+};
+
+static struct hikey_machine_constraints hikey3660_constraints = {
+ .dev_constraints = hikey3660_dev_constraints,
+ .count = ARRAY_SIZE(hikey3660_dev_constraints),
+};
+
+static const char * const uarts_hikey6220[] = {
+ "uart at f7113000", /* UART 3 */
+};
+
+static struct dev_boot_constraint_of hikey6220_dev_constraints[] = {
+ {
+ .compat = "arm,pl011",
+ .constraints = hikey3660_uart_constraints,
+ .count = ARRAY_SIZE(hikey3660_uart_constraints),
+
+ .dev_names = uarts_hikey6220,
+ .dev_names_count = ARRAY_SIZE(uarts_hikey6220),
+ },
+};
+
+static struct hikey_machine_constraints hikey6220_constraints = {
+ .dev_constraints = hikey6220_dev_constraints,
+ .count = ARRAY_SIZE(hikey6220_dev_constraints),
+};
+
+static struct dev_boot_constraint hikey3798cv200_uart_constraints[] = {
+ {
+ .type = DEV_BOOT_CONSTRAINT_CLK,
+ .data = &uart_pclk_info,
+ },
+};
+
+static const char * const uarts_hikey3798cv200[] = {
+ "serial at 8b00000", /* UART 0 */
+};
+
+static struct dev_boot_constraint_of hikey3798cv200_dev_constraints[] = {
+ {
+ .compat = "arm,pl011",
+ .constraints = hikey3798cv200_uart_constraints,
+ .count = ARRAY_SIZE(hikey3798cv200_uart_constraints),
+
+ .dev_names = uarts_hikey3798cv200,
+ .dev_names_count = ARRAY_SIZE(uarts_hikey3798cv200),
+ },
+};
+
+static struct hikey_machine_constraints hikey3798cv200_constraints = {
+ .dev_constraints = hikey3798cv200_dev_constraints,
+ .count = ARRAY_SIZE(hikey3798cv200_dev_constraints),
+};
+
+static const struct of_device_id machines[] __initconst = {
+ { .compatible = "hisilicon,hi3660", .data = &hikey3660_constraints },
+ { .compatible = "hisilicon,hi3798cv200", .data = &hikey3798cv200_constraints },
+ { .compatible = "hisilicon,hi6220", .data = &hikey6220_constraints },
+ { }
+};
+
+static int __init hikey_constraints_init(void)
+{
+ const struct hikey_machine_constraints *constraints;
+ const struct of_device_id *match;
+ struct device_node *np;
+
+ if (!earlycon_boot_constraints_enabled)
+ return 0;
+
+ np = of_find_node_by_path("/");
+ if (!np)
+ return -ENODEV;
+
+ match = of_match_node(machines, np);
+ of_node_put(np);
+
+ if (!match)
+ return 0;
+
+ constraints = match->data;
+
+ dev_boot_constraint_add_deferrable_of(constraints->dev_constraints,
+ constraints->count);
+
+ return 0;
+}
+
+/*
+ * The amba-pl011 driver registers itself from arch_initcall level. Setup the
+ * serial boot constraints before that in order not to miss any boot messages.
+ */
+postcore_initcall_sync(hikey_constraints_init);
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
* [PATCH V5 08/13] boot_constraint: Manage deferrable constraints
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
It is possible that some of the resources aren't available at the time
constraints are getting set and the boot constraints core will return
-EPROBE_DEFER for them. In order to retry adding the constraints at a
later point of time (after the resource is added and before any of its
users come up), this patch proposes two things:
- Each constraint is represented by a virtual platform device, so that
it is re-probed again until the time all the dependencies aren't met.
The platform device is removed along with the constraint, with help of
the free_resources() callback.
- Enable early defer probing support by calling
driver_enable_deferred_probe(), so that the core retries probing
deferred devices every time any device is bound to a driver. This
makes sure that the constraint is set before any of the users of the
resources come up.
This is tested on ARM64 Hikey board where probe was deferred for a
device.
Tested-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/base/dd.c | 12 ++
drivers/boot_constraint/Makefile | 2 +-
drivers/boot_constraint/deferrable_dev.c | 241 +++++++++++++++++++++++++++++++
include/linux/boot_constraint.h | 27 ++++
4 files changed, 281 insertions(+), 1 deletion(-)
create mode 100644 drivers/boot_constraint/deferrable_dev.c
diff --git a/drivers/base/dd.c b/drivers/base/dd.c
index dc89f98a2487..48a9945ff206 100644
--- a/drivers/base/dd.c
+++ b/drivers/base/dd.c
@@ -227,6 +227,18 @@ void device_unblock_probing(void)
driver_deferred_probe_trigger();
}
+/**
+ * driver_enable_deferred_probe() - Enable probing of deferred devices
+ *
+ * We don't want to get in the way when the bulk of drivers are getting probed
+ * and so deferred probe is disabled in the beginning. Enable it now because we
+ * need it.
+ */
+void driver_enable_deferred_probe(void)
+{
+ driver_deferred_probe_enable = true;
+}
+
/**
* deferred_probe_initcall() - Enable probing of deferred devices
*
diff --git a/drivers/boot_constraint/Makefile b/drivers/boot_constraint/Makefile
index b7ade1a7afb5..a765094623a3 100644
--- a/drivers/boot_constraint/Makefile
+++ b/drivers/boot_constraint/Makefile
@@ -1,3 +1,3 @@
# Makefile for device boot constraints
-obj-y := clk.o core.o pm.o supply.o
+obj-y := clk.o deferrable_dev.o core.o pm.o supply.o
diff --git a/drivers/boot_constraint/deferrable_dev.c b/drivers/boot_constraint/deferrable_dev.c
new file mode 100644
index 000000000000..158c04d41e09
--- /dev/null
+++ b/drivers/boot_constraint/deferrable_dev.c
@@ -0,0 +1,241 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 Linaro.
+ * Viresh Kumar <viresh.kumar@linaro.org>
+ */
+
+#include <linux/err.h>
+#include <linux/idr.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "core.h"
+
+static DEFINE_IDA(pdev_index);
+
+void driver_enable_deferred_probe(void);
+
+struct boot_constraint_pdata {
+ struct device *dev;
+ struct dev_boot_constraint constraint;
+ int probe_failed;
+ int index;
+};
+
+static void boot_constraint_remove(void *data)
+{
+ struct platform_device *pdev = data;
+ struct boot_constraint_pdata *pdata = dev_get_platdata(&pdev->dev);
+
+ ida_simple_remove(&pdev_index, pdata->index);
+ kfree(pdata->constraint.data);
+ platform_device_unregister(pdev);
+}
+
+/*
+ * A platform device is added for each and every constraint, to handle
+ * -EPROBE_DEFER properly.
+ */
+static int boot_constraint_probe(struct platform_device *pdev)
+{
+ struct boot_constraint_pdata *pdata = dev_get_platdata(&pdev->dev);
+ struct dev_boot_constraint_info info;
+ int ret;
+
+ if (WARN_ON(!pdata))
+ return -EINVAL;
+
+ info.constraint = pdata->constraint;
+ info.free_resources = boot_constraint_remove;
+ info.free_resources_data = pdev;
+
+ ret = dev_boot_constraint_add(pdata->dev, &info);
+ if (ret) {
+ if (ret == -EPROBE_DEFER)
+ driver_enable_deferred_probe();
+ else
+ pdata->probe_failed = ret;
+ }
+
+ return ret;
+}
+
+static struct platform_driver boot_constraint_driver = {
+ .driver = {
+ .name = "boot-constraints-dev",
+ },
+ .probe = boot_constraint_probe,
+};
+
+static int __init boot_constraint_init(void)
+{
+ return platform_driver_register(&boot_constraint_driver);
+}
+core_initcall(boot_constraint_init);
+
+static int boot_constraint_add_dev(struct device *dev,
+ struct dev_boot_constraint *constraint)
+{
+ struct boot_constraint_pdata pdata = {
+ .dev = dev,
+ .constraint.type = constraint->type,
+ };
+ struct platform_device *pdev;
+ struct boot_constraint_pdata *pdev_pdata;
+ int size, ret;
+
+ switch (constraint->type) {
+ case DEV_BOOT_CONSTRAINT_CLK:
+ size = sizeof(struct dev_boot_constraint_clk_info);
+ break;
+ case DEV_BOOT_CONSTRAINT_PM:
+ size = 0;
+ break;
+ case DEV_BOOT_CONSTRAINT_SUPPLY:
+ size = sizeof(struct dev_boot_constraint_supply_info);
+ break;
+ default:
+ dev_err(dev, "%s: Constraint type (%d) not supported\n",
+ __func__, constraint->type);
+ return -EINVAL;
+ }
+
+ /* Will be freed from boot_constraint_remove() */
+ pdata.constraint.data = kmemdup(constraint->data, size, GFP_KERNEL);
+ if (!pdata.constraint.data)
+ return -ENOMEM;
+
+ ret = ida_simple_get(&pdev_index, 0, 256, GFP_KERNEL);
+ if (ret < 0) {
+ dev_err(dev, "failed to allocate index (%d)\n", ret);
+ goto free;
+ }
+
+ pdata.index = ret;
+
+ pdev = platform_device_register_data(NULL, "boot-constraints-dev", ret,
+ &pdata, sizeof(pdata));
+ if (IS_ERR(pdev)) {
+ dev_err(dev, "%s: Failed to create pdev (%ld)\n", __func__,
+ PTR_ERR(pdev));
+ ret = PTR_ERR(pdev);
+ goto ida_remove;
+ }
+
+ /* Release resources if probe has failed */
+ pdev_pdata = dev_get_platdata(&pdev->dev);
+ if (pdev_pdata->probe_failed) {
+ ret = pdev_pdata->probe_failed;
+ goto remove_pdev;
+ }
+
+ return 0;
+
+remove_pdev:
+ platform_device_unregister(pdev);
+ida_remove:
+ ida_simple_remove(&pdev_index, pdata.index);
+free:
+ kfree(pdata.constraint.data);
+
+ return ret;
+}
+
+static int dev_boot_constraint_add_deferrable(struct device *dev,
+ struct dev_boot_constraint *constraints, int count)
+{
+ int ret, i;
+
+ for (i = 0; i < count; i++) {
+ ret = boot_constraint_add_dev(dev, &constraints[i]);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+/* This only creates platform devices for now */
+static void add_deferrable_of_single(struct device_node *np,
+ struct dev_boot_constraint *constraints,
+ int count)
+{
+ struct device *dev;
+ int ret;
+
+ if (!of_device_is_available(np))
+ return;
+
+ ret = of_platform_bus_create(np, NULL, NULL, NULL, false);
+ if (ret)
+ return;
+
+ dev = of_find_any_device_by_node(np);
+ if (!dev) {
+ pr_err("Boot Constraints: Failed to find dev: %pOF\n", np);
+ return;
+ }
+
+ ret = dev_boot_constraint_add_deferrable(dev, constraints, count);
+ if (ret)
+ dev_err(dev, "Failed to add boot constraint (%d)\n", ret);
+}
+
+/* Not all compatible device nodes may have boot constraints */
+static bool node_has_boot_constraints(struct device_node *np,
+ struct dev_boot_constraint_of *oconst)
+{
+ int i;
+
+ if (!oconst->dev_names)
+ return true;
+
+ for (i = 0; i < oconst->dev_names_count; i++) {
+ if (!strcmp(oconst->dev_names[i], kbasename(np->full_name)))
+ return true;
+ }
+
+ return false;
+}
+
+/**
+ * dev_boot_constraint_add_deferrable_of: Adds all constraints for a platform.
+ *
+ * @oconst: This is an array of 'struct dev_boot_constraint_of', where each
+ * entry of the array is used to add one or more boot constraints across one or
+ * more devices having the same compatibility in the device tree.
+ * @count: Size of the 'oconst' array.
+ *
+ * This helper routine provides an easy way to add all boot constraints for a
+ * machine or platform. Just like dev_boot_constraint_add(), this must be called
+ * before the devices (to which we want to add constraints) are probed by their
+ * drivers, otherwise the boot constraint will never get removed for those
+ * devices and may result in unwanted behavior of the hardware. The boot
+ * constraints are removed by the driver core automatically after the devices
+ * are probed (successfully or unsuccessfully).
+ *
+ * This adds the boot constraints in a deferrable way and the caller need not
+ * worry about the availability of the resources required by the constraint.
+ * This routine will return successfully and the constraint will be added by the
+ * boot constraint core as soon as the resource is available at a later point in
+ * time.
+ */
+void dev_boot_constraint_add_deferrable_of(struct dev_boot_constraint_of *oconst,
+ int count)
+{
+ struct device_node *np;
+ int i;
+
+ for (i = 0; i < count; i++) {
+ for_each_compatible_node(np, NULL, oconst[i].compat) {
+ if (!node_has_boot_constraints(np, &oconst[i]))
+ continue;
+
+ add_deferrable_of_single(np, oconst[i].constraints,
+ oconst[i].count);
+ }
+ }
+}
+EXPORT_SYMBOL_GPL(dev_boot_constraint_add_deferrable_of);
diff --git a/include/linux/boot_constraint.h b/include/linux/boot_constraint.h
index 12fac0d565b0..ab752e19bfd0 100644
--- a/include/linux/boot_constraint.h
+++ b/include/linux/boot_constraint.h
@@ -79,16 +79,43 @@ struct dev_boot_constraint_info {
void *free_resources_data;
};
+/**
+ * struct dev_boot_constraint_of - This is used to add one or more boot
+ * constraints across one or more devices having the same compatibility in the
+ * device tree.
+ *
+ * @compat: This must match the compatible string of the devices to which we
+ * want to apply constraints.
+ * @constraints: This points to one or more boot constraints.
+ * @count: This contains the number of boot constraints pointed by the
+ * 'constraints' field.
+ * @dev_names: This is used to limit the application of boot constraints to only
+ * a subset of devices with matching compatibility.
+ * @dev_names_count: This is the number of devices pointed by the 'dev_names'
+ * array.
+ */
+struct dev_boot_constraint_of {
+ const char *compat;
+ struct dev_boot_constraint *constraints;
+ unsigned int count;
+
+ const char * const *dev_names;
+ unsigned int dev_names_count;
+};
+
#ifdef CONFIG_DEV_BOOT_CONSTRAINT
int dev_boot_constraint_add(struct device *dev,
struct dev_boot_constraint_info *info);
void dev_boot_constraints_remove(struct device *dev);
+void dev_boot_constraint_add_deferrable_of(struct dev_boot_constraint_of *oconst,
+ int count);
#else
static inline
int dev_boot_constraint_add(struct device *dev,
struct dev_boot_constraint_info *info)
{ return 0; }
static inline void dev_boot_constraints_remove(struct device *dev) {}
+static inline void dev_boot_constraint_add_deferrable_of(struct dev_boot_constraint_of *oconst, int count) {}
#endif /* CONFIG_DEV_BOOT_CONSTRAINT */
#endif /* _LINUX_BOOT_CONSTRAINT_H */
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
* [PATCH V5 07/13] boot_constraint: Add debugfs support
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
This patch adds debugfs support for boot constraints. This is how it
looks for a "vmmc-supply" constraint for the MMC device.
$ ls -R /sys/kernel/debug/boot_constraints/
/sys/kernel/debug/boot_constraints/:
f723d000.dwmmc0
/sys/kernel/debug/boot_constraints/f723d000.dwmmc0:
clk-ciu pm-domain supply-vmmc supply-vmmcaux
/sys/kernel/debug/boot_constraints/f723d000.dwmmc0/clk-ciu:
/sys/kernel/debug/boot_constraints/f723d000.dwmmc0/pm-domain:
/sys/kernel/debug/boot_constraints/f723d000.dwmmc0/supply-vmmc:
u_volt_max u_volt_min
/sys/kernel/debug/boot_constraints/f723d000.dwmmc0/supply-vmmcaux:
u_volt_max u_volt_min
Tested-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/boot_constraint/clk.c | 3 ++
drivers/boot_constraint/core.c | 59 ++++++++++++++++++++++++++++++++++++++++
drivers/boot_constraint/core.h | 6 ++++
drivers/boot_constraint/pm.c | 11 ++++++--
drivers/boot_constraint/supply.c | 9 ++++++
5 files changed, 86 insertions(+), 2 deletions(-)
diff --git a/drivers/boot_constraint/clk.c b/drivers/boot_constraint/clk.c
index db22acff43e6..ebc871c29a83 100644
--- a/drivers/boot_constraint/clk.c
+++ b/drivers/boot_constraint/clk.c
@@ -46,6 +46,8 @@ int constraint_clk_add(struct constraint *constraint, void *data)
cclk->clk_info.name = kstrdup_const(clk_info->name, GFP_KERNEL);
constraint->private = cclk;
+ constraint_add_debugfs(constraint, clk_info->name);
+
return 0;
put_clk:
@@ -60,6 +62,7 @@ void constraint_clk_remove(struct constraint *constraint)
{
struct constraint_clk *cclk = constraint->private;
+ constraint_remove_debugfs(constraint);
kfree_const(cclk->clk_info.name);
clk_disable_unprepare(cclk->clk);
clk_put(cclk->clk);
diff --git a/drivers/boot_constraint/core.c b/drivers/boot_constraint/core.c
index b36c02aa50c5..0350c5057ee5 100644
--- a/drivers/boot_constraint/core.c
+++ b/drivers/boot_constraint/core.c
@@ -21,6 +21,63 @@
static LIST_HEAD(constraint_devices);
static DEFINE_MUTEX(constraint_devices_mutex);
+/* Debugfs */
+
+static struct dentry *rootdir;
+
+static void constraint_device_add_debugfs(struct constraint_dev *cdev)
+{
+ struct device *dev = cdev->dev;
+
+ cdev->dentry = debugfs_create_dir(dev_name(dev), rootdir);
+}
+
+static void constraint_device_remove_debugfs(struct constraint_dev *cdev)
+{
+ debugfs_remove_recursive(cdev->dentry);
+}
+
+void constraint_add_debugfs(struct constraint *constraint, const char *suffix)
+{
+ struct device *dev = constraint->cdev->dev;
+ const char *prefix;
+ char name[NAME_MAX];
+
+ switch (constraint->type) {
+ case DEV_BOOT_CONSTRAINT_CLK:
+ prefix = "clk";
+ break;
+ case DEV_BOOT_CONSTRAINT_PM:
+ prefix = "pm";
+ break;
+ case DEV_BOOT_CONSTRAINT_SUPPLY:
+ prefix = "supply";
+ break;
+ default:
+ dev_err(dev, "%s: Constraint type (%d) not supported\n",
+ __func__, constraint->type);
+ return;
+ }
+
+ snprintf(name, NAME_MAX, "%s-%s", prefix, suffix);
+
+ constraint->dentry = debugfs_create_dir(name, constraint->cdev->dentry);
+}
+
+void constraint_remove_debugfs(struct constraint *constraint)
+{
+ debugfs_remove_recursive(constraint->dentry);
+}
+
+static int __init constraint_debugfs_init(void)
+{
+ rootdir = debugfs_create_dir("boot_constraints", NULL);
+
+ return 0;
+}
+core_initcall(constraint_debugfs_init);
+
+
/* Boot constraints core */
static struct constraint_dev *constraint_device_find(struct device *dev)
@@ -48,12 +105,14 @@ static struct constraint_dev *constraint_device_allocate(struct device *dev)
INIT_LIST_HEAD(&cdev->constraints);
list_add(&cdev->node, &constraint_devices);
+ constraint_device_add_debugfs(cdev);
return cdev;
}
static void constraint_device_free(struct constraint_dev *cdev)
{
+ constraint_device_remove_debugfs(cdev);
list_del(&cdev->node);
kfree(cdev);
}
diff --git a/drivers/boot_constraint/core.h b/drivers/boot_constraint/core.h
index c5b27617b4ae..9dd481d38b99 100644
--- a/drivers/boot_constraint/core.h
+++ b/drivers/boot_constraint/core.h
@@ -7,6 +7,7 @@
#define _CORE_H
#include <linux/boot_constraint.h>
+#include <linux/debugfs.h>
#include <linux/device.h>
#include <linux/list.h>
@@ -14,6 +15,7 @@ struct constraint_dev {
struct device *dev;
struct list_head node;
struct list_head constraints;
+ struct dentry *dentry;
};
struct constraint {
@@ -22,12 +24,16 @@ struct constraint {
enum dev_boot_constraint_type type;
void (*free_resources)(void *data);
void *free_resources_data;
+ struct dentry *dentry;
int (*add)(struct constraint *constraint, void *data);
void (*remove)(struct constraint *constraint);
void *private;
};
+void constraint_add_debugfs(struct constraint *constraint, const char *suffix);
+void constraint_remove_debugfs(struct constraint *constraint);
+
/* Forward declarations of constraint specific callbacks */
int constraint_clk_add(struct constraint *constraint, void *data);
void constraint_clk_remove(struct constraint *constraint);
diff --git a/drivers/boot_constraint/pm.c b/drivers/boot_constraint/pm.c
index 4950ec6b248b..584d3d46ef65 100644
--- a/drivers/boot_constraint/pm.c
+++ b/drivers/boot_constraint/pm.c
@@ -11,11 +11,18 @@
int constraint_pm_add(struct constraint *constraint, void *data)
{
struct device *dev = constraint->cdev->dev;
+ int ret;
- return dev_pm_domain_attach(dev, true);
+ ret = dev_pm_domain_attach(dev, true);
+ if (ret)
+ return ret;
+
+ constraint_add_debugfs(constraint, "domain");
+
+ return 0;
}
void constraint_pm_remove(struct constraint *constraint)
{
- /* Nothing to do for now */
+ constraint_remove_debugfs(constraint);
}
diff --git a/drivers/boot_constraint/supply.c b/drivers/boot_constraint/supply.c
index 916e5d6848d5..28fda60a0711 100644
--- a/drivers/boot_constraint/supply.c
+++ b/drivers/boot_constraint/supply.c
@@ -57,6 +57,14 @@ int constraint_supply_add(struct constraint *constraint, void *data)
csupply->supply.name = kstrdup_const(supply->name, GFP_KERNEL);
constraint->private = csupply;
+ constraint_add_debugfs(constraint, supply->name);
+
+ debugfs_create_u32("u_volt_min", 0444, constraint->dentry,
+ &csupply->supply.u_volt_min);
+
+ debugfs_create_u32("u_volt_max", 0444, constraint->dentry,
+ &csupply->supply.u_volt_max);
+
return 0;
remove_voltage:
@@ -77,6 +85,7 @@ void constraint_supply_remove(struct constraint *constraint)
struct device *dev = constraint->cdev->dev;
int ret;
+ constraint_remove_debugfs(constraint);
kfree_const(supply->name);
ret = regulator_disable(csupply->reg);
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
* [PATCH V5 06/13] boot_constraint: Add support for PM constraints
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
This patch adds the PM constraint type.
The constraint is set by attaching the power domain for the device,
which will also enable the power domain. This guarantees that the power
domain doesn't get shut down while being used.
We don't need to detach the power domain to remove the constraint as the
domain is attached only once, from here or before driver probe.
Tested-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/boot_constraint/Makefile | 2 +-
drivers/boot_constraint/core.c | 4 ++++
drivers/boot_constraint/core.h | 3 +++
drivers/boot_constraint/pm.c | 21 +++++++++++++++++++++
include/linux/boot_constraint.h | 2 ++
5 files changed, 31 insertions(+), 1 deletion(-)
create mode 100644 drivers/boot_constraint/pm.c
diff --git a/drivers/boot_constraint/Makefile b/drivers/boot_constraint/Makefile
index 3424379fd1e4..b7ade1a7afb5 100644
--- a/drivers/boot_constraint/Makefile
+++ b/drivers/boot_constraint/Makefile
@@ -1,3 +1,3 @@
# Makefile for device boot constraints
-obj-y := clk.o core.o supply.o
+obj-y := clk.o core.o pm.o supply.o
diff --git a/drivers/boot_constraint/core.c b/drivers/boot_constraint/core.c
index df9e0bddbfbe..b36c02aa50c5 100644
--- a/drivers/boot_constraint/core.c
+++ b/drivers/boot_constraint/core.c
@@ -95,6 +95,10 @@ static struct constraint *constraint_allocate(struct constraint_dev *cdev,
add = constraint_clk_add;
remove = constraint_clk_remove;
break;
+ case DEV_BOOT_CONSTRAINT_PM:
+ add = constraint_pm_add;
+ remove = constraint_pm_remove;
+ break;
case DEV_BOOT_CONSTRAINT_SUPPLY:
add = constraint_supply_add;
remove = constraint_supply_remove;
diff --git a/drivers/boot_constraint/core.h b/drivers/boot_constraint/core.h
index 720bda0a0f44..c5b27617b4ae 100644
--- a/drivers/boot_constraint/core.h
+++ b/drivers/boot_constraint/core.h
@@ -32,6 +32,9 @@ struct constraint {
int constraint_clk_add(struct constraint *constraint, void *data);
void constraint_clk_remove(struct constraint *constraint);
+int constraint_pm_add(struct constraint *constraint, void *data);
+void constraint_pm_remove(struct constraint *constraint);
+
int constraint_supply_add(struct constraint *constraint, void *data);
void constraint_supply_remove(struct constraint *constraint);
diff --git a/drivers/boot_constraint/pm.c b/drivers/boot_constraint/pm.c
new file mode 100644
index 000000000000..4950ec6b248b
--- /dev/null
+++ b/drivers/boot_constraint/pm.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 Linaro.
+ * Viresh Kumar <viresh.kumar@linaro.org>
+ */
+
+#include <linux/pm_domain.h>
+
+#include "core.h"
+
+int constraint_pm_add(struct constraint *constraint, void *data)
+{
+ struct device *dev = constraint->cdev->dev;
+
+ return dev_pm_domain_attach(dev, true);
+}
+
+void constraint_pm_remove(struct constraint *constraint)
+{
+ /* Nothing to do for now */
+}
diff --git a/include/linux/boot_constraint.h b/include/linux/boot_constraint.h
index d798355fd93f..12fac0d565b0 100644
--- a/include/linux/boot_constraint.h
+++ b/include/linux/boot_constraint.h
@@ -17,10 +17,12 @@ struct device;
* enum dev_boot_constraint_type - This defines different boot constraint types.
*
* @DEV_BOOT_CONSTRAINT_CLK: This represents a clock boot constraint.
+ * @DEV_BOOT_CONSTRAINT_PM: This represents a power domain boot constraint.
* @DEV_BOOT_CONSTRAINT_SUPPLY: This represents a power supply boot constraint.
*/
enum dev_boot_constraint_type {
DEV_BOOT_CONSTRAINT_CLK,
+ DEV_BOOT_CONSTRAINT_PM,
DEV_BOOT_CONSTRAINT_SUPPLY,
};
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
* [PATCH V5 05/13] boot_constraint: Add support for clk constraints
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
This patch adds the clk constraint type.
The constraint is set by enabling the clk for the device. Once the
device is probed, the clk is disabled and the constraint is removed.
We may want to do clk_set_rate() from here, but lets wait for some real
users that really want it.
Tested-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/boot_constraint/Makefile | 2 +-
drivers/boot_constraint/clk.c | 67 ++++++++++++++++++++++++++++++++++++++++
drivers/boot_constraint/core.c | 4 +++
drivers/boot_constraint/core.h | 3 ++
include/linux/boot_constraint.h | 11 +++++++
5 files changed, 86 insertions(+), 1 deletion(-)
create mode 100644 drivers/boot_constraint/clk.c
diff --git a/drivers/boot_constraint/Makefile b/drivers/boot_constraint/Makefile
index a45616f0c3b0..3424379fd1e4 100644
--- a/drivers/boot_constraint/Makefile
+++ b/drivers/boot_constraint/Makefile
@@ -1,3 +1,3 @@
# Makefile for device boot constraints
-obj-y := core.o supply.o
+obj-y := clk.o core.o supply.o
diff --git a/drivers/boot_constraint/clk.c b/drivers/boot_constraint/clk.c
new file mode 100644
index 000000000000..db22acff43e6
--- /dev/null
+++ b/drivers/boot_constraint/clk.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 Linaro.
+ * Viresh Kumar <viresh.kumar@linaro.org>
+ */
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+
+#include "core.h"
+
+struct constraint_clk {
+ struct dev_boot_constraint_clk_info clk_info;
+ struct clk *clk;
+};
+
+int constraint_clk_add(struct constraint *constraint, void *data)
+{
+ struct dev_boot_constraint_clk_info *clk_info = data;
+ struct constraint_clk *cclk;
+ struct device *dev = constraint->cdev->dev;
+ int ret;
+
+ cclk = kzalloc(sizeof(*cclk), GFP_KERNEL);
+ if (!cclk)
+ return -ENOMEM;
+
+ cclk->clk = clk_get(dev, clk_info->name);
+ if (IS_ERR(cclk->clk)) {
+ ret = PTR_ERR(cclk->clk);
+ if (ret != -EPROBE_DEFER) {
+ dev_err(dev, "clk_get() failed for %s (%d)\n",
+ clk_info->name, ret);
+ }
+ goto free;
+ }
+
+ ret = clk_prepare_enable(cclk->clk);
+ if (ret) {
+ dev_err(dev, "clk_prepare_enable() %s failed (%d)\n",
+ clk_info->name, ret);
+ goto put_clk;
+ }
+
+ cclk->clk_info.name = kstrdup_const(clk_info->name, GFP_KERNEL);
+ constraint->private = cclk;
+
+ return 0;
+
+put_clk:
+ clk_put(cclk->clk);
+free:
+ kfree(cclk);
+
+ return ret;
+}
+
+void constraint_clk_remove(struct constraint *constraint)
+{
+ struct constraint_clk *cclk = constraint->private;
+
+ kfree_const(cclk->clk_info.name);
+ clk_disable_unprepare(cclk->clk);
+ clk_put(cclk->clk);
+ kfree(cclk);
+}
diff --git a/drivers/boot_constraint/core.c b/drivers/boot_constraint/core.c
index 63a4b1a2fa2c..df9e0bddbfbe 100644
--- a/drivers/boot_constraint/core.c
+++ b/drivers/boot_constraint/core.c
@@ -91,6 +91,10 @@ static struct constraint *constraint_allocate(struct constraint_dev *cdev,
void (*remove)(struct constraint *constraint);
switch (type) {
+ case DEV_BOOT_CONSTRAINT_CLK:
+ add = constraint_clk_add;
+ remove = constraint_clk_remove;
+ break;
case DEV_BOOT_CONSTRAINT_SUPPLY:
add = constraint_supply_add;
remove = constraint_supply_remove;
diff --git a/drivers/boot_constraint/core.h b/drivers/boot_constraint/core.h
index d0d3e7bf7d57..720bda0a0f44 100644
--- a/drivers/boot_constraint/core.h
+++ b/drivers/boot_constraint/core.h
@@ -29,6 +29,9 @@ struct constraint {
};
/* Forward declarations of constraint specific callbacks */
+int constraint_clk_add(struct constraint *constraint, void *data);
+void constraint_clk_remove(struct constraint *constraint);
+
int constraint_supply_add(struct constraint *constraint, void *data);
void constraint_supply_remove(struct constraint *constraint);
diff --git a/include/linux/boot_constraint.h b/include/linux/boot_constraint.h
index 1db24d53b622..d798355fd93f 100644
--- a/include/linux/boot_constraint.h
+++ b/include/linux/boot_constraint.h
@@ -16,12 +16,23 @@ struct device;
/**
* enum dev_boot_constraint_type - This defines different boot constraint types.
*
+ * @DEV_BOOT_CONSTRAINT_CLK: This represents a clock boot constraint.
* @DEV_BOOT_CONSTRAINT_SUPPLY: This represents a power supply boot constraint.
*/
enum dev_boot_constraint_type {
+ DEV_BOOT_CONSTRAINT_CLK,
DEV_BOOT_CONSTRAINT_SUPPLY,
};
+/**
+ * struct dev_boot_constraint_clk_info - Clock boot constraint information.
+ *
+ * @name: This must match the connection-id of the clock for the device.
+ */
+struct dev_boot_constraint_clk_info {
+ const char *name;
+};
+
/**
* struct dev_boot_constraint_supply_info - Power supply boot constraint
* information.
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
* [PATCH V5 04/13] boot_constraint: Add support for supply constraints
From: Viresh Kumar @ 2017-12-14 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513264961.git.viresh.kumar@linaro.org>
This patch adds the first constraint type: power-supply.
The constraint is set by enabling the regulator and setting a voltage
range (if required) for the respective regulator device, which will be
honored by the regulator core even if more users turn up. Once the
device is probed, the regulator is released and the constraint is
removed.
Tested-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/boot_constraint/Makefile | 2 +-
drivers/boot_constraint/core.c | 4 ++
drivers/boot_constraint/core.h | 5 +++
drivers/boot_constraint/supply.c | 95 ++++++++++++++++++++++++++++++++++++++++
include/linux/boot_constraint.h | 17 ++++++-
5 files changed, 121 insertions(+), 2 deletions(-)
create mode 100644 drivers/boot_constraint/supply.c
diff --git a/drivers/boot_constraint/Makefile b/drivers/boot_constraint/Makefile
index 0f2680177974..a45616f0c3b0 100644
--- a/drivers/boot_constraint/Makefile
+++ b/drivers/boot_constraint/Makefile
@@ -1,3 +1,3 @@
# Makefile for device boot constraints
-obj-y := core.o
+obj-y := core.o supply.o
diff --git a/drivers/boot_constraint/core.c b/drivers/boot_constraint/core.c
index 45a0fbed1b11..63a4b1a2fa2c 100644
--- a/drivers/boot_constraint/core.c
+++ b/drivers/boot_constraint/core.c
@@ -91,6 +91,10 @@ static struct constraint *constraint_allocate(struct constraint_dev *cdev,
void (*remove)(struct constraint *constraint);
switch (type) {
+ case DEV_BOOT_CONSTRAINT_SUPPLY:
+ add = constraint_supply_add;
+ remove = constraint_supply_remove;
+ break;
default:
return ERR_PTR(-EINVAL);
}
diff --git a/drivers/boot_constraint/core.h b/drivers/boot_constraint/core.h
index 1e87125de531..d0d3e7bf7d57 100644
--- a/drivers/boot_constraint/core.h
+++ b/drivers/boot_constraint/core.h
@@ -27,4 +27,9 @@ struct constraint {
void (*remove)(struct constraint *constraint);
void *private;
};
+
+/* Forward declarations of constraint specific callbacks */
+int constraint_supply_add(struct constraint *constraint, void *data);
+void constraint_supply_remove(struct constraint *constraint);
+
#endif /* _CORE_H */
diff --git a/drivers/boot_constraint/supply.c b/drivers/boot_constraint/supply.c
new file mode 100644
index 000000000000..916e5d6848d5
--- /dev/null
+++ b/drivers/boot_constraint/supply.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 Linaro.
+ * Viresh Kumar <viresh.kumar@linaro.org>
+ */
+
+#include <linux/err.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+
+#include "core.h"
+
+struct constraint_supply {
+ struct dev_boot_constraint_supply_info supply;
+ struct regulator *reg;
+};
+
+int constraint_supply_add(struct constraint *constraint, void *data)
+{
+ struct dev_boot_constraint_supply_info *supply = data;
+ struct constraint_supply *csupply;
+ struct device *dev = constraint->cdev->dev;
+ int ret;
+
+ csupply = kzalloc(sizeof(*csupply), GFP_KERNEL);
+ if (!csupply)
+ return -ENOMEM;
+
+ csupply->reg = regulator_get(dev, supply->name);
+ if (IS_ERR(csupply->reg)) {
+ ret = PTR_ERR(csupply->reg);
+ if (ret != -EPROBE_DEFER) {
+ dev_err(dev, "regulator_get() failed for %s (%d)\n",
+ supply->name, ret);
+ }
+ goto free;
+ }
+
+ if (supply->u_volt_min != 0 && supply->u_volt_max != 0) {
+ ret = regulator_set_voltage(csupply->reg, supply->u_volt_min,
+ supply->u_volt_max);
+ if (ret) {
+ dev_err(dev, "regulator_set_voltage %s failed (%d)\n",
+ supply->name, ret);
+ goto free_regulator;
+ }
+ }
+
+ ret = regulator_enable(csupply->reg);
+ if (ret) {
+ dev_err(dev, "regulator_enable %s failed (%d)\n",
+ supply->name, ret);
+ goto remove_voltage;
+ }
+
+ memcpy(&csupply->supply, supply, sizeof(*supply));
+ csupply->supply.name = kstrdup_const(supply->name, GFP_KERNEL);
+ constraint->private = csupply;
+
+ return 0;
+
+remove_voltage:
+ if (supply->u_volt_min != 0 && supply->u_volt_max != 0)
+ regulator_set_voltage(csupply->reg, 0, INT_MAX);
+free_regulator:
+ regulator_put(csupply->reg);
+free:
+ kfree(csupply);
+
+ return ret;
+}
+
+void constraint_supply_remove(struct constraint *constraint)
+{
+ struct constraint_supply *csupply = constraint->private;
+ struct dev_boot_constraint_supply_info *supply = &csupply->supply;
+ struct device *dev = constraint->cdev->dev;
+ int ret;
+
+ kfree_const(supply->name);
+
+ ret = regulator_disable(csupply->reg);
+ if (ret)
+ dev_err(dev, "regulator_disable failed (%d)\n", ret);
+
+ if (supply->u_volt_min != 0 && supply->u_volt_max != 0) {
+ ret = regulator_set_voltage(csupply->reg, 0, INT_MAX);
+ if (ret)
+ dev_err(dev, "regulator_set_voltage failed (%d)\n",
+ ret);
+ }
+
+ regulator_put(csupply->reg);
+ kfree(csupply);
+}
diff --git a/include/linux/boot_constraint.h b/include/linux/boot_constraint.h
index 2ce62b7b3cc6..1db24d53b622 100644
--- a/include/linux/boot_constraint.h
+++ b/include/linux/boot_constraint.h
@@ -16,9 +16,24 @@ struct device;
/**
* enum dev_boot_constraint_type - This defines different boot constraint types.
*
+ * @DEV_BOOT_CONSTRAINT_SUPPLY: This represents a power supply boot constraint.
*/
enum dev_boot_constraint_type {
- DEV_BOOT_CONSTRAINT_NONE,
+ DEV_BOOT_CONSTRAINT_SUPPLY,
+};
+
+/**
+ * struct dev_boot_constraint_supply_info - Power supply boot constraint
+ * information.
+ *
+ * @name: This must match the power supply name for the device.
+ * @u_volt_min: This is the minimum microvolts value supported by the device.
+ * @u_volt_max: This is the maximum microvolts value supported by the device.
+ */
+struct dev_boot_constraint_supply_info {
+ const char *name;
+ unsigned int u_volt_min;
+ unsigned int u_volt_max;
};
/**
--
2.15.0.194.g9af6a3dea062
^ permalink raw reply related
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