* pxa3xx_nand times out in 4.14 with JFFS2
From: Willy Tarreau @ 2017-12-17 16:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAAEAJfD47bGTSppEqcRszjAgBUjiCevmdYLKfsQTPYMcVu8VDA@mail.gmail.com>
On Sun, Dec 17, 2017 at 12:53:36PM -0300, Ezequiel Garcia wrote:
> If not too much to ask, this is the test that I believe is needed.
> You seem to have a setup ready, hence why I'm asking you, if
> possible, to give it a shot.
>
> (1) Scrub the BBT from the NAND. Or scrub the whole NAND.
> You cannot do this from the kernel, it needs to be done from the bootloader.
>
> (2) Mark a couple blocks as bad using the OOB -- AFAICR, there
> was a command to do this in the bootloader.
>
> (3) Boot, let Linux create the BBT and see if it catches the bad blocks.
Are the current boot loaders safe regarding the scrub operation ? I'm
asking because that's how I bricked my mirabox a few years ago when
trying to mark a bad block from u-boot :-/ If someone has a good
knowledge of these commands to limit the risk and helps me only playing
with a small part at the end of the flash (or in the unused area) I'd
prefer it :-)
> This would guarantee that devices with factory bad blocks,
> (and no BBT), would be OK with this patch.
I see. I'm fine with trying provided I have reasonably good assurance
that I won't have to go through the kwboot pain again :-/
Cheers,
Willy
^ permalink raw reply
* pxa3xx_nand times out in 4.14 with JFFS2
From: Ezequiel Garcia @ 2017-12-17 15:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171217150043.GA1403@1wt.eu>
On 17 December 2017 at 12:00, Willy Tarreau <w@1wt.eu> wrote:
> On Sun, Dec 17, 2017 at 03:53:05PM +0100, Boris Brezillon wrote:
>> On Sun, 17 Dec 2017 11:27:51 -0300
>> Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> wrote:
>>
>> > On 17 December 2017 at 09:05, Willy Tarreau <w@1wt.eu> wrote:
>> > > Hello,
>> > >
>> > > I recently bought a Linksys WRT1900ACS which hosts an Armada 385 and a
>> > > NAND flash. While I could get OpenWRT to work flawlessly on it using
>> > > kernel 4.4, mainline 4.14.6 fails with a lot of such messages :
>> > >
>> > > pxa3xx-nand f10d0000.flash: Wait time out!!!
>> > >
>> >
>> > Boris,
>> >
>> > Any idea why this issue is on v4.14, but not observed on v4.4?
>>
>> I have absolutely no idea.
>
> Warning, the 4.4 in openwrt very likely is heavily patched! That's also
> why I'm moving to mainline instead (to know what I'm using). I've seen
> some nand timeout changes in the patches. I don't know if anything else
> is applied to the driver (it's always a pain to find where to dig, as
> there is no unified list of all patches for a given architecture).
>
>> > Also, is this somehow related to Armada 385 only?
>>
>> I doubt it. My guess is that almost nobody uses JFFS2 these days, which
>> may explain why this problem has not been detected before.
>
> That's very likely indeed.
>
> Ezequiel, to answer your question about dumping bad blocks, this flash
> doesn't report any bad blocks yet (cool) however I could issue "nanddump
> --oob --bb=dumpbad" on all MTD devices without issues. The last one has
> 8 BBT blocks. I didn't find any bad block, but I could confirm that
> dumping oob apparently worked as it returned data that differs from the
> non-oob dump on the last partition (the one containing the oob blocks),
> so I guess we're fine :
>
If not too much to ask, this is the test that I believe is needed.
You seem to have a setup ready, hence why I'm asking you, if
possible, to give it a shot.
(1) Scrub the BBT from the NAND. Or scrub the whole NAND.
You cannot do this from the kernel, it needs to be done from the bootloader.
(2) Mark a couple blocks as bad using the OOB -- AFAICR, there
was a command to do this in the bootloader.
(3) Boot, let Linux create the BBT and see if it catches the bad blocks.
This would guarantee that devices with factory bad blocks,
(and no BBT), would be OK with this patch.
--
Ezequiel Garc?a, VanguardiaSur
www.vanguardiasur.com.ar
^ permalink raw reply
* [PATCH net-next 2/2 v8] net: ethernet: Add a driver for Gemini gigabit ethernet
From: Linus Walleij @ 2017-12-17 15:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171211.141651.2190843744682664766.davem@davemloft.net>
On Mon, Dec 11, 2017 at 8:16 PM, David Miller <davem@davemloft.net> wrote:
> From: Linus Walleij <linus.walleij@linaro.org>
>> +if NET_VENDOR_CORTINA
>> +
>> +config GEMINI_ETHERNET
>> + tristate "Gemini Gigabit Ethernet support"
>> + depends on ARCH_GEMINI
>> + depends on OF
>> + select PHYLIB
>> + select CRC32
>> + ---help---
>> + This driver supports StorLink SL351x (Gemini) dual Gigabit Ethernet.
>
> Make this driver buildable anywhere, you don't use any platform architecture
> specific features.
I pushed the recent v9 set where I remove the dep on ARCH_GEMINI
and the autobuilders complain a lot about the use of dma_to_pfn()
which turns out to be a ARM thing from <asm/dma-mapping.h>
included from <linux/dma-mapping.h>.
I will try switching to functions from the generic dma-mapping API
and fix it up and send a v10.
Yours,
Linus Walleij
^ permalink raw reply
* pxa3xx_nand times out in 4.14 with JFFS2
From: Willy Tarreau @ 2017-12-17 15:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171217150043.GA1403@1wt.eu>
On Sun, Dec 17, 2017 at 04:00:43PM +0100, Willy Tarreau wrote:
> > > Any idea why this issue is on v4.14, but not observed on v4.4?
> >
> > I have absolutely no idea.
>
> Warning, the 4.4 in openwrt very likely is heavily patched! That's also
> why I'm moving to mainline instead (to know what I'm using). I've seen
> some nand timeout changes in the patches. I don't know if anything else
> is applied to the driver (it's always a pain to find where to dig, as
> there is no unified list of all patches for a given architecture).
Given the description here, I suspect this is how they got rid of the
problem there :
https://github.com/lede-project/source/blob/lede-17.01/target/linux/mvebu/patches-4.4/110-pxa3xxx_revert_irq_thread.patch
---
Revert "mtd: pxa3xx-nand: handle PIO in threaded interrupt"
This reverts commit 24542257a3b987025d4b998ec2d15e556c98ad3f
This upstream change has been causing spurious timeouts on accesses
to the NAND flash if something else on the system is causing
significant latency.
Nothing guarantees that the thread will run in time, so the
usual timeout is unreliable.
---
Willy
^ permalink raw reply
* pxa3xx_nand times out in 4.14 with JFFS2
From: Willy Tarreau @ 2017-12-17 15:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171217155305.16c5bb4f@bbrezillon>
On Sun, Dec 17, 2017 at 03:53:05PM +0100, Boris Brezillon wrote:
> On Sun, 17 Dec 2017 11:27:51 -0300
> Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> wrote:
>
> > On 17 December 2017 at 09:05, Willy Tarreau <w@1wt.eu> wrote:
> > > Hello,
> > >
> > > I recently bought a Linksys WRT1900ACS which hosts an Armada 385 and a
> > > NAND flash. While I could get OpenWRT to work flawlessly on it using
> > > kernel 4.4, mainline 4.14.6 fails with a lot of such messages :
> > >
> > > pxa3xx-nand f10d0000.flash: Wait time out!!!
> > >
> >
> > Boris,
> >
> > Any idea why this issue is on v4.14, but not observed on v4.4?
>
> I have absolutely no idea.
Warning, the 4.4 in openwrt very likely is heavily patched! That's also
why I'm moving to mainline instead (to know what I'm using). I've seen
some nand timeout changes in the patches. I don't know if anything else
is applied to the driver (it's always a pain to find where to dig, as
there is no unified list of all patches for a given architecture).
> > Also, is this somehow related to Armada 385 only?
>
> I doubt it. My guess is that almost nobody uses JFFS2 these days, which
> may explain why this problem has not been detected before.
That's very likely indeed.
Ezequiel, to answer your question about dumping bad blocks, this flash
doesn't report any bad blocks yet (cool) however I could issue "nanddump
--oob --bb=dumpbad" on all MTD devices without issues. The last one has
8 BBT blocks. I didn't find any bad block, but I could confirm that
dumping oob apparently worked as it returned data that differs from the
non-oob dump on the last partition (the one containing the oob blocks),
so I guess we're fine :
# cmp -l raw oob
40822793 377 61
40822794 377 164
40822795 377 142
40822796 377 102
40822797 377 126
40822798 377 115
40822799 377 1
40957961 377 115
40957962 377 126
40957963 377 102
40957964 377 142
40957965 377 164
40957966 377 60
40957967 377 1
Hoping this helps,
Willy
^ permalink raw reply
* pxa3xx_nand times out in 4.14 with JFFS2
From: Boris Brezillon @ 2017-12-17 14:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAAEAJfBUyhvi68A6QEJRywq9hxMBYuJ4m+O6ogBtV1nkeBR_og@mail.gmail.com>
On Sun, 17 Dec 2017 11:27:51 -0300
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> wrote:
> On 17 December 2017 at 09:05, Willy Tarreau <w@1wt.eu> wrote:
> > Hello,
> >
> > I recently bought a Linksys WRT1900ACS which hosts an Armada 385 and a
> > NAND flash. While I could get OpenWRT to work flawlessly on it using
> > kernel 4.4, mainline 4.14.6 fails with a lot of such messages :
> >
> > pxa3xx-nand f10d0000.flash: Wait time out!!!
> >
>
> Boris,
>
> Any idea why this issue is on v4.14, but not observed on v4.4?
I have absolutely no idea.
>
> Also, is this somehow related to Armada 385 only?
I doubt it. My guess is that almost nobody uses JFFS2 these days, which
may explain why this problem has not been detected before.
^ permalink raw reply
* pxa3xx_nand times out in 4.14 with JFFS2
From: Ezequiel Garcia @ 2017-12-17 14:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171217120503.GA3323@1wt.eu>
On 17 December 2017 at 09:05, Willy Tarreau <w@1wt.eu> wrote:
> Hello,
>
> I recently bought a Linksys WRT1900ACS which hosts an Armada 385 and a
> NAND flash. While I could get OpenWRT to work flawlessly on it using
> kernel 4.4, mainline 4.14.6 fails with a lot of such messages :
>
> pxa3xx-nand f10d0000.flash: Wait time out!!!
>
Boris,
Any idea why this issue is on v4.14, but not observed on v4.4?
Also, is this somehow related to Armada 385 only?
--
Ezequiel Garc?a, VanguardiaSur
www.vanguardiasur.com.ar
^ permalink raw reply
* pxa3xx_nand times out in 4.14 with JFFS2
From: Ezequiel Garcia @ 2017-12-17 14:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171217131705.GA30726@1wt.eu>
On 17 December 2017 at 10:17, Willy Tarreau <w@1wt.eu> wrote:
> Hi Boris!
>
> On Sun, Dec 17, 2017 at 01:33:55PM +0100, Boris Brezillon wrote:
>> You should have a look at this thread [1], and in case you don't want
>> to read everything,
>
> I've read it entirely, it was very instructive!
>
>> you can just test the solution proposed here [2].
>>
>> [1]http://linux-mtd.infradead.narkive.com/Rd5UaRPO/bug-pxa3xx-wait-time-out-when-scanning-for-bb
>> [2]http://patchwork.ozlabs.org/patch/847411/
>
> Well done for such a quick reply! I can confirm that your proposed
> patch below does fix it for me! Now I understand why only jffs2 was
> triggering the issue if it only affects OOB, and I guess I would have
> faced it as well with nanddump had I thought about testing it.
>
> I'm queuing this one here to continue to progress on my machine, feel
> free to add my tested-by if the patch gets merged, or to ping me to
> test any other option you'd like to confirm!
>
> Thanks!
> Willy
>
> ---
>
> diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
> index 321a90c..adb9fd8 100644
> --- a/drivers/mtd/nand/pxa3xx_nand.c
> +++ b/drivers/mtd/nand/pxa3xx_nand.c
> @@ -950,6 +950,7 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
>
> switch (command) {
> case NAND_CMD_READ0:
> + case NAND_CMD_READOOB:
> case NAND_CMD_PAGEPROG:
> info->use_ecc = 1;
> break;
>
>
If we can confirm that with this patch, bad block markers can be read
without issues, then it's good to go.
Willy, think you could try to test that?
--
Ezequiel Garc?a, VanguardiaSur
www.vanguardiasur.com.ar
^ permalink raw reply
* pxa3xx_nand times out in 4.14 with JFFS2
From: Willy Tarreau @ 2017-12-17 13:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171217133355.618e5f92@bbrezillon>
Hi Boris!
On Sun, Dec 17, 2017 at 01:33:55PM +0100, Boris Brezillon wrote:
> You should have a look at this thread [1], and in case you don't want
> to read everything,
I've read it entirely, it was very instructive!
> you can just test the solution proposed here [2].
>
> [1]http://linux-mtd.infradead.narkive.com/Rd5UaRPO/bug-pxa3xx-wait-time-out-when-scanning-for-bb
> [2]http://patchwork.ozlabs.org/patch/847411/
Well done for such a quick reply! I can confirm that your proposed
patch below does fix it for me! Now I understand why only jffs2 was
triggering the issue if it only affects OOB, and I guess I would have
faced it as well with nanddump had I thought about testing it.
I'm queuing this one here to continue to progress on my machine, feel
free to add my tested-by if the patch gets merged, or to ping me to
test any other option you'd like to confirm!
Thanks!
Willy
---
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 321a90c..adb9fd8 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -950,6 +950,7 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
switch (command) {
case NAND_CMD_READ0:
+ case NAND_CMD_READOOB:
case NAND_CMD_PAGEPROG:
info->use_ecc = 1;
break;
^ permalink raw reply related
* [PATCH v9 13/13] ASoC: stm32: add DFSDM DAI support
From: Jonathan Cameron @ 2017-12-17 12:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513241885-32079-14-git-send-email-arnaud.pouliquen@st.com>
On Thu, 14 Dec 2017 09:58:05 +0100
Arnaud Pouliquen <arnaud.pouliquen@st.com> wrote:
> Add driver to handle DAI interface for PDM microphones connected
> to Digital Filter for Sigma Delta Modulators IP.
>
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
For the IIO parts (I'm not knowledgeable enough about the sound side to
offer a proper review!)
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
So Mark, over to you. I'm happy if you want to do the immutable branch
once any issue you find are fixed, or I can do it. I'm just looking
for acks or a pull request now.
Jonathan
> ---
> sound/soc/stm/Kconfig | 11 ++
> sound/soc/stm/Makefile | 3 +
> sound/soc/stm/stm32_adfsdm.c | 347 +++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 361 insertions(+)
> create mode 100644 sound/soc/stm/stm32_adfsdm.c
>
> diff --git a/sound/soc/stm/Kconfig b/sound/soc/stm/Kconfig
> index 3398e6c..a78f770 100644
> --- a/sound/soc/stm/Kconfig
> +++ b/sound/soc/stm/Kconfig
> @@ -28,4 +28,15 @@ config SND_SOC_STM32_SPDIFRX
> help
> Say Y if you want to enable S/PDIF capture for STM32
>
> +config SND_SOC_STM32_DFSDM
> + tristate "SoC Audio support for STM32 DFSDM"
> + depends on (ARCH_STM32 && OF && STM32_DFSDM_ADC) || COMPILE_TEST
> + depends on SND_SOC
> + select SND_SOC_GENERIC_DMAENGINE_PCM
> + select SND_SOC_DMIC
> + select IIO_BUFFER_CB
> + help
> + Select this option to enable the STM32 Digital Filter
> + for Sigma Delta Modulators (DFSDM) driver used
> + in various STM32 series for digital microphone capture.
> endmenu
> diff --git a/sound/soc/stm/Makefile b/sound/soc/stm/Makefile
> index 4ed22e6..53e90e6 100644
> --- a/sound/soc/stm/Makefile
> +++ b/sound/soc/stm/Makefile
> @@ -12,3 +12,6 @@ obj-$(CONFIG_SND_SOC_STM32_I2S) += snd-soc-stm32-i2s.o
> # SPDIFRX
> snd-soc-stm32-spdifrx-objs := stm32_spdifrx.o
> obj-$(CONFIG_SND_SOC_STM32_SPDIFRX) += snd-soc-stm32-spdifrx.o
> +
> +#DFSDM
> +obj-$(CONFIG_SND_SOC_STM32_DFSDM) += stm32_adfsdm.o
> diff --git a/sound/soc/stm/stm32_adfsdm.c b/sound/soc/stm/stm32_adfsdm.c
> new file mode 100644
> index 0000000..af50891
> --- /dev/null
> +++ b/sound/soc/stm/stm32_adfsdm.c
> @@ -0,0 +1,347 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * This file is part of STM32 DFSDM ASoC DAI driver
> + *
> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
> + * Authors: Arnaud Pouliquen <arnaud.pouliquen@st.com>
> + * Olivier Moysan <olivier.moysan@st.com>
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +#include <linux/iio/iio.h>
> +#include <linux/iio/consumer.h>
> +#include <linux/iio/adc/stm32-dfsdm-adc.h>
> +
> +#include <sound/pcm.h>
> +#include <sound/soc.h>
> +
> +#define STM32_ADFSDM_DRV_NAME "stm32-adfsdm"
> +
> +#define DFSDM_MAX_PERIOD_SIZE (PAGE_SIZE / 2)
> +#define DFSDM_MAX_PERIODS 6
> +
> +struct stm32_adfsdm_priv {
> + struct snd_soc_dai_driver dai_drv;
> + struct snd_pcm_substream *substream;
> + struct device *dev;
> +
> + /* IIO */
> + struct iio_channel *iio_ch;
> + struct iio_cb_buffer *iio_cb;
> + bool iio_active;
> +
> + /* PCM buffer */
> + unsigned char *pcm_buff;
> + unsigned int pos;
> +};
> +
> +static const struct snd_pcm_hardware stm32_adfsdm_pcm_hw = {
> + .info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
> + SNDRV_PCM_INFO_PAUSE,
> + .formats = SNDRV_PCM_FMTBIT_S32_LE,
> +
> + .rate_min = 8000,
> + .rate_max = 32000,
> +
> + .channels_min = 1,
> + .channels_max = 1,
> +
> + .periods_min = 2,
> + .periods_max = DFSDM_MAX_PERIODS,
> +
> + .period_bytes_max = DFSDM_MAX_PERIOD_SIZE,
> + .buffer_bytes_max = DFSDM_MAX_PERIODS * DFSDM_MAX_PERIOD_SIZE
> +};
> +
> +static void stm32_adfsdm_shutdown(struct snd_pcm_substream *substream,
> + struct snd_soc_dai *dai)
> +{
> + struct stm32_adfsdm_priv *priv = snd_soc_dai_get_drvdata(dai);
> +
> + if (priv->iio_active) {
> + iio_channel_stop_all_cb(priv->iio_cb);
> + priv->iio_active = false;
> + }
> +}
> +
> +static int stm32_adfsdm_dai_prepare(struct snd_pcm_substream *substream,
> + struct snd_soc_dai *dai)
> +{
> + struct stm32_adfsdm_priv *priv = snd_soc_dai_get_drvdata(dai);
> + int ret;
> +
> + ret = iio_write_channel_attribute(priv->iio_ch,
> + substream->runtime->rate, 0,
> + IIO_CHAN_INFO_SAMP_FREQ);
> + if (ret < 0) {
> + dev_err(dai->dev, "%s: Failed to set %d sampling rate\n",
> + __func__, substream->runtime->rate);
> + return ret;
> + }
> +
> + if (!priv->iio_active) {
> + ret = iio_channel_start_all_cb(priv->iio_cb);
> + if (!ret)
> + priv->iio_active = true;
> + else
> + dev_err(dai->dev, "%s: IIO channel start failed (%d)\n",
> + __func__, ret);
> + }
> +
> + return ret;
> +}
> +
> +static int stm32_adfsdm_set_sysclk(struct snd_soc_dai *dai, int clk_id,
> + unsigned int freq, int dir)
> +{
> + struct stm32_adfsdm_priv *priv = snd_soc_dai_get_drvdata(dai);
> + ssize_t size;
> + char str_freq[10];
> +
> + dev_dbg(dai->dev, "%s: Enter for freq %d\n", __func__, freq);
> +
> + /* Set IIO frequency if CODEC is master as clock comes from SPI_IN */
> +
> + snprintf(str_freq, sizeof(str_freq), "%d\n", freq);
> + size = iio_write_channel_ext_info(priv->iio_ch, "spi_clk_freq",
> + str_freq, sizeof(str_freq));
> + if (size != sizeof(str_freq)) {
> + dev_err(dai->dev, "%s: Failed to set SPI clock\n",
> + __func__);
> + return -EINVAL;
> + }
> + return 0;
> +}
> +
> +static const struct snd_soc_dai_ops stm32_adfsdm_dai_ops = {
> + .shutdown = stm32_adfsdm_shutdown,
> + .prepare = stm32_adfsdm_dai_prepare,
> + .set_sysclk = stm32_adfsdm_set_sysclk,
> +};
> +
> +static const struct snd_soc_dai_driver stm32_adfsdm_dai = {
> + .capture = {
> + .channels_min = 1,
> + .channels_max = 1,
> + .formats = SNDRV_PCM_FMTBIT_S32_LE,
> + .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
> + SNDRV_PCM_RATE_32000),
> + },
> + .ops = &stm32_adfsdm_dai_ops,
> +};
> +
> +static const struct snd_soc_component_driver stm32_adfsdm_dai_component = {
> + .name = "stm32_dfsdm_audio",
> +};
> +
> +static int stm32_afsdm_pcm_cb(const void *data, size_t size, void *private)
> +{
> + struct stm32_adfsdm_priv *priv = private;
> + struct snd_soc_pcm_runtime *rtd = priv->substream->private_data;
> + u8 *pcm_buff = priv->pcm_buff;
> + u8 *src_buff = (u8 *)data;
> + unsigned int buff_size = snd_pcm_lib_buffer_bytes(priv->substream);
> + unsigned int period_size = snd_pcm_lib_period_bytes(priv->substream);
> + unsigned int old_pos = priv->pos;
> + unsigned int cur_size = size;
> +
> + dev_dbg(rtd->dev, "%s: buff_add :%p, pos = %d, size = %zu\n",
> + __func__, &pcm_buff[priv->pos], priv->pos, size);
> +
> + if ((priv->pos + size) > buff_size) {
> + memcpy(&pcm_buff[priv->pos], src_buff, buff_size - priv->pos);
> + cur_size -= buff_size - priv->pos;
> + priv->pos = 0;
> + }
> +
> + memcpy(&pcm_buff[priv->pos], &src_buff[size - cur_size], cur_size);
> + priv->pos = (priv->pos + cur_size) % buff_size;
> +
> + if (cur_size != size || (old_pos && (old_pos % period_size < size)))
> + snd_pcm_period_elapsed(priv->substream);
> +
> + return 0;
> +}
> +
> +static int stm32_adfsdm_trigger(struct snd_pcm_substream *substream, int cmd)
> +{
> + struct snd_soc_pcm_runtime *rtd = substream->private_data;
> + struct stm32_adfsdm_priv *priv =
> + snd_soc_dai_get_drvdata(rtd->cpu_dai);
> +
> + switch (cmd) {
> + case SNDRV_PCM_TRIGGER_START:
> + case SNDRV_PCM_TRIGGER_RESUME:
> + priv->pos = 0;
> + return stm32_dfsdm_get_buff_cb(priv->iio_ch->indio_dev,
> + stm32_afsdm_pcm_cb, priv);
> + case SNDRV_PCM_TRIGGER_SUSPEND:
> + case SNDRV_PCM_TRIGGER_STOP:
> + return stm32_dfsdm_release_buff_cb(priv->iio_ch->indio_dev);
> + }
> +
> + return -EINVAL;
> +}
> +
> +static int stm32_adfsdm_pcm_open(struct snd_pcm_substream *substream)
> +{
> + struct snd_soc_pcm_runtime *rtd = substream->private_data;
> + struct stm32_adfsdm_priv *priv = snd_soc_dai_get_drvdata(rtd->cpu_dai);
> + int ret;
> +
> + ret = snd_soc_set_runtime_hwparams(substream, &stm32_adfsdm_pcm_hw);
> + if (!ret)
> + priv->substream = substream;
> +
> + return ret;
> +}
> +
> +static int stm32_adfsdm_pcm_close(struct snd_pcm_substream *substream)
> +{
> + struct snd_soc_pcm_runtime *rtd = substream->private_data;
> + struct stm32_adfsdm_priv *priv =
> + snd_soc_dai_get_drvdata(rtd->cpu_dai);
> +
> + snd_pcm_lib_free_pages(substream);
> + priv->substream = NULL;
> +
> + return 0;
> +}
> +
> +static snd_pcm_uframes_t stm32_adfsdm_pcm_pointer(
> + struct snd_pcm_substream *substream)
> +{
> + struct snd_soc_pcm_runtime *rtd = substream->private_data;
> + struct stm32_adfsdm_priv *priv =
> + snd_soc_dai_get_drvdata(rtd->cpu_dai);
> +
> + return bytes_to_frames(substream->runtime, priv->pos);
> +}
> +
> +static int stm32_adfsdm_pcm_hw_params(struct snd_pcm_substream *substream,
> + struct snd_pcm_hw_params *params)
> +{
> + struct snd_soc_pcm_runtime *rtd = substream->private_data;
> + struct stm32_adfsdm_priv *priv =
> + snd_soc_dai_get_drvdata(rtd->cpu_dai);
> + int ret;
> +
> + ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
> + if (ret < 0)
> + return ret;
> + priv->pcm_buff = substream->runtime->dma_area;
> +
> + return iio_channel_cb_set_buffer_watermark(priv->iio_cb,
> + params_period_size(params));
> +}
> +
> +static int stm32_adfsdm_pcm_hw_free(struct snd_pcm_substream *substream)
> +{
> + snd_pcm_lib_free_pages(substream);
> +
> + return 0;
> +}
> +
> +static struct snd_pcm_ops stm32_adfsdm_pcm_ops = {
> + .open = stm32_adfsdm_pcm_open,
> + .close = stm32_adfsdm_pcm_close,
> + .hw_params = stm32_adfsdm_pcm_hw_params,
> + .hw_free = stm32_adfsdm_pcm_hw_free,
> + .trigger = stm32_adfsdm_trigger,
> + .pointer = stm32_adfsdm_pcm_pointer,
> +};
> +
> +static int stm32_adfsdm_pcm_new(struct snd_soc_pcm_runtime *rtd)
> +{
> + struct snd_pcm *pcm = rtd->pcm;
> + struct stm32_adfsdm_priv *priv =
> + snd_soc_dai_get_drvdata(rtd->cpu_dai);
> + unsigned int size = DFSDM_MAX_PERIODS * DFSDM_MAX_PERIOD_SIZE;
> +
> + return snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
> + priv->dev, size, size);
> +}
> +
> +static void stm32_adfsdm_pcm_free(struct snd_pcm *pcm)
> +{
> + struct snd_pcm_substream *substream;
> + struct snd_soc_pcm_runtime *rtd;
> + struct stm32_adfsdm_priv *priv;
> +
> + substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
> + if (substream) {
> + rtd = substream->private_data;
> + priv = snd_soc_dai_get_drvdata(rtd->cpu_dai);
> +
> + snd_pcm_lib_preallocate_free_for_all(pcm);
> + }
> +}
> +
> +static struct snd_soc_platform_driver stm32_adfsdm_soc_platform = {
> + .ops = &stm32_adfsdm_pcm_ops,
> + .pcm_new = stm32_adfsdm_pcm_new,
> + .pcm_free = stm32_adfsdm_pcm_free,
> +};
> +
> +static const struct of_device_id stm32_adfsdm_of_match[] = {
> + {.compatible = "st,stm32h7-dfsdm-dai"},
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, stm32_adfsdm_of_match);
> +
> +static int stm32_adfsdm_probe(struct platform_device *pdev)
> +{
> + struct stm32_adfsdm_priv *priv;
> + int ret;
> +
> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + priv->dev = &pdev->dev;
> + priv->dai_drv = stm32_adfsdm_dai;
> +
> + dev_set_drvdata(&pdev->dev, priv);
> +
> + ret = devm_snd_soc_register_component(&pdev->dev,
> + &stm32_adfsdm_dai_component,
> + &priv->dai_drv, 1);
> + if (ret < 0)
> + return ret;
> +
> + /* Associate iio channel */
> + priv->iio_ch = devm_iio_channel_get_all(&pdev->dev);
> + if (IS_ERR(priv->iio_ch))
> + return PTR_ERR(priv->iio_ch);
> +
> + priv->iio_cb = iio_channel_get_all_cb(&pdev->dev, NULL, NULL);
> + if (IS_ERR(priv->iio_cb))
> + return PTR_ERR(priv->iio_ch);
> +
> + ret = devm_snd_soc_register_platform(&pdev->dev,
> + &stm32_adfsdm_soc_platform);
> + if (ret < 0)
> + dev_err(&pdev->dev, "%s: Failed to register PCM platform\n",
> + __func__);
> +
> + return ret;
> +}
> +
> +static struct platform_driver stm32_adfsdm_driver = {
> + .driver = {
> + .name = STM32_ADFSDM_DRV_NAME,
> + .of_match_table = stm32_adfsdm_of_match,
> + },
> + .probe = stm32_adfsdm_probe,
> +};
> +
> +module_platform_driver(stm32_adfsdm_driver);
> +
> +MODULE_DESCRIPTION("stm32 DFSDM DAI driver");
> +MODULE_AUTHOR("Arnaud Pouliquen <arnaud.pouliquen@st.com>");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:" STM32_ADFSDM_DRV_NAME);
^ permalink raw reply
* [PATCH v9 10/13] IIO: ADC: add stm32 DFSDM support for PDM microphone
From: Jonathan Cameron @ 2017-12-17 12:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513241885-32079-11-git-send-email-arnaud.pouliquen@st.com>
On Thu, 14 Dec 2017 09:58:02 +0100
Arnaud Pouliquen <arnaud.pouliquen@st.com> wrote:
> This code offers a way to handle PDM audio microphones in
> ASOC framework. Audio driver should use consumer API.
> A specific management is implemented for DMA, with a
> callback, to allows to handle audio buffers efficiently.
>
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Looks good ;)
> ---
> V8 to V9
> - Create stm32_dfsdm_dma_request
> - Replace devm_of_platform_populate by of_platform_populate.
> - Reorder probe and remove sequences.
>
> .../ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32 | 16 +
> drivers/iio/adc/stm32-dfsdm-adc.c | 502 ++++++++++++++++++++-
> include/linux/iio/adc/stm32-dfsdm-adc.h | 18 +
> 3 files changed, 529 insertions(+), 7 deletions(-)
> create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32
> create mode 100644 include/linux/iio/adc/stm32-dfsdm-adc.h
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32 b/Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32
> new file mode 100644
> index 0000000..da98223
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32
> @@ -0,0 +1,16 @@
> +What: /sys/bus/iio/devices/iio:deviceX/in_voltage_spi_clk_freq
> +KernelVersion: 4.14
> +Contact: arnaud.pouliquen at st.com
> +Description:
> + For audio purpose only.
> + Used by audio driver to set/get the spi input frequency.
> + This is mandatory if DFSDM is slave on SPI bus, to
> + provide information on the SPI clock frequency during runtime
> + Notice that the SPI frequency should be a multiple of sample
> + frequency to ensure the precision.
> + if DFSDM input is SPI master
> + Reading SPI clkout frequency,
> + error on writing
> + If DFSDM input is SPI Slave:
> + Reading returns value previously set.
> + Writing value before starting conversions.
> \ No newline at end of file
> diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c
> index 68b5920..b03ca3f 100644
> --- a/drivers/iio/adc/stm32-dfsdm-adc.c
> +++ b/drivers/iio/adc/stm32-dfsdm-adc.c
> @@ -6,19 +6,23 @@
> * Author: Arnaud Pouliquen <arnaud.pouliquen@st.com>.
> */
>
> +#include <linux/dmaengine.h>
> +#include <linux/dma-mapping.h>
> #include <linux/interrupt.h>
> #include <linux/iio/buffer.h>
> #include <linux/iio/hw-consumer.h>
> #include <linux/iio/iio.h>
> #include <linux/iio/sysfs.h>
> #include <linux/module.h>
> -#include <linux/of.h>
> +#include <linux/of_device.h>
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
> #include <linux/slab.h>
>
> #include "stm32-dfsdm.h"
>
> +#define DFSDM_DMA_BUFFER_SIZE (4 * PAGE_SIZE)
> +
> /* Conversion timeout */
> #define DFSDM_TIMEOUT_US 100000
> #define DFSDM_TIMEOUT (msecs_to_jiffies(DFSDM_TIMEOUT_US / 1000))
> @@ -58,6 +62,18 @@ struct stm32_dfsdm_adc {
> struct completion completion;
> u32 *buffer;
>
> + /* Audio specific */
> + unsigned int spi_freq; /* SPI bus clock frequency */
> + unsigned int sample_freq; /* Sample frequency after filter decimation */
> + int (*cb)(const void *data, size_t size, void *cb_priv);
> + void *cb_priv;
> +
> + /* DMA */
> + u8 *rx_buf;
> + unsigned int bufi; /* Buffer current position */
> + unsigned int buf_sz; /* Buffer size */
> + struct dma_chan *dma_chan;
> + dma_addr_t dma_buf;
> };
>
> struct stm32_dfsdm_str2field {
> @@ -351,10 +367,63 @@ int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm,
> return 0;
> }
>
> +static ssize_t dfsdm_adc_audio_get_spiclk(struct iio_dev *indio_dev,
> + uintptr_t priv,
> + const struct iio_chan_spec *chan,
> + char *buf)
> +{
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> +
> + return snprintf(buf, PAGE_SIZE, "%d\n", adc->spi_freq);
> +}
> +
> +static ssize_t dfsdm_adc_audio_set_spiclk(struct iio_dev *indio_dev,
> + uintptr_t priv,
> + const struct iio_chan_spec *chan,
> + const char *buf, size_t len)
> +{
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> + struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id];
> + struct stm32_dfsdm_channel *ch = &adc->dfsdm->ch_list[adc->ch_id];
> + unsigned int sample_freq = adc->sample_freq;
> + unsigned int spi_freq;
> + int ret;
> +
> + dev_err(&indio_dev->dev, "enter %s\n", __func__);
> + /* If DFSDM is master on SPI, SPI freq can not be updated */
> + if (ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
> + return -EPERM;
> +
> + ret = kstrtoint(buf, 0, &spi_freq);
> + if (ret)
> + return ret;
> +
> + if (!spi_freq)
> + return -EINVAL;
> +
> + if (sample_freq) {
> + if (spi_freq % sample_freq)
> + dev_warn(&indio_dev->dev,
> + "Sampling rate not accurate (%d)\n",
> + spi_freq / (spi_freq / sample_freq));
> +
> + ret = stm32_dfsdm_set_osrs(fl, 0, (spi_freq / sample_freq));
> + if (ret < 0) {
> + dev_err(&indio_dev->dev,
> + "No filter parameters that match!\n");
> + return ret;
> + }
> + }
> + adc->spi_freq = spi_freq;
> +
> + return len;
> +}
> +
> static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc, bool dma)
> {
> struct regmap *regmap = adc->dfsdm->regmap;
> int ret;
> + unsigned int dma_en = 0, cont_en = 0;
>
> ret = stm32_dfsdm_start_channel(adc->dfsdm, adc->ch_id);
> if (ret < 0)
> @@ -365,6 +434,24 @@ static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc, bool dma)
> if (ret < 0)
> goto stop_channels;
>
> + if (dma) {
> + /* Enable DMA transfer*/
> + dma_en = DFSDM_CR1_RDMAEN(1);
> + /* Enable conversion triggered by SPI clock*/
> + cont_en = DFSDM_CR1_RCONT(1);
> + }
> + /* Enable DMA transfer*/
> + ret = regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
> + DFSDM_CR1_RDMAEN_MASK, dma_en);
> + if (ret < 0)
> + goto stop_channels;
> +
> + /* Enable conversion triggered by SPI clock*/
> + ret = regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
> + DFSDM_CR1_RCONT_MASK, cont_en);
> + if (ret < 0)
> + goto stop_channels;
> +
> ret = stm32_dfsdm_start_filter(adc->dfsdm, adc->fl_id);
> if (ret < 0)
> goto stop_channels;
> @@ -398,6 +485,231 @@ static void stm32_dfsdm_stop_conv(struct stm32_dfsdm_adc *adc)
> stm32_dfsdm_stop_channel(adc->dfsdm, adc->ch_id);
> }
>
> +static int stm32_dfsdm_set_watermark(struct iio_dev *indio_dev,
> + unsigned int val)
> +{
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> + unsigned int watermark = DFSDM_DMA_BUFFER_SIZE / 2;
> +
> + /*
> + * DMA cyclic transfers are used, buffer is split into two periods.
> + * There should be :
> + * - always one buffer (period) DMA is working on
> + * - one buffer (period) driver pushed to ASoC side.
> + */
> + watermark = min(watermark, val * (unsigned int)(sizeof(u32)));
> + adc->buf_sz = watermark * 2;
> +
> + return 0;
> +}
> +
> +static unsigned int stm32_dfsdm_adc_dma_residue(struct stm32_dfsdm_adc *adc)
> +{
> + struct dma_tx_state state;
> + enum dma_status status;
> +
> + status = dmaengine_tx_status(adc->dma_chan,
> + adc->dma_chan->cookie,
> + &state);
> + if (status == DMA_IN_PROGRESS) {
> + /* Residue is size in bytes from end of buffer */
> + unsigned int i = adc->buf_sz - state.residue;
> + unsigned int size;
> +
> + /* Return available bytes */
> + if (i >= adc->bufi)
> + size = i - adc->bufi;
> + else
> + size = adc->buf_sz + i - adc->bufi;
> +
> + return size;
> + }
> +
> + return 0;
> +}
> +
> +static void stm32_dfsdm_audio_dma_buffer_done(void *data)
> +{
> + struct iio_dev *indio_dev = data;
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> + int available = stm32_dfsdm_adc_dma_residue(adc);
> + size_t old_pos;
> +
> + /*
> + * FIXME: In Kernel interface does not support cyclic DMA buffer,and
> + * offers only an interface to push data samples per samples.
> + * For this reason IIO buffer interface is not used and interface is
> + * bypassed using a private callback registered by ASoC.
> + * This should be a temporary solution waiting a cyclic DMA engine
> + * support in IIO.
> + */
> +
> + dev_dbg(&indio_dev->dev, "%s: pos = %d, available = %d\n", __func__,
> + adc->bufi, available);
> + old_pos = adc->bufi;
> +
> + while (available >= indio_dev->scan_bytes) {
> + u32 *buffer = (u32 *)&adc->rx_buf[adc->bufi];
> +
> + /* Mask 8 LSB that contains the channel ID */
> + *buffer = (*buffer & 0xFFFFFF00) << 8;
> + available -= indio_dev->scan_bytes;
> + adc->bufi += indio_dev->scan_bytes;
> + if (adc->bufi >= adc->buf_sz) {
> + if (adc->cb)
> + adc->cb(&adc->rx_buf[old_pos],
> + adc->buf_sz - old_pos, adc->cb_priv);
> + adc->bufi = 0;
> + old_pos = 0;
> + }
> + }
> + if (adc->cb)
> + adc->cb(&adc->rx_buf[old_pos], adc->bufi - old_pos,
> + adc->cb_priv);
> +}
> +
> +static int stm32_dfsdm_adc_dma_start(struct iio_dev *indio_dev)
> +{
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> + struct dma_async_tx_descriptor *desc;
> + dma_cookie_t cookie;
> + int ret;
> +
> + if (!adc->dma_chan)
> + return -EINVAL;
> +
> + dev_dbg(&indio_dev->dev, "%s size=%d watermark=%d\n", __func__,
> + adc->buf_sz, adc->buf_sz / 2);
> +
> + /* Prepare a DMA cyclic transaction */
> + desc = dmaengine_prep_dma_cyclic(adc->dma_chan,
> + adc->dma_buf,
> + adc->buf_sz, adc->buf_sz / 2,
> + DMA_DEV_TO_MEM,
> + DMA_PREP_INTERRUPT);
> + if (!desc)
> + return -EBUSY;
> +
> + desc->callback = stm32_dfsdm_audio_dma_buffer_done;
> + desc->callback_param = indio_dev;
> +
> + cookie = dmaengine_submit(desc);
> + ret = dma_submit_error(cookie);
> + if (ret) {
> + dmaengine_terminate_all(adc->dma_chan);
> + return ret;
> + }
> +
> + /* Issue pending DMA requests */
> + dma_async_issue_pending(adc->dma_chan);
> +
> + return 0;
> +}
> +
> +static int stm32_dfsdm_postenable(struct iio_dev *indio_dev)
> +{
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> + int ret;
> +
> + /* Reset adc buffer index */
> + adc->bufi = 0;
> +
> + ret = stm32_dfsdm_start_dfsdm(adc->dfsdm);
> + if (ret < 0)
> + return ret;
> +
> + ret = stm32_dfsdm_start_conv(adc, true);
> + if (ret) {
> + dev_err(&indio_dev->dev, "Can't start conversion\n");
> + goto stop_dfsdm;
> + }
> +
> + if (adc->dma_chan) {
> + ret = stm32_dfsdm_adc_dma_start(indio_dev);
> + if (ret) {
> + dev_err(&indio_dev->dev, "Can't start DMA\n");
> + goto err_stop_conv;
> + }
> + }
> +
> + return 0;
> +
> +err_stop_conv:
> + stm32_dfsdm_stop_conv(adc);
> +stop_dfsdm:
> + stm32_dfsdm_stop_dfsdm(adc->dfsdm);
> +
> + return ret;
> +}
> +
> +static int stm32_dfsdm_predisable(struct iio_dev *indio_dev)
> +{
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> +
> + if (adc->dma_chan)
> + dmaengine_terminate_all(adc->dma_chan);
> +
> + stm32_dfsdm_stop_conv(adc);
> +
> + stm32_dfsdm_stop_dfsdm(adc->dfsdm);
> +
> + return 0;
> +}
> +
> +static const struct iio_buffer_setup_ops stm32_dfsdm_buffer_setup_ops = {
> + .postenable = &stm32_dfsdm_postenable,
> + .predisable = &stm32_dfsdm_predisable,
> +};
> +
> +/**
> + * stm32_dfsdm_get_buff_cb() - register a callback that will be called when
> + * DMA transfer period is achieved.
> + *
> + * @iio_dev: Handle to IIO device.
> + * @cb: Pointer to callback function:
> + * - data: pointer to data buffer
> + * - size: size in byte of the data buffer
> + * - private: pointer to consumer private structure.
> + * @private: Pointer to consumer private structure.
> + */
> +int stm32_dfsdm_get_buff_cb(struct iio_dev *iio_dev,
> + int (*cb)(const void *data, size_t size,
> + void *private),
> + void *private)
> +{
> + struct stm32_dfsdm_adc *adc;
> +
> + if (!iio_dev)
> + return -EINVAL;
> + adc = iio_priv(iio_dev);
> +
> + adc->cb = cb;
> + adc->cb_priv = private;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(stm32_dfsdm_get_buff_cb);
> +
> +/**
> + * stm32_dfsdm_release_buff_cb - unregister buffer callback
> + *
> + * @iio_dev: Handle to IIO device.
> + */
> +int stm32_dfsdm_release_buff_cb(struct iio_dev *iio_dev)
> +{
> + struct stm32_dfsdm_adc *adc;
> +
> + if (!iio_dev)
> + return -EINVAL;
> + adc = iio_priv(iio_dev);
> +
> + adc->cb = NULL;
> + adc->cb_priv = NULL;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(stm32_dfsdm_release_buff_cb);
> +
> static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev,
> const struct iio_chan_spec *chan, int *res)
> {
> @@ -453,15 +765,41 @@ static int stm32_dfsdm_write_raw(struct iio_dev *indio_dev,
> {
> struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id];
> + struct stm32_dfsdm_channel *ch = &adc->dfsdm->ch_list[adc->ch_id];
> + unsigned int spi_freq = adc->spi_freq;
> int ret = -EINVAL;
>
> - if (mask == IIO_CHAN_INFO_OVERSAMPLING_RATIO) {
> + switch (mask) {
> + case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
> ret = stm32_dfsdm_set_osrs(fl, 0, val);
> if (!ret)
> adc->oversamp = val;
> +
> + return ret;
> +
> + case IIO_CHAN_INFO_SAMP_FREQ:
> + if (!val)
> + return -EINVAL;
> + if (ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
> + spi_freq = adc->dfsdm->spi_master_freq;
> +
> + if (spi_freq % val)
> + dev_warn(&indio_dev->dev,
> + "Sampling rate not accurate (%d)\n",
> + spi_freq / (spi_freq / val));
> +
> + ret = stm32_dfsdm_set_osrs(fl, 0, (spi_freq / val));
> + if (ret < 0) {
> + dev_err(&indio_dev->dev,
> + "Not able to find parameter that match!\n");
> + return ret;
> + }
> + adc->sample_freq = val;
> +
> + return 0;
> }
>
> - return ret;
> + return -EINVAL;
> }
>
> static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev,
> @@ -494,11 +832,22 @@ static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev,
> *val = adc->oversamp;
>
> return IIO_VAL_INT;
> +
> + case IIO_CHAN_INFO_SAMP_FREQ:
> + *val = adc->sample_freq;
> +
> + return IIO_VAL_INT;
> }
>
> return -EINVAL;
> }
>
> +static const struct iio_info stm32_dfsdm_info_audio = {
> + .hwfifo_set_watermark = stm32_dfsdm_set_watermark,
> + .read_raw = stm32_dfsdm_read_raw,
> + .write_raw = stm32_dfsdm_write_raw,
> +};
> +
> static const struct iio_info stm32_dfsdm_info_adc = {
> .read_raw = stm32_dfsdm_read_raw,
> .write_raw = stm32_dfsdm_write_raw,
> @@ -531,6 +880,70 @@ static irqreturn_t stm32_dfsdm_irq(int irq, void *arg)
> return IRQ_HANDLED;
> }
>
> +/*
> + * Define external info for SPI Frequency and audio sampling rate that can be
> + * configured by ASoC driver through consumer.h API
> + */
> +static const struct iio_chan_spec_ext_info dfsdm_adc_audio_ext_info[] = {
> + /* spi_clk_freq : clock freq on SPI/manchester bus used by channel */
> + {
> + .name = "spi_clk_freq",
> + .shared = IIO_SHARED_BY_TYPE,
> + .read = dfsdm_adc_audio_get_spiclk,
> + .write = dfsdm_adc_audio_set_spiclk,
> + },
> + {},
> +};
> +
> +static void stm32_dfsdm_dma_release(struct iio_dev *indio_dev)
> +{
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> +
> + if (adc->dma_chan) {
> + dma_free_coherent(adc->dma_chan->device->dev,
> + DFSDM_DMA_BUFFER_SIZE,
> + adc->rx_buf, adc->dma_buf);
> + dma_release_channel(adc->dma_chan);
> + }
> +}
> +
> +static int stm32_dfsdm_dma_request(struct iio_dev *indio_dev)
> +{
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> + struct dma_slave_config config = {
> + .src_addr = (dma_addr_t)adc->dfsdm->phys_base +
> + DFSDM_RDATAR(adc->fl_id),
> + .src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
> + };
> + int ret;
> +
> + adc->dma_chan = dma_request_slave_channel(&indio_dev->dev, "rx");
> + if (!adc->dma_chan)
> + return -EINVAL;
> +
> + adc->rx_buf = dma_alloc_coherent(adc->dma_chan->device->dev,
> + DFSDM_DMA_BUFFER_SIZE,
> + &adc->dma_buf, GFP_KERNEL);
> + if (!adc->rx_buf) {
> + ret = -ENOMEM;
> + goto err_release;
> + }
> +
> + ret = dmaengine_slave_config(adc->dma_chan, &config);
> + if (ret)
> + goto err_free;
> +
> + return 0;
> +
> +err_free:
> + dma_free_coherent(adc->dma_chan->device->dev, DFSDM_DMA_BUFFER_SIZE,
> + adc->rx_buf, adc->dma_buf);
> +err_release:
> + dma_release_channel(adc->dma_chan);
> +
> + return ret;
> +}
> +
> static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev,
> struct iio_chan_spec *ch)
> {
> @@ -551,7 +964,12 @@ static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev,
> ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
> ch->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
>
> - ch->scan_type.sign = 'u';
> + if (adc->dev_data->type == DFSDM_AUDIO) {
> + ch->scan_type.sign = 's';
> + ch->ext_info = dfsdm_adc_audio_ext_info;
> + } else {
> + ch->scan_type.sign = 'u';
> + }
> ch->scan_type.realbits = 24;
> ch->scan_type.storagebits = 32;
> adc->ch_id = ch->channel;
> @@ -560,6 +978,39 @@ static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev,
> &adc->dfsdm->ch_list[ch->channel]);
> }
>
> +static int stm32_dfsdm_audio_init(struct iio_dev *indio_dev)
> +{
> + struct iio_chan_spec *ch;
> + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
> + struct stm32_dfsdm_channel *d_ch;
> + int ret;
> +
> + indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
> + indio_dev->setup_ops = &stm32_dfsdm_buffer_setup_ops;
> +
> + ch = devm_kzalloc(&indio_dev->dev, sizeof(*ch), GFP_KERNEL);
> + if (!ch)
> + return -ENOMEM;
> +
> + ch->scan_index = 0;
> +
> + ret = stm32_dfsdm_adc_chan_init_one(indio_dev, ch);
> + if (ret < 0) {
> + dev_err(&indio_dev->dev, "Channels init failed\n");
> + return ret;
> + }
> + ch->info_mask_separate = BIT(IIO_CHAN_INFO_SAMP_FREQ);
> +
> + d_ch = &adc->dfsdm->ch_list[adc->ch_id];
> + if (d_ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
> + adc->spi_freq = adc->dfsdm->spi_master_freq;
> +
> + indio_dev->num_channels = 1;
> + indio_dev->channels = ch;
> +
> + return stm32_dfsdm_dma_request(indio_dev);
> +}
> +
> static int stm32_dfsdm_adc_init(struct iio_dev *indio_dev)
> {
> struct iio_chan_spec *ch;
> @@ -612,11 +1063,20 @@ static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_adc_data = {
> .init = stm32_dfsdm_adc_init,
> };
>
> +static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_audio_data = {
> + .type = DFSDM_AUDIO,
> + .init = stm32_dfsdm_audio_init,
> +};
> +
> static const struct of_device_id stm32_dfsdm_adc_match[] = {
> {
> .compatible = "st,stm32-dfsdm-adc",
> .data = &stm32h7_dfsdm_adc_data,
> },
> + {
> + .compatible = "st,stm32-dfsdm-dmic",
> + .data = &stm32h7_dfsdm_audio_data,
> + },
> {}
> };
>
> @@ -667,8 +1127,13 @@ static int stm32_dfsdm_adc_probe(struct platform_device *pdev)
> name = devm_kzalloc(dev, sizeof("dfsdm-adc0"), GFP_KERNEL);
> if (!name)
> return -ENOMEM;
> - iio->info = &stm32_dfsdm_info_adc;
> - snprintf(name, sizeof("dfsdm-adc0"), "dfsdm-adc%d", adc->fl_id);
> + if (dev_data->type == DFSDM_AUDIO) {
> + iio->info = &stm32_dfsdm_info_audio;
> + snprintf(name, sizeof("dfsdm-pdm0"), "dfsdm-pdm%d", adc->fl_id);
> + } else {
> + iio->info = &stm32_dfsdm_info_adc;
> + snprintf(name, sizeof("dfsdm-adc0"), "dfsdm-adc%d", adc->fl_id);
> + }
> iio->name = name;
>
> /*
> @@ -700,7 +1165,27 @@ static int stm32_dfsdm_adc_probe(struct platform_device *pdev)
> if (ret < 0)
> return ret;
>
> - return iio_device_register(iio);
> + ret = iio_device_register(iio);
> + if (ret < 0)
> + goto err_cleanup;
> +
> + dev_err(dev, "of_platform_populate\n");
> + if (dev_data->type == DFSDM_AUDIO) {
> + ret = of_platform_populate(np, NULL, NULL, dev);
> + if (ret < 0) {
> + dev_err(dev, "Failed to find an audio DAI\n");
> + goto err_unregister;
> + }
> + }
> +
> + return 0;
> +
> +err_unregister:
> + iio_device_unregister(iio);
> +err_cleanup:
> + stm32_dfsdm_dma_release(iio);
> +
> + return ret;
> }
>
> static int stm32_dfsdm_adc_remove(struct platform_device *pdev)
> @@ -708,7 +1193,10 @@ static int stm32_dfsdm_adc_remove(struct platform_device *pdev)
> struct stm32_dfsdm_adc *adc = platform_get_drvdata(pdev);
> struct iio_dev *indio_dev = iio_priv_to_dev(adc);
>
> + if (adc->dev_data->type == DFSDM_AUDIO)
> + of_platform_depopulate(&pdev->dev);
> iio_device_unregister(indio_dev);
> + stm32_dfsdm_dma_release(indio_dev);
>
> return 0;
> }
> diff --git a/include/linux/iio/adc/stm32-dfsdm-adc.h b/include/linux/iio/adc/stm32-dfsdm-adc.h
> new file mode 100644
> index 0000000..e7dc7a5
> --- /dev/null
> +++ b/include/linux/iio/adc/stm32-dfsdm-adc.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * This file discribe the STM32 DFSDM IIO driver API for audio part
> + *
> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
> + * Author(s): Arnaud Pouliquen <arnaud.pouliquen@st.com>.
> + */
> +
> +#ifndef STM32_DFSDM_ADC_H
> +#define STM32_DFSDM_ADC_H
> +
> +int stm32_dfsdm_get_buff_cb(struct iio_dev *iio_dev,
> + int (*cb)(const void *data, size_t size,
> + void *private),
> + void *private);
> +int stm32_dfsdm_release_buff_cb(struct iio_dev *iio_dev);
> +
> +#endif
^ permalink raw reply
* pxa3xx_nand times out in 4.14 with JFFS2
From: Boris Brezillon @ 2017-12-17 12:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171217120503.GA3323@1wt.eu>
Hi Willy,
On Sun, 17 Dec 2017 13:05:03 +0100
Willy Tarreau <w@1wt.eu> wrote:
> Hello,
>
> I recently bought a Linksys WRT1900ACS which hosts an Armada 385 and a
> NAND flash. While I could get OpenWRT to work flawlessly on it using
> kernel 4.4, mainline 4.14.6 fails with a lot of such messages :
>
> pxa3xx-nand f10d0000.flash: Wait time out!!!
>
> Looking a bit closer, I found that it was triggered by my boot scripts
> detecting the JFFS2 signature (0x1985) and trying to mount mtdblock5. But
> under openwrt's kernel this partition mounts pretty fine.
>
> I tried to read both /dev/mtd5 and /dev/mtdblock5 it using cat then dd
> and got no issue either, so it seems that JFFS2 triggers a specific
> operation causing the flash (or driver) to fail. By the way, here's the
> device identification :
>
> [ 0.638155] pxa3xx-nand f10d0000.flash: This platform can't do DMA on this device
> [ 0.644661] nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1
> [ 0.649732] nand: AMD/Spansion S34ML01G2
> [ 0.652369] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
> [ 0.658662] pxa3xx-nand f10d0000.flash: ECC strength 16, ECC step size 2048
>
> I found a few threads on the net where people were changing the timeout
> in the driver, and OpenWRT has this larger timeout, so naturally I thought
> it was the way to fix it and I tried, but surprizingly nothing changed at
> all.
>
> I found a long troubleshooting session in the list's archives where
> CONFIG_PREEMPT had to be enabled to work around the problem here :
>
> https://patchwork.ozlabs.org/patch/566837/
>
> So I tried to enable it as well but it didn't change anything for me.
>
> I enabled Robert's readl/writel debug traces and have added some messages
> at the entrance and exit of every single function in the driver to try to
> spot a bit more of it. I've placed the traces there :
>
> http://1wt.eu/wrt1900acs/
>
> (Please note that the config above doesn't have PREEMPT enabled but it
> matches the kernel used to produce the dumps there). Also you'll notice
> in the config that I added the out-of-tree mwlwifi driver; I did it late
> in the evening after I spent my whole day trying to fix the NAND issue,
> so it's irrelevant. However if some prefer that I re-run traces without
> it I will.
>
> I purposely split the trace in two steps : one before trying to mount the
> JFFS2 fs, and the second one during and after the mount attempt. I also
> took another trace with JFFS2 debuging enabled in case that helps.
>
> I noticed that timeouts always occur after such a sequence :
>
> > pxa3xx_nand_irq:845
> pxa3xx-nand f10d0000.flash: pxa3xx_nand_irq():854 nand_readl(0x0014) = 0x2
> < pxa3xx_nand_irq:932
> < pxa3xx_nand_irq:933
> > pxa3xx_nand_irq_thread:829
> > handle_data_pio:728
> > drain_fifo:693
> < drain_fifo:723
> > drain_fifo:693
> < drain_fifo:723
> < handle_data_pio:761
> pxa3xx-nand f10d0000.flash: pxa3xx_nand_irq_thread():833 nand_writel(0x6, 0x0014)
> < pxa3xx_nand_irq_thread:835
>
> So in short we enter pxa3xx_nand_irq, read register 0x0014 and find 2,
> then later we enter pxa3xx_nand_irq_thread(), handle_data_pio(), leave
> it, and issue a nand_writel() to register 0x0014 and leave
> pxa3xx_nand_irq_thread(). And at this point we wait till the timeout
> strikes (apparently the CHIP_DELAY_TIMEOUT since I'm observing 2 seconds
> and that's what it's set to).
>
> Interestingly, this morning I left the machine hung like this and came
> back 20 minutes later to find that mtdblock5 had finally been successfully
> mounted (1322 seconds later precisely). I don't know if something suddenly
> decided to work, or if an operation is performed 650 times and waits for
> this 2 second timeout for each operation. I've left it running again to
> see if it happens again.
>
> I have not tested 4.15-rc3 on it yet, though the only change to the
> driver is irrelevant to this issue. I also didn't go back to older
> kernels as I'm not sure when this machine was supposed to start to be
> supported (the DTS came in 4.12 but given that people started to complain
> about the timeout in openwrt's 4.4, it's not clear).
>
> At this point I'm out of ideas so if anyone wants me to test specific
> config options to report more info, or to test patches, they're welcome!
> There's no emergency for me to get this machine to work properly, it's
> expected to replace my current one, but only once it works, so in the
> mean time it's more of a development platform lying on my desk :-)
You should have a look at this thread [1], and in case you don't want
to read everything, you can just test the solution proposed here [2].
[1]http://linux-mtd.infradead.narkive.com/Rd5UaRPO/bug-pxa3xx-wait-time-out-when-scanning-for-bb
[2]http://patchwork.ozlabs.org/patch/847411/
^ permalink raw reply
* pxa3xx_nand times out in 4.14 with JFFS2
From: Willy Tarreau @ 2017-12-17 12:05 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
I recently bought a Linksys WRT1900ACS which hosts an Armada 385 and a
NAND flash. While I could get OpenWRT to work flawlessly on it using
kernel 4.4, mainline 4.14.6 fails with a lot of such messages :
pxa3xx-nand f10d0000.flash: Wait time out!!!
Looking a bit closer, I found that it was triggered by my boot scripts
detecting the JFFS2 signature (0x1985) and trying to mount mtdblock5. But
under openwrt's kernel this partition mounts pretty fine.
I tried to read both /dev/mtd5 and /dev/mtdblock5 it using cat then dd
and got no issue either, so it seems that JFFS2 triggers a specific
operation causing the flash (or driver) to fail. By the way, here's the
device identification :
[ 0.638155] pxa3xx-nand f10d0000.flash: This platform can't do DMA on this device
[ 0.644661] nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1
[ 0.649732] nand: AMD/Spansion S34ML01G2
[ 0.652369] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
[ 0.658662] pxa3xx-nand f10d0000.flash: ECC strength 16, ECC step size 2048
I found a few threads on the net where people were changing the timeout
in the driver, and OpenWRT has this larger timeout, so naturally I thought
it was the way to fix it and I tried, but surprizingly nothing changed at
all.
I found a long troubleshooting session in the list's archives where
CONFIG_PREEMPT had to be enabled to work around the problem here :
https://patchwork.ozlabs.org/patch/566837/
So I tried to enable it as well but it didn't change anything for me.
I enabled Robert's readl/writel debug traces and have added some messages
at the entrance and exit of every single function in the driver to try to
spot a bit more of it. I've placed the traces there :
http://1wt.eu/wrt1900acs/
(Please note that the config above doesn't have PREEMPT enabled but it
matches the kernel used to produce the dumps there). Also you'll notice
in the config that I added the out-of-tree mwlwifi driver; I did it late
in the evening after I spent my whole day trying to fix the NAND issue,
so it's irrelevant. However if some prefer that I re-run traces without
it I will.
I purposely split the trace in two steps : one before trying to mount the
JFFS2 fs, and the second one during and after the mount attempt. I also
took another trace with JFFS2 debuging enabled in case that helps.
I noticed that timeouts always occur after such a sequence :
> pxa3xx_nand_irq:845
pxa3xx-nand f10d0000.flash: pxa3xx_nand_irq():854 nand_readl(0x0014) = 0x2
< pxa3xx_nand_irq:932
< pxa3xx_nand_irq:933
> pxa3xx_nand_irq_thread:829
> handle_data_pio:728
> drain_fifo:693
< drain_fifo:723
> drain_fifo:693
< drain_fifo:723
< handle_data_pio:761
pxa3xx-nand f10d0000.flash: pxa3xx_nand_irq_thread():833 nand_writel(0x6, 0x0014)
< pxa3xx_nand_irq_thread:835
So in short we enter pxa3xx_nand_irq, read register 0x0014 and find 2,
then later we enter pxa3xx_nand_irq_thread(), handle_data_pio(), leave
it, and issue a nand_writel() to register 0x0014 and leave
pxa3xx_nand_irq_thread(). And@this point we wait till the timeout
strikes (apparently the CHIP_DELAY_TIMEOUT since I'm observing 2 seconds
and that's what it's set to).
Interestingly, this morning I left the machine hung like this and came
back 20 minutes later to find that mtdblock5 had finally been successfully
mounted (1322 seconds later precisely). I don't know if something suddenly
decided to work, or if an operation is performed 650 times and waits for
this 2 second timeout for each operation. I've left it running again to
see if it happens again.
I have not tested 4.15-rc3 on it yet, though the only change to the
driver is irrelevant to this issue. I also didn't go back to older
kernels as I'm not sure when this machine was supposed to start to be
supported (the DTS came in 4.12 but given that people started to complain
about the timeout in openwrt's 4.4, it's not clear).
At this point I'm out of ideas so if anyone wants me to test specific
config options to report more info, or to test patches, they're welcome!
There's no emergency for me to get this machine to work properly, it's
expected to replace my current one, but only once it works, so in the
mean time it's more of a development platform lying on my desk :-)
Thanks,
Willy
^ permalink raw reply
* [PATCH] net: ethernet: fix call_kern.cocci warnings
From: Julia Lawall @ 2017-12-17 6:43 UTC (permalink / raw)
To: linux-arm-kernel
From: Fengguang Wu <fengguang.wu@intel.com>
Allocation with GFP_KERNEL in code called from the function
geth_resize_freeq with locks held.
Generated by: scripts/coccinelle/locks/call_kern.cocci
Fixes: 502a2864e5e4 ("net: ethernet: Add a driver for Gemini gigabit ethernet")
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Julia Lawall <julia.lawall@lip6.fr>
---
The proposed change of converting the GFP_KERNEL is not necessarily the
correct one. It may be desired to unlock the lock, or to not call the
function under the lock in the first place.
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git
gemini-ethernet
head: 502a2864e5e43c51a3a2689586d9c61d060a3b7d
commit: 502a2864e5e43c51a3a2689586d9c61d060a3b7d [18/18] net: ethernet:
Add a driver for Gemini gigabit ethernet
gemini.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/net/ethernet/cortina/gemini.c
+++ b/drivers/net/ethernet/cortina/gemini.c
@@ -818,7 +818,7 @@ static int geth_setup_freeq(struct gemin
geth->freeq_ring = dma_alloc_coherent(geth->dev,
sizeof(*geth->freeq_ring) << geth->freeq_order,
- &geth->freeq_dma_base, GFP_KERNEL);
+ &geth->freeq_dma_base, GFP_ATOMIC);
if (!geth->freeq_ring)
return -ENOMEM;
if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) {
@@ -827,7 +827,7 @@ static int geth_setup_freeq(struct gemin
}
geth->freeq_page_tab = kzalloc(pages * sizeof(*geth->freeq_page_tab),
- GFP_KERNEL);
+ GFP_ATOMIC);
if (!geth->freeq_page_tab)
goto err_freeq;
^ permalink raw reply
* [arm-platforms:kvm-arm64/haslr 8/23] arch/arm64/include/asm/asm-offsets.h:2:10: fatal error: generated/asm-offsets.h: No such file or directory
From: kbuild test robot @ 2017-12-17 2:38 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/haslr
head: 8d0cd2e88233536ddbbc037bf50477a1dcbc035f
commit: 3061497dd692751c9e1fc3b9ffcede947ac55288 [8/23] arm64: alternatives: Enforce alignment of struct alt_instr
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 3061497dd692751c9e1fc3b9ffcede947ac55288
# save the attached .config to linux build tree
make.cross ARCH=arm64
All errors (new ones prefixed by >>):
In file included from arch/arm64/include/asm/alternative.h:5:0,
from arch/arm64/include/asm/lse.h:8,
from arch/arm64/include/asm/atomic.h:27,
from include/linux/atomic.h:5,
from include/linux/debug_locks.h:6,
from include/linux/lockdep.h:28,
from include/linux/spinlock_types.h:18,
from kernel/bounds.c:14:
>> arch/arm64/include/asm/asm-offsets.h:2:10: fatal error: generated/asm-offsets.h: No such file or directory
#include <generated/asm-offsets.h>
^~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[2]: *** [kernel/bounds.s] Error 1
make[2]: Target '__build' not remade because of errors.
make[1]: *** [prepare0] Error 2
make[1]: Target 'prepare' not remade because of errors.
make: *** [sub-make] Error 2
vim +2 arch/arm64/include/asm/asm-offsets.h
0be7320a Catalin Marinas 2012-03-05 @2 #include <generated/asm-offsets.h>
:::::: The code at line 2 was first introduced by commit
:::::: 0be7320a635c2e434e8b67e0e9474a85ceb421c4 arm64: Assembly macros and definitions
:::::: TO: Catalin Marinas <catalin.marinas@arm.com>
:::::: CC: Catalin Marinas <catalin.marinas@arm.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH] ARM: dts: sun8i-a83t-tbs-a711: Add missing axp813 compatible
From: megous at megous.com @ 2017-12-17 1:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Ondrej Jirman <megous@megous.com>
Without this the AXP813 PMIC fails to probe on TBS A711.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index e6b00b3774e3..76be9d43f906 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -479,6 +479,7 @@
status = "okay";
axp81x: pmic at 3a3 {
+ compatible = "x-powers,axp813";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
--
2.15.1
^ permalink raw reply related
* [nomadik:gemini-ethernet 18/18] drivers/net//ethernet/cortina/gemini.c:715:22: error: implicit declaration of function 'dma_to_pfn'
From: kbuild test robot @ 2017-12-16 22:48 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git gemini-ethernet
head: 502a2864e5e43c51a3a2689586d9c61d060a3b7d
commit: 502a2864e5e43c51a3a2689586d9c61d060a3b7d [18/18] net: ethernet: Add a driver for Gemini gigabit ethernet
config: openrisc-allmodconfig (attached as .config)
compiler: or1k-linux-gcc (GCC) 6.0.0 20160327 (experimental)
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 502a2864e5e43c51a3a2689586d9c61d060a3b7d
# save the attached .config to linux build tree
make.cross ARCH=openrisc
All errors (new ones prefixed by >>):
In file included from arch/openrisc/include/asm/page.h:98:0,
from arch/openrisc/include/asm/processor.h:23,
from arch/openrisc/include/asm/thread_info.h:26,
from include/linux/thread_info.h:38,
from include/asm-generic/preempt.h:5,
from ./arch/openrisc/include/generated/asm/preempt.h:1,
from include/linux/preempt.h:81,
from include/linux/spinlock.h:51,
from include/linux/seqlock.h:36,
from include/linux/time.h:6,
from include/linux/stat.h:19,
from include/linux/module.h:10,
from drivers/net//ethernet/cortina/gemini.c:16:
drivers/net//ethernet/cortina/gemini.c: In function 'gmac_cleanup_rxq':
>> drivers/net//ethernet/cortina/gemini.c:715:22: error: implicit declaration of function 'dma_to_pfn' [-Werror=implicit-function-declaration]
page = pfn_to_page(dma_to_pfn(geth->dev, mapping));
^
include/asm-generic/memory_model.h:33:41: note: in definition of macro '__pfn_to_page'
#define __pfn_to_page(pfn) (mem_map + ((pfn) - ARCH_PFN_OFFSET))
^~~
drivers/net//ethernet/cortina/gemini.c:715:10: note: in expansion of macro 'pfn_to_page'
page = pfn_to_page(dma_to_pfn(geth->dev, mapping));
^~~~~~~~~~~
In file included from drivers/net//ethernet/cortina/gemini.c:16:0:
drivers/net//ethernet/cortina/gemini.c: At top level:
include/linux/module.h:129:42: error: redefinition of '__inittest'
static inline initcall_t __maybe_unused __inittest(void) \
^
include/linux/device.h:1513:1: note: in expansion of macro 'module_init'
module_init(__driver##_init); \
^~~~~~~~~~~
include/linux/platform_device.h:228:2: note: in expansion of macro 'module_driver'
module_driver(__platform_driver, platform_driver_register, \
^~~~~~~~~~~~~
drivers/net//ethernet/cortina/gemini.c:2465:1: note: in expansion of macro 'module_platform_driver'
module_platform_driver(gemini_ethernet_driver);
^~~~~~~~~~~~~~~~~~~~~~
include/linux/module.h:129:42: note: previous definition of '__inittest' was here
static inline initcall_t __maybe_unused __inittest(void) \
^
include/linux/device.h:1513:1: note: in expansion of macro 'module_init'
module_init(__driver##_init); \
^~~~~~~~~~~
include/linux/platform_device.h:228:2: note: in expansion of macro 'module_driver'
module_driver(__platform_driver, platform_driver_register, \
^~~~~~~~~~~~~
drivers/net//ethernet/cortina/gemini.c:2393:1: note: in expansion of macro 'module_platform_driver'
module_platform_driver(gemini_ethernet_port_driver);
^~~~~~~~~~~~~~~~~~~~~~
include/linux/module.h:131:6: error: redefinition of 'init_module'
int init_module(void) __attribute__((alias(#initfn)));
^
include/linux/device.h:1513:1: note: in expansion of macro 'module_init'
module_init(__driver##_init); \
^~~~~~~~~~~
include/linux/platform_device.h:228:2: note: in expansion of macro 'module_driver'
module_driver(__platform_driver, platform_driver_register, \
^~~~~~~~~~~~~
drivers/net//ethernet/cortina/gemini.c:2465:1: note: in expansion of macro 'module_platform_driver'
module_platform_driver(gemini_ethernet_driver);
^~~~~~~~~~~~~~~~~~~~~~
include/linux/module.h:131:6: note: previous definition of 'init_module' was here
int init_module(void) __attribute__((alias(#initfn)));
^
include/linux/device.h:1513:1: note: in expansion of macro 'module_init'
module_init(__driver##_init); \
^~~~~~~~~~~
include/linux/platform_device.h:228:2: note: in expansion of macro 'module_driver'
module_driver(__platform_driver, platform_driver_register, \
^~~~~~~~~~~~~
drivers/net//ethernet/cortina/gemini.c:2393:1: note: in expansion of macro 'module_platform_driver'
module_platform_driver(gemini_ethernet_port_driver);
^~~~~~~~~~~~~~~~~~~~~~
include/linux/module.h:135:42: error: redefinition of '__exittest'
static inline exitcall_t __maybe_unused __exittest(void) \
^
include/linux/device.h:1518:1: note: in expansion of macro 'module_exit'
module_exit(__driver##_exit);
^~~~~~~~~~~
include/linux/platform_device.h:228:2: note: in expansion of macro 'module_driver'
module_driver(__platform_driver, platform_driver_register, \
^~~~~~~~~~~~~
drivers/net//ethernet/cortina/gemini.c:2465:1: note: in expansion of macro 'module_platform_driver'
module_platform_driver(gemini_ethernet_driver);
^~~~~~~~~~~~~~~~~~~~~~
include/linux/module.h:135:42: note: previous definition of '__exittest' was here
static inline exitcall_t __maybe_unused __exittest(void) \
^
include/linux/device.h:1518:1: note: in expansion of macro 'module_exit'
module_exit(__driver##_exit);
^~~~~~~~~~~
include/linux/platform_device.h:228:2: note: in expansion of macro 'module_driver'
module_driver(__platform_driver, platform_driver_register, \
^~~~~~~~~~~~~
drivers/net//ethernet/cortina/gemini.c:2393:1: note: in expansion of macro 'module_platform_driver'
module_platform_driver(gemini_ethernet_port_driver);
^~~~~~~~~~~~~~~~~~~~~~
include/linux/module.h:137:7: error: redefinition of 'cleanup_module'
void cleanup_module(void) __attribute__((alias(#exitfn)));
^
include/linux/device.h:1518:1: note: in expansion of macro 'module_exit'
module_exit(__driver##_exit);
^~~~~~~~~~~
include/linux/platform_device.h:228:2: note: in expansion of macro 'module_driver'
module_driver(__platform_driver, platform_driver_register, \
^~~~~~~~~~~~~
drivers/net//ethernet/cortina/gemini.c:2465:1: note: in expansion of macro 'module_platform_driver'
module_platform_driver(gemini_ethernet_driver);
^~~~~~~~~~~~~~~~~~~~~~
include/linux/module.h:137:7: note: previous definition of 'cleanup_module' was here
void cleanup_module(void) __attribute__((alias(#exitfn)));
^
include/linux/device.h:1518:1: note: in expansion of macro 'module_exit'
module_exit(__driver##_exit);
^~~~~~~~~~~
vim +/dma_to_pfn +715 drivers/net//ethernet/cortina/gemini.c
681
682 static void gmac_cleanup_rxq(struct net_device *netdev)
683 {
684 struct gemini_ethernet_port *port = netdev_priv(netdev);
685 struct gemini_ethernet *geth = port->geth;
686 struct gmac_rxdesc *rxd = port->rxq_ring;
687 struct nontoe_qhdr __iomem *qhdr;
688 void __iomem *dma_reg;
689 void __iomem *ptr_reg;
690 dma_addr_t mapping;
691 union dma_rwptr rw;
692 unsigned int r, w;
693 struct page *page;
694
695 qhdr = geth->base +
696 TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
697 dma_reg = &qhdr->word0;
698 ptr_reg = &qhdr->word1;
699
700 rw.bits32 = readl(ptr_reg);
701 r = rw.bits.rptr;
702 w = rw.bits.wptr;
703 writew(r, ptr_reg + 2);
704
705 writel(0, dma_reg);
706
707 while (r != w) {
708 mapping = rxd[r].word2.buf_adr;
709 r++;
710 r &= ((1 << port->rxq_order) - 1);
711
712 if (!mapping)
713 continue;
714
> 715 page = pfn_to_page(dma_to_pfn(geth->dev, mapping));
716 put_page(page);
717 }
718
719 dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order,
720 port->rxq_ring, port->rxq_dma_base);
721 }
722
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH] divers/soc/ti: fix max dup length for kstrndup
From: santosh.shilimkar at oracle.com @ 2017-12-16 22:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171212092935.20211-1-mashimiao.fnst@cn.fujitsu.com>
On 12/12/17 1:29 AM, Ma Shimiao wrote:
> If source string longer than max, kstrndup will alloc max+1 space.
> So, we should make sure the result will not over limit.
>
> Signed-off-by: Ma Shimiao <mashimiao.fnst@cn.fujitsu.com>
> ---
Applied. Thanks !!
^ permalink raw reply
* [PATCH] firmware: ti_sci: Use %zu for size_t print format
From: santosh.shilimkar at oracle.com @ 2017-12-16 22:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171202102012.354-1-nm@ti.com>
On 12/2/17 2:20 AM, Nishanth Menon wrote:
> mbox_msg->len is of type size_t and %d is incorrect format. Instead
> use %zu for handling size_t correctly.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
Applied to 'for_4.16/drivers-soc' with Lokesh's ack.
^ permalink raw reply
* [PATCH V2 0/8] ARM: dts: keystone*: Stage 1 cleanup for W=1
From: santosh.shilimkar at oracle.com @ 2017-12-16 22:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171216204040.18017-1-nm@ti.com>
On 12/16/17 12:40 PM, Nishanth Menon wrote:
> Hi,
> The following changes have been done in the updated series:
> * Updates for couple few typo errors in commit messages
> * copyrights are now always behind description
> * rebased to maintainer branch (was previously against master)
>
> Rebased to:
> git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
> for_4.16/keystone-dts : 7fbec17465fc ARM: dts: k2g-evm: Enable UART 2
>
Thanks Nishant. Applied and should show up in next soon.
Regards,
Santosh
^ permalink raw reply
* [PATCH v3 05/11] thermal: armada: Add support for Armada AP806
From: Baruch Siach @ 2017-12-16 22:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171214103011.24713-6-miquel.raynal@free-electrons.com>
Hi Miqu?l,
On Thu, Dec 14, 2017 at 11:30:05AM +0100, Miquel Raynal wrote:
> From: Baruch Siach <baruch@tkos.co.il>
>
> The AP806 component is integrated in the Armada 8k and 7k lines of
> processors.
>
> The thermal sensor sample field on the status register is a signed
> value. Extend armada_get_temp() to handle signed values.
>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> ---
[...]
> +static void armada_ap806_init_sensor(struct platform_device *pdev,
> + struct armada_thermal_priv *priv)
> +{
> + u32 reg;
> +
> + if (!priv->control0) {
> + dev_err(&pdev->dev,
> + "Cannot access to control0 (control LSB) register\n");
> + return;
> + }
With the probe time control area size validation this check would not be
needed.
baruch
> +
> + reg = readl_relaxed(priv->control0);
> + reg &= ~CONTROL0_TSEN_RESET;
> + reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE;
> + writel(reg, priv->control0);
> + msleep(10);
> +}
--
http://baruch.siach.name/blog/ ~. .~ Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
- baruch at tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -
^ permalink raw reply
* [PATCH v3 04/11] thermal: armada: Rationalize register accesses
From: Baruch Siach @ 2017-12-16 22:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171214103011.24713-5-miquel.raynal@free-electrons.com>
Hi Miqu?l,
On Thu, Dec 14, 2017 at 11:30:04AM +0100, Miquel Raynal wrote:
> Bindings were incomplete for a long time by only exposing one of the two
> available control registers. To ease the migration to the full bindings
> (already in use for the Armada 375 SoC), rename the pointers for
> clarification. This way, it will only be needed to add another pointer
> to access the other control register when the time comes.
>
> This avoids dangerous situations where the offset 0 of the control
> area can be either one register or the other depending on the bindings
> used. After this change, device trees of other SoCs could be migrated to
> the "full" bindings if they may benefit from features from the
> unaccessible register, without any change in the driver.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> ---
[...]
> + /*
> + * Legacy DT bindings only described "control1" register (also referred
> + * as "control MSB" on old documentation). New bindings cover
> + * "control0/control LSB" and "control1/control MSB" registers within
> + * the same resource, which is then of size 8 instead of 4.
> + */
> + if ((res->end - res->start) == LEGACY_CONTROL_MEM_LEN) {
> + /* ->control0 unavailable in this configuration */
> + priv->control1 = control + LEGACY_CONTROL1_OFFSET;
> + } else {
> + priv->control0 = control + CONTROL0_OFFSET;
> + priv->control1 = control + CONTROL1_OFFSET;
> + }
I think we need to add a check here that the control registers area size
matches the expected value given the compatible string. In case of mismatch
probe should fail.
> priv->data = (struct armada_thermal_data *)match->data;
> priv->data->init_sensor(pdev, priv);
baruch
--
http://baruch.siach.name/blog/ ~. .~ Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
- baruch at tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -
^ permalink raw reply
* [PATCH 19/25] arm: mt7: dts: Remove leading 0x and 0s from bindings notation
From: Matthias Brugger @ 2017-12-16 21:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171215124652.30852-1-malat@debian.org>
On 12/15/2017 01:46 PM, Mathieu Malaterre wrote:
> Improve the DTS files by removing all the leading "0x" and zeros to fix the
> following dtc warnings:
>
> Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
>
> and
>
> Warning (unit_address_format): Node /XXX unit name should not have leading 0s
>
> Converted using the following command:
>
> find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
>
> For simplicity, two sed expressions were used to solve each warnings separately.
>
> To make the regex expression more robust a few other issues were resolved,
> namely setting unit-address to lower case, and adding a whitespace before the
> the opening curly brace:
>
> https://elinux.org/Device_Tree_Linux#Linux_conventions
>
> This will solve as a side effect warning:
>
> Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
>
> This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
>
> Reported-by: David Daney <ddaney@caviumnetworks.com>
> Suggested-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Mathieu Malaterre <malat@debian.org>
> ---
> arch/arm/boot/dts/mt7623n-rfb-nand.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Pushed to v4.15-next/dts32
Thanks a lot,
Matthias
^ permalink raw reply
* [PATCH] ARM: dts: sun9i: Enable USB support on Cubieboard4
From: Mark Kettenis @ 2017-12-16 20:58 UTC (permalink / raw)
To: linux-arm-kernel
On the Cubieboard4 HCI0 is directly connected to a USB connector,
and HCI2 is connected to a USB hub on the board. HCI1 is available
with HSIC throug 2 pins on the GPIO expansion header, but left
disabled just like on the Optimus board.
This patch also adds the VBUS regulators.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 36 +++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index 4024639aa005..e38623265695 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -74,6 +74,24 @@
};
};
+ reg_usb1_vbus: usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb2-drvbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */
+ };
+
+ reg_usb3_vbus: usb3-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-drvbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&pio 7 14 GPIO_ACTIVE_HIGH>; /* PH14 */
+ };
+
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
@@ -83,6 +101,14 @@
};
};
+&ehci0 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -408,3 +434,13 @@
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
+
+&usbphy1 {
+ phy-supply = <®_usb1_vbus>;
+ status = "okay";
+};
+
+&usbphy3 {
+ phy-supply = <®_usb3_vbus>;
+ status = "okay";
+};
--
2.15.1
^ permalink raw reply related
* [PATCH V2 8/8] ARM: dts: keystone-k2l-clocks: Add missing unit name to clock nodes that have regs
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171216204040.18017-1-nm@ti.com>
Add the control register as the base for the clock nodes which are
missing them. This squashes some 22 warnings of the effect when built
with W=1.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes since V1: rebase
V1: https://patchwork.kernel.org/patch/10115123/
arch/arm/boot/dts/keystone-k2l-clocks.dtsi | 44 +++++++++++++++---------------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-k2l-clocks.dtsi b/arch/arm/boot/dts/keystone-k2l-clocks.dtsi
index b3f82040a722..635528064dea 100644
--- a/arch/arm/boot/dts/keystone-k2l-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l-clocks.dtsi
@@ -41,7 +41,7 @@ clocks {
reg-names = "control";
};
- clkdfeiqnsys: clkdfeiqnsys {
+ clkdfeiqnsys: clkdfeiqnsys at 2350004 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -51,7 +51,7 @@ clocks {
domain-id = <0>;
};
- clkpcie1: clkpcie1 {
+ clkpcie1: clkpcie1 at 235002c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -61,7 +61,7 @@ clocks {
domain-id = <4>;
};
- clkgem1: clkgem1 {
+ clkgem1: clkgem1 at 2350040 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -71,7 +71,7 @@ clocks {
domain-id = <9>;
};
- clkgem2: clkgem2 {
+ clkgem2: clkgem2 at 2350044 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -81,7 +81,7 @@ clocks {
domain-id = <10>;
};
- clkgem3: clkgem3 {
+ clkgem3: clkgem3 at 2350048 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -91,7 +91,7 @@ clocks {
domain-id = <11>;
};
- clktac: clktac {
+ clktac: clktac at 2350064 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -101,7 +101,7 @@ clocks {
domain-id = <17>;
};
- clkrac: clkrac {
+ clkrac: clkrac at 2350068 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -111,7 +111,7 @@ clocks {
domain-id = <17>;
};
- clkdfepd0: clkdfepd0 {
+ clkdfepd0: clkdfepd0 at 235006c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -121,7 +121,7 @@ clocks {
domain-id = <18>;
};
- clkfftc0: clkfftc0 {
+ clkfftc0: clkfftc0 at 2350070 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -131,7 +131,7 @@ clocks {
domain-id = <19>;
};
- clkosr: clkosr {
+ clkosr: clkosr at 2350088 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -141,7 +141,7 @@ clocks {
domain-id = <21>;
};
- clktcp3d0: clktcp3d0 {
+ clktcp3d0: clktcp3d0 at 235008c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -151,7 +151,7 @@ clocks {
domain-id = <22>;
};
- clktcp3d1: clktcp3d1 {
+ clktcp3d1: clktcp3d1 at 2350094 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -161,7 +161,7 @@ clocks {
domain-id = <23>;
};
- clkvcp0: clkvcp0 {
+ clkvcp0: clkvcp0 at 235009c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -171,7 +171,7 @@ clocks {
domain-id = <24>;
};
- clkvcp1: clkvcp1 {
+ clkvcp1: clkvcp1 at 23500a0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -181,7 +181,7 @@ clocks {
domain-id = <24>;
};
- clkvcp2: clkvcp2 {
+ clkvcp2: clkvcp2 at 23500a4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -191,7 +191,7 @@ clocks {
domain-id = <24>;
};
- clkvcp3: clkvcp3 {
+ clkvcp3: clkvcp3 at 23500a8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -201,7 +201,7 @@ clocks {
domain-id = <24>;
};
- clkbcp: clkbcp {
+ clkbcp: clkbcp at 23500bc {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -211,7 +211,7 @@ clocks {
domain-id = <26>;
};
- clkdfepd1: clkdfepd1 {
+ clkdfepd1: clkdfepd1 at 23500c0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -221,7 +221,7 @@ clocks {
domain-id = <27>;
};
- clkfftc1: clkfftc1 {
+ clkfftc1: clkfftc1 at 23500c4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -231,7 +231,7 @@ clocks {
domain-id = <28>;
};
- clkiqnail: clkiqnail {
+ clkiqnail: clkiqnail at 23500c8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -241,7 +241,7 @@ clocks {
domain-id = <29>;
};
- clkuart2: clkuart2 {
+ clkuart2: clkuart2 at 2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -251,7 +251,7 @@ clocks {
domain-id = <0>;
};
- clkuart3: clkuart3 {
+ clkuart3: clkuart3 at 2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
--
2.14.1
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