* [RFC PATCH 2/2] ASoC: select sysclk clock from mlck clock provider in wm8994 driver
From: Mark Brown @ 2017-12-19 9:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <43426b67-3546-8422-7fcb-9fa1ff192679@st.com>
On Fri, Dec 15, 2017 at 03:15:22PM +0000, Olivier MOYSAN wrote:
> You are right. wm8994 allows to select either MCLK for each AIF.
> From this point of view, the current patch is too limiting.
> MCLK information in DT allows to enforce MCLK use, but an additionnal
> information is required to determine AIF MCLK assignment.
> Available properties in codec DAI node, such as clocks property, cannot
> help here.
> Maybe a DAPM linked to a control is a better way to select AIF source,
> When source is not provided by clk_id in wm8994_set_dai_sysclk().
> In this case, wm8994_set_dai_sysclk() would only have to check
> if clock source is not already set.
> Please let me know if this option sounds better to you.
What are you trying to accomplish here? You appear to be trying to move
the system clocking configuration from the machine driver to the CODEC
which is not how things are supposed to work.
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^ permalink raw reply
* [PATCH v5 7/9] arm64: Topology, rename cluster_id
From: Morten Rasmussen @ 2017-12-19 9:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171218154703.GA8157@red-moon>
On Mon, Dec 18, 2017 at 03:47:03PM +0000, Lorenzo Pieralisi wrote:
> On Mon, Dec 18, 2017 at 12:42:29PM +0000, Morten Rasmussen wrote:
> > On Fri, Dec 15, 2017 at 10:36:35AM -0600, Jeremy Linton wrote:
> > > Hi,
> > >
> > > On 12/13/2017 12:02 PM, Lorenzo Pieralisi wrote:
> > > >[+Morten, Dietmar]
> > > >
> > > >$SUBJECT should be:
> > > >
> > > >arm64: topology: rename cluster_id
> > >
> > > Sure..
> > >
> > > >
> > > >On Fri, Dec 01, 2017 at 04:23:28PM -0600, Jeremy Linton wrote:
> > > >>Lets match the name of the arm64 topology field
> > > >>to the kernel macro that uses it.
> > > >>
> > > >>Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> > > >>---
> > > >> arch/arm64/include/asm/topology.h | 4 ++--
> > > >> arch/arm64/kernel/topology.c | 27 ++++++++++++++-------------
> > > >> 2 files changed, 16 insertions(+), 15 deletions(-)
> > > >>
> > > >>diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h
> > > >>index c4f2d50491eb..118136268f66 100644
> > > >>--- a/arch/arm64/include/asm/topology.h
> > > >>+++ b/arch/arm64/include/asm/topology.h
> > > >>@@ -7,14 +7,14 @@
> > > >> struct cpu_topology {
> > > >> int thread_id;
> > > >> int core_id;
> > > >>- int cluster_id;
> > > >>+ int physical_id;
> > > >
> > > >package_id ?
> > >
> > > Given the macro is topology_physical_package_id, either makes sense to me.
> > > <shrug> I will change it in the next set.
> >
> > I would vote for package_id too. arch/arm has 'socket_id' though.
> >
> > > >
> > > >It has been debated before, I know. Should we keep the cluster_id too
> > > >(even if it would be 1:1 mapped to package_id - for now) ?
> > >
> > > Well given that this patch replaces the patch that did that at your
> > > request..
> > >
> > > I was hoping someone else would comment here, but my take at this point is
> > > that it doesn't really matter in a functional sense at the moment.
> > > Like the chiplet discussion it can be the subject of a future patch along
> > > with the patches which tweak the scheduler to understand the split.
> > >
> > > BTW, given that i'm OoO next week, and the following that are the holidays,
> > > I don't intend to repost this for a couple weeks. I don't think there are
> > > any issues with this set.
> > >
> > > >
> > > >There is also arch/arm to take into account, again, this patch is
> > > >just renaming (as it should have named since the beginning) a
> > > >topology level but we should consider everything from a legacy
> > > >perspective.
> >
> > arch/arm has gone for thread/core/socket for the three topology levels
> > it supports.
> >
> > I'm not sure what short term value keeping cluster_id has? Isn't it just
> > about where we make the package = cluster assignment? Currently it is in
> > the definition of topology_physical_package_id. If we keep cluster_id
> > and add package_id, it gets moved into the MPIDR/DT parsing code.
> >
> > Keeping cluster_id and introducing a topology_cluster_id function could
> > help cleaning up some of the users of topology_physical_package_id that
> > currently assumes package_id == cluster_id though.
>
> I think we should settle for a name (eg package_id), remove cluster_id
> and convert arch/arm socket_id to the same naming used on arm64 (for
> consistency - it is just a variable rename).
Agreed.
> This leaves us with the naming "cluster" only in DT topology bindings,
> which should be fine, given that "cluster" in that context is just a
> "processor-container" - yes we could have chosen a better naming in
> the first place but that's what it is.
I think having "clusters" in DT is fine as it represent the actual
hardware topology and uses the actual "Arm" term to describe it. The
default topology in Linux just doesn't have an equivalent topology
level, but that can be fixed. DT is however missing a notion of package.
> We should nuke the existing users of topology_physical_package_id()
> to identify clusters, I would not add another function for that purpose,
> let's nip it in the bud.
Even better if that can be pulled of.
Morten
^ permalink raw reply
* [RFC PATCH v2] draft for gpio pinconf
From: Ludovic Desroches @ 2017-12-19 9:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171214142138.23008-1-ludovic.desroches@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
---
Hi,
After discussing with Maxime Ripard, I realize that the first approach
may not be a good one.
For instance, the drive-strength is a digital value so it will take
ake several bits. Having a whole pin configuration in 32 bits may not
be the right solution.
My aim is to use the existing pinconf bindings.
This patch is a draft to test the feasibility. Sorry to provide it in
this state (several ugly hacks) but I didn't want to spend time on a clean
solution if it will be rejected.
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 6 +-----
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
drivers/gpio/gpiolib-of.c | 10 +++++++++-
drivers/gpio/gpiolib.c | 24 +++++++++++++++++++-----
drivers/gpio/gpiolib.h | 2 ++
drivers/pinctrl/core.c | 5 ++---
drivers/pinctrl/pinctrl-at91-pio4.c | 19 +++++++++++++++++++
include/linux/gpio/driver.h | 5 +++--
include/linux/pinctrl/consumer.h | 4 ++--
9 files changed, 58 insertions(+), 19 deletions(-)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index 56de21de2779..709c9c3ae622 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -413,7 +413,6 @@
};
pinctrl_key_gpio_default: key_gpio_default {
- pinmux = <PIN_PB9__GPIO>;
bias-pull-up;
};
@@ -545,12 +544,9 @@
gpio_keys {
compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_key_gpio_default>;
-
bp1 {
label = "PB_USER";
- gpios = <&pioA PIN_PB9 GPIO_ACTIVE_LOW>;
+ gpios = <&pioA PIN_PB9 GPIO_ACTIVE_LOW &pinctrl_key_gpio_default>;
linux,code = <0x104>;
wakeup-source;
};
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index b44e63995583..cccd404192cc 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -1444,7 +1444,7 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
- #gpio-cells = <2>;
+ #gpio-cells = <3>;
clocks = <&pioA_clk>;
};
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 4a2b8d3397c7..605017a4d2d8 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -46,7 +46,7 @@ static struct gpio_desc *of_xlate_and_get_gpiod_flags(struct gpio_chip *chip,
{
int ret;
- if (chip->of_gpio_n_cells != gpiospec->args_count)
+ if (chip->of_gpio_n_cells > gpiospec->args_count)
return ERR_PTR(-EINVAL);
ret = chip->of_xlate(chip, gpiospec, flags);
@@ -93,6 +93,14 @@ struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
if (IS_ERR(desc))
goto out;
+ if (gpiospec.args_count > chip->of_gpio_n_cells) {
+ desc->np_pincfg = of_parse_phandle(np, propname, gpiospec.args_count);
+ if (!desc->np_pincfg) {
+ printk("ERROR\n");
+ goto out;
+ }
+ }
+
pr_debug("%s: parsed '%s' property of node '%pOF[%d]' - status (%d)\n",
__func__, propname, np, index,
PTR_ERR_OR_ZERO(desc));
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 0621baddfddc..543a120a0f84 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -29,6 +29,8 @@
#include <uapi/linux/gpio.h>
#include "gpiolib.h"
+#include "../pinctrl/core.h"
+#include "../pinctrl/pinconf.h"
#define CREATE_TRACE_POINTS
#include <trace/events/gpio.h>
@@ -1997,9 +1999,9 @@ EXPORT_SYMBOL_GPL(gpiochip_generic_free);
* @config: the configuration to be applied
*/
int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
- unsigned long config)
+ unsigned long *configs, unsigned num_configs)
{
- return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config);
+ return pinctrl_gpio_set_config(chip->gpiodev->base + offset, configs, num_configs);
}
EXPORT_SYMBOL_GPL(gpiochip_generic_config);
@@ -2161,6 +2163,18 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
goto done;
}
}
+ if (chip->set_config) {
+ unsigned long *configs;
+ unsigned num_configs;
+ int ret;
+
+ ret = pinconf_generic_parse_dt_config(desc->np_pincfg, NULL, &configs, &num_configs);
+ if (ret < 0) {
+ /* TODO */
+ }
+ chip->set_config(chip, gpio_chip_hwgpio(desc), configs, num_configs);
+ kfree(configs);
+ }
if (chip->get_direction) {
/* chip->get_direction may sleep */
spin_unlock_irqrestore(&gpio_lock, flags);
@@ -2404,7 +2418,7 @@ static int gpio_set_drive_single_ended(struct gpio_chip *gc, unsigned offset,
{
unsigned long config = { PIN_CONF_PACKED(mode, 0) };
- return gc->set_config ? gc->set_config(gc, offset, config) : -ENOTSUPP;
+ return gc->set_config ? gc->set_config(gc, offset, &config, 1) : -ENOTSUPP;
}
static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
@@ -2529,7 +2543,7 @@ int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
}
config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
- return chip->set_config(chip, gpio_chip_hwgpio(desc), config);
+ return chip->set_config(chip, gpio_chip_hwgpio(desc), &config, 1);
}
EXPORT_SYMBOL_GPL(gpiod_set_debounce);
@@ -2565,7 +2579,7 @@ int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
!transitory);
gpio = gpio_chip_hwgpio(desc);
- rc = chip->set_config(chip, gpio, packed);
+ rc = chip->set_config(chip, gpio, &packed, 1);
if (rc == -ENOTSUPP) {
dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
gpio);
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index 5e1f7cc6eeb6..79119548cc33 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h
@@ -215,6 +215,8 @@ struct gpio_desc {
const char *label;
/* Name of the GPIO */
const char *name;
+ /* Pin configuration node */
+ struct device_node *np_pincfg;
};
int gpiod_request(struct gpio_desc *desc, const char *label);
diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
index 4c8d5b23e4d0..89976f35a6a3 100644
--- a/drivers/pinctrl/core.c
+++ b/drivers/pinctrl/core.c
@@ -857,9 +857,8 @@ EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output);
* they need to call the underlying pin controller to change GPIO config
* (for example set debounce time).
*/
-int pinctrl_gpio_set_config(unsigned gpio, unsigned long config)
+int pinctrl_gpio_set_config(unsigned gpio, unsigned long *configs, unsigned num_configs)
{
- unsigned long configs[] = { config };
struct pinctrl_gpio_range *range;
struct pinctrl_dev *pctldev;
int ret, pin;
@@ -870,7 +869,7 @@ int pinctrl_gpio_set_config(unsigned gpio, unsigned long config)
mutex_lock(&pctldev->mutex);
pin = gpio_to_pin(range, gpio);
- ret = pinconf_set_config(pctldev, pin, configs, ARRAY_SIZE(configs));
+ ret = pinconf_set_config(pctldev, pin, configs, num_configs);
mutex_unlock(&pctldev->mutex);
return ret;
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
index b1ca838dd80a..477a4d7ddbaf 100644
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -358,12 +358,15 @@ static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
}
static struct gpio_chip atmel_gpio_chip = {
+ .request = gpiochip_generic_request,
+ .free = gpiochip_generic_free,
.direction_input = atmel_gpio_direction_input,
.get = atmel_gpio_get,
.direction_output = atmel_gpio_direction_output,
.set = atmel_gpio_set,
.to_irq = atmel_gpio_to_irq,
.base = 0,
+ .set_config = gpiochip_generic_config,
};
/* --- PINCTRL --- */
@@ -643,11 +646,26 @@ static int atmel_pmx_set_mux(struct pinctrl_dev *pctldev,
return 0;
}
+static int atmel_pmx_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned offset)
+{
+ u32 conf;
+
+ conf = atmel_pin_config_read(pctldev, offset);
+ conf &= (~ATMEL_PIO_CFGR_FUNC_MASK);
+ atmel_pin_config_write(pctldev, offset, conf);
+
+ dev_dbg(pctldev->dev, "enable pin %u as GPIO\n", offset);
+
+ return 0;
+}
+
static const struct pinmux_ops atmel_pmxops = {
+ .gpio_request_enable = atmel_pmx_gpio_request_enable,
.get_functions_count = atmel_pmx_get_functions_count,
.get_function_name = atmel_pmx_get_function_name,
.get_function_groups = atmel_pmx_get_function_groups,
.set_mux = atmel_pmx_set_mux,
+ .strict = true,
};
static int atmel_conf_pin_config_group_get(struct pinctrl_dev *pctldev,
@@ -817,6 +835,7 @@ static void atmel_conf_pin_config_dbg_show(struct pinctrl_dev *pctldev,
}
static const struct pinconf_ops atmel_confops = {
+ .pin_config_set = atmel_conf_pin_config_group_set,
.pin_config_group_get = atmel_conf_pin_config_group_get,
.pin_config_group_set = atmel_conf_pin_config_group_set,
.pin_config_dbg_show = atmel_conf_pin_config_dbg_show,
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 55e672592fa9..b54968cd6dfc 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -247,7 +247,8 @@ struct gpio_chip {
unsigned long *bits);
int (*set_config)(struct gpio_chip *chip,
unsigned offset,
- unsigned long config);
+ unsigned long *configs,
+ unsigned num_configs);
int (*to_irq)(struct gpio_chip *chip,
unsigned offset);
@@ -490,7 +491,7 @@ static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset);
void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset);
int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
- unsigned long config);
+ unsigned long *configs, unsigned num_configs);
#ifdef CONFIG_PINCTRL
diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h
index 0412cc9833e9..14be53e1e053 100644
--- a/include/linux/pinctrl/consumer.h
+++ b/include/linux/pinctrl/consumer.h
@@ -29,7 +29,7 @@ extern int pinctrl_gpio_request(unsigned gpio);
extern void pinctrl_gpio_free(unsigned gpio);
extern int pinctrl_gpio_direction_input(unsigned gpio);
extern int pinctrl_gpio_direction_output(unsigned gpio);
-extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config);
+extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long *configs, unsigned num_configs);
extern struct pinctrl * __must_check pinctrl_get(struct device *dev);
extern void pinctrl_put(struct pinctrl *p);
@@ -81,7 +81,7 @@ static inline int pinctrl_gpio_direction_output(unsigned gpio)
return 0;
}
-static inline int pinctrl_gpio_set_config(unsigned gpio, unsigned long config)
+static inline int pinctrl_gpio_set_config(unsigned gpio, unsigned long *configs, unsigned num_configs)
{
return 0;
}
--
2.12.2
^ permalink raw reply related
* [PATCH 0/6] arm64: provide pseudo NMI with GICv3
From: Julien Thierry @ 2017-12-19 9:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512493912-37478-1-git-send-email-julien.thierry@arm.com>
Hi,
Just a little Christmas ping on this series.
Cheers,
On 05/12/17 17:11, Julien Thierry wrote:
> Hi,
>
> This series is a continuation of the work started by Daniel [1]. The goal is
> to use GICv3 interrupt priorities to simulate an NMI.
>
> To achieve this, set two priorities, one for standard interrupts and
> another, higher priority, for NMIs. Whenever we want to disable interrupts,
> we mask the standard priority instead so NMIs can still be raised. Some
> corner cases though still require to actually mask all interrupts
> effectively disabling the NMI.
>
> Of course, using priority masking instead of PSR.I comes at some cost. On
> hackbench, I notice a ~6-0% drop of performance. When I submitted the RFC,
> the drop seemed always present, now things seem more variable. On a kernel
> build, there still isn't any significan drop of performance.
> KVM Guests do not seem to be affected preformance-wise by the host using
> PMR to mask interrupts or not.
>
> Results when using this NMI for the arm_pmu interrupt are rather positive
> (at least for _raw_spin_unlock_irq_restore).
> Perf record on hackbench without NMI:
>
> # Overhead Command Symbol
> # ........ ............... ...........................................
> #
> 12.45% hackbench [k] _raw_spin_unlock_irqrestore
> 6.26% hackbench [k] el0_svc_naked
> 5.35% hackbench [k] unix_stream_read_generic
> 4.42% hackbench [k] __arch_copy_to_user
> 3.87% hackbench [k] refcount_inc_not_zero
> 3.70% hackbench [k] __slab_free
> 3.66% hackbench [k] _raw_spin_unlock_irq
> 3.53% hackbench [k] skb_release_data
> 3.10% hackbench [k] kmem_cache_free
> 2.90% hackbench [k] __lock_text_start
>
> Perf record on hackbench with PseudoNMI:
>
> # Overhead Command Symbol
> # ........ ............... .................................
> #
> 8.00% hackbench [k] _raw_spin_unlock_irqrestore
> 6.27% hackbench [k] el0_svc_naked
> 5.53% hackbench [k] unix_stream_read_generic
> 4.40% hackbench [k] __arch_copy_to_user
> 3.94% hackbench [k] refcount_inc_not_zero
> 3.47% hackbench [k] __slab_free
> 3.19% hackbench [k] kfree
> 3.11% hackbench [k] __lock_text_start
> 2.92% hackbench [k] kmem_cache_free
> 2.73% hackbench [.] 0x0000000000005258
>
>
> Currently, only PPIs and SPIs can be set as NMIs. IPIs being currently
> hardcoded IRQ numbers, there isn't a generic interface to set SGIs as NMI
> for now. I don't think there is any reason LPIs should be allowed to be set
> as NMI as they do not have an active state.
> When an NMI is active on a CPU, no other NMI can be triggered on the CPU.
>
> Requirements to use this:
> - Have GICv3
> - SCR_EL3.FIQ is set to 1 when linux runs
> - Select Kernel Feature -> Use ICC system registers for IRQ masking
>
> * Patches 1 and 2 allows to detect and enable the use of GICv3 system
> registers during boot time.
> * Patch 3 introduces the masking of IRQs using priorities replacing irq
> disabling.
> * Patch 4 adds some utility functions
> * Patch 5 add detection of the view linux has on GICv3 priorities, without
> this we cannot easily mask specific priorities in an accurate manner
> * Patch 6 adds the support for NMIs
>
>
> Changes since RFC[2]:
> * The series was rebased to v4.15-rc2 which implied some changes mainly
> related to the work on exception entries and daif flags by James Morse.
>
> - The first patch in the previous series was dropped because no longer
> applicable.
>
> - With the semantics James introduced of "inheriting" daif flags,
> handling of PMR on exception entry is simplified as PMR is not altered
> by taking an exception and already inherited from previous state.
>
> - James pointed out that taking a PseudoNMI before reading the FAR_EL1
> register should not be allowed as per the TRM (D10.2.29):
> "FAR_EL1 is made UNKNOWN on an exception return from EL1."
> So in this submission PSR.I bit is cleared only after FAR_EL1 is read.
>
> * For KVM, only deal with PMR unmasking/restoring in common code, and VHE
> specific code makes sure PSR.I bit is set when necessary.
>
> * When detecting the GIC priority view (patch 5), wait for an actual
> interrupt instead of trying only once.
>
> [1] http://www.spinics.net/lists/arm-kernel/msg525077.html
> [2] https://www.spinics.net/lists/arm-kernel/msg610736.html
>
> Cheers,
>
> Julien
>
> --->
>
> Daniel Thompson (3):
> arm64: cpufeature: Allow early detect of specific features
> arm64: alternative: Apply alternatives early in boot process
> arm64: irqflags: Use ICC sysregs to implement IRQ masking
>
> Julien Thierry (3):
> irqchip/gic: Add functions to access irq priorities
> arm64: Detect current view of GIC priorities
> arm64: Add support for pseudo-NMIs
>
> Documentation/arm64/booting.txt | 5 +
> arch/arm64/Kconfig | 15 ++
> arch/arm64/include/asm/alternative.h | 1 +
> arch/arm64/include/asm/arch_gicv3.h | 42 +++++
> arch/arm64/include/asm/assembler.h | 25 ++-
> arch/arm64/include/asm/daifflags.h | 36 ++--
> arch/arm64/include/asm/efi.h | 5 +
> arch/arm64/include/asm/irqflags.h | 131 ++++++++++++++
> arch/arm64/include/asm/processor.h | 4 +
> arch/arm64/include/asm/ptrace.h | 14 +-
> arch/arm64/include/asm/sysreg.h | 1 +
> arch/arm64/kernel/alternative.c | 39 ++++-
> arch/arm64/kernel/asm-offsets.c | 1 +
> arch/arm64/kernel/cpufeature.c | 68 +++++---
> arch/arm64/kernel/entry.S | 84 ++++++++-
> arch/arm64/kernel/head.S | 38 ++++
> arch/arm64/kernel/process.c | 6 +
> arch/arm64/kernel/smp.c | 14 ++
> arch/arm64/kvm/hyp/hyp-entry.S | 20 +++
> arch/arm64/kvm/hyp/switch.c | 21 +++
> arch/arm64/mm/proc.S | 23 +++
> drivers/irqchip/irq-gic-common.c | 10 ++
> drivers/irqchip/irq-gic-common.h | 2 +
> drivers/irqchip/irq-gic-v3-its.c | 2 +-
> drivers/irqchip/irq-gic-v3.c | 307 +++++++++++++++++++++++++++++----
> include/linux/interrupt.h | 1 +
> include/linux/irqchip/arm-gic-common.h | 6 +
> include/linux/irqchip/arm-gic.h | 5 -
> 28 files changed, 841 insertions(+), 85 deletions(-)
>
> --
> 1.9.1
>
--
Julien Thierry
^ permalink raw reply
* [PATCH] ARM: imx: remove unused imx3 pm definitions
From: Martin Kaiser @ 2017-12-19 10:07 UTC (permalink / raw)
To: linux-arm-kernel
Remove the defintion of mx3_cpu_lp_set(), this function is not
implemented anywhere. Remove then mx3_cpu_pwr_mode enum as well,
it was used only as parameter of mx3_cpu_lp_set().
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
arch/arm/mach-imx/common.h | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index b09a2ec..c8d68e9 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -71,15 +71,6 @@ enum mxc_cpu_pwr_mode {
STOP_POWER_OFF, /* STOP + SRPG */
};
-enum mx3_cpu_pwr_mode {
- MX3_RUN,
- MX3_WAIT,
- MX3_DOZE,
- MX3_SLEEP,
-};
-
-void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
-
void imx_enable_cpu(int cpu, bool enable);
void imx_set_cpu_jump(int cpu, void *jump_addr);
u32 imx_get_cpu_arg(int cpu);
--
2.1.4
^ permalink raw reply related
* [PATCH] spi: atmel: fixed spin_lock usage inside atmel_spi_remove
From: Nicolas Ferre @ 2017-12-19 10:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513352417-15275-1-git-send-email-radu.pirea@microchip.com>
On 15/12/2017 at 16:40, Radu Pirea wrote:
> The only part of atmel_spi_remove which needs to be atomic is hardware
> reset.
>
> atmel_spi_stop_dma calls dma_terminate_all and this needs interrupts
> enabled.
> atmel_spi_release_dma calls dma_release_channel and dma_release_channel
> locks a mutex inside of spin_lock.
>
> So the call of these functions can't be inside a spin_lock.
>
> Reported-by: Jia-Ju Bai <baijiaju1990@gmail.com>
> Signed-off-by: Radu Pirea <radu.pirea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Thanks Radu. Regards,
Nicolas
> ---
> drivers/spi/spi-atmel.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
> index f95da36..6694709 100644
> --- a/drivers/spi/spi-atmel.c
> +++ b/drivers/spi/spi-atmel.c
> @@ -1661,12 +1661,12 @@ static int atmel_spi_remove(struct platform_device *pdev)
> pm_runtime_get_sync(&pdev->dev);
>
> /* reset the hardware and block queue progress */
> - spin_lock_irq(&as->lock);
> if (as->use_dma) {
> atmel_spi_stop_dma(master);
> atmel_spi_release_dma(master);
> }
>
> + spin_lock_irq(&as->lock);
> spi_writel(as, CR, SPI_BIT(SWRST));
> spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
> spi_readl(as, SR);
>
--
Nicolas Ferre
^ permalink raw reply
* [PATCH] ARM: NOMMU: Setup VBAR/Hivecs for secondaries cores
From: Vladimir Murzin @ 2017-12-19 10:23 UTC (permalink / raw)
To: linux-arm-kernel
With switch to dynamic exception base address setting, VBAR/Hivecs
set only for boot CPU, but secondaries stay unaware of that. That
might lead to weird effects when trying up to bring up secondaries.
Fixes: ad475117d201 ("ARM: 8649/2: nommu: remove Hivecs configuration is asm")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/include/asm/memory.h | 9 +++++++++
arch/arm/kernel/smp.c | 2 ++
arch/arm/mm/nommu.c | 4 ++--
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 1f54e4e..65c52ac 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -165,6 +165,15 @@ extern unsigned long vectors_base;
#ifndef __ASSEMBLY__
+#ifndef CONFIG_MMU
+extern unsigned long setup_vectors_base(void);
+#else
+static inline unsigned long setup_vectors_base(void)
+{
+ return 0;
+}
+#endif
+
/*
* Physical vs virtual RAM address space conversion. These are
* private definitions which should NOT be used outside memory.h
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index b4fbf00..248e33f 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -379,6 +379,8 @@ asmlinkage void secondary_start_kernel(void)
cpu_init();
+ setup_vectors_base();
+
pr_debug("CPU%u: Booted secondary processor\n", cpu);
preempt_disable();
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 885b106..c8beaab 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -31,7 +31,7 @@ struct mpu_rgn_info mpu_rgn_info;
#ifdef CONFIG_CPU_CP15
#ifdef CONFIG_CPU_HIGH_VECTOR
-static unsigned long __init setup_vectors_base(void)
+unsigned long setup_vectors_base(void)
{
unsigned long reg = get_cr();
@@ -58,7 +58,7 @@ static inline bool security_extensions_enabled(void)
return 0;
}
-static unsigned long __init setup_vectors_base(void)
+unsigned long setup_vectors_base(void)
{
unsigned long base = 0, reg = get_cr();
--
2.0.0
^ permalink raw reply related
* [PATCH v2] spi: atmel: Implements transfers with bounce buffer
From: Nicolas Ferre @ 2017-12-19 10:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513093032-11570-1-git-send-email-radu.pirea@microchip.com>
On 12/12/2017 at 16:37, Radu Pirea wrote:
> This patch enables DMA transfers for Atmel SAM9 SoCs and implements a bounce
> buffer for transfers which have vmalloc allocated buffers. Those buffers are
> not cache coherent even if they have been transformed into sg lists. UBIFS
> is affected by this cache coherency issue.
>
> In this patch I also reverted "spi: atmel: fix corrupted data issue on SAM9
> family SoCs"(7094576ccdc3acfe1e06a1e2ab547add375baf7f).
>
>
> Signed-off-by: Radu Pirea <radu.pirea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Best regards,
Nicolas
> ---
> Please ignore the previous version. I messed up with file names.
> drivers/spi/spi-atmel.c | 113 +++++++++++++++++++++++++++++++++++-------------
> 1 file changed, 84 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
> index f95da36..198b4cd 100644
> --- a/drivers/spi/spi-atmel.c
> +++ b/drivers/spi/spi-atmel.c
> @@ -291,6 +291,10 @@ struct atmel_spi {
> struct spi_transfer *current_transfer;
> int current_remaining_bytes;
> int done_status;
> + dma_addr_t dma_addr_rx_bbuf;
> + dma_addr_t dma_addr_tx_bbuf;
> + void *addr_rx_bbuf;
> + void *addr_tx_bbuf;
>
> struct completion xfer_completion;
>
> @@ -436,6 +440,11 @@ static void atmel_spi_unlock(struct atmel_spi *as) __releases(&as->lock)
> spin_unlock_irqrestore(&as->lock, as->flags);
> }
>
> +static inline bool atmel_spi_is_vmalloc_xfer(struct spi_transfer *xfer)
> +{
> + return is_vmalloc_addr(xfer->tx_buf) || is_vmalloc_addr(xfer->rx_buf);
> +}
> +
> static inline bool atmel_spi_use_dma(struct atmel_spi *as,
> struct spi_transfer *xfer)
> {
> @@ -448,7 +457,12 @@ static bool atmel_spi_can_dma(struct spi_master *master,
> {
> struct atmel_spi *as = spi_master_get_devdata(master);
>
> - return atmel_spi_use_dma(as, xfer);
> + if (IS_ENABLED(CONFIG_SOC_SAM_V4_V5))
> + return atmel_spi_use_dma(as, xfer) &&
> + !atmel_spi_is_vmalloc_xfer(xfer);
> + else
> + return atmel_spi_use_dma(as, xfer);
> +
> }
>
> static int atmel_spi_dma_slave_config(struct atmel_spi *as,
> @@ -594,6 +608,11 @@ static void dma_callback(void *data)
> struct spi_master *master = data;
> struct atmel_spi *as = spi_master_get_devdata(master);
>
> + if (is_vmalloc_addr(as->current_transfer->rx_buf) &&
> + IS_ENABLED(CONFIG_SOC_SAM_V4_V5)) {
> + memcpy(as->current_transfer->rx_buf, as->addr_rx_bbuf,
> + as->current_transfer->len);
> + }
> complete(&as->xfer_completion);
> }
>
> @@ -744,17 +763,41 @@ static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
> goto err_exit;
>
> /* Send both scatterlists */
> - rxdesc = dmaengine_prep_slave_sg(rxchan,
> - xfer->rx_sg.sgl, xfer->rx_sg.nents,
> - DMA_FROM_DEVICE,
> - DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> + if (atmel_spi_is_vmalloc_xfer(xfer) &&
> + IS_ENABLED(CONFIG_SOC_SAM_V4_V5)) {
> + rxdesc = dmaengine_prep_slave_single(rxchan,
> + as->dma_addr_rx_bbuf,
> + xfer->len,
> + DMA_FROM_DEVICE,
> + DMA_PREP_INTERRUPT |
> + DMA_CTRL_ACK);
> + } else {
> + rxdesc = dmaengine_prep_slave_sg(rxchan,
> + xfer->rx_sg.sgl,
> + xfer->rx_sg.nents,
> + DMA_FROM_DEVICE,
> + DMA_PREP_INTERRUPT |
> + DMA_CTRL_ACK);
> + }
> if (!rxdesc)
> goto err_dma;
>
> - txdesc = dmaengine_prep_slave_sg(txchan,
> - xfer->tx_sg.sgl, xfer->tx_sg.nents,
> - DMA_TO_DEVICE,
> - DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> + if (atmel_spi_is_vmalloc_xfer(xfer) &&
> + IS_ENABLED(CONFIG_SOC_SAM_V4_V5)) {
> + memcpy(as->addr_tx_bbuf, xfer->tx_buf, xfer->len);
> + txdesc = dmaengine_prep_slave_single(txchan,
> + as->dma_addr_tx_bbuf,
> + xfer->len, DMA_TO_DEVICE,
> + DMA_PREP_INTERRUPT |
> + DMA_CTRL_ACK);
> + } else {
> + txdesc = dmaengine_prep_slave_sg(txchan,
> + xfer->tx_sg.sgl,
> + xfer->tx_sg.nents,
> + DMA_TO_DEVICE,
> + DMA_PREP_INTERRUPT |
> + DMA_CTRL_ACK);
> + }
> if (!txdesc)
> goto err_dma;
>
> @@ -1426,27 +1469,7 @@ static void atmel_get_caps(struct atmel_spi *as)
>
> as->caps.is_spi2 = version > 0x121;
> as->caps.has_wdrbt = version >= 0x210;
> -#ifdef CONFIG_SOC_SAM_V4_V5
> - /*
> - * Atmel SoCs based on ARM9 (SAM9x) cores should not use spi_map_buf()
> - * since this later function tries to map buffers with dma_map_sg()
> - * even if they have not been allocated inside DMA-safe areas.
> - * On SoCs based on Cortex A5 (SAMA5Dx), it works anyway because for
> - * those ARM cores, the data cache follows the PIPT model.
> - * Also the L2 cache controller of SAMA5D2 uses the PIPT model too.
> - * In case of PIPT caches, there cannot be cache aliases.
> - * However on ARM9 cores, the data cache follows the VIVT model, hence
> - * the cache aliases issue can occur when buffers are allocated from
> - * DMA-unsafe areas, by vmalloc() for instance, where cache coherency is
> - * not taken into account or at least not handled completely (cache
> - * lines of aliases are not invalidated).
> - * This is not a theorical issue: it was reproduced when trying to mount
> - * a UBI file-system on a at91sam9g35ek board.
> - */
> - as->caps.has_dma_support = false;
> -#else
> as->caps.has_dma_support = version >= 0x212;
> -#endif
> as->caps.has_pdc_support = version < 0x212;
> }
>
> @@ -1592,6 +1615,30 @@ static int atmel_spi_probe(struct platform_device *pdev)
> as->use_pdc = true;
> }
>
> + if (IS_ENABLED(CONFIG_SOC_SAM_V4_V5)) {
> + as->addr_rx_bbuf = dma_alloc_coherent(&pdev->dev,
> + SPI_MAX_DMA_XFER,
> + &as->dma_addr_rx_bbuf,
> + GFP_KERNEL | GFP_DMA);
> + if (!as->addr_rx_bbuf) {
> + as->use_dma = false;
> + } else {
> + as->addr_tx_bbuf = dma_alloc_coherent(&pdev->dev,
> + SPI_MAX_DMA_XFER,
> + &as->dma_addr_tx_bbuf,
> + GFP_KERNEL | GFP_DMA);
> + if (!as->addr_tx_bbuf) {
> + as->use_dma = false;
> + dma_free_coherent(&pdev->dev, SPI_MAX_DMA_XFER,
> + as->addr_rx_bbuf,
> + as->dma_addr_rx_bbuf);
> + }
> + }
> + if(!as->use_dma)
> + dev_info(master->dev.parent,
> + " can not allocate dma coherent memory\n");
> + }
> +
> if (as->caps.has_dma_support && !as->use_dma)
> dev_info(&pdev->dev, "Atmel SPI Controller using PIO only\n");
>
> @@ -1665,6 +1712,14 @@ static int atmel_spi_remove(struct platform_device *pdev)
> if (as->use_dma) {
> atmel_spi_stop_dma(master);
> atmel_spi_release_dma(master);
> + if (IS_ENABLED(CONFIG_SOC_SAM_V4_V5)) {
> + dma_free_coherent(&pdev->dev, SPI_MAX_DMA_XFER,
> + as->addr_tx_bbuf,
> + as->dma_addr_tx_bbuf);
> + dma_free_coherent(&pdev->dev, SPI_MAX_DMA_XFER,
> + as->addr_rx_bbuf,
> + as->dma_addr_rx_bbuf);
> + }
> }
>
> spi_writel(as, CR, SPI_BIT(SWRST));
>
--
Nicolas Ferre
^ permalink raw reply
* [PATCH v2] IPI performance benchmark
From: Yury Norov @ 2017-12-19 10:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOFm3uGjeT3waQaC+Ak=gmNkLFsFO6HshyEwsYA5QX2RjK0XNw@mail.gmail.com>
On Tue, Dec 19, 2017 at 10:26:02AM +0100, Philippe Ombredanne wrote:
> Dear Yury,
>
> On Tue, Dec 19, 2017 at 9:50 AM, Yury Norov <ynorov@caviumnetworks.com> wrote:
> > This benchmark sends many IPIs in different modes and measures
> > time for IPI delivery (first column), and total time, ie including
> > time to acknowledge the receive by sender (second column).
>
> <snip>
>
> > --- /dev/null
> > +++ b/kernel/ipi_benchmark.c
> > @@ -0,0 +1,153 @@
> > +/*
> > + * Performance test for IPI on SMP machines.
> > + *
> > + * Copyright (c) 2017 Cavium Networks.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of version 2 of the GNU General Public
> > + * License as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful, but
> > + * WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > + * General Public License for more details.
> > + */
>
> Would you mind using the new SPDX tags documented in Thomas patch set
> [1] rather than this fine but longer legalese?
Of course. I'll collect more comments, if any, and send v3 soon.
> Each time long
> legalese is added as a comment to a kernel file, there is a whole star
> system that dies somewhere in the universe, which is not a good thing.
You can save all that stars and hours of your time if add
corresponding rule to checkpatch. ;)
> SPDX tags eschew this problem by using a simple one line comment and
> this has been proven to be mostly harmless. And if you could spread
> the word to others in your team this would be very nice. I recently
> nudged Aleksey who nicely updated his patches a short while ago.
>
> > +MODULE_LICENSE("GPL");
>
> There is a problem here: your MODULE_LICENSE tag means GPL-2.0 or
> later versions as documented in module.h. This is not consistent with
> your top level license notice. You should make this consistent IMHO
> .... and use SPDX tags for the top level notice of course!
>
> Thank you!
>
> [1] https://lkml.org/lkml/2017/12/4/934
>
> CC: Aleksey Makarov <aleksey.makarov@cavium.com>
> --
> Cordially
> Philippe Ombredanne
^ permalink raw reply
* [PATCH V4 02/26] powerpc/PCI: deprecate pci_get_bus_and_slot()
From: Michael Ellerman @ 2017-12-19 10:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513661883-28662-3-git-send-email-okaya@codeaurora.org>
Sinan Kaya <okaya@codeaurora.org> writes:
> pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
> where a PCI device is present. This restricts the device drivers to be
> reused for other domain numbers.
>
> Getting ready to remove pci_get_bus_and_slot() function in favor of
> pci_get_domain_bus_and_slot().
>
> Use pci_get_domain_bus_and_slot() with a domain number of 0 as the code
> is not ready to consume multiple domains and existing code used domain
> number 0.
>
> Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
> ---
> arch/powerpc/kernel/pci_32.c | 3 ++-
> arch/powerpc/platforms/powermac/feature.c | 2 +-
> arch/powerpc/sysdev/mv64x60_pci.c | 4 ++--
> 3 files changed, 5 insertions(+), 4 deletions(-)
Looks to do what it says. I don't know if any of these call sites could
be improved to provide the domain, but that's not really your problem.
Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
cheers
^ permalink raw reply
* [xlnx:2017.3_video_ea 6589/6615] include/linux/dmaengine.h:1409: undefined reference to `dma_request_slave_channel'
From: kbuild test robot @ 2017-12-19 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jeffrey,
It's probably a bug fix that unveils the link errors.
tree: https://github.com/Xilinx/linux-xlnx 2017.3_video_ea
head: 57af48e31ef9c4a9fa54914afa723ce818c4c21a
commit: 62a7ed2f02d28f73f2c09d61ecbe1f289aecc6e5 [6589/6615] staging: xilinx: mixer: Initial commit of Xilinx Video Mixer IP DRM driver
config: i386-randconfig-s0-201751 (attached as .config)
compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026
reproduce:
git checkout 62a7ed2f02d28f73f2c09d61ecbe1f289aecc6e5
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/built-in.o: In function `__dma_request_slave_channel_compat':
>> include/linux/dmaengine.h:1409: undefined reference to `dma_request_slave_channel'
>> include/linux/dmaengine.h:1416: undefined reference to `__dma_request_channel'
>> include/linux/dmaengine.h:1409: undefined reference to `dma_request_slave_channel'
>> include/linux/dmaengine.h:1416: undefined reference to `__dma_request_channel'
drivers/built-in.o: In function `pxa2xx_spi_dma_setup':
>> drivers/spi/spi-pxa2xx-dma.c:208: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `pxa2xx_spi_dma_release':
drivers/spi/spi-pxa2xx-dma.c:222: undefined reference to `dma_release_channel'
drivers/spi/spi-pxa2xx-dma.c:227: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `rockchip_spi_remove':
>> drivers/spi/spi-rockchip.c:821: undefined reference to `dma_release_channel'
drivers/spi/spi-rockchip.c:823: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `rockchip_spi_probe':
>> drivers/spi/spi-rockchip.c:752: undefined reference to `dma_request_chan'
drivers/spi/spi-rockchip.c:763: undefined reference to `dma_request_chan'
>> drivers/spi/spi-rockchip.c:774: undefined reference to `dma_get_slave_caps'
drivers/spi/spi-rockchip.c:796: undefined reference to `dma_release_channel'
drivers/spi/spi-rockchip.c:799: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `pch_spi_request_dma':
>> drivers/spi/spi-topcliff-pch.c:878: undefined reference to `__dma_request_channel'
drivers/spi/spi-topcliff-pch.c:893: undefined reference to `__dma_request_channel'
>> drivers/spi/spi-topcliff-pch.c:897: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `pch_spi_release_dma':
drivers/spi/spi-topcliff-pch.c:911: undefined reference to `dma_release_channel'
drivers/spi/spi-topcliff-pch.c:915: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `usdhi6_dma_release':
>> drivers/mmc/host/usdhi6rol0.c:525: undefined reference to `dma_release_channel'
drivers/mmc/host/usdhi6rol0.c:530: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `usdhi6_dma_request':
>> drivers/mmc/host/usdhi6rol0.c:683: undefined reference to `dma_request_slave_channel'
drivers/mmc/host/usdhi6rol0.c:698: undefined reference to `dma_request_slave_channel'
drivers/mmc/host/usdhi6rol0.c:716: undefined reference to `dma_release_channel'
drivers/mmc/host/usdhi6rol0.c:719: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `Si5324_RatApprox':
>> drivers/staging/xilinx/clk/si5324drv.c:45: undefined reference to `__udivdi3'
>> drivers/staging/xilinx/clk/si5324drv.c:52: undefined reference to `__umoddi3'
drivers/staging/xilinx/clk/si5324drv.c:56: undefined reference to `__udivdi3'
drivers/built-in.o: In function `Si5324_FindN2ls':
drivers/staging/xilinx/clk/si5324drv.c:95: undefined reference to `__udivdi3'
drivers/staging/xilinx/clk/si5324drv.c:95: undefined reference to `__udivdi3'
drivers/staging/xilinx/clk/si5324drv.c:124: undefined reference to `__udivdi3'
drivers/staging/xilinx/clk/si5324drv.c:126: undefined reference to `__udivdi3'
drivers/built-in.o:drivers/staging/xilinx/clk/si5324drv.c:189: more undefined references to `__udivdi3' follow
drivers/built-in.o: In function `Si5324_CalcFreqSettings':
>> drivers/staging/xilinx/clk/si5324drv.c:312: undefined reference to `__divdi3'
drivers/staging/xilinx/clk/si5324drv.c:316: undefined reference to `__divdi3'
drivers/built-in.o: In function `xvmixer_drm_encoder_create':
>> drivers/staging/xilinx/xvmixer/xvmixer_drm_encoder.c:201: undefined reference to `of_find_device_by_node'
drivers/built-in.o: In function `xilinx_drm_plane_destroy':
>> drivers/staging/xilinx/xvmixer/xvmixer_drm_plane.c:244: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `xvmixer_drm_plane_commit':
>> drivers/staging/xilinx/xvmixer/xvmixer_drm_plane.c:89: undefined reference to `xilinx_xdma_drm_config'
drivers/built-in.o: In function `xvmixer_drm_mixer_init_plane':
drivers/staging/xilinx/xvmixer/xvmixer_drm_plane.c:447: undefined reference to `dma_release_channel'
drivers/built-in.o: In function `xilinx_mixer_set_layer_buff_addr':
>> drivers/staging/xilinx/xvmixer/xilinx_mixer_hw.c:657: undefined reference to `__umoddi3'
>> drivers/staging/xilinx/xvmixer/xilinx_mixer_hw.c:657: undefined reference to `__umoddi3'
drivers/built-in.o: In function `perf_remove':
vim +1409 include/linux/dmaengine.h
c13c8260 Chris Leech 2006-05-23 1392
c13c8260 Chris Leech 2006-05-23 1393 int dma_async_device_register(struct dma_device *device);
c13c8260 Chris Leech 2006-05-23 1394 void dma_async_device_unregister(struct dma_device *device);
07f2211e Dan Williams 2009-01-05 1395 void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
7bb587f4 Zhangfei Gao 2013-06-28 1396 struct dma_chan *dma_get_slave_channel(struct dma_chan *chan);
8010dad5 Stephen Warren 2013-11-26 1397 struct dma_chan *dma_get_any_slave_channel(struct dma_device *device);
59b5ec21 Dan Williams 2009-01-06 1398 #define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
864ef69b Matt Porter 2013-02-01 1399 #define dma_request_slave_channel_compat(mask, x, y, dev, name) \
864ef69b Matt Porter 2013-02-01 1400 __dma_request_slave_channel_compat(&(mask), x, y, dev, name)
864ef69b Matt Porter 2013-02-01 1401
864ef69b Matt Porter 2013-02-01 1402 static inline struct dma_chan
a53e28da Lars-Peter Clausen 2013-03-25 1403 *__dma_request_slave_channel_compat(const dma_cap_mask_t *mask,
a53e28da Lars-Peter Clausen 2013-03-25 1404 dma_filter_fn fn, void *fn_param,
1dc04288 Jarkko Nikula 2015-08-12 1405 struct device *dev, const char *name)
864ef69b Matt Porter 2013-02-01 1406 {
864ef69b Matt Porter 2013-02-01 1407 struct dma_chan *chan;
864ef69b Matt Porter 2013-02-01 1408
864ef69b Matt Porter 2013-02-01 @1409 chan = dma_request_slave_channel(dev, name);
864ef69b Matt Porter 2013-02-01 1410 if (chan)
864ef69b Matt Porter 2013-02-01 1411 return chan;
864ef69b Matt Porter 2013-02-01 1412
7dfffb95 Geert Uytterhoeven 2015-08-17 1413 if (!fn || !fn_param)
7dfffb95 Geert Uytterhoeven 2015-08-17 1414 return NULL;
7dfffb95 Geert Uytterhoeven 2015-08-17 1415
864ef69b Matt Porter 2013-02-01 @1416 return __dma_request_channel(mask, fn, fn_param);
:::::: The code at line 1409 was first introduced by commit
:::::: 864ef69b2d9b34e7c85baa9c5c601d5e735b208a dmaengine: add dma_request_slave_channel_compat()
:::::: TO: Matt Porter <mporter@ti.com>
:::::: CC: Vinod Koul <vinod.koul@intel.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH v2] spi: atmel: Implements transfers with bounce buffer
From: Alexandre Belloni @ 2017-12-19 10:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513093032-11570-1-git-send-email-radu.pirea@microchip.com>
On 12/12/2017 at 17:37:12 +0200, Radu Pirea wrote:
> This patch enables DMA transfers for Atmel SAM9 SoCs and implements a bounce
> buffer for transfers which have vmalloc allocated buffers. Those buffers are
> not cache coherent even if they have been transformed into sg lists. UBIFS
> is affected by this cache coherency issue.
>
> In this patch I also reverted "spi: atmel: fix corrupted data issue on SAM9
> family SoCs"(7094576ccdc3acfe1e06a1e2ab547add375baf7f).
>
>
> Signed-off-by: Radu Pirea <radu.pirea@microchip.com>
> ---
> Please ignore the previous version. I messed up with file names.
> drivers/spi/spi-atmel.c | 113 +++++++++++++++++++++++++++++++++++-------------
> 1 file changed, 84 insertions(+), 29 deletions(-)
>
There are multiple checkpatch issues, can you fix them?
> + if(!as->use_dma)
Especially that missing space.
> + dev_info(master->dev.parent,
> + " can not allocate dma coherent memory\n");
> + }
> +
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* [PATCH 0/2] ARM: davinici: move watchdog restart from mach to drivers
From: Sekhar Nori @ 2017-12-19 10:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513012869-7647-1-git-send-email-david@lechnology.com>
Hi David,
On Monday 11 December 2017 10:51 PM, David Lechner wrote:
> This series moves the watchdog restart code from arch/arm/mach-davinci
> to drivers/watchdog.
>
> Tested working on LEGO MINDSTORMS EV3 (TI AM1808 processor).
The patches look good to me. I also tested them on keystone-k2hk-evm and
da850-lcdk board. Thanks for the much needed clean-up!
Hi Wim,
How do you want to handle this series? Patch 2/2 definitely needs to go
through my tree as it will clash with other code I am queuing.
I can either take 1/2 also through ARM-SoC with your ack (preferred) or
if you give me an immutable commit/tag over v4.15-rc1, I can merge that
to preserve bisect-ability.
Thanks,
Sekhar
^ permalink raw reply
* Linux Kernel handling AXI DECERR/SLVERR
From: Mark Rutland @ 2017-12-19 10:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <BLUPR0201MB1505A278D2EF1EABD80555EEA50F0@BLUPR0201MB1505.namprd02.prod.outlook.com>
On Tue, Dec 19, 2017 at 10:23:25AM +0000, Bharat Kumar Gogada wrote:
> Hi All,
Hi,
> When Linux is booted on ARM64 platform and an access to peripheral returns
> DECERR or SLVERR on AXI.
>
> In the above error cases how would Linux kernel handle these faults ? Will it
> hang/recover ?
I believe that on contemporary CPUs these will result in an SError. As
SErrors are asynchronous, and (in the absence of RAS extensions) their
cause cannot be determined, these are treated as fatal, and the kernel
will panic().
Thanks,
Mark.
^ permalink raw reply
* [PATCH V4 14/26] pch_gbe: deprecate pci_get_bus_and_slot()
From: Andy Shevchenko @ 2017-12-19 10:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513661883-28662-15-git-send-email-okaya@codeaurora.org>
On Tue, 2017-12-19 at 00:37 -0500, Sinan Kaya wrote:
> pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
> where a PCI device is present. This restricts the device drivers to be
> reused for other domain numbers.
>
> Getting ready to remove pci_get_bus_and_slot() function in favor of
> pci_get_domain_bus_and_slot().
>
Where this idea come from?
pci_get_bus_and_slot() still might be useful for the wired devices in
SoC where we know for sure that domain == 0.
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
^ permalink raw reply
* [PATCH v4 1/2] DTS: GTA04: improve panel compatibility string
From: Tomi Valkeinen @ 2017-12-19 10:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171211152203.GH24344@atomide.com>
On 11/12/17 17:22, Tony Lindgren wrote:
> * H. Nikolaus Schaller <hns@goldelico.com> [171201 07:44]:
>> Official vendor string is now "tpo" and not "toppoly".
>>
>> Requires patch "omapdrm: panel: fix compatible vendor string for td028ttec1"
>> so that the driver understands both.
>
> Tomi, so what's the plan with the dependency patch, is that for v4.16
> or for the v4.15-rc cycle?
The dependency patch for this one is queued for v4.16 (I just sent a
pull request today). I could pick this one up (if you give an ack) if I
send another DRM pull request, but I probably don't have anything else
to send so most likely I won't pick this up for v4.16.
The patch 2/2 in the series doesn't have dependencies and can be applied
as a fix for 4.15, or for 4.16.
Neither of these are critical, as things work fine without these patches.
Tomi
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply
* [PATCH] dmaengine: ti-dma-crossbar: Fix event mapping for TPCC_EVT_MUX_60_63
From: Peter Ujfalusi @ 2017-12-19 10:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Vignesh R <vigneshr@ti.com>
Register layout of a typical TPCC_EVT_MUX_M_N register is such that the
lowest numbered event is at the lowest byte address and highest numbered
event at highest byte address. But TPCC_EVT_MUX_60_63 register layout is
different, in that the lowest numbered event is at the highest address
and highest numbered event is at the lowest address. Therefore, modify
ti_am335x_xbar_write() to handle TPCC_EVT_MUX_60_63 register
accordingly.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
drivers/dma/ti-dma-crossbar.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/ti-dma-crossbar.c b/drivers/dma/ti-dma-crossbar.c
index 7df910e7c348..9272b173c746 100644
--- a/drivers/dma/ti-dma-crossbar.c
+++ b/drivers/dma/ti-dma-crossbar.c
@@ -54,7 +54,15 @@ struct ti_am335x_xbar_map {
static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u8 val)
{
- writeb_relaxed(val, iomem + event);
+ /*
+ * TPCC_EVT_MUX_60_63 register layout is different than the
+ * rest, in the sense, that event 63 is mapped to lowest byte
+ * and event 60 is mapped to highest, handle it separately.
+ */
+ if (event >= 60 && event <= 63)
+ writeb_relaxed(val, iomem + (63 - event % 4));
+ else
+ writeb_relaxed(val, iomem + event);
}
static void ti_am335x_xbar_free(struct device *dev, void *route_data)
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply related
* [PATCH v4 0/3] Add support for Hi3660 mailbox driver
From: Kaihua Zhong @ 2017-12-19 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Leo Yan <leo.yan@linaro.org>
Hi3660 mailbox controller is used to send message within multiple
processors, MCU, HIFI, etc. This patch series is to implement an
initial version for Hi3660 mailbox driver with "automatic
acknowledge" mode.
The patch set have been verified with Hi3660 stub clock driver, so
we can send message to MCU to execute CPU frequency scaling. This is
tested on 96boards Hikey960.
Changes from v3:
* According to Jassi suggestion, refined structure name to
"struct hi3660_chan_info";
* According to Jassi suggestion, moved channel 'lock'+'acquire'
operations into .startup();
Changes from v2:
* According to Mark Rutland suggestions, removed sev()/wfe() from
driver, the system has no two masters sharing the same channel for
data transferring so we don't need these instructions;
* Refined DT binding and doc according to Rob suggestions;
* Refined driver according to Julien suggestions;
Changes from v1:
* Added cover letter to track the changelog;
* Added document for DT binding;
* Refactored and simplized mailbox driver with "automatic ack" mode;
* Refined commit logs for patches;
Kaihua Zhong (2):
mailbox: Add support for Hi3660 mailbox
dts: arm64: Add mailbox binding for hi3660
Leo Yan (1):
dt-bindings: mailbox: Introduce Hi3660 controller binding
.../bindings/mailbox/hisilicon,hi3660-mailbox.txt | 51 ++++
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 +
drivers/mailbox/Kconfig | 8 +
drivers/mailbox/Makefile | 2 +
drivers/mailbox/hi3660-mailbox.c | 319 +++++++++++++++++++++
5 files changed, 388 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt
create mode 100644 drivers/mailbox/hi3660-mailbox.c
--
1.9.1
^ permalink raw reply
* [PATCH v4 1/3] dt-bindings: mailbox: Introduce Hi3660 controller binding
From: Kaihua Zhong @ 2017-12-19 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513682145-19892-1-git-send-email-zhongkaihua@huawei.com>
From: Leo Yan <leo.yan@linaro.org>
Introduce a binding for the Hi3660 mailbox controller, the mailbox is
used within application processor (AP), communication processor (CP),
HIFI and MCU, etc.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
.../bindings/mailbox/hisilicon,hi3660-mailbox.txt | 51 ++++++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt
diff --git a/Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt b/Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt
new file mode 100644
index 0000000..3e5b453
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt
@@ -0,0 +1,51 @@
+Hisilicon Hi3660 Mailbox Controller
+
+Hisilicon Hi3660 mailbox controller supports up to 32 channels. Messages
+are passed between processors, including application & communication
+processors, MCU, HIFI, etc. Each channel is unidirectional and accessed
+by using MMIO registers; it supports maximum to 8 words message.
+
+Controller
+----------
+
+Required properties:
+- compatible: : Shall be "hisilicon,hi3660-mbox"
+- reg: : Offset and length of the device's register set
+- #mbox-cells: : Must be 3
+ <&phandle channel dst_irq ack_irq>
+ phandle : Label name of controller
+ channel : Channel number
+ dst_irq : Remote interrupt vector
+ ack_irq : Local interrupt vector
+
+- interrupts: : Contains the two IRQ lines for mailbox.
+
+Example:
+
+mailbox: mailbox at e896b000 {
+ compatible = "hisilicon,hi3660-mbox";
+ reg = <0x0 0xe896b000 0x0 0x1000>;
+ interrupts = <0x0 0xc0 0x4>,
+ <0x0 0xc1 0x4>;
+ #mbox-cells = <3>;
+};
+
+Client
+------
+
+Required properties:
+- compatible : See the client docs
+- mboxes : Standard property to specify a Mailbox (See ./mailbox.txt)
+ Cells must match 'mbox-cells' (See Controller docs above)
+
+Optional properties
+- mbox-names : Name given to channels seen in the 'mboxes' property.
+
+Example:
+
+stub_clock: stub_clock at e896b500 {
+ compatible = "hisilicon,hi3660-stub-clk";
+ reg = <0x0 0xe896b500 0x0 0x0100>;
+ #clock-cells = <1>;
+ mboxes = <&mailbox 13 3 0>;
+};
--
1.9.1
^ permalink raw reply related
* [PATCH v4 2/3] mailbox: Add support for Hi3660 mailbox
From: Kaihua Zhong @ 2017-12-19 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513682145-19892-1-git-send-email-zhongkaihua@huawei.com>
Hi3660 mailbox controller is used to send message within multiple
processors, MCU, HIFI, etc. It supports 32 mailbox channels and every
channel can only be used for single transferring direction. Once the
channel is enabled, it needs to specify the destination interrupt and
acknowledge interrupt, these two interrupt vectors are used to create
the connection between the mailbox and interrupt controllers.
The data transferring supports two modes, one is named as "automatic
acknowledge" mode so after send message the kernel doesn't need to wait
for acknowledge from remote and directly return; there have another mode
is to rely on handling interrupt for acknowledge.
This commit is for initial version driver, which only supports
"automatic acknowledge" mode to support CPU clock, which is the only
one consumer to use mailbox and has been verified. Later may enhance
this driver for interrupt mode (e.g. for supporting HIFI).
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Ruyi Wang <wangruyi@huawei.com>
Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
---
drivers/mailbox/Kconfig | 8 +
drivers/mailbox/Makefile | 2 +
drivers/mailbox/hi3660-mailbox.c | 319 +++++++++++++++++++++++++++++++++++++++
3 files changed, 329 insertions(+)
create mode 100644 drivers/mailbox/hi3660-mailbox.c
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index ba2f152..de8390d4 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -108,6 +108,14 @@ config TI_MESSAGE_MANAGER
multiple processors within the SoC. Select this driver if your
platform has support for the hardware block.
+config HI3660_MBOX
+ tristate "Hi3660 Mailbox"
+ depends on ARCH_HISI && OF
+ help
+ An implementation of the hi3660 mailbox. It is used to send message
+ between application processors and other processors/MCU/DSP. Select
+ Y here if you want to use Hi3660 mailbox controller.
+
config HI6220_MBOX
tristate "Hi6220 Mailbox"
depends on ARCH_HISI
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 4896f8d..cc23c3a 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -27,6 +27,8 @@ obj-$(CONFIG_TI_MESSAGE_MANAGER) += ti-msgmgr.o
obj-$(CONFIG_XGENE_SLIMPRO_MBOX) += mailbox-xgene-slimpro.o
+obj-$(CONFIG_HI3660_MBOX) += hi3660-mailbox.o
+
obj-$(CONFIG_HI6220_MBOX) += hi6220-mailbox.o
obj-$(CONFIG_BCM_PDC_MBOX) += bcm-pdc-mailbox.o
diff --git a/drivers/mailbox/hi3660-mailbox.c b/drivers/mailbox/hi3660-mailbox.c
new file mode 100644
index 0000000..3ceca40
--- /dev/null
+++ b/drivers/mailbox/hi3660-mailbox.c
@@ -0,0 +1,319 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2017 Hisilicon Limited.
+// Copyright (c) 2017 Linaro Limited.
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/mailbox_controller.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "mailbox.h"
+
+#define MBOX_CHAN_MAX 32
+
+#define MBOX_RX 0x0
+#define MBOX_TX 0x1
+
+#define MBOX_BASE(mbox, ch) ((mbox)->base + ((ch) * 0x40))
+#define MBOX_SRC_REG 0x00
+#define MBOX_DST_REG 0x04
+#define MBOX_DCLR_REG 0x08
+#define MBOX_DSTAT_REG 0x0c
+#define MBOX_MODE_REG 0x10
+#define MBOX_IMASK_REG 0x14
+#define MBOX_ICLR_REG 0x18
+#define MBOX_SEND_REG 0x1c
+#define MBOX_DATA_REG 0x20
+
+#define MBOX_IPC_LOCK_REG 0xa00
+#define MBOX_IPC_UNLOCK 0x1acce551
+
+#define MBOX_AUTOMATIC_ACK 1
+
+#define MBOX_STATE_IDLE BIT(4)
+#define MBOX_STATE_ACK BIT(7)
+
+#define MBOX_MSG_LEN 8
+
+/**
+ * Hi3660 mailbox channel information
+ *
+ * A channel can be used for TX or RX, it can trigger remote
+ * processor interrupt to notify remote processor and can receive
+ * interrupt if has incoming message.
+ *
+ * @dst_irq: Interrupt vector for remote processor
+ * @ack_irq: Interrupt vector for local processor
+ */
+struct hi3660_chan_info {
+ unsigned int dst_irq;
+ unsigned int ack_irq;
+};
+
+/**
+ * Hi3660 mailbox controller data
+ *
+ * Mailbox controller includes 32 channels and can allocate
+ * channel for message transferring.
+ *
+ * @dev: Device to which it is attached
+ * @base: Base address of the register mapping region
+ * @chan: Representation of channels in mailbox controller
+ * @mchan: Representation of channel info
+ * @controller: Representation of a communication channel controller
+ */
+struct hi3660_mbox {
+ struct device *dev;
+ void __iomem *base;
+ struct mbox_chan chan[MBOX_CHAN_MAX];
+ struct hi3660_chan_info mchan[MBOX_CHAN_MAX];
+ struct mbox_controller controller;
+};
+
+static inline struct hi3660_mbox *to_hi3660_mbox(struct mbox_controller *mbox)
+{
+ return container_of(mbox, struct hi3660_mbox, controller);
+}
+
+static int hi3660_mbox_check_state(struct mbox_chan *chan)
+{
+ unsigned long ch = (unsigned long)chan->con_priv;
+ struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
+ struct hi3660_chan_info *mchan = &mbox->mchan[ch];
+ void __iomem *base = MBOX_BASE(mbox, ch);
+ unsigned long val;
+ unsigned int state, ret;
+
+ /* Mailbox is idle so directly bail out */
+ state = readl_relaxed(base + MBOX_MODE_REG);
+ if (state & MBOX_STATE_IDLE)
+ return 0;
+
+ /* Wait for acknowledge from remote */
+ ret = readx_poll_timeout_atomic(readl_relaxed, base + MBOX_MODE_REG,
+ val, (val & MBOX_STATE_ACK), 1000, 300000);
+ if (ret) {
+ dev_err(mbox->dev, "%s: timeout for receiving ack\n", __func__);
+ return ret;
+ }
+
+ /* Ensure channel is released */
+ writel_relaxed(0xffffffff, base + MBOX_IMASK_REG);
+ writel_relaxed(BIT(mchan->ack_irq), base + MBOX_SRC_REG);
+ return 0;
+}
+
+static int hi3660_mbox_unlock(struct mbox_chan *chan)
+{
+ struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
+ unsigned int val, retry = 3;
+
+ do {
+ writel_relaxed(MBOX_IPC_UNLOCK, mbox->base + MBOX_IPC_LOCK_REG);
+
+ val = readl_relaxed(mbox->base + MBOX_IPC_LOCK_REG);
+ if (!val)
+ break;
+
+ udelay(10);
+ } while (retry--);
+
+ if (val)
+ dev_err(mbox->dev, "%s: failed to unlock mailbox\n", __func__);
+
+ return (!val) ? 0 : -ETIMEDOUT;
+}
+
+static int hi3660_mbox_acquire_channel(struct mbox_chan *chan)
+{
+ unsigned long ch = (unsigned long)chan->con_priv;
+ struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
+ struct hi3660_chan_info *mchan = &mbox->mchan[ch];
+ void __iomem *base = MBOX_BASE(mbox, ch);
+ unsigned int val, retry;
+
+ for (retry = 10; retry; retry--) {
+
+ /* Check if channel is in idle state */
+ if (readl_relaxed(base + MBOX_MODE_REG) & MBOX_STATE_IDLE) {
+
+ val = BIT(mchan->ack_irq);
+ writel_relaxed(val, base + MBOX_SRC_REG);
+ val = readl_relaxed(base + MBOX_SRC_REG);
+
+ /* Check ack bit has been set successfully */
+ if (val & BIT(mchan->ack_irq))
+ break;
+ }
+ }
+
+ if (!retry)
+ dev_err(mbox->dev, "%s: failed to acquire channel\n", __func__);
+
+ return retry ? 0 : -ETIMEDOUT;
+}
+
+static int hi3660_mbox_send(struct mbox_chan *chan, u32 *msg)
+{
+ unsigned long ch = (unsigned long)chan->con_priv;
+ struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
+ struct hi3660_chan_info *mchan = &mbox->mchan[ch];
+ void __iomem *base = MBOX_BASE(mbox, ch);
+ unsigned int i;
+
+ /* Ensure channel is released */
+ writel_relaxed(0xffffffff, base + MBOX_IMASK_REG);
+ writel_relaxed(BIT(mchan->ack_irq), base + MBOX_SRC_REG);
+
+ /* Clear mask for destination interrupt */
+ writel_relaxed(~BIT(mchan->dst_irq), base + MBOX_IMASK_REG);
+
+ /* Config destination for interrupt vector */
+ writel_relaxed(BIT(mchan->dst_irq), base + MBOX_DST_REG);
+
+ /* Automatic acknowledge mode */
+ writel_relaxed(MBOX_AUTOMATIC_ACK, base + MBOX_MODE_REG);
+
+ /* Fill message data */
+ for (i = 0; i < MBOX_MSG_LEN; i++)
+ writel_relaxed(msg[i], base + MBOX_DATA_REG + i * 4);
+
+ /* Trigger data transferring */
+ writel_relaxed(BIT(mchan->ack_irq), base + MBOX_SEND_REG);
+ return 0;
+}
+
+static int hi3660_mbox_startup(struct mbox_chan *chan)
+{
+ int ret;
+
+ ret = hi3660_mbox_check_state(chan);
+ if (ret)
+ return ret;
+
+ ret = hi3660_mbox_unlock(chan);
+ if (ret)
+ return ret;
+
+ ret = hi3660_mbox_acquire_channel(chan);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int hi3660_mbox_send_data(struct mbox_chan *chan, void *msg)
+{
+ return hi3660_mbox_send(chan, msg);
+}
+
+static struct mbox_chan_ops hi3660_mbox_ops = {
+ .startup = hi3660_mbox_startup,
+ .send_data = hi3660_mbox_send_data,
+};
+
+static struct mbox_chan *hi3660_mbox_xlate(struct mbox_controller *controller,
+ const struct of_phandle_args *spec)
+{
+ struct hi3660_mbox *mbox = to_hi3660_mbox(controller);
+ struct hi3660_chan_info *mchan;
+ unsigned int ch = spec->args[0];
+
+ if (ch >= MBOX_CHAN_MAX) {
+ dev_err(mbox->dev, "Invalid channel idx %d\n", ch);
+ return ERR_PTR(-EINVAL);
+ }
+
+ mchan = &mbox->mchan[ch];
+ mchan->dst_irq = spec->args[1];
+ mchan->ack_irq = spec->args[2];
+
+ return &mbox->chan[ch];
+}
+
+static const struct of_device_id hi3660_mbox_of_match[] = {
+ { .compatible = "hisilicon,hi3660-mbox", },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, hi3660_mbox_of_match);
+
+static int hi3660_mbox_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct hi3660_mbox *mbox;
+ struct mbox_chan *chan;
+ struct resource *res;
+ unsigned long ch;
+ int err;
+
+ mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
+ if (!mbox)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mbox->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(mbox->base))
+ return PTR_ERR(mbox->base);
+
+ mbox->dev = dev;
+ mbox->controller.dev = dev;
+ mbox->controller.chans = mbox->chan;
+ mbox->controller.num_chans = MBOX_CHAN_MAX;
+ mbox->controller.ops = &hi3660_mbox_ops;
+ mbox->controller.of_xlate = hi3660_mbox_xlate;
+
+ /* Initialize mailbox channel data */
+ chan = mbox->chan;
+ for (ch = 0; ch < MBOX_CHAN_MAX; ch++)
+ chan[ch].con_priv = (void *)ch;
+
+ err = mbox_controller_register(&mbox->controller);
+ if (err) {
+ dev_err(dev, "Failed to register mailbox %d\n", err);
+ return err;
+ }
+
+ platform_set_drvdata(pdev, mbox);
+ dev_info(dev, "Mailbox enabled\n");
+ return 0;
+}
+
+static int hi3660_mbox_remove(struct platform_device *pdev)
+{
+ struct hi3660_mbox *mbox = platform_get_drvdata(pdev);
+
+ mbox_controller_unregister(&mbox->controller);
+ return 0;
+}
+
+static struct platform_driver hi3660_mbox_driver = {
+ .probe = hi3660_mbox_probe,
+ .remove = hi3660_mbox_remove,
+ .driver = {
+ .name = "hi3660-mbox",
+ .of_match_table = hi3660_mbox_of_match,
+ },
+};
+
+static int __init hi3660_mbox_init(void)
+{
+ return platform_driver_register(&hi3660_mbox_driver);
+}
+core_initcall(hi3660_mbox_init);
+
+static void __exit hi3660_mbox_exit(void)
+{
+ platform_driver_unregister(&hi3660_mbox_driver);
+}
+module_exit(hi3660_mbox_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Hisilicon Hi3660 Mailbox Controller");
+MODULE_AUTHOR("Leo Yan <leo.yan@linaro.org>");
--
1.9.1
^ permalink raw reply related
* [PATCH v4 3/3] dts: arm64: Add mailbox binding for hi3660
From: Kaihua Zhong @ 2017-12-19 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513682145-19892-1-git-send-email-zhongkaihua@huawei.com>
Add DT binding for mailbox driver.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Ruyi Wang <wangruyi@huawei.com>
Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 22570c3..1ef7b94 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -286,6 +286,14 @@
#reset-cells = <2>;
};
+ mailbox: mailbox at e896b000 {
+ compatible = "hisilicon,hi3660-mbox";
+ reg = <0x0 0xe896b000 0x0 0x1000>;
+ interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <3>;
+ };
+
stub_clock: stub_clock at e896b500 {
compatible = "hisilicon,hi3660-stub-clk";
reg = <0x0 0xe896b500 0x0 0x0100>;
--
1.9.1
^ permalink raw reply related
* [PATCH v2 3/8] media: v4l2-async: simplify v4l2_async_subdev structure
From: Mauro Carvalho Chehab @ 2017-12-19 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513682135.git.mchehab@s-opensource.com>
The V4L2_ASYNC_MATCH_FWNODE match criteria requires just one
struct to be filled (struct fwnode_handle). The V4L2_ASYNC_MATCH_DEVNAME
match criteria requires just a device name.
So, it doesn't make sense to enclose those into structs,
as the criteria can go directly into the union.
That makes easier to document it, as we don't need to document
weird senseless structs.
At drivers, this makes even clearer about the match criteria.
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
---
drivers/media/platform/am437x/am437x-vpfe.c | 6 +++---
drivers/media/platform/atmel/atmel-isc.c | 2 +-
drivers/media/platform/atmel/atmel-isi.c | 2 +-
drivers/media/platform/davinci/vpif_capture.c | 4 ++--
drivers/media/platform/exynos4-is/media-dev.c | 4 ++--
drivers/media/platform/pxa_camera.c | 2 +-
drivers/media/platform/qcom/camss-8x16/camss.c | 2 +-
drivers/media/platform/rcar-vin/rcar-core.c | 2 +-
drivers/media/platform/rcar_drif.c | 4 ++--
drivers/media/platform/soc_camera/soc_camera.c | 2 +-
drivers/media/platform/stm32/stm32-dcmi.c | 2 +-
drivers/media/platform/ti-vpe/cal.c | 2 +-
drivers/media/platform/xilinx/xilinx-vipp.c | 2 +-
drivers/media/v4l2-core/v4l2-async.c | 16 ++++++++--------
drivers/media/v4l2-core/v4l2-fwnode.c | 10 +++++-----
drivers/staging/media/imx/imx-media-dev.c | 4 ++--
include/media/v4l2-async.h | 8 ++------
17 files changed, 35 insertions(+), 39 deletions(-)
diff --git a/drivers/media/platform/am437x/am437x-vpfe.c b/drivers/media/platform/am437x/am437x-vpfe.c
index 0997c640191d..601ae6487617 100644
--- a/drivers/media/platform/am437x/am437x-vpfe.c
+++ b/drivers/media/platform/am437x/am437x-vpfe.c
@@ -2304,8 +2304,8 @@ vpfe_async_bound(struct v4l2_async_notifier *notifier,
vpfe_dbg(1, vpfe, "vpfe_async_bound\n");
for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
- if (vpfe->cfg->asd[i]->match.fwnode.fwnode ==
- asd[i].match.fwnode.fwnode) {
+ if (vpfe->cfg->asd[i]->match.fwnode ==
+ asd[i].match.fwnode) {
sdinfo = &vpfe->cfg->sub_devs[i];
vpfe->sd[i] = subdev;
vpfe->sd[i]->grp_id = sdinfo->grp_id;
@@ -2510,7 +2510,7 @@ vpfe_get_pdata(struct platform_device *pdev)
}
pdata->asd[i]->match_type = V4L2_ASYNC_MATCH_FWNODE;
- pdata->asd[i]->match.fwnode.fwnode = of_fwnode_handle(rem);
+ pdata->asd[i]->match.fwnode = of_fwnode_handle(rem);
of_node_put(rem);
}
diff --git a/drivers/media/platform/atmel/atmel-isc.c b/drivers/media/platform/atmel/atmel-isc.c
index 0c2635647f69..34676409ca08 100644
--- a/drivers/media/platform/atmel/atmel-isc.c
+++ b/drivers/media/platform/atmel/atmel-isc.c
@@ -2088,7 +2088,7 @@ static int isc_parse_dt(struct device *dev, struct isc_device *isc)
subdev_entity->pfe_cfg0 |= ISC_PFE_CFG0_PPOL_LOW;
subdev_entity->asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
- subdev_entity->asd->match.fwnode.fwnode =
+ subdev_entity->asd->match.fwnode =
of_fwnode_handle(rem);
list_add_tail(&subdev_entity->list, &isc->subdev_entities);
}
diff --git a/drivers/media/platform/atmel/atmel-isi.c b/drivers/media/platform/atmel/atmel-isi.c
index e900995143a3..9958918e2449 100644
--- a/drivers/media/platform/atmel/atmel-isi.c
+++ b/drivers/media/platform/atmel/atmel-isi.c
@@ -1128,7 +1128,7 @@ static int isi_graph_parse(struct atmel_isi *isi, struct device_node *node)
/* Remote node to connect */
isi->entity.node = remote;
isi->entity.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
- isi->entity.asd.match.fwnode.fwnode = of_fwnode_handle(remote);
+ isi->entity.asd.match.fwnode = of_fwnode_handle(remote);
return 0;
}
}
diff --git a/drivers/media/platform/davinci/vpif_capture.c b/drivers/media/platform/davinci/vpif_capture.c
index e45916f69def..e1c273c8b9a6 100644
--- a/drivers/media/platform/davinci/vpif_capture.c
+++ b/drivers/media/platform/davinci/vpif_capture.c
@@ -1390,7 +1390,7 @@ static int vpif_async_bound(struct v4l2_async_notifier *notifier,
for (i = 0; i < vpif_obj.config->asd_sizes[0]; i++) {
struct v4l2_async_subdev *_asd = vpif_obj.config->asd[i];
- const struct fwnode_handle *fwnode = _asd->match.fwnode.fwnode;
+ const struct fwnode_handle *fwnode = _asd->match.fwnode;
if (fwnode == subdev->fwnode) {
vpif_obj.sd[i] = subdev;
@@ -1595,7 +1595,7 @@ vpif_capture_get_pdata(struct platform_device *pdev)
}
pdata->asd[i]->match_type = V4L2_ASYNC_MATCH_FWNODE;
- pdata->asd[i]->match.fwnode.fwnode = of_fwnode_handle(rem);
+ pdata->asd[i]->match.fwnode = of_fwnode_handle(rem);
of_node_put(rem);
}
diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c
index 0ef583cfc424..78b48a1fa26c 100644
--- a/drivers/media/platform/exynos4-is/media-dev.c
+++ b/drivers/media/platform/exynos4-is/media-dev.c
@@ -456,7 +456,7 @@ static int fimc_md_parse_port_node(struct fimc_md *fmd,
}
fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
- fmd->sensor[index].asd.match.fwnode.fwnode = of_fwnode_handle(rem);
+ fmd->sensor[index].asd.match.fwnode = of_fwnode_handle(rem);
fmd->async_subdevs[index] = &fmd->sensor[index].asd;
fmd->num_sensors++;
@@ -1364,7 +1364,7 @@ static int subdev_notifier_bound(struct v4l2_async_notifier *notifier,
/* Find platform data for this sensor subdev */
for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++)
- if (fmd->sensor[i].asd.match.fwnode.fwnode ==
+ if (fmd->sensor[i].asd.match.fwnode ==
of_fwnode_handle(subdev->dev->of_node))
si = &fmd->sensor[i];
diff --git a/drivers/media/platform/pxa_camera.c b/drivers/media/platform/pxa_camera.c
index 305cf1cac210..f028084f0775 100644
--- a/drivers/media/platform/pxa_camera.c
+++ b/drivers/media/platform/pxa_camera.c
@@ -2335,7 +2335,7 @@ static int pxa_camera_pdata_from_dt(struct device *dev,
asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
remote = of_graph_get_remote_port(np);
if (remote) {
- asd->match.fwnode.fwnode = of_fwnode_handle(remote);
+ asd->match.fwnode = of_fwnode_handle(remote);
of_node_put(remote);
} else {
dev_notice(dev, "no remote for %pOF\n", np);
diff --git a/drivers/media/platform/qcom/camss-8x16/camss.c b/drivers/media/platform/qcom/camss-8x16/camss.c
index 390a42c17b66..05f06c98aa64 100644
--- a/drivers/media/platform/qcom/camss-8x16/camss.c
+++ b/drivers/media/platform/qcom/camss-8x16/camss.c
@@ -341,7 +341,7 @@ static int camss_of_parse_ports(struct device *dev,
}
csd->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
- csd->asd.match.fwnode.fwnode = of_fwnode_handle(remote);
+ csd->asd.match.fwnode = of_fwnode_handle(remote);
}
return notifier->num_subdevs;
diff --git a/drivers/media/platform/rcar-vin/rcar-core.c b/drivers/media/platform/rcar-vin/rcar-core.c
index 108d776f3265..f1fc7978d6d1 100644
--- a/drivers/media/platform/rcar-vin/rcar-core.c
+++ b/drivers/media/platform/rcar-vin/rcar-core.c
@@ -187,7 +187,7 @@ static int rvin_digital_graph_init(struct rvin_dev *vin)
return -ENODEV;
vin_dbg(vin, "Found digital subdevice %pOF\n",
- to_of_node(vin->digital->asd.match.fwnode.fwnode));
+ to_of_node(vin->digital->asd.match.fwnode));
vin->notifier.ops = &rvin_digital_notify_ops;
ret = v4l2_async_notifier_register(&vin->v4l2_dev, &vin->notifier);
diff --git a/drivers/media/platform/rcar_drif.c b/drivers/media/platform/rcar_drif.c
index 63c94f4028a7..b2e080ef5391 100644
--- a/drivers/media/platform/rcar_drif.c
+++ b/drivers/media/platform/rcar_drif.c
@@ -1107,7 +1107,7 @@ static int rcar_drif_notify_bound(struct v4l2_async_notifier *notifier,
struct rcar_drif_sdr *sdr =
container_of(notifier, struct rcar_drif_sdr, notifier);
- if (sdr->ep.asd.match.fwnode.fwnode !=
+ if (sdr->ep.asd.match.fwnode !=
of_fwnode_handle(subdev->dev->of_node)) {
rdrif_err(sdr, "subdev %s cannot bind\n", subdev->name);
return -EINVAL;
@@ -1235,7 +1235,7 @@ static int rcar_drif_parse_subdevs(struct rcar_drif_sdr *sdr)
return -EINVAL;
}
- sdr->ep.asd.match.fwnode.fwnode = fwnode;
+ sdr->ep.asd.match.fwnode = fwnode;
sdr->ep.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
notifier->num_subdevs++;
diff --git a/drivers/media/platform/soc_camera/soc_camera.c b/drivers/media/platform/soc_camera/soc_camera.c
index 916ff68b73d4..d13e2c5fb06f 100644
--- a/drivers/media/platform/soc_camera/soc_camera.c
+++ b/drivers/media/platform/soc_camera/soc_camera.c
@@ -1517,7 +1517,7 @@ static int soc_of_bind(struct soc_camera_host *ici,
if (!info)
return -ENOMEM;
- info->sasd.asd.match.fwnode.fwnode = of_fwnode_handle(remote);
+ info->sasd.asd.match.fwnode = of_fwnode_handle(remote);
info->sasd.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
info->subdev = &info->sasd.asd;
diff --git a/drivers/media/platform/stm32/stm32-dcmi.c b/drivers/media/platform/stm32/stm32-dcmi.c
index ac4c450a6c7d..9460b3080dca 100644
--- a/drivers/media/platform/stm32/stm32-dcmi.c
+++ b/drivers/media/platform/stm32/stm32-dcmi.c
@@ -1520,7 +1520,7 @@ static int dcmi_graph_parse(struct stm32_dcmi *dcmi, struct device_node *node)
/* Remote node to connect */
dcmi->entity.node = remote;
dcmi->entity.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
- dcmi->entity.asd.match.fwnode.fwnode = of_fwnode_handle(remote);
+ dcmi->entity.asd.match.fwnode = of_fwnode_handle(remote);
return 0;
}
}
diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c
index 719ed1d79957..d1febe5baa6d 100644
--- a/drivers/media/platform/ti-vpe/cal.c
+++ b/drivers/media/platform/ti-vpe/cal.c
@@ -1702,7 +1702,7 @@ static int of_cal_create_instance(struct cal_ctx *ctx, int inst)
goto cleanup_exit;
}
asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
- asd->match.fwnode.fwnode = of_fwnode_handle(sensor_node);
+ asd->match.fwnode = of_fwnode_handle(sensor_node);
remote_ep = of_graph_get_remote_endpoint(ep_node);
if (!remote_ep) {
diff --git a/drivers/media/platform/xilinx/xilinx-vipp.c b/drivers/media/platform/xilinx/xilinx-vipp.c
index f4c3e48ed2c0..6bb28cd49dae 100644
--- a/drivers/media/platform/xilinx/xilinx-vipp.c
+++ b/drivers/media/platform/xilinx/xilinx-vipp.c
@@ -387,7 +387,7 @@ static int xvip_graph_parse_one(struct xvip_composite_device *xdev,
entity->node = remote;
entity->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
- entity->asd.match.fwnode.fwnode = of_fwnode_handle(remote);
+ entity->asd.match.fwnode = of_fwnode_handle(remote);
list_add_tail(&entity->list, &xdev->entities);
xdev->num_subdevs++;
}
diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
index e5acfab470a5..2b08d03b251d 100644
--- a/drivers/media/v4l2-core/v4l2-async.c
+++ b/drivers/media/v4l2-core/v4l2-async.c
@@ -68,12 +68,12 @@ static bool match_i2c(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
static bool match_devname(struct v4l2_subdev *sd,
struct v4l2_async_subdev *asd)
{
- return !strcmp(asd->match.device_name.name, dev_name(sd->dev));
+ return !strcmp(asd->match.device_name, dev_name(sd->dev));
}
static bool match_fwnode(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
{
- return sd->fwnode == asd->match.fwnode.fwnode;
+ return sd->fwnode == asd->match.fwnode;
}
static bool match_custom(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
@@ -319,7 +319,7 @@ static bool __v4l2_async_notifier_fwnode_has_async_subdev(
if (asd->match_type != V4L2_ASYNC_MATCH_FWNODE)
continue;
- if (asd->match.fwnode.fwnode == fwnode)
+ if (asd->match.fwnode == fwnode)
return true;
}
@@ -330,7 +330,7 @@ static bool __v4l2_async_notifier_fwnode_has_async_subdev(
if (sd->asd->match_type != V4L2_ASYNC_MATCH_FWNODE)
continue;
- if (sd->asd->match.fwnode.fwnode == fwnode)
+ if (sd->asd->match.fwnode == fwnode)
return true;
}
@@ -355,8 +355,8 @@ static bool v4l2_async_notifier_fwnode_has_async_subdev(
struct v4l2_async_subdev *other_asd = notifier->subdevs[j];
if (other_asd->match_type == V4L2_ASYNC_MATCH_FWNODE &&
- asd->match.fwnode.fwnode ==
- other_asd->match.fwnode.fwnode)
+ asd->match.fwnode ==
+ other_asd->match.fwnode)
return true;
}
@@ -395,7 +395,7 @@ static int __v4l2_async_notifier_register(struct v4l2_async_notifier *notifier)
break;
case V4L2_ASYNC_MATCH_FWNODE:
if (v4l2_async_notifier_fwnode_has_async_subdev(
- notifier, asd->match.fwnode.fwnode, i)) {
+ notifier, asd->match.fwnode, i)) {
dev_err(dev,
"fwnode has already been registered or in notifier's subdev list\n");
ret = -EEXIST;
@@ -510,7 +510,7 @@ void v4l2_async_notifier_cleanup(struct v4l2_async_notifier *notifier)
switch (asd->match_type) {
case V4L2_ASYNC_MATCH_FWNODE:
- fwnode_handle_put(asd->match.fwnode.fwnode);
+ fwnode_handle_put(asd->match.fwnode);
break;
default:
WARN_ON_ONCE(true);
diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c
index fb72c7ac04d4..d630640642ee 100644
--- a/drivers/media/v4l2-core/v4l2-fwnode.c
+++ b/drivers/media/v4l2-core/v4l2-fwnode.c
@@ -359,9 +359,9 @@ static int v4l2_async_notifier_fwnode_parse_endpoint(
return -ENOMEM;
asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
- asd->match.fwnode.fwnode =
+ asd->match.fwnode =
fwnode_graph_get_remote_port_parent(endpoint);
- if (!asd->match.fwnode.fwnode) {
+ if (!asd->match.fwnode) {
dev_warn(dev, "bad remote port parent\n");
ret = -EINVAL;
goto out_err;
@@ -393,7 +393,7 @@ static int v4l2_async_notifier_fwnode_parse_endpoint(
return 0;
out_err:
- fwnode_handle_put(asd->match.fwnode.fwnode);
+ fwnode_handle_put(asd->match.fwnode);
kfree(asd);
return ret == -ENOTCONN ? 0 : ret;
@@ -566,7 +566,7 @@ static int v4l2_fwnode_reference_parse(
}
notifier->subdevs[notifier->num_subdevs] = asd;
- asd->match.fwnode.fwnode = args.fwnode;
+ asd->match.fwnode = args.fwnode;
asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
notifier->num_subdevs++;
}
@@ -853,7 +853,7 @@ static int v4l2_fwnode_reference_parse_int_props(
}
notifier->subdevs[notifier->num_subdevs] = asd;
- asd->match.fwnode.fwnode = fwnode;
+ asd->match.fwnode = fwnode;
asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
notifier->num_subdevs++;
}
diff --git a/drivers/staging/media/imx/imx-media-dev.c b/drivers/staging/media/imx/imx-media-dev.c
index 2800700482d6..f7ed5f506fa9 100644
--- a/drivers/staging/media/imx/imx-media-dev.c
+++ b/drivers/staging/media/imx/imx-media-dev.c
@@ -48,7 +48,7 @@ find_async_subdev(struct imx_media_dev *imxmd,
asd = &imxasd->asd;
switch (asd->match_type) {
case V4L2_ASYNC_MATCH_FWNODE:
- if (fwnode && asd->match.fwnode.fwnode == fwnode)
+ if (fwnode && asd->match.fwnode == fwnode)
return asd;
break;
case V4L2_ASYNC_MATCH_DEVNAME:
@@ -104,7 +104,7 @@ int imx_media_add_async_subdev(struct imx_media_dev *imxmd,
if (fwnode) {
asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
- asd->match.fwnode.fwnode = fwnode;
+ asd->match.fwnode = fwnode;
} else {
asd->match_type = V4L2_ASYNC_MATCH_DEVNAME;
asd->match.device_name.name = devname;
diff --git a/include/media/v4l2-async.h b/include/media/v4l2-async.h
index 6152434cbe82..a010af5134b2 100644
--- a/include/media/v4l2-async.h
+++ b/include/media/v4l2-async.h
@@ -58,12 +58,8 @@ enum v4l2_async_match_type {
struct v4l2_async_subdev {
enum v4l2_async_match_type match_type;
union {
- struct {
- struct fwnode_handle *fwnode;
- } fwnode;
- struct {
- const char *name;
- } device_name;
+ struct fwnode_handle *fwnode;
+ const char *device_name;
struct {
int adapter_id;
unsigned short address;
--
2.14.3
^ permalink raw reply related
* [PATCH v2 2/3] ARM: dts: r8a7743: Add CMT SoC specific support
From: Geert Uytterhoeven @ 2017-12-19 11:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513618743-4773-3-git-send-email-fabrizio.castro@bp.renesas.com>
On Mon, Dec 18, 2017 at 6:39 PM, Fabrizio Castro
<fabrizio.castro@bp.renesas.com> wrote:
> Add CMT[01] support to SoC DT.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH v2 3/3] ARM: dts: r8a7745: Add CMT SoC specific support
From: Geert Uytterhoeven @ 2017-12-19 11:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513618743-4773-4-git-send-email-fabrizio.castro@bp.renesas.com>
On Mon, Dec 18, 2017 at 6:39 PM, Fabrizio Castro
<fabrizio.castro@bp.renesas.com> wrote:
> Add CMT[01] support to SoC DT.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH v2 3/6] ARM: dts: r8a7743: Add PWM SoC support
From: Geert Uytterhoeven @ 2017-12-19 11:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513619528-12060-4-git-send-email-fabrizio.castro@bp.renesas.com>
On Mon, Dec 18, 2017 at 6:52 PM, Fabrizio Castro
<fabrizio.castro@bp.renesas.com> wrote:
> Add the definitions for pwm[0123456] to the SoC .dtsi.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -1082,6 +1082,83 @@
> status = "disabled";
> };
>
> + pwm0: pwm at e6e30000 {
> + compatible = "renesas,pwm-r8a7743",
> + "renesas,pwm-rcar";
I think the above can fit in one line.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
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