* [xlnx:master 1106/1121] arch/arm64/include/asm/io.h:55:2: warning: 'pmap' may be used uninitialized in this function
From: kbuild test robot @ 2017-12-23 0:40 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://github.com/Xilinx/linux-xlnx master
head: 9c2e29b2c81dbb1efb7ee4944b18e12226b97513
commit: 75d045afd1d68c05256340776d0fdedbe741842e [1106/1121] drivers: net: ethernet: TSN QBV- Map ST Gate State value
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 75d045afd1d68c05256340776d0fdedbe741842e
# save the attached .config to linux build tree
make.cross ARCH=arm64
Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings
All warnings (new ones prefixed by >>):
In file included from include/linux/scatterlist.h:8:0,
from include/linux/dmaengine.h:24,
from include/linux/netdevice.h:38,
from drivers/net//ethernet/xilinx/xilinx_axienet.h:11,
from drivers/net//ethernet/xilinx/xilinx_tsn_switch.h:21,
from drivers/net//ethernet/xilinx/xilinx_tsn_switch.c:18:
drivers/net//ethernet/xilinx/xilinx_tsn_switch.c: In function 'tsnswitch_probe':
>> arch/arm64/include/asm/io.h:55:2: warning: 'pmap' may be used uninitialized in this function [-Wmaybe-uninitialized]
asm volatile("str %w0, [%1]" : : "rZ" (val), "r" (addr));
^~~
drivers/net//ethernet/xilinx/xilinx_tsn_switch.c:722:6: note: 'pmap' was declared here
u32 pmap;
^~~~
--
In file included from include/linux/scatterlist.h:8:0,
from include/linux/dmaengine.h:24,
from include/linux/netdevice.h:38,
from drivers/net/ethernet/xilinx/xilinx_axienet.h:11,
from drivers/net/ethernet/xilinx/xilinx_tsn_switch.h:21,
from drivers/net/ethernet/xilinx/xilinx_tsn_switch.c:18:
drivers/net/ethernet/xilinx/xilinx_tsn_switch.c: In function 'tsnswitch_probe':
>> arch/arm64/include/asm/io.h:55:2: warning: 'pmap' may be used uninitialized in this function [-Wmaybe-uninitialized]
asm volatile("str %w0, [%1]" : : "rZ" (val), "r" (addr));
^~~
drivers/net/ethernet/xilinx/xilinx_tsn_switch.c:722:6: note: 'pmap' was declared here
u32 pmap;
^~~~
vim +/pmap +55 arch/arm64/include/asm/io.h
fc47897d2 Catalin Marinas 2012-03-05 51
09a572398 Thierry Reding 2014-07-28 52 #define __raw_writel __raw_writel
fc47897d2 Catalin Marinas 2012-03-05 53 static inline void __raw_writel(u32 val, volatile void __iomem *addr)
fc47897d2 Catalin Marinas 2012-03-05 54 {
ee5e41b5f Robin Murphy 2016-09-08 @55 asm volatile("str %w0, [%1]" : : "rZ" (val), "r" (addr));
fc47897d2 Catalin Marinas 2012-03-05 56 }
fc47897d2 Catalin Marinas 2012-03-05 57
:::::: The code at line 55 was first introduced by commit
:::::: ee5e41b5f21a5438664effce1ba5bdd11e03ee24 arm64/io: Allow I/O writes to use {W,X}ZR
:::::: TO: Robin Murphy <robin.murphy@arm.com>
:::::: CC: Will Deacon <will.deacon@arm.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH] arm64: support __int128 with clang
From: Jason A. Donenfeld @ 2017-12-23 0:43 UTC (permalink / raw)
To: linux-arm-kernel
Commit fb8722735f50 ("arm64: support __int128 on gcc 5+") added support
for arm64 __int128 with gcc with a version-conditional, but neglected to
enable this for clang, which in fact appears to support aarch64 __int128.
This commit therefore enables it if the compiler is clang, using the
same type of makefile conditional used elsewhere in the tree.
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
---
arch/arm64/Makefile | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index b481b4a7c011..16c2e8b58546 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -57,7 +57,11 @@ KBUILD_AFLAGS += $(lseinstr) $(brokengasinst)
KBUILD_CFLAGS += $(call cc-option,-mabi=lp64)
KBUILD_AFLAGS += $(call cc-option,-mabi=lp64)
+ifeq ($(cc-name),clang)
+KBUILD_CFLAGS += -DCONFIG_ARCH_SUPPORTS_INT128
+else
KBUILD_CFLAGS += $(call cc-ifversion, -ge, 0500, -DCONFIG_ARCH_SUPPORTS_INT128)
+endif
ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
KBUILD_CPPFLAGS += -mbig-endian
--
2.15.1
^ permalink raw reply related
* [PATCH -next] media: atmel-isc: Make local symbol fmt_configs_list static
From: Wei Yongjun @ 2017-12-23 1:57 UTC (permalink / raw)
To: linux-arm-kernel
Fixes the following sparse warning:
drivers/media/platform/atmel/atmel-isc.c:338:19: warning:
symbol 'fmt_configs_list' was not declared. Should it be static?
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
---
drivers/media/platform/atmel/atmel-isc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platform/atmel/atmel-isc.c b/drivers/media/platform/atmel/atmel-isc.c
index 0c26356..2dd72fc 100644
--- a/drivers/media/platform/atmel/atmel-isc.c
+++ b/drivers/media/platform/atmel/atmel-isc.c
@@ -335,7 +335,7 @@ struct isc_device {
},
};
-struct fmt_config fmt_configs_list[] = {
+static struct fmt_config fmt_configs_list[] = {
{
.fourcc = V4L2_PIX_FMT_SBGGR8,
.pfe_cfg0_bps = ISC_PFE_CFG0_BPS_EIGHT,
^ permalink raw reply related
* [PATCH 1/1] ARM: imx_v6_v7_defconfig: enable CONFIG_CPU_FREQ_STAT
From: Dong Aisheng @ 2017-12-23 4:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOMZO5CucxOE3VY4tQ2rwhmr6y6sV70XmBtH35StP+Hk+6z-qw@mail.gmail.com>
Hi Fabio,
On Fri, Dec 22, 2017 at 06:59:54PM -0200, Fabio Estevam wrote:
> Hi Dong,
>
> On Fri, Dec 22, 2017 at 8:05 AM, Dong Aisheng <aisheng.dong@nxp.com> wrote:
>
> > diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
> > index 0d44949..e58be5d 100644
> > --- a/arch/arm/configs/imx_v6_v7_defconfig
> > +++ b/arch/arm/configs/imx_v6_v7_defconfig
> > @@ -48,13 +48,12 @@ CONFIG_PCI_IMX6=y
> > CONFIG_SMP=y
> > CONFIG_ARM_PSCI=y
> > CONFIG_PREEMPT_VOLUNTARY=y
> > -CONFIG_AEABI=y
> > CONFIG_HIGHMEM=y
> > -CONFIG_CMA=y
> > CONFIG_FORCE_MAX_ZONEORDER=14
> > CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
> > CONFIG_KEXEC=y
> > CONFIG_CPU_FREQ=y
> > +CONFIG_CPU_FREQ_STAT=y
> > CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
> > CONFIG_CPU_FREQ_GOV_POWERSAVE=y
> > CONFIG_CPU_FREQ_GOV_USERSPACE=y
> > @@ -81,7 +80,6 @@ CONFIG_CAN_FLEXCAN=y
> > CONFIG_BT=y
> > CONFIG_BT_HCIUART=y
> > CONFIG_BT_HCIUART_H4=y
> > -CONFIG_BT_HCIUART_LL=y
>
> This option is gone since it now depends on CONFIG_BT_HCIUART_SERDEV=y.
>
> Please rebase your patch against Shawn's origin/imx/defconfig.
>
> There is one commit in this branch that adds
> CONFIG_BT_HCIUART_SERDEV=y, which then avoids the automatic removal of
> CONFIG_BT_HCIUART_LL.
>
Got it.
Thanks for the kind reminder.
Regards
Dong Aisheng
^ permalink raw reply
* [PATCH RESEND 1/1] cpufreq: imx6q: switch to Use clk_bulk_get to refine clk operations
From: Dong Aisheng @ 2017-12-23 4:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2124437.LcYqgt3btA@aspire.rjw.lan>
On Fri, Dec 22, 2017 at 07:34:57PM +0100, Rafael J. Wysocki wrote:
> On Thursday, December 21, 2017 2:18:01 PM CET Dong Aisheng wrote:
> > Hi Rafael,
> >
> > On Thu, Sep 14, 2017 at 02:40:32PM -0700, Viresh Kumar wrote:
> > > On 31-08-17, 19:43, Dong Aisheng wrote:
> > > > Use clk_bulk_get to ease the driver clocks handling.
> > > >
> > > > Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
> > > > Cc: Viresh Kumar <viresh.kumar@linaro.org>
> > > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > > Cc: Anson Huang <anson.huang@nxp.com>
> > > > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > > > Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
> > > > --
> > > > The original one is here which depends on clk_bulk APIs.
> > > > https://patchwork.kernel.org/patch/9737337/
> > > > Now the clk_bulk APIs are already in kernel, so resend the patch.
> > > > (Patch title changed a bit to be more specific.)
> > > > ---
> > > > drivers/cpufreq/imx6q-cpufreq.c | 125 ++++++++++++++++++----------------------
> > > > 1 file changed, 56 insertions(+), 69 deletions(-)
> > >
> > > Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> > >
> >
> > Would you help pick it?
> > I did not see it in latest kernel.
> > It still applies.
>
> OK
>
> Can you please resend the patch again with the ACK from Viresh?
>
Of course yes.
Thanks
Regards
Dong Aisheng
> It looks like it fell through the cracks, sorry about that.
>
> Thanks,
> Rafael
>
^ permalink raw reply
* [PATCH V2 1/1] ARM: imx_v6_v7_defconfig: enable CONFIG_CPU_FREQ_STAT
From: Dong Aisheng @ 2017-12-23 4:51 UTC (permalink / raw)
To: linux-arm-kernel
It is very useful for user to retrieve cpufreq transtion statistics
and worth to be default enabled.
Generated by make ARCH=arm savedefconfig.
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
---
Based on shawn/imx/defconfig branch
---
arch/arm/configs/imx_v6_v7_defconfig | 17 ++++++-----------
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index abd06c3..49b973e 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -48,13 +48,12 @@ CONFIG_PCI_IMX6=y
CONFIG_SMP=y
CONFIG_ARM_PSCI=y
CONFIG_PREEMPT_VOLUNTARY=y
-CONFIG_AEABI=y
CONFIG_HIGHMEM=y
-CONFIG_CMA=y
CONFIG_FORCE_MAX_ZONEORDER=14
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
CONFIG_KEXEC=y
CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
@@ -80,7 +79,6 @@ CONFIG_CAN=y
CONFIG_CAN_FLEXCAN=y
CONFIG_BT=y
CONFIG_BT_HCIUART=y
-CONFIG_BT_HCIUART_SERDEV=y
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_LL=y
CONFIG_CFG80211=y
@@ -91,7 +89,6 @@ CONFIG_RFKILL_INPUT=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
-CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_IMX_WEIM=y
CONFIG_CONNECTOR=y
@@ -169,9 +166,9 @@ CONFIG_MOUSE_PS2_ELANTECH=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=y
CONFIG_TOUCHSCREEN_EGALAX=y
+CONFIG_TOUCHSCREEN_MAX11801=y
CONFIG_TOUCHSCREEN_IMX6UL_TSC=y
CONFIG_TOUCHSCREEN_EDT_FT5X06=y
-CONFIG_TOUCHSCREEN_MAX11801=y
CONFIG_TOUCHSCREEN_MC13783=y
CONFIG_TOUCHSCREEN_TSC2004=y
CONFIG_TOUCHSCREEN_TSC2007=y
@@ -180,7 +177,6 @@ CONFIG_TOUCHSCREEN_SX8654=y
CONFIG_TOUCHSCREEN_COLIBRI_VF50=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_MMA8450=y
-CONFIG_HID_MULTITOUCH=y
CONFIG_SERIO_SERPORT=m
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_IMX=y
@@ -188,7 +184,6 @@ CONFIG_SERIAL_IMX_CONSOLE=y
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
-CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
@@ -232,13 +227,13 @@ CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_MC13783=y
CONFIG_REGULATOR_MC13892=y
CONFIG_REGULATOR_PFUZE100=y
+CONFIG_RC_CORE=y
+CONFIG_RC_DEVICES=y
+CONFIG_IR_GPIO_CIR=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_RC_CORE=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
-CONFIG_RC_DEVICES=y
-CONFIG_IR_GPIO_CIR=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_V4L_PLATFORM_DRIVERS=y
@@ -249,7 +244,6 @@ CONFIG_VIDEO_CODA=m
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_ADV7180=m
CONFIG_VIDEO_OV5640=m
-CONFIG_SOC_CAMERA_OV2640=y
CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y
CONFIG_DRM_PANEL_LVDS=y
@@ -288,6 +282,7 @@ CONFIG_SND_SOC_CS42XX8_I2C=y
CONFIG_SND_SOC_TLV320AIC3X=y
CONFIG_SND_SOC_WM8960=y
CONFIG_SND_SIMPLE_CARD=y
+CONFIG_HID_MULTITOUCH=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
--
2.7.4
^ permalink raw reply related
* [PATCH RESEND V2 1/1] cpufreq: imx6q: switch to Use clk_bulk_get to refine clk operations
From: Dong Aisheng @ 2017-12-23 4:53 UTC (permalink / raw)
To: linux-arm-kernel
Use clk_bulk_get to ease the driver clocks handling.
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Anson Huang <anson.huang@nxp.com>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
---
Rebased on linux-pm.git/linux-next branch
---
drivers/cpufreq/imx6q-cpufreq.c | 125 ++++++++++++++++++----------------------
1 file changed, 56 insertions(+), 69 deletions(-)
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index d9b2c2d..8bfb077 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -25,15 +25,29 @@ static struct regulator *arm_reg;
static struct regulator *pu_reg;
static struct regulator *soc_reg;
-static struct clk *arm_clk;
-static struct clk *pll1_sys_clk;
-static struct clk *pll1_sw_clk;
-static struct clk *step_clk;
-static struct clk *pll2_pfd2_396m_clk;
-
-/* clk used by i.MX6UL */
-static struct clk *pll2_bus_clk;
-static struct clk *secondary_sel_clk;
+enum IMX6_CPUFREQ_CLKS {
+ ARM,
+ PLL1_SYS,
+ STEP,
+ PLL1_SW,
+ PLL2_PFD2_396M,
+ /* MX6UL requires two more clks */
+ PLL2_BUS,
+ SECONDARY_SEL,
+};
+#define IMX6Q_CPUFREQ_CLK_NUM 5
+#define IMX6UL_CPUFREQ_CLK_NUM 7
+
+static int num_clks;
+static struct clk_bulk_data clks[] = {
+ { .id = "arm" },
+ { .id = "pll1_sys" },
+ { .id = "step" },
+ { .id = "pll1_sw" },
+ { .id = "pll2_pfd2_396m" },
+ { .id = "pll2_bus" },
+ { .id = "secondary_sel" },
+};
static struct device *cpu_dev;
static bool free_opp;
@@ -53,7 +67,7 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
new_freq = freq_table[index].frequency;
freq_hz = new_freq * 1000;
- old_freq = clk_get_rate(arm_clk) / 1000;
+ old_freq = clk_get_rate(clks[ARM].clk) / 1000;
opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_hz);
if (IS_ERR(opp)) {
@@ -112,29 +126,31 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
* voltage of 528MHz, so lower the CPU frequency to one
* half before changing CPU frequency.
*/
- clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
- clk_set_parent(pll1_sw_clk, pll1_sys_clk);
- if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk))
- clk_set_parent(secondary_sel_clk, pll2_bus_clk);
+ clk_set_rate(clks[ARM].clk, (old_freq >> 1) * 1000);
+ clk_set_parent(clks[PLL1_SW].clk, clks[PLL1_SYS].clk);
+ if (freq_hz > clk_get_rate(clks[PLL2_PFD2_396M].clk))
+ clk_set_parent(clks[SECONDARY_SEL].clk,
+ clks[PLL2_BUS].clk);
else
- clk_set_parent(secondary_sel_clk, pll2_pfd2_396m_clk);
- clk_set_parent(step_clk, secondary_sel_clk);
- clk_set_parent(pll1_sw_clk, step_clk);
+ clk_set_parent(clks[SECONDARY_SEL].clk,
+ clks[PLL2_PFD2_396M].clk);
+ clk_set_parent(clks[STEP].clk, clks[SECONDARY_SEL].clk);
+ clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk);
} else {
- clk_set_parent(step_clk, pll2_pfd2_396m_clk);
- clk_set_parent(pll1_sw_clk, step_clk);
- if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk)) {
- clk_set_rate(pll1_sys_clk, new_freq * 1000);
- clk_set_parent(pll1_sw_clk, pll1_sys_clk);
+ clk_set_parent(clks[STEP].clk, clks[PLL2_PFD2_396M].clk);
+ clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk);
+ if (freq_hz > clk_get_rate(clks[PLL2_PFD2_396M].clk)) {
+ clk_set_rate(clks[PLL1_SYS].clk, new_freq * 1000);
+ clk_set_parent(clks[PLL1_SW].clk, clks[PLL1_SYS].clk);
} else {
/* pll1_sys needs to be enabled for divider rate change to work. */
pll1_sys_temp_enabled = true;
- clk_prepare_enable(pll1_sys_clk);
+ clk_prepare_enable(clks[PLL1_SYS].clk);
}
}
/* Ensure the arm clock divider is what we expect */
- ret = clk_set_rate(arm_clk, new_freq * 1000);
+ ret = clk_set_rate(clks[ARM].clk, new_freq * 1000);
if (ret) {
dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
regulator_set_voltage_tol(arm_reg, volt_old, 0);
@@ -143,7 +159,7 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
/* PLL1 is only needed until after ARM-PODF is set. */
if (pll1_sys_temp_enabled)
- clk_disable_unprepare(pll1_sys_clk);
+ clk_disable_unprepare(clks[PLL1_SYS].clk);
/* scaling down? scale voltage after frequency */
if (new_freq < old_freq) {
@@ -174,7 +190,7 @@ static int imx6q_cpufreq_init(struct cpufreq_policy *policy)
{
int ret;
- policy->clk = arm_clk;
+ policy->clk = clks[ARM].clk;
ret = cpufreq_generic_init(policy, freq_table, transition_latency);
policy->suspend_freq = policy->max;
@@ -266,28 +282,15 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
return -ENOENT;
}
- arm_clk = clk_get(cpu_dev, "arm");
- pll1_sys_clk = clk_get(cpu_dev, "pll1_sys");
- pll1_sw_clk = clk_get(cpu_dev, "pll1_sw");
- step_clk = clk_get(cpu_dev, "step");
- pll2_pfd2_396m_clk = clk_get(cpu_dev, "pll2_pfd2_396m");
- if (IS_ERR(arm_clk) || IS_ERR(pll1_sys_clk) || IS_ERR(pll1_sw_clk) ||
- IS_ERR(step_clk) || IS_ERR(pll2_pfd2_396m_clk)) {
- dev_err(cpu_dev, "failed to get clocks\n");
- ret = -ENOENT;
- goto put_clk;
- }
-
if (of_machine_is_compatible("fsl,imx6ul") ||
- of_machine_is_compatible("fsl,imx6ull")) {
- pll2_bus_clk = clk_get(cpu_dev, "pll2_bus");
- secondary_sel_clk = clk_get(cpu_dev, "secondary_sel");
- if (IS_ERR(pll2_bus_clk) || IS_ERR(secondary_sel_clk)) {
- dev_err(cpu_dev, "failed to get clocks specific to imx6ul\n");
- ret = -ENOENT;
- goto put_clk;
- }
- }
+ of_machine_is_compatible("fsl,imx6ull"))
+ num_clks = IMX6UL_CPUFREQ_CLK_NUM;
+ else
+ num_clks = IMX6Q_CPUFREQ_CLK_NUM;
+
+ ret = clk_bulk_get(cpu_dev, num_clks, clks);
+ if (ret)
+ goto put_node;
arm_reg = regulator_get(cpu_dev, "arm");
pu_reg = regulator_get_optional(cpu_dev, "pu");
@@ -424,22 +427,11 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
regulator_put(pu_reg);
if (!IS_ERR(soc_reg))
regulator_put(soc_reg);
-put_clk:
- if (!IS_ERR(arm_clk))
- clk_put(arm_clk);
- if (!IS_ERR(pll1_sys_clk))
- clk_put(pll1_sys_clk);
- if (!IS_ERR(pll1_sw_clk))
- clk_put(pll1_sw_clk);
- if (!IS_ERR(step_clk))
- clk_put(step_clk);
- if (!IS_ERR(pll2_pfd2_396m_clk))
- clk_put(pll2_pfd2_396m_clk);
- if (!IS_ERR(pll2_bus_clk))
- clk_put(pll2_bus_clk);
- if (!IS_ERR(secondary_sel_clk))
- clk_put(secondary_sel_clk);
+
+ clk_bulk_put(num_clks, clks);
+put_node:
of_node_put(np);
+
return ret;
}
@@ -453,13 +445,8 @@ static int imx6q_cpufreq_remove(struct platform_device *pdev)
if (!IS_ERR(pu_reg))
regulator_put(pu_reg);
regulator_put(soc_reg);
- clk_put(arm_clk);
- clk_put(pll1_sys_clk);
- clk_put(pll1_sw_clk);
- clk_put(step_clk);
- clk_put(pll2_pfd2_396m_clk);
- clk_put(pll2_bus_clk);
- clk_put(secondary_sel_clk);
+
+ clk_bulk_put(num_clks, clks);
return 0;
}
--
2.7.4
^ permalink raw reply related
* [RFC] does ioremap() cause memory leak?
From: Xishi Qiu @ 2017-12-23 5:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5A3B76EE.8020001@huawei.com>
On 2017/12/21 16:55, Xishi Qiu wrote:
> When we use iounmap() to free the mapping, it calls unmap_vmap_area() to clear page table,
> but do not free the memory of page table, right?
>
> So when use ioremap() to mapping another area(incluce the area before), it may use
> large mapping(e.g. ioremap_pmd_enabled()), so the original page table memory(e.g. pte memory)
> will be lost, it cause memory leak, right?
>
> Thanks,
> Xishi Qiu
>
>
> .
>
Hi, here is another question from lious.lilei at hisilicon.com
As ARM-ARM said
?The architecture permits the caching of any translation table entry that has been returned from memory without a
fault, provided that the entry does not, itself, cause a Translation fault, an Address size fault, or an Access Flag fault.
This means that the entries that can be cached include:
? Entries in translation tables that point to subsequent tables to be used in that stage of translation.
? Stage 2 translation table entries used as part of a stage 1 translation table walk
? Stage 2 translation table entries used to translate the output address of the stage 1 translation.?
this means pgd, pud, pmd, pte all can be cached in TLB if itself have not a fault.
the scenario want page walk from:
4K: pgd0 --> pud0 --> pmd0 --> pte0 (4K)
To
2M: pgd0 --> pud0 --> pte1(2M)
--> is connect next pagetable
-X-> is disconnect next pagetable
I have seen the ioremap and iounmap software flow for ARM64 in Kernel version 4.14.
When I use ioremap to get a valid virtual address for a device address, Kernel would use ioremap_page_range to config the pagetable.
In ioremap_page_range function, if there is no pud, pmd or pte, Kernel would alloc one page for it. And then Kernel write the valid value into the address.
When I use iounmap to release this area, Kernel would write zero into the last level pagetable, then execute tlbi vaae1is to flush the tlb. But I haven`t seen Kernel would free the used page for pud, pmd or pte.
So there is a scene, I config Kernel to use 4K pagetable, and enable CONFIG_HAVE_ARCH_HUGE_VMAP. The when I use ioremap, Kernel would config 1G, 2M or 4K pagetable according to the size.
First I use ioremap to ask for 4K size. Kernel returns a virtual address VA1. Then I use iounmap to free this area. Kernel would write zero into the VA1`s level3 pagetable. Then when Kernel wants to get VA1 back, Kernel would send a tlbi vaae1is.
the page become follow:
1. 4K: pgd0 --> pud0 --> pmd0 --> pte0 (4K)
2. pte0 write 0
3. 4K: pgd0 --> pud0 --> pmd0(still valid) -X-> pte0 (4K,not valid)
4. tlbi vaae1is
Sencond I use ioremap to ask for 2M size. Kernel would config a 2M page, then return the virtual address. And Kernel just allocates the same virtual address VA1 for me. But I see in the ioremap_page_range software flow, Kernel just write the valid value into the level2 pagetable address, and doesn`t release the allocated page for the previous level3 pagetable. And when Kernel modifies the level2 pagetable, it also doesn`t follow the ARM break-before-make flow.
the page change as follow:
1.pgd0 --> pud0 --> pmd0(still valid) -X-> pte0 (4K,not valid)
2.write pmd0(still valid) to block for 2M.
3.expect pgd0 --> pud0 --> pte1(2M)
but because pmd0(4K pmd, still valid) before becoming to pte(2M pte), maybe have a speculative access between 1 and 3.
the pgd0, pud0, pmd0 have no fault will be cached in TBL, the pte0 have fault so can't be cached, this speculative access will be drop(no exception).
and the page change as:
1.pgd0 --> pud0 --> pmd0(still valid) -X-> pte0 (4K,not valid)
2.speculative access the same VA(pgd0 --> pud0 --> pmd0(still valid) -X-> pte0 (4K,not valid)). cache the pgd0, pud0, pmd0.
3.write pmd0 from pmd to block(pte) for 2M.
4.the page walker maybe pgd0 --> pud0 --> pmd0(cached in TLB) --> 0x0 (translation fault)
So I have two questions for this scene.
1. When the same virtual address allocated from ioremap, first is 4K size, second is 2M size, if Kernel would leak memory.
2. Kernel modifies the old invalid 4K pagetable to 2M, but doesn`t follow the ARM break-before-make flow, CPU maybe get the old invalid 4K pagetable information, then Kernel would panic.
^ permalink raw reply
* [PATCH] arm: dts: mt7623: enable all four available UARTs on bananapi-r2
From: Matthias Brugger @ 2017-12-23 7:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <b4e84a68da76c1ca538150a730777ff530c1db5a.1513922513.git.sean.wang@mediatek.com>
On 12/22/2017 07:06 AM, sean.wang at mediatek.com wrote:
> From: Sean Wang <sean.wang@mediatek.com>
>
> On bpi-r2 board, totally there're four uarts which we usually called
> uart[0-3] helpful to extend slow I/O devices. Among those ones, uart2 has
> dedicated pin slot which is used to conolse log. uart[0-1] appear at the
> 40-pins connector and uart3 has no pinout, but just has test points (TP47
> for TX and TP48 for RX, respectively) nearby uart2. Also, some missing
> pinctrl is being complemented for those devices.
>
> Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> ---
> arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 26 ++++++++++++++++++++++++--
> 1 file changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> index 7bf5aa2..64bf5db 100644
> --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> @@ -409,6 +409,20 @@
> <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
> };
> };
> +
> + uart2_pins_a: uart at 2 {
> + pins_dat {
> + pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
> + <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
> + };
> + };
> +
> + uart3_pins_a: uart at 3 {
> + pins_dat {
> + pinmux = <MT7623_PIN_242_URTS2_FUNC_URTS2>,
> + <MT7623_PIN_243_UCTS2_FUNC_UTXD3>;
> + };
> + };
> };
>
> &pwm {
> @@ -454,16 +468,24 @@
> &uart0 {
> pinctrl-names = "default";
> pinctrl-0 = <&uart0_pins_a>;
> - status = "disabled";
> + status = "okay";
> };
>
> &uart1 {
> pinctrl-names = "default";
> pinctrl-0 = <&uart1_pins_a>;
> - status = "disabled";
> + status = "okay";
> };
>
> &uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart2_pins_a>;
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart3_pins_a>;
> status = "okay";
> };
>
Why do we want to enable uart3 when there are only test points?
It is not very useful, or do I oversee something?
Regards,
Matthias
^ permalink raw reply
* [PATCH V2 1/1] ARM: imx_v6_v7_defconfig: enable CONFIG_CPU_FREQ_STAT
From: Fabio Estevam @ 2017-12-23 12:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514004660-32630-1-git-send-email-aisheng.dong@nxp.com>
On Sat, Dec 23, 2017 at 2:51 AM, Dong Aisheng <aisheng.dong@nxp.com> wrote:
> It is very useful for user to retrieve cpufreq transtion statistics
> and worth to be default enabled.
>
> Generated by make ARCH=arm savedefconfig.
>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH 00/12] Marvell NAND controller rework with ->exec_op()
From: Robert Jarzmik @ 2017-12-23 13:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171222233730.68d9cb9d@xps13>
Miquel RAYNAL <miquel.raynal@free-electrons.com> writes:
I removed a lot of people from the recipients, as this is a debug session.
>> > Now I get a lot of these message which I didn't have before :
>> > [ 26.897372] ubi0 warning: ubi_io_read: error -74 (ECC error)
>> > while reading 126976 bytes from PEB 242:4096, read only 126976
>> Looks like a mismatch in the ECC config. Can you check the ecc
>> strength/step_size in both situation (old driver vs new driver)?
>
> For that, you might want to add traces in marvell_nand_ecc_init() and
> marvell_nand_hw_ecc_ctrl_init().
>
>> Could you also dump the NDCR register in both cases?
>
> NDCR register (as well as NDCBx registers) will appear if you let
>
> #define DEBUG
>
> at the beginning of the driver.
>
> Also, can you please give us the entire dmesg (I mean the boot, not the
> flow of UBIFS errors of course).
Here it comes in [3]. I suspect the BBT parser here, here is the extract that
_might_ be relevant:
[ 3.372907] nand: ->exec_op() parser: pattern not found!
[ 3.378445] marvell-nfc pxa3xx-nand:
... repeats many times ...
[ 3.666571] Bad block table not found for chip 0
[ 3.671368] Scanning device for bad blocks
[ 3.675540] nand: nand_do_read_oob: from = 0x00000000, len = 64
[ 3.681688] marvell-nfc pxa3xx-nand:
[ 3.681688] NDCR: 0x9d079fff
[ 3.681688] NDCB0: 0x000d3000
[ 3.681688] NDCB1: 0x00000000
[ 3.681688] NDCB2: 0x00000000
[ 3.681688] NDCB3: 0x00000000
[ 3.700570] Bad eraseblock 0 at 0x000000000000
My configuration is :
- make zylonite_defconfig
- apply patch in [1] for arch/arm/mach-pxa
- apply patch in [2] for drivers/mtd
- run the test (make zylonite_defconfig; make; do_the_test_with_jenkins)
That should give you all my setup information, ie. platform_data, ECC and BBT
settings (ie. the "MBBbt0" pattern).
Cheers.
--
Robert
[1] Patch for zylonite
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 0534949d63f6..d247ef01dc62 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -378,6 +378,8 @@ static struct mtd_partition zylonite_nand_partitions[] = {
static struct pxa3xx_nand_platform_data zylonite_nand_info = {
.parts = zylonite_nand_partitions,
.nr_parts = ARRAY_SIZE(zylonite_nand_partitions),
+ .flash_bbt = 1,
+ .keep_config = 1,
};
static void __init zylonite_init_nand(void)
[2] Patch for mtd
diff --git a/drivers/mtd/nand/marvell_nand.c b/drivers/mtd/nand/marvell_nand.c
index c618ccb22a61..957219e7c23d 100644
--- a/drivers/mtd/nand/marvell_nand.c
+++ b/drivers/mtd/nand/marvell_nand.c
@@ -7,6 +7,8 @@
* SPDX-License-Identifier: GPL-2.0
*/
+#define DEBUG 1
+
#include <linux/module.h>
#include <linux/clk.h>
#include <linux/mtd/rawnand.h>
@@ -2480,6 +2482,7 @@ static int marvell_nand_chip_init(struct device *dev, struct marvell_nfc *nfc,
* in the DT node, this entry will be overwritten in nand_scan_ident().
*/
chip->ecc.mode = NAND_ECC_HW;
+ chip->options |= NAND_BUSWIDTH_AUTO;
ret = nand_scan_ident(mtd, marvell_nand->nsels, NULL);
if (ret) {
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 469220065b8b..0beed1cd58b3 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -27,6 +27,8 @@
*
*/
+#define DEBUG 1
+
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
[3] Dmesg of my failing zylonite
Loading ARM Linux zImage '/mnt/tftp/zImage_jenkins'
commandline: ram=64M console=ttyS0,115200 ip=dhcp root=/dev/nfs nfsroot=/home/none/nfsroot/zylonite,v3,tcp earlycon mtdparts=pxa3xx_nand-0:128k at 0(TIMH)ro,128k at 128k(OBMI)ro,768k at 256k(barebox),256k at 1024k(barebox-env),12M at 1280k(kernel),38016k at 13568k(root)
arch_number: 1233
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.15.0-rc1-00041-g8ba5ca3 (jenkins at belgarath) (gcc version 4.8.3 20140320 (prerelease) (Sourcery CodeBench Lite 2014.05-29)) #747 PREEMPT Sat Dec 23 11:55:09 CET 2017
[ 0.000000] CPU: XScale-V3 based processor [69056891] revision 1 (ARMv5TE), cr=0000397f
[ 0.000000] CPU: VIVT data cache, VIVT instruction cache
[ 0.000000] Machine: PXA3xx Platform Development Kit (aka Zylonite)
[ 0.000000] Ignoring tag cmdline (using the default kernel command line)
[ 0.000000] Memory policy: Data cache writeback
[ 0.000000] RO Mode clock: 0.00MHz
[ 0.000000] Run Mode clock: 0.00MHz
[ 0.000000] Turbo Mode clock: 0.00MHz
[ 0.000000] System bus clock: 0.00MHz
[ 0.000000] On node 0 totalpages: 16384
[ 0.000000] Normal zone: 128 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved
[ 0.000000] Normal zone: 16384 pages, LIFO batch:3
[ 0.000000] random: fast init done
[ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[ 0.000000] pcpu-alloc: [0] 0
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 16256
[ 0.000000] Kernel command line: root=/dev/ram0 ip=192.168.1.232:192.168.1.5::255.255.255.0::eth0:on console=ttyS0,115200 mem=64M mtdparts=pxa3xx_nand-0:128k at 0(TIMH)ro,128k at 128k(OBMI)ro,768k at 256k(barebox),256k at 1024k(barebox-env),12M at 1280k(kernel),38016k at 13568k(root) ubi.mtd=5 earlycon=pxa,io,0xf6200000,115200n8 debug no_console_suspend
[ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Memory: 56856K/65536K available (4226K kernel code, 202K rwdata, 972K rodata, 2396K init, 102K bss, 8680K reserved, 0K cma-reserved)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
[ 0.000000] vmalloc : 0xc4800000 - 0xff800000 ( 944 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xc4000000 ( 64 MB)
[ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB)
[ 0.000000] .text : 0xc0008000 - 0xc0428a08 (4227 kB)
[ 0.000000] .init : 0xc053f000 - 0xc0796000 (2396 kB)
[ 0.000000] .data : 0xc0796000 - 0xc07c8bec ( 203 kB)
[ 0.000000] .bss : 0xc07c8bec - 0xc07e25fc ( 103 kB)
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] Tasks RCU enabled.
[ 0.000000] NR_IRQS: 16, nr_irqs: 336, preallocated irqs: 336
[ 0.000000] RJK: parent_rate=13000000, xl=8, xn=1
[ 0.000069] sched_clock: 32 bits at 3250kHz, resolution 307ns, wraps every 660764198758ns
[ 0.000266] clocksource: oscr0: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 588080137591 ns
[ 0.002138] Console: colour dummy device 80x30
[ 0.002299] Calibrating delay loop... 103.83 BogoMIPS (lpj=519168)
[ 0.081018] pid_max: default: 32768 minimum: 301
[ 0.081861] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.081960] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.085170] CPU: Testing write buffer coherency: ok
[ 0.088970] Setting up static identity map for 0x80008200 - 0x80008260
[ 0.089927] Hierarchical SRCU implementation.
[ 0.103027] devtmpfs: initialized
[ 0.113870] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.114009] futex hash table entries: 256 (order: -1, 3072 bytes)
[ 0.116340] NET: Registered protocol family 16
[ 0.119151] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 0.388383] Advanced Linux Sound Architecture Driver Initialized.
[ 0.399046] clocksource: Switched to clocksource oscr0
[ 0.551948] NET: Registered protocol family 2
[ 0.557703] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.557940] TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.558123] TCP: Hash tables configured (established 1024 bind 1024)
[ 0.558662] UDP hash table entries: 256 (order: 0, 4096 bytes)
[ 0.558853] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[ 0.560546] NET: Registered protocol family 1
[ 0.562593] RPC: Registered named UNIX socket transport module.
[ 0.562693] RPC: Registered udp transport module.
[ 0.562747] RPC: Registered tcp transport module.
[ 0.562806] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 2.499969] Initialise system trusted keyrings
[ 2.501747] workingset: timestamp_bits=30 max_order=14 bucket_order=0
[ 2.505617] NFS: Registering the id_resolver key type
[ 2.505846] Key type id_resolver registered
[ 2.505907] Key type id_legacy registered
[ 2.512358] Key type asymmetric registered
[ 2.512460] Asymmetric key parser 'x509' registered
[ 2.512619] io scheduler noop registered
[ 2.512685] io scheduler deadline registered
[ 2.513081] io scheduler cfq registered (default)
[ 2.513152] io scheduler mq-deadline registered
[ 2.513215] io scheduler kyber registered
[ 2.573653] pxa-dma pxa-dma.0: initialized 32 channels on 100 requestors
[ 2.577078] pxa2xx-uart.0: ttyS0 at MMIO 0x40100000 (irq = 38, base_baud = 928571) is a UART1
[ 3.052691] console [ttyS0] enabled
[ 3.059293] pxa2xx-uart.1: ttyS1 at MMIO 0x40200000 (irq = 37, base_baud = 928571) is a UART2
[ 3.071727] pxa2xx-uart.2: ttyS2 at MMIO 0x40700000 (irq = 36, base_baud = 928571) is a UART3
[ 3.087282] nand: executing subop:
[ 3.093208] nand: ->CMD [0xff]
[ 3.097110] nand: ->WAITRDY [max 250 ms]
[ 3.102330] marvell-nfc pxa3xx-nand:
[ 3.102330] NDCR: 0x90079fff
[ 3.102330] NDCB0: 0x00a000ff
[ 3.102330] NDCB1: 0x00000000
[ 3.102330] NDCB2: 0x00000000
[ 3.102330] NDCB3: 0x00000000
[ 3.121601] nand: executing subop:
[ 3.125071] nand: ->CMD [0x90]
[ 3.128946] nand: ->ADDR [1 cyc: 00]
[ 3.133608] nand: ->DATA_IN [2 B, force 8-bit]
[ 3.138617] marvell-nfc pxa3xx-nand:
[ 3.138617] NDCR: 0x90079fff
[ 3.138617] NDCB0: 0x00610090
[ 3.138617] NDCB1: 0x00000000
[ 3.138617] NDCB2: 0x00000000
[ 3.138617] NDCB3: 0x00000000
[ 3.157454] nand: executing subop:
[ 3.161098] nand: ->CMD [0x90]
[ 3.164983] nand: ->ADDR [1 cyc: 00]
[ 3.169424] nand: ->DATA_IN [8 B, force 8-bit]
[ 3.174412] marvell-nfc pxa3xx-nand:
[ 3.174412] NDCR: 0x90079fff
[ 3.174412] NDCB0: 0x00610090
[ 3.174412] NDCB1: 0x00000000
[ 3.174412] NDCB2: 0x00000000
[ 3.174412] NDCB3: 0x00000000
[ 3.193079] nand: executing subop:
[ 3.196531] nand: ->CMD [0x90]
[ 3.200553] nand: ->ADDR [1 cyc: 20]
[ 3.204867] nand: ->DATA_IN [4 B, force 8-bit]
[ 3.209975] marvell-nfc pxa3xx-nand:
[ 3.209975] NDCR: 0x90079fff
[ 3.209975] NDCB0: 0x00610090
[ 3.209975] NDCB1: 0x00000020
[ 3.209975] NDCB2: 0x00000000
[ 3.209975] NDCB3: 0x00000000
[ 3.228598] nand: executing subop:
[ 3.232187] nand: ->CMD [0x90]
[ 3.236077] nand: ->ADDR [1 cyc: 40]
[ 3.240517] nand: ->DATA_IN [5 B, force 8-bit]
[ 3.245499] marvell-nfc pxa3xx-nand:
[ 3.245499] NDCR: 0x90079fff
[ 3.245499] NDCB0: 0x00610090
[ 3.245499] NDCB1: 0x00000040
[ 3.245499] NDCB2: 0x00000000
[ 3.245499] NDCB3: 0x00000000
[ 3.264138] nand: device found, Manufacturer ID: 0x20, Chip ID: 0xba
[ 3.270650] nand: ST Micro NAND 256MiB 1,8V 16-bit
[ 3.275491] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
[ 3.283219] marvell-nfc pxa3xx-nand: No minimum ECC strength, using 1b/512B
[ 3.290880] marvell-nfc pxa3xx-nand:
[ 3.290880] NDCR: 0xdd079fff
[ 3.290880] NDCB0: 0x000d3000
[ 3.290880] NDCB1: 0xffc00000
[ 3.290880] NDCB2: 0x00000001
[ 3.290880] NDCB3: 0x00000000
[ 3.310230] marvell-nfc pxa3xx-nand:
[ 3.310230] NDCR: 0xdd079fff
[ 3.310230] NDCB0: 0x000d3000
[ 3.310230] NDCB1: 0xff800000
[ 3.310230] NDCB2: 0x00000001
[ 3.310230] NDCB3: 0x00000000
[ 3.329329] marvell-nfc pxa3xx-nand:
[ 3.329329] NDCR: 0xdd079fff
[ 3.329329] NDCB0: 0x000d3000
[ 3.329329] NDCB1: 0xff400000
[ 3.329329] NDCB2: 0x00000001
[ 3.329329] NDCB3: 0x00000000
[ 3.348256] nand: ->exec_op() parser: pattern not found!
[ 3.353989] marvell-nfc pxa3xx-nand:
[ 3.353989] NDCR: 0xdd079fff
[ 3.353989] NDCB0: 0x000d3000
[ 3.353989] NDCB1: 0xff000000
[ 3.353989] NDCB2: 0x00000001
[ 3.353989] NDCB3: 0x00000000
[ 3.372907] nand: ->exec_op() parser: pattern not found!
[ 3.378445] marvell-nfc pxa3xx-nand:
... repeats many times ...
[ 3.666571] Bad block table not found for chip 0
[ 3.671368] Scanning device for bad blocks
[ 3.675540] nand: nand_do_read_oob: from = 0x00000000, len = 64
[ 3.681688] marvell-nfc pxa3xx-nand:
[ 3.681688] NDCR: 0x9d079fff
[ 3.681688] NDCB0: 0x000d3000
[ 3.681688] NDCB1: 0x00000000
[ 3.681688] NDCB2: 0x00000000
[ 3.681688] NDCB3: 0x00000000
[ 3.700570] Bad eraseblock 0 at 0x000000000000
[ 3.705096] nand: nand_do_read_oob: from = 0x00020000, len = 64
[ 3.711275] marvell-nfc pxa3xx-nand:
[ 3.711275] NDCR: 0x9d079fff
[ 3.711275] NDCB0: 0x000d3000
[ 3.711275] NDCB1: 0x00400000
[ 3.711275] NDCB2: 0x00000000
[ 3.711275] NDCB3: 0x00000000
[ 3.730190] nand: nand_do_read_oob: from = 0x00040000, len = 64
[ 3.736221] marvell-nfc pxa3xx-nand:
[ 3.736221] NDCR: 0x9d079fff
[ 3.736221] NDCB0: 0x000d3000
[ 3.736221] NDCB1: 0x00800000
[ 3.736221] NDCB2: 0x00000000
[ 3.736221] NDCB3: 0x00000000
[ 3.755106] Bad eraseblock 2 at 0x000000040000
[ 3.759786] nand: nand_do_read_oob: from = 0x00060000, len = 64
[ 3.765804] marvell-nfc pxa3xx-nand:
[ 3.765804] NDCR: 0x9d079fff
[ 3.765804] NDCB0: 0x000d3000
[ 3.765804] NDCB1: 0x00c00000
[ 3.765804] NDCB2: 0x00000000
[ 3.765804] NDCB3: 0x00000000
[ 3.784670] Bad eraseblock 3 at 0x000000060000
[ 3.789346] nand: nand_do_read_oob: from = 0x00080000, len = 64
[ 3.795363] marvell-nfc pxa3xx-nand:
[ 3.795363] NDCR: 0x9d079fff
[ 3.795363] NDCB0: 0x000d3000
[ 3.795363] NDCB1: 0x01000000
[ 3.795363] NDCB2: 0x00000000
[ 3.795363] NDCB3: 0x00000000
[ 3.814234] Bad eraseblock 4 at 0x000000080000
... repeats many times ...
^ permalink raw reply related
* [PATCH] staging: vc04_services: Fix platform_no_drv_owner.cocci warnings.
From: kishore.p at techveda.org @ 2017-12-23 14:46 UTC (permalink / raw)
To: linux-arm-kernel
From: Kishore KP <kishore.p@techveda.org>
Removed .owner field initialization, platform core does it automatically.
Pointed out by Coccinelle.
Signed-off-by: Kishore KP <kishore.p@techveda.org>
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
---
Note:
- Patch was compile tested and built(ARCH=arm) on linux-next
(latest).
- No build issues reported.
---
drivers/staging/vc04_services/bcm2835-audio/bcm2835.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c
index 8f2d508..50a5f29 100644
--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c
+++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c
@@ -443,7 +443,6 @@ static int snd_bcm2835_alsa_resume(struct platform_device *pdev)
#endif
.driver = {
.name = "bcm2835_audio",
- .owner = THIS_MODULE,
.of_match_table = snd_bcm2835_of_match_table,
},
};
--
1.9.1
^ permalink raw reply related
* [PATCH 00/12] Marvell NAND controller rework with ->exec_op()
From: Miquel RAYNAL @ 2017-12-23 14:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87k1xdblxf.fsf@belgarion.home>
Hi Robert,
On Sat, 23 Dec 2017 14:42:20 +0100
Robert Jarzmik <robert.jarzmik@free.fr> wrote:
> Miquel RAYNAL <miquel.raynal@free-electrons.com> writes:
>
> I removed a lot of people from the recipients, as this is a debug
> session.
Sure!
>
> >> > Now I get a lot of these message which I didn't have before :
> >> > [ 26.897372] ubi0 warning: ubi_io_read: error -74 (ECC error)
> >> > while reading 126976 bytes from PEB 242:4096, read only 126976
> >> Looks like a mismatch in the ECC config. Can you check the ecc
> >> strength/step_size in both situation (old driver vs new driver)?
> >
> > For that, you might want to add traces in marvell_nand_ecc_init()
> > and marvell_nand_hw_ecc_ctrl_init().
> >
> >> Could you also dump the NDCR register in both cases?
> >
> > NDCR register (as well as NDCBx registers) will appear if you let
> >
> > #define DEBUG
> >
> > at the beginning of the driver.
> >
> > Also, can you please give us the entire dmesg (I mean the boot, not
> > the flow of UBIFS errors of course).
> Here it comes in [3]. I suspect the BBT parser here, here is the
> extract that _might_ be relevant:
> [ 3.372907] nand: ->exec_op() parser: pattern not found!
Indeed this might be the problem, it means there is one scenario that
should be handled by the parser that is missing. I am really
interrogative about which one it is and to discover it, can you rebuild
with
#define DEBUG
in drivers/mtd/nand/nand_base.c too.
This way the core will display the patterns it try to find a match for.
Also to ease the understanding, you might add a dump_stack() right
next to this error message.
> [ 3.378445] marvell-nfc pxa3xx-nand:
> ... repeats many times ...
> [ 3.666571] Bad block table not found for chip 0
> [ 3.671368] Scanning device for bad blocks
> [ 3.675540] nand: nand_do_read_oob: from = 0x00000000, len = 64
> [ 3.681688] marvell-nfc pxa3xx-nand:
> [ 3.681688] NDCR: 0x9d079fff
> [ 3.681688] NDCB0: 0x000d3000
> [ 3.681688] NDCB1: 0x00000000
> [ 3.681688] NDCB2: 0x00000000
> [ 3.681688] NDCB3: 0x00000000
> [ 3.700570] Bad eraseblock 0 at 0x000000000000
>
> My configuration is :
> - make zylonite_defconfig
> - apply patch in [1] for arch/arm/mach-pxa
> - apply patch in [2] for drivers/mtd
> - run the test (make zylonite_defconfig; make;
> do_the_test_with_jenkins) That should give you all my setup
> information, ie. platform_data, ECC and BBT settings (ie. the
> "MBBbt0" pattern).
This is probably a typo, because we expect the pattern to be "MVBbt0"?
>
> Cheers.
>
Thanks for the help,
Miqu?l
--
Miquel Raynal, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* [PATCH] staging: vc04_services: Prefer BUG_ON instead of if condition followed by BUG.
From: kishore.p at techveda.org @ 2017-12-23 15:06 UTC (permalink / raw)
To: linux-arm-kernel
From: Kishore KP <kishore.p@techveda.org>
Use BUG_ON instead of if condition followed by BUG.
Pointed out by Coccinelle.
Signed-off-by: Kishore KP <kishore.p@techveda.org>
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
---
Note:
- Patch was compile tested and built(ARCH=arm) on linux-next
(latest).
- No build issues reported.
---
drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
index 315b49c..7116f61 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
@@ -224,8 +224,7 @@ int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state)
platform_state = (struct vchiq_2835_state *)state->platform_state;
- if (!platform_state->inited)
- BUG();
+ BUG_ON(!platform_state->inited);
return &platform_state->arm_state;
}
--
1.9.1
^ permalink raw reply related
* [PATCH] arm: dts: mt7623: enable all four available UARTs on bananapi-r2
From: Sean Wang @ 2017-12-23 15:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <dc3c28c7-03c3-f1c6-39c1-b8df8be4fac3@gmail.com>
On Sat, 2017-12-23 at 08:52 +0100, Matthias Brugger wrote:
>
> On 12/22/2017 07:06 AM, sean.wang at mediatek.com wrote:
> > From: Sean Wang <sean.wang@mediatek.com>
> >
> > On bpi-r2 board, totally there're four uarts which we usually called
> > uart[0-3] helpful to extend slow I/O devices. Among those ones, uart2 has
> > dedicated pin slot which is used to conolse log. uart[0-1] appear at the
> > 40-pins connector and uart3 has no pinout, but just has test points (TP47
> > for TX and TP48 for RX, respectively) nearby uart2. Also, some missing
> > pinctrl is being complemented for those devices.
> >
> > Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> > ---
> > arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 26 ++++++++++++++++++++++++--
> > 1 file changed, 24 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> > index 7bf5aa2..64bf5db 100644
> > --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> > +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> > @@ -409,6 +409,20 @@
> > <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
> > };
> > };
> > +
> > + uart2_pins_a: uart at 2 {
> > + pins_dat {
> > + pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
> > + <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
> > + };
> > + };
> > +
> > + uart3_pins_a: uart at 3 {
> > + pins_dat {
> > + pinmux = <MT7623_PIN_242_URTS2_FUNC_URTS2>,
> > + <MT7623_PIN_243_UCTS2_FUNC_UTXD3>;
> > + };
> > + };
> > };
> >
> > &pwm {
> > @@ -454,16 +468,24 @@
> > &uart0 {
> > pinctrl-names = "default";
> > pinctrl-0 = <&uart0_pins_a>;
> > - status = "disabled";
> > + status = "okay";
> > };
> >
> > &uart1 {
> > pinctrl-names = "default";
> > pinctrl-0 = <&uart1_pins_a>;
> > - status = "disabled";
> > + status = "okay";
> > };
> >
> > &uart2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart2_pins_a>;
> > + status = "okay";
> > +};
> > +
> > +&uart3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart3_pins_a>;
> > status = "okay";
> > };
> >
>
> Why do we want to enable uart3 when there are only test points?
> It is not very useful, or do I oversee something?
>
I have been listening to the sound from potential users of bpi-r2 to
understand what assistance I have to provide to them. Something could
be seen through [1] in the forum to know they had been trying hard to
explore all available UARTs from the SoC in the last weeks. The patch
should be really useful for these people and for the extra soldering
it shouldn't become a problem for these makers.
[1] http://forum.banana-pi.org/t/gpio-uart-not-the-debug-port/3748
Sean
> Regards,
> Matthias
>
^ permalink raw reply
* [GIT PULL] TI DaVinci SoC support updates for v4.16
From: Sekhar Nori @ 2017-12-23 15:51 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci.git tags/davinci-for-v4.16/soc
for you to fetch changes up to ed3c0c2b4fdcbe05194ee3f5e634ece3018d3b76:
ARM: dts: da850-lcdk: Remove leading 0x and 0s from unit address (2017-12-23 15:46:25 +0530)
----------------------------------------------------------------
DaVinci SoC updates consisting of non-critical bug fixes including constifying
data structures, DT warning fixes for W=1 and code simplification.
Also a defconfig update for DaVinci, enabling support for USB network adaptors.
----------------------------------------------------------------
Aparna Balasubramanian (1):
ARM: davinci_all_defconfig: enable support for USB network adaptors
Bhumika Goyal (2):
ARM: davinci: make argument to davinci_common_init() as const
ARM: davinci: make davinci_soc_info structures const
Mathieu Malaterre (1):
ARM: dts: da850-lcdk: Remove leading 0x and 0s from unit address
Vasyl Gomonovych (1):
ARM: davinci: Use PTR_ERR_OR_ZERO()
arch/arm/boot/dts/da850-lcdk.dts | 4 ++--
arch/arm/configs/davinci_all_defconfig | 1 +
arch/arm/mach-davinci/common.c | 2 +-
arch/arm/mach-davinci/da830.c | 2 +-
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/devices-da8xx.c | 4 ++--
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 4 ++--
arch/arm/mach-davinci/include/mach/common.h | 2 +-
11 files changed, 14 insertions(+), 13 deletions(-)
^ permalink raw reply
* [PATCH] staging: vc04_services: Prefer BUG_ON instead of if condition followed by BUG.
From: Stefan Wahren @ 2017-12-23 16:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514041560-28001-1-git-send-email-kishore.p@techveda.org>
Hi Kishore,
> kishore.p at techveda.org hat am 23. Dezember 2017 um 16:06 geschrieben:
>
>
> From: Kishore KP <kishore.p@techveda.org>
>
> Use BUG_ON instead of if condition followed by BUG.
> Pointed out by Coccinelle.
>
> Signed-off-by: Kishore KP <kishore.p@techveda.org>
> Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
> ---
> Note:
> - Patch was compile tested and built(ARCH=arm) on linux-next
> (latest).
> - No build issues reported.
> ---
> drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
> index 315b49c..7116f61 100644
> --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
> +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
> @@ -224,8 +224,7 @@ int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state)
>
> platform_state = (struct vchiq_2835_state *)state->platform_state;
>
> - if (!platform_state->inited)
> - BUG();
> + BUG_ON(!platform_state->inited);
>
vchiq isn't critical so i prefer WARN_ON_ONCE() here.
Thanks
Stefan
^ permalink raw reply
* [GIT PULL 3/4] dts changes for omaps for v4.16, part 2
From: Tony Lindgren @ 2017-12-23 16:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171222185554.GB3875@atomide.com>
* Tony Lindgren <tony@atomide.com> [171222 18:58]:
> * Tony Lindgren <tony@atomide.com> [171222 18:17]:
> > From: "Tony Lindgren" <tony@atomide.com>
> > Kishon Vijay Abraham I (5):
> > ARM: dts: dra7: Add properties to enable PCIe x2 lane mode
>
> Turns out the binding is still open for this change. So I will
> most likely revert this commit and reply with an updated pull
> request for this one.
Below is an updated pull request for this with just the above
patch reverted.
8< ------------------
The following changes since commit a38867305203ef5a27f0c9ff1e943a0c2fabdbce:
ARM: dts: Move move WiFi bindings to logicpd-torpedo-37xx-devkit (2017-12-11 09:43:53 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v4.16/dt-pt2-v2-signed
for you to fetch changes up to 1cadb0c341079785182a8d00d12ecb0bbef935fb:
Revert "ARM: dts: dra7: Add properties to enable PCIe x2 lane mode" (2017-12-23 08:18:15 -0800)
----------------------------------------------------------------
Second set of device tree changes for omaps for v4.16 merge window
This branch mostly configures more hardware support:
- Clean-up dts files to remove leading 0x and 0s from binding notation
to remove more dtc compiler warnings
- A series of am437x updates for backlight, to fix inverted pad
pull macro, and to configure power management related OPPs
- Configure n950 and droid 4 command mode LCD panels
- Updates to pandora and gta04 LCD panels
- Add support for am574x-idk
- A series of changes to configure more dra7 related PCIe features
- A series of fixes for am335x-boneblue for WLAN, UARTs and CAN
configuration
- A series of changes to configure dra7 OPPs and VDD supplies
----------------------------------------------------------------
Dave Gerlach (11):
ARM: dts: am43xx: Fix inverted DS0_PULL_UP_DOWN_EN macro
ARM: dts: am437x-idk-evm: Disable OPP50 for MPU
ARM: dts: am43x-epos-evm: Hook dcdc2 as the cpu0-supply
ARM: dts: dra7: Add vbb-supply to cpu and additional voltages
ARM: dts: dra7: Add MPU OPP supply node
ARM: dts: dra7: Enable 1.5 GHz operation for the CPU
ARM: dts: am57xx-beagle-x15-common: Add cpu0 vdd supply
ARM: dts: dra7-evm: Add cpu0 vdd supply
ARM: dts: dra72-evm-tps65917: Add cpu0 vdd supply
ARM: dts: am571x-idk: Add cpu0 vdd supply
ARM: dts: am572x-idk: Add cpu0 vdd supply
H. Nikolaus Schaller (2):
ARM: dts: gta04: improve panel compatibility string
ARM: dts: pandora: fix panel compatibility string
Kishon Vijay Abraham I (5):
ARM: dts: dra7: Add properties to enable PCIe x2 lane mode
ARM: dts: DRA74x: Use PCIe compatible specific to dra74
ARM: dts: DRA72x: Use PCIe compatible specific to dra72
ARM: dts: dra76-evm: Enable x2 PCIe lanes
ARM: dts: dra7: Remove deprecated PCI compatible string
Lokesh Vutla (1):
ARM: dts: am57xx: Add support for am574x-idk
Mathieu Malaterre (1):
ARM: dts: am3/am4/dra7/omap: Remove leading 0x and 0s from bindings notation
Peter Ujfalusi (3):
ARM: dts: am437x-gp-evm: Add phandle for the backlight for the panel
ARM: dts: am437x-sk-evm: Add phandle for the backlight for the panel
ARM: dts: am43xx-epos-evm: Add phandle for the backlight for the panel
Robert Nelson (3):
ARM: dts: am335x-boneblue: fix wl1835 IRQ pin
ARM: dts: am335x-boneblue: enable usarts
ARM: dts: am335x-boneblue: enable can
Sebastian Reichel (2):
ARM: dts: omap4-droid4: improve LCD description
ARM: dts: n950: add display support
Tony Lindgren (1):
Revert "ARM: dts: dra7: Add properties to enable PCIe x2 lane mode"
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/am335x-boneblue.dts | 79 ++++++++++++++++++-
arch/arm/boot/dts/am33xx.dtsi | 4 +-
arch/arm/boot/dts/am3517.dtsi | 4 +-
arch/arm/boot/dts/am4372.dtsi | 4 +-
arch/arm/boot/dts/am437x-gp-evm.dts | 4 +-
arch/arm/boot/dts/am437x-idk-evm.dts | 14 ++++
arch/arm/boot/dts/am437x-sk-evm.dts | 4 +-
arch/arm/boot/dts/am43x-epos-evm.dts | 8 +-
arch/arm/boot/dts/am571x-idk.dts | 4 +
arch/arm/boot/dts/am572x-idk-common.dtsi | 100 ++++++++++++++++++++++++
arch/arm/boot/dts/am572x-idk.dts | 93 +---------------------
arch/arm/boot/dts/am574x-idk.dts | 22 ++++++
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 2 +-
arch/arm/boot/dts/dra62x-j5eco-evm.dts | 8 +-
arch/arm/boot/dts/dra7-evm.dts | 2 +-
arch/arm/boot/dts/dra7.dtsi | 36 +++++++--
arch/arm/boot/dts/dra72-evm-tps65917.dtsi | 4 +
arch/arm/boot/dts/dra72x.dtsi | 12 +++
arch/arm/boot/dts/dra74x.dtsi | 12 +++
arch/arm/boot/dts/dra76-evm.dts | 16 ++++
arch/arm/boot/dts/omap3-cm-t3x.dtsi | 8 +-
arch/arm/boot/dts/omap3-evm-37xx.dts | 8 +-
arch/arm/boot/dts/omap3-gta04.dtsi | 2 +-
arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 8 +-
arch/arm/boot/dts/omap3-n950.dts | 88 +++++++++++++++++++++
arch/arm/boot/dts/omap3-pandora-common.dtsi | 2 +-
arch/arm/boot/dts/omap4-droid4-xt894.dts | 6 +-
include/dt-bindings/pinctrl/am43xx.h | 3 +-
29 files changed, 428 insertions(+), 130 deletions(-)
create mode 100644 arch/arm/boot/dts/am572x-idk-common.dtsi
create mode 100644 arch/arm/boot/dts/am574x-idk.dts
^ permalink raw reply
* [RFC PATCH v2 1/3] PCI: rockchip: Add support for pcie wake irq
From: Tony Lindgren @ 2017-12-23 16:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171222232043.GA158981@google.com>
* Brian Norris <briannorris@chromium.org> [171222 23:23]:
> + Rafael to this thread
>
> On Wed, Dec 20, 2017 at 11:19:12AM -0800, Tony Lindgren wrote:
> > * Brian Norris <briannorris@chromium.org> [171219 00:50]:
> > > On Wed, Aug 23, 2017 at 09:32:39AM +0800, Jeffy Chen wrote:
> > >
> > > Did this problem ever get resolved? To be clear, I believe the problem
> > > at hand is:
> > >
> > > (a) in suspend/resume (not runtime PM; we may not even have runtime PM
> > > support for most PCI devices)
> >
> > It seems it should be enough to implement runtime PM in the PCI
> > controller. Isn't each PCI WAKE# line is wired from each PCI device
> > to the PCI controller?
>
> No, not really. As discussed in later versions of this thread already,
> the WAKE# hierarchy is orthogonal to the PCI hierarchy, and I think we
> settled that it's reasonable to just consider this as a 1-per-device
> thing, with each device "directly" attached to the PM controller. While
> sharing could happen, that's something we decided to punt on...didn't
> we?
Sounds like we need a confirmation from some hardware people on
this if the PCI device WAKE# can be wired to PCI controller or
to a separate PM controller directly :)
> > Then the PCI controller can figure out from which PCI device the
> > WAKE# came from.
>
> I'm not completely sure of the details, but I believe this *can* be
> determined by PME. But I'm not sure it's guaranteed to be supported,
> especially in cases where we already have 1:1 WAKE#. So we should be
> *trying* to report this wakeirq info from the device, if possible.
If a PCI device has it's WAKE# wired directly to a PM controller
instead of the PCI controller, then it seems that the PCI controller
should be woken up and then presumably the regular PCI device
interrupts will take care of the rest.
Or else I'd say if the driver for the PCI device in some custom
case needs to do something specific, then having that driver
implement PM runtime makes sense. Naturally we want to avoid a
dependency where all the possible drivers would need to implement
PM runtime, I doubt that's needed though.
Regards,
Tony
^ permalink raw reply
* [PATCH 00/12] Marvell NAND controller rework with ->exec_op()
From: Robert Jarzmik @ 2017-12-23 17:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171223155709.2ba16e95@xps13>
Miquel RAYNAL <miquel.raynal@free-electrons.com> writes:
>> Here it comes in [3]. I suspect the BBT parser here, here is the
>> extract that _might_ be relevant:
>> [ 3.372907] nand: ->exec_op() parser: pattern not found!
>
> Indeed this might be the problem, it means there is one scenario that
> should be handled by the parser that is missing. I am really
> interrogative about which one it is and to discover it, can you rebuild
> with
>
> #define DEBUG
>
> in drivers/mtd/nand/nand_base.c too.
It was already there, check the patch I attached to my previous mail.
> This way the core will display the patterns it try to find a match for.
The core displays already debug message, as these are displayed :
[ 3.228598] nand: executing subop:
[ 3.232187] nand: ->CMD [0x90]
[ 3.236077] nand: ->ADDR [1 cyc: 40]
[ 3.240517] nand: ->DATA_IN [5 B, force 8-bit]
As to your statement "the core will display the patterns it try to find a match
for", how confident are you with it ? Because my reading of the following code
is quite different :
if (!nand_op_parser_match_pat(pattern, &ctx))
continue;
nand_op_parser_trace(&ctx);
> Also to ease the understanding, you might add a dump_stack() right
> next to this error message.
Attached in [1].
>> information, ie. platform_data, ECC and BBT settings (ie. the
>> "MBBbt0" pattern).
>
> This is probably a typo, because we expect the pattern to be "MVBbt0"?
Right, it's a typo.
Cheers.
--
Robert
[1] DMesg extract
[ 3.053528] console [ttyS0] enabled
[ 3.059893] pxa2xx-uart.1: ttyS1 at MMIO 0x40200000 (irq = 37, base_baud = 928571) is a UART2
[ 3.072771] pxa2xx-uart.2: ttyS2 at MMIO 0x40700000 (irq = 36, base_baud = 928571) is a UART3
[ 3.088327] nand: executing subop:
[ 3.094488] nand: ->CMD [0xff]
[ 3.098387] nand: ->WAITRDY [max 250 ms]
[ 3.103543] marvell-nfc pxa3xx-nand:
[ 3.103543] NDCR: 0x90079fff
[ 3.103543] NDCB0: 0x00a000ff
[ 3.103543] NDCB1: 0x00000000
[ 3.103543] NDCB2: 0x00000000
[ 3.103543] NDCB3: 0x00000000
[ 3.122800] nand: executing subop:
[ 3.126272] nand: ->CMD [0x90]
[ 3.130146] nand: ->ADDR [1 cyc: 00]
[ 3.134811] nand: ->DATA_IN [2 B, force 8-bit]
[ 3.139818] marvell-nfc pxa3xx-nand:
[ 3.139818] NDCR: 0x90079fff
[ 3.139818] NDCB0: 0x00610090
[ 3.139818] NDCB1: 0x00000000
[ 3.139818] NDCB2: 0x00000000
[ 3.139818] NDCB3: 0x00000000
[ 3.158657] nand: executing subop:
[ 3.162302] nand: ->CMD [0x90]
[ 3.166192] nand: ->ADDR [1 cyc: 00]
[ 3.170494] nand: ->DATA_IN [8 B, force 8-bit]
[ 3.175607] marvell-nfc pxa3xx-nand:
[ 3.175607] NDCR: 0x90079fff
[ 3.175607] NDCB0: 0x00610090
[ 3.175607] NDCB1: 0x00000000
[ 3.175607] NDCB2: 0x00000000
[ 3.175607] NDCB3: 0x00000000
[ 3.194281] nand: executing subop:
[ 3.197734] nand: ->CMD [0x90]
[ 3.201757] nand: ->ADDR [1 cyc: 20]
[ 3.206078] nand: ->DATA_IN [4 B, force 8-bit]
[ 3.211186] marvell-nfc pxa3xx-nand:
[ 3.211186] NDCR: 0x90079fff
[ 3.211186] NDCB0: 0x00610090
[ 3.211186] NDCB1: 0x00000020
[ 3.211186] NDCB2: 0x00000000
[ 3.211186] NDCB3: 0x00000000
[ 3.229806] nand: executing subop:
[ 3.233396] nand: ->CMD [0x90]
[ 3.237286] nand: ->ADDR [1 cyc: 40]
[ 3.241728] nand: ->DATA_IN [5 B, force 8-bit]
[ 3.246709] marvell-nfc pxa3xx-nand:
[ 3.246709] NDCR: 0x90079fff
[ 3.246709] NDCB0: 0x00610090
[ 3.246709] NDCB1: 0x00000040
[ 3.246709] NDCB2: 0x00000000
[ 3.246709] NDCB3: 0x00000000
[ 3.265346] nand: device found, Manufacturer ID: 0x20, Chip ID: 0xba
[ 3.271858] nand: ST Micro NAND 256MiB 1,8V 16-bit
[ 3.276700] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
[ 3.284428] marvell-nfc pxa3xx-nand: No minimum ECC strength, using 1b/512B
[ 3.292092] marvell-nfc pxa3xx-nand:
[ 3.292092] NDCR: 0xdd079fff
[ 3.292092] NDCB0: 0x000d3000
[ 3.292092] NDCB1: 0xffc00000
[ 3.292092] NDCB2: 0x00000001
[ 3.292092] NDCB3: 0x00000000
[ 3.311481] marvell-nfc pxa3xx-nand:
[ 3.311481] NDCR: 0xdd079fff
[ 3.311481] NDCB0: 0x000d3000
[ 3.311481] NDCB1: 0xff800000
[ 3.311481] NDCB2: 0x00000001
[ 3.311481] NDCB3: 0x00000000
[ 3.330508] marvell-nfc pxa3xx-nand:
[ 3.330508] NDCR: 0xdd079fff
[ 3.330508] NDCB0: 0x000d3000
[ 3.330508] NDCB1: 0xff400000
[ 3.330508] NDCB2: 0x00000001
[ 3.330508] NDCB3: 0x00000000
[ 3.349472] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 3.357225] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 3.364323] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 3.372307] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 3.380966] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 3.391038] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 3.401864] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 3.411902] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 3.420098] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 3.427964] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 3.435583] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 3.443116] [<c02b3ba0>] (search_bbt) from [<c02b4cd8>] (nand_default_bbt+0x100/0x640)
[ 3.451259] [<c02b4cd8>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 3.459605] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 3.468213] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 3.476979] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 3.486070] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 3.494809] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 3.503210] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 3.511702] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 3.519790] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 3.528216] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 3.537136] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 3.545443] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 3.553175] nand: ->exec_op() parser: pattern not found!
[ 3.558743] marvell-nfc pxa3xx-nand:
[ 3.558743] NDCR: 0xdd079fff
[ 3.558743] NDCB0: 0x000d3000
[ 3.558743] NDCB1: 0xff000000
[ 3.558743] NDCB2: 0x00000001
[ 3.558743] NDCB3: 0x00000000
[ 3.577698] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 3.585451] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 3.592496] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 3.600325] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 3.608973] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 3.619037] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 3.629869] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 3.639908] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 3.648244] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 3.656121] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 3.663736] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 3.671269] [<c02b3ba0>] (search_bbt) from [<c02b4cd8>] (nand_default_bbt+0x100/0x640)
[ 3.679266] [<c02b4cd8>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 3.687745] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 3.696354] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 3.705120] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 3.714214] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 3.722952] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 3.731353] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 3.739701] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 3.747915] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 3.756339] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 3.765261] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 3.773559] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 3.781295] nand: ->exec_op() parser: pattern not found!
[ 3.786853] marvell-nfc pxa3xx-nand:
[ 3.786853] NDCR: 0xdd079fff
[ 3.786853] NDCB0: 0x000d3000
[ 3.786853] NDCB1: 0xfec00000
[ 3.786853] NDCB2: 0x00000001
[ 3.786853] NDCB3: 0x00000000
[ 3.805809] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 3.813560] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 3.820488] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 3.828451] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 3.837106] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 3.847177] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 3.858006] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 3.868044] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 3.876378] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 3.884257] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 3.891872] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 3.899261] [<c02b3ba0>] (search_bbt) from [<c02b4cd8>] (nand_default_bbt+0x100/0x640)
[ 3.907391] [<c02b4cd8>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 3.915881] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 3.924490] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 3.933248] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 3.942366] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 3.951113] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 3.959372] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 3.967847] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 3.976073] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 3.984501] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 3.993421] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 4.001722] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 4.009319] nand: ->exec_op() parser: pattern not found!
[ 4.015007] marvell-nfc pxa3xx-nand:
[ 4.015007] NDCR: 0xdd079fff
[ 4.015007] NDCB0: 0x000d3000
[ 4.015007] NDCB1: 0xfe800000
[ 4.015007] NDCB2: 0x00000001
[ 4.015007] NDCB3: 0x00000000
[ 4.033976] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 4.041735] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 4.048659] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 4.056618] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 4.065274] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 4.075341] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 4.086166] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 4.096559] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 4.104948] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 4.112833] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 4.120314] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 4.127832] [<c02b3ba0>] (search_bbt) from [<c02b4cd8>] (nand_default_bbt+0x100/0x640)
[ 4.135976] [<c02b4cd8>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 4.144468] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 4.153092] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 4.161857] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 4.170942] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 4.179555] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 4.187941] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 4.196432] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 4.204658] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 4.213094] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 4.222012] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 4.230171] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 4.237894] nand: ->exec_op() parser: pattern not found!
[ 4.243602] marvell-nfc pxa3xx-nand:
[ 4.243602] NDCR: 0xdd079fff
[ 4.243602] NDCB0: 0x000d3000
[ 4.243602] NDCB1: 0xfe400000
[ 4.243602] NDCB2: 0x00000001
[ 4.243602] NDCB3: 0x00000000
[ 4.262584] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 4.270175] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 4.277257] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 4.285235] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 4.293894] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 4.303961] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 4.314793] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 4.324831] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 4.333159] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 4.341037] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 4.348518] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 4.356037] [<c02b3ba0>] (search_bbt) from [<c02b4cd8>] (nand_default_bbt+0x100/0x640)
[ 4.364179] [<c02b4cd8>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 4.372667] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 4.381276] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 4.389889] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 4.398979] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 4.407718] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 4.416111] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 4.424603] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 4.432827] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 4.441256] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 4.450035] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 4.458326] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 4.466055] nand: ->exec_op() parser: pattern not found!
[ 4.471753] marvell-nfc pxa3xx-nand:
[ 4.471753] NDCR: 0xdd079fff
[ 4.471753] NDCB0: 0x000d3000
[ 4.471753] NDCB1: 0xfe000000
[ 4.471753] NDCB2: 0x00000001
[ 4.471753] NDCB3: 0x00000000
[ 4.490714] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 4.498469] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 4.505524] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 4.513498] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 4.522149] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 4.532219] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 4.543050] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 4.553089] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 4.561419] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 4.569161] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 4.576796] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 4.584338] [<c02b3ba0>] (search_bbt) from [<c02b4cd8>] (nand_default_bbt+0x100/0x640)
[ 4.592478] [<c02b4cd8>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 4.600967] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 4.609432] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 4.618179] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 4.627271] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 4.636011] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 4.644412] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 4.652903] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 4.661123] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 4.669407] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 4.678322] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 4.686627] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 4.694360] nand: ->exec_op() parser: pattern not found!
[ 4.699810] Bad block table not found for chip 0
[ 4.704717] marvell-nfc pxa3xx-nand:
[ 4.704717] NDCR: 0xdd079fff
[ 4.704717] NDCB0: 0x000d3000
[ 4.704717] NDCB1: 0xffc00000
[ 4.704717] NDCB2: 0x00000001
[ 4.704717] NDCB3: 0x00000000
[ 4.723741] marvell-nfc pxa3xx-nand:
[ 4.723741] NDCR: 0xdd079fff
[ 4.723741] NDCB0: 0x000d3000
[ 4.723741] NDCB1: 0xff800000
[ 4.723741] NDCB2: 0x00000001
[ 4.723741] NDCB3: 0x00000000
[ 4.742760] marvell-nfc pxa3xx-nand:
[ 4.742760] NDCR: 0xdd079fff
[ 4.742760] NDCB0: 0x000d3000
[ 4.742760] NDCB1: 0xff400000
[ 4.742760] NDCB2: 0x00000001
[ 4.742760] NDCB3: 0x00000000
[ 4.761711] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 4.769307] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 4.776386] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 4.784360] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 4.793018] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 4.803088] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 4.813917] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 4.823956] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 4.832290] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 4.840028] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 4.847636] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 4.855170] [<c02b3ba0>] (search_bbt) from [<c02b4cf4>] (nand_default_bbt+0x11c/0x640)
[ 4.863312] [<c02b4cf4>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 4.871801] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 4.880267] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 4.889013] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 4.898106] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 4.906842] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 4.915234] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 4.923718] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 4.931940] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 4.940235] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 4.949146] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 4.957451] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 4.965177] nand: ->exec_op() parser: pattern not found!
[ 4.970731] marvell-nfc pxa3xx-nand:
[ 4.970731] NDCR: 0xdd079fff
[ 4.970731] NDCB0: 0x000d3000
[ 4.970731] NDCB1: 0xff000000
[ 4.970731] NDCB2: 0x00000001
[ 4.970731] NDCB3: 0x00000000
[ 4.989786] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 4.997531] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 5.004586] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 5.012562] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 5.021224] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 5.031287] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 5.042111] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 5.052150] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 5.060335] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 5.068201] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 5.075821] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 5.083356] [<c02b3ba0>] (search_bbt) from [<c02b4cf4>] (nand_default_bbt+0x11c/0x640)
[ 5.091498] [<c02b4cf4>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 5.099844] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 5.108442] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 5.117207] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 5.126303] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 5.135046] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 5.143440] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 5.151931] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 5.160012] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 5.168428] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 5.177346] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 5.185647] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 5.193379] nand: ->exec_op() parser: pattern not found!
[ 5.198932] marvell-nfc pxa3xx-nand:
[ 5.198932] NDCR: 0xdd079fff
[ 5.198932] NDCB0: 0x000d3000
[ 5.198932] NDCB1: 0xfec00000
[ 5.198932] NDCB2: 0x00000001
[ 5.198932] NDCB3: 0x00000000
[ 5.217913] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 5.225670] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 5.232729] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 5.240559] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 5.249206] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 5.259272] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 5.270104] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 5.280141] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 5.288475] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 5.296355] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 5.303975] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 5.311510] [<c02b3ba0>] (search_bbt) from [<c02b4cf4>] (nand_default_bbt+0x11c/0x640)
[ 5.319509] [<c02b4cf4>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 5.327986] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 5.336594] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 5.345352] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 5.354446] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 5.363183] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 5.371584] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 5.379934] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 5.388151] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 5.396576] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 5.405499] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 5.413800] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 5.421534] nand: ->exec_op() parser: pattern not found!
[ 5.427088] marvell-nfc pxa3xx-nand:
[ 5.427088] NDCR: 0xdd079fff
[ 5.427088] NDCB0: 0x000d3000
[ 5.427088] NDCB1: 0xfe800000
[ 5.427088] NDCB2: 0x00000001
[ 5.427088] NDCB3: 0x00000000
[ 5.446044] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 5.453794] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 5.460725] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 5.468703] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 5.477344] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 5.487418] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 5.498247] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 5.508283] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 5.516607] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 5.524488] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 5.532101] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 5.539493] [<c02b3ba0>] (search_bbt) from [<c02b4cf4>] (nand_default_bbt+0x11c/0x640)
[ 5.547623] [<c02b4cf4>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 5.556111] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 5.564723] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 5.573487] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 5.582580] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 5.591320] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 5.599579] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 5.608054] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 5.616279] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 5.624709] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 5.633625] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 5.641925] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 5.649518] nand: ->exec_op() parser: pattern not found!
[ 5.655192] marvell-nfc pxa3xx-nand:
[ 5.655192] NDCR: 0xdd079fff
[ 5.655192] NDCB0: 0x000d3000
[ 5.655192] NDCB1: 0xfe400000
[ 5.655192] NDCB2: 0x00000001
[ 5.655192] NDCB3: 0x00000000
[ 5.674154] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 5.681904] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 5.688832] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 5.696798] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 5.705456] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 5.715521] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 5.726344] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 5.736376] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 5.744710] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 5.752589] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 5.760061] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 5.767580] [<c02b3ba0>] (search_bbt) from [<c02b4cf4>] (nand_default_bbt+0x11c/0x640)
[ 5.775714] [<c02b4cf4>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 5.784204] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 5.792814] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 5.801579] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 5.810534] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 5.819264] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 5.827665] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 5.836154] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 5.844403] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 5.852834] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 5.861753] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 5.869912] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 5.877632] nand: ->exec_op() parser: pattern not found!
[ 5.883334] marvell-nfc pxa3xx-nand:
[ 5.883334] NDCR: 0xdd079fff
[ 5.883334] NDCB0: 0x000d3000
[ 5.883334] NDCB1: 0xfe000000
[ 5.883334] NDCB2: 0x00000001
[ 5.883334] NDCB3: 0x00000000
[ 5.902303] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc1-00041-g0f3e977 #749
[ 5.909898] Hardware name: PXA3xx Platform Development Kit (aka Zylonite)
[ 5.916979] [<c0010440>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[ 5.924950] [<c000df94>] (show_stack) from [<c02adb58>] (nand_op_parser_exec_op+0x39c/0x474)
[ 5.933606] [<c02adb58>] (nand_op_parser_exec_op) from [<c02ac6b0>] (nand_change_read_column_op+0x134/0x194)
[ 5.943672] [<c02ac6b0>] (nand_change_read_column_op) from [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page+0xd0/0x16c)
[ 5.954498] [<c02b9ac8>] (marvell_nfc_hw_ecc_hmg_read_page) from [<c02b25e4>] (nand_do_read_ops+0x200/0x55c)
[ 5.964526] [<c02b25e4>] (nand_do_read_ops) from [<c02b29f4>] (nand_read_oob+0xb4/0x3f8)
[ 5.972855] [<c02b29f4>] (nand_read_oob) from [<c02a4c54>] (mtd_read_oob+0x60/0x9c)
[ 5.980592] [<c02a4c54>] (mtd_read_oob) from [<c02b39a8>] (scan_read+0xa0/0x104)
[ 5.988202] [<c02b39a8>] (scan_read) from [<c02b3ba0>] (search_bbt+0x194/0x2b4)
[ 5.995734] [<c02b3ba0>] (search_bbt) from [<c02b4cf4>] (nand_default_bbt+0x11c/0x640)
[ 6.003876] [<c02b4cf4>] (nand_default_bbt) from [<c02af1b0>] (nand_scan_tail+0x990/0xabc)
[ 6.012373] [<c02af1b0>] (nand_scan_tail) from [<c02b7e7c>] (marvell_nfc_probe+0x3ac/0x9b8)
[ 6.020838] [<c02b7e7c>] (marvell_nfc_probe) from [<c028bb54>] (platform_drv_probe+0x38/0x94)
[ 6.029598] [<c028bb54>] (platform_drv_probe) from [<c0289de0>] (driver_probe_device+0x2e8/0x4b4)
[ 6.038676] [<c0289de0>] (driver_probe_device) from [<c028a090>] (__driver_attach+0xe4/0x124)
[ 6.047417] [<c028a090>] (__driver_attach) from [<c0287e44>] (bus_for_each_dev+0x64/0x94)
[ 6.055807] [<c0287e44>] (bus_for_each_dev) from [<c02890b8>] (bus_add_driver+0x198/0x264)
[ 6.064290] [<c02890b8>] (bus_add_driver) from [<c028aa50>] (driver_register+0x78/0xf8)
[ 6.072513] [<c028aa50>] (driver_register) from [<c00099f8>] (do_one_initcall+0x3c/0x17c)
[ 6.080795] [<c00099f8>] (do_one_initcall) from [<c053fd80>] (kernel_init_freeable+0x104/0x1c0)
[ 6.089716] [<c053fd80>] (kernel_init_freeable) from [<c0423a38>] (kernel_init+0x8/0xf8)
[ 6.098699] [<c0423a38>] (kernel_init) from [<c000a780>] (ret_from_fork+0x14/0x34)
[ 6.106511] nand: ->exec_op() parser: pattern not found!
[ 6.112110] Bad block table not found for chip 0
[ 6.116762] Scanning device for bad blocks
[ 6.121060] nand: nand_do_read_oob: from = 0x00000000, len = 64
[ 6.127086] marvell-nfc pxa3xx-nand:
[ 6.127086] NDCR: 0x9d079fff
[ 6.127086] NDCB0: 0x000d3000
[ 6.127086] NDCB1: 0x00000000
[ 6.127086] NDCB2: 0x00000000
[ 6.127086] NDCB3: 0x00000000
[ 6.145988] Bad eraseblock 0 at 0x000000000000
^ permalink raw reply
* arm64 crashkernel fails to boot on acpi-only machines due to ACPI regions being no longer mapped as NOMAP
From: Bhupesh Sharma @ 2017-12-23 19:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171222083308.cy3vwlyhig22q5ee@fireball>
On Fri, Dec 22, 2017 at 2:03 PM, AKASHI Takahiro
<takahiro.akashi@linaro.org> wrote:
> On Thu, Dec 21, 2017 at 05:36:30PM +0530, Bhupesh Sharma wrote:
>> Hello Akashi,
>>
>> On Thu, Dec 21, 2017 at 4:04 PM, AKASHI Takahiro
>> <takahiro.akashi@linaro.org> wrote:
>> > Bhupesh,
>> >
>> > Can you test the patch attached below, please?
>> >
>> > It is intended to retain already-reserved regions (ACPI reclaim memory
>> > in this case) in system ram (i.e. memblock.memory) without explicitly
>> > exporting them via usable-memory-range.
>> > (I still have to figure out what the side-effect of this patch is.)
>> >
>> > Thanks,
>> > -Takahiro AKASHI
>> >
>> > On Thu, Dec 21, 2017 at 01:30:43AM +0530, Bhupesh Sharma wrote:
>> >> On Tue, Dec 19, 2017 at 6:39 PM, Ard Biesheuvel
>> >> <ard.biesheuvel@linaro.org> wrote:
>> >> > On 19 December 2017 at 07:09, AKASHI Takahiro
>> >> > <takahiro.akashi@linaro.org> wrote:
>> >> >> On Mon, Dec 18, 2017 at 01:40:09PM +0800, Dave Young wrote:
>> >> >>> On 12/15/17 at 05:59pm, AKASHI Takahiro wrote:
>> >> >>> > On Wed, Dec 13, 2017 at 12:17:22PM +0000, Ard Biesheuvel wrote:
>> >> >>> > > On 13 December 2017 at 12:16, AKASHI Takahiro
>> >> >>> > > <takahiro.akashi@linaro.org> wrote:
>> >> >>> > > > On Wed, Dec 13, 2017 at 10:49:27AM +0000, Ard Biesheuvel wrote:
>> >> >>> > > >> On 13 December 2017 at 10:26, AKASHI Takahiro
>> >> >>> > > >> <takahiro.akashi@linaro.org> wrote:
>> >> >>> > > >> > Bhupesh, Ard,
>> >> >>> > > >> >
>> >> >>> > > >> > On Wed, Dec 13, 2017 at 03:21:59AM +0530, Bhupesh Sharma wrote:
>> >> >>> > > >> >> Hi Ard, Akashi
>> >> >>> > > >> >>
>> >> >>> > > >> > (snip)
>> >> >>> > > >> >
>> >> >>> > > >> >> Looking deeper into the issue, since the arm64 kexec-tools uses the
>> >> >>> > > >> >> 'linux,usable-memory-range' dt property to allow crash dump kernel to
>> >> >>> > > >> >> identify its own usable memory and exclude, at its boot time, any
>> >> >>> > > >> >> other memory areas that are part of the panicked kernel's memory.
>> >> >>> > > >> >> (see https://www.kernel.org/doc/Documentation/devicetree/bindings/chosen.txt
>> >> >>> > > >> >> , for details)
>> >> >>> > > >> >
>> >> >>> > > >> > Right.
>> >> >>> > > >> >
>> >> >>> > > >> >> 1). Now when 'kexec -p' is executed, this node is patched up only
>> >> >>> > > >> >> with the crashkernel memory range:
>> >> >>> > > >> >>
>> >> >>> > > >> >> /* add linux,usable-memory-range */
>> >> >>> > > >> >> nodeoffset = fdt_path_offset(new_buf, "/chosen");
>> >> >>> > > >> >> result = fdt_setprop_range(new_buf, nodeoffset,
>> >> >>> > > >> >> PROP_USABLE_MEM_RANGE, &crash_reserved_mem,
>> >> >>> > > >> >> address_cells, size_cells);
>> >> >>> > > >> >>
>> >> >>> > > >> >> (see https://git.kernel.org/pub/scm/utils/kernel/kexec/kexec-tools.git/tree/kexec/arch/arm64/kexec-arm64.c#n465
>> >> >>> > > >> >> , for details)
>> >> >>> > > >> >>
>> >> >>> > > >> >> 2). This excludes the ACPI reclaim regions irrespective of whether
>> >> >>> > > >> >> they are marked as System RAM or as RESERVED. As,
>> >> >>> > > >> >> 'linux,usable-memory-range' dt node is patched up only with
>> >> >>> > > >> >> 'crash_reserved_mem' and not 'system_memory_ranges'
>> >> >>> > > >> >>
>> >> >>> > > >> >> 3). As a result when the crashkernel boots up it doesn't find this
>> >> >>> > > >> >> ACPI memory and crashes while trying to access the same:
>> >> >>> > > >> >>
>> >> >>> > > >> >> # kexec -p /boot/vmlinuz-`uname -r` --initrd=/boot/initramfs-`uname
>> >> >>> > > >> >> -r`.img --reuse-cmdline -d
>> >> >>> > > >> >>
>> >> >>> > > >> >> [snip..]
>> >> >>> > > >> >>
>> >> >>> > > >> >> Reserved memory range
>> >> >>> > > >> >> 000000000e800000-000000002e7fffff (0)
>> >> >>> > > >> >>
>> >> >>> > > >> >> Coredump memory ranges
>> >> >>> > > >> >> 0000000000000000-000000000e7fffff (0)
>> >> >>> > > >> >> 000000002e800000-000000003961ffff (0)
>> >> >>> > > >> >> 0000000039d40000-000000003ed2ffff (0)
>> >> >>> > > >> >> 000000003ed60000-000000003fbfffff (0)
>> >> >>> > > >> >> 0000001040000000-0000001ffbffffff (0)
>> >> >>> > > >> >> 0000002000000000-0000002ffbffffff (0)
>> >> >>> > > >> >> 0000009000000000-0000009ffbffffff (0)
>> >> >>> > > >> >> 000000a000000000-000000affbffffff (0)
>> >> >>> > > >> >>
>> >> >>> > > >> >> 4). So if we revert Ard's patch or just comment the fixing up of the
>> >> >>> > > >> >> memory cap'ing passed to the crash kernel inside
>> >> >>> > > >> >> 'arch/arm64/mm/init.c' (see below):
>> >> >>> > > >> >>
>> >> >>> > > >> >> static void __init fdt_enforce_memory_region(void)
>> >> >>> > > >> >> {
>> >> >>> > > >> >> struct memblock_region reg = {
>> >> >>> > > >> >> .size = 0,
>> >> >>> > > >> >> };
>> >> >>> > > >> >>
>> >> >>> > > >> >> of_scan_flat_dt(early_init_dt_scan_usablemem, ®);
>> >> >>> > > >> >>
>> >> >>> > > >> >> if (reg.size)
>> >> >>> > > >> >> //memblock_cap_memory_range(reg.base, reg.size); /*
>> >> >>> > > >> >> comment this out */
>> >> >>> > > >> >> }
>> >> >>> > > >> >
>> >> >>> > > >> > Please just don't do that. It can cause a fatal damage on
>> >> >>> > > >> > memory contents of the *crashed* kernel.
>> >> >>> > > >> >
>> >> >>> > > >> >> 5). Both the above temporary solutions fix the problem.
>> >> >>> > > >> >>
>> >> >>> > > >> >> 6). However exposing all System RAM regions to the crashkernel is not
>> >> >>> > > >> >> advisable and may cause the crashkernel or some crashkernel drivers to
>> >> >>> > > >> >> fail.
>> >> >>> > > >> >>
>> >> >>> > > >> >> 6a). I am trying an approach now, where the ACPI reclaim regions are
>> >> >>> > > >> >> added to '/proc/iomem' separately as ACPI reclaim regions by the
>> >> >>> > > >> >> kernel code and on the other hand the user-space 'kexec-tools' will
>> >> >>> > > >> >> pick up the ACPI reclaim regions from '/proc/iomem' and add it to the
>> >> >>> > > >> >> dt node 'linux,usable-memory-range'
>> >> >>> > > >> >
>> >> >>> > > >> > I still don't understand why we need to carry over the information
>> >> >>> > > >> > about "ACPI Reclaim memory" to crash dump kernel. In my understandings,
>> >> >>> > > >> > such regions are free to be reused by the kernel after some point of
>> >> >>> > > >> > initialization. Why does crash dump kernel need to know about them?
>> >> >>> > > >> >
>> >> >>> > > >>
>> >> >>> > > >> Not really. According to the UEFI spec, they can be reclaimed after
>> >> >>> > > >> the OS has initialized, i.e., when it has consumed the ACPI tables and
>> >> >>> > > >> no longer needs them. Of course, in order to be able to boot a kexec
>> >> >>> > > >> kernel, those regions needs to be preserved, which is why they are
>> >> >>> > > >> memblock_reserve()'d now.
>> >> >>> > > >
>> >> >>> > > > For my better understandings, who is actually accessing such regions
>> >> >>> > > > during boot time, uefi itself or efistub?
>> >> >>> > > >
>> >> >>> > >
>> >> >>> > > No, only the kernel. This is where the ACPI tables are stored. For
>> >> >>> > > instance, on QEMU we have
>> >> >>> > >
>> >> >>> > > ACPI: RSDP 0x0000000078980000 000024 (v02 BOCHS )
>> >> >>> > > ACPI: XSDT 0x0000000078970000 000054 (v01 BOCHS BXPCFACP 00000001
>> >> >>> > > 01000013)
>> >> >>> > > ACPI: FACP 0x0000000078930000 00010C (v05 BOCHS BXPCFACP 00000001
>> >> >>> > > BXPC 00000001)
>> >> >>> > > ACPI: DSDT 0x0000000078940000 0011DA (v02 BOCHS BXPCDSDT 00000001
>> >> >>> > > BXPC 00000001)
>> >> >>> > > ACPI: APIC 0x0000000078920000 000140 (v03 BOCHS BXPCAPIC 00000001
>> >> >>> > > BXPC 00000001)
>> >> >>> > > ACPI: GTDT 0x0000000078910000 000060 (v02 BOCHS BXPCGTDT 00000001
>> >> >>> > > BXPC 00000001)
>> >> >>> > > ACPI: MCFG 0x0000000078900000 00003C (v01 BOCHS BXPCMCFG 00000001
>> >> >>> > > BXPC 00000001)
>> >> >>> > > ACPI: SPCR 0x00000000788F0000 000050 (v02 BOCHS BXPCSPCR 00000001
>> >> >>> > > BXPC 00000001)
>> >> >>> > > ACPI: IORT 0x00000000788E0000 00007C (v00 BOCHS BXPCIORT 00000001
>> >> >>> > > BXPC 00000001)
>> >> >>> > >
>> >> >>> > > covered by
>> >> >>> > >
>> >> >>> > > efi: 0x0000788e0000-0x00007894ffff [ACPI Reclaim Memory ...]
>> >> >>> > > ...
>> >> >>> > > efi: 0x000078970000-0x00007898ffff [ACPI Reclaim Memory ...]
>> >> >>> >
>> >> >>> > OK. I mistakenly understood those regions could be freed after exiting
>> >> >>> > UEFI boot services.
>> >> >>> >
>> >> >>> > >
>> >> >>> > > >> So it seems that kexec does not honour the memblock_reserve() table
>> >> >>> > > >> when booting the next kernel.
>> >> >>> > > >
>> >> >>> > > > not really.
>> >> >>> > > >
>> >> >>> > > >> > (In other words, can or should we skip some part of ACPI-related init code
>> >> >>> > > >> > on crash dump kernel?)
>> >> >>> > > >> >
>> >> >>> > > >>
>> >> >>> > > >> I don't think so. And the change to the handling of ACPI reclaim
>> >> >>> > > >> regions only revealed the bug, not created it (given that other
>> >> >>> > > >> memblock_reserve regions may be affected as well)
>> >> >>> > > >
>> >> >>> > > > As whether we should honor such reserved regions over kexec'ing
>> >> >>> > > > depends on each one's specific nature, we will have to take care one-by-one.
>> >> >>> > > > As a matter of fact, no information about "reserved" memblocks is
>> >> >>> > > > exposed to user space (via proc/iomem).
>> >> >>> > > >
>> >> >>> > >
>> >> >>> > > That is why I suggested (somewhere in this thread?) to not expose them
>> >> >>> > > as 'System RAM'. Do you think that could solve this?
>> >> >>> >
>> >> >>> > Memblock-reserv'ing them is necessary to prevent their corruption and
>> >> >>> > marking them under another name in /proc/iomem would also be good in order
>> >> >>> > not to allocate them as part of crash kernel's memory.
>> >> >>> >
>> >> >>> > But I'm not still convinced that we should export them in useable-
>> >> >>> > memory-range to crash dump kernel. They will be accessed through
>> >> >>> > acpi_os_map_memory() and so won't be required to be part of system ram
>> >> >>> > (or memblocks), I guess.
>> >> >>> > -> Bhupesh?
>> >> >>>
>> >> >>> I forgot how arm64 kernel retrieve the memory ranges and initialize
>> >> >>> them. If no "e820" like interfaces shouldn't kernel reinitialize all
>> >> >>> the memory according to the efi memmap? For kdump kernel anything other
>> >> >>> than usable memory (which is from the dt node instead) should be
>> >> >>> reinitialized according to efi passed info, no?
>> >> >>
>> >> >> All the regions exported in efi memmap will be added to memblock.memory
>> >> >> in (u)efi_init() and then trimmed down to the exact range specified as
>> >> >> usable-memory-range by fdt_enforce_memory_region().
>> >> >>
>> >> >> Now I noticed that the current fdt_enforce_memory_region() may not work well
>> >> >> with multiple entries in usable-memory-range.
>> >> >>
>> >> >
>> >> > In any case, the root of the problem is that memory regions lose their
>> >> > 'memory' annotation due to the way the memory map is mangled before
>> >> > being supplied to the kexec kernel.
>> >> >
>> >> > Would it be possible to classify all memory that we want to hide from
>> >> > the kexec kernel as NOMAP instead? That way, it will not be mapped
>> >> > implicitly, but will still be mapped cacheable by acpi_os_ioremap(),
>> >> > so this seems to be the most appropriate way to deal with the host
>> >> > kernel's memory contents.
>> >>
>> >> Hmm. wouldn't appending the acpi reclaim regions to
>> >> 'linux,usable-memory-range' in the dtb being passed to the crashkernel
>> >> be better? Because its indirectly achieving a similar objective
>> >> (although may be a subset of all System RAM regions on the primary
>> >> kernel's memory).
>> >>
>> >> I am not aware of the background about the current kexec-tools
>> >> implementation where we add only the crashkernel range to the dtb
>> >> being passed to the crashkernel.
>> >>
>> >> Probably Akashi can answer better, as to how we arrived at this design
>> >> approach and why we didn't want to expose all System RAM regions (i.e.
>> >> ! NOMPAP regions) to the crashkernel.
>> >>
>> >> I am suspecting that some issues were seen/meet when the System RAM (!
>> >> NOMAP regions) were exposed to the crashkernel, and that's why we
>> >> finalized on this design approach, but this is something which is just
>> >> my guess.
>> >>
>> >> Regards,
>> >> Bhupesh
>> >>
>> >> >>> >
>> >> >>> > Just FYI, on x86, ACPI tables seems to be exposed to crash dump kernel
>> >> >>> > via a kernel command line parameter, "memmap=".
>> >> >>>
>> >> >>> memmap= is only used in old kexec-tools, now we are passing them via
>> >> >>> e820 table.
>> >> >>
>> >> >> Thanks. I remember that you have explained it before.
>> >> >>
>> >> >> -Takahiro AKASHI
>> >> >>
>> >> >>> [snip]
>> >> >>>
>> >> >>> Thanks
>> >> >>> Dave
>> >
>> > ===8<==
>> > From 74e2451fea83d546feae76160ba7de426913fe03 Mon Sep 17 00:00:00 2001
>> > From: AKASHI Takahiro <takahiro.akashi@linaro.org>
>> > Date: Thu, 21 Dec 2017 19:14:23 +0900
>> > Subject: [PATCH] arm64: kdump: mark unusable memory as NOMAP
>> >
>> > ---
>> > arch/arm64/mm/init.c | 10 ++++++++--
>> > 1 file changed, 8 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
>> > index 00e7b900ca41..8175db94257b 100644
>> > --- a/arch/arm64/mm/init.c
>> > +++ b/arch/arm64/mm/init.c
>> > @@ -352,11 +352,17 @@ static void __init fdt_enforce_memory_region(void)
>> > struct memblock_region reg = {
>> > .size = 0,
>> > };
>> > + u64 idx;
>> > + phys_addr_t start, end;
>> >
>> > of_scan_flat_dt(early_init_dt_scan_usablemem, ®);
>> >
>> > - if (reg.size)
>> > - memblock_cap_memory_range(reg.base, reg.size);
>> > + if (reg.size) {
>> > + for_each_free_mem_range(idx, NUMA_NO_NODE, MEMBLOCK_NONE,
>> > + &start, &end, NULL)
>> > + memblock_mark_nomap(start, end - start);
>> > + memblock_clear_nomap(reg.base, reg.size);
>> > + }
>> > }
>> >
>> > void __init arm64_memblock_init(void)
>> > --
>> > 2.15.1
>> >
>>
>> Thanks for the patch. After applying this on top of
>> 4.15.0-rc4-next-20171220, there seems to be a improvement and the
>> crashkernel boot no longer hangs while trying to access the acpi
>> tables.
>>
>> However I notice a minor issue. Please see the log below for
>> reference, the following message keeps spamming the console but I see
>> the crashkernel boot proceed further.:
>>
>> [ 0.000000] ACPI: NUMA: SRAT: PXM 3 -> MPIDR 0x70303 -> Node 3
>> [ 0.000000] ACPI: SRAT: Node 0 PXM 0 [mem 0x00000000-0x3fffffff]
>> [ 0.000000] ACPI: SRAT: Node 1 PXM 1 [mem 0x2000000000-0x2fffffffff]
>> [ 0.000000] ACPI: SRAT: Node 0 PXM 0 [mem 0x1000000000-0x1fffffffff]
>> [ 0.000000] ACPI: SRAT: Node 3 PXM 3 [mem 0xa000000000-0xafffffffff]
>> [ 0.000000] ACPI: SRAT: Node 2 PXM 2 [mem 0x9000000000-0x9fffffffff]
>> [ 0.000000] NUMA: NODE_DATA [mem 0x1ffbffe200-0x1ffbffffff]
>> [ 0.000000] NUMA: NODE_DATA [mem 0x1ffbffc400-0x1ffbffe1ff]
>> [ 0.000000] NUMA: NODE_DATA(1) on node 0
>> [ 0.000000] NUMA: NODE_DATA [mem 0x1ffbffa600-0x1ffbffc3ff]
>> [ 0.000000] NUMA: NODE_DATA(2) on node 0
>> [ 0.000000] NUMA: NODE_DATA [mem 0x1ffbff8800-0x1ffbffa5ff]
>> [ 0.000000] NUMA: NODE_DATA(3) on node 0
>> [ 0.000000] [ffff7fe008000000-ffff7fe00800ffff] potential offnode
>> page_structs
>> [ 0.000000] [ffff7fe008010000-ffff7fe00801ffff] potential offnode
>> page_structs
>> [ 0.000000] [ffff7fe008020000-ffff7fe00802ffff] potential offnode
>> page_structs
>> [ 0.000000] [ffff7fe008030000-ffff7fe00803ffff] potential offnode
>> page_structs
>> [ 0.000000] [ffff7fe008040000-ffff7fe00804ffff] potential offnode
>> page_structs
>> [ 0.000000] [ffff7fe008050000-ffff7fe00805ffff] potential offnode
>> page_structs
>>
>> [snip..]
>> [ 0.000000] [ffff7fe0081f0000-ffff7fe0081fffff] potential offnode
>> page_structs
>
> These messages shows that some "struct page" data are allocated on remote
> (numa) nodes.
> Since on your crash dump kernel, all the usable system memory (starting
> 0x0e800000) belongs to Node#0, we can't avoid such non-local allocations.
>
> In my best guess, you can ingore them except for some performance penality.
> This may be one side-effect.
>
> So does your crash dump kernel now boot successfully?
>
Indeed. The crash dump kernel now boots successfully and the crash
dump core can be saved properly as well (I tried saving it to local
disk).
However, the 'potential offnode page_structs' WARN messages hog the
console and delay crashkernel boot for a significant duration, which
can be irritating.
Can we also consider ratelimiting this WARNING message [which seems to
come from vmemmap_verify()] if invoked in the context of crash kernel,
in addition to making the above change suggested by you.
Thanks for the help.
Regards,
Bhupesh
^ permalink raw reply
* [PATCH] pinctrl: at91: Delete an error message for a failed memory allocation in at91_pinctrl_mux_mask()
From: SF Markus Elfring @ 2017-12-23 19:55 UTC (permalink / raw)
To: linux-arm-kernel
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 23 Dec 2017 20:44:27 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/pinctrl/pinctrl-at91.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 03492e3c09fa..297f1d161211 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -1050,10 +1050,8 @@ static int at91_pinctrl_mux_mask(struct at91_pinctrl *info,
info->nmux = size / gpio_banks;
info->mux_mask = devm_kzalloc(info->dev, sizeof(u32) * size, GFP_KERNEL);
- if (!info->mux_mask) {
- dev_err(info->dev, "could not alloc mux_mask\n");
+ if (!info->mux_mask)
return -ENOMEM;
- }
ret = of_property_read_u32_array(np, "atmel,mux-mask",
info->mux_mask, size);
--
2.15.1
^ permalink raw reply related
* [PATCH v2 3/5] mtd: nand: replace pxa3xx_nand driver by its rework called marvell_nand
From: Robert Jarzmik @ 2017-12-23 21:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171222230444.2c952ea0@bbrezillon>
Boris Brezillon <boris.brezillon@free-electrons.com> writes:
>> What I would propose instead is :
>> - keep both the new marvell nand driver and the old pxa3xx_nand driver
>> - switch pxa_defconfig to compile them both
>
> Didn't notice you were suggesting to compile both, which doesn't work
> because both drivers match the same devices, and only one of them
> can actually claim the device (likely the first one to register to the
> device model). So, to make it safe you need to have a
>
> depends on !MTD_NAND_PXA3xx
>
> in your MTD_NAND_MARVELL entry, which means only one driver can be
> compiled.
Mmm... that is I didn't explain to you what pxa_defconfig is designed for.
This defconfig is not for any board actually, it rather is a build coverage
tool.
> So let's find a way to fix the remaining issues you have instead of delaying
> the inevitable.
It's up to you of course, as long as my boards don't break, and nothing breaking
them is merged, I'm fine with it. It's just not the approach I usually choose,
I'm rather a 2-step guy, ie. merge the new one, then merge the switch (which can
be reverted easilly).
Cheers.
--
Robert
^ permalink raw reply
* [PATCH 0/3] Pinctrl-Rockchip: Adjustments for six functions
From: SF Markus Elfring @ 2017-12-23 21:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 23 Dec 2017 22:33:44 +0100
Three update suggestions were taken into account
from static source code analysis.
Markus Elfring (3):
Delete error messages for a failed memory allocation in two functions
Improve a size determination in rockchip_pinctrl_probe()
Fix a typo in four comment lines
drivers/pinctrl/pinctrl-rockchip.c | 23 +++++++++--------------
1 file changed, 9 insertions(+), 14 deletions(-)
--
2.15.1
^ permalink raw reply
* [PATCH 1/3] pinctrl: rockchip: Delete error messages for a failed memory allocation in two functions
From: SF Markus Elfring @ 2017-12-23 21:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <323697d0-e1e8-8d3b-1070-f481cfa30b9a@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 23 Dec 2017 22:02:47 +0100
Omit extra messages for a memory allocation failure in these functions.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/pinctrl/pinctrl-rockchip.c | 13 ++++---------
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 2ba17548ad5b..285169170eb2 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2400,18 +2400,14 @@ static int rockchip_pinctrl_parse_dt(struct platform_device *pdev,
info->functions = devm_kzalloc(dev, info->nfunctions *
sizeof(struct rockchip_pmx_func),
GFP_KERNEL);
- if (!info->functions) {
- dev_err(dev, "failed to allocate memory for function list\n");
+ if (!info->functions)
return -EINVAL;
- }
info->groups = devm_kzalloc(dev, info->ngroups *
sizeof(struct rockchip_pin_group),
GFP_KERNEL);
- if (!info->groups) {
- dev_err(dev, "failed allocate memory for ping group list\n");
+ if (!info->groups)
return -EINVAL;
- }
i = 0;
@@ -2447,10 +2443,9 @@ static int rockchip_pinctrl_register(struct platform_device *pdev,
pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
info->ctrl->nr_pins, GFP_KERNEL);
- if (!pindesc) {
- dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
+ if (!pindesc)
return -ENOMEM;
- }
+
ctrldesc->pins = pindesc;
ctrldesc->npins = info->ctrl->nr_pins;
--
2.15.1
^ permalink raw reply related
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