* [BUG] sun8i-a83t-bananapi-m3: Ethernet unstable since d7c5f6863550 ("ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes")
From: Corentin Labbe @ 2017-12-28 20:20 UTC (permalink / raw)
To: linux-arm-kernel
Hello
Since d7c5f6863550 ("ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes"), my BPIM3 does not have stable ethernet.
from 50% to 100% packet loss.
According to the logs (below), vcc-ephy is disabled during boot
With the following hack, https://paste.pound-python.org/show/6BlmwcE60z0o4GrbAMUU/ (which is a badly d7c5f6863550 revert)
the situation is better (ping with 0% loss), but the bandwitch is unstable low.
So the problem is clearly that the PHY is badly powered.
Regards
[ 4.840336] sunxi-rsb 1f03400.rsb: RSB running at 3000000 Hz
[ 4.847252] axp20x-rsb sunxi-rsb-3a3: AXP20x variant AXP813 found
[ 4.856307] axp20x-rsb sunxi-rsb-3a3: Looking up vin1-supply from device tree
[ 4.856331] axp20x-rsb sunxi-rsb-3a3: Looking up vin1-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.856351] dcdc1: supplied by regulator-dummy
[ 4.860802] regulator-dummy: could not add device link regulator.1 err -2
[ 4.861006] vcc-3v3: 3300 mV
[ 4.861264] axp20x-rsb sunxi-rsb-3a3: Looking up vin2-supply from device tree
[ 4.861281] axp20x-rsb sunxi-rsb-3a3: Looking up vin2-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.861291] dcdc2: supplied by regulator-dummy
[ 4.865854] regulator-dummy: could not add device link regulator.2 err -2
[ 4.866041] vdd-cpua: 700 <--> 1100 mV at 900 mV
[ 4.866251] axp20x-rsb sunxi-rsb-3a3: Looking up vin3-supply from device tree
[ 4.866264] axp20x-rsb sunxi-rsb-3a3: Looking up vin3-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.866274] dcdc3: supplied by regulator-dummy
[ 4.870717] regulator-dummy: could not add device link regulator.3 err -2
[ 4.870814] vdd-cpub: 700 <--> 1100 mV at 900 mV
[ 4.871017] axp20x-rsb sunxi-rsb-3a3: Looking up vin4-supply from device tree
[ 4.871029] axp20x-rsb sunxi-rsb-3a3: Looking up vin4-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.871040] dcdc4: supplied by regulator-dummy
[ 4.875524] regulator-dummy: could not add device link regulator.4 err -2
[ 4.875633] vdd-gpu: 700 <--> 1100 mV at 900 mV
[ 4.875832] axp20x-rsb sunxi-rsb-3a3: Looking up vin5-supply from device tree
[ 4.875845] axp20x-rsb sunxi-rsb-3a3: Looking up vin5-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.875857] dcdc5: supplied by regulator-dummy
[ 4.880299] regulator-dummy: could not add device link regulator.5 err -2
[ 4.880413] vcc-dram: Bringing 1180000uV into 1200000-1200000uV
[ 4.886402] vcc-dram: ramp_delay not set
[ 4.886418] vcc-dram: 1200 mV
[ 4.886643] axp20x-rsb sunxi-rsb-3a3: Looking up vin6-supply from device tree
[ 4.886655] axp20x-rsb sunxi-rsb-3a3: Looking up vin6-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.886669] dcdc6: supplied by regulator-dummy
[ 4.891110] regulator-dummy: could not add device link regulator.6 err -2
[ 4.891216] vdd-sys: 900 mV
[ 4.891495] axp20x-rsb sunxi-rsb-3a3: Looking up vin7-supply from device tree
[ 4.891508] axp20x-rsb sunxi-rsb-3a3: Looking up vin7-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.891521] dcdc7: supplied by regulator-dummy
[ 4.895995] regulator-dummy: could not add device link regulator.7 err -2
[ 4.896102] dcdc7: at 1000 mV
[ 4.896324] axp20x-rsb sunxi-rsb-3a3: Looking up aldoin-supply from device tree
[ 4.896336] axp20x-rsb sunxi-rsb-3a3: Looking up aldoin-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.896348] aldo1: supplied by regulator-dummy
[ 4.900790] regulator-dummy: could not add device link regulator.8 err -2
[ 4.900936] vcc-1v8: 1800 mV
[ 4.901142] axp20x-rsb sunxi-rsb-3a3: Looking up aldoin-supply from device tree
[ 4.901155] axp20x-rsb sunxi-rsb-3a3: Looking up aldoin-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.901169] aldo2: supplied by regulator-dummy
[ 4.905638] regulator-dummy: could not add device link regulator.9 err -2
[ 4.905734] dram-pll: 1800 mV
[ 4.905959] axp20x-rsb sunxi-rsb-3a3: Looking up aldoin-supply from device tree
[ 4.905972] axp20x-rsb sunxi-rsb-3a3: Looking up aldoin-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.905986] aldo3: supplied by regulator-dummy
[ 4.910428] regulator-dummy: could not add device link regulator.10 err -2
[ 4.910536] avcc: 3000 mV
[ 4.910813] axp20x-rsb sunxi-rsb-3a3: Looking up dldoin-supply from device tree
[ 4.910827] axp20x-rsb sunxi-rsb-3a3: Looking up dldoin-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.910842] dldo1: supplied by regulator-dummy
[ 4.915313] regulator-dummy: could not add device link regulator.11 err -2
[ 4.915448] vcc-wifi: Bringing 2900000uV into 3300000-3300000uV
[ 4.921405] vcc-wifi: ramp_delay not set
[ 4.921414] vcc-wifi: 3300 mV
[ 4.921627] axp20x-rsb sunxi-rsb-3a3: Looking up dldoin-supply from device tree
[ 4.921640] axp20x-rsb sunxi-rsb-3a3: Looking up dldoin-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.921654] dldo2: supplied by regulator-dummy
[ 4.926118] regulator-dummy: could not add device link regulator.12 err -2
[ 4.926208] dldo2: at 2900 mV
[ 4.926422] axp20x-rsb sunxi-rsb-3a3: Looking up dldoin-supply from device tree
[ 4.926435] axp20x-rsb sunxi-rsb-3a3: Looking up dldoin-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.926451] dldo3: supplied by regulator-dummy
[ 4.930892] regulator-dummy: could not add device link regulator.13 err -2
[ 4.930983] vcc-pd: Bringing 2900000uV into 2500000-2500000uV
[ 4.936787] vcc-pd: ramp_delay not set
[ 4.936801] vcc-pd: 2500 mV
[ 4.937018] axp20x-rsb sunxi-rsb-3a3: Looking up dldoin-supply from device tree
[ 4.937030] axp20x-rsb sunxi-rsb-3a3: Looking up dldoin-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.937045] dldo4: supplied by regulator-dummy
[ 4.941486] regulator-dummy: could not add device link regulator.14 err -2
[ 4.941579] dldo4: at 3300 mV
[ 4.941785] axp20x-rsb sunxi-rsb-3a3: Looking up eldoin-supply from device tree
[ 4.941822] eldo1: supplied by vcc-3v3
[ 4.945598] vcc-3v3: could not add device link regulator.15 err -2
[ 4.945763] eldo1: at 700 mV
[ 4.945994] axp20x-rsb sunxi-rsb-3a3: Looking up eldoin-supply from device tree
[ 4.946013] eldo2: supplied by vcc-3v3
[ 4.949763] vcc-3v3: could not add device link regulator.16 err -2
[ 4.949849] eldo2: at 700 mV
[ 4.950067] axp20x-rsb sunxi-rsb-3a3: Looking up eldoin-supply from device tree
[ 4.950083] eldo3: supplied by vcc-3v3
[ 4.953866] vcc-3v3: could not add device link regulator.17 err -2
[ 4.953964] eldo3: at 1600 mV
[ 4.954190] axp20x-rsb sunxi-rsb-3a3: Looking up fldoin-supply from device tree
[ 4.954208] fldo1: supplied by vcc-dram
[ 4.958043] vcc-dram: could not add device link regulator.18 err -2
[ 4.958143] vdd12-hsic: override min_uV, 1080000 -> 1100000
[ 4.958149] vdd12-hsic: override max_uV, 1320000 -> 1300000
[ 4.958159] vdd12-hsic: 1100 <--> 1300 mV at 1250 mV
[ 4.958419] axp20x-rsb sunxi-rsb-3a3: Looking up fldoin-supply from device tree
[ 4.958440] fldo2: supplied by vcc-dram
[ 4.962275] vcc-dram: could not add device link regulator.19 err -2
[ 4.962447] vdd-cpus: 700 <--> 1100 mV at 900 mV
[ 4.962686] axp20x-rsb sunxi-rsb-3a3: Looking up ips-supply from device tree
[ 4.962700] axp20x-rsb sunxi-rsb-3a3: Looking up ips-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.962721] rtc-ldo: supplied by regulator-dummy
[ 4.967375] regulator-dummy: could not add device link regulator.20 err -2
[ 4.967425] vcc-rtc: 1800 mV
[ 4.967626] axp20x-rsb sunxi-rsb-3a3: Looking up ips-supply from device tree
[ 4.967638] axp20x-rsb sunxi-rsb-3a3: Looking up ips-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.967658] ldo-io0: supplied by regulator-dummy
[ 4.972273] regulator-dummy: could not add device link regulator.21 err -2
[ 4.972404] ldo-io0: at 3300 mV
[ 4.972622] axp20x-rsb sunxi-rsb-3a3: Looking up ips-supply from device tree
[ 4.972635] axp20x-rsb sunxi-rsb-3a3: Looking up ips-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.972656] ldo-io1: supplied by regulator-dummy
[ 4.977297] regulator-dummy: could not add device link regulator.22 err -2
[ 4.977435] ldo-io1: at 3300 mV
[ 4.977659] axp20x-rsb sunxi-rsb-3a3: Looking up swin-supply from device tree
[ 4.977679] sw: supplied by vcc-3v3
[ 4.981167] vcc-3v3: could not add device link regulator.23 err -2
[ 4.981295] vcc-ephy: at 3300 mV
[ 4.981576] axp20x-rsb sunxi-rsb-3a3: Looking up drivevbus-supply from device tree
[ 4.981590] axp20x-rsb sunxi-rsb-3a3: Looking up drivevbus-supply property in node /soc/rsb at 1f03400/pmic at 3a3 failed
[ 4.981614] drivevbus: supplied by regulator-dummy
[ 4.986436] regulator-dummy: could not add device link regulator.24 err -2
[ 4.986539] usb0-vbus: no parameters
[ 4.987174] axp20x-rsb sunxi-rsb-3a3: AXP20X driver loaded
[ 4.996209] ac100-rtc ac100-rtc: registered as rtc0
[ 5.001098] ac100-rtc ac100-rtc: RTC enabled
[ 5.006016] sun4i-usb-phy 1c19400.phy: Looking up usb0_vbus-supply from device tree
[ 5.006033] sun4i-usb-phy 1c19400.phy: Looking up usb0_vbus-supply property in node /soc/phy at 1c19400 failed
[ 5.006142] phy phy-1c19400.phy.0: Looking up phy-supply from device tree
[ 5.006153] phy phy-1c19400.phy.0: Looking up phy-supply property in node /soc/phy at 1c19400 failed
[ 5.006270] sun4i-usb-phy 1c19400.phy: Looking up usb1_vbus-supply from device tree
[ 5.006312] sun4i-usb-phy 1c19400.phy: Couldn't get regulator usb1_vbus... Deferring probe
[ 5.020051] sun8i-a83t-pinctrl 1c20800.pinctrl: initialized sunXi PIO driver
[ 5.028283] console [ttyS0] disabled
[ 5.052157] 1c28000.serial: ttyS0 at MMIO 0x1c28000 (irq = 42, base_baud = 1500000) is a U6_16550A
[ 5.061250] console [ttyS0] enabled
[ 5.068271] bootconsole [earlycon0] disabled
[ 5.078429] sunxi-mmc 1c0f000.mmc: Looking up vmmc-supply from device tree
[ 5.078551] sunxi-mmc 1c0f000.mmc: Looking up vqmmc-supply from device tree
[ 5.078565] sunxi-mmc 1c0f000.mmc: Looking up vqmmc-supply property in node /soc/mmc at 1c0f000 failed
[ 5.079422] sunxi-mmc 1c0f000.mmc: Got CD GPIO
[ 5.109476] sunxi-mmc 1c0f000.mmc: base:0x(ptrval) irq:24
[ 5.115503] sunxi-mmc 1c10000.mmc: Looking up vmmc-supply from device tree
[ 5.115609] sunxi-mmc 1c10000.mmc: Looking up vqmmc-supply from device tree
[ 5.116352] sunxi-mmc 1c10000.mmc: allocated mmc-pwrseq
[ 5.144835] sunxi-mmc 1c10000.mmc: base:0x(ptrval) irq:25
[ 5.150842] sunxi-mmc 1c11000.mmc: Looking up vmmc-supply from device tree
[ 5.150976] sunxi-mmc 1c11000.mmc: Looking up vqmmc-supply from device tree
[ 5.157776] mmc0: host does not support reading read-only switch, assuming write-enable
[ 5.168115] mmc0: new high speed SDHC card at address 59b4
[ 5.175753] mmcblk0: mmc0:59b4 00000 14.9 GiB
[ 5.180362] sunxi-mmc 1c11000.mmc: base:0x(ptrval) irq:26
[ 5.180849] usb1-vbus: 5000 mV
[ 5.181218] reg-fixed-voltage reg-usb1-vbus: usb1-vbus supplying 5000000uV
[ 5.181674] sun4i-usb-phy 1c19400.phy: Looking up usb0_vbus-supply from device tree
[ 5.181689] sun4i-usb-phy 1c19400.phy: Looking up usb0_vbus-supply property in node /soc/phy at 1c19400 failed
[ 5.181825] phy phy-1c19400.phy.0: Looking up phy-supply from device tree
[ 5.181834] phy phy-1c19400.phy.0: Looking up phy-supply property in node /soc/phy at 1c19400 failed
[ 5.181941] sun4i-usb-phy 1c19400.phy: Looking up usb1_vbus-supply from device tree
[ 5.182203] phy phy-1c19400.phy.1: Looking up phy-supply from device tree
[ 5.182215] phy phy-1c19400.phy.1: Looking up phy-supply property in node /soc/phy at 1c19400 failed
[ 5.182320] sun4i-usb-phy 1c19400.phy: Looking up usb2_vbus-supply from device tree
[ 5.182330] sun4i-usb-phy 1c19400.phy: Looking up usb2_vbus-supply property in node /soc/phy at 1c19400 failed
[ 5.182418] phy phy-1c19400.phy.2: Looking up phy-supply from device tree
[ 5.182427] phy phy-1c19400.phy.2: Looking up phy-supply property in node /soc/phy at 1c19400 failed
[ 5.183355] ehci-platform 1c1a000.usb: EHCI Host Controller
[ 5.189212] ehci-platform 1c1a000.usb: new USB bus registered, assigned bus number 1
[ 5.189548] ehci-platform 1c1a000.usb: irq 28, io mem 0x01c1a000
[ 5.212983] ehci-platform 1c1a000.usb: USB 2.0 started, EHCI 1.00
[ 5.219425] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[ 5.226470] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 5.233887] mmcblk0: p1
[ 5.238179] usb usb1: Product: EHCI Host Controller
[ 5.243188] usb usb1: Manufacturer: Linux 4.15.0-rc4-next-20171222+ ehci_hcd
[ 5.250260] usb usb1: SerialNumber: 1c1a000.usb
[ 5.255686] hub 1-0:1.0: USB hub found
[ 5.259513] hub 1-0:1.0: 1 port detected
[ 5.263822] mmc1: queuing unknown CIS tuple 0x80 (2 bytes)
[ 5.269572] console [netcon0] enabled
[ 5.273325] netconsole: network logging started
[ 5.278597] ac100-rtc ac100-rtc: setting system clock to 2017-12-28 20:39:02 UTC (1514493542)
[ 5.287486] mmc1: queuing unknown CIS tuple 0x80 (3 bytes)
[ 5.293314] vdd-gpu: disabling
[ 5.296485] vcc-ephy: disabling
[ 5.301896] EXT4-fs (mmcblk0p1): couldn't mount as ext3 due to feature incompatibilities
[ 5.311055] mmc1: queuing unknown CIS tuple 0x80 (3 bytes)
[ 5.321221] mmc1: queuing unknown CIS tuple 0x80 (7 bytes)
[ 5.343195] EXT4-fs (mmcblk0p1): mounted filesystem with ordered data mode. Opts: (null)
[ 5.351451] VFS: Mounted root (ext4 filesystem) readonly on device 179:1.
[ 5.367566] devtmpfs: mounted
[ 5.372472] Freeing unused kernel memory: 1024K
[ 5.377759] mmc2: new DDR MMC card at address 0001
[ 5.379726] mmcblk2: mmc2:0001 8WPD3R 7.28 GiB
[ 5.381258] mmcblk2boot0: mmc2:0001 8WPD3R partition 1 4.00 MiB
[ 5.382822] mmcblk2boot1: mmc2:0001 8WPD3R partition 2 4.00 MiB
[ 5.470371] mmc1: new high speed SDIO card at address 0001
[ 5.633004] usb 1-1: new high-speed USB device number 2 using ehci-platform
[ 5.834539] usb 1-1: New USB device found, idVendor=1a40, idProduct=0101
[ 5.841615] usb 1-1: New USB device strings: Mfr=0, Product=1, SerialNumber=0
[ 5.849030] usb 1-1: Product: USB 2.0 Hub
[ 5.854281] hub 1-1:1.0: USB hub found
[ 5.858757] hub 1-1:1.0: 4 ports detected
[ 6.183024] usb 1-1.1: new high-speed USB device number 3 using ehci-platform
[ 6.356172] usb 1-1.1: New USB device found, idVendor=05e3, idProduct=0718
[ 6.363586] usb 1-1.1: New USB device strings: Mfr=0, Product=1, SerialNumber=2
[ 6.371011] usb 1-1.1: Product: USB Storage
[ 6.375406] usb 1-1.1: SerialNumber: 000000000033
[ 6.381855] usb-storage 1-1.1:1.0: USB Mass Storage device detected
[ 6.401248] scsi host0: usb-storage 1-1.1:1.0
[ 7.466681] scsi 0:0:0:0: Direct-Access USB TO I DE/SATA Device 0016 PQ: 0 ANSI: 4
[ 7.484140] sd 0:0:0:0: Attached scsi generic sg0 type 0
[ 7.490789] sd 0:0:0:0: [sda] 0 512-byte logical blocks: (0 B/0 B)
[ 7.503041] sd 0:0:0:0: [sda] 0-byte physical blocks
[ 7.513103] sd 0:0:0:0: [sda] Test WP failed, assume Write Enabled
[ 7.526422] sd 0:0:0:0: [sda] Asking for cache data failed
[ 7.531936] sd 0:0:0:0: [sda] Assuming drive cache: write through
[ 7.559074] sd 0:0:0:0: [sda] Attached SCSI disk
[ 14.564013] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[ 14.695046] axp20x-gpio axp20x-gpio: AXP209 pinctrl and GPIO driver loaded
[ 14.781019] dwmac-sun8i 1c30000.ethernet: PTP uses main clock
[ 14.781082] dwmac-sun8i 1c30000.ethernet: Looking up phy-supply from device tree
[ 14.913317] dwmac-sun8i 1c30000.ethernet: Current syscon value is not the default 1ce6 (expect 0)
[ 14.913365] dwmac-sun8i 1c30000.ethernet: Chain mode enabled
[ 14.913373] dwmac-sun8i 1c30000.ethernet: No HW DMA feature register supported
[ 14.913381] dwmac-sun8i 1c30000.ethernet: Normal descriptors
[ 14.913388] dwmac-sun8i 1c30000.ethernet: RX Checksum Offload Engine supported
[ 14.913395] dwmac-sun8i 1c30000.ethernet: COE Type 2
[ 14.913402] dwmac-sun8i 1c30000.ethernet: TX Checksum insertion supported
[ 14.913726] libphy: stmmac: probed
[ 15.838616] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[ 15.838978] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[ 15.838993] cfg80211: failed to load regulatory.db
[ 15.971608] brcmfmac: brcmf_fw_map_chip_to_name: using brcm/brcmfmac43430a0-sdio.bin for chip 0x00a9a6(43430) rev 0x000000
[ 15.972039] usbcore: registered new interface driver brcmfmac
[ 15.972147] brcmfmac mmc1:0001:1: Direct firmware load for brcm/brcmfmac43430a0-sdio.bin failed with error -2
[ 16.983325] brcmfmac: brcmf_sdio_htclk: HT Avail timeout (1000000): clkctl 0x50
[ 17.642892] EXT4-fs (mmcblk0p1): re-mounted. Opts: (null)
[ 17.993291] brcmfmac: brcmf_sdio_htclk: HT Avail timeout (1000000): clkctl 0x50
[ 25.292693] RTL8211E Gigabit Ethernet stmmac-0:01: attached PHY driver [RTL8211E Gigabit Ethernet] (mii_bus:phy_addr=stmmac-0:01, irq=POLL)
[ 25.297646] dwmac-sun8i 1c30000.ethernet eth0: No MAC Management Counters available
[ 25.297669] dwmac-sun8i 1c30000.ethernet eth0: PTP not supported by HW
[ 30.503958] dwmac-sun8i 1c30000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off
[ 39.675382] random: crng init done
^ permalink raw reply
* v4.15: camera problems on n900
From: Pavel Machek @ 2017-12-28 20:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171227211718.favif66afztygfje@kekkonen.localdomain>
On Wed 2017-12-27 23:17:19, Sakari Ailus wrote:
> On Wed, Dec 27, 2017 at 10:05:43PM +0100, Pavel Machek wrote:
> > Hi!
> >
> > In v4.14, back camera on N900 works. On v4.15-rc1.. it works for few
> > seconds, but then I get repeated oopses.
> >
> > On v4.15-rc0.5 (commit ed30b147e1f6e396e70a52dbb6c7d66befedd786),
> > camera does not start.
> >
> > Any ideas what might be wrong there?
>
> What kind of oopses do you get?
Hmm. bisect pointed to commit that can't be responsible.... Ideas
welcome.
Pavel
# bad: [fb3f95c11904adf26c2bd86fe1b1613c921710b5] Config for v4.15-rc0.5
# good: [c213cf57c2f15ee226c14dd7157caa334c3ef7c8] Make config similar to n950 case. Still works on n900.
git bisect start 'mini-v4.15' 'mini-v4.14'
# good: [06410bdec961a55e78e01d4fda199f709a84e17f] Merge /data/l/clean-cg into mini-v4.14
git bisect good 06410bdec961a55e78e01d4fda199f709a84e17f
# bad: [fc35c1966e1372a21a88f6655279361e2f92713f] Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
git bisect bad fc35c1966e1372a21a88f6655279361e2f92713f
# good: [bebc6082da0a9f5d47a1ea2edc099bf671058bd4] Linux 4.14
git bisect good bebc6082da0a9f5d47a1ea2edc099bf671058bd4
# good: [5bbcc0f595fadb4cac0eddc4401035ec0bd95b09] Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
git bisect good 5bbcc0f595fadb4cac0eddc4401035ec0bd95b09
# bad: [5b0e2cb020085efe202123162502e0b551e49a0e] Merge tag 'powerpc-4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
git bisect bad 5b0e2cb020085efe202123162502e0b551e49a0e
# good: [f150891fd9878ef0d9197c4e8451ce67c3bdd014] Merge tag 'exynos-drm-next-for-v4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
git bisect good f150891fd9878ef0d9197c4e8451ce67c3bdd014
# good: [93ea0eb7d77afab34657715630d692a78b8cea6a] Merge tag 'leaks-4.15-rc1' of git://github.com/tcharding/linux
git bisect good 93ea0eb7d77afab34657715630d692a78b8cea6a
# bad: [2bf16b7a73caf3435f782e4170cfe563675e10f9] Merge tag 'char-misc-4.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
git bisect bad 2bf16b7a73caf3435f782e4170cfe563675e10f9
# good: [ef674997e49760137ca9a90aac41a9922ac399b2] media: staging: atomisp: Convert timers to use timer_setup()
git bisect good ef674997e49760137ca9a90aac41a9922ac399b2
# good: [b1cb7372fa822af6c06c8045963571d13ad6348b] dvb_frontend: don't use-after-free the frontend struct
git bisect good b1cb7372fa822af6c06c8045963571d13ad6348b
# good: [c9fe0f8fa4136c2451dcc012e48fbf4470d6b592] hyper-v: trace vmbus_on_msg_dpc()
git bisect good c9fe0f8fa4136c2451dcc012e48fbf4470d6b592
# good: [e20d2b291ba2f5441fd4aacd746c21e60d48b559] nvmem: imx-ocotp: Pass parameters via a struct
git bisect good e20d2b291ba2f5441fd4aacd746c21e60d48b559
# good: [0ff26c662d5f3b26674d5205c8899d901f766acb] driver core: Fix device link deferred probe
git bisect good 0ff26c662d5f3b26674d5205c8899d901f766acb
# good: [d4035a8c1ff7288af9e47d6d05384f14c9308ea1] MAINTAINERS: Update VME subsystem tree.
git bisect good d4035a8c1ff7288af9e47d6d05384f14c9308ea1
# bad: [e60e1ee60630cafef5e430c2ae364877e061d980] Merge tag 'drm-for-v4.15' of git://people.freedesktop.org/~airlied/linux
git bisect bad e60e1ee60630cafef5e430c2ae364877e061d980
# bad: [5d352e69c60e54b5f04d6e337a1d2bf0dbf3d94a] Merge tag 'media/v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
git bisect bad 5d352e69c60e54b5f04d6e337a1d2bf0dbf3d94a
# good: [f2ecc3d0787e05d9145722feed01d4a11ab6bec1] Merge tag 'staging-4.15-rc1' into v4l_for_linus
git bisect good f2ecc3d0787e05d9145722feed01d4a11ab6bec1
# first bad commit: [5d352e69c60e54b5f04d6e337a1d2bf0dbf3d94a] Merge tag 'media/v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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^ permalink raw reply
* [PATCH 0/4] Sunxi: Add SMP support on A83T
From: Corentin Labbe @ 2017-12-28 20:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171227160729.4509bec5@dell-desktop.home>
On Wed, Dec 27, 2017 at 04:07:29PM +0100, Mylene JOSSERAND wrote:
> Hello Corentin,
>
> Le Fri, 15 Dec 2017 07:10:46 +0100,
> Corentin Labbe <clabbe.montjoie@gmail.com> a ?crit :
> > On Tue, Dec 12, 2017 at 09:24:25AM +0100, Maxime Ripard wrote:
> > > Hi,
> > >
> > > On Mon, Dec 11, 2017 at 08:35:34PM +0100, Corentin Labbe wrote:
> > > > On Mon, Dec 11, 2017 at 08:49:57AM +0100, Myl?ne Josserand wrote:
> > > > > This series adds SMP support for Allwinner Sun8i-a83t
> > > > > with MCPM (Multi-Cluster Power Management).
> > > > > Series information:
> > > > > - Based on last linux-next (next-20171211)
> > > > > - Had dependencies on Chen Yu's patch that add MCPM
> > > > > support:
> > > > > https://patchwork.kernel.org/patch/6402801/
> > > > >
> > > > > Patch 01: Convert the mcpm driver (initially for A80) to be able
> > > > > to use it for A83T. This SoC has a bit flip that needs to be handled.
> > > > > Patch 02: Add registers nodes (prcm, cpucfg and r_cpucfg) needed
> > > > > for MCPM.
> > > > > Patch 03: Add CCI-400 node for a83t.
> > > > > Patch 04: Fix the use of virtual timers that hangs the kernel in
> > > > > case of SMP support.
> > > >
> > > > As we discussed in private, Chen Yu's patch should be added in your series.
> > >
> > > Not really, she mentionned the dependency in the cover letter, and
> > > it's a good way to do things too. Sure, you can do it your way, but
> > > there's no preference.
> > >
> >
> > If the goal of this series is to be applied, the dependency must be applied also.
> > And since the dependency is 2 years old (and part of a serie which does not apply now), I think cherry picking the patch and send it for review is better.
> >
> > > > Furthermore, MCPM is not automaticaly selected via imply.
> > >
> > > Well, yes, is that an issue?
> > >
> >
> > After reading the imply documentation, no.
> >
> > > > With all patchs I hit a bug:
> > > > [ 0.898668] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:238
> > >
> > > I guess this is with CONFIG_PROVE_LOCKING enabled?
> > >
> >
> > No, the BUG() printed is enabled by default
> >
> > > > [ 0.911162] in_atomic(): 1, irqs_disabled(): 0, pid: 1, name: swapper/0
> > > > [ 0.917776] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.15.0-rc2-next-20171211+ #73
> > >
> > > What are the changes you've made?
> > >
> >
> > Just adding wens's patch and this series.
>
> I tried to reproduce your issue without success (even with
> CONFIG_PROVE_LOCKING enabled, just in case).
> Can you give me more details about your tests? which defconfig and
> additional configurations?
>
> >
> > > > [ 0.925418] Hardware name: Allwinner sun8i Family
> > > > [ 0.930118] Backtrace:
> > > > [ 0.932596] [<c010cc50>] (dump_backtrace) from [<c010cf0c>] (show_stack+0x18/0x1c)
> > > > [ 0.940158] r7:c0b261e4 r6:60000013 r5:00000000 r4:c0b51958
> > > > [ 0.945820] [<c010cef4>] (show_stack) from [<c06baccc>] (dump_stack+0x8c/0xa0)
> > > > [ 0.953045] [<c06bac40>] (dump_stack) from [<c0149d40>] (___might_sleep+0x150/0x170)
> > > > [ 0.960779] r7:c0b261e4 r6:00000000 r5:000000ee r4:ee844000
> > > > [ 0.966437] [<c0149bf0>] (___might_sleep) from [<c0149dc8>] (__might_sleep+0x68/0xa0)
> > > > [ 0.974253] r4:c0861690
> > > > [ 0.976796] [<c0149d60>] (__might_sleep) from [<c06d2918>] (mutex_lock+0x24/0x68)
> > > > [ 0.984269] r6:c0892f6c r5:ffffffff r4:c0b1bb24
> > > > [ 0.988891] [<c06d28f4>] (mutex_lock) from [<c01ccb6c>] (perf_pmu_register+0x24/0x3e4)
> > > > [ 0.996795] r5:ffffffff r4:ee98b014
> > > > [ 1.000375] [<c01ccb48>] (perf_pmu_register) from [<c03efabc>] (cci_pmu_probe+0x340/0x484)
> > > > [ 1.008631] r10:c0892f6c r9:c0bfd5f0 r8:eea19010 r7:c0b261e4 r6:c0b26240 r5:eea19000
> > > > [ 1.016447] r4:ee98b010
> > > > [ 1.018989] [<c03ef77c>] (cci_pmu_probe) from [<c045e21c>] (platform_drv_probe+0x58/0xb8)
> > > > [ 1.027158] r10:00000000 r9:c0b2610c r8:00000000 r7:fffffdfb r6:c0b2610c r5:ffffffed
> > > > [ 1.034974] r4:eea19010
> > > > [ 1.037511] [<c045e1c4>] (platform_drv_probe) from [<c045c984>] (driver_probe_device+0x254/0x330)
> > > > [ 1.046371] r7:00000000 r6:c0bff498 r5:c0bff494 r4:eea19010
> > > > [ 1.052026] [<c045c730>] (driver_probe_device) from [<c045cbc4>] (__device_attach_driver+0xa0/0xd4)
> > > > [ 1.061062] r10:00000000 r9:c0bff470 r8:00000000 r7:00000001 r6:eea19010 r5:ee845ac0
> > > > [ 1.068879] r4:c0b2610c r3:00000000
> > > > [ 1.072454] [<c045cb24>] (__device_attach_driver) from [<c045ad68>] (bus_for_each_drv+0x68/0x9c)
> > > > [ 1.081228] r7:00000001 r6:c045cb24 r5:ee845ac0 r4:00000000
> > > > [ 1.086883] [<c045ad00>] (bus_for_each_drv) from [<c045c60c>] (__device_attach+0xb8/0x11c)
> > > > [ 1.095135] r6:c0b3e848 r5:eea19044 r4:eea19010
> > > > [ 1.099750] [<c045c554>] (__device_attach) from [<c045cc44>] (device_initial_probe+0x14/0x18)
> > > > [ 1.108263] r7:c0b0a4c8 r6:c0b3e848 r5:eea19010 r4:eea19018
> > > > [ 1.113919] [<c045cc30>] (device_initial_probe) from [<c045bb58>] (bus_probe_device+0x8c/0x94)
> > > > [ 1.122523] [<c045bacc>] (bus_probe_device) from [<c0459db8>] (device_add+0x40c/0x5a0)
> > > > [ 1.130429] r7:c0b0a4c8 r6:eea19010 r5:eea18a10 r4:eea19018
> > > > [ 1.136089] [<c04599ac>] (device_add) from [<c0582a58>] (of_device_add+0x3c/0x44)
> > > > [ 1.143564] r10:00000000 r9:00000000 r8:00000000 r7:eedf21a4 r6:eea18a10 r5:00000000
> > > > [ 1.151380] r4:eea19000
> > > > [ 1.153915] [<c0582a1c>] (of_device_add) from [<c0582f80>] (of_platform_device_create_pdata+0x7c/0xac)
> > > > [ 1.163210] [<c0582f04>] (of_platform_device_create_pdata) from [<c0583100>] (of_platform_bus_create+0xf4/0x1f0)
> > > > [ 1.173372] r9:00000000 r8:00000000 r7:00000001 r6:00000000 r5:eedf2154 r4:00000000
> > > > [ 1.181107] [<c058300c>] (of_platform_bus_create) from [<c0583374>] (of_platform_populate+0x74/0xd4)
> > > > [ 1.190229] r10:00000001 r9:eea18a10 r8:00000000 r7:00000000 r6:00000000 r5:eedf1d04
> > > > [ 1.198045] r4:eedf2154
> > > > [ 1.200580] [<c0583300>] (of_platform_populate) from [<c03ef2a8>] (cci_platform_probe+0x3c/0x54)
> > > > [ 1.209356] r10:00000000 r9:c0b26168 r8:00000000 r7:fffffdfb r6:c0b26168 r5:ffffffed
> > > > [ 1.217172] r4:eea18a00
> > > > [ 1.219708] [<c03ef26c>] (cci_platform_probe) from [<c045e21c>] (platform_drv_probe+0x58/0xb8)
> > > > [ 1.228306] r5:ffffffed r4:eea18a10
> > > > [ 1.231881] [<c045e1c4>] (platform_drv_probe) from [<c045c984>] (driver_probe_device+0x254/0x330)
> > > > [ 1.240742] r7:00000000 r6:c0bff498 r5:c0bff494 r4:eea18a10
> > > > [ 1.246397] [<c045c730>] (driver_probe_device) from [<c045cbc4>] (__device_attach_driver+0xa0/0xd4)
> > > > [ 1.255433] r10:00000000 r9:c0bff470 r8:00000000 r7:00000001 r6:eea18a10 r5:ee845ce8
> > > > [ 1.263250] r4:c0b26168 r3:00000000
> > > > [ 1.266825] [<c045cb24>] (__device_attach_driver) from [<c045ad68>] (bus_for_each_drv+0x68/0x9c)
> > > > [ 1.275598] r7:00000001 r6:c045cb24 r5:ee845ce8 r4:00000000
> > > > [ 1.281253] [<c045ad00>] (bus_for_each_drv) from [<c045c60c>] (__device_attach+0xb8/0x11c)
> > > > [ 1.289506] r6:c0b3e848 r5:eea18a44 r4:eea18a10
> > > > [ 1.294120] [<c045c554>] (__device_attach) from [<c045cc44>] (device_initial_probe+0x14/0x18)
> > > > [ 1.302633] r7:c0b0a4c8 r6:c0b3e848 r5:eea18a10 r4:eea18a18
> > > > [ 1.308288] [<c045cc30>] (device_initial_probe) from [<c045bb58>] (bus_probe_device+0x8c/0x94)
> > > > [ 1.316890] [<c045bacc>] (bus_probe_device) from [<c0459db8>] (device_add+0x40c/0x5a0)
> > > > [ 1.324796] r7:c0b0a4c8 r6:eea18a10 r5:ee993810 r4:eea18a18
> > > > [ 1.330450] [<c04599ac>] (device_add) from [<c0582a58>] (of_device_add+0x3c/0x44)
> > > > [ 1.337926] r10:00000000 r9:c07759d8 r8:00000000 r7:eedf1d54 r6:ee993810 r5:00000000
> > > > [ 1.345743] r4:eea18a00
> > > > [ 1.348277] [<c0582a1c>] (of_device_add) from [<c0582f80>] (of_platform_device_create_pdata+0x7c/0xac)
> > > > [ 1.357572] [<c0582f04>] (of_platform_device_create_pdata) from [<c0583100>] (of_platform_bus_create+0xf4/0x1f0)
> > > > [ 1.367734] r9:c07759d8 r8:00000000 r7:00000001 r6:00000000 r5:eedf1d04 r4:00000000
> > > > [ 1.375469] [<c058300c>] (of_platform_bus_create) from [<c058315c>] (of_platform_bus_create+0x150/0x1f0)
> > > > [ 1.384938] r10:ee993810 r9:c07759d8 r8:00000000 r7:00000001 r6:00000000 r5:eedefe1c
> > > > [ 1.392754] r4:eedf1d04
> > > > [ 1.395289] [<c058300c>] (of_platform_bus_create) from [<c0583374>] (of_platform_populate+0x74/0xd4)
> > > > [ 1.404411] r10:00000001 r9:00000000 r8:00000000 r7:c07759d8 r6:00000000 r5:eedee844
> > > > [ 1.412228] r4:eedefe1c
> > > > [ 1.414769] [<c0583300>] (of_platform_populate) from [<c0a25ee8>] (of_platform_default_populate_init+0x80/0x94)
> > > > [ 1.424844] r10:c0a37848 r9:00000000 r8:c0b59680 r7:c0a37834 r6:ffffe000 r5:c0775ce8
> > > > [ 1.432661] r4:00000000
> > > > [ 1.435200] [<c0a25e68>] (of_platform_default_populate_init) from [<c0102794>] (do_one_initcall+0x5c/0x194)
> > > > [ 1.444925] r5:c0a25e68 r4:c0b0a4c8
> > > > [ 1.448506] [<c0102738>] (do_one_initcall) from [<c0a00f88>] (kernel_init_freeable+0x1d4/0x268)
> > > > [ 1.457195] r9:00000004 r8:c0b59680 r7:c0a37834 r6:c0b59680 r5:c0a47308 r4:c090cfb8
> > > > [ 1.464932] [<c0a00db4>] (kernel_init_freeable) from [<c06cf3b0>] (kernel_init+0x10/0x118)
> > > > [ 1.473187] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c06cf3a0
> > > > [ 1.481004] r4:00000000
> > > > [ 1.483540] [<c06cf3a0>] (kernel_init) from [<c01010e8>] (ret_from_fork+0x14/0x2c)
> > > > [ 1.491098] Exception stack(0xee845fb0 to 0xee845ff8)
> > > > [ 1.496146] 5fa0: 00000000 00000000 00000000 00000000
> > > > [ 1.504313] 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
> > > > [ 1.512480] 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000
> > > > [ 1.519084] r5:c06cf3a0 r4:00000000
> > > > [ 1.522737] ARM CCI_400_r1 PMU driver probed
> > > >
> > > > And only CPU 0 show up.
> > >
> > > This looks more like a bug in the CCI code, and not in this serie
> > > itself. Can you share your whole boot logs?
> > >
> >
> > This week end I will retry and send it.
>
> By any chance, did you try it again? Can you reproduce it on your side?
>
Hello
With the .config that you give me in private, everything seems to work.
But with mine, the stacktrace still happen.
After some research, this is due to the following code:
cpumask_set_cpu(get_cpu(), &cci_pmu->cpus);
which disable preemption (via get_cpu())
So it is unrelated with your patch, I will send a bug report tomorow.
Furthermore, you can add:
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Thanks
Regards
^ permalink raw reply
* [PATCH v2] arm64: dts: Hi3660: Fix up psci state id
From: Wei Xu @ 2017-12-28 21:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5A3CD23C.3080307@hisilicon.com>
Hi Leo,
On 2017/12/22 9:37, Wei Xu wrote:
> Hi Leo,
>
> On 2017/12/12 9:12, Leo Yan wrote:
>> Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP'
>> idle state. From ftrace log we can observe CA73 CPUs can be easily
>> waken up from 'CPU_NAP' state but the 'waken up' CPUs doesn't handle
>> anything and sleep again; so there have tons of trace events for CA73
>> CPUs entering and exiting idle state.
>>
>> On Hi3660 CA73 has retention state 'CPU_NAP' for CPU idle, this state we
>> set its psci parameter as '0x0000001' and from this parameter it can
>> calculate state id is 1. Unfortunately ARM trusted firmware (ARM-TF)
>> takes 1 as a invalid value for state id, so the CPU cannot enter idle
>> state and directly bail out to kernel.
>>
>> We want to create good practice for psci parameters platform definition,
>> so review the psci specification. The spec "ARM Power State Coordination
>> Interface - Platform Design Document (ARM DEN 0022D)" recommends state
>> ID in chapter "6.5 Recommended StateID Encoding". The recommended power
>> state IDs can be presented by below listed values; and it divides into
>> three fields, every field can use 4 bits to present power states
>> corresponding to core level, cluster level and system level:
>> 0: Run
>> 1: Standby
>> 2: Retention
>> 3: Powerdown
>>
>> This commit changes psci parameter to compliance with the suggested
>> state ID in the doc. Except we change 'CPU_NAP' state psci parameter
>> to '0x0000002', this commit also changes 'CPU_SLEEP' and 'CLUSTER_SLEEP'
>> state parameters to '0x0010003' and '0x1010033' respectively.
>>
>> Credits to Daniel, Sudeep and Soby for suggestion and consolidation.
>>
>> Cc: Vincent Guittot <vincent.guittot@linaro.org>
>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
>> Cc: Sudeep Holla <sudeep.holla@arm.com>
>> Cc: Soby Mathew <Soby.Mathew@arm.com>
>> Signed-off-by: Leo Yan <leo.yan@linaro.org>
>> ---
>
> Applied into hisilicon dt tree.
> Thanks!
Sorry, since this patch is still under discussion,
I will drop it firstly.
Thanks!
Best Regards,
Wei
>
> Best Regards,
> Wei
>
>> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++----
>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> index ab0b95b..99d5a46 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> @@ -147,7 +147,7 @@
>>
>> CPU_NAP: cpu-nap {
>> compatible = "arm,idle-state";
>> - arm,psci-suspend-param = <0x0000001>;
>> + arm,psci-suspend-param = <0x0000002>;
>> entry-latency-us = <7>;
>> exit-latency-us = <2>;
>> min-residency-us = <15>;
>> @@ -156,7 +156,7 @@
>> CPU_SLEEP: cpu-sleep {
>> compatible = "arm,idle-state";
>> local-timer-stop;
>> - arm,psci-suspend-param = <0x0010000>;
>> + arm,psci-suspend-param = <0x0010003>;
>> entry-latency-us = <40>;
>> exit-latency-us = <70>;
>> min-residency-us = <3000>;
>> @@ -165,7 +165,7 @@
>> CLUSTER_SLEEP_0: cluster-sleep-0 {
>> compatible = "arm,idle-state";
>> local-timer-stop;
>> - arm,psci-suspend-param = <0x1010000>;
>> + arm,psci-suspend-param = <0x1010033>;
>> entry-latency-us = <500>;
>> exit-latency-us = <5000>;
>> min-residency-us = <20000>;
>> @@ -174,7 +174,7 @@
>> CLUSTER_SLEEP_1: cluster-sleep-1 {
>> compatible = "arm,idle-state";
>> local-timer-stop;
>> - arm,psci-suspend-param = <0x1010000>;
>> + arm,psci-suspend-param = <0x1010033>;
>> entry-latency-us = <1000>;
>> exit-latency-us = <5000>;
>> min-residency-us = <20000>;
>>
^ permalink raw reply
* [GIT PULL] arm64: dts: hisilicon dts updates for v4.16
From: Wei Xu @ 2017-12-28 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5A3CD3EE.7030505@hisilicon.com>
Hi Arnd, Hi Olof, Hi Kevin,
On 2017/12/22 9:44, Wei Xu wrote:
> Hi Arnd, Hi Olof, Hi Kevin,
>
> Please help to pull the following changes.
> Thanks!
Sorry!
Please ignore this pull because the PSCI patch is still under discussion.
I will drop that patch and send v2.
Thanks!
Best Regards,
Wei
>
> Best Regards,
> Wei
>
> ---
>
> The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
>
> Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
>
> are available in the git repository at:
>
> git://github.com/hisilicon/linux-hisi.git tags/hisi-arm64-dt-for-4.16
>
> for you to fetch changes up to 2b49083a2d93b1adb755f057ed569d1ae6a934c7:
>
> arm64: dts: Hi3660: Fix up psci state id (2017-12-22 09:11:43 +0000)
>
> ----------------------------------------------------------------
> ARM64: DT: Hisilicon SoC DT updates for 4.15
>
> - Add SD card support for hi3798cv200-poplar board
> - Replace the PMU node with exact match on hi3660 SoC
> - Add cpu capacity-dmips-mhz information on hi3660 SoC
> - Fix up the PSCI state ID on hi3660 SoC
>
> ----------------------------------------------------------------
> Leo Yan (1):
> arm64: dts: Hi3660: Fix up psci state id
>
> Shawn Guo (1):
> arm64: dts: hi3798cv200: add SD card support
>
> Valentin Schneider (1):
> arm64: dts: hisilicon: Add hi3660 cpu capacity-dmips-mhz information
>
> Xu YiPing (1):
> arm64: dts: hi3660: improve pmu description
>
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 38 ++++++++++++++--------
> .../boot/dts/hisilicon/hi3798cv200-poplar.dts | 6 ++++
> arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 12 +++++++
> 3 files changed, 43 insertions(+), 13 deletions(-)
>
^ permalink raw reply
* [GIT PULL v2] arm64: dts: hisilicon dts updates for v4.16
From: Wei Xu @ 2017-12-28 21:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5A3CD3EE.7030505@hisilicon.com>
Hi Arnd, Hi Olof, Hi Kevin,
Please help to pull the following changes.
Thanks!
Best Regards,
Wei
---
The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
are available in the git repository at:
git://github.com/hisilicon/linux-hisi.git tags/hisi-arm64-dt-for-4.16-v2
for you to fetch changes up to 9a9760dede5c71e04b17b2ede594ee7148fd36e2:
arm64: dts: hisilicon: Add hi3660 cpu capacity-dmips-mhz information (2017-12-22 09:11:42 +0000)
----------------------------------------------------------------
ARM64: DT: Hisilicon SoC DT updates for 4.16
- Add SD card support for the hi3798cv200-poplar board
- Replace the PMU node with exact match for the hi3660 SoC
- Add cpu capacity-dmips-mhz information for the hi3660 SoC
----------------------------------------------------------------
Shawn Guo (1):
arm64: dts: hi3798cv200: add SD card support
Valentin Schneider (1):
arm64: dts: hisilicon: Add hi3660 cpu capacity-dmips-mhz information
Xu YiPing (1):
arm64: dts: hi3660: improve pmu description
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 30 +++++++++++++++-------
.../boot/dts/hisilicon/hi3798cv200-poplar.dts | 6 +++++
arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 12 +++++++++
3 files changed, 39 insertions(+), 9 deletions(-)
^ permalink raw reply
* [PATCH v1 1/4] clk: iproc: Allow iproc pll to runtime calculate vco parameters
From: Stephen Boyd @ 2017-12-28 22:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1502737241-2040-2-git-send-email-lori.hikichi@broadcom.com>
On 08/14, Lori Hikichi wrote:
> Add the ability for the iproc pll to calculate the pll parameters at
> runtime instead of only using predefined tables. This ability allows
> the clock users to select from the full range of vco frequencies.
> The old method of table based programming is retained so that existing
> users will retain expected behavior. The flag IPROC_CLK_PLL_CALC_PARAM
> will need to be set to enable the new runtime calculation method.
> Currently, this is only being enabled for the audio pll.
>
> This feature also revealed a problem with the driver using the
> round_rate api. The round_rate api does not allow for frequencies larger
> than 2^31 to be returned. Those large frequencies are interpreted as an
> error code. Therefore, we are moving to the determine_rate api which
> solves this problem.
>
> Signed-off-by: Simran Rai <ssimran@broadcom.com>
> Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v1 2/4] clk: iproc: Fix error in the pll post divider rate calculation
From: Stephen Boyd @ 2017-12-28 22:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1502737241-2040-3-git-send-email-lori.hikichi@broadcom.com>
On 08/14, Lori Hikichi wrote:
> The pll post divider code was using DIV_ROUND_UP when determining the
> divider value best suited to produce the target frequency.
> Using DIV_ROUND_CLOSEST will give us better divider values when
> the division results in a small remainder.
> Also, change the post divider clock over to the determine_rate api
> instead of round_rate.
>
> Signed-off-by: Simran Rai <ssimran@broadcom.com>
> Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v1 3/4] clk: iproc: Allow plls to do minor rate changes without reset
From: Stephen Boyd @ 2017-12-28 22:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1502737241-2040-4-git-send-email-lori.hikichi@broadcom.com>
On 08/14, Lori Hikichi wrote:
> From: Lori Hikichi <lhikichi@broadcom.com>
>
> The iproc plls are capable of doing small rate changes without the
> need for a full reset and re-lock procedure. This feature will
> allow for small tweaks to the PLL rate to occur smoothly.
>
> Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v1 4/4] clk: iproc: Minor tidy up of iproc pll data structures
From: Stephen Boyd @ 2017-12-28 22:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1502737241-2040-5-git-send-email-lori.hikichi@broadcom.com>
On 08/14, Lori Hikichi wrote:
> From: Lori Hikichi <lhikichi@broadcom.com>
>
> There were a few fields in the iproc pll data structures that were
> holding information that was not true state information.
> Using stack variables is sufficient and simplifies the structure.
> There are not any functional changes in this commit.
>
> Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v2] arm64: dts: Hi3660: Fix up psci state id
From: Leo Yan @ 2017-12-28 23:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5A455E9B.9010703@hisilicon.com>
On Thu, Dec 28, 2017 at 09:14:03PM +0000, Wei Xu wrote:
> Hi Leo,
[...]
> Sorry, since this patch is still under discussion,
> I will drop it firstly.
> Thanks!
Thanks, Wei.
> Best Regards,
> Wei
^ permalink raw reply
* [PATCH] clk: divider: fix incorrect usage of container_of
From: Stephen Boyd @ 2017-12-28 23:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171221163054.13600-1-jbrunet@baylibre.com>
On 12/21, Jerome Brunet wrote:
> divider_recalc_rate() is an helper function used by clock divider of
> different types, so the structure containing the 'hw' pointer is not
> always a 'struct clk_divider'
>
> At the following line:
> > div = _get_div(table, val, flags, divider->width);
>
> in several cases, the value of 'divider->width' is garbage as the actual
> structure behind this memory is not a 'struct clk_divider'
>
> Fortunately, this width value is used by _get_val() only when
> CLK_DIVIDER_MAX_AT_ZERO flag is set. This has never been the case so
> far when the structure is not a 'struct clk_divider'. This is probably
> why we did not notice this bug before
>
> Fixes: afe76c8fd030 ("clk: allow a clk divider with max divisor when zero")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v6 5/8] kernel: tracepoints: add support for relative references
From: Ard Biesheuvel @ 2017-12-28 23:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171228104207.117ee0ff@gandalf.local.home>
On 28 December 2017 at 15:42, Steven Rostedt <rostedt@goodmis.org> wrote:
> On Wed, 27 Dec 2017 08:50:30 +0000
> Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
>
>> To avoid the need for relocating absolute references to tracepoint
>> structures at boot time when running relocatable kernels (which may
>> take a disproportionate amount of space), add the option to emit
>> these tables as relative references instead.
>>
>
> I gave this patch a quick skim over. It appears to not modify anything
> when CONFIG_HAVE_PREL32_RELOCATIONS is not defined. I haven't
> thoroughly reviewed it or tested it. But if it doesn't break anything,
> I'm fine giving you an ack.
>
> Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
>
Thank you Steven.
I should mention though (as you don't appear to recall) that an
earlier version of this patch triggered an issue for you
https://marc.info/?l=linux-arch&m=150584374820168&w=2
but I have never managed to reproduce it, neither at the time nor
currently with this v6.
ard at bezzzef:~/linux-2.6$ sudo tools/testing/selftests/ftrace/ftracetest
=== Ftrace unit tests ===
[1] Basic trace file check [PASS]
[2] Basic test for tracers [PASS]
[3] Basic trace clock test [PASS]
[4] Basic event tracing check [PASS]
[5] event tracing - enable/disable with event level files [PASS]
[6] event tracing - restricts events based on pid [PASS]
[7] event tracing - enable/disable with subsystem level files [PASS]
[8] event tracing - enable/disable with top level files [PASS]
[9] ftrace - function graph filters with stack tracer [PASS]
[10] ftrace - function graph filters [PASS]
[11] ftrace - test for function event triggers [PASS]
[12] ftrace - function glob filters [PASS]
[13] ftrace - function pid filters [PASS]
[14] ftrace - function profiler with function tracing [PASS]
[15] ftrace - test reading of set_ftrace_filter [PASS]
[16] ftrace - test for function traceon/off triggers [PASS]
[17] Test creation and deletion of trace instances while setting an event [PASS]
[18] Test creation and deletion of trace instances [PASS]
[19] Kprobe dynamic event - adding and removing [PASS]
[20] Kprobe dynamic event - busy event check [PASS]
[21] Kprobe dynamic event with arguments [PASS]
[22] Kprobes event arguments with types [PASS]
[23] Kprobe event auto/manual naming [PASS]
[24] Kprobe dynamic event with function tracer [PASS]
[25] Kprobe dynamic event - probing module [PASS]
[26] Kretprobe dynamic event with arguments [PASS]
[27] Kretprobe dynamic event with maxactive [PASS]
[28] Register/unregister many kprobe events [PASS]
[29] event trigger - test event enable/disable trigger [PASS]
[30] event trigger - test trigger filter [PASS]
[31] event trigger - test histogram modifiers [PASS]
[32] event trigger - test histogram trigger [PASS]
[33] event trigger - test multiple histogram triggers [PASS]
[34] event trigger - test snapshot-trigger [PASS]
[35] event trigger - test stacktrace-trigger [PASS]
[36] event trigger - test traceon/off trigger [PASS]
[37] (instance) Basic test for tracers [PASS]
[38] (instance) Basic trace clock test [PASS]
[39] (instance) event tracing - enable/disable with event level files [PASS]
[40] (instance) event tracing - restricts events based on pid [PASS]
[41] (instance) event tracing - enable/disable with subsystem level
files [PASS]
[42] (instance) ftrace - test for function event triggers [PASS]
[43] (instance) ftrace - test for function traceon/off triggers [PASS]
[44] (instance) event trigger - test event enable/disable trigger [PASS]
[45] (instance) event trigger - test trigger filter [PASS]
[46] (instance) event trigger - test histogram modifiers [PASS]
[47] (instance) event trigger - test histogram trigger [PASS]
[48] (instance) event trigger - test multiple histogram triggers [PASS]
# of passed: 48
# of failed: 0
# of unresolved: 0
# of untested: 0
# of unsupported: 0
# of xfailed: 0
# of undefined(test bug): 0
^ permalink raw reply
* [PATCH 1/2] clk: rename clk_core_get_boundaries() to clk_hw_get_boundaries() and expose
From: Stephen Boyd @ 2017-12-29 0:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4B1BB338-F1F9-4231-BDCA-5FBB1F61BC44@gmail.com>
On 12/28, Alexander Kochetkov wrote:
> Initial thread here:
> https://www.spinics.net/lists/linux-clk/msg21682.html
>
>
> > 27 ???. 2017 ?., ? 4:06, Stephen Boyd <sboyd@codeaurora.org> ???????(?):
> >
> > Are these limits the min/max limits that the parent clk can
> > output at? Or the min/max limits that software has constrained on
> > the clk?
> >
>
> Don?t know how to answer. For example, parent can output 768MHz,
> but some IP work unstable with that parent rate. This issues was observed by
> me and I didn?t get official confirmation from rockchip. So, I limit
> such clock to 192MHz using clk_set_max_rate(). May be I have to limit clk rate
> using another approach.
I'm asking if the rate is capped on the consumer side with
clk_set_max_rate() or if it's capped on the clk provider side to
express a hardware constraint.
>
> Anybody from rockchip can confirm that? Or may be contact me clarifying details?
>
> > I haven't looked in detail at this
> > rockchip_fractional_approximation() code, but it shouldn't be
> > doing the work of both the child rate determination and the
> > parent rate determination in one place. It should work with the
> > parent to figure out the rate the parent can provide and then
> > figure out how to achieve the desired rate from there.
>
> Here is clock tree:
>
> clock rate
> ----- ----
> xin24m 24000000
> pll_gpll 768000000
> gpll 768000000
> i2s_src 768000000
> i2s0_pre 192000000
> i2s0_frac 16384000
> sclk_i2s0 16384000
>
> I limit i2s0_pre rate to 192MHz in order to I2S IP work properly.
> rockchip_fractional_approximation() get called for i2s0_frac.
> if i2s0_pre rate is 20x times less than i2s0_frac, than rockchip_fractional_approximation()
> tries to set i2s0_pre rate to i2s_src rate. It tries to increase it?s parent rate in order
> to maximise relation between nominator and denominator.
>
> If I convert rockchip_fractional_approximation() to rockchip_determine_rate(), than I get
> min=0, max=192MHz limits inside rockchip_determine_rate(). May be there should be
> new logic inside clk framework based on some new clk flags, that will provide max=768MHz
> for rockchip_determine_rate().
>
> Also found, that rockchip_fractional_approximation() increase parents rate unconditionally
> without taking into account CLK_SET_RATE_PARENT flag.
>
> Stephen, thanks a lot for deep description of determine_rate() background. I?ll taking some
> time thinking about possible solutions.
>
Sounds like there are some things to be figured out here still. I
can take a closer look next week. Maybe Heiko will respond before
then.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 1/2] ARM: multi_v7_defconfig: select CONFIG_RTC_DRV_SNVS
From: Peng Fan @ 2017-12-29 0:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJKOXPcda4s-H=Ks5hby950Ecybj2yp_WQj4PNja2d_fn_eMrQ@mail.gmail.com>
On Thu, Dec 28, 2017 at 02:02:07PM +0100, Krzysztof Kozlowski wrote:
>On Thu, Dec 28, 2017 at 10:34 AM, Peng Fan <peng.fan@nxp.com> wrote:
>> Select CONFIG_RTC_DRV_SNVS for i.MX6 to use RTC to wakeup system
>> Patch generated with:
>> make ARCH=arm multi_v7_defconfig
>> select CONFIG_RTC_DRV_SNVS
>> make savedefconfig
>
>No. You are doing hundreds of changes just to enable one option. There
>is no way to review this...
>
>Instead if you need to cleanup the defconfig, first do this in
>separate step without any other changes.
>
>Then send a patch adding necessary options.
ok. I'll use make ARCH=arm multi_v7_defconfig; make savedefconfig first
to cleanup the defconfig. Then use a new patch to select the option.
Thanks,
Peng.
>
>Best regards,
>Krzysztof
--
^ permalink raw reply
* [PATCH 2/2] ARM: multi_v7_defconfig: Enable OP-TEE
From: Peng Fan @ 2017-12-29 0:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJKOXPc6mkUqyNK+qZvF_2Z9XK1W7H3GZQTMD5YyNbSeZC8U=w@mail.gmail.com>
On Thu, Dec 28, 2017 at 02:03:01PM +0100, Krzysztof Kozlowski wrote:
>On Thu, Dec 28, 2017 at 10:34 AM, Peng Fan <peng.fan@nxp.com> wrote:
>> Enable OP-TEE for multi_v7_defconfig
>
>Why? You essentially copied here the subject of patch. That is not enough.
This patch could be dropped. Previously, I could not select OP-TEE in
imx_v6_v7_defconfig, seems things changed. I'll move this to imx_v6_v7_defconfig.
OP-TEE stands for Open Portable Trusted Execution Environment. With Linux
running in trustzone nonsecure world, OP-TEE runs in secure world,
with TEE/OP-TEE driver enabled, linux could use secure services provided
by OP-TEE. With TEE/OP-TEE options selected, we could use the following
node to let the driver probed.
"
firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
};
"
Thanks,
Peng.
>
>Best regards,
>Krzysztof
--
^ permalink raw reply
* [clk:clk-next 20/21] drivers/clk/sprd/div.c:42:9: error: too few arguments to function 'divider_recalc_rate'
From: kbuild test robot @ 2017-12-29 0:53 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
head: e717a189b1bc52a60f8c1177f277e4b6c2f0ae53
commit: 4508d70e6a5e9ad186dd4110e59f33d20483eb31 [20/21] Merge branch 'clk-divider-container' into clk-next
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 4508d70e6a5e9ad186dd4110e59f33d20483eb31
# save the attached .config to linux build tree
make.cross ARCH=arm64
All error/warnings (new ones prefixed by >>):
drivers/clk/sprd/div.c: In function 'sprd_div_helper_recalc_rate':
>> drivers/clk/sprd/div.c:42:9: error: too few arguments to function 'divider_recalc_rate'
return divider_recalc_rate(&common->hw, parent_rate, val, NULL, 0);
^~~~~~~~~~~~~~~~~~~
In file included from drivers/clk/sprd/div.c:8:0:
include/linux/clk-provider.h:413:15: note: declared here
unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
^~~~~~~~~~~~~~~~~~~
>> drivers/clk/sprd/div.c:43:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
vim +/divider_recalc_rate +42 drivers/clk/sprd/div.c
e3f05d3b Chunyan Zhang 2017-12-07 30
e3f05d3b Chunyan Zhang 2017-12-07 31 unsigned long sprd_div_helper_recalc_rate(struct sprd_clk_common *common,
e3f05d3b Chunyan Zhang 2017-12-07 32 const struct sprd_div_internal *div,
e3f05d3b Chunyan Zhang 2017-12-07 33 unsigned long parent_rate)
e3f05d3b Chunyan Zhang 2017-12-07 34 {
e3f05d3b Chunyan Zhang 2017-12-07 35 unsigned long val;
e3f05d3b Chunyan Zhang 2017-12-07 36 unsigned int reg;
e3f05d3b Chunyan Zhang 2017-12-07 37
e3f05d3b Chunyan Zhang 2017-12-07 38 regmap_read(common->regmap, common->reg, ®);
e3f05d3b Chunyan Zhang 2017-12-07 39 val = reg >> div->shift;
e3f05d3b Chunyan Zhang 2017-12-07 40 val &= (1 << div->width) - 1;
e3f05d3b Chunyan Zhang 2017-12-07 41
e3f05d3b Chunyan Zhang 2017-12-07 @42 return divider_recalc_rate(&common->hw, parent_rate, val, NULL, 0);
e3f05d3b Chunyan Zhang 2017-12-07 @43 }
e3f05d3b Chunyan Zhang 2017-12-07 44 EXPORT_SYMBOL_GPL(sprd_div_helper_recalc_rate);
e3f05d3b Chunyan Zhang 2017-12-07 45
:::::: The code at line 42 was first introduced by commit
:::::: e3f05d3b18e6cfbddaed687b4a57c280015acc1f clk: sprd: add divider clock support
:::::: TO: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
:::::: CC: Stephen Boyd <sboyd@codeaurora.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [rjarzmik:pxa/for-next 7/10] drivers/gpio/gpio-reg.c:106:21: error: 'struct gpio_reg' has no member named 'irq'; did you mean 'irqs'?
From: kbuild test robot @ 2017-12-29 5:04 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://github.com/rjarzmik/linux pxa/for-next
head: 8957e25fd563aca4a15383e9f3a1a679e03b76aa
commit: 9c66638412cd2162f02f9beb12f5495bfe650d03 [7/10] ARM: pxa/lubbock: add GPIO driver for LUB_MISC_WR register
config: arm-lubbock_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 9c66638412cd2162f02f9beb12f5495bfe650d03
# save the attached .config to linux build tree
make.cross ARCH=arm
All errors (new ones prefixed by >>):
drivers/gpio/gpio-reg.c: In function 'gpio_reg_to_irq':
>> drivers/gpio/gpio-reg.c:106:21: error: 'struct gpio_reg' has no member named 'irq'; did you mean 'irqs'?
if (irq >= 0 && r->irq.domain)
^~~
irqs
drivers/gpio/gpio-reg.c:107:29: error: 'struct gpio_reg' has no member named 'irq'; did you mean 'irqs'?
irq = irq_find_mapping(r->irq.domain, irq);
^~~
irqs
vim +106 drivers/gpio/gpio-reg.c
380639c7 Russell King 2016-08-31 100
0e3cb6ee Russell King 2016-09-02 101 static int gpio_reg_to_irq(struct gpio_chip *gc, unsigned offset)
0e3cb6ee Russell King 2016-09-02 102 {
0e3cb6ee Russell King 2016-09-02 103 struct gpio_reg *r = to_gpio_reg(gc);
0e3cb6ee Russell King 2016-09-02 104 int irq = r->irqs[offset];
0e3cb6ee Russell King 2016-09-02 105
f0fbe7bc Thierry Reding 2017-11-07 @106 if (irq >= 0 && r->irq.domain)
f0fbe7bc Thierry Reding 2017-11-07 107 irq = irq_find_mapping(r->irq.domain, irq);
0e3cb6ee Russell King 2016-09-02 108
0e3cb6ee Russell King 2016-09-02 109 return irq;
0e3cb6ee Russell King 2016-09-02 110 }
0e3cb6ee Russell King 2016-09-02 111
:::::: The code at line 106 was first introduced by commit
:::::: f0fbe7bce733561b76a5b55c5f4625888acd3792 gpio: Move irqdomain into struct gpio_irq_chip
:::::: TO: Thierry Reding <treding@nvidia.com>
:::::: CC: Linus Walleij <linus.walleij@linaro.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH v6 2/8] module: use relative references for __ksymtab entries
From: kbuild test robot @ 2017-12-29 6:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171227085033.22389-3-ard.biesheuvel@linaro.org>
Hi Ard,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.15-rc5 next-20171222]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Ard-Biesheuvel/add-support-for-relative-references-in-special-sections/20171228-171634
config: s390-gcov_defconfig (attached as .config)
compiler: s390x-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=s390
All errors (new ones prefixed by >>):
>> arch/s390/kernel/ebcdic.o:(.data+0x118): undefined reference to `__gcov_merge_add'
arch/s390/kernel/ebcdic.o: In function `_GLOBAL__sub_I_00100_0__ascebc':
>> ebcdic.c:(.text.startup+0xe): undefined reference to `__gcov_init'
arch/s390/kernel/ebcdic.o: In function `_GLOBAL__sub_D_00100_1__ascebc':
>> ebcdic.c:(.text.exit+0x8): undefined reference to `__gcov_exit'
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [clk:clk-next 170/171] ERROR: "clk_regmap_mux_div_ops" [drivers/clk/qcom/apcs-msm8916.ko] undefined!
From: kbuild test robot @ 2017-12-29 7:12 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
head: e717a189b1bc52a60f8c1177f277e4b6c2f0ae53
commit: 8a77f61118a2cb9bbe96d2a5cf912bce5bc03c13 [170/171] clk: qcom: Add APCS clock controller support
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.2.0-12) 7.2.1 20171025
reproduce:
git checkout 8a77f61118a2cb9bbe96d2a5cf912bce5bc03c13
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
WARNING: modpost: missing MODULE_LICENSE() in drivers/auxdisplay/img-ascii-lcd.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/clk/qcom/a53-pll.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/gpio/gpio-ath79.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/gpio/gpio-iop.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/iio/accel/kxsd9-i2c.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/iio/adc/qcom-vadc-common.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/media/platform/mtk-vcodec/mtk-vcodec-common.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/media/platform/soc_camera/soc_scale_crop.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/media/platform/tegra-cec/tegra_cec.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/mtd/nand/denali_pci.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/pinctrl/pxa/pinctrl-pxa2xx.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/power/reset/zx-reboot.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/staging/comedi/drivers/ni_atmio.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in net/9p/9pnet_xen.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in sound/soc/codecs/snd-soc-pcm512x-spi.o
see include/linux/module.h for more information
>> ERROR: "clk_regmap_mux_div_ops" [drivers/clk/qcom/apcs-msm8916.ko] undefined!
>> ERROR: "__mux_div_set_src_div" [drivers/clk/qcom/apcs-msm8916.ko] undefined!
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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* [PATCH v5 00/16] Rockchip ISP1 Driver
From: Shunqian Zheng @ 2017-12-29 7:52 UTC (permalink / raw)
To: linux-arm-kernel
changes in V5: Sync with local changes,
- fix the SP height limit
- speed up the second stream capture
- the second stream can't force sync for rsz when start/stop streaming
- add frame id to param vb2 buf
- enable luminance maximum threshold
changes in V4:
- fix some bugs during development
- move quantization settings to rkisp1 subdev
- correct some spelling problems
- describe ports in dt-binding documents
changes in V3:
- add some comments
- fix wrong use of v4l2_async_subdev_notifier_register
- optimize two paths capture at a time
- remove compose
- re-struct headers
- add a tmp wiki page: http://opensource.rock-chips.com/wiki_Rockchip-isp1
changes in V2:
mipi-phy:
- use async probing
- make it be a child device of the GRF
isp:
- add dummy buffer
- change the way to get bus configuration, which make it possible to
add parallel sensor support in the future(without mipi-phy driver).
This patch series add a ISP(Camera) v4l2 driver for rockchip rk3288/rk3399 SoC.
Wiki Pages:
http://opensource.rock-chips.com/wiki_Rockchip-isp1
Jacob Chen (12):
media: doc: add document for rkisp1 meta buffer format
media: rkisp1: add Rockchip MIPI Synopsys DPHY driver
media: rkisp1: add Rockchip ISP1 subdev driver
media: rkisp1: add ISP1 statistics driver
media: rkisp1: add ISP1 params driver
media: rkisp1: add capture device driver
media: rkisp1: add rockchip isp1 core driver
dt-bindings: Document the Rockchip ISP1 bindings
dt-bindings: Document the Rockchip MIPI RX D-PHY bindings
ARM: dts: rockchip: add isp node for rk3288
ARM: dts: rockchip: add rx0 mipi-phy for rk3288
MAINTAINERS: add entry for Rockchip ISP1 driver
Jeffy Chen (1):
media: rkisp1: Add user space ABI definitions
Shunqian Zheng (3):
media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
arm64: dts: rockchip: add isp0 node for rk3399
arm64: dts: rockchip: add rx0 mipi-phy for rk3399
.../devicetree/bindings/media/rockchip-isp1.txt | 69 +
.../bindings/media/rockchip-mipi-dphy.txt | 88 +
Documentation/media/uapi/v4l/meta-formats.rst | 2 +
.../media/uapi/v4l/pixfmt-meta-rkisp1-params.rst | 17 +
.../media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst | 18 +
MAINTAINERS | 10 +
arch/arm/boot/dts/rk3288.dtsi | 24 +
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 25 +
drivers/media/platform/Kconfig | 10 +
drivers/media/platform/Makefile | 1 +
drivers/media/platform/rockchip/isp1/Makefile | 8 +
drivers/media/platform/rockchip/isp1/capture.c | 1728 ++++++++++++++++++++
drivers/media/platform/rockchip/isp1/capture.h | 194 +++
drivers/media/platform/rockchip/isp1/common.h | 137 ++
drivers/media/platform/rockchip/isp1/dev.c | 653 ++++++++
drivers/media/platform/rockchip/isp1/dev.h | 120 ++
drivers/media/platform/rockchip/isp1/isp_params.c | 1553 ++++++++++++++++++
drivers/media/platform/rockchip/isp1/isp_params.h | 76 +
drivers/media/platform/rockchip/isp1/isp_stats.c | 522 ++++++
drivers/media/platform/rockchip/isp1/isp_stats.h | 85 +
.../media/platform/rockchip/isp1/mipi_dphy_sy.c | 787 +++++++++
drivers/media/platform/rockchip/isp1/regs.c | 266 +++
drivers/media/platform/rockchip/isp1/regs.h | 1577 ++++++++++++++++++
drivers/media/platform/rockchip/isp1/rkisp1.c | 1205 ++++++++++++++
drivers/media/platform/rockchip/isp1/rkisp1.h | 132 ++
drivers/media/v4l2-core/v4l2-ioctl.c | 2 +
include/uapi/linux/rkisp1-config.h | 757 +++++++++
include/uapi/linux/videodev2.h | 4 +
28 files changed, 10070 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/rockchip-isp1.txt
create mode 100644 Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst
create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst
create mode 100644 drivers/media/platform/rockchip/isp1/Makefile
create mode 100644 drivers/media/platform/rockchip/isp1/capture.c
create mode 100644 drivers/media/platform/rockchip/isp1/capture.h
create mode 100644 drivers/media/platform/rockchip/isp1/common.h
create mode 100644 drivers/media/platform/rockchip/isp1/dev.c
create mode 100644 drivers/media/platform/rockchip/isp1/dev.h
create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.c
create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.h
create mode 100644 drivers/media/platform/rockchip/isp1/isp_stats.c
create mode 100644 drivers/media/platform/rockchip/isp1/isp_stats.h
create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
create mode 100644 drivers/media/platform/rockchip/isp1/regs.c
create mode 100644 drivers/media/platform/rockchip/isp1/regs.h
create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.c
create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.h
create mode 100644 include/uapi/linux/rkisp1-config.h
--
1.9.1
^ permalink raw reply
* [PATCH v5 01/16] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
From: Shunqian Zheng @ 2017-12-29 7:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514533978-20408-1-git-send-email-zhengsq@rock-chips.com>
Add the Rockchip ISP1 specific processing parameter format
V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
---
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index 7961499..035fd22 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1246,6 +1246,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_TCH_FMT_TU08: descr = "8-bit unsigned touch data"; break;
case V4L2_META_FMT_VSP1_HGO: descr = "R-Car VSP1 1-D Histogram"; break;
case V4L2_META_FMT_VSP1_HGT: descr = "R-Car VSP1 2-D Histogram"; break;
+ case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A params"; break;
+ case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A statistics"; break;
default:
/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 1c095b5..c023c3a 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -689,6 +689,10 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_VSP1_HGO v4l2_fourcc('V', 'S', 'P', 'H') /* R-Car VSP1 1-D Histogram */
#define V4L2_META_FMT_VSP1_HGT v4l2_fourcc('V', 'S', 'P', 'T') /* R-Car VSP1 2-D Histogram */
+/* Vendor specific - used for IPU3 camera sub-system */
+#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 params */
+#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A statistics */
+
/* priv field value to indicates that subsequent fields are valid. */
#define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe
--
1.9.1
^ permalink raw reply related
* [PATCH v5 02/16] media: doc: add document for rkisp1 meta buffer format
From: Shunqian Zheng @ 2017-12-29 7:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514533978-20408-1-git-send-email-zhengsq@rock-chips.com>
From: Jacob Chen <jacob2.chen@rock-chips.com>
This commit add docuemnt for rkisp1 meta buffer format
Signed-off-by: Jacob Chen <jacob-chen@rock-chips.com>
---
Documentation/media/uapi/v4l/meta-formats.rst | 2 ++
.../media/uapi/v4l/pixfmt-meta-rkisp1-params.rst | 17 +++++++++++++++++
.../media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst | 18 ++++++++++++++++++
3 files changed, 37 insertions(+)
create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst
create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst
diff --git a/Documentation/media/uapi/v4l/meta-formats.rst b/Documentation/media/uapi/v4l/meta-formats.rst
index 01e24e3..1b82814 100644
--- a/Documentation/media/uapi/v4l/meta-formats.rst
+++ b/Documentation/media/uapi/v4l/meta-formats.rst
@@ -14,3 +14,5 @@ These formats are used for the :ref:`metadata` interface only.
pixfmt-meta-vsp1-hgo
pixfmt-meta-vsp1-hgt
+ pixfmt-meta-rkisp1-params
+ pixfmt-meta-rkisp1-stat
diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst
new file mode 100644
index 0000000..ed344d4
--- /dev/null
+++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst
@@ -0,0 +1,17 @@
+.. -*- coding: utf-8; mode: rst -*-
+
+.. _v4l2-meta-fmt-rkisp1-params:
+
+*******************************
+V4L2_META_FMT_RK_ISP1_PARAMS
+*******************************
+
+Rockchip ISP1 Parameters Data
+
+Description
+===========
+
+This format describes input parameters for the Rockchip ISP1.
+
+The data use c-struct :c:type:`rkisp1_isp_params_cfg`, which is defined in
+the ``linux/rkisp1-config.h`` header file, See it for details.
diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst
new file mode 100644
index 0000000..5ecc403
--- /dev/null
+++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst
@@ -0,0 +1,18 @@
+.. -*- coding: utf-8; mode: rst -*-
+
+.. _v4l2-meta-fmt-rkisp1-stat:
+
+*******************************
+V4L2_META_FMT_RK_ISP1_STAT_3A
+*******************************
+
+Rockchip ISP1 Statistics Data
+
+Description
+===========
+
+This format describes image color statistics information generated by the Rockchip
+ISP1.
+
+The data use c-struct :c:type:`rkisp1_stat_buffer`, which is defined in
+the ``linux/cifisp_stat.h`` header file, See it for details.
--
1.9.1
^ permalink raw reply related
* [PATCH v5 03/16] media: rkisp1: Add user space ABI definitions
From: Shunqian Zheng @ 2017-12-29 7:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514533978-20408-1-git-send-email-zhengsq@rock-chips.com>
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Add the header for userspace
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
---
include/uapi/linux/rkisp1-config.h | 757 +++++++++++++++++++++++++++++++++++++
1 file changed, 757 insertions(+)
create mode 100644 include/uapi/linux/rkisp1-config.h
diff --git a/include/uapi/linux/rkisp1-config.h b/include/uapi/linux/rkisp1-config.h
new file mode 100644
index 0000000..0f9f4226
--- /dev/null
+++ b/include/uapi/linux/rkisp1-config.h
@@ -0,0 +1,757 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip isp1 driver
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef _UAPI_RKISP1_CONFIG_H
+#define _UAPI_RKISP1_CONFIG_H
+
+#include <linux/types.h>
+#include <linux/v4l2-controls.h>
+
+#define CIFISP_MODULE_DPCC (1 << 0)
+#define CIFISP_MODULE_BLS (1 << 1)
+#define CIFISP_MODULE_SDG (1 << 2)
+#define CIFISP_MODULE_HST (1 << 3)
+#define CIFISP_MODULE_LSC (1 << 4)
+#define CIFISP_MODULE_AWB_GAIN (1 << 5)
+#define CIFISP_MODULE_FLT (1 << 6)
+#define CIFISP_MODULE_BDM (1 << 7)
+#define CIFISP_MODULE_CTK (1 << 8)
+#define CIFISP_MODULE_GOC (1 << 9)
+#define CIFISP_MODULE_CPROC (1 << 10)
+#define CIFISP_MODULE_AFC (1 << 11)
+#define CIFISP_MODULE_AWB (1 << 12)
+#define CIFISP_MODULE_IE (1 << 13)
+#define CIFISP_MODULE_AEC (1 << 14)
+#define CIFISP_MODULE_WDR (1 << 15)
+#define CIFISP_MODULE_DPF (1 << 16)
+#define CIFISP_MODULE_DPF_STRENGTH (1 << 17)
+
+#define CIFISP_CTK_COEFF_MAX 0x100
+#define CIFISP_CTK_OFFSET_MAX 0x800
+
+#define CIFISP_AE_MEAN_MAX 25
+#define CIFISP_HIST_BIN_N_MAX 16
+#define CIFISP_AFM_MAX_WINDOWS 3
+#define CIFISP_DEGAMMA_CURVE_SIZE 17
+
+#define CIFISP_BDM_MAX_TH 0xFF
+
+/*
+ * Black level compensation
+ */
+/* maximum value for horizontal start address */
+#define CIFISP_BLS_START_H_MAX 0x00000FFF
+/* maximum value for horizontal stop address */
+#define CIFISP_BLS_STOP_H_MAX 0x00000FFF
+/* maximum value for vertical start address */
+#define CIFISP_BLS_START_V_MAX 0x00000FFF
+/* maximum value for vertical stop address */
+#define CIFISP_BLS_STOP_V_MAX 0x00000FFF
+/* maximum is 2^18 = 262144*/
+#define CIFISP_BLS_SAMPLES_MAX 0x00000012
+/* maximum value for fixed black level */
+#define CIFISP_BLS_FIX_SUB_MAX 0x00000FFF
+/* minimum value for fixed black level */
+#define CIFISP_BLS_FIX_SUB_MIN 0xFFFFF000
+/* 13 bit range (signed)*/
+#define CIFISP_BLS_FIX_MASK 0x00001FFF
+
+/*
+ * Automatic white balance measurments
+ */
+#define CIFISP_AWB_MAX_GRID 1
+#define CIFISP_AWB_MAX_FRAMES 7
+
+/*
+ * Gamma out
+ */
+/* Maximum number of color samples supported */
+#define CIFISP_GAMMA_OUT_MAX_SAMPLES 17
+
+/*
+ * Lens shade correction
+ */
+#define CIFISP_LSC_GRAD_TBL_SIZE 8
+#define CIFISP_LSC_SIZE_TBL_SIZE 8
+/*
+ * The following matches the tuning process,
+ * not the max capabilities of the chip.
+ * Last value unused.
+ */
+#define CIFISP_LSC_DATA_TBL_SIZE 290
+
+/*
+ * Histogram calculation
+ */
+/* Last 3 values unused. */
+#define CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE 28
+
+/*
+ * Defect Pixel Cluster Correction
+ */
+#define CIFISP_DPCC_METHODS_MAX 3
+
+/*
+ * Denoising pre filter
+ */
+#define CIFISP_DPF_MAX_NLF_COEFFS 17
+#define CIFISP_DPF_MAX_SPATIAL_COEFFS 6
+
+/*
+ * Measurement types
+ */
+#define CIFISP_STAT_AWB (1 << 0)
+#define CIFISP_STAT_AUTOEXP (1 << 1)
+#define CIFISP_STAT_AFM_FIN (1 << 2)
+#define CIFISP_STAT_HIST (1 << 3)
+
+enum cifisp_histogram_mode {
+ CIFISP_HISTOGRAM_MODE_DISABLE,
+ CIFISP_HISTOGRAM_MODE_RGB_COMBINED,
+ CIFISP_HISTOGRAM_MODE_R_HISTOGRAM,
+ CIFISP_HISTOGRAM_MODE_G_HISTOGRAM,
+ CIFISP_HISTOGRAM_MODE_B_HISTOGRAM,
+ CIFISP_HISTOGRAM_MODE_Y_HISTOGRAM
+};
+
+enum cifisp_awb_mode_type {
+ CIFISP_AWB_MODE_MANUAL,
+ CIFISP_AWB_MODE_RGB,
+ CIFISP_AWB_MODE_YCBCR
+};
+
+enum cifisp_flt_mode {
+ CIFISP_FLT_STATIC_MODE,
+ CIFISP_FLT_DYNAMIC_MODE
+};
+
+/**
+ * enum cifisp_exp_ctrl_auotostop - stop modes
+ * @CIFISP_EXP_CTRL_AUTOSTOP_0: continous measurement
+ * @CIFISP_EXP_CTRL_AUTOSTOP_1: stop measuring after a complete frame
+ */
+enum cifisp_exp_ctrl_auotostop {
+ CIFISP_EXP_CTRL_AUTOSTOP_0 = 0,
+ CIFISP_EXP_CTRL_AUTOSTOP_1 = 1,
+};
+
+/**
+ * enum cifisp_exp_meas_mode - Exposure measure mode
+ * @CIFISP_EXP_MEASURING_MODE_0: Y = 16 + 0.25R + 0.5G + 0.1094B
+ * @CIFISP_EXP_MEASURING_MODE_1: Y = (R + G + B) x (85/256)
+ */
+enum cifisp_exp_meas_mode {
+ CIFISP_EXP_MEASURING_MODE_0,
+ CIFISP_EXP_MEASURING_MODE_1,
+};
+
+/*---------- PART1: Input Parameters ------------*/
+
+struct cifisp_window {
+ unsigned short h_offs;
+ unsigned short v_offs;
+ unsigned short h_size;
+ unsigned short v_size;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_bls_fixed_val - BLS fixed subtraction values
+ *
+ * The values will be subtracted from the sensor
+ * values. Therefore a negative value means addition instead of subtraction!
+ *
+ * @r: Fixed (signed!) subtraction value for Bayer pattern R
+ * @gr: Fixed (signed!) subtraction value for Bayer pattern Gr
+ * @gb: Fixed (signed!) subtraction value for Bayer pattern Gb
+ * @b: Fixed (signed!) subtraction value for Bayer pattern B
+ */
+struct cifisp_bls_fixed_val {
+ signed short r;
+ signed short gr;
+ signed short gb;
+ signed short b;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_bls_config - Configuration used by black level subtraction
+ *
+ * @enable_auto: Automatic mode activated means that the measured values
+ * are subtracted.Otherwise the fixed subtraction
+ * values will be subtracted.
+ * @en_windows: enabled window
+ * @bls_window1: Measurement window 1 size
+ * @bls_window2: Measurement window 2 size
+ * @bls_samples: Set amount of measured pixels for each Bayer position
+ * (A, B,C and D) to 2^bls_samples.
+ * @cifisp_bls_fixed_val: Fixed subtraction values
+ */
+struct cifisp_bls_config {
+ unsigned char enable_auto;
+ unsigned char en_windows;
+ struct cifisp_window bls_window1;
+ struct cifisp_window bls_window2;
+ unsigned char bls_samples;
+ struct cifisp_bls_fixed_val fixed_val;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_dpcc_methods_config - Methods Configuration used by Defect Pixel Cluster Correction
+ *
+ * @method:
+ * @line_thresh:
+ * @line_mad_fac:
+ * @pg_fac:
+ * @rnd_thresh:
+ * @rg_fac:
+ */
+struct cifisp_dpcc_methods_config {
+ unsigned int method;
+ unsigned int line_thresh;
+ unsigned int line_mad_fac;
+ unsigned int pg_fac;
+ unsigned int rnd_thresh;
+ unsigned int rg_fac;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_dpcc_methods_config - Configuration used by Defect Pixel Cluster Correction
+ *
+ * @mode: dpcc output mode
+ * @output_mode: whether use hard coded methods
+ * @set_use: stage1 methods set
+ * @methods: methods config
+ * @ro_limits: rank order limits
+ * @rnd_offs: differential rank offsets for rank neighbor difference
+ */
+struct cifisp_dpcc_config {
+ unsigned int mode;
+ unsigned int output_mode;
+ unsigned int set_use;
+ struct cifisp_dpcc_methods_config methods[CIFISP_DPCC_METHODS_MAX];
+ unsigned int ro_limits;
+ unsigned int rnd_offs;
+} __attribute__ ((packed));
+
+struct cifisp_gamma_corr_curve {
+ unsigned short gamma_y[CIFISP_DEGAMMA_CURVE_SIZE];
+} __attribute__ ((packed));
+
+struct cifisp_gamma_curve_x_axis_pnts {
+ unsigned int gamma_dx0;
+ unsigned int gamma_dx1;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_gamma_corr_curve - Configuration used by sensor degamma
+ *
+ * @curve_x: gamma curve point definition axis for x
+ * @xa_pnts: x increments
+ */
+struct cifisp_sdg_config {
+ struct cifisp_gamma_corr_curve curve_r;
+ struct cifisp_gamma_corr_curve curve_g;
+ struct cifisp_gamma_corr_curve curve_b;
+ struct cifisp_gamma_curve_x_axis_pnts xa_pnts;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_lsc_config - Configuration used by Lens shading correction
+ *
+ * refer to datasheet for details
+ */
+struct cifisp_lsc_config {
+ unsigned int r_data_tbl[CIFISP_LSC_DATA_TBL_SIZE];
+ unsigned int gr_data_tbl[CIFISP_LSC_DATA_TBL_SIZE];
+ unsigned int gb_data_tbl[CIFISP_LSC_DATA_TBL_SIZE];
+ unsigned int b_data_tbl[CIFISP_LSC_DATA_TBL_SIZE];
+
+ unsigned int x_grad_tbl[CIFISP_LSC_GRAD_TBL_SIZE];
+ unsigned int y_grad_tbl[CIFISP_LSC_GRAD_TBL_SIZE];
+
+ unsigned int x_size_tbl[CIFISP_LSC_SIZE_TBL_SIZE];
+ unsigned int y_size_tbl[CIFISP_LSC_SIZE_TBL_SIZE];
+ unsigned short config_width;
+ unsigned short config_height;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_ie_config - Configuration used by image effects
+ *
+ * @eff_mat_1: 3x3 Matrix Coefficients for Emboss Effect 1
+ * @eff_mat_2: 3x3 Matrix Coefficients for Emboss Effect 2
+ * @eff_mat_3: 3x3 Matrix Coefficients for Emboss 3/Sketch 1
+ * @eff_mat_4: 3x3 Matrix Coefficients for Sketch Effect 2
+ * @eff_mat_5: 3x3 Matrix Coefficients for Sketch Effect 3
+ * @eff_tint: Chrominance increment values of tint (used for sepia effect)
+ */
+struct cifisp_ie_config {
+ unsigned short effect;
+ unsigned short color_sel;
+ unsigned short eff_mat_1;
+ unsigned short eff_mat_2;
+ unsigned short eff_mat_3;
+ unsigned short eff_mat_4;
+ unsigned short eff_mat_5;
+ unsigned short eff_tint;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_cproc_config - Configuration used by Color Processing
+ *
+ * @c_out_range: Chrominance pixel clipping range at output. (0 for limit, 1 for full)
+ * @y_in_range: Luminance pixel clipping range at output.
+ * @y_out_range: Luminance pixel clipping range@output.
+ * @contrast: 00~ff, 0.0~1.992
+ * @brightness: 80~7F, -128~+127
+ * @sat: saturation, 00~FF, 0.0~1.992
+ * @hue: 80~7F, -90~+87.188
+ */
+struct cifisp_cproc_config {
+ unsigned char c_out_range;
+ unsigned char y_in_range;
+ unsigned char y_out_range;
+ unsigned char contrast;
+ unsigned char brightness;
+ unsigned char sat;
+ unsigned char hue;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_awb_meas_config - Configuration used by auto white balance
+ *
+ * @awb_wnd: white balance measurement window (in pixels)
+ * @max_y: only pixels values < max_y contribute to awb measurement, set to 0 to disable this feature
+ * @min_y: only pixels values > min_y contribute to awb measurement
+ * @max_csum: Chrominance sum maximum value, only consider pixels with Cb+Cr, smaller than threshold for awb measurements
+ * @min_c: Chrominance minimum value, only consider pixels with Cb/Cr each greater than threshold value for awb measurements
+ * @frames: number of frames - 1 used for mean value calculation(ucFrames=0 means 1 Frame)
+ * @awb_ref_cr: reference Cr value for AWB regulation, target for AWB
+ * @awb_ref_cb: reference Cb value for AWB regulation, target for AWB
+ */
+struct cifisp_awb_meas_config {
+ /*
+ * Note: currently the h and v offsets are mapped to grid offsets
+ */
+ struct cifisp_window awb_wnd;
+ enum cifisp_awb_mode_type awb_mode;
+ unsigned char max_y;
+ unsigned char min_y;
+ unsigned char max_csum;
+ unsigned char min_c;
+ unsigned char frames;
+ unsigned char awb_ref_cr;
+ unsigned char awb_ref_cb;
+ bool enable_ymax_cmp;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_awb_gain_config - Configuration used by auto white balance gain
+ *
+ * out_data_x = ( AWB_GEAIN_X * in_data + 128) >> 8
+ */
+struct cifisp_awb_gain_config {
+ unsigned short gain_red;
+ unsigned short gain_green_r;
+ unsigned short gain_blue;
+ unsigned short gain_green_b;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_flt_config - Configuration used by ISP filtering
+ *
+ * @mode: ISP_FILT_MODE register fields
+ * @grn_stage1: ISP_FILT_MODE register fields
+ * @chr_h_mode: ISP_FILT_MODE register fields
+ * @chr_v_mode: ISP_FILT_MODE register fields
+ *
+ * refer to datasheet for details.
+ */
+struct cifisp_flt_config {
+ enum cifisp_flt_mode mode;
+ unsigned char grn_stage1;
+ unsigned char chr_h_mode;
+ unsigned char chr_v_mode;
+ unsigned int thresh_bl0;
+ unsigned int thresh_bl1;
+ unsigned int thresh_sh0;
+ unsigned int thresh_sh1;
+ unsigned int lum_weight;
+ unsigned int fac_sh1;
+ unsigned int fac_sh0;
+ unsigned int fac_mid;
+ unsigned int fac_bl0;
+ unsigned int fac_bl1;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_bdm_config - Configuration used by Bayer DeMosaic
+ *
+ * @demosaic_th: threshod for bayer demosaicing texture detection
+ */
+struct cifisp_bdm_config {
+ unsigned char demosaic_th;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_ctk_config - Configuration used by Cross Talk correction
+ *
+ * @coeff: color correction matrix
+ * @ct_offset_b: offset for the crosstalk correction matrix
+ */
+struct cifisp_ctk_config {
+ unsigned short coeff0;
+ unsigned short coeff1;
+ unsigned short coeff2;
+ unsigned short coeff3;
+ unsigned short coeff4;
+ unsigned short coeff5;
+ unsigned short coeff6;
+ unsigned short coeff7;
+ unsigned short coeff8;
+ unsigned short ct_offset_r;
+ unsigned short ct_offset_g;
+ unsigned short ct_offset_b;
+} __attribute__ ((packed));
+
+enum cifisp_goc_mode {
+ CIFISP_GOC_MODE_LOGARITHMIC,
+ CIFISP_GOC_MODE_EQUIDISTANT
+};
+
+/**
+ * struct cifisp_goc_config - Configuration used by Gamma Out correction
+ *
+ * @mode: goc mode
+ * @gamma_y: gamma out curve y-axis for all color components
+ */
+struct cifisp_goc_config {
+ enum cifisp_goc_mode mode;
+ unsigned short gamma_y[CIFISP_GAMMA_OUT_MAX_SAMPLES];
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_hst_config - Configuration used by Histogram
+ *
+ * @mode: histogram mode
+ * @histogram_predivider: process every stepsize pixel, all other pixels are skipped
+ * @meas_window: coordinates of the meas window
+ * @hist_weight: weighting factor for sub-windows
+ */
+struct cifisp_hst_config {
+ enum cifisp_histogram_mode mode;
+ unsigned char histogram_predivider;
+ struct cifisp_window meas_window;
+ unsigned char hist_weight[CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE];
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_aec_config - Configuration used by Auto Exposure Control
+ *
+ * @mode: Exposure measure mode
+ * @autostop: stop mode (from enum cifisp_exp_ctrl_auotostop)
+ * @meas_window: coordinates of the meas window
+ */
+struct cifisp_aec_config {
+ enum cifisp_exp_meas_mode mode;
+ __u32 autostop;
+ struct cifisp_window meas_window;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_afc_config - Configuration used by Auto Focus Control
+ *
+ * @num_afm_win: max CIFISP_AFM_MAX_WINDOWS
+ * @afm_win: coordinates of the meas window
+ * @thres: threshold used for minimizing the influence of noise
+ * @var_shift: the number of bits for the shift operation at the end of the calculation chain.
+ */
+struct cifisp_afc_config {
+ unsigned char num_afm_win;
+ struct cifisp_window afm_win[CIFISP_AFM_MAX_WINDOWS];
+ unsigned int thres;
+ unsigned int var_shift;
+} __attribute__ ((packed));
+
+/**
+ * enum cifisp_dpf_gain_usage - dpf gain usage
+ * @CIFISP_DPF_GAIN_USAGE_DISABLED: don't use any gains in preprocessing stage
+ * @CIFISP_DPF_GAIN_USAGE_NF_GAINS: use only the noise function gains from registers DPF_NF_GAIN_R, ...
+ * @CIFISP_DPF_GAIN_USAGE_LSC_GAINS: use only the gains from LSC module
+ * @CIFISP_DPF_GAIN_USAGE_NF_LSC_GAINS: use the noise function gains and the gains from LSC module
+ * @CIFISP_DPF_GAIN_USAGE_AWB_GAINS: use only the gains from AWB module
+ * @CIFISP_DPF_GAIN_USAGE_AWB_LSC_GAINS: use the gains from AWB and LSC module
+ * @CIFISP_DPF_GAIN_USAGE_MAX: upper border (only for an internal evaluation)
+ */
+enum cifisp_dpf_gain_usage {
+ CIFISP_DPF_GAIN_USAGE_DISABLED,
+ CIFISP_DPF_GAIN_USAGE_NF_GAINS,
+ CIFISP_DPF_GAIN_USAGE_LSC_GAINS,
+ CIFISP_DPF_GAIN_USAGE_NF_LSC_GAINS,
+ CIFISP_DPF_GAIN_USAGE_AWB_GAINS,
+ CIFISP_DPF_GAIN_USAGE_AWB_LSC_GAINS,
+ CIFISP_DPF_GAIN_USAGE_MAX
+};
+
+/**
+ * enum cifisp_dpf_gain_usage - dpf gain usage
+ * @CIFISP_DPF_RB_FILTERSIZE_13x9: red and blue filter kernel size 13x9 (means 7x5 active pixel)
+ * @CIFISP_DPF_RB_FILTERSIZE_9x9: red and blue filter kernel size 9x9 (means 5x5 active pixel)
+ */
+enum cifisp_dpf_rb_filtersize {
+ CIFISP_DPF_RB_FILTERSIZE_13x9,
+ CIFISP_DPF_RB_FILTERSIZE_9x9,
+};
+
+/**
+ * enum cifisp_dpf_nll_scale_mode - dpf noise level scale mode
+ * @CIFISP_NLL_SCALE_LINEAR: use a linear scaling
+ * @CIFISP_NLL_SCALE_LOGARITHMIC: use a logarithmic scaling
+ */
+enum cifisp_dpf_nll_scale_mode {
+ CIFISP_NLL_SCALE_LINEAR,
+ CIFISP_NLL_SCALE_LOGARITHMIC,
+};
+
+struct cifisp_dpf_nll {
+ unsigned short coeff[CIFISP_DPF_MAX_NLF_COEFFS];
+ enum cifisp_dpf_nll_scale_mode scale_mode;
+} __attribute__ ((packed));
+
+struct cifisp_dpf_rb_flt {
+ enum cifisp_dpf_rb_filtersize fltsize;
+ unsigned char spatial_coeff[CIFISP_DPF_MAX_SPATIAL_COEFFS];
+ bool r_enable;
+ bool b_enable;
+} __attribute__ ((packed));
+
+struct cifisp_dpf_g_flt {
+ unsigned char spatial_coeff[CIFISP_DPF_MAX_SPATIAL_COEFFS];
+ bool gr_enable;
+ bool gb_enable;
+} __attribute__ ((packed));
+
+struct cifisp_dpf_gain {
+ enum cifisp_dpf_gain_usage mode;
+ unsigned short nf_r_gain;
+ unsigned short nf_b_gain;
+ unsigned short nf_gr_gain;
+ unsigned short nf_gb_gain;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_dpf_config - Configuration used by De-noising pre-filter
+ *
+ * @gain: noise function gain
+ * @g_flt: green filter config
+ * @rb_flt: red blue filter config
+ * @nll: noise level lookup
+ */
+struct cifisp_dpf_config {
+ struct cifisp_dpf_gain gain;
+ struct cifisp_dpf_g_flt g_flt;
+ struct cifisp_dpf_rb_flt rb_flt;
+ struct cifisp_dpf_nll nll;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_dpf_strength_config - strength of the filter
+ *
+ * @r: filter strength of the RED filter
+ * @g: filter strength of the GREEN filter
+ * @b: filter strength of the BLUE filter
+ */
+struct cifisp_dpf_strength_config {
+ unsigned char r;
+ unsigned char g;
+ unsigned char b;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_isp_other_cfg - Parameters for some blocks in rockchip isp1
+ *
+ * @dpcc_config: Defect Pixel Cluster Correction config
+ * @bls_config: Black Level Subtraction config
+ * @sdg_config: sensor degamma config
+ * @lsc_config: Lens Shade config
+ * @awb_gain_config: Auto White balance gain config
+ * @flt_config: filter config
+ * @bdm_config: demosaic config
+ * @ctk_config: cross talk config
+ * @goc_config: gamma out config
+ * @bls_config: black level suntraction config
+ * @dpf_config: De-noising pre-filter config
+ * @dpf_strength_config: dpf strength config
+ * @cproc_config: color process config
+ * @ie_config: image effects config
+ */
+struct cifisp_isp_other_cfg {
+ struct cifisp_dpcc_config dpcc_config;
+ struct cifisp_bls_config bls_config;
+ struct cifisp_sdg_config sdg_config;
+ struct cifisp_lsc_config lsc_config;
+ struct cifisp_awb_gain_config awb_gain_config;
+ struct cifisp_flt_config flt_config;
+ struct cifisp_bdm_config bdm_config;
+ struct cifisp_ctk_config ctk_config;
+ struct cifisp_goc_config goc_config;
+ struct cifisp_dpf_config dpf_config;
+ struct cifisp_dpf_strength_config dpf_strength_config;
+ struct cifisp_cproc_config cproc_config;
+ struct cifisp_ie_config ie_config;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_isp_meas_cfg - Rockchip ISP1 Measure Parameters
+ *
+ * @awb_meas_config: auto white balance config
+ * @hst_config: histogram config
+ * @aec_config: auto exposure config
+ * @afc_config: auto focus config
+ */
+struct cifisp_isp_meas_cfg {
+ struct cifisp_awb_meas_config awb_meas_config;
+ struct cifisp_hst_config hst_config;
+ struct cifisp_aec_config aec_config;
+ struct cifisp_afc_config afc_config;
+} __attribute__ ((packed));
+
+/**
+ * struct rkisp1_isp_params_cfg - Rockchip ISP1 Input Parameters Meta Data
+ *
+ * @module_en_update: mask the enable bits of which module should be updated
+ * @module_ens: mask the enable value of each module, only update the module
+ * which correspond bit was set in module_en_update
+ * @module_cfg_update: mask the config bits of which module should be updated
+ * @meas: measurement config
+ * @others: other config
+ */
+struct rkisp1_isp_params_cfg {
+ unsigned int module_en_update;
+ unsigned int module_ens;
+ unsigned int module_cfg_update;
+
+ struct cifisp_isp_meas_cfg meas;
+ struct cifisp_isp_other_cfg others;
+} __attribute__ ((packed));
+
+/*---------- PART2: Measurement Statistics ------------*/
+
+/**
+ * struct cifisp_bls_meas_val - AWB measured values
+ *
+ * @cnt: White pixel count, number of "white pixels" found during laster measurement
+ * @mean_y_or_g: Mean value of Y within window and frames, Green if RGB is selected.
+ * @mean_cb_or_b: Mean value of Cb within window and frames, Blue if RGB is selected.
+ * @mean_cr_or_r: Mean value of Cr within window and frames, Red if RGB is selected.
+ */
+struct cifisp_awb_meas {
+ unsigned int cnt;
+ unsigned char mean_y_or_g;
+ unsigned char mean_cb_or_b;
+ unsigned char mean_cr_or_r;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_awb_stat - statistics automatic white balance data
+ *
+ * @awb_mean: Mean measured data
+ */
+struct cifisp_awb_stat {
+ struct cifisp_awb_meas awb_mean[CIFISP_AWB_MAX_GRID];
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_bls_meas_val - BLS measured values
+ *
+ * @meas_r: Mean measured value for Bayer pattern R
+ * @meas_gr: Mean measured value for Bayer pattern Gr
+ * @meas_gb: Mean measured value for Bayer pattern Gb
+ * @meas_b: Mean measured value for Bayer pattern B
+ */
+struct cifisp_bls_meas_val {
+ unsigned short meas_r;
+ unsigned short meas_gr;
+ unsigned short meas_gb;
+ unsigned short meas_b;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_ae_stat - statistics auto exposure data
+ *
+ * @exp_mean: Mean luminance value of block xx
+ * @bls_val: available wit exposure results
+ *
+ * Image is divided into 5x5 blocks.
+ */
+struct cifisp_ae_stat {
+ unsigned char exp_mean[CIFISP_AE_MEAN_MAX];
+ struct cifisp_bls_meas_val bls_val;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_af_meas_val - AF measured values
+ *
+ * @sum: sharpness, refer to datasheet for definition
+ * @lum: luminance, refer to datasheet for definition
+ */
+struct cifisp_af_meas_val {
+ unsigned int sum;
+ unsigned int lum;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_af_stat - statistics auto focus data
+ *
+ * @window: AF measured value of window x
+ *
+ * The module measures the sharpness in 3 windows of selectable size via
+ * register settings(ISP_AFM_*_A/B/C)
+ */
+struct cifisp_af_stat {
+ struct cifisp_af_meas_val window[CIFISP_AFM_MAX_WINDOWS];
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_hist_stat - statistics histogram data
+ *
+ * @hist_bins: measured bin counters
+ *
+ * Measurement window divided into 25 sub-windows, set
+ * with ISP_HIST_XXX
+ */
+struct cifisp_hist_stat {
+ unsigned short hist_bins[CIFISP_HIST_BIN_N_MAX];
+} __attribute__ ((packed));
+
+/**
+ * struct rkisp1_stat_buffer - Rockchip ISP1 Statistics Data
+ *
+ * @cifisp_awb_stat: statistics data for automatic white balance
+ * @cifisp_ae_stat: statistics data for auto exposure
+ * @cifisp_af_stat: statistics data for auto focus
+ * @cifisp_hist_stat: statistics histogram data
+ */
+struct cifisp_stat {
+ struct cifisp_awb_stat awb;
+ struct cifisp_ae_stat ae;
+ struct cifisp_af_stat af;
+ struct cifisp_hist_stat hist;
+} __attribute__ ((packed));
+
+/**
+ * struct rkisp1_stat_buffer - Rockchip ISP1 Statistics Meta Data
+ *
+ * @meas_type: measurement types (CIFISP_STAT_ definitions)
+ * @frame_id: frame ID for sync
+ * @params: statistics data
+ */
+struct rkisp1_stat_buffer {
+ unsigned int meas_type;
+ unsigned int frame_id;
+ struct cifisp_stat params;
+} __attribute__ ((packed));
+
+#endif /* _UAPI_RKISP1_CONFIG_H */
--
1.9.1
^ permalink raw reply related
* [PATCH v5 04/16] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver
From: Shunqian Zheng @ 2017-12-29 7:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514533978-20408-1-git-send-email-zhengsq@rock-chips.com>
From: Jacob Chen <jacob2.chen@rock-chips.com>
This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
---
.../media/platform/rockchip/isp1/mipi_dphy_sy.c | 787 +++++++++++++++++++++
1 file changed, 787 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
new file mode 100644
index 0000000..9421183
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
@@ -0,0 +1,787 @@
+/*
+ * Rockchip MIPI Synopsys DPHY driver
+ *
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials
+ * provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
+#include <media/media-entity.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-fwnode.h>
+#include <media/v4l2-subdev.h>
+
+#define RK3288_GRF_SOC_CON6 0x025c
+#define RK3288_GRF_SOC_CON8 0x0264
+#define RK3288_GRF_SOC_CON9 0x0268
+#define RK3288_GRF_SOC_CON10 0x026c
+#define RK3288_GRF_SOC_CON14 0x027c
+#define RK3288_GRF_SOC_STATUS21 0x02d4
+#define RK3288_GRF_IO_VSEL 0x0380
+#define RK3288_GRF_SOC_CON15 0x03a4
+
+#define RK3399_GRF_SOC_CON9 0x6224
+#define RK3399_GRF_SOC_CON21 0x6254
+#define RK3399_GRF_SOC_CON22 0x6258
+#define RK3399_GRF_SOC_CON23 0x625c
+#define RK3399_GRF_SOC_CON24 0x6260
+#define RK3399_GRF_SOC_CON25 0x6264
+#define RK3399_GRF_SOC_STATUS1 0xe2a4
+
+#define CLOCK_LANE_HS_RX_CONTROL 0x34
+#define LANE0_HS_RX_CONTROL 0x44
+#define LANE1_HS_RX_CONTROL 0x54
+#define LANE2_HS_RX_CONTROL 0x84
+#define LANE3_HS_RX_CONTROL 0x94
+#define HS_RX_DATA_LANES_THS_SETTLE__CONTROL 0x75
+
+#define HIWORD_UPDATE(val, mask, shift) \
+ ((val) << (shift) | (mask) << ((shift) + 16))
+
+enum mipi_dphy_sy_pads {
+ MIPI_DPHY_SY_PAD_SINK = 0,
+ MIPI_DPHY_SY_PAD_SOURCE,
+ MIPI_DPHY_SY_PADS_NUM,
+};
+
+enum dphy_reg_id {
+ GRF_DPHY_RX0_TURNDISABLE = 0,
+ GRF_DPHY_RX0_FORCERXMODE,
+ GRF_DPHY_RX0_FORCETXSTOPMODE,
+ GRF_DPHY_RX0_ENABLE,
+ GRF_DPHY_RX0_TESTCLR,
+ GRF_DPHY_RX0_TESTCLK,
+ GRF_DPHY_RX0_TESTEN,
+ GRF_DPHY_RX0_TESTDIN,
+ GRF_DPHY_RX0_TURNREQUEST,
+ GRF_DPHY_RX0_TESTDOUT,
+ GRF_DPHY_TX0_TURNDISABLE,
+ GRF_DPHY_TX0_FORCERXMODE,
+ GRF_DPHY_TX0_FORCETXSTOPMODE,
+ GRF_DPHY_TX0_TURNREQUEST,
+ GRF_DPHY_TX1RX1_TURNDISABLE,
+ GRF_DPHY_TX1RX1_FORCERXMODE,
+ GRF_DPHY_TX1RX1_FORCETXSTOPMODE,
+ GRF_DPHY_TX1RX1_ENABLE,
+ GRF_DPHY_TX1RX1_MASTERSLAVEZ,
+ GRF_DPHY_TX1RX1_BASEDIR,
+ GRF_DPHY_TX1RX1_ENABLECLK,
+ GRF_DPHY_TX1RX1_TURNREQUEST,
+ GRF_DPHY_RX1_SRC_SEL,
+ /* rk3288 only */
+ GRF_CON_DISABLE_ISP,
+ GRF_CON_ISP_DPHY_SEL,
+ GRF_DSI_CSI_TESTBUS_SEL,
+ GRF_DVP_V18SEL,
+ /* below is for rk3399 only */
+ GRF_DPHY_RX0_CLK_INV_SEL,
+ GRF_DPHY_RX1_CLK_INV_SEL,
+};
+
+struct dphy_reg {
+ u32 offset;
+ u32 mask;
+ u32 shift;
+};
+
+#define PHY_REG(_offset, _width, _shift) \
+ { .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }
+
+static const struct dphy_reg rk3399_grf_dphy_regs[] = {
+ [GRF_DPHY_RX0_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON9, 4, 0),
+ [GRF_DPHY_RX0_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 10),
+ [GRF_DPHY_RX1_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 11),
+ [GRF_DPHY_RX0_ENABLE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 0),
+ [GRF_DPHY_RX0_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 4),
+ [GRF_DPHY_RX0_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 8),
+ [GRF_DPHY_RX0_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 12),
+ [GRF_DPHY_TX0_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 0),
+ [GRF_DPHY_TX0_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 4),
+ [GRF_DPHY_TX0_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 8),
+ [GRF_DPHY_TX0_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 12),
+ [GRF_DPHY_TX1RX1_ENABLE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 0),
+ [GRF_DPHY_TX1RX1_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 4),
+ [GRF_DPHY_TX1RX1_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 8),
+ [GRF_DPHY_TX1RX1_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 12),
+ [GRF_DPHY_TX1RX1_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON24, 4, 0),
+ [GRF_DPHY_RX1_SRC_SEL] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 4),
+ [GRF_DPHY_TX1RX1_BASEDIR] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 5),
+ [GRF_DPHY_TX1RX1_ENABLECLK] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 6),
+ [GRF_DPHY_TX1RX1_MASTERSLAVEZ] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 7),
+ [GRF_DPHY_RX0_TESTDIN] = PHY_REG(RK3399_GRF_SOC_CON25, 8, 0),
+ [GRF_DPHY_RX0_TESTEN] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 8),
+ [GRF_DPHY_RX0_TESTCLK] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 9),
+ [GRF_DPHY_RX0_TESTCLR] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 10),
+ [GRF_DPHY_RX0_TESTDOUT] = PHY_REG(RK3399_GRF_SOC_STATUS1, 8, 0),
+};
+
+static const struct dphy_reg rk3288_grf_dphy_regs[] = {
+ [GRF_CON_DISABLE_ISP] = PHY_REG(RK3288_GRF_SOC_CON6, 1, 0),
+ [GRF_CON_ISP_DPHY_SEL] = PHY_REG(RK3288_GRF_SOC_CON6, 1, 1),
+ [GRF_DSI_CSI_TESTBUS_SEL] = PHY_REG(RK3288_GRF_SOC_CON6, 1, 14),
+ [GRF_DPHY_TX0_TURNDISABLE] = PHY_REG(RK3288_GRF_SOC_CON8, 4, 0),
+ [GRF_DPHY_TX0_FORCERXMODE] = PHY_REG(RK3288_GRF_SOC_CON8, 4, 4),
+ [GRF_DPHY_TX0_FORCETXSTOPMODE] = PHY_REG(RK3288_GRF_SOC_CON8, 4, 8),
+ [GRF_DPHY_TX1RX1_TURNDISABLE] = PHY_REG(RK3288_GRF_SOC_CON9, 4, 0),
+ [GRF_DPHY_TX1RX1_FORCERXMODE] = PHY_REG(RK3288_GRF_SOC_CON9, 4, 4),
+ [GRF_DPHY_TX1RX1_FORCETXSTOPMODE] = PHY_REG(RK3288_GRF_SOC_CON9, 4, 8),
+ [GRF_DPHY_TX1RX1_ENABLE] = PHY_REG(RK3288_GRF_SOC_CON9, 4, 12),
+ [GRF_DPHY_RX0_TURNDISABLE] = PHY_REG(RK3288_GRF_SOC_CON10, 4, 0),
+ [GRF_DPHY_RX0_FORCERXMODE] = PHY_REG(RK3288_GRF_SOC_CON10, 4, 4),
+ [GRF_DPHY_RX0_FORCETXSTOPMODE] = PHY_REG(RK3288_GRF_SOC_CON10, 4, 8),
+ [GRF_DPHY_RX0_ENABLE] = PHY_REG(RK3288_GRF_SOC_CON10, 4, 12),
+ [GRF_DPHY_RX0_TESTCLR] = PHY_REG(RK3288_GRF_SOC_CON14, 1, 0),
+ [GRF_DPHY_RX0_TESTCLK] = PHY_REG(RK3288_GRF_SOC_CON14, 1, 1),
+ [GRF_DPHY_RX0_TESTEN] = PHY_REG(RK3288_GRF_SOC_CON14, 1, 2),
+ [GRF_DPHY_RX0_TESTDIN] = PHY_REG(RK3288_GRF_SOC_CON14, 8, 3),
+ [GRF_DPHY_TX1RX1_ENABLECLK] = PHY_REG(RK3288_GRF_SOC_CON14, 1, 12),
+ [GRF_DPHY_RX1_SRC_SEL] = PHY_REG(RK3288_GRF_SOC_CON14, 1, 13),
+ [GRF_DPHY_TX1RX1_MASTERSLAVEZ] = PHY_REG(RK3288_GRF_SOC_CON14, 1, 14),
+ [GRF_DPHY_TX1RX1_BASEDIR] = PHY_REG(RK3288_GRF_SOC_CON14, 1, 15),
+ [GRF_DPHY_RX0_TURNREQUEST] = PHY_REG(RK3288_GRF_SOC_CON15, 4, 0),
+ [GRF_DPHY_TX1RX1_TURNREQUEST] = PHY_REG(RK3288_GRF_SOC_CON15, 4, 4),
+ [GRF_DPHY_TX0_TURNREQUEST] = PHY_REG(RK3288_GRF_SOC_CON15, 3, 8),
+ [GRF_DVP_V18SEL] = PHY_REG(RK3288_GRF_IO_VSEL, 1, 1),
+ [GRF_DPHY_RX0_TESTDOUT] = PHY_REG(RK3288_GRF_SOC_STATUS21, 8, 0),
+};
+
+struct hsfreq_range {
+ u32 range_h;
+ u8 cfg_bit;
+};
+
+struct dphy_drv_data {
+ const char * const *clks;
+ int num_clks;
+ const struct hsfreq_range *hsfreq_ranges;
+ int num_hsfreq_ranges;
+ const struct dphy_reg *regs;
+};
+
+struct sensor_async_subdev {
+ struct v4l2_async_subdev asd;
+ struct v4l2_mbus_config mbus;
+ int lanes;
+};
+
+#define MAX_DPHY_CLK 8
+#define MAX_DPHY_SENSORS 2
+
+struct mipidphy_sensor {
+ struct v4l2_subdev *sd;
+ struct v4l2_mbus_config mbus;
+ int lanes;
+};
+
+struct mipidphy_priv {
+ struct device *dev;
+ struct regmap *regmap_grf;
+ const struct dphy_reg *grf_regs;
+ struct clk *clks[MAX_DPHY_CLK];
+ const struct dphy_drv_data *drv_data;
+ u64 data_rate_mbps;
+ struct v4l2_async_notifier notifier;
+ struct v4l2_subdev sd;
+ struct media_pad pads[MIPI_DPHY_SY_PADS_NUM];
+ struct mipidphy_sensor sensors[MAX_DPHY_SENSORS];
+ int num_sensors;
+ bool is_streaming;
+};
+
+static inline struct mipidphy_priv *to_dphy_priv(struct v4l2_subdev *subdev)
+{
+ return container_of(subdev, struct mipidphy_priv, sd);
+}
+
+static inline void write_reg(struct mipidphy_priv *priv, int index, u8 value)
+{
+ const struct dphy_reg *reg = &priv->grf_regs[index];
+ unsigned int val = HIWORD_UPDATE(value, reg->mask, reg->shift);
+
+ WARN_ON(!reg->offset);
+ regmap_write(priv->regmap_grf, reg->offset, val);
+}
+
+static void mipidphy_wr_reg(struct mipidphy_priv *priv,
+ u8 test_code, u8 test_data)
+{
+ /*
+ * With the falling edge on TESTCLK, the TESTDIN[7:0] signal content
+ * is latched internally as the current test code. Test data is
+ * programmed internally by rising edge on TESTCLK.
+ */
+ write_reg(priv, GRF_DPHY_RX0_TESTCLK, 1);
+ write_reg(priv, GRF_DPHY_RX0_TESTDIN, test_code);
+ write_reg(priv, GRF_DPHY_RX0_TESTEN, 1);
+ write_reg(priv, GRF_DPHY_RX0_TESTCLK, 0);
+ write_reg(priv, GRF_DPHY_RX0_TESTEN, 0);
+ write_reg(priv, GRF_DPHY_RX0_TESTDIN, test_data);
+ write_reg(priv, GRF_DPHY_RX0_TESTCLK, 1);
+}
+
+static struct v4l2_subdev *get_remote_sensor(struct v4l2_subdev *sd)
+{
+ struct media_pad *local, *remote;
+ struct media_entity *sensor_me;
+
+ local = &sd->entity.pads[MIPI_DPHY_SY_PAD_SINK];
+ remote = media_entity_remote_pad(local);
+ if (!remote) {
+ v4l2_warn(sd, "No link between dphy and sensor\n");
+ return NULL;
+ }
+
+ sensor_me = media_entity_remote_pad(local)->entity;
+ return media_entity_to_v4l2_subdev(sensor_me);
+}
+
+static struct mipidphy_sensor *sd_to_sensor(struct mipidphy_priv *priv,
+ struct v4l2_subdev *sd)
+{
+ int i;
+
+ for (i = 0; i < priv->num_sensors; ++i)
+ if (priv->sensors[i].sd == sd)
+ return &priv->sensors[i];
+
+ return NULL;
+}
+
+static int mipidphy_get_sensor_data_rate(struct v4l2_subdev *sd)
+{
+ struct mipidphy_priv *priv = to_dphy_priv(sd);
+ struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
+ struct v4l2_ctrl *link_freq;
+ struct v4l2_querymenu qm = { .id = V4L2_CID_LINK_FREQ, };
+ int ret;
+
+ link_freq = v4l2_ctrl_find(sensor_sd->ctrl_handler, V4L2_CID_LINK_FREQ);
+ if (!link_freq) {
+ v4l2_warn(sd, "No pixel rate control in subdev\n");
+ return -EPIPE;
+ }
+
+ qm.index = v4l2_ctrl_g_ctrl(link_freq);
+ ret = v4l2_querymenu(sensor_sd->ctrl_handler, &qm);
+ if (ret < 0) {
+ v4l2_err(sd, "Failed to get menu item\n");
+ return ret;
+ }
+
+ if (!qm.value) {
+ v4l2_err(sd, "Invalid link_freq\n");
+ return -EINVAL;
+ }
+ priv->data_rate_mbps = qm.value * 2;
+ do_div(priv->data_rate_mbps, 1000 * 1000);
+
+ return 0;
+}
+
+static int mipidphy_s_stream_start(struct v4l2_subdev *sd)
+{
+ struct mipidphy_priv *priv = to_dphy_priv(sd);
+ const struct dphy_drv_data *drv_data = priv->drv_data;
+ const struct hsfreq_range *hsfreq_ranges = drv_data->hsfreq_ranges;
+ int num_hsfreq_ranges = drv_data->num_hsfreq_ranges;
+ struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
+ struct mipidphy_sensor *sensor = sd_to_sensor(priv, sensor_sd);
+ int i, ret, hsfreq = 0;
+
+ if (priv->is_streaming)
+ return 0;
+
+ ret = mipidphy_get_sensor_data_rate(sd);
+ if (ret < 0)
+ return ret;
+
+ for (i = 0; i < num_hsfreq_ranges; i++) {
+ if (hsfreq_ranges[i].range_h >= priv->data_rate_mbps) {
+ hsfreq = hsfreq_ranges[i].cfg_bit;
+ break;
+ }
+ }
+
+ write_reg(priv, GRF_DPHY_RX0_FORCERXMODE, 0);
+ write_reg(priv, GRF_DPHY_RX0_FORCETXSTOPMODE, 0);
+ /* Disable lan turn around, which is ignored in receive mode */
+ write_reg(priv, GRF_DPHY_RX0_TURNREQUEST, 0);
+ write_reg(priv, GRF_DPHY_RX0_TURNDISABLE, 0xf);
+
+ write_reg(priv, GRF_DPHY_RX0_ENABLE, GENMASK(sensor->lanes - 1, 0));
+
+ /* dphy start */
+ write_reg(priv, GRF_DPHY_RX0_TESTCLK, 1);
+ write_reg(priv, GRF_DPHY_RX0_TESTCLR, 1);
+ usleep_range(100, 150);
+ write_reg(priv, GRF_DPHY_RX0_TESTCLR, 0);
+ usleep_range(100, 150);
+
+ /* set clock lane */
+ /* HS hsfreq_range & lane 0 settle bypass */
+ mipidphy_wr_reg(priv, CLOCK_LANE_HS_RX_CONTROL, 0);
+ /* HS RX Control of lane0 */
+ mipidphy_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq << 1);
+ /* HS RX Control of lane1 */
+ mipidphy_wr_reg(priv, LANE1_HS_RX_CONTROL, 0);
+ /* HS RX Control of lane2 */
+ mipidphy_wr_reg(priv, LANE2_HS_RX_CONTROL, 0);
+ /* HS RX Control of lane3 */
+ mipidphy_wr_reg(priv, LANE3_HS_RX_CONTROL, 0);
+ /* HS RX Data Lanes Settle State Time Control */
+ mipidphy_wr_reg(priv, HS_RX_DATA_LANES_THS_SETTLE__CONTROL, 0x04);
+
+ /* Normal operation */
+ mipidphy_wr_reg(priv, 0x0, 0);
+
+ priv->is_streaming = true;
+
+ return 0;
+}
+
+static int mipidphy_s_stream_stop(struct v4l2_subdev *sd)
+{
+ struct mipidphy_priv *priv = to_dphy_priv(sd);
+
+ if (!priv->is_streaming)
+ return 0;
+
+ priv->is_streaming = false;
+
+ return 0;
+}
+
+static int mipidphy_s_stream(struct v4l2_subdev *sd, int on)
+{
+ if (on)
+ return mipidphy_s_stream_start(sd);
+ else
+ return mipidphy_s_stream_stop(sd);
+}
+
+static int mipidphy_g_mbus_config(struct v4l2_subdev *sd,
+ struct v4l2_mbus_config *config)
+{
+ struct mipidphy_priv *priv = to_dphy_priv(sd);
+ struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
+ struct mipidphy_sensor *sensor = sd_to_sensor(priv, sensor_sd);
+
+ *config = sensor->mbus;
+
+ return 0;
+}
+
+static int mipidphy_s_power(struct v4l2_subdev *sd, int on)
+{
+ struct mipidphy_priv *priv = to_dphy_priv(sd);
+
+ if (on)
+ return pm_runtime_get_sync(priv->dev);
+ else
+ return pm_runtime_put(priv->dev);
+}
+
+static int mipidphy_runtime_suspend(struct device *dev)
+{
+ struct media_entity *me = dev_get_drvdata(dev);
+ struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(me);
+ struct mipidphy_priv *priv = to_dphy_priv(sd);
+ int i, num_clks;
+
+ num_clks = priv->drv_data->num_clks;
+ for (i = num_clks - 1; i >= 0; i--)
+ clk_disable_unprepare(priv->clks[i]);
+
+ return 0;
+}
+
+static int mipidphy_runtime_resume(struct device *dev)
+{
+ struct media_entity *me = dev_get_drvdata(dev);
+ struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(me);
+ struct mipidphy_priv *priv = to_dphy_priv(sd);
+ int i, num_clks, ret;
+
+ num_clks = priv->drv_data->num_clks;
+ for (i = 0; i < num_clks; i++) {
+ ret = clk_prepare_enable(priv->clks[i]);
+ if (ret < 0)
+ goto err;
+ }
+
+ return 0;
+err:
+ while (--i >= 0)
+ clk_disable_unprepare(priv->clks[i]);
+ return ret;
+}
+
+/* dphy accepts all fmt/size from sensor */
+static int mipidphy_get_set_fmt(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *fmt)
+{
+ struct v4l2_subdev *sensor = get_remote_sensor(sd);
+
+ /*
+ * Do not allow format changes and just relay whatever
+ * set currently in the sensor.
+ */
+ return v4l2_subdev_call(sensor, pad, get_fmt, NULL, fmt);
+}
+
+static const struct v4l2_subdev_pad_ops mipidphy_subdev_pad_ops = {
+ .set_fmt = mipidphy_get_set_fmt,
+ .get_fmt = mipidphy_get_set_fmt,
+};
+
+static const struct v4l2_subdev_core_ops mipidphy_core_ops = {
+ .s_power = mipidphy_s_power,
+};
+
+static const struct v4l2_subdev_video_ops mipidphy_video_ops = {
+ .g_mbus_config = mipidphy_g_mbus_config,
+ .s_stream = mipidphy_s_stream,
+};
+
+static const struct v4l2_subdev_ops mipidphy_subdev_ops = {
+ .core = &mipidphy_core_ops,
+ .video = &mipidphy_video_ops,
+ .pad = &mipidphy_subdev_pad_ops,
+};
+
+/* These tables must be sorted by .range_h ascending. */
+static const struct hsfreq_range rk3288_mipidphy_hsfreq_ranges[] = {
+ { 89, 0x00}, { 99, 0x10}, { 109, 0x20}, { 129, 0x01},
+ { 139, 0x11}, { 149, 0x21}, { 169, 0x02}, { 179, 0x12},
+ { 199, 0x22}, { 219, 0x03}, { 239, 0x13}, { 249, 0x23},
+ { 269, 0x04}, { 299, 0x14}, { 329, 0x05}, { 359, 0x15},
+ { 399, 0x25}, { 449, 0x06}, { 499, 0x16}, { 549, 0x07},
+ { 599, 0x17}, { 649, 0x08}, { 699, 0x18}, { 749, 0x09},
+ { 799, 0x19}, { 849, 0x29}, { 899, 0x39}, { 949, 0x0a},
+ { 999, 0x1a}
+};
+
+static const struct hsfreq_range rk3399_mipidphy_hsfreq_ranges[] = {
+ { 89, 0x00}, { 99, 0x10}, { 109, 0x20}, { 129, 0x01},
+ { 139, 0x11}, { 149, 0x21}, { 169, 0x02}, { 179, 0x12},
+ { 199, 0x22}, { 219, 0x03}, { 239, 0x13}, { 249, 0x23},
+ { 269, 0x04}, { 299, 0x14}, { 329, 0x05}, { 359, 0x15},
+ { 399, 0x25}, { 449, 0x06}, { 499, 0x16}, { 549, 0x07},
+ { 599, 0x17}, { 649, 0x08}, { 699, 0x18}, { 749, 0x09},
+ { 799, 0x19}, { 849, 0x29}, { 899, 0x39}, { 949, 0x0a},
+ { 999, 0x1a}, {1049, 0x2a}, {1099, 0x3a}, {1149, 0x0b},
+ {1199, 0x1b}, {1249, 0x2b}, {1299, 0x3b}, {1349, 0x0c},
+ {1399, 0x1c}, {1449, 0x2c}, {1500, 0x3c}
+};
+
+static const char * const rk3399_mipidphy_clks[] = {
+ "dphy-ref",
+ "dphy-cfg",
+ "grf",
+};
+
+static const char * const rk3288_mipidphy_clks[] = {
+ "dphy-ref",
+ "pclk",
+};
+
+static const struct dphy_drv_data rk3288_mipidphy_drv_data = {
+ .clks = rk3288_mipidphy_clks,
+ .num_clks = ARRAY_SIZE(rk3288_mipidphy_clks),
+ .hsfreq_ranges = rk3288_mipidphy_hsfreq_ranges,
+ .num_hsfreq_ranges = ARRAY_SIZE(rk3288_mipidphy_hsfreq_ranges),
+ .regs = rk3288_grf_dphy_regs,
+};
+
+static const struct dphy_drv_data rk3399_mipidphy_drv_data = {
+ .clks = rk3399_mipidphy_clks,
+ .num_clks = ARRAY_SIZE(rk3399_mipidphy_clks),
+ .hsfreq_ranges = rk3399_mipidphy_hsfreq_ranges,
+ .num_hsfreq_ranges = ARRAY_SIZE(rk3399_mipidphy_hsfreq_ranges),
+ .regs = rk3399_grf_dphy_regs,
+};
+
+static const struct of_device_id rockchip_mipidphy_match_id[] = {
+ {
+ .compatible = "rockchip,rk3399-mipi-dphy",
+ .data = &rk3399_mipidphy_drv_data,
+ },
+ {
+ .compatible = "rockchip,rk3288-mipi-dphy",
+ .data = &rk3288_mipidphy_drv_data,
+ },
+ {}
+};
+MODULE_DEVICE_TABLE(of, rockchip_mipidphy_match_id);
+
+/* The .bound() notifier callback when a match is found */
+static int
+rockchip_mipidphy_notifier_bound(struct v4l2_async_notifier *notifier,
+ struct v4l2_subdev *sd,
+ struct v4l2_async_subdev *asd)
+{
+ struct mipidphy_priv *priv = container_of(notifier,
+ struct mipidphy_priv,
+ notifier);
+ struct sensor_async_subdev *s_asd = container_of(asd,
+ struct sensor_async_subdev, asd);
+ struct mipidphy_sensor *sensor;
+ unsigned int pad, ret;
+
+ if (priv->num_sensors == ARRAY_SIZE(priv->sensors))
+ return -EBUSY;
+
+ sensor = &priv->sensors[priv->num_sensors++];
+ sensor->lanes = s_asd->lanes;
+ sensor->mbus = s_asd->mbus;
+ sensor->sd = sd;
+
+ for (pad = 0; pad < sensor->sd->entity.num_pads; pad++)
+ if (sensor->sd->entity.pads[pad].flags
+ & MEDIA_PAD_FL_SOURCE)
+ break;
+
+ if (pad == sensor->sd->entity.num_pads) {
+ dev_err(priv->dev,
+ "failed to find src pad for %s\n",
+ sensor->sd->name);
+
+ return -ENXIO;
+ }
+
+ ret = media_create_pad_link(
+ &sensor->sd->entity, pad,
+ &priv->sd.entity, MIPI_DPHY_SY_PAD_SINK,
+ priv->num_sensors != 1 ? 0 : MEDIA_LNK_FL_ENABLED);
+ if (ret) {
+ dev_err(priv->dev,
+ "failed to create link for %s\n",
+ sensor->sd->name);
+ return ret;
+ }
+
+ return 0;
+}
+
+/* The .unbind callback */
+static void
+rockchip_mipidphy_notifier_unbind(struct v4l2_async_notifier *notifier,
+ struct v4l2_subdev *sd,
+ struct v4l2_async_subdev *asd)
+{
+ struct mipidphy_priv *priv = container_of(notifier,
+ struct mipidphy_priv,
+ notifier);
+ struct mipidphy_sensor *sensor = sd_to_sensor(priv, sd);
+
+ sensor->sd = NULL;
+}
+
+static const struct
+v4l2_async_notifier_operations rockchip_mipidphy_async_ops = {
+ .bound = rockchip_mipidphy_notifier_bound,
+ .unbind = rockchip_mipidphy_notifier_unbind,
+};
+
+static int rockchip_mipidphy_fwnode_parse(struct device *dev,
+ struct v4l2_fwnode_endpoint *vep,
+ struct v4l2_async_subdev *asd)
+{
+ struct sensor_async_subdev *s_asd =
+ container_of(asd, struct sensor_async_subdev, asd);
+ struct v4l2_mbus_config *config = &s_asd->mbus;
+
+ if (vep->bus_type != V4L2_MBUS_CSI2) {
+ dev_err(dev, "Only CSI2 bus type is currently supported\n");
+ return -EINVAL;
+ }
+
+ if (vep->base.port != 0) {
+ dev_err(dev, "The PHY has only port 0\n");
+ return -EINVAL;
+ }
+
+ config->type = V4L2_MBUS_CSI2;
+ config->flags = vep->bus.mipi_csi2.flags;
+ s_asd->lanes = vep->bus.mipi_csi2.num_data_lanes;
+
+ switch (vep->bus.mipi_csi2.num_data_lanes) {
+ case 1:
+ config->flags |= V4L2_MBUS_CSI2_1_LANE;
+ break;
+ case 2:
+ config->flags |= V4L2_MBUS_CSI2_2_LANE;
+ break;
+ case 3:
+ config->flags |= V4L2_MBUS_CSI2_3_LANE;
+ break;
+ case 4:
+ config->flags |= V4L2_MBUS_CSI2_4_LANE;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int rockchip_mipidphy_media_init(struct mipidphy_priv *priv)
+{
+ int ret;
+
+ priv->pads[MIPI_DPHY_SY_PAD_SOURCE].flags =
+ MEDIA_PAD_FL_SOURCE | MEDIA_PAD_FL_MUST_CONNECT;
+ priv->pads[MIPI_DPHY_SY_PAD_SINK].flags =
+ MEDIA_PAD_FL_SINK | MEDIA_PAD_FL_MUST_CONNECT;
+
+ ret = media_entity_pads_init(&priv->sd.entity,
+ MIPI_DPHY_SY_PADS_NUM, priv->pads);
+ if (ret < 0)
+ return ret;
+
+ ret = v4l2_async_notifier_parse_fwnode_endpoints_by_port(
+ priv->dev, &priv->notifier,
+ sizeof(struct sensor_async_subdev), 0,
+ rockchip_mipidphy_fwnode_parse);
+ if (ret < 0)
+ return ret;
+
+ if (!priv->notifier.num_subdevs)
+ return -ENODEV; /* no endpoint */
+
+ priv->sd.subdev_notifier = &priv->notifier;
+ priv->notifier.ops = &rockchip_mipidphy_async_ops;
+ ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
+ if (ret) {
+ dev_err(priv->dev,
+ "failed to register async notifier : %d\n", ret);
+ v4l2_async_notifier_cleanup(&priv->notifier);
+ return ret;
+ }
+
+ return v4l2_async_register_subdev(&priv->sd);
+}
+
+static int rockchip_mipidphy_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct v4l2_subdev *sd;
+ struct mipidphy_priv *priv;
+ struct regmap *grf;
+ const struct of_device_id *of_id;
+ const struct dphy_drv_data *drv_data;
+ int i, ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+ priv->dev = dev;
+
+ of_id = of_match_device(rockchip_mipidphy_match_id, dev);
+ if (!of_id)
+ return -EINVAL;
+
+ grf = syscon_node_to_regmap(dev->parent->of_node);
+ if (IS_ERR(grf)) {
+ dev_err(dev, "Can't find GRF syscon\n");
+ return -ENODEV;
+ }
+ priv->regmap_grf = grf;
+
+ drv_data = of_id->data;
+ for (i = 0; i < drv_data->num_clks; i++) {
+ priv->clks[i] = devm_clk_get(dev, drv_data->clks[i]);
+
+ if (IS_ERR(priv->clks[i])) {
+ dev_err(dev, "Failed to get %s\n", drv_data->clks[i]);
+ return PTR_ERR(priv->clks[i]);
+ }
+ }
+
+ priv->grf_regs = drv_data->regs;
+ priv->drv_data = drv_data;
+
+ sd = &priv->sd;
+ v4l2_subdev_init(sd, &mipidphy_subdev_ops);
+ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ snprintf(sd->name, sizeof(sd->name), "rockchip-sy-mipi-dphy");
+ sd->dev = dev;
+
+ platform_set_drvdata(pdev, &sd->entity);
+
+ ret = rockchip_mipidphy_media_init(priv);
+ if (ret < 0)
+ return ret;
+
+ pm_runtime_enable(&pdev->dev);
+
+ return 0;
+}
+
+static int rockchip_mipidphy_remove(struct platform_device *pdev)
+{
+ struct media_entity *me = platform_get_drvdata(pdev);
+ struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(me);
+
+ media_entity_cleanup(&sd->entity);
+
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+}
+
+static const struct dev_pm_ops rockchip_mipidphy_pm_ops = {
+ SET_RUNTIME_PM_OPS(mipidphy_runtime_suspend,
+ mipidphy_runtime_resume, NULL)
+};
+
+static struct platform_driver rockchip_isp_mipidphy_driver = {
+ .probe = rockchip_mipidphy_probe,
+ .remove = rockchip_mipidphy_remove,
+ .driver = {
+ .name = "rockchip-sy-mipi-dphy",
+ .pm = &rockchip_mipidphy_pm_ops,
+ .of_match_table = rockchip_mipidphy_match_id,
+ },
+};
+
+module_platform_driver(rockchip_isp_mipidphy_driver);
+MODULE_AUTHOR("Rockchip Camera/ISP team");
+MODULE_DESCRIPTION("Rockchip MIPI DPHY driver");
+MODULE_LICENSE("Dual BSD/GPL");
--
1.9.1
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