* [PATCH 04/12] ASoC: mediatek: update clock related properties of MT2701 AFE
From: Ryder Lee @ 2018-01-02 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514881870.git.ryder.lee@mediatek.com>
Add 'assigned-clocks*' properties which are used to initialize default
domain sources of audio system. we could configure different sets of
input clocks through DTS now. Hence driver no longer cares about that.
Also we change some 'clock-names' to make them more generic so that
other chips can reuse gracefully.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
.../devicetree/bindings/sound/mt2701-afe-pcm.txt | 207 +++++++++------------
1 file changed, 91 insertions(+), 116 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt
index 77a57f8..0450baa 100644
--- a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt
+++ b/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt
@@ -6,51 +6,44 @@ Required properties:
- interrupts: should contain AFE and ASYS interrupts
- interrupt-names: should be "afe" and "asys"
- power-domains: should define the power domain
+- clocks: Must contain an entry for each entry in clock-names
+ See ../clocks/clock-bindings.txt for details
- clock-names: should have these clock names:
- "infra_sys_audio_clk",
"top_audio_mux1_sel",
"top_audio_mux2_sel",
- "top_audio_mux1_div",
- "top_audio_mux2_div",
- "top_audio_48k_timing",
- "top_audio_44k_timing",
- "top_audpll_mux_sel",
- "top_apll_sel",
- "top_aud1_pll_98M",
- "top_aud2_pll_90M",
- "top_hadds2_pll_98M",
- "top_hadds2_pll_294M",
- "top_audpll",
- "top_audpll_d4",
- "top_audpll_d8",
- "top_audpll_d16",
- "top_audpll_d24",
- "top_audintbus_sel",
- "clk_26m",
- "top_syspll1_d4",
- "top_aud_k1_src_sel",
- "top_aud_k2_src_sel",
- "top_aud_k3_src_sel",
- "top_aud_k4_src_sel",
- "top_aud_k5_src_sel",
- "top_aud_k6_src_sel",
- "top_aud_k1_src_div",
- "top_aud_k2_src_div",
- "top_aud_k3_src_div",
- "top_aud_k4_src_div",
- "top_aud_k5_src_div",
- "top_aud_k6_src_div",
- "top_aud_i2s1_mclk",
- "top_aud_i2s2_mclk",
- "top_aud_i2s3_mclk",
- "top_aud_i2s4_mclk",
- "top_aud_i2s5_mclk",
- "top_aud_i2s6_mclk",
- "top_asm_m_sel",
- "top_asm_h_sel",
- "top_univpll2_d4",
- "top_univpll2_d2",
- "top_syspll_d5";
+ "i2s0_src_sel",
+ "i2s1_src_sel",
+ "i2s2_src_sel",
+ "i2s3_src_sel",
+ "i2s0_src_div",
+ "i2s1_src_div",
+ "i2s2_src_div",
+ "i2s3_src_div",
+ "i2s0_mclk_en",
+ "i2s1_mclk_en",
+ "i2s2_mclk_en",
+ "i2s3_mclk_en",
+ "i2so0_hop_ck",
+ "i2so1_hop_ck",
+ "i2so2_hop_ck",
+ "i2so3_hop_ck",
+ "i2si0_hop_ck",
+ "i2si1_hop_ck",
+ "i2si2_hop_ck",
+ "i2si3_hop_ck",
+ "asrc0_out_ck",
+ "asrc1_out_ck",
+ "asrc2_out_ck",
+ "asrc3_out_ck",
+ "audio_afe_pd",
+ "audio_afe_conn_pd",
+ "audio_a1sys_pd",
+ "audio_a2sys_pd",
+ "audio_mrgif_pd";
+- assigned-clocks: list of input clocks and dividers for the audio system.
+ See ../clocks/clock-bindings.txt for details.
+- assigned-clocks-parents: parent of input clocks of assigned clocks.
+- assigned-clock-rates: list of clock frequencies of assigned clocks.
Example:
@@ -62,93 +55,75 @@ Example:
<GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "afe", "asys";
power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
- clocks = <&infracfg CLK_INFRA_AUDIO>,
- <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
<&topckgen CLK_TOP_AUD_MUX2_SEL>,
- <&topckgen CLK_TOP_AUD_MUX1_DIV>,
- <&topckgen CLK_TOP_AUD_MUX2_DIV>,
- <&topckgen CLK_TOP_AUD_48K_TIMING>,
- <&topckgen CLK_TOP_AUD_44K_TIMING>,
- <&topckgen CLK_TOP_AUDPLL_MUX_SEL>,
- <&topckgen CLK_TOP_APLL_SEL>,
- <&topckgen CLK_TOP_AUD1PLL_98M>,
- <&topckgen CLK_TOP_AUD2PLL_90M>,
- <&topckgen CLK_TOP_HADDS2PLL_98M>,
- <&topckgen CLK_TOP_HADDS2PLL_294M>,
- <&topckgen CLK_TOP_AUDPLL>,
- <&topckgen CLK_TOP_AUDPLL_D4>,
- <&topckgen CLK_TOP_AUDPLL_D8>,
- <&topckgen CLK_TOP_AUDPLL_D16>,
- <&topckgen CLK_TOP_AUDPLL_D24>,
- <&topckgen CLK_TOP_AUDINTBUS_SEL>,
- <&clk26m>,
- <&topckgen CLK_TOP_SYSPLL1_D4>,
<&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
<&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
<&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
<&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K5_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K6_SRC_SEL>,
<&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
<&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
<&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
<&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K5_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K6_SRC_DIV>,
<&topckgen CLK_TOP_AUD_I2S1_MCLK>,
<&topckgen CLK_TOP_AUD_I2S2_MCLK>,
<&topckgen CLK_TOP_AUD_I2S3_MCLK>,
<&topckgen CLK_TOP_AUD_I2S4_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S5_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S6_MCLK>,
- <&topckgen CLK_TOP_ASM_M_SEL>,
- <&topckgen CLK_TOP_ASM_H_SEL>,
- <&topckgen CLK_TOP_UNIVPLL2_D4>,
- <&topckgen CLK_TOP_UNIVPLL2_D2>,
- <&topckgen CLK_TOP_SYSPLL_D5>;
+ <&audiosys CLK_AUD_I2SO1>,
+ <&audiosys CLK_AUD_I2SO2>,
+ <&audiosys CLK_AUD_I2SO3>,
+ <&audiosys CLK_AUD_I2SO4>,
+ <&audiosys CLK_AUD_I2SIN1>,
+ <&audiosys CLK_AUD_I2SIN2>,
+ <&audiosys CLK_AUD_I2SIN3>,
+ <&audiosys CLK_AUD_I2SIN4>,
+ <&audiosys CLK_AUD_ASRCO1>,
+ <&audiosys CLK_AUD_ASRCO2>,
+ <&audiosys CLK_AUD_ASRCO3>,
+ <&audiosys CLK_AUD_ASRCO4>,
+ <&audiosys CLK_AUD_AFE>,
+ <&audiosys CLK_AUD_AFE_CONN>,
+ <&audiosys CLK_AUD_A1SYS>,
+ <&audiosys CLK_AUD_A2SYS>,
+ <&audiosys CLK_AUD_AFE_MRGIF>;
- clock-names = "infra_sys_audio_clk",
- "top_audio_mux1_sel",
+ clock-names = "top_audio_mux1_sel",
"top_audio_mux2_sel",
- "top_audio_mux1_div",
- "top_audio_mux2_div",
- "top_audio_48k_timing",
- "top_audio_44k_timing",
- "top_audpll_mux_sel",
- "top_apll_sel",
- "top_aud1_pll_98M",
- "top_aud2_pll_90M",
- "top_hadds2_pll_98M",
- "top_hadds2_pll_294M",
- "top_audpll",
- "top_audpll_d4",
- "top_audpll_d8",
- "top_audpll_d16",
- "top_audpll_d24",
- "top_audintbus_sel",
- "clk_26m",
- "top_syspll1_d4",
- "top_aud_k1_src_sel",
- "top_aud_k2_src_sel",
- "top_aud_k3_src_sel",
- "top_aud_k4_src_sel",
- "top_aud_k5_src_sel",
- "top_aud_k6_src_sel",
- "top_aud_k1_src_div",
- "top_aud_k2_src_div",
- "top_aud_k3_src_div",
- "top_aud_k4_src_div",
- "top_aud_k5_src_div",
- "top_aud_k6_src_div",
- "top_aud_i2s1_mclk",
- "top_aud_i2s2_mclk",
- "top_aud_i2s3_mclk",
- "top_aud_i2s4_mclk",
- "top_aud_i2s5_mclk",
- "top_aud_i2s6_mclk",
- "top_asm_m_sel",
- "top_asm_h_sel",
- "top_univpll2_d4",
- "top_univpll2_d2",
- "top_syspll_d5";
+ "i2s0_src_sel",
+ "i2s1_src_sel",
+ "i2s2_src_sel",
+ "i2s3_src_sel",
+ "i2s0_src_div",
+ "i2s1_src_div",
+ "i2s2_src_div",
+ "i2s3_src_div",
+ "i2s0_mclk_en",
+ "i2s1_mclk_en",
+ "i2s2_mclk_en",
+ "i2s3_mclk_en",
+ "i2so0_hop_ck",
+ "i2so1_hop_ck",
+ "i2so2_hop_ck",
+ "i2so3_hop_ck",
+ "i2si0_hop_ck",
+ "i2si1_hop_ck",
+ "i2si2_hop_ck",
+ "i2si3_hop_ck",
+ "asrc0_out_ck",
+ "asrc1_out_ck",
+ "asrc2_out_ck",
+ "asrc3_out_ck",
+ "audio_afe_pd",
+ "audio_afe_conn_pd",
+ "audio_a1sys_pd",
+ "audio_a2sys_pd",
+ "audio_mrgif_pd";
+
+ assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX1_DIV>,
+ <&topckgen CLK_TOP_AUD_MUX2_DIV>;
+ assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
+ <&topckgen CLK_TOP_AUD2PLL_90M>;
+ assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
};
--
1.9.1
^ permalink raw reply related
* [PATCH 05/12] mfd: mtk-audsys: add MediaTek audio subsystem driver
From: Ryder Lee @ 2018-01-02 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514881870.git.ryder.lee@mediatek.com>
Add a common driver for the top block of the MediaTek audio subsystem.
This is a wrapper which manages resources for audio components.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
drivers/mfd/Kconfig | 9 ++++
drivers/mfd/Makefile | 2 +
drivers/mfd/mtk-audsys.c | 138 +++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 149 insertions(+)
create mode 100644 drivers/mfd/mtk-audsys.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 1d20a80..ea50b51 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -368,6 +368,15 @@ config MFD_MC13XXX_I2C
help
Select this if your MC13xxx is connected via an I2C bus.
+config MFD_MEDIATEK_AUDSYS
+ tristate "MediaTek audio subsystem interface"
+ select MDF_CORE
+ select REGMAP_MMIO
+ help
+ Select this if you have a audio subsystem in MediaTek SoC.
+ The audio subsystem has at least a clock driver part and some
+ audio components.
+
config MFD_MXS_LRADC
tristate "Freescale i.MX23/i.MX28 LRADC"
depends on ARCH_MXS || COMPILE_TEST
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index d9474ad..3e20927 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -101,6 +101,8 @@ obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o
obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o
obj-$(CONFIG_MFD_MC13XXX_I2C) += mc13xxx-i2c.o
+obj-$(CONFIG_MFD_MEDIATEK_AUDSYS) += mtk-audsys.o
+
obj-$(CONFIG_MFD_CORE) += mfd-core.o
obj-$(CONFIG_EZX_PCAP) += ezx-pcap.o
diff --git a/drivers/mfd/mtk-audsys.c b/drivers/mfd/mtk-audsys.c
new file mode 100644
index 0000000..89399e1
--- /dev/null
+++ b/drivers/mfd/mtk-audsys.c
@@ -0,0 +1,138 @@
+/*
+ * Mediatek audio subsystem core driver
+ *
+ * Copyright (c) 2017 MediaTek Inc.
+ *
+ * Author: Ryder Lee <ryder.lee@mediatek.com>
+ *
+ * For licencing details see kernel-base/COPYING
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define AUDSYS_MAX_CLK_NUM 3
+
+struct sys_dev {
+ struct device *dev;
+ struct regmap *regmap;
+ int clk_num;
+ struct clk *clks[];
+};
+
+static const struct regmap_config aud_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = 0x15e0,
+ .cache_type = REGCACHE_NONE,
+};
+
+static int mtk_subsys_enable(struct sys_dev *sys)
+{
+ struct device *dev = sys->dev;
+ struct clk *clk;
+ int i, ret;
+
+ for (i = 0; i < sys->clk_num; i++) {
+ clk = of_clk_get(dev->of_node, i);
+ if (IS_ERR(clk)) {
+ if (PTR_ERR(clk) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ break;
+ }
+ sys->clks[i] = clk;
+ }
+
+ for (i = 0; i < sys->clk_num && sys->clks[i]; i++) {
+ ret = clk_prepare_enable(sys->clks[i]);
+ if (ret)
+ goto err_enable_clks;
+ }
+
+ return 0;
+
+err_enable_clks:
+ while (--i >= 0)
+ clk_disable_unprepare(sys->clks[i]);
+
+ return ret;
+}
+
+static int mtk_subsys_probe(struct platform_device *pdev)
+{
+ struct sys_dev *sys;
+ struct resource *res;
+ void __iomem *mmio;
+ int num, ret;
+
+ num = (int)of_device_get_match_data(&pdev->dev);
+ if (!num)
+ return -EINVAL;
+
+ sys = devm_kzalloc(&pdev->dev, sizeof(*sys) +
+ sizeof(struct clk *) * num, GFP_KERNEL);
+ if (!sys)
+ return -ENOMEM;
+
+ sys->clk_num = num;
+ sys->dev = &pdev->dev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mmio = devm_ioremap_resource(sys->dev, res);
+ if (IS_ERR(mmio))
+ return PTR_ERR(mmio);
+
+ sys->regmap = devm_regmap_init_mmio(sys->dev, mmio,
+ &aud_regmap_config);
+ if (IS_ERR(sys->regmap))
+ return PTR_ERR(sys->regmap);
+
+ platform_set_drvdata(pdev, sys);
+
+ /* Enable top level clocks */
+ ret = mtk_subsys_enable(sys);
+ if (ret)
+ return ret;
+
+ return devm_of_platform_populate(sys->dev);
+};
+
+static int mtk_subsys_remove(struct platform_device *pdev)
+{
+ struct sys_dev *sys = platform_get_drvdata(pdev);
+ int i;
+
+ for (i = sys->clk_num - 1; i >= 0; i--)
+ if (sys->clks[i])
+ clk_disable_unprepare(sys->clks[i]);
+
+ return 0;
+}
+
+static const struct of_device_id of_match_audsys[] = {
+ {
+ .compatible = "mediatek,mt2701-audsys-core",
+ .data = (void *)AUDSYS_MAX_CLK_NUM,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(platform, of_match_audsys);
+
+static struct platform_driver audsys_drv = {
+ .probe = mtk_subsys_probe,
+ .remove = mtk_subsys_remove,
+ .driver = {
+ .name = "mediatek-audsys-core",
+ .of_match_table = of_match_ptr(of_match_audsys),
+ },
+};
+
+builtin_platform_driver(audsys_drv);
+
+MODULE_DESCRIPTION("Mediatek audio subsystem core driver");
+MODULE_LICENSE("GPL");
--
1.9.1
^ permalink raw reply related
* [PATCH 06/12] mfd: add DT bindings for MedaiTek audio subsystem
From: Ryder Lee @ 2018-01-02 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514881870.git.ryder.lee@mediatek.com>
This patch adds documentation of the DT bindings for the MediaTek
audio subsystem wrapper.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
.../devicetree/bindings/mfd/mtk-audsys.txt | 109 +++++++++++++++++++++
1 file changed, 109 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/mtk-audsys.txt
diff --git a/Documentation/devicetree/bindings/mfd/mtk-audsys.txt b/Documentation/devicetree/bindings/mfd/mtk-audsys.txt
new file mode 100644
index 0000000..7739580
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/mtk-audsys.txt
@@ -0,0 +1,109 @@
+MediaTek Audio Subsystem Wrapper
+
+Required properties:
+- compatible: Should be "mediatek,mt2701-audsys-core".
+- reg: Should contain the device's region location and size.
+- clocks: Must contain an entry for each entry in clock-names.
+ See ../clocks/clock-bindings.txt for details.
+- clock-names: Should contain "infra_aud", "top_a1sys", "top_a2sys".
+
+Required subnodes are described in:
+- ../sound/mt2701-afe-pcm.txt.
+- ../arm/mediatek/mediatek,audsys.txt.
+
+Example:
+
+ audio-subsystm at 11220000 {
+ compatible = "mediatek,mt2701-audsys-core";
+ reg = <0 0x11220000 0 0x2000>,
+ <0 0x112a0000 0 0x20000>;
+ clocks = <&infracfg CLK_INFRA_AUDIO>,
+ <&topckgen CLK_TOP_AUD_48K_TIMING>,
+ <&topckgen CLK_TOP_AUD_44K_TIMING>;
+ clock-names = "infra_aud", "top_a1sys", "top_a2sys";
+
+ audsys: clock {
+ compatible = "mediatek,mt2701-audsys";
+ #clock-cells = <1>;
+ };
+
+ afe: audio {
+ compatible = "mediatek,mt2701-audio";
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "afe", "asys";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+
+ clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
+ <&audsys CLK_AUD_I2SO1>,
+ <&audsys CLK_AUD_I2SO2>,
+ <&audsys CLK_AUD_I2SO3>,
+ <&audsys CLK_AUD_I2SO4>,
+ <&audsys CLK_AUD_I2SIN1>,
+ <&audsys CLK_AUD_I2SIN2>,
+ <&audsys CLK_AUD_I2SIN3>,
+ <&audsys CLK_AUD_I2SIN4>,
+ <&audsys CLK_AUD_ASRCO1>,
+ <&audsys CLK_AUD_ASRCO2>,
+ <&audsys CLK_AUD_ASRCO3>,
+ <&audsys CLK_AUD_ASRCO4>,
+ <&audsys CLK_AUD_AFE>,
+ <&audsys CLK_AUD_AFE_CONN>,
+ <&audsys CLK_AUD_A1SYS>,
+ <&audsys CLK_AUD_A2SYS>,
+ <&audsys CLK_AUD_AFE_MRGIF>;
+
+ clock-names = "top_audio_mux1_sel",
+ "top_audio_mux2_sel",
+ "i2s0_src_sel",
+ "i2s1_src_sel",
+ "i2s2_src_sel",
+ "i2s3_src_sel",
+ "i2s0_src_div",
+ "i2s1_src_div",
+ "i2s2_src_div",
+ "i2s3_src_div",
+ "i2s0_mclk_en",
+ "i2s1_mclk_en",
+ "i2s2_mclk_en",
+ "i2s3_mclk_en",
+ "i2so0_hop_ck",
+ "i2so1_hop_ck",
+ "i2so2_hop_ck",
+ "i2so3_hop_ck",
+ "i2si0_hop_ck",
+ "i2si1_hop_ck",
+ "i2si2_hop_ck",
+ "i2si3_hop_ck",
+ "asrc0_out_ck",
+ "asrc1_out_ck",
+ "asrc2_out_ck",
+ "asrc3_out_ck",
+ "audio_afe_pd",
+ "audio_afe_conn_pd",
+ "audio_a1sys_pd",
+ "audio_a2sys_pd",
+ "audio_mrgif_pd";
+
+ assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX1_DIV>,
+ <&topckgen CLK_TOP_AUD_MUX2_DIV>;
+ assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
+ <&topckgen CLK_TOP_AUD2PLL_90M>;
+ assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
+ };
+ };
--
1.9.1
^ permalink raw reply related
* [PATCH 07/12] ASoC: mediatek: modify MT2701 AFE driver to adapt subsystem wrapper
From: Ryder Lee @ 2018-01-02 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514881870.git.ryder.lee@mediatek.com>
As the new audio subsystem wrapper is in place, modify MT2701 AFE driver
to adapt it.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
sound/soc/mediatek/mt2701/mt2701-afe-pcm.c | 42 ++++++++++++------------------
sound/soc/mediatek/mt2701/mt2701-reg.h | 1 -
2 files changed, 17 insertions(+), 26 deletions(-)
diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
index 0edadca..de4ce3a 100644
--- a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
+++ b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
@@ -1368,14 +1368,6 @@ static int mt2701_irq_fs(struct snd_pcm_substream *substream, unsigned int rate)
},
};
-static const struct regmap_config mt2701_afe_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = AFE_END_ADDR,
- .cache_type = REGCACHE_NONE,
-};
-
static irqreturn_t mt2701_asys_isr(int irq_id, void *dev)
{
int id;
@@ -1414,9 +1406,9 @@ static int mt2701_afe_runtime_resume(struct device *dev)
static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
{
+ struct snd_soc_component *component;
struct mtk_base_afe *afe;
struct mt2701_afe_private *afe_priv;
- struct resource *res;
struct device *dev;
int i, irq_id, ret;
@@ -1446,17 +1438,9 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
return ret;
}
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-
- afe->base_addr = devm_ioremap_resource(&pdev->dev, res);
-
- if (IS_ERR(afe->base_addr))
- return PTR_ERR(afe->base_addr);
-
- afe->regmap = devm_regmap_init_mmio(&pdev->dev, afe->base_addr,
- &mt2701_afe_regmap_config);
- if (IS_ERR(afe->regmap))
- return PTR_ERR(afe->regmap);
+ afe->regmap = dev_get_regmap(dev->parent, NULL);
+ if (!afe->regmap)
+ return -ENODEV;
mutex_init(&afe->irq_alloc_lock);
@@ -1490,6 +1474,12 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
= &mt2701_i2s_data[i][I2S_IN];
}
+ component = kzalloc(sizeof(*component), GFP_KERNEL);
+ if (!component)
+ return -ENOMEM;
+
+ component->regmap = afe->regmap;
+
afe->mtk_afe_hardware = &mt2701_afe_hardware;
afe->memif_fs = mt2701_memif_fs;
afe->irq_fs = mt2701_irq_fs;
@@ -1502,7 +1492,7 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
ret = mt2701_init_clock(afe);
if (ret) {
dev_err(dev, "init clock error\n");
- return ret;
+ goto err_init_clock;
}
platform_set_drvdata(pdev, afe);
@@ -1521,10 +1511,10 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
goto err_platform;
}
- ret = snd_soc_register_component(&pdev->dev,
- &mt2701_afe_pcm_dai_component,
- mt2701_afe_pcm_dais,
- ARRAY_SIZE(mt2701_afe_pcm_dais));
+ ret = snd_soc_add_component(dev, component,
+ &mt2701_afe_pcm_dai_component,
+ mt2701_afe_pcm_dais,
+ ARRAY_SIZE(mt2701_afe_pcm_dais));
if (ret) {
dev_warn(dev, "err_dai_component\n");
goto err_dai_component;
@@ -1538,6 +1528,8 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
pm_runtime_put_sync(dev);
err_pm_disable:
pm_runtime_disable(dev);
+err_init_clock:
+ kfree(component);
return ret;
}
diff --git a/sound/soc/mediatek/mt2701/mt2701-reg.h b/sound/soc/mediatek/mt2701/mt2701-reg.h
index f17c76f..18e6769 100644
--- a/sound/soc/mediatek/mt2701/mt2701-reg.h
+++ b/sound/soc/mediatek/mt2701/mt2701-reg.h
@@ -145,5 +145,4 @@
#define ASYS_I2S_CON_WIDE_MODE_SET(x) ((x) << 1)
#define ASYS_I2S_IN_PHASE_FIX (0x1 << 31)
-#define AFE_END_ADDR 0x15e0
#endif
--
1.9.1
^ permalink raw reply related
* [PATCH 08/12] ASoC: mediatek: modify documentation to adapt subsystem wrapper
From: Ryder Lee @ 2018-01-02 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514881870.git.ryder.lee@mediatek.com>
As the new audio subsystem wrapper is in place, modify documentation
to adapt it.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
.../devicetree/bindings/sound/mt2701-afe-pcm.txt | 160 +++++++++++----------
1 file changed, 82 insertions(+), 78 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt
index 0450baa..00d3059 100644
--- a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt
+++ b/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt
@@ -2,7 +2,6 @@ Mediatek AFE PCM controller for mt2701
Required properties:
- compatible = "mediatek,mt2701-audio";
-- reg: register location and size
- interrupts: should contain AFE and ASYS interrupts
- interrupt-names: should be "afe" and "asys"
- power-domains: should define the power domain
@@ -45,85 +44,90 @@ Required properties:
- assigned-clocks-parents: parent of input clocks of assigned clocks.
- assigned-clock-rates: list of clock frequencies of assigned clocks.
+Must be a subnode of MediaTek Audio Subsystem device tree node.
+See ../mfd/mtk-audsys.txt for details about the parent node.
+
Example:
- afe: mt2701-afe-pcm at 11220000 {
- compatible = "mediatek,mt2701-audio";
- reg = <0 0x11220000 0 0x2000>,
- <0 0x112A0000 0 0x20000>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "afe", "asys";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
- clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
- <&topckgen CLK_TOP_AUD_MUX2_SEL>,
- <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
- <&audiosys CLK_AUD_I2SO1>,
- <&audiosys CLK_AUD_I2SO2>,
- <&audiosys CLK_AUD_I2SO3>,
- <&audiosys CLK_AUD_I2SO4>,
- <&audiosys CLK_AUD_I2SIN1>,
- <&audiosys CLK_AUD_I2SIN2>,
- <&audiosys CLK_AUD_I2SIN3>,
- <&audiosys CLK_AUD_I2SIN4>,
- <&audiosys CLK_AUD_ASRCO1>,
- <&audiosys CLK_AUD_ASRCO2>,
- <&audiosys CLK_AUD_ASRCO3>,
- <&audiosys CLK_AUD_ASRCO4>,
- <&audiosys CLK_AUD_AFE>,
- <&audiosys CLK_AUD_AFE_CONN>,
- <&audiosys CLK_AUD_A1SYS>,
- <&audiosys CLK_AUD_A2SYS>,
- <&audiosys CLK_AUD_AFE_MRGIF>;
+ audio-subsystm at 11220000 {
+ compatible = "mediatek,mt2701-audsys-core";
+ ...
+ afe: audio {
+ compatible = "mediatek,mt2701-audio";
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "afe", "asys";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+ clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
+ <&audiosys CLK_AUD_I2SO1>,
+ <&audiosys CLK_AUD_I2SO2>,
+ <&audiosys CLK_AUD_I2SO3>,
+ <&audiosys CLK_AUD_I2SO4>,
+ <&audiosys CLK_AUD_I2SIN1>,
+ <&audiosys CLK_AUD_I2SIN2>,
+ <&audiosys CLK_AUD_I2SIN3>,
+ <&audiosys CLK_AUD_I2SIN4>,
+ <&audiosys CLK_AUD_ASRCO1>,
+ <&audiosys CLK_AUD_ASRCO2>,
+ <&audiosys CLK_AUD_ASRCO3>,
+ <&audiosys CLK_AUD_ASRCO4>,
+ <&audiosys CLK_AUD_AFE>,
+ <&audiosys CLK_AUD_AFE_CONN>,
+ <&audiosys CLK_AUD_A1SYS>,
+ <&audiosys CLK_AUD_A2SYS>,
+ <&audiosys CLK_AUD_AFE_MRGIF>;
- clock-names = "top_audio_mux1_sel",
- "top_audio_mux2_sel",
- "i2s0_src_sel",
- "i2s1_src_sel",
- "i2s2_src_sel",
- "i2s3_src_sel",
- "i2s0_src_div",
- "i2s1_src_div",
- "i2s2_src_div",
- "i2s3_src_div",
- "i2s0_mclk_en",
- "i2s1_mclk_en",
- "i2s2_mclk_en",
- "i2s3_mclk_en",
- "i2so0_hop_ck",
- "i2so1_hop_ck",
- "i2so2_hop_ck",
- "i2so3_hop_ck",
- "i2si0_hop_ck",
- "i2si1_hop_ck",
- "i2si2_hop_ck",
- "i2si3_hop_ck",
- "asrc0_out_ck",
- "asrc1_out_ck",
- "asrc2_out_ck",
- "asrc3_out_ck",
- "audio_afe_pd",
- "audio_afe_conn_pd",
- "audio_a1sys_pd",
- "audio_a2sys_pd",
- "audio_mrgif_pd";
+ clock-names = "top_audio_mux1_sel",
+ "top_audio_mux2_sel",
+ "i2s0_src_sel",
+ "i2s1_src_sel",
+ "i2s2_src_sel",
+ "i2s3_src_sel",
+ "i2s0_src_div",
+ "i2s1_src_div",
+ "i2s2_src_div",
+ "i2s3_src_div",
+ "i2s0_mclk_en",
+ "i2s1_mclk_en",
+ "i2s2_mclk_en",
+ "i2s3_mclk_en",
+ "i2so0_hop_ck",
+ "i2so1_hop_ck",
+ "i2so2_hop_ck",
+ "i2so3_hop_ck",
+ "i2si0_hop_ck",
+ "i2si1_hop_ck",
+ "i2si2_hop_ck",
+ "i2si3_hop_ck",
+ "asrc0_out_ck",
+ "asrc1_out_ck",
+ "asrc2_out_ck",
+ "asrc3_out_ck",
+ "audio_afe_pd",
+ "audio_afe_conn_pd",
+ "audio_a1sys_pd",
+ "audio_a2sys_pd",
+ "audio_mrgif_pd";
- assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
- <&topckgen CLK_TOP_AUD_MUX2_SEL>,
- <&topckgen CLK_TOP_AUD_MUX1_DIV>,
- <&topckgen CLK_TOP_AUD_MUX2_DIV>;
- assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
- <&topckgen CLK_TOP_AUD2PLL_90M>;
- assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
+ assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX1_DIV>,
+ <&topckgen CLK_TOP_AUD_MUX2_DIV>;
+ assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
+ <&topckgen CLK_TOP_AUD2PLL_90M>;
+ assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
+ };
};
--
1.9.1
^ permalink raw reply related
* [PATCH 09/12] clk: mediatek: move part of mtk_clk_register_gates() to the new function
From: Ryder Lee @ 2018-01-02 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514881870.git.ryder.lee@mediatek.com>
In some subsystems, the regmap has already been initialized from its parent,
so there is no need to map it again. To keep flexible, we move some parts to
the new function - mtk_clk_register_num_gates(), and then use it for those
subsystems.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
drivers/clk/mediatek/clk-mtk.c | 26 +++++++++++++++++---------
drivers/clk/mediatek/clk-mtk.h | 4 ++++
2 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 9c0ae42..815c98f 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -101,24 +101,16 @@ void mtk_clk_register_factors(const struct mtk_fixed_factor *clks,
}
}
-int mtk_clk_register_gates(struct device_node *node,
+int mtk_clk_register_num_gates(struct regmap *regmap,
const struct mtk_gate *clks,
int num, struct clk_onecell_data *clk_data)
{
int i;
struct clk *clk;
- struct regmap *regmap;
if (!clk_data)
return -ENOMEM;
- regmap = syscon_node_to_regmap(node);
- if (IS_ERR(regmap)) {
- pr_err("Cannot find regmap for %pOF: %ld\n", node,
- PTR_ERR(regmap));
- return PTR_ERR(regmap);
- }
-
for (i = 0; i < num; i++) {
const struct mtk_gate *gate = &clks[i];
@@ -144,6 +136,22 @@ int mtk_clk_register_gates(struct device_node *node,
return 0;
}
+int mtk_clk_register_gates(struct device_node *node,
+ const struct mtk_gate *clks,
+ int num, struct clk_onecell_data *clk_data)
+{
+ struct regmap *regmap;
+
+ regmap = syscon_node_to_regmap(node);
+ if (IS_ERR(regmap)) {
+ pr_err("Cannot find regmap for %pOF: %ld\n", node,
+ PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ return mtk_clk_register_num_gates(regmap, clks, num, clk_data);
+}
+
struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
void __iomem *base, spinlock_t *lock)
{
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index f10250d..f969c28 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -159,6 +159,10 @@ struct mtk_gate {
const struct clk_ops *ops;
};
+int mtk_clk_register_num_gates(struct regmap *regmap,
+ const struct mtk_gate *clks, int num,
+ struct clk_onecell_data *clk_data);
+
int mtk_clk_register_gates(struct device_node *node,
const struct mtk_gate *clks, int num,
struct clk_onecell_data *clk_data);
--
1.9.1
^ permalink raw reply related
* [PATCH 10/12] clk: mediatek: switch to use dev_get_regmap() for MT7622 audsys
From: Ryder Lee @ 2018-01-02 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514881870.git.ryder.lee@mediatek.com>
As the new audsys wrapper driver is in place, switch to use dev_get_regmap()
to obtain the regmap from its parent.
This patch also add missing clock data 'CLK_AUDIO_AFE_CONN'.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
drivers/clk/mediatek/clk-mt7622-aud.c | 11 +++++++++--
include/dt-bindings/clock/mt7622-clk.h | 3 ++-
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622-aud.c b/drivers/clk/mediatek/clk-mt7622-aud.c
index fad7d9f..261e8d7 100644
--- a/drivers/clk/mediatek/clk-mt7622-aud.c
+++ b/drivers/clk/mediatek/clk-mt7622-aud.c
@@ -106,6 +106,7 @@
GATE_AUDIO1(CLK_AUDIO_INTDIR, "audio_intdir", "intdir_sel", 20),
GATE_AUDIO1(CLK_AUDIO_A1SYS, "audio_a1sys", "a1sys_hp_sel", 21),
GATE_AUDIO1(CLK_AUDIO_A2SYS, "audio_a2sys", "a2sys_hp_sel", 22),
+ GATE_AUDIO1(CLK_AUDIO_AFE_CONN, "audio_afe_conn", "a1sys_hp_sel", 23),
/* AUDIO2 */
GATE_AUDIO2(CLK_AUDIO_UL1, "audio_ul1", "a1sys_hp_sel", 0),
GATE_AUDIO2(CLK_AUDIO_UL2, "audio_ul2", "a1sys_hp_sel", 1),
@@ -141,12 +142,18 @@ static int clk_mt7622_audiosys_init(struct platform_device *pdev)
{
struct clk_onecell_data *clk_data;
struct device_node *node = pdev->dev.of_node;
+ struct regmap *regmap;
int r;
clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK);
- mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks),
- clk_data);
+ /* Obtain the regmap from parent - audsys wrapper */
+ regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!regmap)
+ return -ENODEV;
+
+ mtk_clk_register_num_gates(regmap, audio_clks, ARRAY_SIZE(audio_clks),
+ clk_data);
r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
if (r)
diff --git a/include/dt-bindings/clock/mt7622-clk.h b/include/dt-bindings/clock/mt7622-clk.h
index 3e514ed..e9d77f0 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -235,7 +235,8 @@
#define CLK_AUDIO_MEM_ASRC3 43
#define CLK_AUDIO_MEM_ASRC4 44
#define CLK_AUDIO_MEM_ASRC5 45
-#define CLK_AUDIO_NR_CLK 46
+#define CLK_AUDIO_AFE_CONN 46
+#define CLK_AUDIO_NR_CLK 47
/* SSUSBSYS */
--
1.9.1
^ permalink raw reply related
* [PATCH 11/12] clk: mediatek: add audsys support for MT2701
From: Ryder Lee @ 2018-01-02 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514881870.git.ryder.lee@mediatek.com>
Add clock driver support for MT2701 audio subsystem.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
drivers/clk/mediatek/Kconfig | 6 ++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt2701-aud.c | 180 ++++++++++++++++++++++++++++++++++
3 files changed, 187 insertions(+)
create mode 100644 drivers/clk/mediatek/clk-mt2701-aud.c
diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig
index 59dc0aa..efb6f58 100644
--- a/drivers/clk/mediatek/Kconfig
+++ b/drivers/clk/mediatek/Kconfig
@@ -50,6 +50,12 @@ config COMMON_CLK_MT2701_BDPSYS
---help---
This driver supports Mediatek MT2701 bdpsys clocks.
+config COMMON_CLK_MT2701_AUDSYS
+ bool "Clock driver for Mediatek MT2701 audsys"
+ depends on COMMON_CLK_MT2701
+ ---help---
+ This driver supports Mediatek MT2701 audsys clocks.
+
config COMMON_CLK_MT2712
bool "Clock driver for Mediatek MT2712"
depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index c421ffc..c4ab7d3 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_COMMON_CLK_MT6797_MMSYS) += clk-mt6797-mm.o
obj-$(CONFIG_COMMON_CLK_MT6797_VDECSYS) += clk-mt6797-vdec.o
obj-$(CONFIG_COMMON_CLK_MT6797_VENCSYS) += clk-mt6797-venc.o
obj-$(CONFIG_COMMON_CLK_MT2701) += clk-mt2701.o
+obj-$(CONFIG_COMMON_CLK_MT2701_AUDSYS) += clk-mt2701-aud.o
obj-$(CONFIG_COMMON_CLK_MT2701_BDPSYS) += clk-mt2701-bdp.o
obj-$(CONFIG_COMMON_CLK_MT2701_ETHSYS) += clk-mt2701-eth.o
obj-$(CONFIG_COMMON_CLK_MT2701_HIFSYS) += clk-mt2701-hif.o
diff --git a/drivers/clk/mediatek/clk-mt2701-aud.c b/drivers/clk/mediatek/clk-mt2701-aud.c
new file mode 100644
index 0000000..c24ee00
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt2701-aud.c
@@ -0,0 +1,180 @@
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Ryder Lee <ryder.lee@mediatek.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <linux/clk-provider.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+
+#include "clk-mtk.h"
+#include "clk-gate.h"
+
+#include <dt-bindings/clock/mt2701-clk.h>
+
+#define GATE_AUDIO0(_id, _name, _parent, _shift) { \
+ .id = _id, \
+ .name = _name, \
+ .parent_name = _parent, \
+ .regs = &audio0_cg_regs, \
+ .shift = _shift, \
+ .ops = &mtk_clk_gate_ops_no_setclr, \
+ }
+
+#define GATE_AUDIO1(_id, _name, _parent, _shift) { \
+ .id = _id, \
+ .name = _name, \
+ .parent_name = _parent, \
+ .regs = &audio1_cg_regs, \
+ .shift = _shift, \
+ .ops = &mtk_clk_gate_ops_no_setclr, \
+ }
+
+#define GATE_AUDIO2(_id, _name, _parent, _shift) { \
+ .id = _id, \
+ .name = _name, \
+ .parent_name = _parent, \
+ .regs = &audio2_cg_regs, \
+ .shift = _shift, \
+ .ops = &mtk_clk_gate_ops_no_setclr, \
+ }
+
+#define GATE_AUDIO3(_id, _name, _parent, _shift) { \
+ .id = _id, \
+ .name = _name, \
+ .parent_name = _parent, \
+ .regs = &audio3_cg_regs, \
+ .shift = _shift, \
+ .ops = &mtk_clk_gate_ops_no_setclr, \
+ }
+
+static const struct mtk_gate_regs audio0_cg_regs = {
+ .set_ofs = 0x0,
+ .clr_ofs = 0x0,
+ .sta_ofs = 0x0,
+};
+
+static const struct mtk_gate_regs audio1_cg_regs = {
+ .set_ofs = 0x10,
+ .clr_ofs = 0x10,
+ .sta_ofs = 0x10,
+};
+
+static const struct mtk_gate_regs audio2_cg_regs = {
+ .set_ofs = 0x14,
+ .clr_ofs = 0x14,
+ .sta_ofs = 0x14,
+};
+
+static const struct mtk_gate_regs audio3_cg_regs = {
+ .set_ofs = 0x634,
+ .clr_ofs = 0x634,
+ .sta_ofs = 0x634,
+};
+
+static const struct mtk_gate audio_clks[] = {
+ /* AUDIO0 */
+ GATE_AUDIO0(CLK_AUD_AFE, "audio_afe", "aud_intbus_sel", 2),
+ GATE_AUDIO0(CLK_AUD_HDMI, "audio_hdmi", "audpll_sel", 20),
+ GATE_AUDIO0(CLK_AUD_SPDF, "audio_spdf", "audpll_sel", 21),
+ GATE_AUDIO0(CLK_AUD_SPDF2, "audio_spdf2", "audpll_sel", 22),
+ GATE_AUDIO0(CLK_AUD_APLL, "audio_apll", "audpll_sel", 23),
+ /* AUDIO1 */
+ GATE_AUDIO1(CLK_AUD_I2SIN1, "audio_i2sin1", "aud_mux1_sel", 0),
+ GATE_AUDIO1(CLK_AUD_I2SIN2, "audio_i2sin2", "aud_mux1_sel", 1),
+ GATE_AUDIO1(CLK_AUD_I2SIN3, "audio_i2sin3", "aud_mux1_sel", 2),
+ GATE_AUDIO1(CLK_AUD_I2SIN4, "audio_i2sin4", "aud_mux1_sel", 3),
+ GATE_AUDIO1(CLK_AUD_I2SIN5, "audio_i2sin5", "aud_mux1_sel", 4),
+ GATE_AUDIO1(CLK_AUD_I2SIN6, "audio_i2sin6", "aud_mux1_sel", 5),
+ GATE_AUDIO1(CLK_AUD_I2SO1, "audio_i2so1", "aud_mux1_sel", 6),
+ GATE_AUDIO1(CLK_AUD_I2SO2, "audio_i2so2", "aud_mux1_sel", 7),
+ GATE_AUDIO1(CLK_AUD_I2SO3, "audio_i2so3", "aud_mux1_sel", 8),
+ GATE_AUDIO1(CLK_AUD_I2SO4, "audio_i2so4", "aud_mux1_sel", 9),
+ GATE_AUDIO1(CLK_AUD_I2SO5, "audio_i2so5", "aud_mux1_sel", 10),
+ GATE_AUDIO1(CLK_AUD_I2SO6, "audio_i2so6", "aud_mux1_sel", 11),
+ GATE_AUDIO1(CLK_AUD_ASRCI1, "audio_asrci1", "asm_h_sel", 12),
+ GATE_AUDIO1(CLK_AUD_ASRCI2, "audio_asrci2", "asm_h_sel", 13),
+ GATE_AUDIO1(CLK_AUD_ASRCO1, "audio_asrco1", "asm_h_sel", 14),
+ GATE_AUDIO1(CLK_AUD_ASRCO2, "audio_asrco2", "asm_h_sel", 15),
+ GATE_AUDIO1(CLK_AUD_INTDIR, "audio_intdir", "intdir_sel", 20),
+ GATE_AUDIO1(CLK_AUD_A1SYS, "audio_a1sys", "aud_mux1_sel", 21),
+ GATE_AUDIO1(CLK_AUD_A2SYS, "audio_a2sys", "aud_mux2_sel", 22),
+ GATE_AUDIO1(CLK_AUD_AFE_CONN, "audio_afe_conn", "aud_mux1_sel", 23),
+ GATE_AUDIO1(CLK_AUD_AFE_MRGIF, "audio_afe_mrgif", "aud_mux1_sel", 25),
+ /* AUDIO2 */
+ GATE_AUDIO2(CLK_AUD_MMIF_UL1, "audio_ul1", "aud_mux1_sel", 0),
+ GATE_AUDIO2(CLK_AUD_MMIF_UL2, "audio_ul2", "aud_mux1_sel", 1),
+ GATE_AUDIO2(CLK_AUD_MMIF_UL3, "audio_ul3", "aud_mux1_sel", 2),
+ GATE_AUDIO2(CLK_AUD_MMIF_UL4, "audio_ul4", "aud_mux1_sel", 3),
+ GATE_AUDIO2(CLK_AUD_MMIF_UL5, "audio_ul5", "aud_mux1_sel", 4),
+ GATE_AUDIO2(CLK_AUD_MMIF_UL6, "audio_ul6", "aud_mux1_sel", 5),
+ GATE_AUDIO2(CLK_AUD_MMIF_DL1, "audio_dl1", "aud_mux1_sel", 6),
+ GATE_AUDIO2(CLK_AUD_MMIF_DL2, "audio_dl2", "aud_mux1_sel", 7),
+ GATE_AUDIO2(CLK_AUD_MMIF_DL3, "audio_dl3", "aud_mux1_sel", 8),
+ GATE_AUDIO2(CLK_AUD_MMIF_DL4, "audio_dl4", "aud_mux1_sel", 9),
+ GATE_AUDIO2(CLK_AUD_MMIF_DL5, "audio_dl5", "aud_mux1_sel", 10),
+ GATE_AUDIO2(CLK_AUD_MMIF_DL6, "audio_dl6", "aud_mux1_sel", 11),
+ GATE_AUDIO2(CLK_AUD_MMIF_DLMCH, "audio_dlmch", "aud_mux1_sel", 12),
+ GATE_AUDIO2(CLK_AUD_MMIF_ARB1, "audio_arb1", "aud_mux1_sel", 13),
+ GATE_AUDIO2(CLK_AUD_MMIF_AWB1, "audio_awb", "aud_mux1_sel", 14),
+ GATE_AUDIO2(CLK_AUD_MMIF_AWB2, "audio_awb2", "aud_mux1_sel", 15),
+ GATE_AUDIO2(CLK_AUD_MMIF_DAI, "audio_dai", "aud_mux1_sel", 16),
+ /* AUDIO3 */
+ GATE_AUDIO3(CLK_AUD_ASRCI3, "audio_asrci3", "asm_h_sel", 2),
+ GATE_AUDIO3(CLK_AUD_ASRCI4, "audio_asrci4", "asm_h_sel", 3),
+ GATE_AUDIO3(CLK_AUD_ASRCI5, "audio_asrci5", "asm_h_sel", 4),
+ GATE_AUDIO3(CLK_AUD_ASRCI6, "audio_asrci6", "asm_h_sel", 5),
+ GATE_AUDIO3(CLK_AUD_ASRCO3, "audio_asrco3", "asm_h_sel", 6),
+ GATE_AUDIO3(CLK_AUD_ASRCO4, "audio_asrco4", "asm_h_sel", 7),
+ GATE_AUDIO3(CLK_AUD_ASRCO5, "audio_asrco5", "asm_h_sel", 8),
+ GATE_AUDIO3(CLK_AUD_ASRCO6, "audio_asrco6", "asm_h_sel", 9),
+ GATE_AUDIO3(CLK_AUD_MEM_ASRC1, "audio_mem_asrc1", "asm_h_sel", 10),
+ GATE_AUDIO3(CLK_AUD_MEM_ASRC2, "audio_mem_asrc2", "asm_h_sel", 11),
+ GATE_AUDIO3(CLK_AUD_MEM_ASRC3, "audio_mem_asrc3", "asm_h_sel", 12),
+ GATE_AUDIO3(CLK_AUD_MEM_ASRC4, "audio_mem_asrc4", "asm_h_sel", 13),
+ GATE_AUDIO3(CLK_AUD_MEM_ASRC5, "audio_mem_asrc5", "asm_h_sel", 14),
+};
+
+static const struct of_device_id of_match_clk_mt2701_aud[] = {
+ { .compatible = "mediatek,mt2701-audsys", },
+ {}
+};
+
+static int clk_mt2701_aud_probe(struct platform_device *pdev)
+{
+ struct clk_onecell_data *clk_data;
+ struct device_node *node = pdev->dev.of_node;
+ struct regmap *regmap;
+ int r;
+
+ clk_data = mtk_alloc_clk_data(CLK_AUD_NR);
+
+ /* Obtain the regmap from parent - audsys wrapper */
+ regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!regmap)
+ return -ENODEV;
+
+ mtk_clk_register_num_gates(regmap, audio_clks, ARRAY_SIZE(audio_clks),
+ clk_data);
+
+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ if (r)
+ dev_err(&pdev->dev,
+ "could not register clock provider: %s: %d\n",
+ pdev->name, r);
+
+ return r;
+}
+
+static struct platform_driver clk_mt2701_aud_drv = {
+ .probe = clk_mt2701_aud_probe,
+ .driver = {
+ .name = "clk-mt2701-aud",
+ .of_match_table = of_match_clk_mt2701_aud,
+ },
+};
+
+builtin_platform_driver(clk_mt2701_aud_drv);
--
1.9.1
^ permalink raw reply related
* [PATCH 12/12] dt-bindings: clock: mediatek: update audsys bindings to adapt the wrapper
From: Ryder Lee @ 2018-01-02 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514881870.git.ryder.lee@mediatek.com>
Update the DT binding to adapt the new audio subsystem wrapper.
Also add a compatible string for MT2701.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
.../bindings/arm/mediatek/mediatek,audsys.txt | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
index 9b8f578..106defa 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
@@ -6,17 +6,24 @@ The MediaTek AUDSYS controller provides various clocks to the system.
Required Properties:
- compatible: Should be one of:
- - "mediatek,mt7622-audsys", "syscon"
+ - "mediatek,mt2701-audsys",
+ - "mediatek,mt7622-audsys",
- #clock-cells: Must be 1
The AUDSYS controller uses the common clk binding from
Documentation/devicetree/bindings/clock/clock-bindings.txt
The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+Must be a subnode of MediaTek audio subsystem device tree node.
+See ../mfd/mtk-audsys.txt for details about the parent node.
+
Example:
-audsys: audsys at 11220000 {
- compatible = "mediatek,mt7622-audsys", "syscon";
- reg = <0 0x11220000 0 0x1000>;
- #clock-cells = <1>;
-};
+ audio-subsystm at 11220000 {
+ compatible = "mediatek,mt2701-audsys-core";
+ ...
+ audsys: clock {
+ compatible = "mediatek,mt2701-audsys";
+ #clock-cells = <1>;
+ };
+ };
--
1.9.1
^ permalink raw reply related
* [RFC PATCH 2/5] perf jevents: add support for arch recommended events
From: John Garry @ 2018-01-02 12:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171216184701.GB25156@tassilo.jf.intel.com>
On 16/12/2017 18:47, Andi Kleen wrote:
Hi Andi,
>> Won't this all potentially have a big maintainence cost?
>
> No. It's all auto generated.
>
> The only cost is slightly bigger binary size.
>
> I would hope your event files are auto generated too.
>
No, they're not - we are just manually transcribing the event data from
the architecture reference manual (for arch-defined events) or internal
text document (for custom events).
Can you describe how you autogenerate the JSONs? Do you have some
internal proprietary HW file format describing events, with files
supplied from HW designer, which you can just translate into a JSON?
Would the files support deferencing events to improve scalability?
>> I just don't know how this schema scales with more archs and more platforms
>> supported. It's just early days now...
>
> Only perf will get slightly bigger, but memory is not exactly expensive.
>
> In fact, the extra memory won't even be faulted in if it's not used,
> so it's only disk space.
Much appreciated,
John
>
> -Andi
>
> .
>
^ permalink raw reply
* [PATCH] iommu/arm-smmu-v3: Cope with duplicated Stream IDs
From: Robin Murphy @ 2018-01-02 12:33 UTC (permalink / raw)
To: linux-arm-kernel
For PCI devices behind an aliasing PCIe-to-PCI/X bridge, the bridge
alias to DevFn 0.0 on the subordinate bus may match the original RID of
the device, resulting in the same SID being present in the device's
fwspec twice. This causes trouble later in arm_smmu_write_strtab_ent()
when we wind up visiting the STE a second time and find it already live.
Avoid the issue by giving arm_smmu_install_ste_for_dev() the cleverness
to skip over duplicates. It seems mildly counterintuitive compared to
preventing the duplicates from existing in the first place, but since
the DT and ACPI probe paths build their fwspecs differently, this is
actually the cleanest and most self-contained way to deal with it.
Fixes: 8f78515425da ("iommu/arm-smmu: Implement of_xlate() for SMMUv3")
Reported-by: Tomasz Nowicki <tomasz.nowicki@caviumnetworks.com>
Tested-by: Tomasz Nowicki <Tomasz.Nowicki@cavium.com>
Tested-by: Jayachandran C. <jnair@caviumnetworks.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
drivers/iommu/arm-smmu-v3.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 9ce3cde575a8..57c92aa3122e 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1752,7 +1752,7 @@ static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid)
static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec)
{
- int i;
+ int i, j;
struct arm_smmu_master_data *master = fwspec->iommu_priv;
struct arm_smmu_device *smmu = master->smmu;
@@ -1760,6 +1760,13 @@ static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec)
u32 sid = fwspec->ids[i];
__le64 *step = arm_smmu_get_step_for_sid(smmu, sid);
+ /* Bridged PCI devices may end up with duplicated IDs */
+ for (j = 0; j < i; j++)
+ if (fwspec->ids[j] == sid)
+ break;
+ if (j < i)
+ continue;
+
arm_smmu_write_strtab_ent(smmu, sid, step, &master->ste);
}
}
--
2.13.4.dirty
^ permalink raw reply related
* [PATCH] arch: drop duplicate exports of abort()
From: Sudip Mukherjee @ 2018-01-02 12:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180102113829.GD28752@n2100.armlinux.org.uk>
On Tue, Jan 02, 2018 at 11:38:29AM +0000, Russell King - ARM Linux wrote:
> On Tue, Jan 02, 2018 at 11:34:45AM +0000, Sudip Mukherjee wrote:
> > Hi Arnd,
> >
> > On Tue, Jan 02, 2018 at 11:31:12AM +0100, Arnd Bergmann wrote:
> > > We now have exports in both architecture code in in common code,
> > > which causes a link failure when symbol versioning is eanbled, on
> > > four architectures:
> > >
> > > kernel/exit.o: In function `__crc_abort':
> > > exit.c:(*ABS*+0xc0e2ec8b): multiple definition of `__crc_abort'
> > >
> > > This removes the four architecture specific exports and only
> > > leaves the export next to the __weak symbol.
> >
> > Will it not be better to remove the abort() as they are exactly same
> > like the weak function. That was the original plan we had when this
> > weak function was done. Like in the attached patch..
>
> If that was the plan, why wasn't it done - why did we end up with a
> build-breaking patch merged in -mm?
The proposed patch (which I attached in the earlier mail) was breaking
the build unless weak abort() is exported. So, ideally the export of
weak abort() and the proposed patch should have been part of a series.
But afaik, the export has been done to fix another build failure reported
by Vineet.
Andrew, I think the best way now is to apply the patch sent by Arnd,
and I will send a separate patch to remove abort() after proper testing.
--
Regards
Sudip
^ permalink raw reply
* [PATCHv2] Device tree binding for Avago APDS990X light sensor
From: Pavel Machek @ 2018-01-02 12:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171227211643.nnwtm4j6cyftlm66@kekkonen.localdomain>
From: Filip Matijevi? <filip.matijevic.pz@gmail.com>
This prepares binding for light sensor used in Nokia N9.
Signed-off-by: Filip Matijevi? <filip.matijevic.pz@gmail.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
diff --git a/Documentation/devicetree/bindings/misc/avago-apds990x.txt b/Documentation/devicetree/bindings/misc/avago-apds990x.txt
new file mode 100644
index 0000000..480c0b1
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/avago-apds990x.txt
@@ -0,0 +1,41 @@
+Avago APDS990X driver
+
+https://docs.broadcom.com/docs/AV02-2867EN
+
+Required properties:
+- compatible: "avago,apds990x"
+- reg: address on the I2C bus
+- interrupts: external interrupt line number
+- vdd-supply: power supply for VDD
+- vled-supply: power supply for LEDA
+- avago,ga: Glass attenuation
+- avago,cf1: Clear channel factor 1
+- avago,irf1: IR channel factor 1
+- avago,cf2: Clear channel factor 2
+- avago,irf2: IR channel factor 2
+- avago,df: Device factor
+- avago,pdrive: IR current, one of APDS_IRLED_CURR_XXXmA values
+- avago,ppcount: Proximity pulse count
+
+Example (Nokia N9):
+
+ als_ps at 39 {
+ compatible = "avago,apds990x";
+ reg = <0x39>;
+
+ interrupt-parent = <&gpio3>;
+ interrupts = <19 (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)>; /* gpio_83 */
+
+ vdd-supply = <&vaux1>;
+ vled-supply = <&vbat>;
+
+ avago,ga = <168834>;
+ avago,cf1 = <4096>;
+ avago,irf1 = <7824>;
+ avago,cf2 = <877>;
+ avago,irf2 = <1575>;
+ avago,df = <52>;
+
+ avago,pdrive = <0x2>; /* APDS_IRLED_CURR_25mA */
+ avago,ppcount = <5>;
+ };
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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* [PATCH] Nokia N9: add support for up/down keys in the dts
From: Pavel Machek @ 2018-01-02 12:59 UTC (permalink / raw)
To: linux-arm-kernel
This adds support for volume up/down keys in the dts.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
diff --git a/arch/arm/boot/dts/omap3-n9.dts b/arch/arm/boot/dts/omap3-n9.dts
index 39e35f8..57a6679 100644
--- a/arch/arm/boot/dts/omap3-n9.dts
+++ b/arch/arm/boot/dts/omap3-n9.dts
@@ -11,9 +11,10 @@
/dts-v1/;
#include "omap3-n950-n9.dtsi"
+#include <dt-bindings/input/input.h>
/ {
model = "Nokia N9";
compatible = "nokia,omap3-n9", "ti,omap36xx", "ti,omap3";
};
@@ -72,3 +133,9 @@
st,max-limit-y = <46>;
st,max-limit-z = <46>;
};
+
+&twl_keypad {
+ linux,keymap = < MATRIX_KEY(6, 8, KEY_VOLUMEUP)
+ MATRIX_KEY(7, 8, KEY_VOLUMEDOWN)
+ >;
+};
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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* [PATCH] iommu/arm-smmu-v3: Cope with duplicated Stream IDs
From: Will Deacon @ 2018-01-02 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <13744c7ba2af61bc39b68e9ab05ab8482f928334.1514896042.git.robin.murphy@arm.com>
On Tue, Jan 02, 2018 at 12:33:14PM +0000, Robin Murphy wrote:
> For PCI devices behind an aliasing PCIe-to-PCI/X bridge, the bridge
> alias to DevFn 0.0 on the subordinate bus may match the original RID of
> the device, resulting in the same SID being present in the device's
> fwspec twice. This causes trouble later in arm_smmu_write_strtab_ent()
> when we wind up visiting the STE a second time and find it already live.
>
> Avoid the issue by giving arm_smmu_install_ste_for_dev() the cleverness
> to skip over duplicates. It seems mildly counterintuitive compared to
> preventing the duplicates from existing in the first place, but since
> the DT and ACPI probe paths build their fwspecs differently, this is
> actually the cleanest and most self-contained way to deal with it.
>
> Fixes: 8f78515425da ("iommu/arm-smmu: Implement of_xlate() for SMMUv3")
> Reported-by: Tomasz Nowicki <tomasz.nowicki@caviumnetworks.com>
> Tested-by: Tomasz Nowicki <Tomasz.Nowicki@cavium.com>
> Tested-by: Jayachandran C. <jnair@caviumnetworks.com>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
> drivers/iommu/arm-smmu-v3.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
Cheers, Robin. I'll pick this up and send to Alex later this week along with
a couple of other fixes I have kicking around.
Will
^ permalink raw reply
* misc: bh1770glc: move sysfs interace to Documentation/ABI
From: Pavel Machek @ 2018-01-02 13:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171226092957.GA3817@mordor.localdomain>
Hi!
> In Documentation/misc-devices/bh1770glc.txt, there is a description of the sysfs
> interface which could be moved to Documentation/ABI.
>
> Would such a change be useful?
Not at the moment.
> The ABI documentation format looks like the following:
>
> What: (the full sysfs path of the attribute)
> Date: (date of creation)
> KernelVersion: (kernel version it first showed up in)
> Contact: (primary contact)
> Description: (long description on usage)
>
> I am doing this in an exercise to move sysfs ABI interfaces (which are
> documented) to their right place i.e. in Documentation/ABI along with the rest.
The interface should probably be changed to iio one, to be consistent
with other sensors such as Apds990x.
If you have the hardware, help would be welcome.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20180102/20ffcbb1/attachment-0001.sig>
^ permalink raw reply
* [PATCH] nokia N9: Add support for magnetometer and touchscreen
From: Pavel Machek @ 2018-01-02 13:17 UTC (permalink / raw)
To: linux-arm-kernel
This adds dts support for magnetometer and touchscreen on Nokia N9.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
diff --git a/arch/arm/boot/dts/omap3-n9.dts b/arch/arm/boot/dts/omap3-n9.dts
index 39e35f8..57a6679 100644
--- a/arch/arm/boot/dts/omap3-n9.dts
+++ b/arch/arm/boot/dts/omap3-n9.dts
@@ -36,6 +57,22 @@
};
};
};
+
+ touch at 4b {
+ compatible = "atmel,maxtouch";
+ reg = <0x4b>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <29 2>; /* gpio_61, IRQF_TRIGGER_FALLING*/
+ vdd-supply = <&vio>;
+ avdd-supply = <&vaux1>;
+ };
+};
+
+&i2c3 {
+ ak8975 at 0f {
+ compatible = "asahi-kasei,ak8975";
+ reg = <0x0f>;
+ };
};
&isp {
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20180102/73e80119/attachment.sig>
^ permalink raw reply related
* [PATCH 0/4] gpio: driver for the RPi3 GPIO expander
From: Baruch Siach @ 2018-01-02 13:19 UTC (permalink / raw)
To: linux-arm-kernel
The Raspberry Pi 3 has a GPIO expander that controls, among others, the
activity LED, and the camera connector GPIOs. The GPIO expander on an I2C bus
that is not directly controlled from the ARM core. The VC4 firmware controls
the I2C bus, and allows the ARM core to set/get GPIO settings over its mailbox
interface.
This series adds support for the RPi3 expander.
The driver is ported from the downstream kernel at
https://github.com/raspberrypi/linux/, branch rpi-4.9.y.
Baruch Siach (3):
ARM: bcm2835: sync firmware properties with downstream
dt-bindings: gpio: add raspberry pi GPIO expander binding
ARM: dts: bcm2837-rpi-3-b: add GPIO expander
Dave Stevenson (1):
bcm2835-gpio-exp: Driver for GPIO expander via mailbox service
.../bindings/gpio/brcm,bcm2835-expgpio.txt | 24 ++
arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 10 +
drivers/gpio/Kconfig | 7 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-bcm-exp.c | 254 +++++++++++++++++++++
include/soc/bcm2835/raspberrypi-firmware.h | 18 ++
6 files changed, 314 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/brcm,bcm2835-expgpio.txt
create mode 100644 drivers/gpio/gpio-bcm-exp.c
--
2.15.1
^ permalink raw reply
* [PATCH 1/4] ARM: bcm2835: sync firmware properties with downstream
From: Baruch Siach @ 2018-01-02 13:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514898134.git.baruch@tkos.co.il>
Add latest firmware property tags from the latest Raspberry Pi downstream
kernel. This is needed for the GPIO tags, so we can control the GPIO
multiplexor lines.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
include/soc/bcm2835/raspberrypi-firmware.h | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h
index cb979ad90401..50df5b28d2c9 100644
--- a/include/soc/bcm2835/raspberrypi-firmware.h
+++ b/include/soc/bcm2835/raspberrypi-firmware.h
@@ -63,6 +63,7 @@ enum rpi_firmware_property_tag {
RPI_FIRMWARE_GET_MIN_VOLTAGE = 0x00030008,
RPI_FIRMWARE_GET_TURBO = 0x00030009,
RPI_FIRMWARE_GET_MAX_TEMPERATURE = 0x0003000a,
+ RPI_FIRMWARE_GET_STC = 0x0003000b,
RPI_FIRMWARE_ALLOCATE_MEMORY = 0x0003000c,
RPI_FIRMWARE_LOCK_MEMORY = 0x0003000d,
RPI_FIRMWARE_UNLOCK_MEMORY = 0x0003000e,
@@ -72,12 +73,22 @@ enum rpi_firmware_property_tag {
RPI_FIRMWARE_SET_ENABLE_QPU = 0x00030012,
RPI_FIRMWARE_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014,
RPI_FIRMWARE_GET_EDID_BLOCK = 0x00030020,
+ RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021,
RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030,
RPI_FIRMWARE_SET_CLOCK_STATE = 0x00038001,
RPI_FIRMWARE_SET_CLOCK_RATE = 0x00038002,
RPI_FIRMWARE_SET_VOLTAGE = 0x00038003,
RPI_FIRMWARE_SET_TURBO = 0x00038009,
+ RPI_FIRMWARE_SET_CUSTOMER_OTP = 0x00038021,
RPI_FIRMWARE_SET_DOMAIN_STATE = 0x00038030,
+ RPI_FIRMWARE_GET_GPIO_STATE = 0x00030041,
+ RPI_FIRMWARE_SET_GPIO_STATE = 0x00038041,
+ RPI_FIRMWARE_SET_SDHOST_CLOCK = 0x00038042,
+ RPI_FIRMWARE_GET_GPIO_CONFIG = 0x00030043,
+ RPI_FIRMWARE_SET_GPIO_CONFIG = 0x00038043,
+ RPI_FIRMWARE_GET_PERIPH_REG = 0x00030045,
+ RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045,
+
/* Dispmanx TAGS */
RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE = 0x00040001,
@@ -91,6 +102,8 @@ enum rpi_firmware_property_tag {
RPI_FIRMWARE_FRAMEBUFFER_GET_VIRTUAL_OFFSET = 0x00040009,
RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN = 0x0004000a,
RPI_FIRMWARE_FRAMEBUFFER_GET_PALETTE = 0x0004000b,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010,
RPI_FIRMWARE_FRAMEBUFFER_RELEASE = 0x00048001,
RPI_FIRMWARE_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT = 0x00044003,
RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT = 0x00044004,
@@ -100,6 +113,7 @@ enum rpi_firmware_property_tag {
RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_OFFSET = 0x00044009,
RPI_FIRMWARE_FRAMEBUFFER_TEST_OVERSCAN = 0x0004400a,
RPI_FIRMWARE_FRAMEBUFFER_TEST_PALETTE = 0x0004400b,
+ RPI_FIRMWARE_FRAMEBUFFER_TEST_VSYNC = 0x0004400e,
RPI_FIRMWARE_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003,
RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004,
RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005,
@@ -108,6 +122,10 @@ enum rpi_firmware_property_tag {
RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009,
RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a,
RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f,
RPI_FIRMWARE_VCHIQ_INIT = 0x00048010,
--
2.15.1
^ permalink raw reply related
* [PATCH 2/4] dt-bindings: gpio: add raspberry pi GPIO expander binding
From: Baruch Siach @ 2018-01-02 13:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514898134.git.baruch@tkos.co.il>
The Raspberry Pi 3 GPIO expander is controlled by the VC4 firmware over
I2C. The firmware mailbox interface allows the ARM core to control the
GPIO lines.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
.../bindings/gpio/brcm,bcm2835-expgpio.txt | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/brcm,bcm2835-expgpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/brcm,bcm2835-expgpio.txt b/Documentation/devicetree/bindings/gpio/brcm,bcm2835-expgpio.txt
new file mode 100644
index 000000000000..55257f31a9be
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/brcm,bcm2835-expgpio.txt
@@ -0,0 +1,24 @@
+Raspberry Pi GPIO expander
+
+The Raspberry Pi 3 GPIO expander is controlled by the VC4 firmware. The
+firmware exposes a mailbox interface that allows the ARM core to control the
+GPIO lines on the expander.
+
+Required properties:
+
+- compatible : Should be "brcm,bcm2835-expgpio"
+- gpio-controller : Marks the device node as a gpio controller
+- #gpio-cells : Should be two. The first cell is the pin number, and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+- firmware : Reference to the RPi firmware device node
+
+Example:
+
+expgpio: expgpio {
+ compatible = "brcm,bcm2835-expgpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ firmware = <&firmware>;
+};
--
2.15.1
^ permalink raw reply related
* [PATCH 3/4] bcm2835-gpio-exp: Driver for GPIO expander via mailbox service
From: Baruch Siach @ 2018-01-02 13:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514898134.git.baruch@tkos.co.il>
From: Dave Stevenson <dave.stevenson@raspberrypi.org>
Pi3 and Compute Module 3 have a GPIO expander that the
VPU communicates with.
There is a mailbox service that now allows control of this
expander, so add a kernel driver that can make use of it.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
drivers/gpio/Kconfig | 7 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-bcm-exp.c | 254 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 262 insertions(+)
create mode 100644 drivers/gpio/gpio-bcm-exp.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index d6a8e851ad13..e2aab64ea772 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -128,6 +128,13 @@ config GPIO_AXP209
help
Say yes to enable GPIO support for the AXP209 PMIC
+config GPIO_BCM_EXP
+ bool "Broadcom Exp GPIO"
+ depends on OF_GPIO && RASPBERRYPI_FIRMWARE && (ARCH_BCM2835 || COMPILE_TEST)
+ help
+ Turn on GPIO support for Broadcom chips using the firmware mailbox
+ to communicate with VideoCore on BCM283x chips.
+
config GPIO_BCM_KONA
bool "Broadcom Kona GPIO"
depends on OF_GPIO && (ARCH_BCM_MOBILE || COMPILE_TEST)
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 4bc24febb889..c5f481b1d53c 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
obj-$(CONFIG_GPIO_AXP209) += gpio-axp209.o
+obj-$(CONFIG_GPIO_BCM_EXP) += gpio-bcm-exp.o
obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
diff --git a/drivers/gpio/gpio-bcm-exp.c b/drivers/gpio/gpio-bcm-exp.c
new file mode 100644
index 000000000000..d68adafaee4a
--- /dev/null
+++ b/drivers/gpio/gpio-bcm-exp.c
@@ -0,0 +1,254 @@
+/*
+ * Broadcom expander GPIO driver
+ *
+ * Uses the firmware mailbox service to communicate with the
+ * GPIO expander on the VPU.
+ *
+ * Copyright (C) 2017 Raspberry Pi Trading Ltd.
+ *
+ * Author: Dave Stevenson <dave.stevenson@raspberrypi.org>
+ * Based on gpio-bcm-virt.c by Dom Cobley <popcornmix@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <soc/bcm2835/raspberrypi-firmware.h>
+
+#define MODULE_NAME "brcmexp-gpio"
+#define NUM_GPIO 8
+
+struct brcmexp_gpio {
+ struct gpio_chip gc;
+ struct device *dev;
+ struct rpi_firmware *fw;
+};
+
+struct gpio_set_config {
+ u32 gpio, direction, polarity, term_en, term_pull_up, state;
+};
+
+struct gpio_get_config {
+ u32 gpio, direction, polarity, term_en, term_pull_up;
+};
+
+struct gpio_get_set_state {
+ u32 gpio, state;
+};
+
+static int brcmexp_gpio_get_polarity(struct gpio_chip *gc, unsigned int off)
+{
+ struct brcmexp_gpio *gpio;
+ struct gpio_get_config get;
+ int ret;
+
+ gpio = container_of(gc, struct brcmexp_gpio, gc);
+
+ get.gpio = off + gpio->gc.base; /* GPIO to update */
+
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_GET_GPIO_CONFIG,
+ &get, sizeof(get));
+ if (ret) {
+ dev_err(gpio->dev,
+ "Failed to get GPIO %u config (%d)\n", off, ret);
+ return ret;
+ }
+ return get.polarity;
+}
+
+static int brcmexp_gpio_dir_in(struct gpio_chip *gc, unsigned int off)
+{
+ struct brcmexp_gpio *gpio;
+ struct gpio_set_config set_in;
+ int ret;
+
+ gpio = container_of(gc, struct brcmexp_gpio, gc);
+
+ set_in.gpio = off + gpio->gc.base; /* GPIO to update */
+ set_in.direction = 0; /* Input */
+ set_in.polarity = brcmexp_gpio_get_polarity(gc, off);
+ /* Retain existing setting */
+ set_in.term_en = 0; /* termination disabled */
+ set_in.term_pull_up = 0; /* n/a as termination disabled */
+ set_in.state = 0; /* n/a as configured as an input */
+
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_SET_GPIO_CONFIG,
+ &set_in, sizeof(set_in));
+ if (ret) {
+ dev_err(gpio->dev,
+ "Failed to set GPIO %u to input (%d)\n",
+ off, ret);
+ return ret;
+ }
+ return 0;
+}
+
+static int brcmexp_gpio_dir_out(struct gpio_chip *gc, unsigned int off, int val)
+{
+ struct brcmexp_gpio *gpio;
+ struct gpio_set_config set_out;
+ int ret;
+
+ gpio = container_of(gc, struct brcmexp_gpio, gc);
+
+ set_out.gpio = off + gpio->gc.base; /* GPIO to update */
+ set_out.direction = 1; /* Output */
+ set_out.polarity = brcmexp_gpio_get_polarity(gc, off);
+ /* Retain existing setting */
+ set_out.term_en = 0; /* n/a as an output */
+ set_out.term_pull_up = 0; /* n/a as termination disabled */
+ set_out.state = val; /* Output state */
+
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_SET_GPIO_CONFIG,
+ &set_out, sizeof(set_out));
+ if (ret) {
+ dev_err(gpio->dev,
+ "Failed to set GPIO %u to output (%d)\n", off, ret);
+ return ret;
+ }
+ return 0;
+}
+
+static int brcmexp_gpio_get_direction(struct gpio_chip *gc, unsigned int off)
+{
+ struct brcmexp_gpio *gpio;
+ struct gpio_get_config get;
+ int ret;
+
+ gpio = container_of(gc, struct brcmexp_gpio, gc);
+
+ get.gpio = off + gpio->gc.base; /* GPIO to update */
+
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_GET_GPIO_CONFIG,
+ &get, sizeof(get));
+ if (ret) {
+ dev_err(gpio->dev,
+ "Failed to get GPIO %u config (%d)\n", off, ret);
+ return ret;
+ }
+ return get.direction ? GPIOF_DIR_OUT : GPIOF_DIR_IN;
+}
+
+static int brcmexp_gpio_get(struct gpio_chip *gc, unsigned int off)
+{
+ struct brcmexp_gpio *gpio;
+ struct gpio_get_set_state get;
+ int ret;
+
+ gpio = container_of(gc, struct brcmexp_gpio, gc);
+
+ get.gpio = off + gpio->gc.base; /* GPIO to update */
+ get.state = 0; /* storage for returned value */
+
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_GET_GPIO_STATE,
+ &get, sizeof(get));
+ if (ret) {
+ dev_err(gpio->dev,
+ "Failed to get GPIO %u state (%d)\n", off, ret);
+ return ret;
+ }
+ return !!get.state;
+}
+
+static void brcmexp_gpio_set(struct gpio_chip *gc, unsigned int off, int val)
+{
+ struct brcmexp_gpio *gpio;
+ struct gpio_get_set_state set;
+ int ret;
+
+ gpio = container_of(gc, struct brcmexp_gpio, gc);
+
+ set.gpio = off + gpio->gc.base; /* GPIO to update */
+ set.state = val; /* Output state */
+
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_SET_GPIO_STATE,
+ &set, sizeof(set));
+ if (ret)
+ dev_err(gpio->dev,
+ "Failed to set GPIO %u state (%d)\n", off, ret);
+}
+
+static int brcmexp_gpio_probe(struct platform_device *pdev)
+{
+ int err = 0;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct device_node *fw_node;
+ struct rpi_firmware *fw;
+ struct brcmexp_gpio *ucb;
+
+ fw_node = of_parse_phandle(np, "firmware", 0);
+ if (!fw_node) {
+ dev_err(dev, "Missing firmware node\n");
+ return -ENOENT;
+ }
+
+ fw = rpi_firmware_get(fw_node);
+ if (!fw)
+ return -EPROBE_DEFER;
+
+ ucb = devm_kzalloc(dev, sizeof(*ucb), GFP_KERNEL);
+ if (!ucb)
+ return -EINVAL;
+
+ ucb->fw = fw;
+ ucb->dev = dev;
+ ucb->gc.label = MODULE_NAME;
+ ucb->gc.owner = THIS_MODULE;
+ ucb->gc.of_node = np;
+ ucb->gc.base = 128;
+ ucb->gc.ngpio = NUM_GPIO;
+
+ ucb->gc.direction_input = brcmexp_gpio_dir_in;
+ ucb->gc.direction_output = brcmexp_gpio_dir_out;
+ ucb->gc.get_direction = brcmexp_gpio_get_direction;
+ ucb->gc.get = brcmexp_gpio_get;
+ ucb->gc.set = brcmexp_gpio_set;
+ ucb->gc.can_sleep = true;
+
+ err = gpiochip_add(&ucb->gc);
+ if (err)
+ return err;
+
+ platform_set_drvdata(pdev, ucb);
+
+ return 0;
+}
+
+static int brcmexp_gpio_remove(struct platform_device *pdev)
+{
+ struct brcmexp_gpio *ucb = platform_get_drvdata(pdev);
+
+ gpiochip_remove(&ucb->gc);
+
+ return 0;
+}
+
+static const struct of_device_id __maybe_unused brcmexp_gpio_ids[] = {
+ { .compatible = "brcm,bcm2835-expgpio" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, brcmexp_gpio_ids);
+
+static struct platform_driver brcmexp_gpio_driver = {
+ .driver = {
+ .name = MODULE_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(brcmexp_gpio_ids),
+ },
+ .probe = brcmexp_gpio_probe,
+ .remove = brcmexp_gpio_remove,
+};
+module_platform_driver(brcmexp_gpio_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.org>");
+MODULE_DESCRIPTION("brcm-exp GPIO driver");
+MODULE_ALIAS("platform:brcmexp-gpio");
--
2.15.1
^ permalink raw reply related
* [PATCH 4/4] ARM: dts: bcm2837-rpi-3-b: add GPIO expander
From: Baruch Siach @ 2018-01-02 13:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1514898134.git.baruch@tkos.co.il>
Add a description of the RPi3 GPIO expander that the VC4 firmware controls.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
index b44b3b5af00d..09dca48da2bd 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
@@ -23,6 +23,16 @@
gpios = <&gpio 47 0>;
};
};
+
+ soc {
+ expgpio: expgpio {
+ compatible = "brcm,bcm2835-expgpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ firmware = <&firmware>;
+ status = "okay";
+ };
+ };
};
/* uart0 communicates with the BT module */
--
2.15.1
^ permalink raw reply related
* [PATCH 00/12] account for const type of of_device_id.data
From: Julia Lawall @ 2018-01-02 13:27 UTC (permalink / raw)
To: linux-arm-kernel
Maintain const annotations when putting values into the data field of
an of_device_id structure, and afterwards when extracting them from
the data field of such a structure.
This was done using the following semantic patch:
(http://coccinelle.lip6.fr/)
// <smpl>
@r@
identifier i,j;
const struct j *m;
struct i *y;
type T;
expression x,e;
position p;
@@
(
y =@p (T)(of_device_get_match_data(...));
|
x = of_match_node(...);
... when != x = e
(
m = e;
|
y =@p (T)(x->data);
)
)
@s@
identifier r.i,j;
@@
const struct i j = { ... };
@t depends on s disable optional_qualifier@
expression e;
identifier r.i,x,j,n;
struct j *m;
struct i *e1;
position any r.p;
type T;
@@
(
+const
struct i *x;
<+...
(
x =@p
- (T)(e)
+ e
|
x =@p e
)
...+>
|
m->@e1 n =@p
- (T)(e)
+ e
|
m->@e1 n =@p e
)
@disable optional_qualifier@
identifier t.j,t.n,r.i;
@@
struct j {
...
+ const
struct i *n;
...
}
@@
identifier x,s.j;
type T;
@@
struct of_device_id x[] = { ...,
{ .data =
- (T)
&j, }, ...};
// </smpl>
---
drivers/i2c/busses/i2c-rk3x.c | 16 ++++++++--------
drivers/iio/common/ssp_sensors/ssp.h | 2 +-
drivers/iio/common/ssp_sensors/ssp_dev.c | 2 +-
drivers/mtd/spi-nor/fsl-quadspi.c | 8 ++++----
drivers/pci/dwc/pcie-qcom.c | 4 ++--
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 4 ++--
drivers/pinctrl/pinctrl-at91-pio4.c | 4 ++--
drivers/pinctrl/pinctrl-axp209.c | 2 +-
drivers/power/avs/rockchip-io-domain.c | 24 ++++++++++++------------
drivers/power/reset/at91-sama5d2_shdwc.c | 4 ++--
drivers/power/supply/axp20x_ac_power.c | 8 ++++----
drivers/spi/spi-fsl-dspi.c | 7 +++----
drivers/spi/spi-sirf.c | 4 ++--
13 files changed, 44 insertions(+), 44 deletions(-)
^ permalink raw reply
* [PATCH 01/12] PM / AVS: rockchip-io: account for const type of of_device_id.data
From: Julia Lawall @ 2018-01-02 13:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514899688-27844-1-git-send-email-Julia.Lawall@lip6.fr>
This driver creates a number of const structures that it stores in the
data field of an of_device_id array.
The data field of an of_device_id structure has type const void *, so
there is no need for a const-discarding cast when putting const values
into such a structure.
Furthermore, adding const to the declaration of the location that
receives a const value from such a field ensures that the compiler
will continue to check that the value is not modified. The
const-discarding cast on the extraction from the data field is
thus no longer needed.
Done using Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
---
drivers/power/avs/rockchip-io-domain.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff -u -p a/drivers/power/avs/rockchip-io-domain.c b/drivers/power/avs/rockchip-io-domain.c
--- a/drivers/power/avs/rockchip-io-domain.c
+++ b/drivers/power/avs/rockchip-io-domain.c
@@ -76,7 +76,7 @@ struct rockchip_iodomain_supply {
struct rockchip_iodomain {
struct device *dev;
struct regmap *grf;
- struct rockchip_iodomain_soc_data *soc_data;
+ const struct rockchip_iodomain_soc_data *soc_data;
struct rockchip_iodomain_supply supplies[MAX_SUPPLIES];
};
@@ -382,43 +382,43 @@ static const struct rockchip_iodomain_so
static const struct of_device_id rockchip_iodomain_match[] = {
{
.compatible = "rockchip,rk3188-io-voltage-domain",
- .data = (void *)&soc_data_rk3188
+ .data = &soc_data_rk3188
},
{
.compatible = "rockchip,rk3228-io-voltage-domain",
- .data = (void *)&soc_data_rk3228
+ .data = &soc_data_rk3228
},
{
.compatible = "rockchip,rk3288-io-voltage-domain",
- .data = (void *)&soc_data_rk3288
+ .data = &soc_data_rk3288
},
{
.compatible = "rockchip,rk3328-io-voltage-domain",
- .data = (void *)&soc_data_rk3328
+ .data = &soc_data_rk3328
},
{
.compatible = "rockchip,rk3368-io-voltage-domain",
- .data = (void *)&soc_data_rk3368
+ .data = &soc_data_rk3368
},
{
.compatible = "rockchip,rk3368-pmu-io-voltage-domain",
- .data = (void *)&soc_data_rk3368_pmu
+ .data = &soc_data_rk3368_pmu
},
{
.compatible = "rockchip,rk3399-io-voltage-domain",
- .data = (void *)&soc_data_rk3399
+ .data = &soc_data_rk3399
},
{
.compatible = "rockchip,rk3399-pmu-io-voltage-domain",
- .data = (void *)&soc_data_rk3399_pmu
+ .data = &soc_data_rk3399_pmu
},
{
.compatible = "rockchip,rv1108-io-voltage-domain",
- .data = (void *)&soc_data_rv1108
+ .data = &soc_data_rv1108
},
{
.compatible = "rockchip,rv1108-pmu-io-voltage-domain",
- .data = (void *)&soc_data_rv1108_pmu
+ .data = &soc_data_rv1108_pmu
},
{ /* sentinel */ },
};
@@ -443,7 +443,7 @@ static int rockchip_iodomain_probe(struc
platform_set_drvdata(pdev, iod);
match = of_match_node(rockchip_iodomain_match, np);
- iod->soc_data = (struct rockchip_iodomain_soc_data *)match->data;
+ iod->soc_data = match->data;
parent = pdev->dev.parent;
if (parent && parent->of_node) {
^ permalink raw reply
* [PATCH 02/12] pinctrl: at91-pio4: account for const type of of_device_id.data
From: Julia Lawall @ 2018-01-02 13:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514899688-27844-1-git-send-email-Julia.Lawall@lip6.fr>
This driver creates a const structure that it stores in the data field
of an of_device_id array.
Adding const to the declaration of the location that receives the
const value from the data field ensures that the compiler will
continue to check that the value is not modified. Furthermore, the
const-discarding cast on the extraction from the data field is no
longer needed.
Done using Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
---
drivers/pinctrl/pinctrl-at91-pio4.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff -u -p a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -910,7 +910,7 @@ static int atmel_pinctrl_probe(struct pl
int i, ret;
struct resource *res;
struct atmel_pioctrl *atmel_pioctrl;
- struct atmel_pioctrl_data *atmel_pioctrl_data;
+ const struct atmel_pioctrl_data *atmel_pioctrl_data;
atmel_pioctrl = devm_kzalloc(dev, sizeof(*atmel_pioctrl), GFP_KERNEL);
if (!atmel_pioctrl)
@@ -924,7 +924,7 @@ static int atmel_pinctrl_probe(struct pl
dev_err(dev, "unknown compatible string\n");
return -ENODEV;
}
- atmel_pioctrl_data = (struct atmel_pioctrl_data *)match->data;
+ atmel_pioctrl_data = match->data;
atmel_pioctrl->nbanks = atmel_pioctrl_data->nbanks;
atmel_pioctrl->npins = atmel_pioctrl->nbanks * ATMEL_PIO_NPINS_PER_BANK;
^ permalink raw reply
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