* [PATCH] iommu/arm-smmu-v3: Cope with duplicated Stream IDs
From: tn @ 2018-01-02 16:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <13744c7ba2af61bc39b68e9ab05ab8482f928334.1514896042.git.robin.murphy@arm.com>
Hi Robin,
Thank you for fixing this.
Regards,
Tomasz
On 02.01.2018 13:33, Robin Murphy wrote:
> For PCI devices behind an aliasing PCIe-to-PCI/X bridge, the bridge
> alias to DevFn 0.0 on the subordinate bus may match the original RID of
> the device, resulting in the same SID being present in the device's
> fwspec twice. This causes trouble later in arm_smmu_write_strtab_ent()
> when we wind up visiting the STE a second time and find it already live.
>
> Avoid the issue by giving arm_smmu_install_ste_for_dev() the cleverness
> to skip over duplicates. It seems mildly counterintuitive compared to
> preventing the duplicates from existing in the first place, but since
> the DT and ACPI probe paths build their fwspecs differently, this is
> actually the cleanest and most self-contained way to deal with it.
>
> Fixes: 8f78515425da ("iommu/arm-smmu: Implement of_xlate() for SMMUv3")
> Reported-by: Tomasz Nowicki <tomasz.nowicki@caviumnetworks.com>
> Tested-by: Tomasz Nowicki <Tomasz.Nowicki@cavium.com>
> Tested-by: Jayachandran C. <jnair@caviumnetworks.com>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
> drivers/iommu/arm-smmu-v3.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index 9ce3cde575a8..57c92aa3122e 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -1752,7 +1752,7 @@ static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid)
>
> static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec)
> {
> - int i;
> + int i, j;
> struct arm_smmu_master_data *master = fwspec->iommu_priv;
> struct arm_smmu_device *smmu = master->smmu;
>
> @@ -1760,6 +1760,13 @@ static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec)
> u32 sid = fwspec->ids[i];
> __le64 *step = arm_smmu_get_step_for_sid(smmu, sid);
>
> + /* Bridged PCI devices may end up with duplicated IDs */
> + for (j = 0; j < i; j++)
> + if (fwspec->ids[j] == sid)
> + break;
> + if (j < i)
> + continue;
> +
> arm_smmu_write_strtab_ent(smmu, sid, step, &master->ste);
> }
> }
>
^ permalink raw reply
* [PATCH 05/12] mfd: mtk-audsys: add MediaTek audio subsystem driver
From: Lee Jones @ 2018-01-02 16:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <fbe22b0d78c41b121f04202dcbfcd0cc23a7590d.1514881870.git.ryder.lee@mediatek.com>
On Tue, 02 Jan 2018, Ryder Lee wrote:
> Add a common driver for the top block of the MediaTek audio subsystem.
> This is a wrapper which manages resources for audio components.
>
> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
> ---
> drivers/mfd/Kconfig | 9 ++++
> drivers/mfd/Makefile | 2 +
> drivers/mfd/mtk-audsys.c | 138 +++++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 149 insertions(+)
> create mode 100644 drivers/mfd/mtk-audsys.c
>
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 1d20a80..ea50b51 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -368,6 +368,15 @@ config MFD_MC13XXX_I2C
> help
> Select this if your MC13xxx is connected via an I2C bus.
>
> +config MFD_MEDIATEK_AUDSYS
> + tristate "MediaTek audio subsystem interface"
> + select MDF_CORE
> + select REGMAP_MMIO
> + help
> + Select this if you have a audio subsystem in MediaTek SoC.
> + The audio subsystem has at least a clock driver part and some
> + audio components.
> +
> config MFD_MXS_LRADC
> tristate "Freescale i.MX23/i.MX28 LRADC"
> depends on ARCH_MXS || COMPILE_TEST
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index d9474ad..3e20927 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -101,6 +101,8 @@ obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o
> obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o
> obj-$(CONFIG_MFD_MC13XXX_I2C) += mc13xxx-i2c.o
>
> +obj-$(CONFIG_MFD_MEDIATEK_AUDSYS) += mtk-audsys.o
> +
> obj-$(CONFIG_MFD_CORE) += mfd-core.o
>
> obj-$(CONFIG_EZX_PCAP) += ezx-pcap.o
> diff --git a/drivers/mfd/mtk-audsys.c b/drivers/mfd/mtk-audsys.c
> new file mode 100644
> index 0000000..89399e1
> --- /dev/null
> +++ b/drivers/mfd/mtk-audsys.c
> @@ -0,0 +1,138 @@
> +/*
> + * Mediatek audio subsystem core driver
> + *
> + * Copyright (c) 2017 MediaTek Inc.
> + *
> + * Author: Ryder Lee <ryder.lee@mediatek.com>
> + *
> + * For licencing details see kernel-base/COPYING
You can't do that.
Grep for SPDX to see what is expected.
> + *
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +#define AUDSYS_MAX_CLK_NUM 3
When is this not 3?
> +struct sys_dev {
> + struct device *dev;
> + struct regmap *regmap;
> + int clk_num;
> + struct clk *clks[];
> +};
> +
> +static const struct regmap_config aud_regmap_config = {
> + .reg_bits = 32,
> + .reg_stride = 4,
> + .val_bits = 32,
> + .max_register = 0x15e0,
> + .cache_type = REGCACHE_NONE,
> +};
> +
> +static int mtk_subsys_enable(struct sys_dev *sys)
> +{
> + struct device *dev = sys->dev;
I would remove dev and regmap from the sys_dev struct and pass in pdev
directly into this function. Then use platform_get_drvdata() as you
did in .remove().
> + struct clk *clk;
> + int i, ret;
> +
> + for (i = 0; i < sys->clk_num; i++) {
> + clk = of_clk_get(dev->of_node, i);
> + if (IS_ERR(clk)) {
> + if (PTR_ERR(clk) == -EPROBE_DEFER)
> + return -EPROBE_DEFER;
> + break;
> + }
> + sys->clks[i] = clk;
> + }
> +
> + for (i = 0; i < sys->clk_num && sys->clks[i]; i++) {
Why do you need a separate loop for this?
Just prepare and enable valid clocks in the for() loop above.
> + ret = clk_prepare_enable(sys->clks[i]);
> + if (ret)
> + goto err_enable_clks;
> + }
> +
> + return 0;
> +
> +err_enable_clks:
> + while (--i >= 0)
> + clk_disable_unprepare(sys->clks[i]);
> +
> + return ret;
> +}
> +
> +static int mtk_subsys_probe(struct platform_device *pdev)
> +{
> + struct sys_dev *sys;
> + struct resource *res;
> + void __iomem *mmio;
> + int num, ret;
> +
> + num = (int)of_device_get_match_data(&pdev->dev);
> + if (!num)
> + return -EINVAL;
This is a very rigid method of achieving your aim. Please find a way
to make this more dynamic. You're probably better off counting the
elements within the property, checking to ensure there aren't more
than the maximum pre-allocated/allowed clocks, then using the number
gleaned directly from the Device Tree.
> + sys = devm_kzalloc(&pdev->dev, sizeof(*sys) +
> + sizeof(struct clk *) * num, GFP_KERNEL);
You need to add bracketing here for clarity.
> + if (!sys)
> + return -ENOMEM;
> +
> + sys->clk_num = num;
> + sys->dev = &pdev->dev;
Why are you saving the device pointer?
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + mmio = devm_ioremap_resource(sys->dev, res);
> + if (IS_ERR(mmio))
> + return PTR_ERR(mmio);
> +
> + sys->regmap = devm_regmap_init_mmio(sys->dev, mmio,
> + &aud_regmap_config);
Why are you saving a devm'ed regmap pointer?
> + if (IS_ERR(sys->regmap))
> + return PTR_ERR(sys->regmap);
> +
> + platform_set_drvdata(pdev, sys);
> +
> + /* Enable top level clocks */
> + ret = mtk_subsys_enable(sys);
mtk_subsys_enable_clks()
> + if (ret)
> + return ret;
> +
> + return devm_of_platform_populate(sys->dev);
> +};
> +
> +static int mtk_subsys_remove(struct platform_device *pdev)
> +{
> + struct sys_dev *sys = platform_get_drvdata(pdev);
> + int i;
> +
> + for (i = sys->clk_num - 1; i >= 0; i--)
> + if (sys->clks[i])
This check is superfluous as the clk subsystem does this for you.
> + clk_disable_unprepare(sys->clks[i]);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id of_match_audsys[] = {
> + {
> + .compatible = "mediatek,mt2701-audsys-core",
> + .data = (void *)AUDSYS_MAX_CLK_NUM,
You can remove this line.
> + },
> + {},
> +};
> +MODULE_DEVICE_TABLE(platform, of_match_audsys);
> +
> +static struct platform_driver audsys_drv = {
> + .probe = mtk_subsys_probe,
> + .remove = mtk_subsys_remove,
> + .driver = {
> + .name = "mediatek-audsys-core",
> + .of_match_table = of_match_ptr(of_match_audsys),
> + },
> +};
> +
> +builtin_platform_driver(audsys_drv);
> +
> +MODULE_DESCRIPTION("Mediatek audio subsystem core driver");
> +MODULE_LICENSE("GPL");
<just_checking>
Are you sure this is what you want?
</just_checking>
--
Lee Jones
Linaro Services Technical Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* [PATCH 26/67] dma-direct: use phys_to_dma
From: Vladimir Murzin @ 2018-01-02 16:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171229081911.2802-27-hch@lst.de>
On 29/12/17 08:18, Christoph Hellwig wrote:
> This means it uses whatever linear remapping scheme that the architecture
> provides is used in the generic dma_direct ops.
>
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
> lib/dma-direct.c | 18 +++++++-----------
> 1 file changed, 7 insertions(+), 11 deletions(-)
>
> diff --git a/lib/dma-direct.c b/lib/dma-direct.c
> index 439db40854b7..0e087650e86b 100644
> --- a/lib/dma-direct.c
> +++ b/lib/dma-direct.c
> @@ -1,12 +1,11 @@
> // SPDX-License-Identifier: GPL-2.0
> /*
> - * lib/dma-noop.c
> - *
> - * DMA operations that map to physical addresses without flushing memory.
> + * DMA operations that map physical memory directly without using an IOMMU or
> + * flushing caches.
> */
> #include <linux/export.h>
> #include <linux/mm.h>
> -#include <linux/dma-mapping.h>
> +#include <linux/dma-direct.h>
> #include <linux/scatterlist.h>
> #include <linux/pfn.h>
>
> @@ -17,7 +16,7 @@ static void *dma_direct_alloc(struct device *dev, size_t size,
>
> ret = (void *)__get_free_pages(gfp, get_order(size));
> if (ret)
> - *dma_handle = virt_to_phys(ret) - PFN_PHYS(dev->dma_pfn_offset);
> + *dma_handle = phys_to_dma(dev, virt_to_phys(ret));
>
> return ret;
> }
> @@ -32,7 +31,7 @@ static dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
> unsigned long offset, size_t size, enum dma_data_direction dir,
> unsigned long attrs)
> {
> - return page_to_phys(page) + offset - PFN_PHYS(dev->dma_pfn_offset);
> + return phys_to_dma(dev, page_to_phys(page)) + offset;
> }
>
> static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
> @@ -42,12 +41,9 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
> struct scatterlist *sg;
>
> for_each_sg(sgl, sg, nents, i) {
> - dma_addr_t offset = PFN_PHYS(dev->dma_pfn_offset);
> - void *va;
> -
> BUG_ON(!sg_page(sg));
> - va = sg_virt(sg);
> - sg_dma_address(sg) = (dma_addr_t)virt_to_phys(va) - offset;
> +
> + sg_dma_address(sg) = phys_to_dma(dev, sg_phys(sg));
> sg_dma_len(sg) = sg->length;
> }
>
>
>From ARM NOMMU perspective
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Thanks
Vladimir
^ permalink raw reply
* [PATCH 25/67] dma-direct: rename dma_noop to dma_direct
From: Vladimir Murzin @ 2018-01-02 16:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171229081911.2802-26-hch@lst.de>
On 29/12/17 08:18, Christoph Hellwig wrote:
> The trivial direct mapping implementation already does a virtual to
> physical translation which isn't strictly a noop, and will soon learn
> to do non-direct but linear physical to dma translations through the
> device offset and a few small tricks. Rename it to a better fitting
> name.
>
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
> MAINTAINERS | 2 +-
> arch/arm/Kconfig | 2 +-
> arch/arm/include/asm/dma-mapping.h | 2 +-
> arch/arm/mm/dma-mapping-nommu.c | 8 ++++----
> arch/m32r/Kconfig | 2 +-
> arch/riscv/Kconfig | 2 +-
> arch/s390/Kconfig | 2 +-
> include/asm-generic/dma-mapping.h | 2 +-
> include/linux/dma-mapping.h | 2 +-
> lib/Kconfig | 2 +-
> lib/Makefile | 2 +-
> lib/{dma-noop.c => dma-direct.c} | 35 +++++++++++++++--------------------
> 12 files changed, 29 insertions(+), 34 deletions(-)
> rename lib/{dma-noop.c => dma-direct.c} (53%)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a8b35d9f41b2..b4005fe06e4c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -4336,7 +4336,7 @@ T: git git://git.infradead.org/users/hch/dma-mapping.git
> W: http://git.infradead.org/users/hch/dma-mapping.git
> S: Supported
> F: lib/dma-debug.c
> -F: lib/dma-noop.c
> +F: lib/dma-direct.c
> F: lib/dma-virt.c
> F: drivers/base/dma-mapping.c
> F: drivers/base/dma-coherent.c
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 00d889a37965..430a0aa710d6 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -25,7 +25,7 @@ config ARM
> select CLONE_BACKWARDS
> select CPU_PM if (SUSPEND || CPU_IDLE)
> select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
> - select DMA_NOOP_OPS if !MMU
> + select DMA_DIRECT_OPS if !MMU
> select EDAC_SUPPORT
> select EDAC_ATOMIC_SCRUB
> select GENERIC_ALLOCATOR
> diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
> index e5d9020c9ee1..8436f6ade57d 100644
> --- a/arch/arm/include/asm/dma-mapping.h
> +++ b/arch/arm/include/asm/dma-mapping.h
> @@ -18,7 +18,7 @@ extern const struct dma_map_ops arm_coherent_dma_ops;
>
> static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
> {
> - return IS_ENABLED(CONFIG_MMU) ? &arm_dma_ops : &dma_noop_ops;
> + return IS_ENABLED(CONFIG_MMU) ? &arm_dma_ops : &dma_direct_ops;
> }
>
> #ifdef __arch_page_to_dma
> diff --git a/arch/arm/mm/dma-mapping-nommu.c b/arch/arm/mm/dma-mapping-nommu.c
> index 1cced700e45a..49e9831dc0f1 100644
> --- a/arch/arm/mm/dma-mapping-nommu.c
> +++ b/arch/arm/mm/dma-mapping-nommu.c
> @@ -22,7 +22,7 @@
> #include "dma.h"
>
> /*
> - * dma_noop_ops is used if
> + * dma_direct_ops is used if
> * - MMU/MPU is off
> * - cpu is v7m w/o cache support
> * - device is coherent
> @@ -39,7 +39,7 @@ static void *arm_nommu_dma_alloc(struct device *dev, size_t size,
> unsigned long attrs)
>
> {
> - const struct dma_map_ops *ops = &dma_noop_ops;
> + const struct dma_map_ops *ops = &dma_direct_ops;
> void *ret;
>
> /*
> @@ -70,7 +70,7 @@ static void arm_nommu_dma_free(struct device *dev, size_t size,
> void *cpu_addr, dma_addr_t dma_addr,
> unsigned long attrs)
> {
> - const struct dma_map_ops *ops = &dma_noop_ops;
> + const struct dma_map_ops *ops = &dma_direct_ops;
>
> if (attrs & DMA_ATTR_NON_CONSISTENT) {
> ops->free(dev, size, cpu_addr, dma_addr, attrs);
> @@ -214,7 +214,7 @@ EXPORT_SYMBOL(arm_nommu_dma_ops);
>
> static const struct dma_map_ops *arm_nommu_get_dma_map_ops(bool coherent)
> {
> - return coherent ? &dma_noop_ops : &arm_nommu_dma_ops;
> + return coherent ? &dma_direct_ops : &arm_nommu_dma_ops;
> }
>
> void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
> diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
> index 498398d915c1..dd84ee194579 100644
> --- a/arch/m32r/Kconfig
> +++ b/arch/m32r/Kconfig
> @@ -19,7 +19,7 @@ config M32R
> select MODULES_USE_ELF_RELA
> select HAVE_DEBUG_STACKOVERFLOW
> select CPU_NO_EFFICIENT_FFS
> - select DMA_NOOP_OPS
> + select DMA_DIRECT_OPS
> select ARCH_NO_COHERENT_DMA_MMAP if !MMU
>
> config SBUS
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 2c6adf12713a..865e14f50c14 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -83,7 +83,7 @@ config PGTABLE_LEVELS
> config HAVE_KPROBES
> def_bool n
>
> -config DMA_NOOP_OPS
> +config DMA_DIRECT_OPS
> def_bool y
>
> menu "Platform type"
> diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
> index 829c67986db7..9376637229c9 100644
> --- a/arch/s390/Kconfig
> +++ b/arch/s390/Kconfig
> @@ -140,7 +140,7 @@ config S390
> select HAVE_DEBUG_KMEMLEAK
> select HAVE_DMA_API_DEBUG
> select HAVE_DMA_CONTIGUOUS
> - select DMA_NOOP_OPS
> + select DMA_DIRECT_OPS
> select HAVE_DYNAMIC_FTRACE
> select HAVE_DYNAMIC_FTRACE_WITH_REGS
> select HAVE_EFFICIENT_UNALIGNED_ACCESS
> diff --git a/include/asm-generic/dma-mapping.h b/include/asm-generic/dma-mapping.h
> index 164031531d85..880a292d792f 100644
> --- a/include/asm-generic/dma-mapping.h
> +++ b/include/asm-generic/dma-mapping.h
> @@ -4,7 +4,7 @@
>
> static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
> {
> - return &dma_noop_ops;
> + return &dma_direct_ops;
> }
>
> #endif /* _ASM_GENERIC_DMA_MAPPING_H */
> diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
> index 72568bf4fc12..ff3528de5322 100644
> --- a/include/linux/dma-mapping.h
> +++ b/include/linux/dma-mapping.h
> @@ -143,7 +143,7 @@ struct dma_map_ops {
> bool is_phys;
> };
>
> -extern const struct dma_map_ops dma_noop_ops;
> +extern const struct dma_map_ops dma_direct_ops;
> extern const struct dma_map_ops dma_virt_ops;
>
> #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
> diff --git a/lib/Kconfig b/lib/Kconfig
> index c5e84fbcb30b..9d3d649c9dc9 100644
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -409,7 +409,7 @@ config HAS_DMA
> depends on !NO_DMA
> default y
>
> -config DMA_NOOP_OPS
> +config DMA_DIRECT_OPS
> bool
> depends on HAS_DMA && (!64BIT || ARCH_DMA_ADDR_T_64BIT)
> default n
> diff --git a/lib/Makefile b/lib/Makefile
> index d11c48ec8ffd..749851abe85a 100644
> --- a/lib/Makefile
> +++ b/lib/Makefile
> @@ -28,7 +28,7 @@ lib-y := ctype.o string.o vsprintf.o cmdline.o \
>
> lib-$(CONFIG_MMU) += ioremap.o
> lib-$(CONFIG_SMP) += cpumask.o
> -lib-$(CONFIG_DMA_NOOP_OPS) += dma-noop.o
> +lib-$(CONFIG_DMA_DIRECT_OPS) += dma-direct.o
> lib-$(CONFIG_DMA_VIRT_OPS) += dma-virt.o
>
> lib-y += kobject.o klist.o
> diff --git a/lib/dma-noop.c b/lib/dma-direct.c
> similarity index 53%
> rename from lib/dma-noop.c
> rename to lib/dma-direct.c
> index c3728a0551f5..439db40854b7 100644
> --- a/lib/dma-noop.c
> +++ b/lib/dma-direct.c
> @@ -10,9 +10,8 @@
> #include <linux/scatterlist.h>
> #include <linux/pfn.h>
>
> -static void *dma_noop_alloc(struct device *dev, size_t size,
> - dma_addr_t *dma_handle, gfp_t gfp,
> - unsigned long attrs)
> +static void *dma_direct_alloc(struct device *dev, size_t size,
> + dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
> {
> void *ret;
>
> @@ -23,24 +22,21 @@ static void *dma_noop_alloc(struct device *dev, size_t size,
> return ret;
> }
>
> -static void dma_noop_free(struct device *dev, size_t size,
> - void *cpu_addr, dma_addr_t dma_addr,
> - unsigned long attrs)
> +static void dma_direct_free(struct device *dev, size_t size, void *cpu_addr,
> + dma_addr_t dma_addr, unsigned long attrs)
> {
> free_pages((unsigned long)cpu_addr, get_order(size));
> }
>
> -static dma_addr_t dma_noop_map_page(struct device *dev, struct page *page,
> - unsigned long offset, size_t size,
> - enum dma_data_direction dir,
> - unsigned long attrs)
> +static dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
> + unsigned long offset, size_t size, enum dma_data_direction dir,
> + unsigned long attrs)
> {
> return page_to_phys(page) + offset - PFN_PHYS(dev->dma_pfn_offset);
> }
>
> -static int dma_noop_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
> - enum dma_data_direction dir,
> - unsigned long attrs)
> +static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
> + int nents, enum dma_data_direction dir, unsigned long attrs)
> {
> int i;
> struct scatterlist *sg;
> @@ -58,12 +54,11 @@ static int dma_noop_map_sg(struct device *dev, struct scatterlist *sgl, int nent
> return nents;
> }
>
> -const struct dma_map_ops dma_noop_ops = {
> - .alloc = dma_noop_alloc,
> - .free = dma_noop_free,
> - .map_page = dma_noop_map_page,
> - .map_sg = dma_noop_map_sg,
> +const struct dma_map_ops dma_direct_ops = {
> + .alloc = dma_direct_alloc,
> + .free = dma_direct_free,
> + .map_page = dma_direct_map_page,
> + .map_sg = dma_direct_map_sg,
> .is_phys = true,
> };
> -
> -EXPORT_SYMBOL(dma_noop_ops);
> +EXPORT_SYMBOL(dma_direct_ops);
>
>From ARM NOMMU perspective
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Thanks
Vladimir
^ permalink raw reply
* [PATCH v2 0/8] Armada 7K/8K CP110 DT de-duplication
From: Thomas Petazzoni @ 2018-01-02 16:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87373ocm5n.fsf@free-electrons.com>
Hello,
On Tue, 02 Jan 2018 16:31:32 +0100, Gregory CLEMENT wrote:
> I applied all the series on mvebu/dt64. The only change I made was
> adding a commit log to the patch 3:
> "Fix the same typo duplicated in both master and slave version of
> armada-cp110-*.dtsi file: s/limiation/limitation/."
Thanks!
I would recommend you to ask people submitting DT changes for this
cycle to base their changes on your mvebu/dt64 branch, because most DT
changes for 7K/8K are going to conflict with this de-duplication +
renaming patch series.
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* [PATCH 1/3] dt-bindings: mfd: axp20x: Document backup battery charging property
From: Lee Jones @ 2018-01-02 15:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171230152330.28946-2-contact@paulk.fr>
On Sat, 30 Dec 2017, Paul Kocialkowski wrote:
> This adds documentation for the "backup" property of the axp20x driver,
> that controls the charging mechanism for the backup battery on axp20x.
>
> Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
>
> diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
> index 9455503b0299..382776b29932 100644
> --- a/Documentation/devicetree/bindings/mfd/axp20x.txt
> +++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
> @@ -58,6 +58,11 @@ Optional properties:
> See Documentation/devicetree/bindings/regulator/regulator.txt
> for more information on standard regulator bindings.
>
> +- backup: An array of two integers for backup battery charging (axp20x-only),
> + describing the charging voltage in mV first and the charging current
> + in uA second. Backup battery charging is only enabled when these two
> + fields are filled.
> +
> Optional properties for DCDC regulators:
> - x-powers,dcdc-workmode: 1 for PWM mode, 0 for AUTO (PWM/PFM) mode
> Default: Current hardware setting
> @@ -256,4 +261,6 @@ axp209: pmic at 34 {
> /* unused but preferred to be managed by OS */
> };
> };
> +
> + backup = <3000 200>;
It's unlikely that this will become a generic property, so you should
prefix it with your vendor ID.
> };
--
Lee Jones
Linaro Services Technical Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* [PATCH V2 3/7] PCI: make pci_flr_wait() generic and rename to pci_dev_wait()
From: Sinan Kaya @ 2018-01-02 15:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171213224304.GK30595@bhelgaas-glaptop.roam.corp.google.com>
On 12/13/2017 5:43 PM, Bjorn Helgaas wrote:
>> +
>> + /*
>> + * Per PCIe r3.1, sec 6.6.2, a device must complete an FLR within
> I think this should reference the "Advanced Capabilities for
> Conventional PCI" ECN, shouldn't it? The one I see is dated 13 April
> 2006, updated 27 July 2006, and I don't see a PCI spec that includes
> it.
I'll add reference to PCI spec as well. Any other comments on the series?
>
>> + * 100ms, but may silently discard requests while the FLR is in
>> + * progress. Wait 100ms before trying to access the device.
>> + */
>> + msleep(100);
>> +
>> + return pci_dev_wait(dev, "AF_FLR", PCIE_RESET_READY_POLL_MS);
> CRS is not applicable to conventional PCI. The ECN mentions waiting
> 100ms. I don't see anything about polling after that, but I guess it
> probably doesn't hurt anything.
ok, I'll keep it as it is.
>
>> }
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH 2/3] mfd: axp20x: Add support for backup battery charging
From: Lee Jones @ 2018-01-02 15:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171230152330.28946-3-contact@paulk.fr>
On Sat, 30 Dec 2017, Paul Kocialkowski wrote:
> This adds support for backup battery charging for axp20x PMICs, that is
> configured through a dedicated device-tree property.
>
> It supports 4 different charging voltages and as many charging currents.
> This is especially useful to allow the on-chip RTC (on the SoC side) to
> be powered when the rest of the system is off.
>
> Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
>
> diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
> index 2468b431bb22..7847f5d0b979 100644
> --- a/drivers/mfd/axp20x.c
> +++ b/drivers/mfd/axp20x.c
> @@ -34,6 +34,16 @@
> #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0
> #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4)
>
> +#define AXP20X_CHRG_BAK_CTRL_ENABLE BIT(7)
> +#define AXP20X_CHRG_BAK_VOLTAGE_3100_MV (0 << 5)
> +#define AXP20X_CHRG_BAK_VOLTAGE_3000_MV (1 << 5)
> +#define AXP20X_CHRG_BAK_VOLTAGE_3600_MV (2 << 5)
> +#define AXP20X_CHRG_BAK_VOLTAGE_2500_MV (3 << 5)
> +#define AXP20X_CHRG_BAK_CURRENT_50_UA (0 << 0)
> +#define AXP20X_CHRG_BAK_CURRENT_100_UA (1 << 0)
> +#define AXP20X_CHRG_BAK_CURRENT_200_UA (2 << 0)
> +#define AXP20X_CHRG_BAK_CURRENT_400_UA (3 << 0)
> +
> static const char * const axp20x_model_names[] = {
> "AXP152",
> "AXP202",
> @@ -894,6 +904,63 @@ static void axp20x_power_off(void)
> msleep(500);
> }
>
> +static void axp20x_backup_setup(struct axp20x_dev *axp20x)
> +{
> + u32 backup[2];
> + int reg;
> + int ret;
> +
> + ret = of_property_read_u32_array(axp20x->dev->of_node, "backup", backup,
> + 2);
> + if (ret != 0)
Nit:
if (ret)
> + return;
> +
> + switch (axp20x->variant) {
> + case AXP202_ID:
> + case AXP209_ID:
Nested switch statements, hmm ...
Instead, what if you either only invoked this function for supported
devices, or at least returned early for non-supported ones?
if (axp20x->variant != AXP202_ID && axp20x->variant != AXP209_ID)
return;
> + reg = AXP20X_CHRG_BAK_CTRL_ENABLE;
> +
> + /* Charging voltage. */
> + switch (backup[0]) {
> + case 2500:
> + reg |= AXP20X_CHRG_BAK_VOLTAGE_2500_MV;
> + break;
> + case 3000:
> + reg |= AXP20X_CHRG_BAK_VOLTAGE_3000_MV;
> + break;
> + case 3100:
> + reg |= AXP20X_CHRG_BAK_VOLTAGE_3100_MV;
> + break;
> + case 3600:
> + reg |= AXP20X_CHRG_BAK_VOLTAGE_3600_MV;
> + break;
> + default:
> + return;
> + }
> +
> + /* Charging current. */
> + switch (backup[1]) {
> + case 50:
> + reg |= AXP20X_CHRG_BAK_CURRENT_50_UA;
> + break;
> + case 100:
> + reg |= AXP20X_CHRG_BAK_CURRENT_100_UA;
> + break;
> + case 200:
> + reg |= AXP20X_CHRG_BAK_CURRENT_200_UA;
> + break;
> + case 400:
> + reg |= AXP20X_CHRG_BAK_CURRENT_400_UA;
> + break;
> + default:
> + return;
> + }
> +
> + regmap_write(axp20x->regmap, AXP20X_CHRG_BAK_CTRL, reg);
> + break;
> + }
> +}
> +
> int axp20x_match_device(struct axp20x_dev *axp20x)
> {
> struct device *dev = axp20x->dev;
> @@ -1023,6 +1090,9 @@ int axp20x_device_probe(struct axp20x_dev *axp20x)
> AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
> }
>
> + /* Backup RTC battery. */
> + axp20x_backup_setup(axp20x);
> +
> ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
> IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
> -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc);
--
Lee Jones
Linaro Services Technical Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* [PATCH 05/12] pinctrl: armada-37xx: account for const type of of_device_id.data
From: Gregory CLEMENT @ 2018-01-02 15:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514899688-27844-6-git-send-email-Julia.Lawall@lip6.fr>
Hi Julia,
On mar., janv. 02 2018, Julia Lawall <Julia.Lawall@lip6.fr> wrote:
> The data field of an of_device_id structure has type const void *, so
> there is no need for a const-discarding cast when putting const values
> into such a structure.
>
> Done using Coccinelle.
>
> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Thanks,
Gregory
PS: actually the intent was not to do a const-discarding cast it was
just a useless cast! :)
>
> ---
> drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff -u -p a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> @@ -1006,11 +1006,11 @@ static int armada_37xx_pinctrl_register(
> static const struct of_device_id armada_37xx_pinctrl_of_match[] = {
> {
> .compatible = "marvell,armada3710-sb-pinctrl",
> - .data = (void *)&armada_37xx_pin_sb,
> + .data = &armada_37xx_pin_sb,
> },
> {
> .compatible = "marvell,armada3710-nb-pinctrl",
> - .data = (void *)&armada_37xx_pin_nb,
> + .data = &armada_37xx_pin_nb,
> },
> { },
> };
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH 2/2] cpufreq: imx6q: add 696MHz operating point for i.mx6ul
From: Fabio Estevam @ 2018-01-02 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6FFDB281-8293-4D2C-891F-B376B52EFECF@nxp.com>
On Tue, Jan 2, 2018 at 1:17 PM, Anson Huang <anson.huang@nxp.com> wrote:
> This change is only valid for mx6ul and mx6ull, other SoCs like 6q/dl/qp are
> NOT impacted.
Thanks for the clarification:
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH 1/2] ARM: dts: imx6ul: add 696MHz operating point
From: Fabio Estevam @ 2018-01-02 15:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E5B0DB53-D0E5-430B-BBCC-EF3899C70DAE@nxp.com>
On Tue, Jan 2, 2018 at 1:12 PM, Anson Huang <anson.huang@nxp.com> wrote:
> There is a comment in VDD_ARM, VDD_SOC must NOT lower than VDD_ARM.
>
> Output voltage must be set to the following rules:
> ? VDD_ARM_CAP <= VDD_SOC_CAP
> ? VDD_SOC_CAP - VDD_ARM_CAP < 330 mV
Thanks for the clarifcation.
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH v2 0/8] Armada 7K/8K CP110 DT de-duplication
From: Gregory CLEMENT @ 2018-01-02 15:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180102145558.9773-1-thomas.petazzoni@free-electrons.com>
Hi Thomas,
On mar., janv. 02 2018, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote:
> Hello,
>
> This series aims at de-duplicating the Armada CP110 Device Tree
> description, which is currently duplicated between
> armada-cp110-master.dtsi and armada-cp110-slave.dtsi, even though they
> are almost identical. Indeed, one concept of Marvell SoCs is that they
> are made of HW blocks composed of a variety of IPs (network, PCIe,
> SATA, XOR, SPI, I2C, etc.), and those HW blocks can be duplicated
> several times within a given SoC. The Armada 7K SoC has a single CP110
> (so no duplication), while the Armada 8K SoC has two CP110. In the
> future, SoCs with more than 2 CP110s will be introduced.
>
> This duplication issue has been discussed at the DT workshop [1] in
> Prague last October, and I presented on this topic [2]. The solution
> of using the C pre-processor to avoid this duplication has been
> validated by the people present in this DT workshop, and this patch
> series simply submits what has been presented.
>
> - The first four patches are fixes for existing
> issues/inconsistencies in the Device Tree files. Since they don't
> fix any visible problems, they are not marked for -stable.
>
> - The fifth patch is a minor improvement.
>
> - The sixth patch making use of aliases for SPI busses simply aims at
> reducing the number of changes between the CP110 master and CP110
> slave description, by avoiding the need for the cell-index property
> in the SPI controller DT nodes.
>
> - The seventh patch implements the de-duplication itself, by
> introducing an armada-cp110.dtsi file included twice on Armada 8K
> platforms, once for the master CP110 and once for the slave CP110.
>
> - The last patch renames cpm to cp0 and cps to cp1, as the concept of
> master/slave CPs does not apply to future SoCs that have more than
> 2 CPs.
>
> Changes since v1:
>
> - Rebase on top of mvebu/dt64, since the NAND controller changes will
> only be submitted for 4.17.
>
> - Add patches fixing NAND related typos/inconsistencies:
> arm64: dts: marvell: fix typos in comment describing the NAND controller
> arm64: dts: marvell: fix compatible string list for Armada CP110 slave NAND
>
> - Improve the de-duplication patch by removing
> armada-cp110-master.dtsi and armada-cp110-slave.dtsi, since the
> concept of master/slave will no longer exist when we will have more
> than 2 CPs.
>
> - Add a patch renaming cpm -> cp0, cps -> cp1.
>
> Best regards,
>
> Thomas
>
I applied all the series on mvebu/dt64. The only change I made was
adding a commit log to the patch 3:
"Fix the same typo duplicated in both master and slave version of
armada-cp110-*.dtsi file: s/limiation/limitation/."
Thanks,
Gregory
> [1] https://elinux.org/Device_tree_kernel_summit_2017_etherpad
> [2] https://elinux.org/images/1/14/DTWorkshop2017-duplicate-data.pdf
>
> Thomas Petazzoni (8):
> arm64: dts: marvell: fix watchdog unit address in Armada AP806
> arm64: dts: marvell: use lower case for unit address and reg property
> arm64: dts: marvell: fix typos in comment describing the NAND
> controller
> arm64: dts: marvell: fix compatible string list for Armada CP110 slave
> NAND
> arm64: dts: marvell: use mvebu-icu.h where possible
> arm64: dts: marvell: use aliases for SPI busses on Armada 7K/8K
> arm64: dts: marvell: de-duplicate CP110 description
> arm64: dts: marvell: replace cpm by cp0, cps by cp1
>
> arch/arm64/boot/dts/marvell/armada-7040-db.dts | 46 +--
> arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 37 +-
> arch/arm64/boot/dts/marvell/armada-8020.dtsi | 2 +-
> arch/arm64/boot/dts/marvell/armada-8040-db.dts | 80 ++--
> arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 76 ++--
> arch/arm64/boot/dts/marvell/armada-8040.dtsi | 2 +-
> arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 80 +++-
> arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 8 +-
> arch/arm64/boot/dts/marvell/armada-common.dtsi | 10 +
> .../boot/dts/marvell/armada-cp110-master.dtsi | 449 ---------------------
> .../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 448 --------------------
> arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 422 +++++++++++++++++++
> 12 files changed, 635 insertions(+), 1025 deletions(-)
> create mode 100644 arch/arm64/boot/dts/marvell/armada-common.dtsi
> delete mode 100644 arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> delete mode 100644 arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> create mode 100644 arch/arm64/boot/dts/marvell/armada-cp110.dtsi
>
> --
> 2.14.3
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH] ARM: OMAP: clock: Fix debugfs_create_*() usage
From: Geert Uytterhoeven @ 2018-01-02 15:25 UTC (permalink / raw)
To: linux-arm-kernel
When exposing data access through debugfs, the correct
debugfs_create_*() functions must be used, depending on data type.
Remove all casts from data pointers passed to debugfs_create_*()
functions, as such casts prevent the compiler from flagging bugs.
Correct all wrong usage:
- clk.rate is unsigned long, not u32,
- clk.flags is u8, not u32, which exposed the successive
clk.rate_offset and clk.src_offset fields.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Compile-tested only.
---
arch/arm/mach-omap1/clock.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 43e3e188f5213418..fa512413a4717221 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -1011,17 +1011,17 @@ static int clk_debugfs_register_one(struct clk *c)
return -ENOMEM;
c->dent = d;
- d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
+ d = debugfs_create_u8("usecount", S_IRUGO, c->dent, &c->usecount);
if (!d) {
err = -ENOMEM;
goto err_out;
}
- d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
+ d = debugfs_create_ulong("rate", S_IRUGO, c->dent, &c->rate);
if (!d) {
err = -ENOMEM;
goto err_out;
}
- d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
+ d = debugfs_create_x8("flags", S_IRUGO, c->dent, &c->flags);
if (!d) {
err = -ENOMEM;
goto err_out;
--
2.7.4
^ permalink raw reply related
* [Cluster-devel] [PATCH 00/12] drop unneeded newline
From: Julia Lawall @ 2018-01-02 15:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514905900.4242.4.camel@wdc.com>
On Tue, 2 Jan 2018, Bart Van Assche wrote:
> On Tue, 2018-01-02 at 15:00 +0100, Julia Lawall wrote:
> > On Tue, 2 Jan 2018, Bob Peterson wrote:
> > > ----- Original Message -----
> > > > ----- Original Message -----
> > > >
> > > Still, the GFS2 and DLM code has a plethora of broken-up printk messages,
> > > and I don't like the thought of re-combining them all.
> >
> > Actually, the point of the patch was to remove the unnecessary \n at the
> > end of the string, because log_print will add another one. If you prefer
> > to keep the string broken up, I can resend the patch in that form, but
> > without the unnecessary \n.
>
> Please combine any user-visible strings into a single line for which the
> unneeded newline is dropped since these strings are modified anyway by
> your patch.
That is what the submitted patch (2/12 specifically) did.
julia
^ permalink raw reply
* [PATCH 2/2] cpufreq: imx6q: add 696MHz operating point for i.mx6ul
From: Fabio Estevam @ 2018-01-02 15:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <A2F3BA8B-361A-4809-83FE-4067CD868D5B@nxp.com>
Hi Anson,
On Tue, Jan 2, 2018 at 1:05 PM, Anson Huang <anson.huang@nxp.com> wrote:
> This change is to support 696MHz operating point, both the speed grading
> check and pll rate change are necessary for 696MHz support, do you think
> they should be in different patch?
I thought this could also change the behaviour for mx6q/dl/qp.
Are the others SoCs safe with this change?
^ permalink raw reply
* [PATCH V3 3/3] arm64: Extend early page table code to allow for larger kernels
From: Steve Capper @ 2018-01-02 15:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180102151254.4063-1-steve.capper@arm.com>
Currently the early assembler page table code assumes that precisely
1xpgd, 1xpud, 1xpmd are sufficient to represent the early kernel text
mappings.
Unfortunately this is rarely the case when running with a 16KB granule,
and we also run into limits with 4KB granule when building much larger
kernels.
This patch re-writes the early page table logic to compute indices of
mappings for each level of page table, and if multiple indices are
required, the next-level page table is scaled up accordingly.
Also the required size of the swapper_pg_dir is computed at link time
to cover the mapping [KIMAGE_ADDR + VOFFSET, _end]. When KASLR is
enabled, an extra page is set aside for each level that may require extra
entries at runtime.
Signed-off-by: Steve Capper <steve.capper@arm.com>
---
Changed in V3:
Corrected KASLR computation
Rebased against arm64/for-next/core, particularly Kristina's 52-bit
PA series.
---
arch/arm64/include/asm/kernel-pgtable.h | 47 ++++++++++-
arch/arm64/include/asm/pgtable.h | 1 +
arch/arm64/kernel/head.S | 145 +++++++++++++++++++++++---------
arch/arm64/kernel/vmlinux.lds.S | 1 +
arch/arm64/mm/mmu.c | 3 +-
5 files changed, 157 insertions(+), 40 deletions(-)
diff --git a/arch/arm64/include/asm/kernel-pgtable.h b/arch/arm64/include/asm/kernel-pgtable.h
index 77a27af01371..82386e860dd2 100644
--- a/arch/arm64/include/asm/kernel-pgtable.h
+++ b/arch/arm64/include/asm/kernel-pgtable.h
@@ -52,7 +52,52 @@
#define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT))
#endif
-#define SWAPPER_DIR_SIZE (SWAPPER_PGTABLE_LEVELS * PAGE_SIZE)
+
+/*
+ * If KASLR is enabled, then an offset K is added to the kernel address
+ * space. The bottom 21 bits of this offset are zero to guarantee 2MB
+ * alignment for PA and VA.
+ *
+ * For each pagetable level of the swapper, we know that the shift will
+ * be larger than 21 (for the 4KB granule case we use section maps thus
+ * the smallest shift is actually 30) thus there is the possibility that
+ * KASLR can increase the number of pagetable entries by 1, so we make
+ * room for this extra entry.
+ *
+ * Note KASLR cannot increase the number of required entries for a level
+ * by more than one because it increments both the virtual start and end
+ * addresses equally (the extra entry comes from the case where the end
+ * address is just pushed over a boundary and the start address isn't).
+ */
+
+#ifdef CONFIG_RANDOMIZE_BASE
+#define EARLY_KASLR (1)
+#else
+#define EARLY_KASLR (0)
+#endif
+
+#define EARLY_ENTRIES(vstart, vend, shift) (((vend) >> (shift)) \
+ - ((vstart) >> (shift)) + 1 + EARLY_KASLR)
+
+#define EARLY_PGDS(vstart, vend) (EARLY_ENTRIES(vstart, vend, PGDIR_SHIFT))
+
+#if SWAPPER_PGTABLE_LEVELS > 3
+#define EARLY_PUDS(vstart, vend) (EARLY_ENTRIES(vstart, vend, PUD_SHIFT))
+#else
+#define EARLY_PUDS(vstart, vend) (0)
+#endif
+
+#if SWAPPER_PGTABLE_LEVELS > 2
+#define EARLY_PMDS(vstart, vend) (EARLY_ENTRIES(vstart, vend, SWAPPER_TABLE_SHIFT))
+#else
+#define EARLY_PMDS(vstart, vend) (0)
+#endif
+
+#define EARLY_PAGES(vstart, vend) ( 1 /* PGDIR page */ \
+ + EARLY_PGDS((vstart), (vend)) /* each PGDIR needs a next level page table */ \
+ + EARLY_PUDS((vstart), (vend)) /* each PUD needs a next level page table */ \
+ + EARLY_PMDS((vstart), (vend))) /* each PMD needs a next level page table */
+#define SWAPPER_DIR_SIZE (PAGE_SIZE * EARLY_PAGES(KIMAGE_VADDR + TEXT_OFFSET, _end))
#define IDMAP_DIR_SIZE (IDMAP_PGTABLE_LEVELS * PAGE_SIZE)
#ifdef CONFIG_ARM64_SW_TTBR0_PAN
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index bfa237e892f1..54b0a8398055 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -706,6 +706,7 @@ static inline void pmdp_set_wrprotect(struct mm_struct *mm,
#endif
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
+extern pgd_t swapper_pg_end[];
extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
extern pgd_t tramp_pg_dir[PTRS_PER_PGD];
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 66f01869e97c..539e2642ed41 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -191,44 +191,110 @@ ENDPROC(preserve_boot_args)
.endm
/*
- * Macro to populate the PGD (and possibily PUD) for the corresponding
- * block entry in the next level (tbl) for the given virtual address.
+ * Macro to populate page table entries, these entries can be pointers to the next level
+ * or last level entries pointing to physical memory.
*
- * Preserves: tbl, next, virt
- * Corrupts: ptrs_per_pgd, tmp1, tmp2
+ * tbl: page table address
+ * rtbl: pointer to page table or physical memory
+ * index: start index to write
+ * eindex: end index to write - [index, eindex] written to
+ * flags: flags for pagetable entry to or in
+ * inc: increment to rtbl between each entry
+ * tmp1: temporary variable
+ *
+ * Preserves: tbl, eindex, flags, inc
+ * Corrupts: index, tmp1
+ * Returns: rtbl
*/
- .macro create_pgd_entry, tbl, virt, ptrs_per_pgd, tmp1, tmp2
- create_table_entry \tbl, \virt, PGDIR_SHIFT, \ptrs_per_pgd, \tmp1, \tmp2
-#if SWAPPER_PGTABLE_LEVELS > 3
- mov \ptrs_per_pgd, PTRS_PER_PUD
- create_table_entry \tbl, \virt, PUD_SHIFT, \ptrs_per_pgd, \tmp1, \tmp2
-#endif
-#if SWAPPER_PGTABLE_LEVELS > 2
- mov \ptrs_per_pgd, PTRS_PER_PTE
- create_table_entry \tbl, \virt, SWAPPER_TABLE_SHIFT, \ptrs_per_pgd, \tmp1, \tmp2
-#endif
+ .macro populate_entries, tbl, rtbl, index, eindex, flags, inc, tmp1
+9999: phys_to_pte \rtbl, \tmp1
+ orr \tmp1, \tmp1, \flags // tmp1 = table entry
+ str \tmp1, [\tbl, \index, lsl #3]
+ add \rtbl, \rtbl, \inc // rtbl = pa next level
+ add \index, \index, #1
+ cmp \index, \eindex
+ b.ls 9999b
.endm
/*
- * Macro to populate block entries in the page table for the start..end
- * virtual range (inclusive).
+ * Compute indices of table entries from virtual address range. If multiple entries
+ * were needed in the previous page table level then the next page table level is assumed
+ * to be composed of multiple pages. (This effectively scales the end index).
+ *
+ * vstart: virtual address of start of range
+ * vend: virtual address of end of range
+ * shift: shift used to transform virtual address into index
+ * ptrs: number of entries in page table
+ * istart: index in table corresponding to vstart
+ * iend: index in table corresponding to vend
+ * count: On entry: how many entries required in previous level, scales our end index
+ * On exit: returns how many entries required for next page table level
*
- * Preserves: tbl, flags
- * Corrupts: phys, start, end, tmp, pstate
+ * Preserves: vstart, vend, shift, ptrs
+ * Returns: istart, iend, count
*/
- .macro create_block_map, tbl, flags, phys, start, end, tmp
- lsr \start, \start, #SWAPPER_BLOCK_SHIFT
- and \start, \start, #PTRS_PER_PTE - 1 // table index
- bic \phys, \phys, #SWAPPER_BLOCK_SIZE - 1
- lsr \end, \end, #SWAPPER_BLOCK_SHIFT
- and \end, \end, #PTRS_PER_PTE - 1 // table end index
-9999: phys_to_pte \phys, \tmp
- orr \tmp, \tmp, \flags // table entry
- str \tmp, [\tbl, \start, lsl #3] // store the entry
- add \start, \start, #1 // next entry
- add \phys, \phys, #SWAPPER_BLOCK_SIZE // next block
- cmp \start, \end
- b.ls 9999b
+ .macro compute_indices, vstart, vend, shift, ptrs, istart, iend, count
+ lsr \iend, \vend, \shift
+ mov \istart, \ptrs
+ sub \istart, \istart, #1
+ and \iend, \iend, \istart // iend = (vend >> shift) & (ptrs - 1)
+ mov \istart, \ptrs
+ sub \count, \count, #1
+ mul \istart, \istart, \count
+ add \iend, \iend, \istart // iend += (count - 1) * ptrs
+ // our entries span multiple tables
+
+ lsr \istart, \vstart, \shift
+ mov \count, \ptrs
+ sub \count, \count, #1
+ and \istart, \istart, \count
+
+ sub \count, \iend, \istart
+ add \count, \count, #1
+ .endm
+
+/*
+ * Map memory for specified virtual address range. Each level of page table needed supports
+ * multiple entries. If a level requires n entries the next page table level is assumed to be
+ * formed from n pages.
+ *
+ * tbl: location of page table
+ * rtbl: address to be used for first level page table entry (typically tbl + PAGE_SIZE)
+ * vstart: start address to map
+ * vend: end address to map - we map [vstart, vend]
+ * flags: flags to use to map last level entries
+ * phys: physical address corresponding to vstart - physical memory is contiguous
+ * pgds: the number of pgd entries
+ *
+ * Temporaries: istart, iend, tmp, count, sv - these need to be different registers
+ * Preserves: vstart, vend, flags
+ * Corrupts: tbl, rtbl, istart, iend, tmp, count, sv
+ */
+ .macro map_memory, tbl, rtbl, vstart, vend, flags, phys, pgds, istart, iend, tmp, count, sv
+ add \rtbl, \tbl, #PAGE_SIZE
+ mov \sv, \rtbl
+ mov \count, #1
+ compute_indices \vstart, \vend, #PGDIR_SHIFT, \pgds, \istart, \iend, \count
+ populate_entries \tbl, \rtbl, \istart, \iend, #PMD_TYPE_TABLE, #PAGE_SIZE, \tmp
+ mov \tbl, \sv
+ mov \sv, \rtbl
+
+#if SWAPPER_PGTABLE_LEVELS > 3
+ compute_indices \vstart, \vend, #PUD_SHIFT, #PTRS_PER_PUD, \istart, \iend, \count
+ populate_entries \tbl, \rtbl, \istart, \iend, #PMD_TYPE_TABLE, #PAGE_SIZE, \tmp
+ mov \tbl, \sv
+ mov \sv, \rtbl
+#endif
+
+#if SWAPPER_PGTABLE_LEVELS > 2
+ compute_indices \vstart, \vend, #SWAPPER_TABLE_SHIFT, #PTRS_PER_PMD, \istart, \iend, \count
+ populate_entries \tbl, \rtbl, \istart, \iend, #PMD_TYPE_TABLE, #PAGE_SIZE, \tmp
+ mov \tbl, \sv
+#endif
+
+ compute_indices \vstart, \vend, #SWAPPER_BLOCK_SHIFT, #PTRS_PER_PTE, \istart, \iend, \count
+ bic \count, \phys, #SWAPPER_BLOCK_SIZE - 1
+ populate_entries \tbl, \count, \istart, \iend, \flags, #SWAPPER_BLOCK_SIZE, \tmp
.endm
/*
@@ -246,14 +312,16 @@ __create_page_tables:
* dirty cache lines being evicted.
*/
adrp x0, idmap_pg_dir
- ldr x1, =(IDMAP_DIR_SIZE + SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
+ adrp x1, swapper_pg_end
+ sub x1, x1, x0
bl __inval_dcache_area
/*
* Clear the idmap and swapper page tables.
*/
adrp x0, idmap_pg_dir
- ldr x1, =(IDMAP_DIR_SIZE + SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
+ adrp x1, swapper_pg_end
+ sub x1, x1, x0
1: stp xzr, xzr, [x0], #16
stp xzr, xzr, [x0], #16
stp xzr, xzr, [x0], #16
@@ -318,10 +386,10 @@ __create_page_tables:
#endif
1:
ldr_l x4, idmap_ptrs_per_pgd
- create_pgd_entry x0, x3, x4, x5, x6
mov x5, x3 // __pa(__idmap_text_start)
adr_l x6, __idmap_text_end // __pa(__idmap_text_end)
- create_block_map x0, x7, x3, x5, x6, x4
+
+ map_memory x0, x1, x3, x6, x7, x3, x4, x10, x11, x12, x13, x14
/*
* Map the kernel image (starting with PHYS_OFFSET).
@@ -330,12 +398,12 @@ __create_page_tables:
mov_q x5, KIMAGE_VADDR + TEXT_OFFSET // compile time __va(_text)
add x5, x5, x23 // add KASLR displacement
mov x4, PTRS_PER_PGD
- create_pgd_entry x0, x5, x4, x3, x6
adrp x6, _end // runtime __pa(_end)
adrp x3, _text // runtime __pa(_text)
sub x6, x6, x3 // _end - _text
add x6, x6, x5 // runtime __va(_end)
- create_block_map x0, x7, x3, x5, x6, x4
+
+ map_memory x0, x1, x5, x6, x7, x3, x4, x10, x11, x12, x13, x14
/*
* Since the page tables have been populated with non-cacheable
@@ -343,7 +411,8 @@ __create_page_tables:
* tables again to remove any speculatively loaded cache lines.
*/
adrp x0, idmap_pg_dir
- ldr x1, =(IDMAP_DIR_SIZE + SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
+ adrp x1, swapper_pg_end
+ sub x1, x1, x0
dmb sy
bl __inval_dcache_area
diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
index 4c7112a47469..0221aca6493d 100644
--- a/arch/arm64/kernel/vmlinux.lds.S
+++ b/arch/arm64/kernel/vmlinux.lds.S
@@ -230,6 +230,7 @@ SECTIONS
#endif
swapper_pg_dir = .;
. += SWAPPER_DIR_SIZE;
+ swapper_pg_end = .;
__pecoff_data_size = ABSOLUTE(. - __initdata_begin);
_end = .;
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 4071602031ed..fdac11979bae 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -644,7 +644,8 @@ void __init paging_init(void)
* allocated with it.
*/
memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE,
- SWAPPER_DIR_SIZE - PAGE_SIZE);
+ __pa_symbol(swapper_pg_end) - __pa_symbol(swapper_pg_dir)
+ - PAGE_SIZE);
}
/*
--
2.11.0
^ permalink raw reply related
* [PATCH V3 2/3] arm64: entry: Move the trampoline to be before PAN
From: Steve Capper @ 2018-01-02 15:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180102151254.4063-1-steve.capper@arm.com>
The trampline page tables are positioned after the early page tables in
the kernel linker script.
As we are about to change the early page table logic to resolve the
swapper size at link time as opposed to compile time, the
SWAPPER_DIR_SIZE variable (currently used to locate the trampline)
will be rendered unsuitable for low level assembler.
This patch solves this issue by moving the trampoline before the PAN
page tables. The offset to the trampoline from ttbr1 can then be
expressed by: PAGE_SIZE + RESERVED_TTBR0_SIZE, which is available to the
entry assembler.
Signed-off-by: Steve Capper <steve.capper@arm.com>
---
Patch added in V3 of the series to allow it to work with kpti.
---
arch/arm64/kernel/entry.S | 4 ++--
arch/arm64/kernel/vmlinux.lds.S | 11 ++++++-----
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 031392ee5f47..7902d8145b9a 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -987,7 +987,7 @@ __ni_sys_trace:
.macro tramp_map_kernel, tmp
mrs \tmp, ttbr1_el1
- sub \tmp, \tmp, #(SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
+ add \tmp, \tmp, #(PAGE_SIZE + RESERVED_TTBR0_SIZE)
bic \tmp, \tmp, #USER_ASID_FLAG
msr ttbr1_el1, \tmp
#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003
@@ -1006,7 +1006,7 @@ alternative_else_nop_endif
.macro tramp_unmap_kernel, tmp
mrs \tmp, ttbr1_el1
- add \tmp, \tmp, #(SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
+ sub \tmp, \tmp, #(PAGE_SIZE + RESERVED_TTBR0_SIZE)
orr \tmp, \tmp, #USER_ASID_FLAG
msr ttbr1_el1, \tmp
/*
diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
index 8e567de8f369..4c7112a47469 100644
--- a/arch/arm64/kernel/vmlinux.lds.S
+++ b/arch/arm64/kernel/vmlinux.lds.S
@@ -218,6 +218,12 @@ SECTIONS
. = ALIGN(PAGE_SIZE);
idmap_pg_dir = .;
. += IDMAP_DIR_SIZE;
+
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+ tramp_pg_dir = .;
+ . += PAGE_SIZE;
+#endif
+
#ifdef CONFIG_ARM64_SW_TTBR0_PAN
reserved_ttbr0 = .;
. += RESERVED_TTBR0_SIZE;
@@ -225,11 +231,6 @@ SECTIONS
swapper_pg_dir = .;
. += SWAPPER_DIR_SIZE;
-#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
- tramp_pg_dir = .;
- . += PAGE_SIZE;
-#endif
-
__pecoff_data_size = ABSOLUTE(. - __initdata_begin);
_end = .;
--
2.11.0
^ permalink raw reply related
* [PATCH V3 1/3] arm64: Re-order reserved_ttbr0 in linker script
From: Steve Capper @ 2018-01-02 15:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180102151254.4063-1-steve.capper@arm.com>
Currently one resolves the location of the reserved_ttbr0 for PAN by
taking a positive offset from swapper_pg_dir. In a future patch we wish
to extend the swapper s.t. its size is determined at link time rather
than comile time, rendering SWAPPER_DIR_SIZE unsuitable for such a low
level calculation.
In this patch we re-arrange the order of the linker script s.t. instead
one computes reserved_ttbr0 by subtracting RESERVED_TTBR0_SIZE from
swapper_pg_dir.
Signed-off-by: Steve Capper <steve.capper@arm.com>
---
Changed in V3: corrected comment, added Ard's reviewed-by,
Rebased on top of kpti
Ard, Mark, I removed your tags because I had to add a change for
asm-uaccess.h. Please let me know if it's okay for me to put your tags
back?
Cheers,
--
Steve
---
arch/arm64/include/asm/asm-uaccess.h | 8 ++++----
arch/arm64/include/asm/uaccess.h | 4 ++--
arch/arm64/kernel/vmlinux.lds.S | 5 ++---
3 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/include/asm/asm-uaccess.h b/arch/arm64/include/asm/asm-uaccess.h
index f4f234b6155e..8719ce122a38 100644
--- a/arch/arm64/include/asm/asm-uaccess.h
+++ b/arch/arm64/include/asm/asm-uaccess.h
@@ -13,11 +13,11 @@
*/
#ifdef CONFIG_ARM64_SW_TTBR0_PAN
.macro __uaccess_ttbr0_disable, tmp1
- mrs \tmp1, ttbr1_el1 // swapper_pg_dir
- add \tmp1, \tmp1, #SWAPPER_DIR_SIZE // reserved_ttbr0 at the end of swapper_pg_dir
- msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1
+ mrs \tmp1, ttbr1_el1 // swapper_pg_dir
+ sub \tmp1, \tmp1, #RESERVED_TTBR0_SIZE // reserved_ttbr0 just before swapper_pg_dir
+ msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1
isb
- sub \tmp1, \tmp1, #SWAPPER_DIR_SIZE
+ add \tmp1, \tmp1, #RESERVED_TTBR0_SIZE
bic \tmp1, \tmp1, #TTBR_ASID_MASK
msr ttbr1_el1, \tmp1 // set reserved ASID
isb
diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h
index 6eadf55ebaf0..e269d35372cf 100644
--- a/arch/arm64/include/asm/uaccess.h
+++ b/arch/arm64/include/asm/uaccess.h
@@ -108,8 +108,8 @@ static inline void __uaccess_ttbr0_disable(void)
unsigned long ttbr;
ttbr = read_sysreg(ttbr1_el1);
- /* reserved_ttbr0 placed at the end of swapper_pg_dir */
- write_sysreg(ttbr + SWAPPER_DIR_SIZE, ttbr0_el1);
+ /* reserved_ttbr0 placed before swapper_pg_dir */
+ write_sysreg(ttbr - RESERVED_TTBR0_SIZE, ttbr0_el1);
isb();
/* Set reserved ASID */
ttbr &= ~TTBR_ASID_MASK;
diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
index ddfd3c0942f7..8e567de8f369 100644
--- a/arch/arm64/kernel/vmlinux.lds.S
+++ b/arch/arm64/kernel/vmlinux.lds.S
@@ -218,13 +218,12 @@ SECTIONS
. = ALIGN(PAGE_SIZE);
idmap_pg_dir = .;
. += IDMAP_DIR_SIZE;
- swapper_pg_dir = .;
- . += SWAPPER_DIR_SIZE;
-
#ifdef CONFIG_ARM64_SW_TTBR0_PAN
reserved_ttbr0 = .;
. += RESERVED_TTBR0_SIZE;
#endif
+ swapper_pg_dir = .;
+ . += SWAPPER_DIR_SIZE;
#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
tramp_pg_dir = .;
--
2.11.0
^ permalink raw reply related
* [PATCH V3 0/3] Map larger kernels at early init
From: Steve Capper @ 2018-01-02 15:12 UTC (permalink / raw)
To: linux-arm-kernel
The early pagetable creation code assumes that a single pgd, pud, pmd
and pte are sufficient to map the kernel text for MMU bringup. For 16KB
granules this is, unfortunately, rarely the case. Some kernels may be too
big even for a 64KB granule employing this scheme.
This patch series addresses the problem in three steps: 1) re-order the
reserved_ttbr0 to allow its address computation to be independent of
swapper_pg_dir size, 2) re-order the trampoline in a similar manner,
and 3) re-write the early pgtable code to allow for multiple page table
entries at each level.
Changes in v3: Series rebased on top of arm64/for-next/core branch. This
necessitated changes to accommodate kpti (mainly moving the trampiline page
table before the swapper, in patch #2); as well as 52-bit PA (some assembler
rebasing).
Changes in v2: Ack added to patch #1, KASLR space calculation redone
in patch #2.
Steve Capper (3):
arm64: Re-order reserved_ttbr0 in linker script
arm64: entry: Move the trampoline to be before PAN
arm64: Extend early page table code to allow for larger kernels
arch/arm64/include/asm/asm-uaccess.h | 8 +-
arch/arm64/include/asm/kernel-pgtable.h | 47 ++++++++++-
arch/arm64/include/asm/pgtable.h | 1 +
arch/arm64/include/asm/uaccess.h | 4 +-
arch/arm64/kernel/entry.S | 4 +-
arch/arm64/kernel/head.S | 145 +++++++++++++++++++++++---------
arch/arm64/kernel/vmlinux.lds.S | 15 ++--
arch/arm64/mm/mmu.c | 3 +-
8 files changed, 172 insertions(+), 55 deletions(-)
--
2.11.0
^ permalink raw reply
* [Cluster-devel] [PATCH 00/12] drop unneeded newline
From: Bart Van Assche @ 2018-01-02 15:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.20.1801021458360.24055@hadrien>
On Tue, 2018-01-02 at 15:00 +0100, Julia Lawall wrote:
> On Tue, 2 Jan 2018, Bob Peterson wrote:
> > ----- Original Message -----
> > > ----- Original Message -----
> > >
> > Still, the GFS2 and DLM code has a plethora of broken-up printk messages,
> > and I don't like the thought of re-combining them all.
>
> Actually, the point of the patch was to remove the unnecessary \n at the
> end of the string, because log_print will add another one. If you prefer
> to keep the string broken up, I can resend the patch in that form, but
> without the unnecessary \n.
Please combine any user-visible strings into a single line for which the
unneeded newline is dropped since these strings are modified anyway by
your patch.
Thanks,
Bart.
^ permalink raw reply
* [PATCH] arm64: dts: marvell: armada-37xx: add a crypto node
From: Gregory CLEMENT @ 2018-01-02 15:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171226161653.4601-1-antoine.tenart@free-electrons.com>
Hi Antoine,
On mar., d?c. 26 2017, Antoine Tenart <antoine.tenart@free-electrons.com> wrote:
> This patch adds a crypto node describing the EIP97 engine found in
> Armada 37xx SoCs. The cryptographic engine is enabled by default.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Applied on mvebu/dt64
Thanks,
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> index 90c26d616a54..4c4b7a2fb162 100644
> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> @@ -309,6 +309,20 @@
> };
> };
>
> + crypto: crypto at 90000 {
> + compatible = "inside-secure,safexcel-eip97";
> + reg = <0x90000 0x20000>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "mem", "ring0", "ring1",
> + "ring2", "ring3", "eip";
> + clocks = <&nb_periph_clk 15>;
> + };
> +
> sdhci1: sdhci at d0000 {
> compatible = "marvell,armada-3700-sdhci",
> "marvell,sdhci-xenon";
> --
> 2.14.3
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH v4 0/7] ARM: davinci: convert to common clock framework
From: Adam Ford @ 2018-01-02 15:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514763588-31560-1-git-send-email-david@lechnology.com>
On Sun, Dec 31, 2017 at 5:39 PM, David Lechner <david@lechnology.com> wrote:
> This series converts mach-davinci to use the common clock framework.
>
> Basically, this series does some cleanup and rearranging to get things
> ready for the conversion. Then there is a patch to add new driver in
> drivers/clk and finally a patch to make the conversion from the mach
> clock drivers to the new drivers.
>
> I have tested this on LEGO MINDSTORMS EV3 (TI AM1808), so I am confident
> that I haven't broken anything (too badly) in da850. But, I don't have
> other hardware to test.
I tested this on a DA850-EVM, but I was not able to successfully get it to boot.
It hangs during boot with no errors, oops's, or panics, but the
standard 4.15.0-rc5 from linux-stable booted just fine.
Maybe one of the TI guys will have some suggestions, but as-is, it
appears to break at least the DA850-evm.
>
> The one thing that I know I have broken is CPU frequency scaling on da850.
> I don't think it was working with device tree anyway, so I can't really test
> it with the hardware I have. I'm hoping that it will be OK to defer fixing
> it and add device tree support at the same time.
>
I agree with you that it's broken in the device tree, but I don't
think it ever worked.
> Dependencies:
> * This series applies on top of "ARM: davinici: move watchdog restart from
> mach to drivers" [1][2]
> * On da850, you will also need a patch to prevent problems with the USB PHY
> clocks [3]
> * Or get it all at once:
> git fetch https://github.com/dlech/ev3dev-kernel.git common-clk-v4
That is what I pulled to test.
adam
>
> [1]: https://patchwork.kernel.org/patch/10105623/
> [2]: https://patchwork.kernel.org/patch/10105613/
> [3]: https://patchwork.kernel.org/patch/10133193/
>
>
> v4 changes:
> * Basically, the whole series is new/reworked except for the first patch.
> * Instead of having an intermediate conversion of the clocks in mach-davinci,
> new clock drivers are introduced in drivers/clk.
> * There are a few more cleanup patches added before making the conversion.
>
> v3 changes:
> * Remove leftovers from rebasing in "ARM: davinci: don't use static clk_lookup"
> (fixes compile error)
>
> v2 changes:
> * Dropped "ARM: davinci: clean up map_io functions" - will resend as separate
> patch series
> * Reworked remaining patches so that there is less shuffling around
>
>
>
> David Lechner (7):
> ARM: davinci: move davinci_clk_init() to init_time
> ARM: davinci: don't use static clk_lookup
> ARM: davinci: fix duplicate clocks
> ARM: davinci: remove davinci_set_refclk_rate()
> clk: Introduce davinci clocks
> ARM: davinci: convert to common clock framework
> ARM: davinci_all_defconfig: remove CONFIG_DAVINCI_RESET_CLOCKS
>
> arch/arm/Kconfig | 2 +-
> arch/arm/configs/davinci_all_defconfig | 1 -
> arch/arm/mach-davinci/Kconfig | 12 -
> arch/arm/mach-davinci/Makefile | 2 +-
> arch/arm/mach-davinci/board-da830-evm.c | 17 +-
> arch/arm/mach-davinci/board-da850-evm.c | 2 +-
> arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
> arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
> arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
> arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
> arch/arm/mach-davinci/board-dm646x-evm.c | 17 +-
> arch/arm/mach-davinci/board-mityomapl138.c | 2 +-
> arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
> arch/arm/mach-davinci/board-omapl138-hawk.c | 17 +-
> arch/arm/mach-davinci/board-sffsdr.c | 2 +-
> arch/arm/mach-davinci/clock.c | 745 --------------------------
> arch/arm/mach-davinci/clock.h | 72 ---
> arch/arm/mach-davinci/common.c | 1 -
> arch/arm/mach-davinci/da830.c | 536 +++++--------------
> arch/arm/mach-davinci/da850.c | 785 ++++++----------------------
> arch/arm/mach-davinci/da8xx-dt.c | 17 +-
> arch/arm/mach-davinci/davinci.h | 4 +
> arch/arm/mach-davinci/devices-da8xx.c | 46 +-
> arch/arm/mach-davinci/dm355.c | 452 ++++------------
> arch/arm/mach-davinci/dm365.c | 594 ++++++---------------
> arch/arm/mach-davinci/dm644x.c | 401 ++++----------
> arch/arm/mach-davinci/dm646x.c | 451 +++++-----------
> arch/arm/mach-davinci/include/mach/clock.h | 3 -
> arch/arm/mach-davinci/include/mach/common.h | 9 -
> arch/arm/mach-davinci/include/mach/da8xx.h | 11 +-
> arch/arm/mach-davinci/psc.c | 137 -----
> arch/arm/mach-davinci/psc.h | 14 -
> arch/arm/mach-davinci/usb-da8xx.c | 225 +-------
> drivers/clk/Makefile | 1 +
> drivers/clk/davinci/Makefile | 3 +
> drivers/clk/davinci/da8xx-cfgchip-clk.c | 380 ++++++++++++++
> drivers/clk/davinci/pll.c | 333 ++++++++++++
> drivers/clk/davinci/psc.c | 217 ++++++++
> include/linux/clk/davinci.h | 46 ++
> include/linux/platform_data/davinci_clk.h | 25 +
> 40 files changed, 1875 insertions(+), 3717 deletions(-)
> delete mode 100644 arch/arm/mach-davinci/clock.c
> delete mode 100644 arch/arm/mach-davinci/psc.c
> create mode 100644 drivers/clk/davinci/Makefile
> create mode 100644 drivers/clk/davinci/da8xx-cfgchip-clk.c
> create mode 100644 drivers/clk/davinci/pll.c
> create mode 100644 drivers/clk/davinci/psc.c
> create mode 100644 include/linux/clk/davinci.h
> create mode 100644 include/linux/platform_data/davinci_clk.h
>
> --
> 2.7.4
>
^ permalink raw reply
* [net-next: PATCH v2 5/5] net: mvpp2: enable ACPI support in the driver
From: Marcin Wojtas @ 2018-01-02 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180102140852.GE15036@lunn.ch>
2018-01-02 15:08 GMT+01:00 Andrew Lunn <andrew@lunn.ch>:
>> Indeed in of_mdio_bus_register_phy, there is of_irq_get. This is more
>> a discussion for a MDIO bus / ACPI patchset, but we either find a way
>> to use IRQs with ACPI obtained from child nodes or for this world the
>> functionality will be limited (at least for the beginning).
>
> Hi Marcin
>
> What i want to avoid is adding something which partially works, and
> then have to throw it all away and start again in order to add full
> support.
>
> If ACPI really limits interrupts to devices, maybe we need a totally
> different representation of MDIO and PHYs in ACPI to what it used in
> device tree? The same may be true for the Ethernet ports of the mvpp2?
> They might have to be represented as real devices, not children of a
> device? Maybe trying to map DT to ACPI on a one-to-one basis is the
> wrong approach?
>
In terms of PP2 controller, I'd prefer to keep as much as possible to
describing how real hardware looks like, i.e. single common controller
with multiple ports as its children. Those considerations are
reflected in the DT description shape and how the driver enumerates,
which was part of the design of the initial support. Bending the
driver (huge amount of shared initialization and resources) to
multiple instances just for the sake of possible avoidance of IRQ
description in ACPI is IMO a huge and unnecessary overkill.
Anyway, I'll do a more research on the resources / ACPI representation
and will get back with some conclusions. I hope that someone from this
thread recipents will be able to give some advice too :)
Best regards,
Marcin
^ permalink raw reply
* [PATCH 1/2] ARM: dts: imx6ul: add 696MHz operating point
From: Fabio Estevam @ 2018-01-02 15:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514912859-17691-1-git-send-email-Anson.Huang@nxp.com>
Hi Anson,
On Tue, Jan 2, 2018 at 3:07 PM, Anson Huang <Anson.Huang@nxp.com> wrote:
> Add 696MHz operating point according to datasheet
> (Rev. 0, 12/2015).
There is a newer version from 05/2017:
https://www.nxp.com/docs/en/data-sheet/IMX6ULAEC.pdf
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> arch/arm/boot/dts/imx6ul.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index e0b4a46..86b3251 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -68,12 +68,14 @@
> clock-latency = <61036>; /* two CLK32 periods */
> operating-points = <
> /* kHz uV */
> + 696000 1275000
> 528000 1175000
> 396000 1025000
> 198000 950000
> >;
> fsl,soc-operating-points = <
> /* KHz uV */
> + 696000 1275000
Why 1.275V?
According to the datasheet, the minimum value for VDD_SOC_CAP is 1.15V
for all frequencies.
Adding 25mV of margin leads to 1.175V.
^ permalink raw reply
* [PATCH v3 7/7] ARM: dts: stm32: add initial support of stm32mp157c eval board
From: Ludovic Barre @ 2018-01-02 15:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1514905311-12925-1-git-send-email-ludovic.Barre@st.com>
From: Ludovic Barre <ludovic.barre@st.com>
Add support of stm32mp157c evaluation board (part number: STM32MP157C-EV1)
split in 2 elements:
-Daughter board (part number: STM32MP157C-ED1)
which includes CPU, memory and power supply
-Mother board (part number: STM32MP157C-EM1)
which includes external peripherals (like display, camera,...)
and extension connectors.
The daughter board can run alone, this is why the device tree files
are split in two layers, for the complete evaluation board (ev1)
and for the daughter board alone (ed1).
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
---
arch/arm/boot/dts/Makefile | 6 ++++--
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 13 +++++++++++++
arch/arm/boot/dts/stm32mp157c-ed1.dts | 28 ++++++++++++++++++++++++++++
arch/arm/boot/dts/stm32mp157c-ev1.dts | 18 ++++++++++++++++++
4 files changed, 63 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/boot/dts/stm32mp157c-ed1.dts
create mode 100644 arch/arm/boot/dts/stm32mp157c-ev1.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d0381e9..d72c71c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -839,7 +839,7 @@ dtb-$(CONFIG_ARCH_STI) += \
stih410-b2120.dtb \
stih410-b2260.dtb \
stih418-b2199.dtb
-dtb-$(CONFIG_ARCH_STM32)+= \
+dtb-$(CONFIG_ARCH_STM32) += \
stm32f429-disco.dtb \
stm32f469-disco.dtb \
stm32f746-disco.dtb \
@@ -847,7 +847,9 @@ dtb-$(CONFIG_ARCH_STM32)+= \
stm32429i-eval.dtb \
stm32746g-eval.dtb \
stm32h743i-eval.dtb \
- stm32h743i-disco.dtb
+ stm32h743i-disco.dtb \
+ stm32mp157c-ed1.dtb \
+ stm32mp157c-ev1.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \
diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 440276a..7ac65f4 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -145,6 +145,19 @@
ngpios = <8>;
gpio-ranges = <&pinctrl 0 160 8>;
};
+
+ uart4_pins_a: uart4 at 0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+ bias-disable;
+ };
+ };
};
pinctrl_z: pin-controller-z {
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts b/arch/arm/boot/dts/stm32mp157c-ed1.dts
new file mode 100644
index 0000000..78ccdd3
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
+ */
+/dts-v1/;
+
+#include "stm32mp157c.dtsi"
+#include "stm32mp157-pinctrl.dtsi"
+
+/ {
+ model = "STMicroelectronics STM32MP157C eval daughter";
+ compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
+
+ chosen {
+ stdout-path = "serial3:115200n8";
+ };
+
+ memory {
+ reg = <0xC0000000 0x40000000>;
+ };
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins_a>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm32mp157c-ev1.dts
new file mode 100644
index 0000000..42e1769b
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
+ */
+/dts-v1/;
+
+#include "stm32mp157c-ed1.dts"
+
+/ {
+ model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
+ compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
+
+ chosen {
+ stdout-path = "serial3:115200n8";
+ };
+};
+
--
2.7.4
^ permalink raw reply related
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