* [PATCH 2/7] ARM: dts: STi: Add gpio polarity for "hdmi, hpd-gpio" property
From: patrice.chotard at st.com @ 2018-01-10 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515572469-19276-1-git-send-email-patrice.chotard@st.com>
From: Patrice Chotard <patrice.chotard@st.com>
The GPIO polarity is missing in the hdmi,hpd-gpio property, this
fixes the following DT warnings:
arch/arm/boot/dts/stih410-b2120.dtb: Warning (gpios_property): hdmi,hpd-gpio property
size (8) too small for cell size 2 in /soc/sti-display-subsystem/sti-hdmi at 8d04000
arch/arm/boot/dts/stih407-b2120.dtb: Warning (gpios_property): hdmi,hpd-gpio property
size (8) too small for cell size 2 in /soc/sti-display-subsystem/sti-hdmi at 8d04000
arch/arm/boot/dts/stih410-b2260.dtb: Warning (gpios_property): hdmi,hpd-gpio property
size (8) too small for cell size 2 in /soc/sti-display-subsystem/sti-hdmi at 8d04000
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
arch/arm/boot/dts/stih407.dtsi | 3 ++-
arch/arm/boot/dts/stih410.dtsi | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
index fa14983..11fdecd 100644
--- a/arch/arm/boot/dts/stih407.dtsi
+++ b/arch/arm/boot/dts/stih407.dtsi
@@ -8,6 +8,7 @@
*/
#include "stih407-clock.dtsi"
#include "stih407-family.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
soc {
sti-display-subsystem {
@@ -122,7 +123,7 @@
<&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>;
- hdmi,hpd-gpio = <&pio5 3>;
+ hdmi,hpd-gpio = <&pio5 3 GPIO_ACTIVE_LOW>;
reset-names = "hdmi";
resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
ddc = <&hdmiddc>;
diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index 07b02a3..e4b7e3d 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -9,6 +9,7 @@
#include "stih410-clock.dtsi"
#include "stih407-family.dtsi"
#include "stih410-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
bdisp0 = &bdisp0;
@@ -213,7 +214,7 @@
<&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>;
- hdmi,hpd-gpio = <&pio5 3>;
+ hdmi,hpd-gpio = <&pio5 3 GPIO_ACTIVE_LOW>;
reset-names = "hdmi";
resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
ddc = <&hdmiddc>;
--
1.9.1
^ permalink raw reply related
* [PATCH 3/7] ARM: dts: STi: Move clocks without reg outside soc
From: patrice.chotard at st.com @ 2018-01-10 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515572469-19276-1-git-send-email-patrice.chotard@st.com>
From: Patrice Chotard <patrice.chotard@st.com>
Move clocks without reg property outside soc node,
this allows to fix the following warnings when compiling
dtb with W=1 option :
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /clocks/clk-sysin missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-ext2f-div2s missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /clocks/clockgen-c0 missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /clocks/clk-sysin missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-ext2f-div2s missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /clocks/clockgen-c0 missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /clocks/clk-sysin missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-ext2f-div2s missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /clocks/clockgen-c0 missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 106 +++++++++++++++++-----------------
arch/arm/boot/dts/stih410-clock.dtsi | 103 ++++++++++++++++-----------------
arch/arm/boot/dts/stih418-clock.dtsi | 107 ++++++++++++++++++-----------------
3 files changed, 157 insertions(+), 159 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index b882dcf..6df63b2 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -7,33 +7,65 @@
*/
#include <dt-bindings/clock/stih407-clks.h>
/ {
+ /*
+ * Fixed 30MHz oscillator inputs to SoC
+ */
+ clk_sysin: clk-sysin {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <30000000>;
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ arm_periph_clk: clk-m-a9-periphs {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+
+ clocks = <&clk_m_a9>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+
+ clocks = <&clk_s_c0_flexgen 13>;
+
+ clock-output-names = "clk-m-a9-ext2f-div2";
+
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ /*
+ * Bootloader initialized system infrastructure clock for
+ * serial devices.
+ */
+ clk_ext2f_a9: clockgen-c0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ clock-output-names = "clk-s-icn-reg-0";
+ };
+
+ clk_tmdsout_hdmi: clk-tmdsout-hdmi {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
/*
- * Fixed 30MHz oscillator inputs to SoC
- */
- clk_sysin: clk-sysin {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <30000000>;
- };
-
- /*
- * ARM Peripheral clock for timers
- */
- arm_periph_clk: clk-m-a9-periphs {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
-
- clocks = <&clk_m_a9>;
- clock-div = <2>;
- clock-mult = <1>;
- };
-
- /*
* A9 PLL.
*/
clockgen-a9 at 92b0000 {
@@ -64,32 +96,6 @@
<&clk_m_a9_ext2f_div2>;
};
- /*
- * ARM Peripheral clock for timers
- */
- clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
-
- clocks = <&clk_s_c0_flexgen 13>;
-
- clock-output-names = "clk-m-a9-ext2f-div2";
-
- clock-div = <2>;
- clock-mult = <1>;
- };
-
- /*
- * Bootloader initialized system infrastructure clock for
- * serial devices.
- */
- clk_ext2f_a9: clockgen-c0 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- clock-output-names = "clk-s-icn-reg-0";
- };
-
clockgen-a at 90ff000 {
compatible = "st,clkgen-c32";
reg = <0x90ff000 0x1000>;
@@ -254,12 +260,6 @@
"clk-s-d2-fs0-ch3";
};
- clk_tmdsout_hdmi: clk-tmdsout-hdmi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <0>;
- };
-
clockgen-d2 at 9106000 {
compatible = "st,clkgen-c32";
reg = <0x9106000 0x1000>;
diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
index 4df1b21..ee30dba 100644
--- a/arch/arm/boot/dts/stih410-clock.dtsi
+++ b/arch/arm/boot/dts/stih410-clock.dtsi
@@ -7,6 +7,56 @@
*/
#include <dt-bindings/clock/stih410-clks.h>
/ {
+ /*
+ * Fixed 30MHz oscillator inputs to SoC
+ */
+ clk_sysin: clk-sysin {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <30000000>;
+ clock-output-names = "CLK_SYSIN";
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ arm_periph_clk: clk-m-a9-periphs {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clocks = <&clk_m_a9>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clocks = <&clk_s_c0_flexgen 13>;
+ clock-output-names = "clk-m-a9-ext2f-div2";
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ /*
+ * Bootloader initialized system infrastructure clock for
+ * serial devices.
+ */
+ clk_ext2f_a9: clockgen-c0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ clock-output-names = "clk-s-icn-reg-0";
+ };
+
+ clk_tmdsout_hdmi: clk-tmdsout-hdmi {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+
clocks {
#address-cells = <1>;
#size-cells = <1>;
@@ -15,27 +65,6 @@
compatible = "st,stih410-clk", "simple-bus";
/*
- * Fixed 30MHz oscillator inputs to SoC
- */
- clk_sysin: clk-sysin {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <30000000>;
- clock-output-names = "CLK_SYSIN";
- };
-
- /*
- * ARM Peripheral clock for timers
- */
- arm_periph_clk: clk-m-a9-periphs {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clocks = <&clk_m_a9>;
- clock-div = <2>;
- clock-mult = <1>;
- };
-
- /*
* A9 PLL.
*/
clockgen-a9 at 92b0000 {
@@ -66,32 +95,6 @@
<&clk_m_a9_ext2f_div2>;
};
- /*
- * ARM Peripheral clock for timers
- */
- clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
-
- clocks = <&clk_s_c0_flexgen 13>;
-
- clock-output-names = "clk-m-a9-ext2f-div2";
-
- clock-div = <2>;
- clock-mult = <1>;
- };
-
- /*
- * Bootloader initialized system infrastructure clock for
- * serial devices.
- */
- clk_ext2f_a9: clockgen-c0 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- clock-output-names = "clk-s-icn-reg-0";
- };
-
clockgen-a at 90ff000 {
compatible = "st,clkgen-c32";
reg = <0x90ff000 0x1000>;
@@ -266,12 +269,6 @@
"clk-s-d2-fs0-ch3";
};
- clk_tmdsout_hdmi: clk-tmdsout-hdmi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <0>;
- };
-
clockgen-d2 at 9106000 {
compatible = "st,clkgen-c32";
reg = <0x9106000 0x1000>;
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index e68bf28..fe5f0fd 100644
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -7,6 +7,60 @@
*/
#include <dt-bindings/clock/stih418-clks.h>
/ {
+ /*
+ * Fixed 30MHz oscillator inputs to SoC
+ */
+ clk_sysin: clk-sysin {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <30000000>;
+ clock-output-names = "CLK_SYSIN";
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ arm_periph_clk: clk-m-a9-periphs {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clocks = <&clk_m_a9>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+
+ clocks = <&clk_s_c0_flexgen 13>;
+
+ clock-output-names = "clk-m-a9-ext2f-div2";
+
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ /*
+ * Bootloader initialized system infrastructure clock for
+ * serial devices.
+ */
+ clk_ext2f_a9: clockgen-c0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+
+ clock-frequency = <200000000>;
+ clock-output-names = "clk-s-icn-reg-0";
+ };
+
+ clk_tmdsout_hdmi: clk-tmdsout-hdmi {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+
clocks {
#address-cells = <1>;
#size-cells = <1>;
@@ -15,27 +69,6 @@
compatible = "st,stih418-clk", "simple-bus";
/*
- * Fixed 30MHz oscillator inputs to SoC
- */
- clk_sysin: clk-sysin {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <30000000>;
- clock-output-names = "CLK_SYSIN";
- };
-
- /*
- * ARM Peripheral clock for timers
- */
- arm_periph_clk: clk-m-a9-periphs {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clocks = <&clk_m_a9>;
- clock-div = <2>;
- clock-mult = <1>;
- };
-
- /*
* A9 PLL.
*/
clockgen-a9 at 92b0000 {
@@ -66,32 +99,6 @@
<&clk_m_a9_ext2f_div2>;
};
- /*
- * ARM Peripheral clock for timers
- */
- clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
-
- clocks = <&clk_s_c0_flexgen 13>;
-
- clock-output-names = "clk-m-a9-ext2f-div2";
-
- clock-div = <2>;
- clock-mult = <1>;
- };
-
- /*
- * Bootloader initialized system infrastructure clock for
- * serial devices.
- */
- clk_ext2f_a9: clockgen-c0 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- clock-output-names = "clk-s-icn-reg-0";
- };
-
clockgen-a at 90ff000 {
compatible = "st,clkgen-c32";
reg = <0x90ff000 0x1000>;
@@ -259,12 +266,6 @@
"clk-s-d2-fs0-ch3";
};
- clk_tmdsout_hdmi: clk-tmdsout-hdmi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <0>;
- };
-
clockgen-d2 at 9106000 {
compatible = "st,clkgen-c32";
reg = <0x9106000 0x1000>;
--
1.9.1
^ permalink raw reply related
* [PATCH 4/7] ARM: dts: STi: Move leds node outside soc node
From: patrice.chotard at st.com @ 2018-01-10 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515572469-19276-1-git-send-email-patrice.chotard@st.com>
From: Patrice Chotard <patrice.chotard@st.com>
Leds are not part of soc, so nove them outside soc node.
This allows to fix the following warnings when compiling
dtb with W=1 option :
arch/arm/boot/dts/stih407-b2120.dtb: Warning (simple_bus_reg):
Node /soc/leds missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/leds missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/leds missing or empty reg/ranges property
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
arch/arm/boot/dts/stih410-b2260.dts | 49 ++++++++++++++++++------------------
arch/arm/boot/dts/stih418-b2199.dts | 26 +++++++++----------
arch/arm/boot/dts/stihxxx-b2120.dtsi | 26 +++++++++----------
3 files changed, 50 insertions(+), 51 deletions(-)
diff --git a/arch/arm/boot/dts/stih410-b2260.dts b/arch/arm/boot/dts/stih410-b2260.dts
index faafc7b..69c2abc 100644
--- a/arch/arm/boot/dts/stih410-b2260.dts
+++ b/arch/arm/boot/dts/stih410-b2260.dts
@@ -29,36 +29,35 @@
ethernet0 = ðernet0;
};
- soc {
-
- leds {
- compatible = "gpio-leds";
- user_green_1 {
- label = "User_green_1";
- gpios = <&pio1 3 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "heartbeat";
- default-state = "off";
- };
+ leds {
+ compatible = "gpio-leds";
+ user_green_1 {
+ label = "User_green_1";
+ gpios = <&pio1 3 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
- user_green_2 {
- label = "User_green_2";
- gpios = <&pio4 1 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
+ user_green_2 {
+ label = "User_green_2";
+ gpios = <&pio4 1 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
- user_green_3 {
- label = "User_green_3";
- gpios = <&pio2 1 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
+ user_green_3 {
+ label = "User_green_3";
+ gpios = <&pio2 1 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
- user_green_4 {
- label = "User_green_4";
- gpios = <&pio2 5 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
+ user_green_4 {
+ label = "User_green_4";
+ gpios = <&pio2 5 GPIO_ACTIVE_LOW>;
+ default-state = "off";
};
+ };
+ soc {
/* Low speed expansion connector */
uart0: serial at 9830000 {
label = "LS-UART0";
diff --git a/arch/arm/boot/dts/stih418-b2199.dts b/arch/arm/boot/dts/stih418-b2199.dts
index 5418a0e..1ce38ce 100644
--- a/arch/arm/boot/dts/stih418-b2199.dts
+++ b/arch/arm/boot/dts/stih418-b2199.dts
@@ -28,24 +28,24 @@
ethernet0 = ðernet0;
};
+ leds {
+ compatible = "gpio-leds";
+ red {
+ label = "Front Panel LED";
+ gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ green {
+ gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
soc {
sbc_serial0: serial at 9530000 {
status = "okay";
};
- leds {
- compatible = "gpio-leds";
- red {
- label = "Front Panel LED";
- gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- green {
- gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
- };
-
i2c at 9842000 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 68783e8..1fd3a2b 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -10,24 +10,24 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/media/c8sectpfe.h>
/ {
+ leds {
+ compatible = "gpio-leds";
+ red {
+ label = "Front Panel LED";
+ gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ green {
+ gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
soc {
sbc_serial0: serial at 9530000 {
status = "okay";
};
- leds {
- compatible = "gpio-leds";
- red {
- label = "Front Panel LED";
- gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- green {
- gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
- };
-
pwm0: pwm at 9810000 {
status = "okay";
};
--
1.9.1
^ permalink raw reply related
* [PATCH 5/7] ARM: dts: STi: Move usb2_picophyX nodes without reg out of soc
From: patrice.chotard at st.com @ 2018-01-10 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515572469-19276-1-git-send-email-patrice.chotard@st.com>
From: Patrice Chotard <patrice.chotard@st.com>
Move usb2_picophyX nodes outside from soc node, this allows to fix
the following warning when compiling dtb with W=1 option :
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/phy2 missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/phy3 missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/phy2 missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/phy3 missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/phy2 missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/phy3 missing or empty reg/ranges property
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
arch/arm/boot/dts/stih410-b2120.dts | 16 +++++++--------
arch/arm/boot/dts/stih410-b2260.dts | 16 +++++++--------
arch/arm/boot/dts/stih410.dtsi | 40 ++++++++++++++++++-------------------
arch/arm/boot/dts/stih418.dtsi | 34 +++++++++++++++----------------
4 files changed, 53 insertions(+), 53 deletions(-)
diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts
index 37a42af..8a03ade 100644
--- a/arch/arm/boot/dts/stih410-b2120.dts
+++ b/arch/arm/boot/dts/stih410-b2120.dts
@@ -28,6 +28,14 @@
ethernet0 = ðernet0;
};
+ usb2_picophy1: phy2 {
+ status = "okay";
+ };
+
+ usb2_picophy2: phy3 {
+ status = "okay";
+ };
+
soc {
mmc0: sdhci at 9060000 {
@@ -37,14 +45,6 @@
sd-uhs-ddr50;
};
- usb2_picophy1: phy2 {
- status = "okay";
- };
-
- usb2_picophy2: phy3 {
- status = "okay";
- };
-
ohci0: usb at 9a03c00 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/stih410-b2260.dts b/arch/arm/boot/dts/stih410-b2260.dts
index 69c2abc..a2d1e54 100644
--- a/arch/arm/boot/dts/stih410-b2260.dts
+++ b/arch/arm/boot/dts/stih410-b2260.dts
@@ -57,6 +57,14 @@
};
};
+ usb2_picophy1: phy2 {
+ status = "okay";
+ };
+
+ usb2_picophy2: phy3 {
+ status = "okay";
+ };
+
soc {
/* Low speed expansion connector */
uart0: serial at 9830000 {
@@ -127,14 +135,6 @@
status = "okay";
};
- usb2_picophy1: phy2 {
- status = "okay";
- };
-
- usb2_picophy2: phy3 {
- status = "okay";
- };
-
ohci0: usb at 9a03c00 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index e4b7e3d..a76fee9 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -15,29 +15,29 @@
bdisp0 = &bdisp0;
};
- soc {
- usb2_picophy1: phy2 {
- compatible = "st,stih407-usb2-phy";
- #phy-cells = <0>;
- st,syscfg = <&syscfg_core 0xf8 0xf4>;
- resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
- <&picophyreset STIH407_PICOPHY0_RESET>;
- reset-names = "global", "port";
-
- status = "disabled";
- };
+ usb2_picophy1: phy2 {
+ compatible = "st,stih407-usb2-phy";
+ #phy-cells = <0>;
+ st,syscfg = <&syscfg_core 0xf8 0xf4>;
+ resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+ <&picophyreset STIH407_PICOPHY0_RESET>;
+ reset-names = "global", "port";
+
+ status = "disabled";
+ };
- usb2_picophy2: phy3 {
- compatible = "st,stih407-usb2-phy";
- #phy-cells = <0>;
- st,syscfg = <&syscfg_core 0xfc 0xf4>;
- resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
- <&picophyreset STIH407_PICOPHY1_RESET>;
- reset-names = "global", "port";
+ usb2_picophy2: phy3 {
+ compatible = "st,stih407-usb2-phy";
+ #phy-cells = <0>;
+ st,syscfg = <&syscfg_core 0xfc 0xf4>;
+ resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+ <&picophyreset STIH407_PICOPHY1_RESET>;
+ reset-names = "global", "port";
- status = "disabled";
- };
+ status = "disabled";
+ };
+ soc {
ohci0: usb at 9a03c00 {
compatible = "st,st-ohci-300x";
reg = <0x9a03c00 0x100>;
diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi
index e6525ab..b3912a3 100644
--- a/arch/arm/boot/dts/stih418.dtsi
+++ b/arch/arm/boot/dts/stih418.dtsi
@@ -29,25 +29,25 @@
};
};
- soc {
- usb2_picophy1: phy2 {
- compatible = "st,stih407-usb2-phy";
- #phy-cells = <0>;
- st,syscfg = <&syscfg_core 0xf8 0xf4>;
- resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
- <&picophyreset STIH407_PICOPHY0_RESET>;
- reset-names = "global", "port";
- };
+ usb2_picophy1: phy2 {
+ compatible = "st,stih407-usb2-phy";
+ #phy-cells = <0>;
+ st,syscfg = <&syscfg_core 0xf8 0xf4>;
+ resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+ <&picophyreset STIH407_PICOPHY0_RESET>;
+ reset-names = "global", "port";
+ };
- usb2_picophy2: phy3 {
- compatible = "st,stih407-usb2-phy";
- #phy-cells = <0>;
- st,syscfg = <&syscfg_core 0xfc 0xf4>;
- resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
- <&picophyreset STIH407_PICOPHY1_RESET>;
- reset-names = "global", "port";
- };
+ usb2_picophy2: phy3 {
+ compatible = "st,stih407-usb2-phy";
+ #phy-cells = <0>;
+ st,syscfg = <&syscfg_core 0xfc 0xf4>;
+ resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+ <&picophyreset STIH407_PICOPHY1_RESET>;
+ reset-names = "global", "port";
+ };
+ soc {
ohci0: usb at 9a03c00 {
compatible = "st,st-ohci-300x";
reg = <0x9a03c00 0x100>;
--
1.9.1
^ permalink raw reply related
* [PATCH 5/7] ARM: dts: STi: Move usb2_picophyX nodes without reg property out of soc
From: patrice.chotard at st.com @ 2018-01-10 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515572469-19276-1-git-send-email-patrice.chotard@st.com>
From: Patrice Chotard <patrice.chotard@st.com>
Move usb2_picophyX nodes outside from soc node, this allows to fix
the following warning when compiling dtb with W=1 option :
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/phy2 missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/phy3 missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/phy2 missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/phy3 missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/phy2 missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/phy3 missing or empty reg/ranges property
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
arch/arm/boot/dts/stih410-b2120.dts | 16 +++++++--------
arch/arm/boot/dts/stih410-b2260.dts | 16 +++++++--------
arch/arm/boot/dts/stih410.dtsi | 40 ++++++++++++++++++-------------------
arch/arm/boot/dts/stih418.dtsi | 34 +++++++++++++++----------------
4 files changed, 53 insertions(+), 53 deletions(-)
diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts
index 37a42af..8a03ade 100644
--- a/arch/arm/boot/dts/stih410-b2120.dts
+++ b/arch/arm/boot/dts/stih410-b2120.dts
@@ -28,6 +28,14 @@
ethernet0 = ðernet0;
};
+ usb2_picophy1: phy2 {
+ status = "okay";
+ };
+
+ usb2_picophy2: phy3 {
+ status = "okay";
+ };
+
soc {
mmc0: sdhci at 9060000 {
@@ -37,14 +45,6 @@
sd-uhs-ddr50;
};
- usb2_picophy1: phy2 {
- status = "okay";
- };
-
- usb2_picophy2: phy3 {
- status = "okay";
- };
-
ohci0: usb at 9a03c00 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/stih410-b2260.dts b/arch/arm/boot/dts/stih410-b2260.dts
index 69c2abc..a2d1e54 100644
--- a/arch/arm/boot/dts/stih410-b2260.dts
+++ b/arch/arm/boot/dts/stih410-b2260.dts
@@ -57,6 +57,14 @@
};
};
+ usb2_picophy1: phy2 {
+ status = "okay";
+ };
+
+ usb2_picophy2: phy3 {
+ status = "okay";
+ };
+
soc {
/* Low speed expansion connector */
uart0: serial at 9830000 {
@@ -127,14 +135,6 @@
status = "okay";
};
- usb2_picophy1: phy2 {
- status = "okay";
- };
-
- usb2_picophy2: phy3 {
- status = "okay";
- };
-
ohci0: usb at 9a03c00 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index e4b7e3d..a76fee9 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -15,29 +15,29 @@
bdisp0 = &bdisp0;
};
- soc {
- usb2_picophy1: phy2 {
- compatible = "st,stih407-usb2-phy";
- #phy-cells = <0>;
- st,syscfg = <&syscfg_core 0xf8 0xf4>;
- resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
- <&picophyreset STIH407_PICOPHY0_RESET>;
- reset-names = "global", "port";
-
- status = "disabled";
- };
+ usb2_picophy1: phy2 {
+ compatible = "st,stih407-usb2-phy";
+ #phy-cells = <0>;
+ st,syscfg = <&syscfg_core 0xf8 0xf4>;
+ resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+ <&picophyreset STIH407_PICOPHY0_RESET>;
+ reset-names = "global", "port";
+
+ status = "disabled";
+ };
- usb2_picophy2: phy3 {
- compatible = "st,stih407-usb2-phy";
- #phy-cells = <0>;
- st,syscfg = <&syscfg_core 0xfc 0xf4>;
- resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
- <&picophyreset STIH407_PICOPHY1_RESET>;
- reset-names = "global", "port";
+ usb2_picophy2: phy3 {
+ compatible = "st,stih407-usb2-phy";
+ #phy-cells = <0>;
+ st,syscfg = <&syscfg_core 0xfc 0xf4>;
+ resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+ <&picophyreset STIH407_PICOPHY1_RESET>;
+ reset-names = "global", "port";
- status = "disabled";
- };
+ status = "disabled";
+ };
+ soc {
ohci0: usb at 9a03c00 {
compatible = "st,st-ohci-300x";
reg = <0x9a03c00 0x100>;
diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi
index e6525ab..b3912a3 100644
--- a/arch/arm/boot/dts/stih418.dtsi
+++ b/arch/arm/boot/dts/stih418.dtsi
@@ -29,25 +29,25 @@
};
};
- soc {
- usb2_picophy1: phy2 {
- compatible = "st,stih407-usb2-phy";
- #phy-cells = <0>;
- st,syscfg = <&syscfg_core 0xf8 0xf4>;
- resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
- <&picophyreset STIH407_PICOPHY0_RESET>;
- reset-names = "global", "port";
- };
+ usb2_picophy1: phy2 {
+ compatible = "st,stih407-usb2-phy";
+ #phy-cells = <0>;
+ st,syscfg = <&syscfg_core 0xf8 0xf4>;
+ resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+ <&picophyreset STIH407_PICOPHY0_RESET>;
+ reset-names = "global", "port";
+ };
- usb2_picophy2: phy3 {
- compatible = "st,stih407-usb2-phy";
- #phy-cells = <0>;
- st,syscfg = <&syscfg_core 0xfc 0xf4>;
- resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
- <&picophyreset STIH407_PICOPHY1_RESET>;
- reset-names = "global", "port";
- };
+ usb2_picophy2: phy3 {
+ compatible = "st,stih407-usb2-phy";
+ #phy-cells = <0>;
+ st,syscfg = <&syscfg_core 0xfc 0xf4>;
+ resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+ <&picophyreset STIH407_PICOPHY1_RESET>;
+ reset-names = "global", "port";
+ };
+ soc {
ohci0: usb at 9a03c00 {
compatible = "st,st-ohci-300x";
reg = <0x9a03c00 0x100>;
--
1.9.1
^ permalink raw reply related
* [PATCH 6/7] ARM: dts: STi: Move sound related nodes without reg out of soc
From: patrice.chotard at st.com @ 2018-01-10 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515572469-19276-1-git-send-email-patrice.chotard@st.com>
From: Patrice Chotard <patrice.chotard@st.com>
Move sti_sasg_codec and sound nodes outside from soc node, this allows
to fix the following warning when compiling dtb with W=1 option:
arch/arm/boot/dts/stih407-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 0 has a unit name, but no reg property
arch/arm/boot/dts/stih407-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 1 has a unit name, but no reg property
arch/arm/boot/dts/stih407-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 2 has a unit name, but no reg property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/sti-sasg-codec missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 0 has a unit name, but no reg property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 1 has a unit name, but no reg property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 2 has a unit name, but no reg property
arch/arm/boot/dts/stih407-b2120.dtb: Warning (simple_bus_reg):
Node /soc/sound missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/sti-sasg-codec missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 0 has a unit name, but no reg property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /soc/sti-sasg-codec missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /soc/sound missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/sti-sasg-codec missing or empty reg/ranges property
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
arch/arm/boot/dts/stih407-family.dtsi | 14 ++---
arch/arm/boot/dts/stih410-b2260.dts | 38 ++++++-------
arch/arm/boot/dts/stihxxx-b2120.dtsi | 100 +++++++++++++++++-----------------
3 files changed, 76 insertions(+), 76 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 1608c70..e62dfb8 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -118,6 +118,13 @@
status = "okay";
};
+ sti_sasg_codec: sti-sasg-codec {
+ compatible = "st,stih407-sas-codec";
+ #sound-dai-cells = <1>;
+ status = "disabled";
+ st,syscfg = <&syscfg_core>;
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -885,13 +892,6 @@
status = "disabled";
};
- sti_sasg_codec: sti-sasg-codec {
- compatible = "st,stih407-sas-codec";
- #sound-dai-cells = <1>;
- status = "disabled";
- st,syscfg = <&syscfg_core>;
- };
-
sti_uni_player0: sti-uni-player at 8d80000 {
compatible = "st,stih407-uni-player-hdmi";
#sound-dai-cells = <0>;
diff --git a/arch/arm/boot/dts/stih410-b2260.dts b/arch/arm/boot/dts/stih410-b2260.dts
index a2d1e54..007a028 100644
--- a/arch/arm/boot/dts/stih410-b2260.dts
+++ b/arch/arm/boot/dts/stih410-b2260.dts
@@ -65,6 +65,25 @@
status = "okay";
};
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "STI-B2260";
+ status = "okay";
+
+ simple-audio-card,dai-link {
+ /* DAC */
+ format = "i2s";
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&sti_uni_player0>;
+ };
+
+ codec {
+ sound-dai = <&sti_hdmi>;
+ };
+ };
+ };
+
soc {
/* Low speed expansion connector */
uart0: serial at 9830000 {
@@ -181,25 +200,6 @@
status = "okay";
};
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "STI-B2260";
- status = "okay";
-
- simple-audio-card,dai-link at 0 {
- /* DAC */
- format = "i2s";
- mclk-fs = <128>;
- cpu {
- sound-dai = <&sti_uni_player0>;
- };
-
- codec {
- sound-dai = <&sti_hdmi>;
- };
- };
- };
-
miphy28lp_phy: miphy28lp {
phy_port1: port at 9b2a000 {
diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 1fd3a2b..9e3f1b5 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -23,6 +23,56 @@
};
};
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "STI-B2120";
+ status = "okay";
+
+ simple-audio-card,dai-link0 {
+ /* HDMI */
+ format = "i2s";
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&sti_uni_player0>;
+ };
+
+ codec {
+ sound-dai = <&sti_hdmi>;
+ };
+ };
+ simple-audio-card,dai-link1 {
+ /* DAC */
+ format = "i2s";
+ mclk-fs = <256>;
+ frame-inversion = <1>;
+ cpu {
+ sound-dai = <&sti_uni_player2>;
+ };
+
+ codec {
+ sound-dai = <&sti_sasg_codec 1>;
+ };
+ };
+ simple-audio-card,dai-link2 {
+ /* SPDIF */
+ format = "left_j";
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&sti_uni_player3>;
+ };
+
+ codec {
+ sound-dai = <&sti_sasg_codec 0>;
+ };
+ };
+ };
+
+ sti_sasg_codec: sti-sasg-codec {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spdif_out>;
+ };
+
soc {
sbc_serial0: serial at 9530000 {
status = "okay";
@@ -146,55 +196,5 @@
sti_uni_player3: sti-uni-player at 8d85000 {
status = "okay";
};
-
- sti_sasg_codec: sti-sasg-codec {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_spdif_out>;
- };
-
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "STI-B2120";
- status = "okay";
-
- simple-audio-card,dai-link at 0 {
- /* HDMI */
- format = "i2s";
- mclk-fs = <128>;
- cpu {
- sound-dai = <&sti_uni_player0>;
- };
-
- codec {
- sound-dai = <&sti_hdmi>;
- };
- };
- simple-audio-card,dai-link at 1 {
- /* DAC */
- format = "i2s";
- mclk-fs = <256>;
- frame-inversion = <1>;
- cpu {
- sound-dai = <&sti_uni_player2>;
- };
-
- codec {
- sound-dai = <&sti_sasg_codec 1>;
- };
- };
- simple-audio-card,dai-link at 2 {
- /* SPDIF */
- format = "left_j";
- mclk-fs = <128>;
- cpu {
- sound-dai = <&sti_uni_player3>;
- };
-
- codec {
- sound-dai = <&sti_sasg_codec 0>;
- };
- };
- };
};
};
--
1.9.1
^ permalink raw reply related
* [PATCH 6/7] ARM: dts: STi: Move sound related nodes without reg property out of soc
From: patrice.chotard at st.com @ 2018-01-10 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515572469-19276-1-git-send-email-patrice.chotard@st.com>
From: Patrice Chotard <patrice.chotard@st.com>
Move sti_sasg_codec and sound nodes outside from soc node, this allows
to fix the following warning when compiling dtb with W=1 option:
arch/arm/boot/dts/stih407-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 0 has a unit name, but no reg property
arch/arm/boot/dts/stih407-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 1 has a unit name, but no reg property
arch/arm/boot/dts/stih407-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 2 has a unit name, but no reg property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/sti-sasg-codec missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 0 has a unit name, but no reg property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 1 has a unit name, but no reg property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 2 has a unit name, but no reg property
arch/arm/boot/dts/stih407-b2120.dtb: Warning (simple_bus_reg):
Node /soc/sound missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/sti-sasg-codec missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (unit_address_vs_reg):
Node /soc/sound/simple-audio-card,dai-link at 0 has a unit name, but no reg property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /soc/sti-sasg-codec missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /soc/sound missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/sti-sasg-codec missing or empty reg/ranges property
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
arch/arm/boot/dts/stih407-family.dtsi | 14 ++---
arch/arm/boot/dts/stih410-b2260.dts | 38 ++++++-------
arch/arm/boot/dts/stihxxx-b2120.dtsi | 100 +++++++++++++++++-----------------
3 files changed, 76 insertions(+), 76 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 1608c70..e62dfb8 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -118,6 +118,13 @@
status = "okay";
};
+ sti_sasg_codec: sti-sasg-codec {
+ compatible = "st,stih407-sas-codec";
+ #sound-dai-cells = <1>;
+ status = "disabled";
+ st,syscfg = <&syscfg_core>;
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -885,13 +892,6 @@
status = "disabled";
};
- sti_sasg_codec: sti-sasg-codec {
- compatible = "st,stih407-sas-codec";
- #sound-dai-cells = <1>;
- status = "disabled";
- st,syscfg = <&syscfg_core>;
- };
-
sti_uni_player0: sti-uni-player at 8d80000 {
compatible = "st,stih407-uni-player-hdmi";
#sound-dai-cells = <0>;
diff --git a/arch/arm/boot/dts/stih410-b2260.dts b/arch/arm/boot/dts/stih410-b2260.dts
index a2d1e54..007a028 100644
--- a/arch/arm/boot/dts/stih410-b2260.dts
+++ b/arch/arm/boot/dts/stih410-b2260.dts
@@ -65,6 +65,25 @@
status = "okay";
};
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "STI-B2260";
+ status = "okay";
+
+ simple-audio-card,dai-link {
+ /* DAC */
+ format = "i2s";
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&sti_uni_player0>;
+ };
+
+ codec {
+ sound-dai = <&sti_hdmi>;
+ };
+ };
+ };
+
soc {
/* Low speed expansion connector */
uart0: serial at 9830000 {
@@ -181,25 +200,6 @@
status = "okay";
};
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "STI-B2260";
- status = "okay";
-
- simple-audio-card,dai-link at 0 {
- /* DAC */
- format = "i2s";
- mclk-fs = <128>;
- cpu {
- sound-dai = <&sti_uni_player0>;
- };
-
- codec {
- sound-dai = <&sti_hdmi>;
- };
- };
- };
-
miphy28lp_phy: miphy28lp {
phy_port1: port at 9b2a000 {
diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 1fd3a2b..9e3f1b5 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -23,6 +23,56 @@
};
};
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "STI-B2120";
+ status = "okay";
+
+ simple-audio-card,dai-link0 {
+ /* HDMI */
+ format = "i2s";
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&sti_uni_player0>;
+ };
+
+ codec {
+ sound-dai = <&sti_hdmi>;
+ };
+ };
+ simple-audio-card,dai-link1 {
+ /* DAC */
+ format = "i2s";
+ mclk-fs = <256>;
+ frame-inversion = <1>;
+ cpu {
+ sound-dai = <&sti_uni_player2>;
+ };
+
+ codec {
+ sound-dai = <&sti_sasg_codec 1>;
+ };
+ };
+ simple-audio-card,dai-link2 {
+ /* SPDIF */
+ format = "left_j";
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&sti_uni_player3>;
+ };
+
+ codec {
+ sound-dai = <&sti_sasg_codec 0>;
+ };
+ };
+ };
+
+ sti_sasg_codec: sti-sasg-codec {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spdif_out>;
+ };
+
soc {
sbc_serial0: serial at 9530000 {
status = "okay";
@@ -146,55 +196,5 @@
sti_uni_player3: sti-uni-player at 8d85000 {
status = "okay";
};
-
- sti_sasg_codec: sti-sasg-codec {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_spdif_out>;
- };
-
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "STI-B2120";
- status = "okay";
-
- simple-audio-card,dai-link at 0 {
- /* HDMI */
- format = "i2s";
- mclk-fs = <128>;
- cpu {
- sound-dai = <&sti_uni_player0>;
- };
-
- codec {
- sound-dai = <&sti_hdmi>;
- };
- };
- simple-audio-card,dai-link at 1 {
- /* DAC */
- format = "i2s";
- mclk-fs = <256>;
- frame-inversion = <1>;
- cpu {
- sound-dai = <&sti_uni_player2>;
- };
-
- codec {
- sound-dai = <&sti_sasg_codec 1>;
- };
- };
- simple-audio-card,dai-link at 2 {
- /* SPDIF */
- format = "left_j";
- mclk-fs = <128>;
- cpu {
- sound-dai = <&sti_uni_player3>;
- };
-
- codec {
- sound-dai = <&sti_sasg_codec 0>;
- };
- };
- };
};
};
--
1.9.1
^ permalink raw reply related
* [PATCH 7/7] ARM: dts: STi: Add fake reg property for sti-display-subsystem
From: patrice.chotard at st.com @ 2018-01-10 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515572469-19276-1-git-send-email-patrice.chotard@st.com>
From: Patrice Chotard <patrice.chotard@st.com>
As sti-display-subsystem sub-nodes (sti-compositor, sti-tvout
sti-hdmi, sti-hda and sti-hqvdp) are SoC's IP, we add a fake reg
property instead of moving all these nodes outside soc node.
This allows to fix the following warning when compiling
dtb with W=1 option:
arch/arm/boot/dts/stih410-b2120.dtb: Warning (unit_address_vs_reg):
Node /soc/sti-display-subsystem/sti-hda at 8d02000 has a unit name, but no reg property
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
arch/arm/boot/dts/stih407.dtsi | 4 ++--
arch/arm/boot/dts/stih410-b2120.dts | 2 +-
arch/arm/boot/dts/stih410.dtsi | 3 ++-
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
index 11fdecd..4f01777 100644
--- a/arch/arm/boot/dts/stih407.dtsi
+++ b/arch/arm/boot/dts/stih407.dtsi
@@ -11,11 +11,11 @@
#include <dt-bindings/gpio/gpio.h>
/ {
soc {
- sti-display-subsystem {
+ sti-display-subsystem at 0 {
compatible = "st,sti-display-subsystem";
#address-cells = <1>;
#size-cells = <1>;
-
+ reg = <0 0>;
assigned-clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
<&clk_s_c0_pll1 0>,
diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts
index 8a03ade..115f5cd 100644
--- a/arch/arm/boot/dts/stih410-b2120.dts
+++ b/arch/arm/boot/dts/stih410-b2120.dts
@@ -61,7 +61,7 @@
status = "okay";
};
- sti-display-subsystem {
+ sti-display-subsystem at 0 {
sti-hda at 8d02000 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index a76fee9..02a141a 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -102,11 +102,12 @@
status = "disabled";
};
- sti-display-subsystem {
+ sti-display-subsystem at 0 {
compatible = "st,sti-display-subsystem";
#address-cells = <1>;
#size-cells = <1>;
+ reg = <0 0>;
assigned-clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
<&clk_s_c0_pll1 0>,
--
1.9.1
^ permalink raw reply related
* consolidate swiotlb dma_map implementations
From: Christian König @ 2018-01-10 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180110080932.14157-1-hch@lst.de>
Acked-by: Christian K?nig <christian.koenig@amd.com> for the whole series.
Regards,
Christian.
Am 10.01.2018 um 09:09 schrieb Christoph Hellwig:
> A lot of architectures have essentially identical dma_map_ops
> implementations to use swiotlb. This series adds new generic
> swiotlb_alloc/free helpers that take the attrs argument exposed
> in dma_map_ops, and which do an enhanced direct allocation
> modelled after x86 and reused from the dma-direct code, and
> then switches most architectures over to it. The only exceptions
> are mips, which requires additional cache flushing which will
> need a new abstraction, and x86 itself which will be handled in
> a later series with other x86 dma mapping changes.
>
> To support the generic code a few architectures that currently
> use ZONE_DMA/GFP_DMA for <= 32-bit allocations are switched to
> implement ZONE_DMA32 instead.
>
> This series is based on the previously sent series to consolidate
> the direct dma mapping implementation. A git tree with this
> series as well as the prerequisites is available here:
>
> git://git.infradead.org/users/hch/misc.git swiotlb
>
> Gitweb:
>
> http://git.infradead.org/users/hch/misc.git/shortlog/refs/heads/swiotlb
^ permalink raw reply
* [PATCH 1/3] ARM: dts: enable L2 cache parity and ecc on db-xc3-24g4xg board
From: Gregory CLEMENT @ 2018-01-10 8:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180108223158.21930-2-chris.packham@alliedtelesis.co.nz>
Hi Chris,
On mar., janv. 09 2018, Chris Packham <chris.packham@alliedtelesis.co.nz> wrote:
Could you have add a (even small) message in the commit log?
Also could you improve the title by specify that it applies on
armada-xp, like this:
ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
> arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts b/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
> index 06fce35d7491..00ca489fc788 100644
> --- a/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
> +++ b/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
> @@ -70,6 +70,11 @@
> };
> };
>
> +&L2 {
> + arm,parity-enable;
> + marvell,ecc-enable;
It is not a problem for me to already applied the device tree change
even if the driver is not merged yet. But I would like to have an
acked-by on this new property by either a device tree maintainer or at
least the EDAC maintainer, of course having both acked-by would be
perfect ! :)
Thanks,
Gregory
> +};
> +
> &devbus_bootcs {
> status = "okay";
>
> --
> 2.15.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH 2/3] ARM: dts: mvebu: add sdram controller node to Armada-38x
From: Gregory CLEMENT @ 2018-01-10 8:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180108223158.21930-3-chris.packham@alliedtelesis.co.nz>
Hi Chris,
On mar., janv. 09 2018, Chris Packham <chris.packham@alliedtelesis.co.nz> wrote:
> The Armada-38x uses an SDRAM controller that is compatible with the
> Armada-XP. The key difference is the width of the bus (XP is 64/32, 38x
> is 32/16). The SDRAM controller registers are the same between the two
> SoCs.
>
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
> arch/arm/boot/dts/armada-38x.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
> index 00ff549d4e39..6d34c5ec178f 100644
> --- a/arch/arm/boot/dts/armada-38x.dtsi
> +++ b/arch/arm/boot/dts/armada-38x.dtsi
> @@ -138,6 +138,11 @@
> #size-cells = <1>;
> ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
>
> + sdramc at 1400 {
Could you add a label? Thanks to this it would be possible to
enable/disable it at board level in a esay way.
> + compatible = "marvell,armada-xp-sdram-controller";
> + reg = <0x1400 0x500>;
What about adding status = "disabled" ?
Thanks to this we can enable it at board level only if we really want
it, it would avoid nasty regression on boards that don't need it, if an
issue occurs. Unless you are sure that it is completely safe to enable
it for everyone.
Thanks,
Gregory
> + };
> +
> L2: cache-controller at 8000 {
> compatible = "arm,pl310-cache";
> reg = <0x8000 0x1000>;
> --
> 2.15.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH] pinctrl: uniphier: refactor drive strength get/set functions
From: Masahiro Yamada @ 2018-01-10 8:34 UTC (permalink / raw)
To: linux-arm-kernel
There is code duplication between uniphier_conf_pin_drive_get() and
uniphier_conf_pin_drive_set(). Factor out the common code into
uniphier_conf_get_drvctrl_data().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 176 ++++++++++++-----------
1 file changed, 91 insertions(+), 85 deletions(-)
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index 26fda5c..ec0f77a 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -146,6 +146,71 @@ static const struct pinctrl_ops uniphier_pctlops = {
.dt_free_map = pinctrl_utils_free_map,
};
+static const unsigned int uniphier_conf_drv_strengths_1bit[] = {4, 8};
+static const unsigned int uniphier_conf_drv_strengths_2bit[] = {8, 12, 16, 20};
+static const unsigned int uniphier_conf_drv_strengths_3bit[] = {4, 5, 7, 9, 11,
+ 12, 14, 16};
+static const unsigned int uniphier_conf_drv_strengths_fixed4[] = {4};
+static const unsigned int uniphier_conf_drv_strengths_fixed5[] = {5};
+static const unsigned int uniphier_conf_drv_strengths_fixed8[] = {8};
+
+static int uniphier_conf_get_drvctrl_data(struct pinctrl_dev *pctldev,
+ unsigned int pin, unsigned int *reg,
+ unsigned int *shift,
+ unsigned int *mask,
+ const unsigned int **strengths)
+{
+ const struct pin_desc *desc = pin_desc_get(pctldev, pin);
+ enum uniphier_pin_drv_type type =
+ uniphier_pin_get_drv_type(desc->drv_data);
+ unsigned int base = 0;
+ unsigned int stride = 0;
+ unsigned int width = 0;
+ unsigned int drvctrl;
+
+ switch (type) {
+ case UNIPHIER_PIN_DRV_1BIT:
+ *strengths = uniphier_conf_drv_strengths_1bit;
+ base = UNIPHIER_PINCTRL_DRVCTRL_BASE;
+ stride = 1;
+ width = 1;
+ break;
+ case UNIPHIER_PIN_DRV_2BIT:
+ *strengths = uniphier_conf_drv_strengths_2bit;
+ base = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
+ stride = 2;
+ width = 2;
+ break;
+ case UNIPHIER_PIN_DRV_3BIT:
+ *strengths = uniphier_conf_drv_strengths_3bit;
+ base = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
+ stride = 4;
+ width = 3;
+ break;
+ case UNIPHIER_PIN_DRV_FIXED4:
+ *strengths = uniphier_conf_drv_strengths_fixed4;
+ break;
+ case UNIPHIER_PIN_DRV_FIXED5:
+ *strengths = uniphier_conf_drv_strengths_fixed5;
+ break;
+ case UNIPHIER_PIN_DRV_FIXED8:
+ *strengths = uniphier_conf_drv_strengths_fixed8;
+ break;
+ default:
+ /* drive strength control is not supported for this pin */
+ return -EINVAL;
+ }
+
+ drvctrl = uniphier_pin_get_drvctrl(desc->drv_data);
+ drvctrl *= stride;
+
+ *reg = base + drvctrl / 32 * 4;
+ *shift = drvctrl % 32;
+ *mask = (1U << width) - 1;
+
+ return 0;
+}
+
static int uniphier_conf_pin_bias_get(struct pinctrl_dev *pctldev,
unsigned int pin,
enum pin_config_param param)
@@ -201,59 +266,24 @@ static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev,
unsigned int pin, u32 *strength)
{
struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
- const struct pin_desc *desc = pin_desc_get(pctldev, pin);
- enum uniphier_pin_drv_type type =
- uniphier_pin_get_drv_type(desc->drv_data);
- static const unsigned int strength_1bit[] = {4, 8};
- static const unsigned int strength_2bit[] = {8, 12, 16, 20};
- static const unsigned int strength_3bit[] = {4, 5, 7, 9, 11, 12,
- 14, 16};
- const unsigned int *supported_strength;
- unsigned int drvctrl, reg, shift, mask, width, val;
+ unsigned int reg, shift, mask, val;
+ const unsigned int *strengths;
int ret;
- switch (type) {
- case UNIPHIER_PIN_DRV_1BIT:
- supported_strength = strength_1bit;
- reg = UNIPHIER_PINCTRL_DRVCTRL_BASE;
- width = 1;
- break;
- case UNIPHIER_PIN_DRV_2BIT:
- supported_strength = strength_2bit;
- reg = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
- width = 2;
- break;
- case UNIPHIER_PIN_DRV_3BIT:
- supported_strength = strength_3bit;
- reg = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
- width = 4;
- break;
- case UNIPHIER_PIN_DRV_FIXED4:
- *strength = 4;
- return 0;
- case UNIPHIER_PIN_DRV_FIXED5:
- *strength = 5;
- return 0;
- case UNIPHIER_PIN_DRV_FIXED8:
- *strength = 8;
- return 0;
- default:
- /* drive strength control is not supported for this pin */
- return -EINVAL;
- }
-
- drvctrl = uniphier_pin_get_drvctrl(desc->drv_data);
- drvctrl *= width;
-
- reg += drvctrl / 32 * 4;
- shift = drvctrl % 32;
- mask = (1U << width) - 1;
-
- ret = regmap_read(priv->regmap, reg, &val);
+ ret = uniphier_conf_get_drvctrl_data(pctldev, pin, ®, &shift,
+ &mask, &strengths);
if (ret)
return ret;
- *strength = supported_strength[(val >> shift) & mask];
+ if (mask) {
+ ret = regmap_read(priv->regmap, reg, &val);
+ if (ret)
+ return ret;
+ } else {
+ val = 0;
+ }
+
+ *strength = strengths[(val >> shift) & mask];
return 0;
}
@@ -398,40 +428,20 @@ static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev,
{
struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
const struct pin_desc *desc = pin_desc_get(pctldev, pin);
- enum uniphier_pin_drv_type type =
- uniphier_pin_get_drv_type(desc->drv_data);
- static const unsigned int strength_1bit[] = {4, 8, -1};
- static const unsigned int strength_2bit[] = {8, 12, 16, 20, -1};
- static const unsigned int strength_3bit[] = {4, 5, 7, 9, 11, 12, 14,
- 16, -1};
- const unsigned int *supported_strength;
- unsigned int drvctrl, reg, shift, mask, width, val;
+ unsigned int reg, shift, mask, val;
+ const unsigned int *strengths;
+ int ret;
- switch (type) {
- case UNIPHIER_PIN_DRV_1BIT:
- supported_strength = strength_1bit;
- reg = UNIPHIER_PINCTRL_DRVCTRL_BASE;
- width = 1;
- break;
- case UNIPHIER_PIN_DRV_2BIT:
- supported_strength = strength_2bit;
- reg = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
- width = 2;
- break;
- case UNIPHIER_PIN_DRV_3BIT:
- supported_strength = strength_3bit;
- reg = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
- width = 4;
- break;
- default:
- dev_err(pctldev->dev,
- "cannot change drive strength for pin %s\n",
+ ret = uniphier_conf_get_drvctrl_data(pctldev, pin, ®, &shift,
+ &mask, &strengths);
+ if (ret) {
+ dev_err(pctldev->dev, "cannot set drive strength for pin %s\n",
desc->name);
- return -EINVAL;
+ return ret;
}
- for (val = 0; supported_strength[val] > 0; val++) {
- if (supported_strength[val] > strength)
+ for (val = 0; val <= mask; val++) {
+ if (strengths[val] > strength)
break;
}
@@ -442,14 +452,10 @@ static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev,
return -EINVAL;
}
- val--;
-
- drvctrl = uniphier_pin_get_drvctrl(desc->drv_data);
- drvctrl *= width;
+ if (!mask)
+ return 0;
- reg += drvctrl / 32 * 4;
- shift = drvctrl % 32;
- mask = (1U << width) - 1;
+ val--;
return regmap_update_bits(priv->regmap, reg,
mask << shift, val << shift);
--
2.7.4
^ permalink raw reply related
* [PATCH] arm64: dts: Hi3660: Remove 'CPU_NAP' idle state
From: Vincent Guittot @ 2018-01-10 8:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515472362-19979-1-git-send-email-leo.yan@linaro.org>
On 9 January 2018 at 05:32, Leo Yan <leo.yan@linaro.org> wrote:
> Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP'
> idle state. At early time, the CPU CA73 CPU_NAP idle state has been
> supported on Hikey960. Later we found the system has the hang issue
> and for resolving this issue Hisilicon released new MCU firmware, but
> unfortunately the new MCU firmware has side effect and results in the
> CA73 CPU cannot really enter CPU_NAP state and roll back to WFI state.
>
> After discussion we cannot see the possibility to enable CA73 CPU_NAP
> state anymore on Hikey960, based on this conclusion we should remove
> this state from DT binding.
>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Kevin Wang <jean.wangtao@linaro.org>
> Cc: Vincent Guittot <vincent.guittot@linaro.org>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Vincent Guittot <vincent.guittot@linaro.org>
> ---
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 32 ++++---------------------------
> 1 file changed, 4 insertions(+), 28 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index ab0b95b..8fddf0d 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -96,11 +96,7 @@
> reg = <0x0 0x100>;
> enable-method = "psci";
> next-level-cache = <&A73_L2>;
> - cpu-idle-states = <
> - &CPU_NAP
> - &CPU_SLEEP
> - &CLUSTER_SLEEP_1
> - >;
> + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>;
> };
>
> cpu5: cpu at 101 {
> @@ -109,11 +105,7 @@
> reg = <0x0 0x101>;
> enable-method = "psci";
> next-level-cache = <&A73_L2>;
> - cpu-idle-states = <
> - &CPU_NAP
> - &CPU_SLEEP
> - &CLUSTER_SLEEP_1
> - >;
> + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>;
> };
>
> cpu6: cpu at 102 {
> @@ -122,11 +114,7 @@
> reg = <0x0 0x102>;
> enable-method = "psci";
> next-level-cache = <&A73_L2>;
> - cpu-idle-states = <
> - &CPU_NAP
> - &CPU_SLEEP
> - &CLUSTER_SLEEP_1
> - >;
> + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>;
> };
>
> cpu7: cpu at 103 {
> @@ -135,24 +123,12 @@
> reg = <0x0 0x103>;
> enable-method = "psci";
> next-level-cache = <&A73_L2>;
> - cpu-idle-states = <
> - &CPU_NAP
> - &CPU_SLEEP
> - &CLUSTER_SLEEP_1
> - >;
> + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>;
> };
>
> idle-states {
> entry-method = "psci";
>
> - CPU_NAP: cpu-nap {
> - compatible = "arm,idle-state";
> - arm,psci-suspend-param = <0x0000001>;
> - entry-latency-us = <7>;
> - exit-latency-us = <2>;
> - min-residency-us = <15>;
> - };
> -
> CPU_SLEEP: cpu-sleep {
> compatible = "arm,idle-state";
> local-timer-stop;
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH V5 00/13] drivers: Boot Constraint core
From: Viresh Kumar @ 2018-01-10 8:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180110080801.GA30583@kroah.com>
On 10-01-18, 09:08, Greg Kroah-Hartman wrote:
> On Wed, Jan 10, 2018 at 09:14:40AM +0530, Viresh Kumar wrote:
> > On 09-01-18, 19:47, Greg Kroah-Hartman wrote:
> > > Can you resend this? As you can tell, I've been a bit busy for the past
> > > month or so :(
> >
> > Sure.
> >
> > > Also, why is there no signed-off-by on the OF core patches?
> >
> > A bit confused, sorry. Are you looking for my signed-off ? They are already
> > there.
> >
> > Or are you looking for Rob's (OF maintainer) signed-off ?
>
> Looking for Rob's, why hasn't he reviewed this yet?
He went through them for sure but never gave his Ack. I have asked him to
provide Acks for the first 2 patches this morning, if they look fine to him.
--
viresh
^ permalink raw reply
* [PATCH] dt-bindings: Nokia N9 audio support
From: Pavel Machek @ 2018-01-10 8:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180108222054.GA17452@amd>
From: Filip Matijevi? <filip.matijevic.pz@gmail.com>
Add bindings for Nokia N9 audio components.
Signed-off-by: Filip Matijevi? <filip.matijevic.pz@gmail.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
diff --git a/Documentation/devicetree/bindings/media/ti-wl1273.txt b/Documentation/devicetree/bindings/media/ti-wl1273.txt
new file mode 100644
index 0000000..21db389
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/ti-wl1273.txt
@@ -0,0 +1,36 @@
+Texas Instruments - wl1273 radio/bluetooth module
+
+Required properties:
+
+- compatible - "ti,wl1273-core"
+- reg - I2C slave address
+- interrupts - The interrupt output from the device.
+- interrupt-parent - The parent interrupt controller.
+- power-gpio - gpio pin to power the device.
+
+- wl1273radio child - compatible = "ti,wl1273-fm-radio";
+
+Optional properties:
+
+- wl1273codec child - compatible = "ti,wl1273codec";
+
+Example:
+
+wl1273core: wl1273core at 22 {
+ compatible = "ti,wl1273-core";
+ reg = <0x22>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wl1273_gpio>;
+
+ interrupt-parent = <&gpio2>;
+ interrupts = <11 2>; /* gpio_43, IRQF_TRIGGER_FALLING */
+
+ wl1273radio: wl1273radio {
+ compatible = "ti,wl1273-fm-radio";
+ };
+
+ wl1273codec: wl1273codec {
+ compatible = "ti,wl1273-codec";
+ };
+ };
diff --git a/Documentation/devicetree/bindings/sound/nokia,n9.txt b/Documentation/devicetree/bindings/sound/nokia,n9.txt
new file mode 100644
index 0000000..230b1eb
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/nokia,n9.txt
@@ -0,0 +1,32 @@
+* Nokia N9/N950 audio setup
+
+Required properties:
+- compatible: "nokia,n9-audio"
+
+- nokia,twl4030-cpu-dai: phandle for the McBSP node connected to TWL4030
+- nokia,tlv320dac33-cpu-dai: phandle for the McBSP node connected to TLV320DAC33
+- nokia,wl1273-cpu-dai: phandle for the McBSP node connected to WL1273
+
+- nokia,twl4030-codec: phandle for the TWL4030 codec
+- nokia,tlv320dac33-codec: phandle for the TLV320DAC33 codec
+- nokia,wl1273-codec: phandle for the WL1273 codec
+- nokia,headphone-amplifier: phandle for the TPA6130A2 node
+
+- nokia,speaker-amplifier-gpios: GPIO for speaker amplifier
+
+Example:
+
+sound: n9-audio {
+ compatible = "nokia,n9-audio";
+
+ nokia,twl4030-cpu-dai = <&mcbsp3>;
+ nokia,tlv320dac33-cpu-dai = <&mcbsp2>;
+ nokia,wl1273-cpu-dai = <&mcbsp4>;
+
+ nokia,twl4030-codec = <&twl4030_audio>;
+ nokia,tlv320dac33-codec = <&tlv320dac33>;
+ nokia,wl1273-codec = <&wl1273codec>;
+ nokia,headphone-amplifier = <&tpa6140a2>;
+
+ nokia,speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
+};
diff --git a/Documentation/devicetree/bindings/sound/tlv320dac33.txt b/Documentation/devicetree/bindings/sound/tlv320dac33.txt
new file mode 100644
index 0000000..8e981f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/tlv320dac33.txt
@@ -0,0 +1,39 @@
+Texas Instruments - tlv320dac33 Codec module
+
+The tlv320dac33 serial control bus communicates through I2C protocols.
+
+Required properties:
+
+- compatible - "ti,tlv320dac33"
+- reg - I2C slave address
+
+Optional properties:
+
+- power-gpio - gpio pin to power the device
+
+- avdd-supply, dvdd-supply, iovdd-supply: power supplies for the device as covered
+ in Documentation/devicetree/bindings/regulator/regulator.txt
+
+- interrupts - The interrupt output from the device.
+- interrupt-parent - The parent interrupt controller.
+
+- ti,keep-bclk - Keep the BCLK running in FIFO modes
+- ti,burst-bclkdiv - BCLK divider value in burst mode
+
+Example:
+
+tlv320dac33: tlv320dac33 at 19 {
+ compatible = "ti,tlv320dac33";
+ reg = <0x19>;
+
+ avdd-supply = <&vaux4>;
+ dvdd-supply = <&vio>;
+ iovdd-supply = <&vio>;
+
+ interrupt-parent = <&gpio2>;
+ interrupts = <21 1>; /* gpio_53, IRQF_TRIGGER_RISING */
+ power-gpio = <&gpio2 28 0>; /* gpio_60 */
+
+ ti,keep-bclk;
+ ti,burst-bclkdiv = /bits/ 8 <3>;
+};
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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^ permalink raw reply related
* [PATCH 1/2] pinctrl: mediatek: mt7622: fix potential uninitialized value being returned
From: Matthias Brugger @ 2018-01-10 9:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a26c40a8ad2af3cf81b31ae34bc82c1ef80d9279.1515514758.git.sean.wang@mediatek.com>
On 01/09/2018 05:28 PM, sean.wang at mediatek.com wrote:
> From: Sean Wang <sean.wang@mediatek.com>
>
> commit d6ed93551320 ("pinctrl: mediatek: add pinctrl driver for MT7622
> SoC") leads to the following static checker warning:
>
> drivers/pinctrl/mediatek/pinctrl-mt7622.c:1419 mtk_gpio_get()
> error: uninitialized symbol 'value'.
> 1412 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
> 1413 {
> 1414 struct mtk_pinctrl *hw = dev_get_drvdata(chip->parent);
> 1415 int value;
> 1416
> 1417 mtk_hw_get_value(hw, gpio, PINCTRL_PIN_REG_DI, &value);
> ^^^^^^^^^^^^^^^^
> 1418
> 1419 return !!value;
> 1420 }
>
> The appropriate error handling must be added to avoid the potential error
> caused by uninitialized value being returned.
>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> ---
> drivers/pinctrl/mediatek/pinctrl-mt7622.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/mediatek/pinctrl-mt7622.c
> index 3824d82..dc32e3c 100644
> --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c
> @@ -1412,9 +1412,11 @@ static struct pinctrl_desc mtk_desc = {
> static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
> {
> struct mtk_pinctrl *hw = dev_get_drvdata(chip->parent);
> - int value;
> + int value, err;
>
> - mtk_hw_get_value(hw, gpio, PINCTRL_PIN_REG_DI, &value);
> + err = mtk_hw_get_value(hw, gpio, PINCTRL_PIN_REG_DI, &value);
> + if (err)
> + return err;
>
> return !!value;
> }
>
^ permalink raw reply
* [PATCH 2/2] pinctrl: mediatek: mt7622: align error handling of mtk_hw_get_value call
From: Matthias Brugger @ 2018-01-10 9:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <0eb8fd904f9b49d0e992bc2ee725d057f94cf735.1515514758.git.sean.wang@mediatek.com>
On 01/09/2018 05:28 PM, sean.wang at mediatek.com wrote:
> From: Sean Wang <sean.wang@mediatek.com>
>
> Make consistent error handling of all mtk_hw_get_value occurrences using
> propagating error code from the internal instead of creating a new one.
>
> Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> --> drivers/pinctrl/mediatek/pinctrl-mt7622.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/mediatek/pinctrl-mt7622.c
> index dc32e3c..06e8406 100644
> --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c
> @@ -1160,7 +1160,7 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
> case PIN_CONFIG_OUTPUT_ENABLE:
> err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_DIR, &val);
> if (err)
> - return -EINVAL;
> + return err;
>
> /* HW takes input mode as zero; output mode as non-zero */
> if ((val && param == PIN_CONFIG_INPUT_ENABLE) ||
> @@ -1184,11 +1184,11 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
> case PIN_CONFIG_DRIVE_STRENGTH:
> err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_E4, &val);
> if (err)
> - return -EINVAL;
> + return err;
>
> err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_E8, &val2);
> if (err)
> - return -EINVAL;
> + return err;
>
> /* 4mA when (e8, e4) = (0, 0); 8mA when (e8, e4) = (0, 1)
> * 12mA when (e8, e4) = (1, 0); 16mA when (e8, e4) = (1, 1)
> @@ -1203,7 +1203,7 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
>
> err = mtk_hw_get_value(hw, pin, reg, &val);
> if (err)
> - return -EINVAL;
> + return err;
>
> ret = val;
>
>
^ permalink raw reply
* [PATCH, v2] arm: omap2: timer: fix a kmemleak caused in omap_get_timer_dt
From: qhou @ 2018-01-10 9:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180109115222.GA28346@lenoch>
On 2018?01?09? 19:52, Ladislav Michl wrote:
> On Tue, Jan 09, 2018 at 05:24:21PM +0800, Qi Hou wrote:
> > When more than one GP timers are used as kernel system timers and the
> > corresponding nodes in device-tree are marked with the same "disabled"
> > property, then the "attr" field of the property will be initialized
> > more than once as the property being added to sys file system via
> > __of_add_property_sysfs().
> >
> > In __of_add_property_sysfs(), the "name" field of pp->attr.attr is set
> > directly to the return value of safe_name(), without taking care of
> > whether it's already a valid pointer to a memory block. If it is, its
> > old value will always be overwritten by the new one and the memory block
> > allocated before will a "ghost", then a kmemleak happened.
>
> As timers does not seem to be deallocated, this does not matter in practice.
> Fix eats a bit more from heap.
Yes, there is no timers being deallocated, as I see.
But it is not eligible that sharing the same property among different
device nodes.
And itexposes kernel info to users. That is not safe.
The fix causes a tiny consumption of heap, maybe it's worth.
--
best regards,
Qi Hou
>
> > That the same "disabled" property being added to different nodes of device
> > tree would cause that kind of kmemleak overhead, at leat once.
> >
> > To fix it, allocate the property dynamically, and delete static one.
> >
> > Signed-off-by: Qi Hou <qi.hou@windriver.com>
> > ---
> > arch/arm/mach-omap2/timer.c | 19 +++++++++++--------
> > 1 file changed, 11 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
> > index ece09c9..206ae8d 100644
> > --- a/arch/arm/mach-omap2/timer.c
> > +++ b/arch/arm/mach-omap2/timer.c
> > @@ -156,12 +156,6 @@ static struct clock_event_device clockevent_gpt = {
> > .tick_resume = omap2_gp_timer_shutdown,
> > };
> >
> > -static struct property device_disabled = {
> > - .name = "status",
> > - .length = sizeof("disabled"),
> > - .value = "disabled",
> > -};
> > -
> > static const struct of_device_id omap_timer_match[] __initconst = {
> > { .compatible = "ti,omap2420-timer", },
> > { .compatible = "ti,omap3430-timer", },
> > @@ -203,8 +197,17 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id *
> > of_get_property(np, "ti,timer-secure", NULL)))
> > continue;
> >
> > - if (!of_device_is_compatible(np, "ti,omap-counter32k"))
> > - of_add_property(np, &device_disabled);
> > + if (!of_device_is_compatible(np, "ti,omap-counter32k")) {
> > + struct property *prop;
> > +
> > + prop = kzalloc(sizeof(*prop), GFP_KERNEL);
> > + if (!prop)
> > + return NULL;
> > + prop->name = "status";
> > + prop->length = sizeof("disabled");
> > + prop->value = "disabled";
>
> How about (see drivers/of/unittest.c)?
> prop->value = "disabled";
> prop->length = strlen(prop->value);
It's better. I will do that.
thanks,
Qi Hou
>
> > + of_add_property(np, prop);
> > + }
> > return np;
> > }
> >
> > --
> > 2.7.4
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> > the body of a message to majordomo at vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Best regards,
Qi Hou
Phone number: +86-10-8477-8608
Address: Floor 15, Building B, Wangjing Plaza, No.9 Zhong-Huan Nanlu, Chaoyang District
^ permalink raw reply
* [PATCH v2 4/6] arm: Add icache invalidation on switch_mm for Cortex-A15
From: Andre Przywara @ 2018-01-10 9:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <296ec02f-d166-384f-999b-241285b2b60c@gmail.com>
Hi,
On 10/01/18 01:35, Florian Fainelli wrote:
> On 01/09/2018 05:33 PM, Andr? Przywara wrote:
>> On 10/01/18 01:28, Florian Fainelli wrote:
>>> On 01/08/2018 10:55 AM, Marc Zyngier wrote:
>>>> In order to avoid aliasing attacks against the branch predictor,
>>>> Cortex-A15 require to invalidate the BTB when switching
>>>> from one user context to another. The only way to do so on this
>>>> CPU is to perform an ICIALLU, having set ACTLR[0] to 1 from secure
>>>> mode.
>>>>
>>>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>>>> ---
>>>
>>> [snip]
>>>
>>>> diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
>>>> index f6adfe88ead2..0a2245b309e5 100644
>>>> --- a/arch/arm/mm/proc-v7-3level.S
>>>> +++ b/arch/arm/mm/proc-v7-3level.S
>>>> @@ -71,6 +71,22 @@ ENTRY(cpu_v7_switch_mm)
>>>> ENDPROC(cpu_v7_switch_mm)
>>>> ENDPROC(cpu_v7_btbinv_switch_mm)
>>>>
>>>> +/*
>>>> + * Cortex-A15 requires ACTLR[0] to be set from secure in order
>>>> + * for the icache invalidation to also invalidate the BTB.
>>>
>>> Considering that writes are ignored when we don't have the correct
>>> permission level, how about set try to set this bit from the
>>> __v7_ca15mp_setup and __v7_b15mp_setup labels just like we are setting
>>> the SMP_EN bit for the poor bastards out there stuck with possibly
>>> frozen bootloaders/ATF?
>>
>> Even when writes to ACTLR are allowed by secure world, this only
>> actually applies to the SMP bit:
>> ARM DDI0438H ARM Cortex-A15 TRM, 4.3.28 Auxiliary Control Register:
>> "-- Read/write in Non-secure PL1 and PL2 modes if NSACR.NS_SMP is 1. In
>> this case, all bits are write-ignored except for the SMP bit."
>>
>> So: good idea, but no luck here :-(
>
> Looks like I failed basic reading exercise here, thanks ;)
No worries, this is totally non-obvious, and I wasn't aware of it as
well until Marc cursed about it yesterday ;-)
Cheers,
Andre.
^ permalink raw reply
* [RFC PATCH 0/9] soc: samsung: Add support of suspend-to-RAM on Exynos5433
From: Chanwoo Choi @ 2018-01-10 9:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJKOXPcJPbVR+WqAzhM8Tuud1Pd9W2p_23iTUveXc5aJtgTJCg@mail.gmail.com>
On 2018? 01? 09? 20:56, Krzysztof Kozlowski wrote:
> On Tue, Jan 9, 2018 at 8:58 AM, Chanwoo Choi <cw00.choi@samsung.com> wrote:
>> In the mainline, there is no case to support the suspend-to-RAM for Samsung
>> Exynos SoC. This patchset support the suspend-to-RAM for 64bit Exynos SoC.
>>
>> For 32bit, arch/arm/mach-exynos/* directoy contains the suspend-related
>> codes such as suspend.c/exynos.c. But, 64bit Exynos should contain
>> the suspend-related codes in the drivers/soc/samsung/*. So, this patchset
>> develop the patch4/5 for drivers/soc/samsung/exynos-pm.c. to support suspend
>> 64bit Exynos SoC.
>>
>> But, I'm not sure what is proper approach for both 32/64bit Exynos.
>> - Approach1 : Split out the supend-related codes between 32/64bit.
>> : arch/arm/mach-exynos/* contains the suspend-related codes for 32bit.
>> : drivers/soc/samsung/* contains the suspend-related codes for 64bit.
>> - Approach2 : Consolidate the all suspend-related codes to drivers/soc/samsung/.
>
> I prefer approach #2 - consolidate the code... unless this creates
> some unmaintainable monster :)
I'll try to consolidate code.
[snip]
--
Best Regards,
Chanwoo Choi
Samsung Electronics
^ permalink raw reply
* [PATCH 1/9] clk: samsung: exynos5433: Add clock flag to support suspend-to-ram
From: Chanwoo Choi @ 2018-01-10 9:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJKOXPc2Y0KX=gozGaMfJJM1B2gsPgLQ4rF5_R8wq5F6=Sxc7g@mail.gmail.com>
On 2018? 01? 09? 20:44, Krzysztof Kozlowski wrote:
> On Tue, Jan 9, 2018 at 8:58 AM, Chanwoo Choi <cw00.choi@samsung.com> wrote:
>> This patch adds the CLK_IS_CRITICAL and CLK_IGNORE_UNUSED flag
>> to some clocks in order to avoid the hang-out in the suspend mode.
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> Cc: Tomasz Figa <tomasz.figa@gmail.com>
>> Cc: Michael Turquette <mturquette@baylibre.com>
>> Cc: Stephen Boyd <sboyd@codeaurora.org>
>> Cc: linux-clk at vger.kernel.org
>> ---
>> drivers/clk/samsung/clk-exynos5433.c | 22 +++++++++++-----------
>> 1 file changed, 11 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
>> index db270908037a..3dc53cd0c730 100644
>> --- a/drivers/clk/samsung/clk-exynos5433.c
>> +++ b/drivers/clk/samsung/clk-exynos5433.c
>> @@ -583,25 +583,25 @@
>> CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
>> GATE(CLK_ACLK_CAM1_333, "aclk_cam1_333", "div_aclk_cam1_333",
>> ENABLE_ACLK_TOP, 13,
>> - CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
>> + CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0),
>> GATE(CLK_ACLK_CAM1_400, "aclk_cam1_400", "div_aclk_cam1_400",
>> ENABLE_ACLK_TOP, 12,
>> CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0),
>> GATE(CLK_ACLK_CAM1_552, "aclk_cam1_552", "div_aclk_cam1_552",
>> ENABLE_ACLK_TOP, 11,
>> - CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
>> + CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0),
>> GATE(CLK_ACLK_CAM0_333, "aclk_cam0_333", "div_aclk_cam0_333",
>> ENABLE_ACLK_TOP, 10,
>> - CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
>> + CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0),
>> GATE(CLK_ACLK_CAM0_400, "aclk_cam0_400", "div_aclk_cam0_400",
>> ENABLE_ACLK_TOP, 9,
>> CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0),
>> GATE(CLK_ACLK_CAM0_552, "aclk_cam0_552", "div_aclk_cam0_552",
>> ENABLE_ACLK_TOP, 8,
>> - CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
>> + CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0),
>> GATE(CLK_ACLK_ISP_DIS_400, "aclk_isp_dis_400", "div_aclk_isp_dis_400",
>> ENABLE_ACLK_TOP, 7,
>> - CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
>> + CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0),
>> GATE(CLK_ACLK_ISP_400, "aclk_isp_400", "div_aclk_isp_400",
>> ENABLE_ACLK_TOP, 6,
>> CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0),
>> @@ -624,11 +624,11 @@
>>
>> /* ENABLE_SCLK_TOP_CAM1 */
>> GATE(CLK_SCLK_ISP_SENSOR2, "sclk_isp_sensor2", "div_sclk_isp_sensor2_b",
>> - ENABLE_SCLK_TOP_CAM1, 7, 0, 0),
>> + ENABLE_SCLK_TOP_CAM1, 7, CLK_IGNORE_UNUSED, 0),
>> GATE(CLK_SCLK_ISP_SENSOR1, "sclk_isp_sensor1", "div_sclk_isp_sensor1_b",
>> ENABLE_SCLK_TOP_CAM1, 6, 0, 0),
>> GATE(CLK_SCLK_ISP_SENSOR0, "sclk_isp_sensor0", "div_sclk_isp_sensor0_b",
>> - ENABLE_SCLK_TOP_CAM1, 5, 0, 0),
>> + ENABLE_SCLK_TOP_CAM1, 5, CLK_IGNORE_UNUSED, 0),
>
> Marking this and few others related to ISP as ignore_unused or
> is_critical looks like a hacky workaround for wrong topology or
> missing clock users. The real cause should be fixed instead marking
> all the clocks as critical or ignore_unused.
I'm sorry. It is my mistake. When I tested the suspend again,
following three clocks need CLK_IS_CRITICAL flag.
- CLK_ACLK_CAM0_552 / CLK_SCLK_UFSUNIPRO_FSYS
: there are not clk consumer until now.
- CLK_SCLK_AUD_UART is for serial_3.
: There are no problem for the clocks of other serial port.
Only this clock must need to enable it always on. If we have to
handle CLK_SCLK_AUD_UART on drivers/tty/serial/samsung.c,
we need to pass the 'serial port information and Exynos info'.
So, If possible, adding the CLK_IS_CRITICAL flag to CLK_SCLK_AUD_UART
is simple.
>
> Best regards,
> Krzysztof
>
>> GATE(CLK_SCLK_ISP_MCTADC_CAM1, "sclk_isp_mctadc_cam1", "oscclk",
>> ENABLE_SCLK_TOP_CAM1, 4, 0, 0),
>> GATE(CLK_SCLK_ISP_UART_CAM1, "sclk_isp_uart_cam1", "div_sclk_isp_uart",
>> @@ -636,7 +636,7 @@
>> GATE(CLK_SCLK_ISP_SPI1_CAM1, "sclk_isp_spi1_cam1", "div_sclk_isp_spi1_b",
>> ENABLE_SCLK_TOP_CAM1, 1, 0, 0),
>> GATE(CLK_SCLK_ISP_SPI0_CAM1, "sclk_isp_spi0_cam1", "div_sclk_isp_spi0_b",
>> - ENABLE_SCLK_TOP_CAM1, 0, 0, 0),
>> + ENABLE_SCLK_TOP_CAM1, 0, CLK_IGNORE_UNUSED, 0),
>>
>> /* ENABLE_SCLK_TOP_DISP */
>> GATE(CLK_SCLK_HDMI_SPDIF_DISP, "sclk_hdmi_spdif_disp",
>> @@ -654,7 +654,7 @@
>> ENABLE_SCLK_TOP_FSYS, 4, CLK_SET_RATE_PARENT, 0),
>> GATE(CLK_SCLK_UFSUNIPRO_FSYS, "sclk_ufsunipro_fsys",
>> "div_sclk_ufsunipro", ENABLE_SCLK_TOP_FSYS,
>> - 3, CLK_SET_RATE_PARENT, 0),
>> + 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0),
>> GATE(CLK_SCLK_USBHOST30_FSYS, "sclk_usbhost30_fsys",
>> "div_sclk_usbhost30", ENABLE_SCLK_TOP_FSYS,
>> 1, CLK_SET_RATE_PARENT, 0),
>> @@ -2982,7 +2982,7 @@ static void __init exynos5433_cmu_peris_init(struct device_node *np)
>> GATE(CLK_PCLK_AUD_SLIMBUS, "pclk_aud_slimbus", "div_aclk_aud",
>> ENABLE_PCLK_AUD, 6, 0, 0),
>> GATE(CLK_PCLK_AUD_UART, "pclk_aud_uart", "div_aclk_aud",
>> - ENABLE_PCLK_AUD, 5, 0, 0),
>> + ENABLE_PCLK_AUD, 5, CLK_IS_CRITICAL, 0),
>> GATE(CLK_PCLK_AUD_PCM, "pclk_aud_pcm", "div_aclk_aud",
>> ENABLE_PCLK_AUD, 4, 0, 0),
>> GATE(CLK_PCLK_AUD_I2S, "pclk_aud_i2s", "div_aclk_aud",
>> @@ -3008,7 +3008,7 @@ static void __init exynos5433_cmu_peris_init(struct device_node *np)
>> GATE(CLK_SCLK_AUD_SLIMBUS, "sclk_aud_slimbus", "div_sclk_aud_slimbus",
>> ENABLE_SCLK_AUD1, 4, 0, 0),
>> GATE(CLK_SCLK_AUD_UART, "sclk_aud_uart", "div_sclk_aud_uart",
>> - ENABLE_SCLK_AUD1, 3, CLK_IGNORE_UNUSED, 0),
>> + ENABLE_SCLK_AUD1, 3, CLK_IS_CRITICAL, 0),
>> GATE(CLK_SCLK_AUD_PCM, "sclk_aud_pcm", "div_sclk_aud_pcm",
>> ENABLE_SCLK_AUD1, 2, 0, 0),
>> GATE(CLK_SCLK_I2S_BCLK, "sclk_i2s_bclk", "ioclk_i2s_bclk",
>> --
>> 1.9.1
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
>
>
--
Best Regards,
Chanwoo Choi
Samsung Electronics
^ permalink raw reply
* [PATCH 11/33] dma-mapping: move swiotlb arch helpers to a new header
From: Vladimir Murzin @ 2018-01-10 9:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180110080027.13879-12-hch@lst.de>
On 10/01/18 08:00, Christoph Hellwig wrote:
> index 9110988b92a1..f00833acb626 100644
> --- a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
> +++ b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
> @@ -61,6 +61,14 @@ static inline void plat_post_dma_flush(struct device *dev)
> {
> }
>
> +static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
> +{
> + if (!dev->dma_mask)
> + return false;
> +
> + return addr + size <= *dev->dma_mask;
> +}
> +
I know it is copy&paste, but it seems it has off by one error and it should be
return addr + size - 1 <= *dev->dma_mask;
> dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
> phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
>
snip...
> diff --git a/arch/mips/include/asm/mach-loongson64/dma-coherence.h b/arch/mips/include/asm/mach-loongson64/dma-coherence.h
> index 1602a9e9e8c2..5cfda8f893e9 100644
> --- a/arch/mips/include/asm/mach-loongson64/dma-coherence.h
> +++ b/arch/mips/include/asm/mach-loongson64/dma-coherence.h
> @@ -17,6 +17,14 @@
>
> struct device;
>
> +static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
> +{
> + if (!dev->dma_mask)
> + return false;
> +
> + return addr + size <= *dev->dma_mask;
ditto
Cheers
Vladimir
^ permalink raw reply
* [PATCH 29/33] dma-direct: retry allocations using GFP_DMA for small masks
From: Vladimir Murzin @ 2018-01-10 9:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180110080027.13879-30-hch@lst.de>
On 10/01/18 08:00, Christoph Hellwig wrote:
> If an attempt to allocate memory succeeded, but isn't inside the
> supported DMA mask, retry the allocation with GFP_DMA set as a
> last resort.
>
> Based on the x86 code, but an off by one error in what is now
> dma_coherent_ok has been fixed vs the x86 code.
>
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
> lib/dma-direct.c | 25 ++++++++++++++++++++++++-
> 1 file changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/lib/dma-direct.c b/lib/dma-direct.c
> index 8f76032ebc3c..4e43c2bb7f5f 100644
> --- a/lib/dma-direct.c
> +++ b/lib/dma-direct.c
> @@ -35,6 +35,11 @@ check_addr(struct device *dev, dma_addr_t dma_addr, size_t size,
> return true;
> }
>
> +static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
> +{
> + return phys_to_dma(dev, phys) + size - 1 <= dev->coherent_dma_mask;
> +}
> +
> static void *dma_direct_alloc(struct device *dev, size_t size,
> dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
> {
> @@ -48,11 +53,29 @@ static void *dma_direct_alloc(struct device *dev, size_t size,
> if (dev->coherent_dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
> gfp |= GFP_DMA32;
>
> +again:
> /* CMA can be used only in the context which permits sleeping */
> - if (gfpflags_allow_blocking(gfp))
> + if (gfpflags_allow_blocking(gfp)) {
> page = dma_alloc_from_contiguous(dev, count, page_order, gfp);
> + if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
> + dma_release_from_contiguous(dev, page, count);
> + page = NULL;
> + }
> + }
> if (!page)
> page = alloc_pages_node(dev_to_node(dev), gfp, page_order);
> +
> + if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
> + __free_pages(page, page_order);
> + page = NULL;
> +
> + if (dev->coherent_dma_mask < DMA_BIT_MASK(32) &&
> + !(gfp & GFP_DMA)) {
> + gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
> + goto again;
> + }
> + }
> +
> if (!page)
> return NULL;
>
>
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Cheers
Vladimir
^ permalink raw reply
* [PATCH] dt-bindings: Nokia N9 audio support
From: Sakari Ailus @ 2018-01-10 9:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180110085315.GA17841@amd>
Hi Pavel,
On Wed, Jan 10, 2018 at 09:53:15AM +0100, Pavel Machek wrote:
> From: Filip Matijevi? <filip.matijevic.pz@gmail.com>
>
> Add bindings for Nokia N9 audio components.
>
> Signed-off-by: Filip Matijevi? <filip.matijevic.pz@gmail.com>
> Signed-off-by: Pavel Machek <pavel@ucw.cz>
>
> diff --git a/Documentation/devicetree/bindings/media/ti-wl1273.txt b/Documentation/devicetree/bindings/media/ti-wl1273.txt
> new file mode 100644
> index 0000000..21db389
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/ti-wl1273.txt
> @@ -0,0 +1,36 @@
> +Texas Instruments - wl1273 radio/bluetooth module
> +
> +Required properties:
> +
> +- compatible - "ti,wl1273-core"
> +- reg - I2C slave address
> +- interrupts - The interrupt output from the device.
> +- interrupt-parent - The parent interrupt controller.
> +- power-gpio - gpio pin to power the device.
> +
> +- wl1273radio child - compatible = "ti,wl1273-fm-radio";
I'd document this under a separate section, as the compatible property for
the other child node.
You use "property - description" here but "property: description" in the
file below. It'd be nice to be consistent, albeit it's separate files.
> +
> +Optional properties:
> +
> +- wl1273codec child - compatible = "ti,wl1273codec";
"ti,wl1273-codec"
> +
> +Example:
> +
> +wl1273core: wl1273core at 22 {
> + compatible = "ti,wl1273-core";
> + reg = <0x22>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&wl1273_gpio>;
> +
> + interrupt-parent = <&gpio2>;
> + interrupts = <11 2>; /* gpio_43, IRQF_TRIGGER_FALLING */
> +
> + wl1273radio: wl1273radio {
> + compatible = "ti,wl1273-fm-radio";
> + };
> +
> + wl1273codec: wl1273codec {
> + compatible = "ti,wl1273-codec";
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/sound/nokia,n9.txt b/Documentation/devicetree/bindings/sound/nokia,n9.txt
> new file mode 100644
> index 0000000..230b1eb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/nokia,n9.txt
> @@ -0,0 +1,32 @@
> +* Nokia N9/N950 audio setup
> +
A small description saying what this really is would be nice.
> +Required properties:
> +- compatible: "nokia,n9-audio"
> +
> +- nokia,twl4030-cpu-dai: phandle for the McBSP node connected to TWL4030
> +- nokia,tlv320dac33-cpu-dai: phandle for the McBSP node connected to TLV320DAC33
> +- nokia,wl1273-cpu-dai: phandle for the McBSP node connected to WL1273
> +
> +- nokia,twl4030-codec: phandle for the TWL4030 codec
> +- nokia,tlv320dac33-codec: phandle for the TLV320DAC33 codec
> +- nokia,wl1273-codec: phandle for the WL1273 codec
> +- nokia,headphone-amplifier: phandle for the TPA6130A2 node
> +
> +- nokia,speaker-amplifier-gpios: GPIO for speaker amplifier
> +
> +Example:
> +
> +sound: n9-audio {
> + compatible = "nokia,n9-audio";
> +
> + nokia,twl4030-cpu-dai = <&mcbsp3>;
> + nokia,tlv320dac33-cpu-dai = <&mcbsp2>;
> + nokia,wl1273-cpu-dai = <&mcbsp4>;
> +
> + nokia,twl4030-codec = <&twl4030_audio>;
> + nokia,tlv320dac33-codec = <&tlv320dac33>;
> + nokia,wl1273-codec = <&wl1273codec>;
> + nokia,headphone-amplifier = <&tpa6140a2>;
> +
> + nokia,speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
> +};
> diff --git a/Documentation/devicetree/bindings/sound/tlv320dac33.txt b/Documentation/devicetree/bindings/sound/tlv320dac33.txt
> new file mode 100644
> index 0000000..8e981f7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/tlv320dac33.txt
> @@ -0,0 +1,39 @@
> +Texas Instruments - tlv320dac33 Codec module
> +
> +The tlv320dac33 serial control bus communicates through I2C protocols.
> +
> +Required properties:
> +
> +- compatible - "ti,tlv320dac33"
> +- reg - I2C slave address
> +
> +Optional properties:
> +
> +- power-gpio - gpio pin to power the device
> +
> +- avdd-supply, dvdd-supply, iovdd-supply: power supplies for the device as covered
> + in Documentation/devicetree/bindings/regulator/regulator.txt
> +
> +- interrupts - The interrupt output from the device.
> +- interrupt-parent - The parent interrupt controller.
> +
> +- ti,keep-bclk - Keep the BCLK running in FIFO modes
> +- ti,burst-bclkdiv - BCLK divider value in burst mode
> +
> +Example:
> +
> +tlv320dac33: tlv320dac33 at 19 {
> + compatible = "ti,tlv320dac33";
> + reg = <0x19>;
> +
> + avdd-supply = <&vaux4>;
> + dvdd-supply = <&vio>;
> + iovdd-supply = <&vio>;
> +
> + interrupt-parent = <&gpio2>;
> + interrupts = <21 1>; /* gpio_53, IRQF_TRIGGER_RISING */
> + power-gpio = <&gpio2 28 0>; /* gpio_60 */
> +
> + ti,keep-bclk;
> + ti,burst-bclkdiv = /bits/ 8 <3>;
> +};
>
--
Kind regards,
Sakari Ailus
sakari.ailus at linux.intel.com
^ permalink raw reply
* [PATCH v2 0/2] ARM: davinici: move watchdog restart from mach to drivers
From: Sekhar Nori @ 2018-01-10 9:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1515294615-5473-1-git-send-email-david@lechnology.com>
On Sunday 07 January 2018 08:40 AM, David Lechner wrote:
> This series moves the watchdog restart code from arch/arm/mach-davinci
> to drivers/watchdog.
>
> Tested working on LEGO MINDSTORMS EV3 (TI AM1808 processor).
>
> v2 changes:
> * rebased on linux-davinci/master (fixed conflict with clock.h)
>
> There is also still the unresolved question from Sekhar:
>
>> Hi Wim,
>>
>> How do you want to handle this series? Patch 2/2 definitely needs to go
>> through my tree as it will clash with other code I am queuing.
>>
>> I can either take 1/2 also through ARM-SoC with your ack (preferred) or
>> if you give me an immutable commit/tag over v4.15-rc1, I can merge that
>> to preserve bisect-ability.
I see that 1/2 is already present in linux-next through commit 71d1f058844d.
At this time, I think the best way forward is to send 2/2 through my
tree. The only downside is if Linus merges ARM-SoC tree ahead of
watchdog tree, there will be a small period during merge window where
reset will be broken on DaVinci devices. I guess thats not such a big
issue (and I see no way around it except postponing 2/2 to v4.17).
I will be sending a pull request for 2/2 to ARM-SoC shortly and will
copy folks from this thread too.
Thanks,
Sekhar
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