* Handling lm3559 flash on Motorola Droid 4 and others
From: Pavel Machek @ 2018-05-06 7:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180505213951.GA4530@amd>
Hi!
> It seems lm3559 flash driver is available on github (
> https://github.com/ZenfoneArea/android_kernel_asus_zenfone5/tree/master/linux/modules/camera/drivers/media/i2c
> ) but there'll be some fun getting it cleaned up and merged.
>
> Did anyone start doing anything in that area? Is there possibly better
> source to start from?
It turned out to be easier than expected. Of course, using flash w/o
v4l will not be easy, but that's generic problem.
Pavel
diff --git a/arch/arm/boot/dts/omap4-droid4-xt894.dts b/arch/arm/boot/dts/omap4-droid4-xt894.dts
index bdf73cb..45305e8 100644
--- a/arch/arm/boot/dts/omap4-droid4-xt894.dts
+++ b/arch/arm/boot/dts/omap4-droid4-xt894.dts
@@ -271,6 +271,34 @@
};
};
+&i2c3 {
+ rearcam: camera at 36 {
+ compatible = "micron,ov8820";
+ reg = <0x36>;
+ clocks = <&auxclk1_ck>;
+ clock-names = "xvclk";
+ clock-frequency = <24000000>;
+ power-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>, // gpio48
+ <&gpio3 19 GPIO_ACTIVE_HIGH>, // gpio83
+ <&gpio5 23 GPIO_ACTIVE_HIGH>; // gpio151
+ };
+ frontcam: camera at 48 {
+ compatible = "ovti,mt9m114";
+ reg = <0x48>;
+ clocks = <&auxclk2_ck>;
+ clock-names = "extclk";
+ clock-frequency = <24000000>;
+ power-gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>, // gpio171
+ <&gpio2 5 GPIO_ACTIVE_HIGH>; // gpio37
+ };
+ flashlight: flash at 53 {
+ compatible = "ti,lm3559";
+ reg = <0x53>;
+ };
+};
+
+
+
&keypad {
keypad,num-rows = <8>;
keypad,num-columns = <8>;
diff --git a/drivers/media/i2c/lm3560.c b/drivers/media/i2c/lm3560.c
index b600e03a..a9b2ba2 100644
--- a/drivers/media/i2c/lm3560.c
+++ b/drivers/media/i2c/lm3560.c
@@ -17,6 +17,8 @@
* General Public License for more details.
*/
+// Probably compatible with lm3559, too.
+
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/i2c.h>
@@ -395,6 +397,22 @@ static int lm3560_init_device(struct lm3560_flash *flash)
return rval;
/* reset faults */
rval = regmap_read(flash->regmap, REG_FLAG, ®_val);
+
+ printk("lm3560: Device initialized\n");
+
+ flash->led_mode = V4L2_FLASH_LED_MODE_TORCH;
+ rval = lm3560_mode_ctrl(flash);
+ rval = lm3560_torch_brt_ctrl(flash, 0, LM3560_TORCH_BRT_MIN);
+ rval = lm3560_torch_brt_ctrl(flash, 1, LM3560_TORCH_BRT_MIN);
+
+ mdelay(1000);
+
+ rval = lm3560_torch_brt_ctrl(flash, 0, 0);
+ rval = lm3560_torch_brt_ctrl(flash, 1, 0);
+
+ flash->led_mode = V4L2_FLASH_LED_MODE_NONE;
+ rval = lm3560_mode_ctrl(flash);
+
return rval;
}
@@ -405,6 +423,8 @@ static int lm3560_probe(struct i2c_client *client,
struct lm3560_platform_data *pdata = dev_get_platdata(&client->dev);
int rval;
+ printk("3560: probe\n");
+
flash = devm_kzalloc(&client->dev, sizeof(*flash), GFP_KERNEL);
if (flash == NULL)
return -ENOMEM;
@@ -417,17 +437,19 @@ static int lm3560_probe(struct i2c_client *client,
/* if there is no platform data, use chip default value */
if (pdata == NULL) {
+ printk("3560: no pdata\n");
+
pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
if (pdata == NULL)
return -ENODEV;
- pdata->peak = LM3560_PEAK_3600mA;
- pdata->max_flash_timeout = LM3560_FLASH_TOUT_MAX;
+ pdata->peak = LM3560_PEAK_1600mA;
+ pdata->max_flash_timeout = LM3560_FLASH_TOUT_MIN;
/* led 1 */
- pdata->max_flash_brt[LM3560_LED0] = LM3560_FLASH_BRT_MAX;
- pdata->max_torch_brt[LM3560_LED0] = LM3560_TORCH_BRT_MAX;
+ pdata->max_flash_brt[LM3560_LED0] = LM3560_FLASH_BRT_MIN;
+ pdata->max_torch_brt[LM3560_LED0] = LM3560_TORCH_BRT_MIN;
/* led 2 */
- pdata->max_flash_brt[LM3560_LED1] = LM3560_FLASH_BRT_MAX;
- pdata->max_torch_brt[LM3560_LED1] = LM3560_TORCH_BRT_MAX;
+ pdata->max_flash_brt[LM3560_LED1] = LM3560_FLASH_BRT_MIN;
+ pdata->max_torch_brt[LM3560_LED1] = LM3560_TORCH_BRT_MIN;
}
flash->pdata = pdata;
flash->dev = &client->dev;
@@ -466,6 +488,8 @@ static int lm3560_remove(struct i2c_client *client)
static const struct i2c_device_id lm3560_id_table[] = {
{LM3560_NAME, 0},
+ {"lm3559", 0},
+ {"ti,lm3559", 0},
{}
};
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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* [PATCH] media: i2c: lm3560: use conservative defaults
From: Pavel Machek @ 2018-05-06 8:02 UTC (permalink / raw)
To: linux-arm-kernel
If no pdata is found, we should use lowest current settings, not highest.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
diff --git a/drivers/media/i2c/lm3560.c b/drivers/media/i2c/lm3560.c
index b600e03a..c4e5ed5 100644
--- a/drivers/media/i2c/lm3560.c
+++ b/drivers/media/i2c/lm3560.c
@@ -420,14 +434,14 @@ static int lm3560_probe(struct i2c_client *client,
pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
if (pdata == NULL)
return -ENODEV;
- pdata->peak = LM3560_PEAK_3600mA;
- pdata->max_flash_timeout = LM3560_FLASH_TOUT_MAX;
+ pdata->peak = LM3560_PEAK_1600mA;
+ pdata->max_flash_timeout = LM3560_FLASH_TOUT_MIN;
/* led 1 */
- pdata->max_flash_brt[LM3560_LED0] = LM3560_FLASH_BRT_MAX;
- pdata->max_torch_brt[LM3560_LED0] = LM3560_TORCH_BRT_MAX;
+ pdata->max_flash_brt[LM3560_LED0] = LM3560_FLASH_BRT_MIN;
+ pdata->max_torch_brt[LM3560_LED0] = LM3560_TORCH_BRT_MIN;
/* led 2 */
- pdata->max_flash_brt[LM3560_LED1] = LM3560_FLASH_BRT_MAX;
- pdata->max_torch_brt[LM3560_LED1] = LM3560_TORCH_BRT_MAX;
+ pdata->max_flash_brt[LM3560_LED1] = LM3560_FLASH_BRT_MIN;
+ pdata->max_torch_brt[LM3560_LED1] = LM3560_TORCH_BRT_MIN;
}
flash->pdata = pdata;
flash->dev = &client->dev;
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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* [PATCH] media: i2c: lm3560: add support for lm3559 chip
From: Pavel Machek @ 2018-05-06 8:06 UTC (permalink / raw)
To: linux-arm-kernel
Add support for LM3559, as found in Motorola Droid 4 phone, for
example. SW interface seems to be identical.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
diff --git a/drivers/media/i2c/lm3560.c b/drivers/media/i2c/lm3560.c
index b600e03a..c4e5ed5 100644
--- a/drivers/media/i2c/lm3560.c
+++ b/drivers/media/i2c/lm3560.c
@@ -1,6 +1,6 @@
/*
* drivers/media/i2c/lm3560.c
- * General device driver for TI lm3560, FLASH LED Driver
+ * General device driver for TI lm3559, lm3560, FLASH LED Driver
*
* Copyright (C) 2013 Texas Instruments
*
@@ -465,6 +479,7 @@ static int lm3560_remove(struct i2c_client *client)
}
static const struct i2c_device_id lm3560_id_table[] = {
+ {LM3559_NAME, 0},
{LM3560_NAME, 0},
{}
};
diff --git a/include/media/i2c/lm3560.h b/include/media/i2c/lm3560.h
index a5bd310..0e2b1c7 100644
--- a/include/media/i2c/lm3560.h
+++ b/include/media/i2c/lm3560.h
@@ -22,6 +22,7 @@
#include <media/v4l2-subdev.h>
+#define LM3559_NAME "lm3559"
#define LM3560_NAME "lm3560"
#define LM3560_I2C_ADDR (0x53)
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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* [PATCH 2/2] arm64: Clear the stack
From: Alexander Popov @ 2018-05-06 8:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180504110907.c2dw33kjmyybso6t@lakrids.cambridge.arm.com>
On 04.05.2018 14:09, Mark Rutland wrote:
> On Thu, May 03, 2018 at 08:33:38PM +0300, Alexander Popov wrote:
>> Hello Mark and Laura,
>>
>> Let me join the discussion. Mark, thanks for your feedback!
>>
>> On 03.05.2018 10:19, Mark Rutland wrote:
>>> Hi Laura,
>>>
>>> On Wed, May 02, 2018 at 01:33:26PM -0700, Laura Abbott wrote:
>>>>
>>>> Implementation of stackleak based heavily on the x86 version
>>>>
>>>> Signed-off-by: Laura Abbott <labbott@redhat.com>
>>>> ---
>>>> Now written in C instead of a bunch of assembly.
>>>
>>> This looks neat!
>>>
>>> I have a few minor comments below.
>>>
>>>> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
>>>> index bf825f38d206..0ceea613c65b 100644
>>>> --- a/arch/arm64/kernel/Makefile
>>>> +++ b/arch/arm64/kernel/Makefile
>>>> @@ -55,6 +55,9 @@ arm64-reloc-test-y := reloc_test_core.o reloc_test_syms.o
>>>> arm64-obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
>>>> arm64-obj-$(CONFIG_ARM_SDE_INTERFACE) += sdei.o
>>>>
>>>> +arm64-obj-$(CONFIG_GCC_PLUGIN_STACKLEAK) += erase.o
>>>> +KASAN_SANITIZE_erase.o := n
>>>
>>> I suspect we want to avoid the full set of instrumentation suspects here, e.g.
>>> GKOV, KASAN, UBSAN, and KCOV.
>>
>> I've disabled KASAN instrumentation for that file on x86 because erase_kstack()
>> intentionally writes to the stack and causes KASAN false positive reports.
>>
>> But I didn't see any conflicts with other types of instrumentation that you
>> mentioned.
>
> The rationale is that any of these can result in implicit calls to C
> functions at arbitrary points during erase_kstack(). That could
> interfere with the search for poison, and/or leave data on the stack
> which is not erased.
>
> They won't result in hard failures, as KASAN would, but we should
> probably avoid them regardless.
Thanks, Mark! Agree about KCOV, I'll switch it off for that file.
And I think I should _not_ disable UBSAN for that file. I didn't make any
intentional UB, so if UBSAN finds anything, that will be a true positive report.
> [...]
>
>>>> +asmlinkage void erase_kstack(void)
>>>> +{
>>>> + unsigned long p = current->thread.lowest_stack;
>>>> + unsigned long boundary = p & ~(THREAD_SIZE - 1);
>>>> + unsigned long poison = 0;
>>>> + const unsigned long check_depth = STACKLEAK_POISON_CHECK_DEPTH /
>>>> + sizeof(unsigned long);
>>>> +
>>>> + /*
>>>> + * Let's search for the poison value in the stack.
>>>> + * Start from the lowest_stack and go to the bottom.
>>>> + */
>>>> + while (p > boundary && poison <= check_depth) {
>>>> + if (*(unsigned long *)p == STACKLEAK_POISON)
>>>> + poison++;
>>>> + else
>>>> + poison = 0;
>>>> +
>>>> + p -= sizeof(unsigned long);
>>>> + }
>>>> +
>>>> + /*
>>>> + * One long int at the bottom of the thread stack is reserved and
>>>> + * should not be poisoned (see CONFIG_SCHED_STACK_END_CHECK).
>>>> + */
>>>> + if (p == boundary)
>>>> + p += sizeof(unsigned long);
>>>
>>> I wonder if end_of_stack() should be taught about CONFIG_SCHED_STACK_END_CHECK,
>>> given that's supposed to return the last *usable* long on the stack, and we
>>> don't account for this elsewhere.
>>
>> I would be afraid to change the meaning of end_of_stack()... Currently it
>> considers that magic long as usable (include/linux/sched/task_stack.h):
>>
>> #define task_stack_end_corrupted(task) \
>> (*(end_of_stack(task)) != STACK_END_MAGIC)
>>
>>
>>> If we did, then IIUC we could do:
>>>
>>> unsigned long boundary = (unsigned long)end_of_stack(current);
>>>
>>> ... at the start of the function, and not have to worry about this explicitly.
>>
>> I should mention that erase_kstack() can be called from x86 trampoline stack.
>> That's why the boundary is calculated from the lowest_stack.
>
> Ok. Under what circumstances does that happen?
>
> It seems a little scary that curent::thread::lowest_stack might not be
> on current's task stack.
Yes, indeed. That's why I check against that, please see BUG_ON() in
erase_kstack() for x86.
1. Calculate the boundary from the lowest_stack.
2. Search for poison between lowest_stack and boundary.
3. Now ready to write the poison.
4. Reset the boundary to current_stack_pointer if we are on the thread stack and
to current_top_of_stack otherwise (we are on the trampoline stack).
5. BUG_ON(boundary - p >= THREAD_SIZE);
6. Write poison till the boundary.
> Is that reset when transitioning to/from the
> trampoile stack?
We switch to the trampoline stack from the current thread stack just before
returning to the userspace. Please search for "trampoline stack" in
arch/x86/entry/entry_64.S.
> [...]
>
>>>> +#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
>>>> +void __used check_alloca(unsigned long size)
>>>> +{
>>>> + unsigned long sp, stack_left;
>>>> +
>>>> + sp = current_stack_pointer;
>>>> +
>>>> + stack_left = sp & (THREAD_SIZE - 1);
>>>> + BUG_ON(stack_left < 256 || size >= stack_left - 256);
>>>> +}
>>>
>>> Is this arbitrary, or is there something special about 256?
>>>
>>> Even if this is arbitrary, can we give it some mnemonic?
>>
>> It's just a reasonable number. We can introduce a macro for it.
>
> I'm just not sure I see the point in the offset, given things like
> VMAP_STACK exist. BUG_ON() handling will likely require *more* than 256
> bytes of stack, so it seems superfluous, as we'd be relying on stack
> overflow detection at that point.
>
> I can see that we should take the CONFIG_SCHED_STACK_END_CHECK offset
> into account, though.
Mark, thank you for such an important remark!
In Kconfig STACKLEAK implies but doesn't depend on VMAP_STACK. In fact x86_32
doesn't have VMAP_STACK at all but can have STACKLEAK.
[Adding Andy Lutomirski]
I've made some additional experiments: I exhaust the thread stack to have only
(MIN_STACK_LEFT - 1) bytes left and then force alloca. If VMAP_STACK is
disabled, BUG_ON() handling causes stack depth overflow, which is detected by
SCHED_STACK_END_CHECK. If VMAP_STACK is enabled, the kernel hangs on BUG_ON()
handling! Enabling CONFIG_PROVE_LOCKING gives the needed report from VMAP_STACK:
[ 43.543962] lkdtm: try a large alloca of 14647 bytes (sp 18446683600580263344)...
[ 43.545188] BUG: stack guard page was hit at 00000000830608b8 (stack is 000000009375e943..00000000cb7f52d9)
[ 43.545189] kernel stack overflow (double-fault): 0000 [#1] SMP PTI
[ 43.545189] Dumping ftrace buffer:
[ 43.545190] (ftrace buffer empty)
[ 43.545190] Modules linked in: lkdtm
[ 43.545192] CPU: 0 PID: 2682 Comm: sh Not tainted 4.17.0-rc3+ #23
[ 43.545192] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Ubuntu-1.8.2-1ubuntu1 04/01/2014
[ 43.545193] RIP: 0010:mark_lock+0xe/0x540
[ 43.545193] RSP: 0018:ffffc900009c0000 EFLAGS: 00010002
[ 43.545194] RAX: 000000000000000c RBX: ffff880079b3b590 RCX: 0000000000000008
[ 43.545194] RDX: 0000000000000008 RSI: ffff880079b3b590 RDI: ffff880079b3ad40
[ 43.545195] RBP: ffffc900009c0100 R08: 0000000000000002 R09: 0000000000000000
[ 43.545195] R10: ffffc900009c0118 R11: 0000000000000000 R12: 0000000000000000
[ 43.545196] R13: ffff880079b3ad40 R14: ffff880079b3ad40 R15: ffffffff810cb8d7
[ 43.545196] FS: 00007f544c7d8700(0000) GS:ffff88007fc00000(0000) knlGS:0000000000000000
[ 43.545197] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 43.545200] CR2: ffffc900009bfff8 CR3: 0000000079194000 CR4: 00000000000006f0
[ 43.545200] Call Trace:
[ 43.545201] ? vprintk_emit+0x67/0x440
[ 43.545201] __lock_acquire+0x2e0/0x13e0
[ 43.545201] ? lock_acquire+0x9d/0x1e0
[ 43.545202] lock_acquire+0x9d/0x1e0
[ 43.545202] ? vprintk_emit+0x67/0x440
[ 43.545203] _raw_spin_lock+0x20/0x30
[ 43.545203] ? vprintk_emit+0x67/0x440
[ 43.545203] vprintk_emit+0x67/0x440
[ 43.545204] ? check_alloca+0x9a/0xb0
[ 43.545204] printk+0x50/0x6f
[ 43.545204] ? __probe_kernel_read+0x34/0x60
[ 43.545205] ? check_alloca+0x9a/0xb0
[ 43.545205] report_bug+0xd3/0x110
[ 43.545206] fixup_bug.part.10+0x13/0x30
[ 43.545206] do_error_trap+0x158/0x190
[ 43.545206] ? trace_hardirqs_off_thunk+0x1a/0x1c
[ 43.545207] invalid_op+0x14/0x20
[ 43.545207] RIP: 0010:check_alloca+0x9a/0xb0
[ 43.545207] RSP: 0018:ffffc900009c0408 EFLAGS: 00010287
[ 43.545208] RAX: 0000000000000008 RBX: 0000000000003936 RCX: 0000000000000001
[ 43.545209] RDX: 0000000000000002 RSI: 0000000000000000 RDI: ffffc900009c0408
[ 43.545209] RBP: ffffc900009c3da0 R08: 0000000000000000 R09: 0000000000000000
[ 43.545210] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000003936
[ 43.545210] R13: 0000000001ff0610 R14: 0000000000000011 R15: ffffc900009c3f08
[ 43.545210] ? check_alloca+0x64/0xb0
[ 43.545211] do_alloca+0x55/0x71b [lkdtm]
[ 43.545211] ? noop_count+0x10/0x10
[ 43.545211] ? check_usage+0xb1/0x4d0
[ 43.545212] ? noop_count+0x10/0x10
[ 43.545212] ? check_usage+0xb1/0x4d0
[ 43.545213] ? serial8250_console_write+0x253/0x2b0
[ 43.545213] ? serial8250_console_write+0x253/0x2b0
[ 43.545213] ? __lock_acquire+0x2e0/0x13e0
[ 43.545214] ? up+0xd/0x50
[ 43.545214] ? console_unlock+0x374/0x660
[ 43.545215] ? __lock_acquire+0x2e0/0x13e0
[ 43.545215] ? retint_kernel+0x10/0x10
[ 43.545215] ? trace_hardirqs_on_caller+0xed/0x180
[ 43.545216] ? find_held_lock+0x2d/0x90
[ 43.545216] ? mark_held_locks+0x4e/0x80
[ 43.545216] ? console_unlock+0x471/0x660
[ 43.545217] ? trace_hardirqs_on_caller+0xed/0x180
[ 43.545217] ? vprintk_emit+0x235/0x440
[ 43.545218] ? get_stack_info+0x32/0x160
[ 43.545218] ? check_alloca+0x64/0xb0
[ 43.545218] ? do_alloca+0x1f/0x71b [lkdtm]
[ 43.545219] lkdtm_STACKLEAK_ALLOCA+0x8f/0xb0 [lkdtm]
[ 43.545219] direct_entry+0xc5/0x110 [lkdtm]
[ 43.545220] full_proxy_write+0x51/0x80
[ 43.545220] __vfs_write+0x49/0x180
[ 43.545220] ? rcu_read_lock_sched_held+0x53/0x60
[ 43.545221] ? rcu_sync_lockdep_assert+0x29/0x50
[ 43.545221] ? __sb_start_write+0x110/0x160
[ 43.545221] ? vfs_write+0x172/0x190
[ 43.545222] vfs_write+0xa8/0x190
[ 43.545222] ksys_write+0x50/0xc0
[ 43.545223] do_syscall_64+0x51/0x1a0
[ 43.545223] entry_SYSCALL_64_after_hwframe+0x49/0xbe
[ 43.545223] RIP: 0033:0x7f544c306370
[ 43.545224] RSP: 002b:00007ffc223bacb8 EFLAGS: 00000246 ORIG_RAX: 0000000000000001
[ 43.545225] RAX: ffffffffffffffda RBX: 0000000001ff0610 RCX: 00007f544c306370
[ 43.545225] RDX: 0000000000000011 RSI: 0000000001ff0610 RDI: 0000000000000001
[ 43.545225] RBP: 0000000000000011 R08: 41434f4c4c415f4b R09: 00007f544c5bce90
[ 43.545226] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000001
[ 43.545226] R13: 0000000000000011 R14: 7fffffffffffffff R15: 0000000000000000
[ 43.545227] Code: 08 08 00 00 48 c7 c7 70 56 2d 82 5b 48 89 d1 e9 a4 48 01 00 66 0f 1f 84 00 00 00 00 00 41 57 41 56
89 d1 41 55 41 54 49 89 fd 55 <53> bb 01 00 00 00 d3 e3 48 89 f5 41 89 d4 48 83 ec 08 0f b7 46
[ 43.545241] RIP: mark_lock+0xe/0x540 RSP: ffffc900009c0000
[ 43.545241] ---[ end trace 63196de7418a092e ]---
[ 43.545242] Kernel panic - not syncing: corrupted stack end detected inside scheduler
[ 43.545242]
I can't say why VMAP_STACK report hangs during BUG_ON() handling on defconfig.
Andy, can you give a clue?
I see that MIN_STACK_LEFT = 2048 is enough for BUG_ON() handling on both x86_64
and x86_32. So I'm going to:
- set MIN_STACK_LEFT to 2048;
- improve the lkdtm test to cover this case.
Mark, Kees, Laura, does it sound good?
>>>> +EXPORT_SYMBOL(check_alloca);
>>>> +#endif
>>>> diff --git a/drivers/firmware/efi/libstub/Makefile b/drivers/firmware/efi/libstub/Makefile
>>>> index a34e9290a699..25dd2a14560d 100644
>>>> --- a/drivers/firmware/efi/libstub/Makefile
>>>> +++ b/drivers/firmware/efi/libstub/Makefile
>>>> @@ -20,7 +20,8 @@ cflags-$(CONFIG_EFI_ARMSTUB) += -I$(srctree)/scripts/dtc/libfdt
>>>> KBUILD_CFLAGS := $(cflags-y) -DDISABLE_BRANCH_PROFILING \
>>>> -D__NO_FORTIFY \
>>>> $(call cc-option,-ffreestanding) \
>>>> - $(call cc-option,-fno-stack-protector)
>>>> + $(call cc-option,-fno-stack-protector) \
>>>> + $(DISABLE_STACKLEAK_PLUGIN)
>>>>
>>>> GCOV_PROFILE := n
>>>> KASAN_SANITIZE := n
>>>
>>> I believe we'll also need to do this for the KVM hyp code in arch/arm64/kvm/hyp/.
>>
>> Could you please give more details on that? Why STACKLEAK breaks it?
>
> In the hyp/EL2 exception level, we only map the hyp text, and not the
> rest of the kernel. So erase_kstack and check_alloca won't be mapped,
> and attempt to branch to them will fault.
Here you mean track_stack() and not erase_kstack(), right?
> Even if it were mapped, things like BUG_ON(), get_current(), etc do not
> work at hyp.
>
> Additionally, the hyp code is mapped as a different virtual address from
> the rest of the kernel, so if any of the STACKLEAK code happens to use
> an absolute address, this will not work correctly.
Thanks for the details. This quite old article [1] says:
The code run in HYP mode is limited to a few hundred instructions and isolated
to two assembly files: arch/arm/kvm/interrupts.S and arch/arm/kvm/interrupts_head.S.
Is all hyp code now localized in arch/arm64/kvm/hyp/?
[1]: https://lwn.net/Articles/557132/
Best regards,
Alexander
^ permalink raw reply
* [PATCH] PCI: pciehp: Add quirk for QDF2400 Command Completed erratum
From: Sinan Kaya @ 2018-05-06 10:30 UTC (permalink / raw)
To: linux-arm-kernel
The QDF2400 controller does not set the Command Completed bit unless
writes to the Slot Command register change "Control" bits. Command
Completed is never set for writes that only change software notification
"Enable" bits. This results in timeouts like this:
pciehp 0000:00:00.0:pcie004: Timeout on hotplug command 0x1038
Cc: stable at vger.kernel.org
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/pci/hotplug/pciehp_hpc.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index e70eba5..974a8f1 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -914,3 +914,9 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
}
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
+
+DECLARE_PCI_FIXUP_CLASS_EARLY(0x17cb, 0x400,
+ PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
+
+DECLARE_PCI_FIXUP_CLASS_EARLY(0x17cb, 0x401,
+ PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
--
2.7.4
^ permalink raw reply related
* [PATCH] locking/atomics/powerpc: Move cmpxchg helpers to asm/cmpxchg.h and define the full set of cmpxchg APIs
From: Ingo Molnar @ 2018-05-06 12:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180505140340.uzfhoc42xvas4m72@tardis>
* Boqun Feng <boqun.feng@gmail.com> wrote:
> > The only change I made beyond a trivial build fix is that I also added the release
> > atomics variants explicitly:
> >
> > +#define atomic_cmpxchg_release(v, o, n) \
> > + cmpxchg_release(&((v)->counter), (o), (n))
> > +#define atomic64_cmpxchg_release(v, o, n) \
> > + cmpxchg_release(&((v)->counter), (o), (n))
> >
> > It has passed a PowerPC cross-build test here, but no runtime tests.
> >
>
> Do you have the commit at any branch in tip tree? I could pull it and
> cross-build and check the assembly code of lib/atomic64_test.c, that way
> I could verify whether we mess something up.
>
> > Does this patch look good to you?
> >
>
> Yep!
Great - I have pushed the commits out into the locking tree, they can be found in:
git fetch git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git locking/core
The PowerPC preparatory commit from you is:
0476a632cb3a: locking/atomics/powerpc: Move cmpxchg helpers to asm/cmpxchg.h and define the full set of cmpxchg APIs
Thanks,
Ingo
^ permalink raw reply
* [PATCH 0/7] Gemini DTS updates
From: Linus Walleij @ 2018-05-06 13:43 UTC (permalink / raw)
To: linux-arm-kernel
This is a resend of some patches and some new fixups for
the Gemini device trees. Will send a v4.18 pull request for
this stuff in a few days.
Geert Uytterhoeven (1):
ARM: dts: gemini: Fix "debounce-interval" property misspelling
Linus Walleij (6):
ARM: dtd: Set DNS-313 LEDs to use better triggers
ARM: dts: Set DNS-685 LEDs to use better triggers
ARM: dts: Fix the DNS-313 flash compatible
ARM: dts: Fix bootargs for Gemini D-Link devices
ARM: dts: Add second ATA to NAS4220B
ARM: dts: Fix DTC warnings
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 16 +++++++++-------
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 19 +++++++++++--------
arch/arm/boot/dts/gemini-nas4220b.dts | 20 +++++++++++---------
arch/arm/boot/dts/gemini-rut1xx.dts | 12 +++++-------
arch/arm/boot/dts/gemini-sq201.dts | 12 +++++-------
arch/arm/boot/dts/gemini-wbd111.dts | 17 ++++++++---------
arch/arm/boot/dts/gemini-wbd222.dts | 16 +++++++---------
7 files changed, 56 insertions(+), 56 deletions(-)
--
2.17.0
^ permalink raw reply
* [PATCH 1/7] ARM: dts: gemini: Fix "debounce-interval" property misspelling
From: Linus Walleij @ 2018-05-06 13:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180506134352.2637-1-linus.walleij@linaro.org>
From: Geert Uytterhoeven <geert+renesas@glider.be>
"debounce_interval" was never supported.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 4 ++--
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 2 +-
arch/arm/boot/dts/gemini-nas4220b.dts | 4 ++--
arch/arm/boot/dts/gemini-rut1xx.dts | 2 +-
arch/arm/boot/dts/gemini-sq201.dts | 2 +-
arch/arm/boot/dts/gemini-wbd111.dts | 2 +-
arch/arm/boot/dts/gemini-wbd222.dts | 2 +-
7 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
index cadde92bc6b5..369c80076a61 100644
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -28,7 +28,7 @@
#address-cells = <1>;
#size-cells = <0>;
button-esc {
- debounce_interval = <50>;
+ debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_ESC>;
label = "reset";
@@ -36,7 +36,7 @@
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
};
button-eject {
- debounce_interval = <50>;
+ debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_EJECTCD>;
label = "unmount";
diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
index 403364a7aab9..55b294f1675c 100644
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -34,7 +34,7 @@
#address-cells = <1>;
#size-cells = <0>;
button-esc {
- debounce_interval = <50>;
+ debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_ESC>;
label = "reset";
diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts
index 4785fbcc41ed..465c26b53212 100644
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -30,7 +30,7 @@
#size-cells = <0>;
button at 29 {
- debounce_interval = <50>;
+ debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
label = "Backup button";
@@ -38,7 +38,7 @@
gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
};
button at 31 {
- debounce_interval = <50>;
+ debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_RESTART>;
label = "Softreset button";
diff --git a/arch/arm/boot/dts/gemini-rut1xx.dts b/arch/arm/boot/dts/gemini-rut1xx.dts
index 15f20178642c..a2f14ee37599 100644
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -30,7 +30,7 @@
#size-cells = <0>;
button at 28 {
- debounce_interval = <50>;
+ debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
label = "Reset to defaults";
diff --git a/arch/arm/boot/dts/gemini-sq201.dts b/arch/arm/boot/dts/gemini-sq201.dts
index 63c02ca9513c..229c0267617a 100644
--- a/arch/arm/boot/dts/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini-sq201.dts
@@ -30,7 +30,7 @@
#size-cells = <0>;
button at 18 {
- debounce_interval = <50>;
+ debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
label = "factory reset";
diff --git a/arch/arm/boot/dts/gemini-wbd111.dts b/arch/arm/boot/dts/gemini-wbd111.dts
index b4ec9ad85d72..b31a9189083f 100644
--- a/arch/arm/boot/dts/gemini-wbd111.dts
+++ b/arch/arm/boot/dts/gemini-wbd111.dts
@@ -30,7 +30,7 @@
#size-cells = <0>;
button at 5 {
- debounce_interval = <50>;
+ debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
label = "reset";
diff --git a/arch/arm/boot/dts/gemini-wbd222.dts b/arch/arm/boot/dts/gemini-wbd222.dts
index 6d25bcc046e7..0be867fbfc69 100644
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -30,7 +30,7 @@
#size-cells = <0>;
button at 5 {
- debounce_interval = <50>;
+ debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
label = "reset";
--
2.17.0
^ permalink raw reply related
* [PATCH 2/7] ARM: dtd: Set DNS-313 LEDs to use better triggers
From: Linus Walleij @ 2018-05-06 13:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180506134352.2637-1-linus.walleij@linaro.org>
We just used one LED for "disk activity" but using the green
LED for disk read and the red LED for disk write gives a way
better user experience.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
index 55b294f1675c..2d9aa5ba8320 100644
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -59,14 +59,13 @@
label = "dns313:green:disk";
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
- linux,default-trigger = "ide-disk";
- /* Ideally should activate while reading */
+ linux,default-trigger = "disk-read";
};
led-disk-red {
label = "dns313:red:disk";
gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
default-state = "off";
- /* Ideally should activate while writing */
+ linux,default-trigger = "disk-write";
};
};
--
2.17.0
^ permalink raw reply related
* [PATCH 3/7] ARM: dts: Set DNS-685 LEDs to use better triggers
From: Linus Walleij @ 2018-05-06 13:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180506134352.2637-1-linus.walleij@linaro.org>
Using the blue LED for disk read and the orange LED for
disk write gives a better user experience.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
index 369c80076a61..8d3478cf840b 100644
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -98,7 +98,7 @@
/*
* These two LEDs are on the side of the device.
* For electrical reasons, both LEDs cannot be active
- * at the same time so only blue or orange can on at
+ * at the same time so only blue or orange can be on at
* one time. Enabling both makes the LED go dark.
* The LEDs both sit inside the unmount button and the
* label on the case says "unmount".
@@ -108,12 +108,14 @@
/* Collides with LPC_SERIRQ, UART DTR, SSP FSC pins */
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
+ linux,default-trigger = "disk-read";
};
led-orange-hd {
label = "dir685:orange:HD";
/* Collides with LPC_LAD[2], UART DSR, SSP ECLK pins */
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
default-state = "off";
+ linux,default-trigger = "disk-write";
};
};
--
2.17.0
^ permalink raw reply related
* [PATCH 4/7] ARM: dts: Fix the DNS-313 flash compatible
From: Linus Walleij @ 2018-05-06 13:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180506134352.2637-1-linus.walleij@linaro.org>
The flash on the DNS-313 needs to be probed as JEDEC, it does
not conform to the common CFI standard.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
index 2d9aa5ba8320..d865cde8ed12 100644
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -157,8 +157,12 @@
soc {
flash at 30000000 {
+ /*
+ * This is a Eon EN29LV400AB 512 KiB flash with
+ * three partitions.
+ */
+ compatible = "cortina,gemini-flash", "jedec-flash";
status = "okay";
- /* 512KB of flash */
reg = <0x30000000 0x00080000>;
/*
--
2.17.0
^ permalink raw reply related
* [PATCH 5/7] ARM: dts: Fix bootargs for Gemini D-Link devices
From: Linus Walleij @ 2018-05-06 13:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180506134352.2637-1-linus.walleij@linaro.org>
These machines need to be booted from very specific harddisk
partitions (as the D-Link DNS-313 boots specifically from
partition 4). Add the proper bootargs so that everything works
smoothly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 3 ++-
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
index 8d3478cf840b..89ce0d1916e3 100644
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -20,7 +20,8 @@
};
chosen {
- stdout-path = "uart0:115200n8";
+ bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
+ stdout-path = "uart0:19200n8";
};
gpio_keys {
diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
index d865cde8ed12..da78a0aa389a 100644
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -26,6 +26,7 @@
};
chosen {
+ bootargs = "console=ttyS0,19200n8 root=/dev/sda4 rw rootwait";
stdout-path = "uart0:19200n8";
};
--
2.17.0
^ permalink raw reply related
* [PATCH 6/7] ARM: dts: Add second ATA to NAS4220B
From: Linus Walleij @ 2018-05-06 13:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180506134352.2637-1-linus.walleij@linaro.org>
The NAS4220B has the second ATA interface up and running.
Activate it in the device tree.
Signed-off-by: Roman Yeryomin <roman@advem.lv>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-nas4220b.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts
index 465c26b53212..9f78803b2456 100644
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -202,5 +202,9 @@
ata at 63000000 {
status = "okay";
};
+
+ ata at 63400000 {
+ status = "okay";
+ };
};
};
--
2.17.0
^ permalink raw reply related
* [PATCH 7/7] ARM: dts: Fix DTC warnings
From: Linus Walleij @ 2018-05-06 13:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180506134352.2637-1-linus.walleij@linaro.org>
The DTC was warning a lot about unit names etc, I think I fixed
them all. One warning remains:
arch/arm/boot/dts/gemini-rut1xx.dtb: Warning (unit_address_vs_reg):
/memory: node has a reg or ranges property, but no unit name
This comes up all the time even though memory is stated as
memory at 0 for all boards, I guess this is a bug in the DTC
syntax checker, like it cannot really differentiate between
@0 and no unit name at all for the memory node.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 5 ++---
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 5 ++---
arch/arm/boot/dts/gemini-nas4220b.dts | 12 +++++-------
arch/arm/boot/dts/gemini-rut1xx.dts | 10 ++++------
arch/arm/boot/dts/gemini-sq201.dts | 10 ++++------
arch/arm/boot/dts/gemini-wbd111.dts | 15 +++++++--------
arch/arm/boot/dts/gemini-wbd222.dts | 14 ++++++--------
7 files changed, 30 insertions(+), 41 deletions(-)
diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
index 89ce0d1916e3..fb5c954ab95a 100644
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -13,7 +13,7 @@
#address-cells = <1>;
#size-cells = <1>;
- memory {
+ memory at 0 {
/* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
device_type = "memory";
reg = <0x00000000 0x8000000>;
@@ -26,8 +26,7 @@
gpio_keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
+
button-esc {
debounce-interval = <50>;
wakeup-source;
diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
index da78a0aa389a..d1329322b968 100644
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -15,7 +15,7 @@
#address-cells = <1>;
#size-cells = <1>;
- memory {
+ memory at 0 {
/* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */
device_type = "memory";
reg = <0x00000000 0x4000000>;
@@ -32,8 +32,7 @@
gpio_keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
+
button-esc {
debounce-interval = <50>;
wakeup-source;
diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts
index 9f78803b2456..963ea890c87f 100644
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -14,7 +14,7 @@
#address-cells = <1>;
#size-cells = <1>;
- memory { /* 128 MB */
+ memory at 0 { /* 128 MB */
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
@@ -26,10 +26,8 @@
gpio_keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- button at 29 {
+ button-setup {
debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
@@ -37,7 +35,7 @@
/* Conflict with TVC */
gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
};
- button at 31 {
+ button-restart {
debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_RESTART>;
@@ -49,13 +47,13 @@
leds {
compatible = "gpio-leds";
- led at 28 {
+ led-orange-hdd {
label = "nas4220b:orange:hdd";
/* Conflict with TVC */
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
- led at 30 {
+ led-green-os {
label = "nas4220b:green:os";
/* Conflict with TVC */
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/gemini-rut1xx.dts b/arch/arm/boot/dts/gemini-rut1xx.dts
index a2f14ee37599..eb4f0bf074da 100644
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -14,7 +14,7 @@
#address-cells = <1>;
#size-cells = <1>;
- memory { /* 128 MB */
+ memory at 0 { /* 128 MB */
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
@@ -26,10 +26,8 @@
gpio_keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- button at 28 {
+ button-setup {
debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
@@ -41,14 +39,14 @@
leds {
compatible = "gpio-leds";
- led at 7 {
+ led-gsm {
/* FIXME: add the LED color */
label = "rut1xx::gsm";
/* Conflict with ICE */
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
- led at 31 {
+ led-power {
/* FIXME: add the LED color */
label = "rut1xx::power";
/* Conflict with NAND CE0 */
diff --git a/arch/arm/boot/dts/gemini-sq201.dts b/arch/arm/boot/dts/gemini-sq201.dts
index 229c0267617a..e5cf9d1a98cd 100644
--- a/arch/arm/boot/dts/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini-sq201.dts
@@ -14,7 +14,7 @@
#address-cells = <1>;
#size-cells = <1>;
- memory { /* 128 MB */
+ memory at 0 { /* 128 MB */
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
@@ -26,10 +26,8 @@
gpio_keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- button at 18 {
+ button-setup {
debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
@@ -41,14 +39,14 @@
leds {
compatible = "gpio-leds";
- led at 20 {
+ led-green-info {
label = "sq201:green:info";
/* Conflict with parallel flash */
gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
- led at 31 {
+ led-green-usb {
label = "sq201:green:usb";
/* Conflict with parallel and NAND flash */
gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/gemini-wbd111.dts b/arch/arm/boot/dts/gemini-wbd111.dts
index b31a9189083f..29af86cd10f7 100644
--- a/arch/arm/boot/dts/gemini-wbd111.dts
+++ b/arch/arm/boot/dts/gemini-wbd111.dts
@@ -14,7 +14,8 @@
#address-cells = <1>;
#size-cells = <1>;
- memory { /* 128 MB */
+ memory at 0 {
+ /* 128 MB */
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
@@ -26,10 +27,8 @@
gpio_keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- button at 5 {
+ button-setup {
debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
@@ -42,25 +41,25 @@
leds {
compatible = "gpio-leds";
- led at 1 {
+ led-red-l3 {
label = "wbd111:red:L3";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
- led at 2 {
+ led-green-l4 {
label = "wbd111:green:L4";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
- led at 3 {
+ led-red-l4 {
label = "wbd111:red:L4";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
- led at 5 {
+ led-greeb-l3 {
label = "wbd111:green:L3";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/gemini-wbd222.dts b/arch/arm/boot/dts/gemini-wbd222.dts
index 0be867fbfc69..24e6ae3616f7 100644
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -14,7 +14,7 @@
#address-cells = <1>;
#size-cells = <1>;
- memory { /* 128 MB */
+ memory at 0 { /* 128 MB */
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
@@ -26,10 +26,8 @@
gpio_keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- button at 5 {
+ button-setup {
debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
@@ -42,25 +40,25 @@
leds {
compatible = "gpio-leds";
- led at 1 {
+ led-red-l3 {
label = "wbd111:red:L3";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
- led at 2 {
+ led-green-l4 {
label = "wbd111:green:L4";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
- led at 3 {
+ led-red-l4 {
label = "wbd111:red:L4";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
- led at 5 {
+ led-green-l3 {
label = "wbd111:green:L3";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
--
2.17.0
^ permalink raw reply related
* [PATCH] locking/atomics: Simplify the op definitions in atomic.h some more
From: Andrea Parri @ 2018-05-06 14:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180505083635.622xmcvb42dw5xxh@gmail.com>
Hi Ingo,
> From 5affbf7e91901143f84f1b2ca64f4afe70e210fd Mon Sep 17 00:00:00 2001
> From: Ingo Molnar <mingo@kernel.org>
> Date: Sat, 5 May 2018 10:23:23 +0200
> Subject: [PATCH] locking/atomics: Simplify the op definitions in atomic.h some more
>
> Before:
>
> #ifndef atomic_fetch_dec_relaxed
> # ifndef atomic_fetch_dec
> # define atomic_fetch_dec(v) atomic_fetch_sub(1, (v))
> # define atomic_fetch_dec_relaxed(v) atomic_fetch_sub_relaxed(1, (v))
> # define atomic_fetch_dec_acquire(v) atomic_fetch_sub_acquire(1, (v))
> # define atomic_fetch_dec_release(v) atomic_fetch_sub_release(1, (v))
> # else
> # define atomic_fetch_dec_relaxed atomic_fetch_dec
> # define atomic_fetch_dec_acquire atomic_fetch_dec
> # define atomic_fetch_dec_release atomic_fetch_dec
> # endif
> #else
> # ifndef atomic_fetch_dec_acquire
> # define atomic_fetch_dec_acquire(...) __atomic_op_acquire(atomic_fetch_dec, __VA_ARGS__)
> # endif
> # ifndef atomic_fetch_dec_release
> # define atomic_fetch_dec_release(...) __atomic_op_release(atomic_fetch_dec, __VA_ARGS__)
> # endif
> # ifndef atomic_fetch_dec
> # define atomic_fetch_dec(...) __atomic_op_fence(atomic_fetch_dec, __VA_ARGS__)
> # endif
> #endif
>
> After:
>
> #ifndef atomic_fetch_dec_relaxed
> # ifndef atomic_fetch_dec
> # define atomic_fetch_dec(v) atomic_fetch_sub(1, (v))
> # define atomic_fetch_dec_relaxed(v) atomic_fetch_sub_relaxed(1, (v))
> # define atomic_fetch_dec_acquire(v) atomic_fetch_sub_acquire(1, (v))
> # define atomic_fetch_dec_release(v) atomic_fetch_sub_release(1, (v))
> # else
> # define atomic_fetch_dec_relaxed atomic_fetch_dec
> # define atomic_fetch_dec_acquire atomic_fetch_dec
> # define atomic_fetch_dec_release atomic_fetch_dec
> # endif
> #else
> # ifndef atomic_fetch_dec
> # define atomic_fetch_dec(...) __atomic_op_fence(atomic_fetch_dec, __VA_ARGS__)
> # define atomic_fetch_dec_acquire(...) __atomic_op_acquire(atomic_fetch_dec, __VA_ARGS__)
> # define atomic_fetch_dec_release(...) __atomic_op_release(atomic_fetch_dec, __VA_ARGS__)
> # endif
> #endif
>
> The idea is that because we already group these APIs by certain defines
> such as atomic_fetch_dec_relaxed and atomic_fetch_dec in the primary
> branches - we can do the same in the secondary branch as well.
>
> ( Also remove some unnecessarily duplicate comments, as the API
> group defines are now pretty much self-documenting. )
>
> No change in functionality.
>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Linus Torvalds <torvalds@linux-foundation.org>
> Cc: Andrew Morton <akpm@linux-foundation.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: linux-kernel at vger.kernel.org
> Signed-off-by: Ingo Molnar <mingo@kernel.org>
This breaks compilation on RISC-V. (For some of its atomics, the arch
currently defines the _relaxed and the full variants and it relies on
the generic definitions for the _acquire and the _release variants.)
Andrea
> ---
> include/linux/atomic.h | 312 ++++++++++---------------------------------------
> 1 file changed, 62 insertions(+), 250 deletions(-)
>
> diff --git a/include/linux/atomic.h b/include/linux/atomic.h
> index 67aaafba256b..352ecc72d7f5 100644
> --- a/include/linux/atomic.h
> +++ b/include/linux/atomic.h
> @@ -71,98 +71,66 @@
> })
> #endif
>
> -/* atomic_add_return_relaxed() et al: */
> -
> #ifndef atomic_add_return_relaxed
> # define atomic_add_return_relaxed atomic_add_return
> # define atomic_add_return_acquire atomic_add_return
> # define atomic_add_return_release atomic_add_return
> #else
> -# ifndef atomic_add_return_acquire
> -# define atomic_add_return_acquire(...) __atomic_op_acquire(atomic_add_return, __VA_ARGS__)
> -# endif
> -# ifndef atomic_add_return_release
> -# define atomic_add_return_release(...) __atomic_op_release(atomic_add_return, __VA_ARGS__)
> -# endif
> # ifndef atomic_add_return
> # define atomic_add_return(...) __atomic_op_fence(atomic_add_return, __VA_ARGS__)
> +# define atomic_add_return_acquire(...) __atomic_op_acquire(atomic_add_return, __VA_ARGS__)
> +# define atomic_add_return_release(...) __atomic_op_release(atomic_add_return, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_inc_return_relaxed() et al: */
> -
> #ifndef atomic_inc_return_relaxed
> # define atomic_inc_return_relaxed atomic_inc_return
> # define atomic_inc_return_acquire atomic_inc_return
> # define atomic_inc_return_release atomic_inc_return
> #else
> -# ifndef atomic_inc_return_acquire
> -# define atomic_inc_return_acquire(...) __atomic_op_acquire(atomic_inc_return, __VA_ARGS__)
> -# endif
> -# ifndef atomic_inc_return_release
> -# define atomic_inc_return_release(...) __atomic_op_release(atomic_inc_return, __VA_ARGS__)
> -# endif
> # ifndef atomic_inc_return
> # define atomic_inc_return(...) __atomic_op_fence(atomic_inc_return, __VA_ARGS__)
> +# define atomic_inc_return_acquire(...) __atomic_op_acquire(atomic_inc_return, __VA_ARGS__)
> +# define atomic_inc_return_release(...) __atomic_op_release(atomic_inc_return, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_sub_return_relaxed() et al: */
> -
> #ifndef atomic_sub_return_relaxed
> # define atomic_sub_return_relaxed atomic_sub_return
> # define atomic_sub_return_acquire atomic_sub_return
> # define atomic_sub_return_release atomic_sub_return
> #else
> -# ifndef atomic_sub_return_acquire
> -# define atomic_sub_return_acquire(...) __atomic_op_acquire(atomic_sub_return, __VA_ARGS__)
> -# endif
> -# ifndef atomic_sub_return_release
> -# define atomic_sub_return_release(...) __atomic_op_release(atomic_sub_return, __VA_ARGS__)
> -# endif
> # ifndef atomic_sub_return
> # define atomic_sub_return(...) __atomic_op_fence(atomic_sub_return, __VA_ARGS__)
> +# define atomic_sub_return_acquire(...) __atomic_op_acquire(atomic_sub_return, __VA_ARGS__)
> +# define atomic_sub_return_release(...) __atomic_op_release(atomic_sub_return, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_dec_return_relaxed() et al: */
> -
> #ifndef atomic_dec_return_relaxed
> # define atomic_dec_return_relaxed atomic_dec_return
> # define atomic_dec_return_acquire atomic_dec_return
> # define atomic_dec_return_release atomic_dec_return
> #else
> -# ifndef atomic_dec_return_acquire
> -# define atomic_dec_return_acquire(...) __atomic_op_acquire(atomic_dec_return, __VA_ARGS__)
> -# endif
> -# ifndef atomic_dec_return_release
> -# define atomic_dec_return_release(...) __atomic_op_release(atomic_dec_return, __VA_ARGS__)
> -# endif
> # ifndef atomic_dec_return
> # define atomic_dec_return(...) __atomic_op_fence(atomic_dec_return, __VA_ARGS__)
> +# define atomic_dec_return_acquire(...) __atomic_op_acquire(atomic_dec_return, __VA_ARGS__)
> +# define atomic_dec_return_release(...) __atomic_op_release(atomic_dec_return, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_fetch_add_relaxed() et al: */
> -
> #ifndef atomic_fetch_add_relaxed
> # define atomic_fetch_add_relaxed atomic_fetch_add
> # define atomic_fetch_add_acquire atomic_fetch_add
> # define atomic_fetch_add_release atomic_fetch_add
> #else
> -# ifndef atomic_fetch_add_acquire
> -# define atomic_fetch_add_acquire(...) __atomic_op_acquire(atomic_fetch_add, __VA_ARGS__)
> -# endif
> -# ifndef atomic_fetch_add_release
> -# define atomic_fetch_add_release(...) __atomic_op_release(atomic_fetch_add, __VA_ARGS__)
> -# endif
> # ifndef atomic_fetch_add
> # define atomic_fetch_add(...) __atomic_op_fence(atomic_fetch_add, __VA_ARGS__)
> +# define atomic_fetch_add_acquire(...) __atomic_op_acquire(atomic_fetch_add, __VA_ARGS__)
> +# define atomic_fetch_add_release(...) __atomic_op_release(atomic_fetch_add, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_fetch_inc_relaxed() et al: */
> -
> #ifndef atomic_fetch_inc_relaxed
> # ifndef atomic_fetch_inc
> # define atomic_fetch_inc(v) atomic_fetch_add(1, (v))
> @@ -175,37 +143,25 @@
> # define atomic_fetch_inc_release atomic_fetch_inc
> # endif
> #else
> -# ifndef atomic_fetch_inc_acquire
> -# define atomic_fetch_inc_acquire(...) __atomic_op_acquire(atomic_fetch_inc, __VA_ARGS__)
> -# endif
> -# ifndef atomic_fetch_inc_release
> -# define atomic_fetch_inc_release(...) __atomic_op_release(atomic_fetch_inc, __VA_ARGS__)
> -# endif
> # ifndef atomic_fetch_inc
> # define atomic_fetch_inc(...) __atomic_op_fence(atomic_fetch_inc, __VA_ARGS__)
> +# define atomic_fetch_inc_acquire(...) __atomic_op_acquire(atomic_fetch_inc, __VA_ARGS__)
> +# define atomic_fetch_inc_release(...) __atomic_op_release(atomic_fetch_inc, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_fetch_sub_relaxed() et al: */
> -
> #ifndef atomic_fetch_sub_relaxed
> # define atomic_fetch_sub_relaxed atomic_fetch_sub
> # define atomic_fetch_sub_acquire atomic_fetch_sub
> # define atomic_fetch_sub_release atomic_fetch_sub
> #else
> -# ifndef atomic_fetch_sub_acquire
> -# define atomic_fetch_sub_acquire(...) __atomic_op_acquire(atomic_fetch_sub, __VA_ARGS__)
> -# endif
> -# ifndef atomic_fetch_sub_release
> -# define atomic_fetch_sub_release(...) __atomic_op_release(atomic_fetch_sub, __VA_ARGS__)
> -# endif
> # ifndef atomic_fetch_sub
> # define atomic_fetch_sub(...) __atomic_op_fence(atomic_fetch_sub, __VA_ARGS__)
> +# define atomic_fetch_sub_acquire(...) __atomic_op_acquire(atomic_fetch_sub, __VA_ARGS__)
> +# define atomic_fetch_sub_release(...) __atomic_op_release(atomic_fetch_sub, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_fetch_dec_relaxed() et al: */
> -
> #ifndef atomic_fetch_dec_relaxed
> # ifndef atomic_fetch_dec
> # define atomic_fetch_dec(v) atomic_fetch_sub(1, (v))
> @@ -218,127 +174,86 @@
> # define atomic_fetch_dec_release atomic_fetch_dec
> # endif
> #else
> -# ifndef atomic_fetch_dec_acquire
> -# define atomic_fetch_dec_acquire(...) __atomic_op_acquire(atomic_fetch_dec, __VA_ARGS__)
> -# endif
> -# ifndef atomic_fetch_dec_release
> -# define atomic_fetch_dec_release(...) __atomic_op_release(atomic_fetch_dec, __VA_ARGS__)
> -# endif
> # ifndef atomic_fetch_dec
> # define atomic_fetch_dec(...) __atomic_op_fence(atomic_fetch_dec, __VA_ARGS__)
> +# define atomic_fetch_dec_acquire(...) __atomic_op_acquire(atomic_fetch_dec, __VA_ARGS__)
> +# define atomic_fetch_dec_release(...) __atomic_op_release(atomic_fetch_dec, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_fetch_or_relaxed() et al: */
> -
> #ifndef atomic_fetch_or_relaxed
> # define atomic_fetch_or_relaxed atomic_fetch_or
> # define atomic_fetch_or_acquire atomic_fetch_or
> # define atomic_fetch_or_release atomic_fetch_or
> #else
> -# ifndef atomic_fetch_or_acquire
> -# define atomic_fetch_or_acquire(...) __atomic_op_acquire(atomic_fetch_or, __VA_ARGS__)
> -# endif
> -# ifndef atomic_fetch_or_release
> -# define atomic_fetch_or_release(...) __atomic_op_release(atomic_fetch_or, __VA_ARGS__)
> -# endif
> # ifndef atomic_fetch_or
> # define atomic_fetch_or(...) __atomic_op_fence(atomic_fetch_or, __VA_ARGS__)
> +# define atomic_fetch_or_acquire(...) __atomic_op_acquire(atomic_fetch_or, __VA_ARGS__)
> +# define atomic_fetch_or_release(...) __atomic_op_release(atomic_fetch_or, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_fetch_and_relaxed() et al: */
> -
> #ifndef atomic_fetch_and_relaxed
> # define atomic_fetch_and_relaxed atomic_fetch_and
> # define atomic_fetch_and_acquire atomic_fetch_and
> # define atomic_fetch_and_release atomic_fetch_and
> #else
> -# ifndef atomic_fetch_and_acquire
> -# define atomic_fetch_and_acquire(...) __atomic_op_acquire(atomic_fetch_and, __VA_ARGS__)
> -# endif
> -# ifndef atomic_fetch_and_release
> -# define atomic_fetch_and_release(...) __atomic_op_release(atomic_fetch_and, __VA_ARGS__)
> -# endif
> # ifndef atomic_fetch_and
> # define atomic_fetch_and(...) __atomic_op_fence(atomic_fetch_and, __VA_ARGS__)
> +# define atomic_fetch_and_acquire(...) __atomic_op_acquire(atomic_fetch_and, __VA_ARGS__)
> +# define atomic_fetch_and_release(...) __atomic_op_release(atomic_fetch_and, __VA_ARGS__)
> # endif
> #endif
>
> #ifdef atomic_andnot
>
> -/* atomic_fetch_andnot_relaxed() et al: */
> -
> #ifndef atomic_fetch_andnot_relaxed
> # define atomic_fetch_andnot_relaxed atomic_fetch_andnot
> # define atomic_fetch_andnot_acquire atomic_fetch_andnot
> # define atomic_fetch_andnot_release atomic_fetch_andnot
> #else
> -# ifndef atomic_fetch_andnot_acquire
> -# define atomic_fetch_andnot_acquire(...) __atomic_op_acquire(atomic_fetch_andnot, __VA_ARGS__)
> -# endif
> -# ifndef atomic_fetch_andnot_release
> -# define atomic_fetch_andnot_release(...) __atomic_op_release(atomic_fetch_andnot, __VA_ARGS__)
> -# endif
> # ifndef atomic_fetch_andnot
> # define atomic_fetch_andnot(...) __atomic_op_fence(atomic_fetch_andnot, __VA_ARGS__)
> +# define atomic_fetch_andnot_acquire(...) __atomic_op_acquire(atomic_fetch_andnot, __VA_ARGS__)
> +# define atomic_fetch_andnot_release(...) __atomic_op_release(atomic_fetch_andnot, __VA_ARGS__)
> # endif
> #endif
>
> #endif /* atomic_andnot */
>
> -/* atomic_fetch_xor_relaxed() et al: */
> -
> #ifndef atomic_fetch_xor_relaxed
> # define atomic_fetch_xor_relaxed atomic_fetch_xor
> # define atomic_fetch_xor_acquire atomic_fetch_xor
> # define atomic_fetch_xor_release atomic_fetch_xor
> #else
> -# ifndef atomic_fetch_xor_acquire
> -# define atomic_fetch_xor_acquire(...) __atomic_op_acquire(atomic_fetch_xor, __VA_ARGS__)
> -# endif
> -# ifndef atomic_fetch_xor_release
> -# define atomic_fetch_xor_release(...) __atomic_op_release(atomic_fetch_xor, __VA_ARGS__)
> -# endif
> # ifndef atomic_fetch_xor
> # define atomic_fetch_xor(...) __atomic_op_fence(atomic_fetch_xor, __VA_ARGS__)
> +# define atomic_fetch_xor_acquire(...) __atomic_op_acquire(atomic_fetch_xor, __VA_ARGS__)
> +# define atomic_fetch_xor_release(...) __atomic_op_release(atomic_fetch_xor, __VA_ARGS__)
> # endif
> #endif
>
> -
> -/* atomic_xchg_relaxed() et al: */
> -
> #ifndef atomic_xchg_relaxed
> #define atomic_xchg_relaxed atomic_xchg
> #define atomic_xchg_acquire atomic_xchg
> #define atomic_xchg_release atomic_xchg
> #else
> -# ifndef atomic_xchg_acquire
> -# define atomic_xchg_acquire(...) __atomic_op_acquire(atomic_xchg, __VA_ARGS__)
> -# endif
> -# ifndef atomic_xchg_release
> -# define atomic_xchg_release(...) __atomic_op_release(atomic_xchg, __VA_ARGS__)
> -# endif
> # ifndef atomic_xchg
> # define atomic_xchg(...) __atomic_op_fence(atomic_xchg, __VA_ARGS__)
> +# define atomic_xchg_acquire(...) __atomic_op_acquire(atomic_xchg, __VA_ARGS__)
> +# define atomic_xchg_release(...) __atomic_op_release(atomic_xchg, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic_cmpxchg_relaxed() et al: */
> -
> #ifndef atomic_cmpxchg_relaxed
> # define atomic_cmpxchg_relaxed atomic_cmpxchg
> # define atomic_cmpxchg_acquire atomic_cmpxchg
> # define atomic_cmpxchg_release atomic_cmpxchg
> #else
> -# ifndef atomic_cmpxchg_acquire
> -# define atomic_cmpxchg_acquire(...) __atomic_op_acquire(atomic_cmpxchg, __VA_ARGS__)
> -# endif
> -# ifndef atomic_cmpxchg_release
> -# define atomic_cmpxchg_release(...) __atomic_op_release(atomic_cmpxchg, __VA_ARGS__)
> -# endif
> # ifndef atomic_cmpxchg
> # define atomic_cmpxchg(...) __atomic_op_fence(atomic_cmpxchg, __VA_ARGS__)
> +# define atomic_cmpxchg_acquire(...) __atomic_op_acquire(atomic_cmpxchg, __VA_ARGS__)
> +# define atomic_cmpxchg_release(...) __atomic_op_release(atomic_cmpxchg, __VA_ARGS__)
> # endif
> #endif
>
> @@ -362,57 +277,39 @@
> # define atomic_try_cmpxchg_release atomic_try_cmpxchg
> #endif
>
> -/* cmpxchg_relaxed() et al: */
> -
> #ifndef cmpxchg_relaxed
> # define cmpxchg_relaxed cmpxchg
> # define cmpxchg_acquire cmpxchg
> # define cmpxchg_release cmpxchg
> #else
> -# ifndef cmpxchg_acquire
> -# define cmpxchg_acquire(...) __atomic_op_acquire(cmpxchg, __VA_ARGS__)
> -# endif
> -# ifndef cmpxchg_release
> -# define cmpxchg_release(...) __atomic_op_release(cmpxchg, __VA_ARGS__)
> -# endif
> # ifndef cmpxchg
> # define cmpxchg(...) __atomic_op_fence(cmpxchg, __VA_ARGS__)
> +# define cmpxchg_acquire(...) __atomic_op_acquire(cmpxchg, __VA_ARGS__)
> +# define cmpxchg_release(...) __atomic_op_release(cmpxchg, __VA_ARGS__)
> # endif
> #endif
>
> -/* cmpxchg64_relaxed() et al: */
> -
> #ifndef cmpxchg64_relaxed
> # define cmpxchg64_relaxed cmpxchg64
> # define cmpxchg64_acquire cmpxchg64
> # define cmpxchg64_release cmpxchg64
> #else
> -# ifndef cmpxchg64_acquire
> -# define cmpxchg64_acquire(...) __atomic_op_acquire(cmpxchg64, __VA_ARGS__)
> -# endif
> -# ifndef cmpxchg64_release
> -# define cmpxchg64_release(...) __atomic_op_release(cmpxchg64, __VA_ARGS__)
> -# endif
> # ifndef cmpxchg64
> # define cmpxchg64(...) __atomic_op_fence(cmpxchg64, __VA_ARGS__)
> +# define cmpxchg64_acquire(...) __atomic_op_acquire(cmpxchg64, __VA_ARGS__)
> +# define cmpxchg64_release(...) __atomic_op_release(cmpxchg64, __VA_ARGS__)
> # endif
> #endif
>
> -/* xchg_relaxed() et al: */
> -
> #ifndef xchg_relaxed
> # define xchg_relaxed xchg
> # define xchg_acquire xchg
> # define xchg_release xchg
> #else
> -# ifndef xchg_acquire
> -# define xchg_acquire(...) __atomic_op_acquire(xchg, __VA_ARGS__)
> -# endif
> -# ifndef xchg_release
> -# define xchg_release(...) __atomic_op_release(xchg, __VA_ARGS__)
> -# endif
> # ifndef xchg
> # define xchg(...) __atomic_op_fence(xchg, __VA_ARGS__)
> +# define xchg_acquire(...) __atomic_op_acquire(xchg, __VA_ARGS__)
> +# define xchg_release(...) __atomic_op_release(xchg, __VA_ARGS__)
> # endif
> #endif
>
> @@ -569,98 +466,66 @@ static inline int atomic_dec_if_positive(atomic_t *v)
> # define atomic64_set_release(v, i) smp_store_release(&(v)->counter, (i))
> #endif
>
> -/* atomic64_add_return_relaxed() et al: */
> -
> #ifndef atomic64_add_return_relaxed
> # define atomic64_add_return_relaxed atomic64_add_return
> # define atomic64_add_return_acquire atomic64_add_return
> # define atomic64_add_return_release atomic64_add_return
> #else
> -# ifndef atomic64_add_return_acquire
> -# define atomic64_add_return_acquire(...) __atomic_op_acquire(atomic64_add_return, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_add_return_release
> -# define atomic64_add_return_release(...) __atomic_op_release(atomic64_add_return, __VA_ARGS__)
> -# endif
> # ifndef atomic64_add_return
> # define atomic64_add_return(...) __atomic_op_fence(atomic64_add_return, __VA_ARGS__)
> +# define atomic64_add_return_acquire(...) __atomic_op_acquire(atomic64_add_return, __VA_ARGS__)
> +# define atomic64_add_return_release(...) __atomic_op_release(atomic64_add_return, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_inc_return_relaxed() et al: */
> -
> #ifndef atomic64_inc_return_relaxed
> # define atomic64_inc_return_relaxed atomic64_inc_return
> # define atomic64_inc_return_acquire atomic64_inc_return
> # define atomic64_inc_return_release atomic64_inc_return
> #else
> -# ifndef atomic64_inc_return_acquire
> -# define atomic64_inc_return_acquire(...) __atomic_op_acquire(atomic64_inc_return, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_inc_return_release
> -# define atomic64_inc_return_release(...) __atomic_op_release(atomic64_inc_return, __VA_ARGS__)
> -# endif
> # ifndef atomic64_inc_return
> # define atomic64_inc_return(...) __atomic_op_fence(atomic64_inc_return, __VA_ARGS__)
> +# define atomic64_inc_return_acquire(...) __atomic_op_acquire(atomic64_inc_return, __VA_ARGS__)
> +# define atomic64_inc_return_release(...) __atomic_op_release(atomic64_inc_return, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_sub_return_relaxed() et al: */
> -
> #ifndef atomic64_sub_return_relaxed
> # define atomic64_sub_return_relaxed atomic64_sub_return
> # define atomic64_sub_return_acquire atomic64_sub_return
> # define atomic64_sub_return_release atomic64_sub_return
> #else
> -# ifndef atomic64_sub_return_acquire
> -# define atomic64_sub_return_acquire(...) __atomic_op_acquire(atomic64_sub_return, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_sub_return_release
> -# define atomic64_sub_return_release(...) __atomic_op_release(atomic64_sub_return, __VA_ARGS__)
> -# endif
> # ifndef atomic64_sub_return
> # define atomic64_sub_return(...) __atomic_op_fence(atomic64_sub_return, __VA_ARGS__)
> +# define atomic64_sub_return_acquire(...) __atomic_op_acquire(atomic64_sub_return, __VA_ARGS__)
> +# define atomic64_sub_return_release(...) __atomic_op_release(atomic64_sub_return, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_dec_return_relaxed() et al: */
> -
> #ifndef atomic64_dec_return_relaxed
> # define atomic64_dec_return_relaxed atomic64_dec_return
> # define atomic64_dec_return_acquire atomic64_dec_return
> # define atomic64_dec_return_release atomic64_dec_return
> #else
> -# ifndef atomic64_dec_return_acquire
> -# define atomic64_dec_return_acquire(...) __atomic_op_acquire(atomic64_dec_return, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_dec_return_release
> -# define atomic64_dec_return_release(...) __atomic_op_release(atomic64_dec_return, __VA_ARGS__)
> -# endif
> # ifndef atomic64_dec_return
> # define atomic64_dec_return(...) __atomic_op_fence(atomic64_dec_return, __VA_ARGS__)
> +# define atomic64_dec_return_acquire(...) __atomic_op_acquire(atomic64_dec_return, __VA_ARGS__)
> +# define atomic64_dec_return_release(...) __atomic_op_release(atomic64_dec_return, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_fetch_add_relaxed() et al: */
> -
> #ifndef atomic64_fetch_add_relaxed
> # define atomic64_fetch_add_relaxed atomic64_fetch_add
> # define atomic64_fetch_add_acquire atomic64_fetch_add
> # define atomic64_fetch_add_release atomic64_fetch_add
> #else
> -# ifndef atomic64_fetch_add_acquire
> -# define atomic64_fetch_add_acquire(...) __atomic_op_acquire(atomic64_fetch_add, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_fetch_add_release
> -# define atomic64_fetch_add_release(...) __atomic_op_release(atomic64_fetch_add, __VA_ARGS__)
> -# endif
> # ifndef atomic64_fetch_add
> # define atomic64_fetch_add(...) __atomic_op_fence(atomic64_fetch_add, __VA_ARGS__)
> +# define atomic64_fetch_add_acquire(...) __atomic_op_acquire(atomic64_fetch_add, __VA_ARGS__)
> +# define atomic64_fetch_add_release(...) __atomic_op_release(atomic64_fetch_add, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_fetch_inc_relaxed() et al: */
> -
> #ifndef atomic64_fetch_inc_relaxed
> # ifndef atomic64_fetch_inc
> # define atomic64_fetch_inc(v) atomic64_fetch_add(1, (v))
> @@ -673,37 +538,25 @@ static inline int atomic_dec_if_positive(atomic_t *v)
> # define atomic64_fetch_inc_release atomic64_fetch_inc
> # endif
> #else
> -# ifndef atomic64_fetch_inc_acquire
> -# define atomic64_fetch_inc_acquire(...) __atomic_op_acquire(atomic64_fetch_inc, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_fetch_inc_release
> -# define atomic64_fetch_inc_release(...) __atomic_op_release(atomic64_fetch_inc, __VA_ARGS__)
> -# endif
> # ifndef atomic64_fetch_inc
> # define atomic64_fetch_inc(...) __atomic_op_fence(atomic64_fetch_inc, __VA_ARGS__)
> +# define atomic64_fetch_inc_acquire(...) __atomic_op_acquire(atomic64_fetch_inc, __VA_ARGS__)
> +# define atomic64_fetch_inc_release(...) __atomic_op_release(atomic64_fetch_inc, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_fetch_sub_relaxed() et al: */
> -
> #ifndef atomic64_fetch_sub_relaxed
> # define atomic64_fetch_sub_relaxed atomic64_fetch_sub
> # define atomic64_fetch_sub_acquire atomic64_fetch_sub
> # define atomic64_fetch_sub_release atomic64_fetch_sub
> #else
> -# ifndef atomic64_fetch_sub_acquire
> -# define atomic64_fetch_sub_acquire(...) __atomic_op_acquire(atomic64_fetch_sub, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_fetch_sub_release
> -# define atomic64_fetch_sub_release(...) __atomic_op_release(atomic64_fetch_sub, __VA_ARGS__)
> -# endif
> # ifndef atomic64_fetch_sub
> # define atomic64_fetch_sub(...) __atomic_op_fence(atomic64_fetch_sub, __VA_ARGS__)
> +# define atomic64_fetch_sub_acquire(...) __atomic_op_acquire(atomic64_fetch_sub, __VA_ARGS__)
> +# define atomic64_fetch_sub_release(...) __atomic_op_release(atomic64_fetch_sub, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_fetch_dec_relaxed() et al: */
> -
> #ifndef atomic64_fetch_dec_relaxed
> # ifndef atomic64_fetch_dec
> # define atomic64_fetch_dec(v) atomic64_fetch_sub(1, (v))
> @@ -716,127 +569,86 @@ static inline int atomic_dec_if_positive(atomic_t *v)
> # define atomic64_fetch_dec_release atomic64_fetch_dec
> # endif
> #else
> -# ifndef atomic64_fetch_dec_acquire
> -# define atomic64_fetch_dec_acquire(...) __atomic_op_acquire(atomic64_fetch_dec, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_fetch_dec_release
> -# define atomic64_fetch_dec_release(...) __atomic_op_release(atomic64_fetch_dec, __VA_ARGS__)
> -# endif
> # ifndef atomic64_fetch_dec
> # define atomic64_fetch_dec(...) __atomic_op_fence(atomic64_fetch_dec, __VA_ARGS__)
> +# define atomic64_fetch_dec_acquire(...) __atomic_op_acquire(atomic64_fetch_dec, __VA_ARGS__)
> +# define atomic64_fetch_dec_release(...) __atomic_op_release(atomic64_fetch_dec, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_fetch_or_relaxed() et al: */
> -
> #ifndef atomic64_fetch_or_relaxed
> # define atomic64_fetch_or_relaxed atomic64_fetch_or
> # define atomic64_fetch_or_acquire atomic64_fetch_or
> # define atomic64_fetch_or_release atomic64_fetch_or
> #else
> -# ifndef atomic64_fetch_or_acquire
> -# define atomic64_fetch_or_acquire(...) __atomic_op_acquire(atomic64_fetch_or, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_fetch_or_release
> -# define atomic64_fetch_or_release(...) __atomic_op_release(atomic64_fetch_or, __VA_ARGS__)
> -# endif
> # ifndef atomic64_fetch_or
> # define atomic64_fetch_or(...) __atomic_op_fence(atomic64_fetch_or, __VA_ARGS__)
> +# define atomic64_fetch_or_acquire(...) __atomic_op_acquire(atomic64_fetch_or, __VA_ARGS__)
> +# define atomic64_fetch_or_release(...) __atomic_op_release(atomic64_fetch_or, __VA_ARGS__)
> # endif
> #endif
>
> -
> -/* atomic64_fetch_and_relaxed() et al: */
> -
> #ifndef atomic64_fetch_and_relaxed
> # define atomic64_fetch_and_relaxed atomic64_fetch_and
> # define atomic64_fetch_and_acquire atomic64_fetch_and
> # define atomic64_fetch_and_release atomic64_fetch_and
> #else
> -# ifndef atomic64_fetch_and_acquire
> -# define atomic64_fetch_and_acquire(...) __atomic_op_acquire(atomic64_fetch_and, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_fetch_and_release
> -# define atomic64_fetch_and_release(...) __atomic_op_release(atomic64_fetch_and, __VA_ARGS__)
> -# endif
> # ifndef atomic64_fetch_and
> # define atomic64_fetch_and(...) __atomic_op_fence(atomic64_fetch_and, __VA_ARGS__)
> +# define atomic64_fetch_and_acquire(...) __atomic_op_acquire(atomic64_fetch_and, __VA_ARGS__)
> +# define atomic64_fetch_and_release(...) __atomic_op_release(atomic64_fetch_and, __VA_ARGS__)
> # endif
> #endif
>
> #ifdef atomic64_andnot
>
> -/* atomic64_fetch_andnot_relaxed() et al: */
> -
> #ifndef atomic64_fetch_andnot_relaxed
> # define atomic64_fetch_andnot_relaxed atomic64_fetch_andnot
> # define atomic64_fetch_andnot_acquire atomic64_fetch_andnot
> # define atomic64_fetch_andnot_release atomic64_fetch_andnot
> #else
> -# ifndef atomic64_fetch_andnot_acquire
> -# define atomic64_fetch_andnot_acquire(...) __atomic_op_acquire(atomic64_fetch_andnot, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_fetch_andnot_release
> -# define atomic64_fetch_andnot_release(...) __atomic_op_release(atomic64_fetch_andnot, __VA_ARGS__)
> -# endif
> # ifndef atomic64_fetch_andnot
> # define atomic64_fetch_andnot(...) __atomic_op_fence(atomic64_fetch_andnot, __VA_ARGS__)
> +# define atomic64_fetch_andnot_acquire(...) __atomic_op_acquire(atomic64_fetch_andnot, __VA_ARGS__)
> +# define atomic64_fetch_andnot_release(...) __atomic_op_release(atomic64_fetch_andnot, __VA_ARGS__)
> # endif
> #endif
>
> #endif /* atomic64_andnot */
>
> -/* atomic64_fetch_xor_relaxed() et al: */
> -
> #ifndef atomic64_fetch_xor_relaxed
> # define atomic64_fetch_xor_relaxed atomic64_fetch_xor
> # define atomic64_fetch_xor_acquire atomic64_fetch_xor
> # define atomic64_fetch_xor_release atomic64_fetch_xor
> #else
> -# ifndef atomic64_fetch_xor_acquire
> -# define atomic64_fetch_xor_acquire(...) __atomic_op_acquire(atomic64_fetch_xor, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_fetch_xor_release
> -# define atomic64_fetch_xor_release(...) __atomic_op_release(atomic64_fetch_xor, __VA_ARGS__)
> -# endif
> # ifndef atomic64_fetch_xor
> # define atomic64_fetch_xor(...) __atomic_op_fence(atomic64_fetch_xor, __VA_ARGS__)
> +# define atomic64_fetch_xor_acquire(...) __atomic_op_acquire(atomic64_fetch_xor, __VA_ARGS__)
> +# define atomic64_fetch_xor_release(...) __atomic_op_release(atomic64_fetch_xor, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_xchg_relaxed() et al: */
> -
> #ifndef atomic64_xchg_relaxed
> # define atomic64_xchg_relaxed atomic64_xchg
> # define atomic64_xchg_acquire atomic64_xchg
> # define atomic64_xchg_release atomic64_xchg
> #else
> -# ifndef atomic64_xchg_acquire
> -# define atomic64_xchg_acquire(...) __atomic_op_acquire(atomic64_xchg, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_xchg_release
> -# define atomic64_xchg_release(...) __atomic_op_release(atomic64_xchg, __VA_ARGS__)
> -# endif
> # ifndef atomic64_xchg
> # define atomic64_xchg(...) __atomic_op_fence(atomic64_xchg, __VA_ARGS__)
> +# define atomic64_xchg_acquire(...) __atomic_op_acquire(atomic64_xchg, __VA_ARGS__)
> +# define atomic64_xchg_release(...) __atomic_op_release(atomic64_xchg, __VA_ARGS__)
> # endif
> #endif
>
> -/* atomic64_cmpxchg_relaxed() et al: */
> -
> #ifndef atomic64_cmpxchg_relaxed
> # define atomic64_cmpxchg_relaxed atomic64_cmpxchg
> # define atomic64_cmpxchg_acquire atomic64_cmpxchg
> # define atomic64_cmpxchg_release atomic64_cmpxchg
> #else
> -# ifndef atomic64_cmpxchg_acquire
> -# define atomic64_cmpxchg_acquire(...) __atomic_op_acquire(atomic64_cmpxchg, __VA_ARGS__)
> -# endif
> -# ifndef atomic64_cmpxchg_release
> -# define atomic64_cmpxchg_release(...) __atomic_op_release(atomic64_cmpxchg, __VA_ARGS__)
> -# endif
> # ifndef atomic64_cmpxchg
> # define atomic64_cmpxchg(...) __atomic_op_fence(atomic64_cmpxchg, __VA_ARGS__)
> +# define atomic64_cmpxchg_acquire(...) __atomic_op_acquire(atomic64_cmpxchg, __VA_ARGS__)
> +# define atomic64_cmpxchg_release(...) __atomic_op_release(atomic64_cmpxchg, __VA_ARGS__)
> # endif
> #endif
>
^ permalink raw reply
* [PATCH] locking/atomics: Combine the atomic_andnot() and atomic64_andnot() API definitions
From: Andrea Parri @ 2018-05-06 14:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180505085445.cmdnqh6xpnpfoqzb@gmail.com>
Hi Ingo,
> From f5efafa83af8c46b9e81b010b46caeeadb450179 Mon Sep 17 00:00:00 2001
> From: Ingo Molnar <mingo@kernel.org>
> Date: Sat, 5 May 2018 10:46:41 +0200
> Subject: [PATCH] locking/atomics: Combine the atomic_andnot() and atomic64_andnot() API definitions
>
> The atomic_andnot() and atomic64_andnot() are defined in 4 separate groups
> spred out in the atomic.h header:
>
> #ifdef atomic_andnot
> ...
> #endif /* atomic_andnot */
> ...
> #ifndef atomic_andnot
> ...
> #endif
> ...
> #ifdef atomic64_andnot
> ...
> #endif /* atomic64_andnot */
> ...
> #ifndef atomic64_andnot
> ...
> #endif
>
> Combine them into unify them into two groups:
Nit: "Combine them into unify them into"
Andrea
>
> #ifdef atomic_andnot
> #else
> #endif
>
> ...
>
> #ifdef atomic64_andnot
> #else
> #endif
>
> So that one API group is defined in a single place within the header.
>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Linus Torvalds <torvalds@linux-foundation.org>
> Cc: Andrew Morton <akpm@linux-foundation.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: linux-kernel at vger.kernel.org
> Signed-off-by: Ingo Molnar <mingo@kernel.org>
> ---
> include/linux/atomic.h | 72 +++++++++++++++++++++++++-------------------------
> 1 file changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/include/linux/atomic.h b/include/linux/atomic.h
> index 352ecc72d7f5..1176cf7c6f03 100644
> --- a/include/linux/atomic.h
> +++ b/include/linux/atomic.h
> @@ -205,22 +205,6 @@
> # endif
> #endif
>
> -#ifdef atomic_andnot
> -
> -#ifndef atomic_fetch_andnot_relaxed
> -# define atomic_fetch_andnot_relaxed atomic_fetch_andnot
> -# define atomic_fetch_andnot_acquire atomic_fetch_andnot
> -# define atomic_fetch_andnot_release atomic_fetch_andnot
> -#else
> -# ifndef atomic_fetch_andnot
> -# define atomic_fetch_andnot(...) __atomic_op_fence(atomic_fetch_andnot, __VA_ARGS__)
> -# define atomic_fetch_andnot_acquire(...) __atomic_op_acquire(atomic_fetch_andnot, __VA_ARGS__)
> -# define atomic_fetch_andnot_release(...) __atomic_op_release(atomic_fetch_andnot, __VA_ARGS__)
> -# endif
> -#endif
> -
> -#endif /* atomic_andnot */
> -
> #ifndef atomic_fetch_xor_relaxed
> # define atomic_fetch_xor_relaxed atomic_fetch_xor
> # define atomic_fetch_xor_acquire atomic_fetch_xor
> @@ -338,7 +322,22 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
> # define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
> #endif
>
> -#ifndef atomic_andnot
> +#ifdef atomic_andnot
> +
> +#ifndef atomic_fetch_andnot_relaxed
> +# define atomic_fetch_andnot_relaxed atomic_fetch_andnot
> +# define atomic_fetch_andnot_acquire atomic_fetch_andnot
> +# define atomic_fetch_andnot_release atomic_fetch_andnot
> +#else
> +# ifndef atomic_fetch_andnot
> +# define atomic_fetch_andnot(...) __atomic_op_fence(atomic_fetch_andnot, __VA_ARGS__)
> +# define atomic_fetch_andnot_acquire(...) __atomic_op_acquire(atomic_fetch_andnot, __VA_ARGS__)
> +# define atomic_fetch_andnot_release(...) __atomic_op_release(atomic_fetch_andnot, __VA_ARGS__)
> +# endif
> +#endif
> +
> +#else /* !atomic_andnot: */
> +
> static inline void atomic_andnot(int i, atomic_t *v)
> {
> atomic_and(~i, v);
> @@ -363,7 +362,8 @@ static inline int atomic_fetch_andnot_release(int i, atomic_t *v)
> {
> return atomic_fetch_and_release(~i, v);
> }
> -#endif
> +
> +#endif /* !atomic_andnot */
>
> /**
> * atomic_inc_not_zero_hint - increment if not null
> @@ -600,22 +600,6 @@ static inline int atomic_dec_if_positive(atomic_t *v)
> # endif
> #endif
>
> -#ifdef atomic64_andnot
> -
> -#ifndef atomic64_fetch_andnot_relaxed
> -# define atomic64_fetch_andnot_relaxed atomic64_fetch_andnot
> -# define atomic64_fetch_andnot_acquire atomic64_fetch_andnot
> -# define atomic64_fetch_andnot_release atomic64_fetch_andnot
> -#else
> -# ifndef atomic64_fetch_andnot
> -# define atomic64_fetch_andnot(...) __atomic_op_fence(atomic64_fetch_andnot, __VA_ARGS__)
> -# define atomic64_fetch_andnot_acquire(...) __atomic_op_acquire(atomic64_fetch_andnot, __VA_ARGS__)
> -# define atomic64_fetch_andnot_release(...) __atomic_op_release(atomic64_fetch_andnot, __VA_ARGS__)
> -# endif
> -#endif
> -
> -#endif /* atomic64_andnot */
> -
> #ifndef atomic64_fetch_xor_relaxed
> # define atomic64_fetch_xor_relaxed atomic64_fetch_xor
> # define atomic64_fetch_xor_acquire atomic64_fetch_xor
> @@ -672,7 +656,22 @@ static inline int atomic_dec_if_positive(atomic_t *v)
> # define atomic64_try_cmpxchg_release atomic64_try_cmpxchg
> #endif
>
> -#ifndef atomic64_andnot
> +#ifdef atomic64_andnot
> +
> +#ifndef atomic64_fetch_andnot_relaxed
> +# define atomic64_fetch_andnot_relaxed atomic64_fetch_andnot
> +# define atomic64_fetch_andnot_acquire atomic64_fetch_andnot
> +# define atomic64_fetch_andnot_release atomic64_fetch_andnot
> +#else
> +# ifndef atomic64_fetch_andnot
> +# define atomic64_fetch_andnot(...) __atomic_op_fence(atomic64_fetch_andnot, __VA_ARGS__)
> +# define atomic64_fetch_andnot_acquire(...) __atomic_op_acquire(atomic64_fetch_andnot, __VA_ARGS__)
> +# define atomic64_fetch_andnot_release(...) __atomic_op_release(atomic64_fetch_andnot, __VA_ARGS__)
> +# endif
> +#endif
> +
> +#else /* !atomic64_andnot: */
> +
> static inline void atomic64_andnot(long long i, atomic64_t *v)
> {
> atomic64_and(~i, v);
> @@ -697,7 +696,8 @@ static inline long long atomic64_fetch_andnot_release(long long i, atomic64_t *v
> {
> return atomic64_fetch_and_release(~i, v);
> }
> -#endif
> +
> +#endif /* !atomic64_andnot */
>
> #define atomic64_cond_read_relaxed(v, c) smp_cond_load_relaxed(&(v)->counter, (c))
> #define atomic64_cond_read_acquire(v, c) smp_cond_load_acquire(&(v)->counter, (c))
^ permalink raw reply
* [PATCH fixes-for-current] arm64: dts: exynos: Fix interrupt type for I2S1 device on Exynos5433
From: Krzysztof Kozlowski @ 2018-05-06 14:55 UTC (permalink / raw)
To: linux-arm-kernel
From: Marek Szyprowski <m.szyprowski@samsung.com>
All interrupts from SoC internal modules are level triggered, so fix
incorrect trigger type for I2S1 device on Exynos5433 SoCs.
This fixes following kernel warning:
WARNING: CPU: 2 PID: 1 at drivers/irqchip/irq-gic.c:1016 gic_irq_domain_translate+0xb0/0xb8
Modules linked in:
CPU: 2 PID: 1 Comm: swapper/0 Not tainted 4.16.0-rc7-next-20180329 #646
Hardware name: Samsung TM2 board (DT)
pstate: 20000005 (nzCv daif -PAN -UAO)
pc : gic_irq_domain_translate+0xb0/0xb8
lr : irq_create_fwspec_mapping+0x64/0x328
sp : ffff0000098b38d0
...
Call trace:
gic_irq_domain_translate+0xb0/0xb8
irq_create_of_mapping+0x78/0xa0
of_irq_get+0x6c/0xa0
of_irq_to_resource+0x38/0x108
of_irq_to_resource_table+0x50/0x78
of_device_alloc+0x118/0x1b8
of_platform_device_create_pdata+0x54/0xe0
of_platform_bus_create+0x118/0x340
of_platform_bus_create+0x17c/0x340
of_platform_populate+0x74/0xd8
of_platform_default_populate_init+0xb0/0xcc
do_one_initcall+0x50/0x158
kernel_init_freeable+0x184/0x22c
kernel_init+0x10/0x108
ret_from_fork+0x10/0x18
---[ end trace 6decb2b3078d73f0 ]---
Fixes: d8d579c316e8 ("ARM: dts: exynos: Add I2S1 device node to exynos5433")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Hi Arnd and Olof,
That's one fix for current release cycle (issue introduced in merge window).
Best regards,
Krzysztof
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index c0231d077fa6..1ad8677f6a0a 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1317,7 +1317,7 @@
reg = <0x14d60000 0x100>;
dmas = <&pdma0 31 &pdma0 30>;
dma-names = "tx", "rx";
- interrupts = <GIC_SPI 435 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_peric CLK_PCLK_I2S1>,
<&cmu_peric CLK_PCLK_I2S1>,
<&cmu_peric CLK_SCLK_I2S1>;
--
2.14.1
^ permalink raw reply related
* [PATCH] locking/atomics: Simplify the op definitions in atomic.h some more
From: Ingo Molnar @ 2018-05-06 14:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180506141249.GA28723@andrea>
* Andrea Parri <andrea.parri@amarulasolutions.com> wrote:
> Hi Ingo,
>
> > From 5affbf7e91901143f84f1b2ca64f4afe70e210fd Mon Sep 17 00:00:00 2001
> > From: Ingo Molnar <mingo@kernel.org>
> > Date: Sat, 5 May 2018 10:23:23 +0200
> > Subject: [PATCH] locking/atomics: Simplify the op definitions in atomic.h some more
> >
> > Before:
> >
> > #ifndef atomic_fetch_dec_relaxed
> > # ifndef atomic_fetch_dec
> > # define atomic_fetch_dec(v) atomic_fetch_sub(1, (v))
> > # define atomic_fetch_dec_relaxed(v) atomic_fetch_sub_relaxed(1, (v))
> > # define atomic_fetch_dec_acquire(v) atomic_fetch_sub_acquire(1, (v))
> > # define atomic_fetch_dec_release(v) atomic_fetch_sub_release(1, (v))
> > # else
> > # define atomic_fetch_dec_relaxed atomic_fetch_dec
> > # define atomic_fetch_dec_acquire atomic_fetch_dec
> > # define atomic_fetch_dec_release atomic_fetch_dec
> > # endif
> > #else
> > # ifndef atomic_fetch_dec_acquire
> > # define atomic_fetch_dec_acquire(...) __atomic_op_acquire(atomic_fetch_dec, __VA_ARGS__)
> > # endif
> > # ifndef atomic_fetch_dec_release
> > # define atomic_fetch_dec_release(...) __atomic_op_release(atomic_fetch_dec, __VA_ARGS__)
> > # endif
> > # ifndef atomic_fetch_dec
> > # define atomic_fetch_dec(...) __atomic_op_fence(atomic_fetch_dec, __VA_ARGS__)
> > # endif
> > #endif
> >
> > After:
> >
> > #ifndef atomic_fetch_dec_relaxed
> > # ifndef atomic_fetch_dec
> > # define atomic_fetch_dec(v) atomic_fetch_sub(1, (v))
> > # define atomic_fetch_dec_relaxed(v) atomic_fetch_sub_relaxed(1, (v))
> > # define atomic_fetch_dec_acquire(v) atomic_fetch_sub_acquire(1, (v))
> > # define atomic_fetch_dec_release(v) atomic_fetch_sub_release(1, (v))
> > # else
> > # define atomic_fetch_dec_relaxed atomic_fetch_dec
> > # define atomic_fetch_dec_acquire atomic_fetch_dec
> > # define atomic_fetch_dec_release atomic_fetch_dec
> > # endif
> > #else
> > # ifndef atomic_fetch_dec
> > # define atomic_fetch_dec(...) __atomic_op_fence(atomic_fetch_dec, __VA_ARGS__)
> > # define atomic_fetch_dec_acquire(...) __atomic_op_acquire(atomic_fetch_dec, __VA_ARGS__)
> > # define atomic_fetch_dec_release(...) __atomic_op_release(atomic_fetch_dec, __VA_ARGS__)
> > # endif
> > #endif
> >
> > The idea is that because we already group these APIs by certain defines
> > such as atomic_fetch_dec_relaxed and atomic_fetch_dec in the primary
> > branches - we can do the same in the secondary branch as well.
> >
> > ( Also remove some unnecessarily duplicate comments, as the API
> > group defines are now pretty much self-documenting. )
> >
> > No change in functionality.
> >
> > Cc: Peter Zijlstra <peterz@infradead.org>
> > Cc: Linus Torvalds <torvalds@linux-foundation.org>
> > Cc: Andrew Morton <akpm@linux-foundation.org>
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
> > Cc: Will Deacon <will.deacon@arm.com>
> > Cc: linux-kernel at vger.kernel.org
> > Signed-off-by: Ingo Molnar <mingo@kernel.org>
>
> This breaks compilation on RISC-V. (For some of its atomics, the arch
> currently defines the _relaxed and the full variants and it relies on
> the generic definitions for the _acquire and the _release variants.)
I don't have cross-compilation for RISC-V, which is a relatively new arch.
(Is there any RISC-V set of cross-compilation tools on kernel.org somewhere?)
Could you please send a patch that defines those variants against Linus's tree,
like the PowerPC patch that does something similar:
0476a632cb3a: locking/atomics/powerpc: Move cmpxchg helpers to asm/cmpxchg.h and define the full set of cmpxchg APIs
?
... and I'll integrate it into the proper place to make it all bisectable, etc.
Thanks,
Ingo
^ permalink raw reply
* [PATCH V7 1/7] ARM: dts: imx6sx-sabreauto: add PMIC support
From: Fabio Estevam @ 2018-05-06 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525588093-29994-1-git-send-email-Anson.Huang@nxp.com>
On Sun, May 6, 2018 at 3:28 AM, Anson Huang <Anson.Huang@nxp.com> wrote:
> Add pfuze100 support on i.MX6SX Sabre Auto board.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH V7 2/7] ARM: dts: imx6sx-sabreauto: add max7322 IO expander support
From: Fabio Estevam @ 2018-05-06 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525588093-29994-2-git-send-email-Anson.Huang@nxp.com>
On Sun, May 6, 2018 at 3:28 AM, Anson Huang <Anson.Huang@nxp.com> wrote:
> Add MAX7322 IO expander support.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH V7 3/7] ARM: dts: imx6sx-sabreauto: add IO expander max7310 support
From: Fabio Estevam @ 2018-05-06 15:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525588093-29994-3-git-send-email-Anson.Huang@nxp.com>
On Sun, May 6, 2018 at 3:28 AM, Anson Huang <Anson.Huang@nxp.com> wrote:
> i.MX6SX Sabre Auto board has two max7310 IO expander on I2C3 bus, add
> support for them.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH V7 4/7] ARM: dts: imx6sx-sabreauto: add fec support
From: Fabio Estevam @ 2018-05-06 15:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525588093-29994-4-git-send-email-Anson.Huang@nxp.com>
On Sun, May 6, 2018 at 3:28 AM, Anson Huang <Anson.Huang@nxp.com> wrote:
> Add FEC support on i.MX6SX Sabre Auto board.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH V7 5/7] ARM: dts: imx6sx-sabreauto: add wdog external reset
From: Fabio Estevam @ 2018-05-06 15:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525588093-29994-5-git-send-email-Anson.Huang@nxp.com>
On Sun, May 6, 2018 at 3:28 AM, Anson Huang <Anson.Huang@nxp.com> wrote:
> i.MX6SX Sabre Auto board has GPIO1_IO13 pin can be
> MUXed as WDOG output to reset PMIC, add this function
> support.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH V7 6/7] ARM: dts: imx6sx-sabreauto: add debug LED support
From: Fabio Estevam @ 2018-05-06 15:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525588093-29994-6-git-send-email-Anson.Huang@nxp.com>
On Sun, May 6, 2018 at 3:28 AM, Anson Huang <Anson.Huang@nxp.com> wrote:
> There is a debug LED(D11) connected to GPIO1_IO24,
> add support for it.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH V7 7/7] ARM: dts: imx6sx-sabreauto: add egalax touch screen support
From: Fabio Estevam @ 2018-05-06 15:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525588093-29994-7-git-send-email-Anson.Huang@nxp.com>
On Sun, May 6, 2018 at 3:28 AM, Anson Huang <Anson.Huang@nxp.com> wrote:
> Add egalax touch screen support on i2c2 bus.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
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