* [PATCH v6 14/15] KVM: arm64: Fold redundant exit code checks out of fixup_guest_exit()
From: Dave Martin @ 2018-05-08 16:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525797900-5548-1-git-send-email-Dave.Martin@arm.com>
The entire tail of fixup_guest_exit() is contained in if statements
of the form if (x && *exit_code == ARM_EXCEPTION_TRAP). As a result,
we can check just once and bail out of the function early, allowing
the remaining if conditions to be simplified.
The only awkward case is where *exit_code is changed to
ARM_EXCEPTION_EL1_SERROR in the case of an illegal GICv2 CPU
interface access: in that case, the GICv3 trap handling code is
skipped using a goto. This avoids pointlessly evaluating the
static branch check for the GICv3 case, even though we can't have
vgic_v2_cpuif_trap and vgic_v3_cpuif_trap true simultaneously
unless we have a GICv3 and GICv2 on the host: that sounds stupid,
but I haven't satisfied myself that it can't happen.
No functional change.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
---
Changes since v5:
Requested by Marc Zyngier:
* Move "goto exit" to the end of the data abort handling code under
gicv2 cpuif trap handling, since the gicv3-specific handling is only
for sysreg traps.
---
arch/arm64/kvm/hyp/switch.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 21e5543..5be472d 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -386,11 +386,13 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
* same PC once the SError has been injected, and replay the
* trapping instruction.
*/
- if (*exit_code == ARM_EXCEPTION_TRAP && !__populate_fault_info(vcpu))
+ if (*exit_code != ARM_EXCEPTION_TRAP)
+ goto exit;
+
+ if (!__populate_fault_info(vcpu))
return true;
- if (static_branch_unlikely(&vgic_v2_cpuif_trap) &&
- *exit_code == ARM_EXCEPTION_TRAP) {
+ if (static_branch_unlikely(&vgic_v2_cpuif_trap)) {
bool valid;
valid = kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_DABT_LOW &&
@@ -416,11 +418,12 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;
*exit_code = ARM_EXCEPTION_EL1_SERROR;
}
+
+ goto exit;
}
}
if (static_branch_unlikely(&vgic_v3_cpuif_trap) &&
- *exit_code == ARM_EXCEPTION_TRAP &&
(kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_SYS64 ||
kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_CP15_32)) {
int ret = __vgic_v3_perform_cpuif_access(vcpu);
@@ -429,6 +432,7 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
return true;
}
+exit:
/* Return to the host kernel and handle the exit */
return false;
}
--
2.1.4
^ permalink raw reply related
* [PATCH v6 15/15] KVM: arm64: Invoke FPSIMD context switch trap from C
From: Dave Martin @ 2018-05-08 16:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525797900-5548-1-git-send-email-Dave.Martin@arm.com>
The conversion of the FPSIMD context switch trap code to C has added
some overhead to calling it, due to the need to save registers that
the procedure call standard defines as caller-saved.
So, perhaps it is no longer worth invoking this trap handler quite
so early.
Instead, we can invoke it from fixup_guest_exit(), with little
likelihood of increasing the overhead much further.
As a convenience, this patch gives __hyp_switch_fpsimd() the same
return semantics fixup_guest_exit(). For now there is no
possibility of a spurious FPSIMD trap, so the function always
returns true, but this allows it to be tail-called with a single
return statement.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm64/kvm/hyp/entry.S | 30 ------------------------------
arch/arm64/kvm/hyp/hyp-entry.S | 19 -------------------
arch/arm64/kvm/hyp/switch.c | 15 +++++++++++++--
3 files changed, 13 insertions(+), 51 deletions(-)
diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S
index 40f349b..fad1e16 100644
--- a/arch/arm64/kvm/hyp/entry.S
+++ b/arch/arm64/kvm/hyp/entry.S
@@ -166,33 +166,3 @@ abort_guest_exit_end:
orr x0, x0, x5
1: ret
ENDPROC(__guest_exit)
-
-ENTRY(__fpsimd_guest_restore)
- // x0: esr
- // x1: vcpu
- // x2-x29,lr: vcpu regs
- // vcpu x0-x1 on the stack
- stp x2, x3, [sp, #-144]!
- stp x4, x5, [sp, #16]
- stp x6, x7, [sp, #32]
- stp x8, x9, [sp, #48]
- stp x10, x11, [sp, #64]
- stp x12, x13, [sp, #80]
- stp x14, x15, [sp, #96]
- stp x16, x17, [sp, #112]
- stp x18, lr, [sp, #128]
-
- bl __hyp_switch_fpsimd
-
- ldp x4, x5, [sp, #16]
- ldp x6, x7, [sp, #32]
- ldp x8, x9, [sp, #48]
- ldp x10, x11, [sp, #64]
- ldp x12, x13, [sp, #80]
- ldp x14, x15, [sp, #96]
- ldp x16, x17, [sp, #112]
- ldp x18, lr, [sp, #128]
- ldp x0, x1, [sp, #144]
- ldp x2, x3, [sp], #160
- eret
-ENDPROC(__fpsimd_guest_restore)
diff --git a/arch/arm64/kvm/hyp/hyp-entry.S b/arch/arm64/kvm/hyp/hyp-entry.S
index bffece2..753b9d2 100644
--- a/arch/arm64/kvm/hyp/hyp-entry.S
+++ b/arch/arm64/kvm/hyp/hyp-entry.S
@@ -113,25 +113,6 @@ el1_hvc_guest:
el1_trap:
get_vcpu_ptr x1, x0
-
- mrs x0, esr_el2
- lsr x0, x0, #ESR_ELx_EC_SHIFT
- /*
- * x0: ESR_EC
- * x1: vcpu pointer
- */
-
- /*
- * We trap the first access to the FP/SIMD to save the host context
- * and restore the guest context lazily.
- * If FP/SIMD is not implemented, handle the trap and inject an
- * undefined instruction exception to the guest.
- */
-alternative_if_not ARM64_HAS_NO_FPSIMD
- cmp x0, #ESR_ELx_EC_FP_ASIMD
- b.eq __fpsimd_guest_restore
-alternative_else_nop_endif
-
mov x0, #ARM_EXCEPTION_TRAP
b __guest_exit
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 5be472d..6eeda72 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -327,8 +327,7 @@ static bool __hyp_text __skip_instr(struct kvm_vcpu *vcpu)
}
}
-void __hyp_text __hyp_switch_fpsimd(u64 esr __always_unused,
- struct kvm_vcpu *vcpu)
+static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu)
{
struct user_fpsimd_state *host_fpsimd = vcpu->arch.host_fpsimd_state;
@@ -368,6 +367,8 @@ void __hyp_text __hyp_switch_fpsimd(u64 esr __always_unused,
fpexc32_el2);
vcpu->arch.flags |= KVM_ARM64_FP_ENABLED;
+
+ return true;
}
/*
@@ -389,6 +390,16 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
if (*exit_code != ARM_EXCEPTION_TRAP)
goto exit;
+ /*
+ * We trap the first access to the FP/SIMD to save the host context
+ * and restore the guest context lazily.
+ * If FP/SIMD is not implemented, handle the trap and inject an
+ * undefined instruction exception to the guest.
+ */
+ if (system_supports_fpsimd() &&
+ kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_FP_ASIMD)
+ return __hyp_switch_fpsimd(vcpu);
+
if (!__populate_fault_info(vcpu))
return true;
--
2.1.4
^ permalink raw reply related
* [PATCH 2/2] perf cs-etm: Remove redundant space
From: Mathieu Poirier @ 2018-05-08 16:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525360703-26159-2-git-send-email-leo.yan@linaro.org>
On 3 May 2018 at 09:18, Leo Yan <leo.yan@linaro.org> wrote:
> There have two spaces ahead function name cs_etm__set_pid_tid_cpu(), so
> remove one space and correct indentation.
>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> ---
> tools/perf/util/cs-etm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
> index 417302c..3137fbe 100644
> --- a/tools/perf/util/cs-etm.c
> +++ b/tools/perf/util/cs-etm.c
> @@ -612,8 +612,8 @@ cs_etm__get_trace(struct cs_etm_buffer *buff, struct cs_etm_queue *etmq)
> return buff->len;
> }
>
> -static void cs_etm__set_pid_tid_cpu(struct cs_etm_auxtrace *etm,
> - struct auxtrace_queue *queue)
> +static void cs_etm__set_pid_tid_cpu(struct cs_etm_auxtrace *etm,
> + struct auxtrace_queue *queue)
> {
> struct cs_etm_queue *etmq = queue->priv;
>
> --
> 2.7.4
>
^ permalink raw reply
* [GIT PULL 1/1] Broadcom devicetree fixes for 4.17
From: Florian Fainelli @ 2018-05-08 17:01 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
https://github.com/Broadcom/stblinux.git tags/arm-soc/for-4.17/devicetree-fixes
for you to fetch changes up to 675c7215aacf54242b2e8bc64bab698abbe764db:
ARM: dts: cygnus: fix irq type for arm global timer (2018-05-07 11:21:18 -0700)
----------------------------------------------------------------
This pull request contains Broadcom ARM-basec SoCs Device Tree fixes for
4.17, please pull the following:
- Clement fixes in an incorrect trigger type for the ARM global timers
on the Cygnus platforms
----------------------------------------------------------------
Cl?ment P?ron (1):
ARM: dts: cygnus: fix irq type for arm global timer
arch/arm/boot/dts/bcm-cygnus.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
^ permalink raw reply
* [PATCH 1/2] perf cs-etm: Support unknown_thread in cs_etm_auxtrace
From: Mathieu Poirier @ 2018-05-08 17:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525360703-26159-1-git-send-email-leo.yan@linaro.org>
On 3 May 2018 at 09:18, Leo Yan <leo.yan@linaro.org> wrote:
> CoreSight doesn't allocate thread structure for unknown_thread in etm
> auxtrace, so unknown_thread is NULL pointer. If the perf data doesn't
> contain valid tid and then cs_etm__mem_access() uses unknown_thread
> instead as thread handler, this results in segmentation fault when
> thread__find_addr_map() accesses thread handler.
>
> This commit creates new thread data which is used by unknown_thread, so
> CoreSight tracing can roll back to use unknown_thread if perf data
> doesn't include valid thread info. This commit also releases thread
> data for initialization failure case and for normal auxtrace free flow.
>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
> ---
> tools/perf/util/cs-etm.c | 25 +++++++++++++++++++++++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
> index 6533b1a..417302c 100644
> --- a/tools/perf/util/cs-etm.c
> +++ b/tools/perf/util/cs-etm.c
> @@ -239,6 +239,7 @@ static void cs_etm__free(struct perf_session *session)
> for (i = 0; i < aux->num_cpu; i++)
> zfree(&aux->metadata[i]);
>
> + thread__zput(aux->unknown_thread);
> zfree(&aux->metadata);
> zfree(&aux);
> }
> @@ -266,6 +267,7 @@ static u32 cs_etm__mem_access(struct cs_etm_queue *etmq, u64 address,
> if (!thread) {
> if (cpumode != PERF_RECORD_MISC_KERNEL)
> return -EINVAL;
> +
Extra line, please remove.
With this change:
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> thread = etmq->etm->unknown_thread;
> }
>
> @@ -1355,6 +1357,23 @@ int cs_etm__process_auxtrace_info(union perf_event *event,
> etm->auxtrace.free = cs_etm__free;
> session->auxtrace = &etm->auxtrace;
>
> + etm->unknown_thread = thread__new(999999999, 999999999);
> + if (!etm->unknown_thread)
> + goto err_free_queues;
> +
> + /*
> + * Initialize list node so that at thread__zput() we can avoid
> + * segmentation fault at list_del_init().
> + */
> + INIT_LIST_HEAD(&etm->unknown_thread->node);
> +
> + err = thread__set_comm(etm->unknown_thread, "unknown", 0);
> + if (err)
> + goto err_delete_thread;
> +
> + if (thread__init_map_groups(etm->unknown_thread, etm->machine))
> + goto err_delete_thread;
> +
> if (dump_trace) {
> cs_etm__print_auxtrace_info(auxtrace_info->priv, num_cpu);
> return 0;
> @@ -1369,16 +1388,18 @@ int cs_etm__process_auxtrace_info(union perf_event *event,
>
> err = cs_etm__synth_events(etm, session);
> if (err)
> - goto err_free_queues;
> + goto err_delete_thread;
>
> err = auxtrace_queues__process_index(&etm->queues, session);
> if (err)
> - goto err_free_queues;
> + goto err_delete_thread;
>
> etm->data_queued = etm->queues.populated;
>
> return 0;
>
> +err_delete_thread:
> + thread__zput(etm->unknown_thread);
> err_free_queues:
> auxtrace_queues__free(&etm->queues);
> session->auxtrace = NULL;
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH v6 01/15] thread_info: Add update_thread_flag() helpers
From: Steven Rostedt @ 2018-05-08 17:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525797900-5548-2-git-send-email-Dave.Martin@arm.com>
On Tue, 8 May 2018 17:44:46 +0100
Dave Martin <Dave.Martin@arm.com> wrote:
> There are a number of bits of code sprinkled around the kernel to
> set a thread flag if a certain condition is true, and clear it
> otherwise.
>
> To help make those call sites terser and less cumbersome, this
> patch adds a new family of thread flag manipulators
>
> update*_thread_flag([...,] flag, cond)
>
> which do the equivalent of:
>
> if (cond)
> set*_thread_flag([...,] flag);
> else
> clear*_thread_flag([...,] flag);
>
> Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
-- Steve
> Cc: Oleg Nesterov <oleg@redhat.com>
> ---
> include/linux/sched.h | 6 ++++++
> include/linux/thread_info.h | 11 +++++++++++
> 2 files changed, 17 insertions(+)
>
> diff --git a/include/linux/sched.h b/include/linux/sched.h
> index b3d697f..c2c3051 100644
> --- a/include/linux/sched.h
> +++ b/include/linux/sched.h
> @@ -1578,6 +1578,12 @@ static inline void clear_tsk_thread_flag(struct task_struct *tsk, int flag)
> clear_ti_thread_flag(task_thread_info(tsk), flag);
> }
>
> +static inline void update_tsk_thread_flag(struct task_struct *tsk, int flag,
> + bool value)
> +{
> + update_ti_thread_flag(task_thread_info(tsk), flag, value);
> +}
> +
> static inline int test_and_set_tsk_thread_flag(struct task_struct *tsk, int flag)
> {
> return test_and_set_ti_thread_flag(task_thread_info(tsk), flag);
> diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
> index cf2862b..8d8821b 100644
> --- a/include/linux/thread_info.h
> +++ b/include/linux/thread_info.h
> @@ -60,6 +60,15 @@ static inline void clear_ti_thread_flag(struct thread_info *ti, int flag)
> clear_bit(flag, (unsigned long *)&ti->flags);
> }
>
> +static inline void update_ti_thread_flag(struct thread_info *ti, int flag,
> + bool value)
> +{
> + if (value)
> + set_ti_thread_flag(ti, flag);
> + else
> + clear_ti_thread_flag(ti, flag);
> +}
> +
> static inline int test_and_set_ti_thread_flag(struct thread_info *ti, int flag)
> {
> return test_and_set_bit(flag, (unsigned long *)&ti->flags);
> @@ -79,6 +88,8 @@ static inline int test_ti_thread_flag(struct thread_info *ti, int flag)
> set_ti_thread_flag(current_thread_info(), flag)
> #define clear_thread_flag(flag) \
> clear_ti_thread_flag(current_thread_info(), flag)
> +#define update_thread_flag(flag, value) \
> + update_ti_thread_flag(current_thread_info(), flag, value)
> #define test_and_set_thread_flag(flag) \
> test_and_set_ti_thread_flag(current_thread_info(), flag)
> #define test_and_clear_thread_flag(flag) \
^ permalink raw reply
* [PATCH v9 00/12] Sunxi: Add SMP support on A83T
From: Florian Fainelli @ 2018-05-08 17:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508131914.6sy7cd6urnfg3tam@flea>
On 05/08/2018 06:19 AM, Maxime Ripard wrote:
> Hi,
>
> On Fri, May 04, 2018 at 09:05:33PM +0200, Myl?ne Josserand wrote:
>> Hello everyone,
>>
>> This is a V9 of my series that adds SMP support for Allwinner sun8i-a83t.
>> Based on sunxi's tree, sunxi/for-next branch.
>> Depends on a patch from Doug Berger that allows to include the "cpu-type"
>> header on assembly files that I included in my series (patch 01).
>
> I applied the patches, with the remarks done by Russell on v8 fixed,
> and the function sun8i_a83t_cntvoff_init made static.
Did you push those patches to sunxi/linux.git yet? I would like to make
sure I have the same copy of patch 1 since that is necessary for some of
our Broadcom ARM SoCs for 4.18.
Thanks!
--
Florian
^ permalink raw reply
* [PATCH v2 23/27] coresight: tmc-etr: Handle driver mode specific ETR buffers
From: Mathieu Poirier @ 2018-05-08 17:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525165857-11096-24-git-send-email-suzuki.poulose@arm.com>
On Tue, May 01, 2018 at 10:10:53AM +0100, Suzuki K Poulose wrote:
> Since the ETR could be driven either by SYSFS or by perf, it
> becomes complicated how we deal with the buffers used for each
> of these modes. The ETR driver cannot simply free the current
> attached buffer without knowing the provider (i.e, sysfs vs perf).
>
> To solve this issue, we provide:
> 1) the driver-mode specific etr buffer to be retained in the drvdata
> 2) the etr_buf for a session should be passed on when enabling the
> hardware, which will be stored in drvdata->etr_buf. This will be
> replaced (not free'd) as soon as the hardware is disabled, after
> necessary sync operation.
>
> The advantages of this are :
>
> 1) The common code path doesn't need to worry about how to dispose
> an existing buffer, if it is about to start a new session with a
> different buffer, possibly in a different mode.
> 2) The driver mode can control its buffers and can get access to the
> saved session even when the hardware is operating in a different
> mode. (e.g, we can still access a trace buffer from a sysfs mode
> even if the etr is now used in perf mode, without disrupting the
> current session.)
>
> Towards this, we introduce a sysfs specific data which will hold the
> etr_buf used for sysfs mode of operation, controlled solely by the
> sysfs mode handling code.
Thinking further on this... I toyed with the idea of doing the same thing when
working on the original driver and decided against it. Do we really have a case
where users would want to use sysFS and perf alternatively? To me this looks
overdesigned.
If we are going to go that way we need to enact the same behavior for ETB10 and
ETF... And take it out of this set as it is already substantial enough.
>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> drivers/hwtracing/coresight/coresight-tmc-etr.c | 59 ++++++++++++++++---------
> drivers/hwtracing/coresight/coresight-tmc.h | 2 +
> 2 files changed, 41 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> index 1ef0f62..a35a12f 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> @@ -1162,10 +1162,15 @@ static inline void tmc_etr_disable_catu(struct tmc_drvdata *drvdata)
> helper_ops(catu)->disable(catu, drvdata->etr_buf);
> }
>
> -static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
> +static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata,
> + struct etr_buf *etr_buf)
> {
> u32 axictl, sts;
> - struct etr_buf *etr_buf = drvdata->etr_buf;
> +
> + /* Callers should provide an appropriate buffer for use */
> + if (WARN_ON(!etr_buf || drvdata->etr_buf))
> + return;
> + drvdata->etr_buf = etr_buf;
>
> /*
> * If this ETR is connected to a CATU, enable it before we turn
> @@ -1227,13 +1232,16 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
> * also updating the @bufpp on where to find it. Since the trace data
> * starts at anywhere in the buffer, depending on the RRP, we adjust the
> * @len returned to handle buffer wrapping around.
> + *
> + * We are protected here by drvdata->reading != 0, which ensures the
> + * sysfs_buf stays alive.
> */
> ssize_t tmc_etr_get_sysfs_trace(struct tmc_drvdata *drvdata,
> loff_t pos, size_t len, char **bufpp)
> {
> s64 offset;
> ssize_t actual = len;
> - struct etr_buf *etr_buf = drvdata->etr_buf;
> + struct etr_buf *etr_buf = drvdata->sysfs_buf;
>
> if (pos + actual > etr_buf->len)
> actual = etr_buf->len - pos;
> @@ -1263,7 +1271,14 @@ tmc_etr_free_sysfs_buf(struct etr_buf *buf)
>
> static void tmc_etr_sync_sysfs_buf(struct tmc_drvdata *drvdata)
> {
> - tmc_sync_etr_buf(drvdata);
> + struct etr_buf *etr_buf = drvdata->etr_buf;
> +
> + if (WARN_ON(drvdata->sysfs_buf != etr_buf)) {
> + tmc_etr_free_sysfs_buf(drvdata->sysfs_buf);
> + drvdata->sysfs_buf = NULL;
> + } else {
> + tmc_sync_etr_buf(drvdata);
> + }
> }
>
> static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
> @@ -1285,6 +1300,8 @@ static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
>
> /* Disable CATU device if this ETR is connected to one */
> tmc_etr_disable_catu(drvdata);
> + /* Reset the ETR buf used by hardware */
> + drvdata->etr_buf = NULL;
> }
>
> static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
> @@ -1293,7 +1310,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
> bool used = false;
> unsigned long flags;
> struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
> - struct etr_buf *new_buf = NULL, *free_buf = NULL;
> + struct etr_buf *sysfs_buf = NULL, *new_buf = NULL, *free_buf = NULL;
>
>
> /*
> @@ -1305,7 +1322,8 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
> * with the lock released.
> */
> spin_lock_irqsave(&drvdata->spinlock, flags);
> - if (!drvdata->etr_buf || (drvdata->etr_buf->size != drvdata->size)) {
> + sysfs_buf = READ_ONCE(drvdata->sysfs_buf);
> + if (!sysfs_buf || (sysfs_buf->size != drvdata->size)) {
> spin_unlock_irqrestore(&drvdata->spinlock, flags);
> /* Allocate memory with the spinlock released */
> free_buf = new_buf = tmc_etr_setup_sysfs_buf(drvdata);
> @@ -1333,15 +1351,16 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
> * If we don't have a buffer or it doesn't match the requested size,
> * use the memory allocated above. Otherwise reuse it.
> */
> - if (!drvdata->etr_buf ||
> - (new_buf && drvdata->etr_buf->size != new_buf->size)) {
> + sysfs_buf = READ_ONCE(drvdata->sysfs_buf);
> + if (!sysfs_buf ||
> + (new_buf && sysfs_buf->size != new_buf->size)) {
> used = true;
> - free_buf = drvdata->etr_buf;
> - drvdata->etr_buf = new_buf;
> + free_buf = sysfs_buf;
> + drvdata->sysfs_buf = new_buf;
> }
>
> drvdata->mode = CS_MODE_SYSFS;
> - tmc_etr_enable_hw(drvdata);
> + tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf);
> out:
> spin_unlock_irqrestore(&drvdata->spinlock, flags);
>
> @@ -1426,13 +1445,13 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata)
> goto out;
> }
>
> - /* If drvdata::etr_buf is NULL the trace data has been read already */
> - if (drvdata->etr_buf == NULL) {
> + /* If sysfs_buf is NULL the trace data has been read already */
> + if (!drvdata->sysfs_buf) {
> ret = -EINVAL;
> goto out;
> }
>
> - /* Disable the TMC if need be */
> + /* Disable the TMC if we are trying to read from a running session */
> if (drvdata->mode == CS_MODE_SYSFS)
> tmc_etr_disable_hw(drvdata);
>
> @@ -1446,7 +1465,7 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata)
> int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
> {
> unsigned long flags;
> - struct etr_buf *etr_buf = NULL;
> + struct etr_buf *sysfs_buf = NULL;
>
> /* config types are set a boot time and never change */
> if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETR))
> @@ -1461,22 +1480,22 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
> * buffer. Since the tracer is still enabled drvdata::buf can't
> * be NULL.
> */
> - tmc_etr_enable_hw(drvdata);
> + tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf);
> } else {
> /*
> * The ETR is not tracing and the buffer was just read.
> * As such prepare to free the trace buffer.
> */
> - etr_buf = drvdata->etr_buf;
> - drvdata->etr_buf = NULL;
> + sysfs_buf = drvdata->sysfs_buf;
> + drvdata->sysfs_buf = NULL;
> }
>
> drvdata->reading = false;
> spin_unlock_irqrestore(&drvdata->spinlock, flags);
>
> /* Free allocated memory out side of the spinlock */
> - if (etr_buf)
> - tmc_free_etr_buf(etr_buf);
> + if (sysfs_buf)
> + tmc_etr_free_sysfs_buf(sysfs_buf);
>
> return 0;
> }
> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
> index 76a89a6..185dc12 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.h
> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
> @@ -197,6 +197,7 @@ struct etr_buf {
> * @trigger_cntr: amount of words to store after a trigger.
> * @etr_caps: Bitmask of capabilities of the TMC ETR, inferred from the
> * device configuration register (DEVID)
> + * @sysfs_data: SYSFS buffer for ETR.
> */
> struct tmc_drvdata {
> void __iomem *base;
> @@ -216,6 +217,7 @@ struct tmc_drvdata {
> enum tmc_mem_intf_width memwidth;
> u32 trigger_cntr;
> u32 etr_caps;
> + struct etr_buf *sysfs_buf;
> };
>
> struct etr_buf_operations {
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH 1/7] drm/mediatek: move dpi private data to device
From: kbuild test robot @ 2018-05-08 17:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508022057.29379-2-bibby.hsieh@mediatek.com>
Hi chunhui,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.17-rc4 next-20180507]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Bibby-Hsieh/drm-mediatek-support-hdmi-output-for-mt2701-and-mt7623/20180508-140924
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: arm-allyesconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm
Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings
All warnings (new ones prefixed by >>):
drivers/gpu//drm/mediatek/mtk_dpi.c: In function 'mtk_dpi_power_on':
>> drivers/gpu//drm/mediatek/mtk_dpi.c:444:9: warning: 'ret' may be used uninitialized in this function [-Wmaybe-uninitialized]
return ret;
^~~
vim +/ret +444 drivers/gpu//drm/mediatek/mtk_dpi.c
9e629c17 Jie Qiu 2016-01-04 405
9e629c17 Jie Qiu 2016-01-04 406 static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
9e629c17 Jie Qiu 2016-01-04 407 {
9e629c17 Jie Qiu 2016-01-04 408 int ret;
9e629c17 Jie Qiu 2016-01-04 409
51df75e5 chunhui dai 2018-05-08 410 if (++dpi->refcount != 1)
51df75e5 chunhui dai 2018-05-08 411 return 0;
51df75e5 chunhui dai 2018-05-08 412
9e629c17 Jie Qiu 2016-01-04 413 dpi->power_ctl |= pctl;
9e629c17 Jie Qiu 2016-01-04 414
9e629c17 Jie Qiu 2016-01-04 415 if (!(dpi->power_ctl & DPI_POWER_START) &&
9e629c17 Jie Qiu 2016-01-04 416 !(dpi->power_ctl & DPI_POWER_ENABLE))
51df75e5 chunhui dai 2018-05-08 417 goto err_refcount;
9e629c17 Jie Qiu 2016-01-04 418
9e629c17 Jie Qiu 2016-01-04 419 if (dpi->power_sta)
51df75e5 chunhui dai 2018-05-08 420 goto err_refcount;
9e629c17 Jie Qiu 2016-01-04 421
9e629c17 Jie Qiu 2016-01-04 422 ret = clk_prepare_enable(dpi->engine_clk);
9e629c17 Jie Qiu 2016-01-04 423 if (ret) {
9e629c17 Jie Qiu 2016-01-04 424 dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
9e629c17 Jie Qiu 2016-01-04 425 goto err_eng;
9e629c17 Jie Qiu 2016-01-04 426 }
9e629c17 Jie Qiu 2016-01-04 427
9e629c17 Jie Qiu 2016-01-04 428 ret = clk_prepare_enable(dpi->pixel_clk);
9e629c17 Jie Qiu 2016-01-04 429 if (ret) {
9e629c17 Jie Qiu 2016-01-04 430 dev_err(dpi->dev, "Failed to enable pixel clock: %d\n", ret);
9e629c17 Jie Qiu 2016-01-04 431 goto err_pixel;
9e629c17 Jie Qiu 2016-01-04 432 }
9e629c17 Jie Qiu 2016-01-04 433
9e629c17 Jie Qiu 2016-01-04 434 mtk_dpi_enable(dpi);
9e629c17 Jie Qiu 2016-01-04 435 dpi->power_sta = true;
9e629c17 Jie Qiu 2016-01-04 436 return 0;
9e629c17 Jie Qiu 2016-01-04 437
9e629c17 Jie Qiu 2016-01-04 438 err_pixel:
9e629c17 Jie Qiu 2016-01-04 439 clk_disable_unprepare(dpi->engine_clk);
9e629c17 Jie Qiu 2016-01-04 440 err_eng:
9e629c17 Jie Qiu 2016-01-04 441 dpi->power_ctl &= ~pctl;
51df75e5 chunhui dai 2018-05-08 442 err_refcount:
51df75e5 chunhui dai 2018-05-08 443 dpi->refcount--;
9e629c17 Jie Qiu 2016-01-04 @444 return ret;
9e629c17 Jie Qiu 2016-01-04 445 }
9e629c17 Jie Qiu 2016-01-04 446
:::::: The code at line 444 was first introduced by commit
:::::: 9e629c17aa8d7a75b8c1d99ed42892cd8ba7cdc4 drm/mediatek: Add DPI sub driver
:::::: TO: Jie Qiu <jie.qiu@mediatek.com>
:::::: CC: Philipp Zabel <p.zabel@pengutronix.de>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
-------------- next part --------------
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^ permalink raw reply
* [PATCH v2 10/27] dts: bindings: Restrict coresight tmc-etr scatter-gather mode
From: Rob Herring @ 2018-05-08 17:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <514f69b1-2219-aa83-dfe8-09c26ed4f5b1@arm.com>
On Tue, May 8, 2018 at 10:48 AM, Suzuki K Poulose
<Suzuki.Poulose@arm.com> wrote:
> On 04/05/18 23:56, Rob Herring wrote:
>>
>> On Thu, May 3, 2018 at 3:32 PM, Mathieu Poirier
>> <mathieu.poirier@linaro.org> wrote:
>>>
>>> On 1 May 2018 at 07:13, Rob Herring <robh@kernel.org> wrote:
>>>>
>>>> On Tue, May 01, 2018 at 10:10:40AM +0100, Suzuki K Poulose wrote:
>>>>>
>>>>> We are about to add the support for ETR builtin scatter-gather mode
>>>>> for dealing with large amount of trace buffers. However, on some of
>>>>> the platforms, using the ETR SG mode can lock up the system due to
>>>>> the way the ETR is connected to the memory subsystem.
>>>>>
>>>>> In SG mode, the ETR performs READ from the scatter-gather table to
>>>>> fetch the next page and regular WRITE of trace data. If the READ
>>>>> operation doesn't complete(due to the memory subsystem issues,
>>>>> which we have seen on a couple of platforms) the trace WRITE
>>>>> cannot proceed leading to issues. So, we by default do not
>>>>> use the SG mode, unless it is known to be safe on the platform.
>>>>> We define a DT property for the TMC node to specify whether we
>>>>> have a proper SG mode.
>
>
>
>>>>> ---
>>>>> Documentation/devicetree/bindings/arm/coresight.txt | 3 +++
>>>>> drivers/hwtracing/coresight/coresight-tmc.c | 8 +++++++-
>>>>> 2 files changed, 10 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/arm/coresight.txt
>>>>> b/Documentation/devicetree/bindings/arm/coresight.txt
>>>>> index cdd84d0..7c0c8f0 100644
>>>>> --- a/Documentation/devicetree/bindings/arm/coresight.txt
>>>>> +++ b/Documentation/devicetree/bindings/arm/coresight.txt
>>>>> @@ -88,6 +88,9 @@ its hardware characteristcs.
>>>>> * arm,buffer-size: size of contiguous buffer space for TMC ETR
>>>>> (embedded trace router)
>>>>>
>>>>> + * scatter-gather: boolean. Indicates that the TMC-ETR can safely
>>>>> + use the SG mode on this system.
>>>>> +
>>>>
>>>>
>>>> Needs a vendor prefix.
>>>>
>>>
>>> Thinking further on this, do we need to make it device specific as
>>> well - something like "arm,etr-scatter-gather"? That way we don't
>>> have to redefine "scatter-gather" for other ARM devices if they happen
>>> to need the same property but for different reasons.
>>
>>
>> No. If we had a bunch of cases, then we'd probably want to have just
>> 'scatter-gather'.
>
>
> Does it mean "arm,scatter-gather" ?
Yes. Use that.
> If we ever wanted to add the device
> specific information, I would prefer to go with "arm,tmc-scatter-gather"
> and not "etr-scatter-gather". They both could mean different things.
>
>>
>> BTW, if SG had already been supported, then I'd say this is a quirk
>> and we should invert this property. Otherwise, you'd be disabling once
>> enabled SG and require working platforms to update their dtb. Of
>> course, I shouldn't really let the state of an OS driver influence the
>> DT binding.
>>
>
> The SG support is added with this series. So, the OS has never made use
> of the feature.
Linux never did, but other OSs use DT, hence why I said "an OS
driver", not "the OS driver". But in reality, I'd guess only Linux has
Coresight support at all.
Rob
^ permalink raw reply
* [PATCH v2 25/27] coresight: etr_buf: Add helper for padding an area of trace data
From: Mathieu Poirier @ 2018-05-08 17:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525165857-11096-26-git-send-email-suzuki.poulose@arm.com>
On Tue, May 01, 2018 at 10:10:55AM +0100, Suzuki K Poulose wrote:
> This patch adds a helper to insert barrier packets for a given
> size (aligned to packet size) at given offset in an etr_buf. This
> will be used later for perf mode when we try to start in the
> middle of an SG buffer.
>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> drivers/hwtracing/coresight/coresight-tmc-etr.c | 53 ++++++++++++++++++++++---
> 1 file changed, 47 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> index 7551272..8159e84 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> @@ -1083,18 +1083,59 @@ static ssize_t tmc_etr_buf_get_data(struct etr_buf *etr_buf,
> return etr_buf->ops->get_data(etr_buf, (u64)offset, len, bufpp);
> }
>
> +/*
> + * tmc_etr_buf_insert_barrier_packets : Insert barrier packets at @offset upto
> + * @size of bytes in the given buffer. @size should be aligned to the barrier
> + * packet size.
> + *
> + * Returns the new @offset after filling the barriers on success. Otherwise
> + * returns error.
> + */
> static inline s64
> -tmc_etr_buf_insert_barrier_packet(struct etr_buf *etr_buf, u64 offset)
> +tmc_etr_buf_insert_barrier_packets(struct etr_buf *etr_buf,
> + u64 offset, u64 size)
> {
> ssize_t len;
> char *bufp;
>
> - len = tmc_etr_buf_get_data(etr_buf, offset,
> - CORESIGHT_BARRIER_PKT_SIZE, &bufp);
> - if (WARN_ON(len <= CORESIGHT_BARRIER_PKT_SIZE))
> + if (size < CORESIGHT_BARRIER_PKT_SIZE)
> return -EINVAL;
> - coresight_insert_barrier_packet(bufp);
> - return offset + CORESIGHT_BARRIER_PKT_SIZE;
> + /*
> + * Normally the size should be aligned to the frame size
> + * of the ETR. Even if it isn't, the decoder looks for a
> + * barrier packet at a frame size aligned offset. So align
> + * the buffer to frame size first and then fill barrier
> + * packets.
> + */
> + do {
> + len = tmc_etr_buf_get_data(etr_buf, offset, size, &bufp);
> + if (WARN_ON(len <= 0))
> + return -EINVAL;
> + /*
> + * We are guaranteed that @bufp will point to a linear range
> + * of @len bytes, where @len <= @size.
> + */
> + size -= len;
> + offset += len;
> + while (len >= CORESIGHT_BARRIER_PKT_SIZE) {
> + coresight_insert_barrier_packet(bufp);
> + bufp += CORESIGHT_BARRIER_PKT_SIZE;
> + len -= CORESIGHT_BARRIER_PKT_SIZE;
> + }
> +
> + /* If we reached the end of the buffer, wrap around */
> + if (offset == etr_buf->size)
> + offset -= etr_buf->size;
> + } while (size);
> +
> + return offset;
> +}
> +
> +static inline s64
> +tmc_etr_buf_insert_barrier_packet(struct etr_buf *etr_buf, u64 offset)
> +{
> + return tmc_etr_buf_insert_barrier_packets(etr_buf, offset,
> + CORESIGHT_BARRIER_PKT_SIZE);
Indentation
> }
>
> /*
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH] arm64: allwinner: a64: Add Amarula A64-Relic initial support
From: Jagan Teki @ 2018-05-08 17:34 UTC (permalink / raw)
To: linux-arm-kernel
Amarula A64-Relic is Allwinner A64 based IoT device, which support
- Allwinner A64 Cortex-A53
- Mali-400MP2 GPU
- AXP803 PMIC
- 1GB DDR3 RAM
- 8GB eMMC
- AP6330 Wifi/BLE
- MIPI-DSI
- CSI: OV5640 sensor
- USB OTG
- 12V DC power supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-a64-amarula-relic.dts | 182 +++++++++++++++++++++
2 files changed, 183 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index c31f90a49481..67ce8c500b2e 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-amarula-relic.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-bananapi-m64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts
new file mode 100644
index 000000000000..0e907e0e23c0
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts
@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2017 Amarula Solutions B.V.
+ * Author: Jagan Teki <jagan@amarulasolutions.com>
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Amarula A64-Relic";
+ compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <®_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp803: pmic at 3a3 {
+ compatible = "x-powers,axp803";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
+ };
+};
+
+#include "axp803.dtsi"
+
+®_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "avdd-csi";
+};
+
+®_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pl";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1040000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-sys";
+};
+
+®_dldo1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-hdmi-dsi-sensor";
+};
+
+®_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-mipi";
+};
+
+®_dldo3 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-gen";
+};
+
+®_dldo4 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-io";
+};
+
+®_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "cpvdd";
+};
+
+®_fldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-1v2-hsic";
+};
+
+/*
+ * The A64 chip cannot work without this regulator off, although
+ * it seems to be only driving the AR100 core.
+ * Maybe we don't still know well about CPUs domain.
+ */
+®_fldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+ usb0_vbus-supply = <®_drivevbus>;
+ status = "okay";
+};
--
2.14.3
^ permalink raw reply related
* [PATCH] clk: imx6ull: use OSC clock during AXI rate change
From: Stephen Boyd @ 2018-05-08 18:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4188ee25bd5179b57d09e4624dcfbfbb@agner.ch>
Quoting Stefan Agner (2018-05-08 06:20:03)
> On 08.05.2018 09:32, Jacky Bai wrote:
> >
> > I have tried two 6ULL board, I don't meet such issue. System can boot
> > up successfully with commit 6f9575e55632 included.
> > Anyway, the change in this patch is ok for me. it is no harm to the
> > BUS clock change flow.
>
> Hm, that is interesting, maybe it is because we use a different SKU? Or
> maybe bootloader?
>
> I tested here with a 800 MHz clocked variant on a Colibri iMX6ULL using
> U-Boot 2016.11.
>
I'll throw this into fixes today because it fixes something to be
useful. It's still interesting to see what's different between the two
setups though.
^ permalink raw reply
* [PATCH] arm64: dts: renesas: r8a77970: add SMP support
From: Geert Uytterhoeven @ 2018-05-08 18:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <54dbd1d2-8279-5073-cffb-c647fba91e42@cogentembedded.com>
Hi Sergei,
On Tue, May 8, 2018 at 6:39 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Add the device node for the second Cortex-A53 CPU core.
>
> Based on the original (and large) patch by Daisuke Matsushita
> <daisuke.matsushita.ns@hitachi.com>.
>
> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Dupe of https://patchwork.kernel.org/patch/10032875/
>From series "[PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support"
(https://www.spinics.net/lists/linux-renesas-soc/msg19681.html)
> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -41,6 +41,16 @@
> enable-method = "psci";
> };
>
> + a53_1: cpu at 1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53","arm,armv8";
Missing space after the comma.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH] arm64: dts: renesas: r8a77970: add SMP support
From: Sergei Shtylyov @ 2018-05-08 18:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMuHMdUqVVWz0jLb2Vmrkk3BQBsYVsCOW1zsaPUi8o6jr_mojQ@mail.gmail.com>
On 05/08/2018 09:40 PM, Geert Uytterhoeven wrote:
>> Add the device node for the second Cortex-A53 CPU core.
>>
>> Based on the original (and large) patch by Daisuke Matsushita
>> <daisuke.matsushita.ns@hitachi.com>.
>>
>> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> Dupe of https://patchwork.kernel.org/patch/10032875/
Sorry!
Not an exact dupe, though -- mine has clock/power #define's used,
yours -- only bare #s. :-)
> From series "[PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support"
> (https://www.spinics.net/lists/linux-renesas-soc/msg19681.html)
Hmm... what's the fate of this series?
>> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi
>> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
>> @@ -41,6 +41,16 @@
>> enable-method = "psci";
>> };
>>
>> + a53_1: cpu at 1 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53","arm,armv8";
>
> Missing space after the comma.
Oops. :-)
> Gr{oetje,eeting}s,
>
> Geert
MBR, Sergei
^ permalink raw reply
* [PATCH 1/4] amba: Export amba_bustype
From: Kim Phillips @ 2018-05-08 19:06 UTC (permalink / raw)
To: linux-arm-kernel
This patch is provided in the context of allowing the Coresight driver
subsystem to be loaded as modules. Coresight uses amba_bus in its call
to bus_find_device() in of_coresight_get_endpoint_device() when
searching for a configurable endpoint device. This patch allows
Coresight to reference amba_bustype when built as a module.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Alex Williamson <alex.williamson@redhat.com>
Cc: Eric Auger <eric.auger@redhat.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Todd Kjos <tkjos@google.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Kim Phillips <kim.phillips@arm.com>
---
There was a prior patch submitted by Alex W. here:
https://lkml.org/lkml/2017/6/19/811
But I can't tell its fate - presume simply delayed?
Coresight uses amba_bus in its call to bus_find_device() here:
https://lxr.missinglinkelectronics.com/linux/drivers/hwtracing/coresight/of_coresight.c#L51
Grepping for bus_type and EXPORT shows other busses exporting their
type, so I don't think this is the wrong approach. If, OTOH, Coresight
needs to do something differently, please comment.
drivers/amba/bus.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c
index 594c228d2f02..12283bd06733 100644
--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c
@@ -197,6 +197,7 @@ struct bus_type amba_bustype = {
.pm = &amba_pm,
.force_dma = true,
};
+EXPORT_SYMBOL_GPL(amba_bustype);
static int __init amba_init(void)
{
--
2.16.2
^ permalink raw reply related
* [PATCH 2/4] pid: Export find_task_by_vpid for use in external modules
From: Kim Phillips @ 2018-05-08 19:06 UTC (permalink / raw)
To: linux-arm-kernel
This patch is in the context of allowing the Coresight h/w
trace driver suite to be loaded as modules. Coresight uses
find_task_by_vpid when running in direct capture mode (via sysfs)
when getting/setting the context ID comparator to trigger on
(/sys/bus/coresight/devices/<x>.etm/ctxid_pid).
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Gargi Sharma <gs051095@gmail.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Pavel Tatashin <pasha.tatashin@oracle.com>
Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
Cc: Kirill Tkhai <ktkhai@virtuozzo.com>
Cc: Mike Rapoport <rppt@linux.vnet.ibm.com>
Cc: David Howells <dhowells@redhat.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Kim Phillips <kim.phillips@arm.com>
---
Current CoreSight callsite:
https://lxr.missinglinkelectronics.com/linux/include/linux/coresight.h#L285
A quick look didn't find anything, but if Coresight needs to do
something differently, please comment.
kernel/pid.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/pid.c b/kernel/pid.c
index 157fe4b19971..92b1b623f3e0 100644
--- a/kernel/pid.c
+++ b/kernel/pid.c
@@ -342,6 +342,7 @@ struct task_struct *find_task_by_vpid(pid_t vnr)
{
return find_task_by_pid_ns(vnr, task_active_pid_ns(current));
}
+EXPORT_SYMBOL_GPL(find_task_by_vpid);
struct task_struct *find_get_task_by_vpid(pid_t nr)
{
--
2.17.0
^ permalink raw reply related
* [PATCH 3/4] coresight: allow to build as modules
From: Kim Phillips @ 2018-05-08 19:06 UTC (permalink / raw)
To: linux-arm-kernel
Allow to build coresight as modules. This greatly enhances developer
efficiency by allowing the development to take place exclusively on the
target, and without needing to reboot in between changes.
- Kconfig bools become tristates, to allow =m
- MODULE_* macros added: Please correct me if I'm wrong:
- assume LICENSE is "GPL v2"
- tried to get as close to original authors for MODULE_AUTHOR
- The 'select' Kconfig statements are replaced with 'depends on'
clauses, to specify the dependencies between the modules including
other fixes, e.g., coresight-stm unconditionally calls
stm_register_device, it therefore depends on STM.
- use -objs to denote merge object directives in Makefile, adds a
coresight-core nomenclature for the base module.
- add a coresight_exit() that unregisters the coresight bus, add remove
fns for most others.
- fix up modules with ID tables for autoloading on boot, add missing
__exit attributes
- move coresight_vpid_to_pid to an externed, single instance in
coresight-core, to be used by all submodules.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Kim Phillips <kim.phillips@arm.com>
---
Changes from versions previously sent to coresight mailing list:
- tmc_remove: free buffer used by TMC-ETR and TMC-ETF by calling
tmc_read_unprepare()
- fixed an unbalanced pm_runtime_enable in coresight-replicator
- etm[4]_remove(): call cpuhp_remove_state_nocalls() and
etm_perf_symlink(.., false) to clear up cpuhp and symlink state
- add module parent checks for all enable/disable functions, source
and sink modules
- refactored device ptr dereferences by introducing a new parent_dev
variable
- corrected replicator author
- whitespace fix in funnel driver
- added user Kconfig help text with the names of the modules.
- Addressed Mathieu's comments:
- renamed coresight-link-sink-tmc coresight-tmc-core
- prevent ability to crash the system by removing drivers from an
active path by adding try_module_get() and module_put() calls in
funnel and replicator drivers' enable and disable functions (thanks for
figuring that out, Mathieu).
- Addressed most of Mathieu's comments:
- rm __inits causing linker section mismatch errors
- barrier_pkt made static, moved to coresight_priv.h
- rm unnecessary tmc_* EXPORT_SYMBOL leftovers
- add some missing MODULE_AUTHORs
drivers/hwtracing/coresight/Kconfig | 63 +++++++++++++------
drivers/hwtracing/coresight/Makefile | 28 ++++++---
.../hwtracing/coresight/coresight-cpu-debug.c | 2 +
.../coresight/coresight-dynamic-replicator.c | 30 ++++++++-
drivers/hwtracing/coresight/coresight-etb10.c | 32 +++++++++-
.../hwtracing/coresight/coresight-etm-cp14.c | 4 ++
.../hwtracing/coresight/coresight-etm-perf.c | 13 +++-
.../hwtracing/coresight/coresight-etm-perf.h | 2 +-
.../coresight/coresight-etm3x-sysfs.c | 6 ++
drivers/hwtracing/coresight/coresight-etm3x.c | 37 ++++++++++-
.../coresight/coresight-etm4x-sysfs.c | 6 ++
drivers/hwtracing/coresight/coresight-etm4x.c | 38 ++++++++++-
.../hwtracing/coresight/coresight-funnel.c | 30 ++++++++-
drivers/hwtracing/coresight/coresight-priv.h | 10 ++-
.../coresight/coresight-replicator.c | 33 +++++++++-
drivers/hwtracing/coresight/coresight-stm.c | 27 +++++++-
.../hwtracing/coresight/coresight-tmc-etf.c | 2 +
.../hwtracing/coresight/coresight-tmc-etr.c | 2 +
drivers/hwtracing/coresight/coresight-tmc.c | 34 +++++++++-
drivers/hwtracing/coresight/coresight-tpiu.c | 31 ++++++++-
drivers/hwtracing/coresight/coresight.c | 49 ++++++++++++---
include/linux/coresight.h | 23 +------
22 files changed, 418 insertions(+), 84 deletions(-)
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index ef9cb3c164e1..09a682013ea2 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -2,8 +2,8 @@
# Coresight configuration
#
menuconfig CORESIGHT
- bool "CoreSight Tracing Support"
- select ARM_AMBA
+ tristate "CoreSight Tracing Support"
+ depends on ARM_AMBA
select PERF_EVENTS
help
This framework provides a kernel interface for the CoreSight debug
@@ -12,17 +12,24 @@ menuconfig CORESIGHT
specification and configure the right series of components when a
trace source gets enabled.
+ To compile this code as a module, choose M here: the
+ module will be called coresight-core.
+
if CORESIGHT
config CORESIGHT_LINKS_AND_SINKS
- bool "CoreSight Link and Sink drivers"
+ tristate "CoreSight Link and Sink drivers"
+ depends on CORESIGHT
help
This enables support for CoreSight link and sink drivers that are
responsible for transporting and collecting the trace data
respectively. Link and sinks are dynamically aggregated with a trace
entity at run time to form a complete trace path.
+ To compile this code as modules, choose M here: the
+ modules will be called coresight-funnel and coresight-replicator.
+
config CORESIGHT_LINK_AND_SINK_TMC
- bool "Coresight generic TMC driver"
+ tristate "Coresight generic TMC driver"
depends on CORESIGHT_LINKS_AND_SINKS
help
This enables support for the Trace Memory Controller driver.
@@ -31,8 +38,11 @@ config CORESIGHT_LINK_AND_SINK_TMC
complies with the generic implementation of the component without
special enhancement or added features.
+ To compile this code as a module, choose M here: the
+ module will be called coresight-tmc-core.
+
config CORESIGHT_SINK_TPIU
- bool "Coresight generic TPIU driver"
+ tristate "Coresight generic TPIU driver"
depends on CORESIGHT_LINKS_AND_SINKS
help
This enables support for the Trace Port Interface Unit driver,
@@ -42,57 +52,71 @@ config CORESIGHT_SINK_TPIU
connected to an external host for use case capturing more traces than
the on-board coresight memory can handle.
+ To compile this code as a module, choose M here: the
+ module will be called coresight-tpiu.
+
config CORESIGHT_SINK_ETBV10
- bool "Coresight ETBv1.0 driver"
+ tristate "Coresight ETBv1.0 driver"
depends on CORESIGHT_LINKS_AND_SINKS
help
This enables support for the Embedded Trace Buffer version 1.0 driver
that complies with the generic implementation of the component without
special enhancement or added features.
+ To compile this code as a module, choose M here: the
+ module will be called coresight-etb10.
+
config CORESIGHT_SOURCE_ETM3X
- bool "CoreSight Embedded Trace Macrocell 3.x driver"
- depends on !ARM64
- select CORESIGHT_LINKS_AND_SINKS
+ tristate "CoreSight Embedded Trace Macrocell 3.x driver"
+ depends on !ARM64 && CORESIGHT_LINKS_AND_SINKS
help
This driver provides support for processor ETM3.x and PTM1.x modules,
which allows tracing the instructions that a processor is executing
This is primarily useful for instruction level tracing. Depending
the ETM version data tracing may also be available.
+ To compile this code as a module, choose M here: the
+ module will be called coresight-etm3x-core.
+
config CORESIGHT_SOURCE_ETM4X
- bool "CoreSight Embedded Trace Macrocell 4.x driver"
- depends on ARM64
- select CORESIGHT_LINKS_AND_SINKS
+ tristate "CoreSight Embedded Trace Macrocell 4.x driver"
+ depends on ARM64 && CORESIGHT_LINKS_AND_SINKS
help
This driver provides support for the ETM4.x tracer module, tracing the
instructions that a processor is executing. This is primarily useful
for instruction level tracing. Depending on the implemented version
data tracing may also be available.
+ To compile this code as a module, choose M here: the
+ module will be called coresight-etm4x-core.
+
config CORESIGHT_DYNAMIC_REPLICATOR
- bool "CoreSight Programmable Replicator driver"
+ tristate "CoreSight Programmable Replicator driver"
depends on CORESIGHT_LINKS_AND_SINKS
help
This enables support for dynamic CoreSight replicator link driver.
The programmable ATB replicator allows independent filtering of the
trace data based on the traceid.
+ To compile this code as a module, choose M here: the
+ module will be called coresight-dynamic-replicator.
+
config CORESIGHT_STM
- bool "CoreSight System Trace Macrocell driver"
+ tristate "CoreSight System Trace Macrocell driver"
depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64
- select CORESIGHT_LINKS_AND_SINKS
- select STM
+ depends on STM && CORESIGHT_LINKS_AND_SINKS
help
This driver provides support for hardware assisted software
instrumentation based tracing. This is primarily used for
logging useful software events or data coming from various entities
in the system, possibly running different OSs
+ To compile this code as a module, choose M here: the
+ module will be called coresight-stm.
+
config CORESIGHT_CPU_DEBUG
tristate "CoreSight CPU Debug driver"
- depends on ARM || ARM64
- depends on DEBUG_FS
+ depends on CORESIGHT && DEBUG_FS
help
This driver provides support for coresight debugging module. This
is primarily used to dump sample-based profiling registers when
@@ -103,4 +127,7 @@ config CORESIGHT_CPU_DEBUG
properly, please refer Documentation/trace/coresight-cpu-debug.txt
for detailed description and the example for usage.
+ To compile this code as a module, choose M here: the
+ module will be called coresight-cpu-debug.
+
endif
diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
index 61db9dd0d571..5990710289c2 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -2,19 +2,29 @@
#
# Makefile for CoreSight drivers.
#
-obj-$(CONFIG_CORESIGHT) += coresight.o coresight-etm-perf.o
-obj-$(CONFIG_OF) += of_coresight.o
-obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o \
- coresight-tmc-etf.o \
- coresight-tmc-etr.o
+obj-$(CONFIG_CORESIGHT) += coresight-core.o
+coresight-core-objs := coresight.o \
+ of_coresight.o
+
+obj-$(CONFIG_CORESIGHT) += coresight-etm-perf.o
+
+obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc-core.o
+coresight-tmc-core-objs := coresight-tmc.o \
+ coresight-tmc-etf.o \
+ coresight-tmc-etr.o
obj-$(CONFIG_CORESIGHT_SINK_TPIU) += coresight-tpiu.o
obj-$(CONFIG_CORESIGHT_SINK_ETBV10) += coresight-etb10.o
obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \
coresight-replicator.o
-obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o \
- coresight-etm3x-sysfs.o
-obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o \
- coresight-etm4x-sysfs.o
+
+obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x-core.o
+coresight-etm3x-core-objs := coresight-etm3x.o \
+ coresight-etm-cp14.o \
+ coresight-etm3x-sysfs.o
+
+obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x-core.o
+coresight-etm4x-core-objs := coresight-etm4x.o coresight-etm4x-sysfs.o
+
obj-$(CONFIG_CORESIGHT_DYNAMIC_REPLICATOR) += coresight-dynamic-replicator.o
obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o
obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o
diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hwtracing/coresight/coresight-cpu-debug.c
index 9cdb3fbc8c1f..ff6d3be1b13c 100644
--- a/drivers/hwtracing/coresight/coresight-cpu-debug.c
+++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c
@@ -683,6 +683,8 @@ static const struct amba_id debug_ids[] = {
{ 0, 0 },
};
+MODULE_DEVICE_TABLE(amba, debug_ids);
+
static struct amba_driver debug_driver = {
.drv = {
.name = "coresight-cpu-debug",
diff --git a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c
index 043da86b0fe9..a4ee744ca12b 100644
--- a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c
+++ b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c
@@ -45,7 +45,12 @@ struct replicator_state {
static int replicator_enable(struct coresight_device *csdev, int inport,
int outport)
{
- struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct replicator_state *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
+
+ if (!try_module_get(module))
+ return -ENODEV;
CS_UNLOCK(drvdata->base);
@@ -71,7 +76,9 @@ static int replicator_enable(struct coresight_device *csdev, int inport,
static void replicator_disable(struct coresight_device *csdev, int inport,
int outport)
{
- struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct replicator_state *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
CS_UNLOCK(drvdata->base);
@@ -83,6 +90,7 @@ static void replicator_disable(struct coresight_device *csdev, int inport,
CS_LOCK(drvdata->base);
+ module_put(module);
dev_info(drvdata->dev, "REPLICATOR disabled\n");
}
@@ -167,6 +175,15 @@ static int replicator_probe(struct amba_device *adev, const struct amba_id *id)
return PTR_ERR_OR_ZERO(drvdata->csdev);
}
+static int __exit replicator_remove(struct amba_device *adev)
+{
+ struct replicator_state *drvdata = dev_get_drvdata(&adev->dev);
+
+ coresight_unregister(drvdata->csdev);
+
+ return 0;
+}
+
#ifdef CONFIG_PM
static int replicator_runtime_suspend(struct device *dev)
{
@@ -208,6 +225,8 @@ static const struct amba_id replicator_ids[] = {
{ 0, 0 },
};
+MODULE_DEVICE_TABLE(amba, replicator_ids);
+
static struct amba_driver replicator_driver = {
.drv = {
.name = "coresight-dynamic-replicator",
@@ -215,6 +234,11 @@ static struct amba_driver replicator_driver = {
.suppress_bind_attrs = true,
},
.probe = replicator_probe,
+ .remove = replicator_remove,
.id_table = replicator_ids,
};
-builtin_amba_driver(replicator_driver);
+module_amba_driver(replicator_driver);
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_DESCRIPTION("ARM Coresight Dynamic Replicator Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c
index 580cd381adf3..b64d616b301f 100644
--- a/drivers/hwtracing/coresight/coresight-etb10.c
+++ b/drivers/hwtracing/coresight/coresight-etb10.c
@@ -142,7 +142,12 @@ static int etb_enable(struct coresight_device *csdev, u32 mode)
{
u32 val;
unsigned long flags;
- struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct etb_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
+
+ if (!try_module_get(module))
+ return -ENODEV;
val = local_cmpxchg(&drvdata->mode,
CS_MODE_DISABLED, mode);
@@ -263,7 +268,9 @@ static void etb_dump_hw(struct etb_drvdata *drvdata)
static void etb_disable(struct coresight_device *csdev)
{
- struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct etb_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
unsigned long flags;
spin_lock_irqsave(&drvdata->spinlock, flags);
@@ -273,6 +280,7 @@ static void etb_disable(struct coresight_device *csdev)
local_set(&drvdata->mode, CS_MODE_DISABLED);
+ module_put(module);
dev_info(drvdata->dev, "ETB disabled\n");
}
@@ -719,6 +727,16 @@ static int etb_probe(struct amba_device *adev, const struct amba_id *id)
return ret;
}
+static int __exit etb_remove(struct amba_device *adev)
+{
+ struct etb_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ misc_deregister(&drvdata->miscdev);
+ coresight_unregister(drvdata->csdev);
+
+ return 0;
+}
+
#ifdef CONFIG_PM
static int etb_runtime_suspend(struct device *dev)
{
@@ -753,6 +771,8 @@ static const struct amba_id etb_ids[] = {
{ 0, 0},
};
+MODULE_DEVICE_TABLE(amba, etb_ids);
+
static struct amba_driver etb_driver = {
.drv = {
.name = "coresight-etb10",
@@ -762,6 +782,12 @@ static struct amba_driver etb_driver = {
},
.probe = etb_probe,
+ .remove = etb_remove,
.id_table = etb_ids,
};
-builtin_amba_driver(etb_driver);
+module_amba_driver(etb_driver);
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("Arm CoreSight Embedded Trace Buffer driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-etm-cp14.c b/drivers/hwtracing/coresight/coresight-etm-cp14.c
index 12a220682117..1e16a6358364 100644
--- a/drivers/hwtracing/coresight/coresight-etm-cp14.c
+++ b/drivers/hwtracing/coresight/coresight-etm-cp14.c
@@ -589,3 +589,7 @@ int etm_writel_cp14(u32 reg, u32 val)
return 0;
}
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_DESCRIPTION("Arm CoreSight ETM CP14 driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index 4e5ed6597f2f..152f2ae49665 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -477,6 +477,7 @@ int etm_perf_symlink(struct coresight_device *csdev, bool link)
return 0;
}
+EXPORT_SYMBOL_GPL(etm_perf_symlink);
static int __init etm_perf_init(void)
{
@@ -504,4 +505,14 @@ static int __init etm_perf_init(void)
return ret;
}
-device_initcall(etm_perf_init);
+module_init(etm_perf_init);
+
+static void __exit etm_perf_exit(void)
+{
+ perf_pmu_unregister(&etm_pmu);
+}
+module_exit(etm_perf_exit);
+
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("Arm CoreSight tracer perf driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h
index 3ffc9feb2d64..8c49c7b82d84 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.h
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.h
@@ -54,7 +54,7 @@ struct etm_filters {
};
-#ifdef CONFIG_CORESIGHT
+#if IS_ENABLED(CONFIG_CORESIGHT)
int etm_perf_symlink(struct coresight_device *csdev, bool link);
#else
diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
index 6e547ec6fead..65cfec6e1749 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
@@ -17,6 +17,7 @@
#include <linux/pm_runtime.h>
#include <linux/sysfs.h>
+#include <linux/coresight.h>
#include "coresight-etm.h"
#include "coresight-priv.h"
@@ -1274,3 +1275,8 @@ const struct attribute_group *coresight_etm_groups[] = {
&coresight_etm_mgmt_group,
NULL,
};
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("Arm CoreSight Program Flow Trace sysfs driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index 39f42fdd503d..419dd17115ed 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -523,7 +523,12 @@ static int etm_enable(struct coresight_device *csdev,
{
int ret;
u32 val;
- struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct etm_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
+
+ if (!try_module_get(module))
+ return -ENODEV;
val = local_cmpxchg(&drvdata->mode, CS_MODE_DISABLED, mode);
@@ -620,7 +625,9 @@ static void etm_disable(struct coresight_device *csdev,
struct perf_event *event)
{
u32 mode;
- struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct etm_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
/*
* For as long as the tracer isn't disabled another entity can't
@@ -645,6 +652,8 @@ static void etm_disable(struct coresight_device *csdev,
if (mode)
local_set(&drvdata->mode, CS_MODE_DISABLED);
+
+ module_put(module);
}
static const struct coresight_ops_source etm_source_ops = {
@@ -873,6 +882,20 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id)
return ret;
}
+static int __exit etm_remove(struct amba_device *adev)
+{
+ struct etm_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ etm_perf_symlink(drvdata->csdev, false);
+
+ cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_STARTING);
+ cpuhp_remove_state_nocalls(hp_online);
+
+ coresight_unregister(drvdata->csdev);
+
+ return 0;
+}
+
#ifdef CONFIG_PM
static int etm_runtime_suspend(struct device *dev)
{
@@ -933,6 +956,8 @@ static const struct amba_id etm_ids[] = {
{ 0, 0},
};
+MODULE_DEVICE_TABLE(amba, etm_ids);
+
static struct amba_driver etm_driver = {
.drv = {
.name = "coresight-etm3x",
@@ -941,6 +966,12 @@ static struct amba_driver etm_driver = {
.suppress_bind_attrs = true,
},
.probe = etm_probe,
+ .remove = etm_remove,
.id_table = etm_ids,
};
-builtin_amba_driver(etm_driver);
+module_amba_driver(etm_driver);
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("Arm CoreSight Program Flow Trace driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
index d21961710713..04119b963454 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
@@ -17,6 +17,7 @@
#include <linux/pm_runtime.h>
#include <linux/sysfs.h>
+#include <linux/coresight.h>
#include "coresight-etm4x.h"
#include "coresight-priv.h"
@@ -2155,3 +2156,8 @@ const struct attribute_group *coresight_etmv4_groups[] = {
&coresight_etmv4_trcidr_group,
NULL,
};
+EXPORT_SYMBOL_GPL(coresight_etmv4_groups);
+
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("Arm CoreSight Program Flow Trace v4 sysfs driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index cf364a514c12..24e50f430e59 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -287,7 +287,12 @@ static int etm4_enable(struct coresight_device *csdev,
{
int ret;
u32 val;
- struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
+
+ if (!try_module_get(module))
+ return -ENODEV;
val = local_cmpxchg(&drvdata->mode, CS_MODE_DISABLED, mode);
@@ -394,7 +399,9 @@ static void etm4_disable(struct coresight_device *csdev,
struct perf_event *event)
{
u32 mode;
- struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
/*
* For as long as the tracer isn't disabled another entity can't
@@ -416,6 +423,8 @@ static void etm4_disable(struct coresight_device *csdev,
if (mode)
local_set(&drvdata->mode, CS_MODE_DISABLED);
+
+ module_put(module);
}
static const struct coresight_ops_source etm4_source_ops = {
@@ -1052,6 +1061,20 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
return ret;
}
+static int __exit etm4_remove(struct amba_device *adev)
+{
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ etm_perf_symlink(drvdata->csdev, false);
+
+ cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_STARTING);
+ cpuhp_remove_state_nocalls(hp_online);
+
+ coresight_unregister(drvdata->csdev);
+
+ return 0;
+}
+
static const struct amba_id etm4_ids[] = {
{ /* ETM 4.0 - Cortex-A53 */
.id = 0x000bb95d,
@@ -1071,12 +1094,21 @@ static const struct amba_id etm4_ids[] = {
{ 0, 0},
};
+MODULE_DEVICE_TABLE(amba, etm4_ids);
+
static struct amba_driver etm4x_driver = {
.drv = {
.name = "coresight-etm4x",
+ .owner = THIS_MODULE,
.suppress_bind_attrs = true,
},
.probe = etm4_probe,
+ .remove = etm4_remove,
.id_table = etm4_ids,
};
-builtin_amba_driver(etm4x_driver);
+module_amba_driver(etm4x_driver);
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("Arm CoreSight Program Flow Trace v4 driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c
index 9f8ac0bef853..8909c3b60719 100644
--- a/drivers/hwtracing/coresight/coresight-funnel.c
+++ b/drivers/hwtracing/coresight/coresight-funnel.c
@@ -68,7 +68,12 @@ static void funnel_enable_hw(struct funnel_drvdata *drvdata, int port)
static int funnel_enable(struct coresight_device *csdev, int inport,
int outport)
{
- struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct funnel_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
+
+ if (!try_module_get(module))
+ return -ENODEV;
funnel_enable_hw(drvdata, inport);
@@ -92,10 +97,13 @@ static void funnel_disable_hw(struct funnel_drvdata *drvdata, int inport)
static void funnel_disable(struct coresight_device *csdev, int inport,
int outport)
{
- struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct funnel_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
funnel_disable_hw(drvdata, inport);
+ module_put(module);
dev_info(drvdata->dev, "FUNNEL inport %d disabled\n", inport);
}
@@ -218,6 +226,15 @@ static int funnel_probe(struct amba_device *adev, const struct amba_id *id)
return PTR_ERR_OR_ZERO(drvdata->csdev);
}
+static int __exit funnel_remove(struct amba_device *adev)
+{
+ struct funnel_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ coresight_unregister(drvdata->csdev);
+
+ return 0;
+}
+
#ifdef CONFIG_PM
static int funnel_runtime_suspend(struct device *dev)
{
@@ -257,6 +274,8 @@ static const struct amba_id funnel_ids[] = {
{ 0, 0},
};
+MODULE_DEVICE_TABLE(amba, funnel_ids);
+
static struct amba_driver funnel_driver = {
.drv = {
.name = "coresight-funnel",
@@ -265,6 +284,11 @@ static struct amba_driver funnel_driver = {
.suppress_bind_attrs = true,
},
.probe = funnel_probe,
+ .remove = funnel_remove,
.id_table = funnel_ids,
};
-builtin_amba_driver(funnel_driver);
+module_amba_driver(funnel_driver);
+
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("ARM Coresight Funnel Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
index f1d0e21d8cab..335bca44b42d 100644
--- a/drivers/hwtracing/coresight/coresight-priv.h
+++ b/drivers/hwtracing/coresight/coresight-priv.h
@@ -64,7 +64,13 @@ static DEVICE_ATTR_RO(name)
#define coresight_simple_reg64(type, name, lo_off, hi_off) \
__coresight_simple_func(type, NULL, name, lo_off, hi_off)
-extern const u32 barrier_pkt[5];
+/*
+ * When losing synchronisation a new barrier packet needs to be inserted at the
+ * beginning of the data collected in a buffer. That way the decoder knows that
+ * it needs to look for another sync sequence.
+ */
+static const u32 barrier_pkt[5] = {0x7fffffff, 0x7fffffff,
+ 0x7fffffff, 0x7fffffff, 0x0};
enum etm_addr_type {
ETM_ADDR_TYPE_NONE,
@@ -143,7 +149,7 @@ struct list_head *coresight_build_path(struct coresight_device *csdev,
struct coresight_device *sink);
void coresight_release_path(struct list_head *path);
-#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X
+#if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X)
extern int etm_readl_cp14(u32 off, unsigned int *val);
extern int etm_writel_cp14(u32 off, u32 val);
#else
diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c
index 3756e71cb8f5..2a2514fb9c95 100644
--- a/drivers/hwtracing/coresight/coresight-replicator.c
+++ b/drivers/hwtracing/coresight/coresight-replicator.c
@@ -40,7 +40,12 @@ struct replicator_drvdata {
static int replicator_enable(struct coresight_device *csdev, int inport,
int outport)
{
- struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct replicator_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
+
+ if (!try_module_get(module))
+ return -ENODEV;
dev_info(drvdata->dev, "REPLICATOR enabled\n");
return 0;
@@ -49,8 +54,11 @@ static int replicator_enable(struct coresight_device *csdev, int inport,
static void replicator_disable(struct coresight_device *csdev, int inport,
int outport)
{
- struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct replicator_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
+ module_put(module);
dev_info(drvdata->dev, "REPLICATOR disabled\n");
}
@@ -119,6 +127,17 @@ static int replicator_probe(struct platform_device *pdev)
return ret;
}
+static int __exit replicator_remove(struct platform_device *pdev)
+{
+ struct replicator_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
+
+ coresight_unregister(drvdata->csdev);
+
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+}
+
#ifdef CONFIG_PM
static int replicator_runtime_suspend(struct device *dev)
{
@@ -151,8 +170,11 @@ static const struct of_device_id replicator_match[] = {
{}
};
+MODULE_DEVICE_TABLE(of, replicator_match);
+
static struct platform_driver replicator_driver = {
.probe = replicator_probe,
+ .remove = replicator_remove,
.driver = {
.name = "coresight-replicator",
.of_match_table = replicator_match,
@@ -160,4 +182,9 @@ static struct platform_driver replicator_driver = {
.suppress_bind_attrs = true,
},
};
-builtin_platform_driver(replicator_driver);
+module_platform_driver(replicator_driver);
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("ARM Coresight Replicator Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c
index 15e7ef3891f5..6e7c7c4f22cd 100644
--- a/drivers/hwtracing/coresight/coresight-stm.c
+++ b/drivers/hwtracing/coresight/coresight-stm.c
@@ -201,7 +201,12 @@ static int stm_enable(struct coresight_device *csdev,
struct perf_event *event, u32 mode)
{
u32 val;
- struct stm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct stm_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
+
+ if (!try_module_get(module))
+ return -ENODEV;
if (mode != CS_MODE_SYSFS)
return -EINVAL;
@@ -889,6 +894,17 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id)
return ret;
}
+static int __exit stm_remove(struct amba_device *adev)
+{
+ struct stm_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ coresight_unregister(drvdata->csdev);
+
+ stm_unregister_device(&drvdata->stm);
+
+ return 0;
+}
+
#ifdef CONFIG_PM
static int stm_runtime_suspend(struct device *dev)
{
@@ -929,6 +945,8 @@ static const struct amba_id stm_ids[] = {
{ 0, 0},
};
+MODULE_DEVICE_TABLE(amba, stm_ids);
+
static struct amba_driver stm_driver = {
.drv = {
.name = "coresight-stm",
@@ -937,7 +955,12 @@ static struct amba_driver stm_driver = {
.suppress_bind_attrs = true,
},
.probe = stm_probe,
+ .remove = stm_remove,
.id_table = stm_ids,
};
-builtin_amba_driver(stm_driver);
+module_amba_driver(stm_driver);
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_DESCRIPTION("Arm CoreSight System Trace Macrocell driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
index e2513b786242..971f04d1a5b4 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
@@ -628,3 +628,5 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata)
return 0;
}
+
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 027d7f237ab2..5f00ef3c8627 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -341,3 +341,5 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
return 0;
}
+
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index 0ea04f588de0..3fe0fccb7367 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -437,6 +437,31 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
return ret;
}
+static int __exit tmc_remove(struct amba_device *adev)
+{
+ struct tmc_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ /* free ETB/ETF or ETR buffer allocations */
+ switch (drvdata->config_type) {
+ case TMC_CONFIG_TYPE_ETB:
+ case TMC_CONFIG_TYPE_ETF:
+ kfree(drvdata->buf);
+ break;
+ case TMC_CONFIG_TYPE_ETR:
+ if (drvdata->vaddr)
+ dma_free_coherent(drvdata->dev, drvdata->size,
+ drvdata->vaddr, drvdata->paddr);
+ break;
+ default:
+ break;
+ }
+
+ misc_deregister(&drvdata->miscdev);
+ coresight_unregister(drvdata->csdev);
+
+ return 0;
+}
+
static const struct amba_id tmc_ids[] = {
{
.id = 0x000bb961,
@@ -461,6 +486,8 @@ static const struct amba_id tmc_ids[] = {
{ 0, 0},
};
+MODULE_DEVICE_TABLE(amba, tmc_ids);
+
static struct amba_driver tmc_driver = {
.drv = {
.name = "coresight-tmc",
@@ -468,6 +495,11 @@ static struct amba_driver tmc_driver = {
.suppress_bind_attrs = true,
},
.probe = tmc_probe,
+ .remove = tmc_remove,
.id_table = tmc_ids,
};
-builtin_amba_driver(tmc_driver);
+module_amba_driver(tmc_driver);
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_DESCRIPTION("Arm CoreSight Trace Memory Controller driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c
index 805f7c2210fe..3fc208cca3a3 100644
--- a/drivers/hwtracing/coresight/coresight-tpiu.c
+++ b/drivers/hwtracing/coresight/coresight-tpiu.c
@@ -76,7 +76,12 @@ static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
static int tpiu_enable(struct coresight_device *csdev, u32 mode)
{
- struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct tpiu_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
+
+ if (!try_module_get(module))
+ return -ENODEV;
tpiu_enable_hw(drvdata);
@@ -102,10 +107,13 @@ static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
static void tpiu_disable(struct coresight_device *csdev)
{
- struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ struct device *parent_dev = csdev->dev.parent;
+ struct tpiu_drvdata *drvdata = dev_get_drvdata(parent_dev);
+ struct module *module = parent_dev->driver->owner;
tpiu_disable_hw(drvdata);
+ module_put(module);
dev_info(drvdata->dev, "TPIU disabled\n");
}
@@ -171,6 +179,15 @@ static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
return PTR_ERR_OR_ZERO(drvdata->csdev);
}
+static int __exit tpiu_remove(struct amba_device *adev)
+{
+ struct tpiu_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ coresight_unregister(drvdata->csdev);
+
+ return 0;
+}
+
#ifdef CONFIG_PM
static int tpiu_runtime_suspend(struct device *dev)
{
@@ -214,6 +231,8 @@ static const struct amba_id tpiu_ids[] = {
{ 0, 0},
};
+MODULE_DEVICE_TABLE(amba, tpiu_ids);
+
static struct amba_driver tpiu_driver = {
.drv = {
.name = "coresight-tpiu",
@@ -222,6 +241,12 @@ static struct amba_driver tpiu_driver = {
.suppress_bind_attrs = true,
},
.probe = tpiu_probe,
+ .remove = tpiu_remove,
.id_table = tpiu_ids,
};
-builtin_amba_driver(tpiu_driver);
+module_amba_driver(tpiu_driver);
+
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("Arm CoreSight TPIU (Trace Port Interface Unit) driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c
index 389c4baeca9d..5da8c3daba95 100644
--- a/drivers/hwtracing/coresight/coresight.c
+++ b/drivers/hwtracing/coresight/coresight.c
@@ -24,9 +24,32 @@
#include <linux/of_platform.h>
#include <linux/delay.h>
#include <linux/pm_runtime.h>
+#include <linux/sched.h>
#include "coresight-priv.h"
+#ifdef CONFIG_PID_NS
+unsigned long coresight_vpid_to_pid(unsigned long vpid)
+{
+ struct task_struct *task = NULL;
+ unsigned long pid = 0;
+
+ rcu_read_lock();
+ task = find_task_by_vpid(vpid);
+ if (task)
+ pid = task_pid_nr(task);
+ rcu_read_unlock();
+
+ return pid;
+}
+#else
+unsigned long coresight_vpid_to_pid(unsigned long vpid)
+{
+ return vpid;
+}
+#endif
+EXPORT_SYMBOL_GPL(coresight_vpid_to_pid);
+
static DEFINE_MUTEX(coresight_mutex);
/**
@@ -53,14 +76,6 @@ static DEFINE_PER_CPU(struct list_head *, tracer_path);
*/
static struct list_head *stm_path;
-/*
- * When losing synchronisation a new barrier packet needs to be inserted at the
- * beginning of the data collected in a buffer. That way the decoder knows that
- * it needs to look for another sync sequence.
- */
-const u32 barrier_pkt[5] = {0x7fffffff, 0x7fffffff,
- 0x7fffffff, 0x7fffffff, 0x0};
-
static int coresight_id_match(struct device *dev, void *data)
{
int trace_id, i_trace_id;
@@ -317,6 +332,7 @@ void coresight_disable_path(struct list_head *path)
}
}
}
+EXPORT_SYMBOL_GPL(coresight_disable_path);
int coresight_enable_path(struct list_head *path, u32 mode)
{
@@ -368,6 +384,7 @@ int coresight_enable_path(struct list_head *path, u32 mode)
coresight_disable_path(path);
goto out;
}
+EXPORT_SYMBOL_GPL(coresight_enable_path);
struct coresight_device *coresight_get_sink(struct list_head *path)
{
@@ -383,6 +400,7 @@ struct coresight_device *coresight_get_sink(struct list_head *path)
return csdev;
}
+EXPORT_SYMBOL_GPL(coresight_get_sink);
static int coresight_enabled_sink(struct device *dev, void *data)
{
@@ -407,6 +425,7 @@ static int coresight_enabled_sink(struct device *dev, void *data)
return 0;
}
+EXPORT_SYMBOL_GPL(coresight_enabled_sink);
/**
* coresight_get_enabled_sink - returns the first enabled sink found on the bus
@@ -429,6 +448,7 @@ struct coresight_device *coresight_get_enabled_sink(bool deactivate)
return dev ? to_coresight_device(dev) : NULL;
}
+EXPORT_SYMBOL_GPL(coresight_get_enabled_sink);
/**
* _coresight_build_path - recursively build a path from a @csdev to a sink.
@@ -508,6 +528,7 @@ struct list_head *coresight_build_path(struct coresight_device *source,
return path;
}
+EXPORT_SYMBOL_GPL(coresight_build_path);
/**
* coresight_release_path - release a previously built path.
@@ -532,6 +553,7 @@ void coresight_release_path(struct list_head *path)
kfree(path);
path = NULL;
}
+EXPORT_SYMBOL_GPL(coresight_release_path);
/** coresight_validate_source - make sure a source has the right credentials
* @csdev: the device structure for a source.
@@ -948,6 +970,7 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)
return -EAGAIN;
}
+EXPORT_SYMBOL_GPL(coresight_timeout);
struct bus_type coresight_bustype = {
.name = "coresight",
@@ -959,6 +982,12 @@ static int __init coresight_init(void)
}
postcore_initcall(coresight_init);
+static void __exit coresight_exit(void)
+{
+ bus_unregister(&coresight_bustype);
+}
+module_exit(coresight_exit);
+
struct coresight_device *coresight_register(struct coresight_desc *desc)
{
int i;
@@ -1056,3 +1085,7 @@ void coresight_unregister(struct coresight_device *csdev)
device_unregister(&csdev->dev);
}
EXPORT_SYMBOL_GPL(coresight_unregister);
+
+MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
+MODULE_DESCRIPTION("ARM Coresight Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index d950dad5056a..5863eb1a7335 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -243,7 +243,7 @@ struct coresight_ops {
const struct coresight_ops_source *source_ops;
};
-#ifdef CONFIG_CORESIGHT
+#if IS_ENABLED(CONFIG_CORESIGHT)
extern struct coresight_device *
coresight_register(struct coresight_desc *desc);
extern void coresight_unregister(struct coresight_device *csdev);
@@ -274,24 +274,5 @@ static inline struct coresight_platform_data *of_get_coresight_platform_data(
struct device *dev, const struct device_node *node) { return NULL; }
#endif
-#ifdef CONFIG_PID_NS
-static inline unsigned long
-coresight_vpid_to_pid(unsigned long vpid)
-{
- struct task_struct *task = NULL;
- unsigned long pid = 0;
-
- rcu_read_lock();
- task = find_task_by_vpid(vpid);
- if (task)
- pid = task_pid_nr(task);
- rcu_read_unlock();
-
- return pid;
-}
-#else
-static inline unsigned long
-coresight_vpid_to_pid(unsigned long vpid) { return vpid; }
-#endif
-
+extern unsigned long coresight_vpid_to_pid(unsigned long vpid);
#endif
--
2.17.0
^ permalink raw reply related
* [PATCH 4/4] coresight: remove CORESIGHT_LINKS_AND_SINKS dependencies
From: Kim Phillips @ 2018-05-08 19:06 UTC (permalink / raw)
To: linux-arm-kernel
A coresight topology doesn't need to include links anymore, i.e., a source can
be directly connected to a sink. As such the dependency is no longer needed.
Suggested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Kim Phillips <kim.phillips@arm.com>
---
drivers/hwtracing/coresight/Kconfig | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index 09a682013ea2..f1e05fbef257 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -30,7 +30,7 @@ config CORESIGHT_LINKS_AND_SINKS
config CORESIGHT_LINK_AND_SINK_TMC
tristate "Coresight generic TMC driver"
- depends on CORESIGHT_LINKS_AND_SINKS
+ depends on CORESIGHT
help
This enables support for the Trace Memory Controller driver.
Depending on its configuration the device can act as a link (embedded
@@ -43,7 +43,7 @@ config CORESIGHT_LINK_AND_SINK_TMC
config CORESIGHT_SINK_TPIU
tristate "Coresight generic TPIU driver"
- depends on CORESIGHT_LINKS_AND_SINKS
+ depends on CORESIGHT
help
This enables support for the Trace Port Interface Unit driver,
responsible for bridging the gap between the on-chip coresight
@@ -57,7 +57,7 @@ config CORESIGHT_SINK_TPIU
config CORESIGHT_SINK_ETBV10
tristate "Coresight ETBv1.0 driver"
- depends on CORESIGHT_LINKS_AND_SINKS
+ depends on CORESIGHT
help
This enables support for the Embedded Trace Buffer version 1.0 driver
that complies with the generic implementation of the component without
@@ -68,7 +68,7 @@ config CORESIGHT_SINK_ETBV10
config CORESIGHT_SOURCE_ETM3X
tristate "CoreSight Embedded Trace Macrocell 3.x driver"
- depends on !ARM64 && CORESIGHT_LINKS_AND_SINKS
+ depends on CORESIGHT && !ARM64
help
This driver provides support for processor ETM3.x and PTM1.x modules,
which allows tracing the instructions that a processor is executing
@@ -80,7 +80,7 @@ config CORESIGHT_SOURCE_ETM3X
config CORESIGHT_SOURCE_ETM4X
tristate "CoreSight Embedded Trace Macrocell 4.x driver"
- depends on ARM64 && CORESIGHT_LINKS_AND_SINKS
+ depends on CORESIGHT && ARM64
help
This driver provides support for the ETM4.x tracer module, tracing the
instructions that a processor is executing. This is primarily useful
@@ -92,7 +92,7 @@ config CORESIGHT_SOURCE_ETM4X
config CORESIGHT_DYNAMIC_REPLICATOR
tristate "CoreSight Programmable Replicator driver"
- depends on CORESIGHT_LINKS_AND_SINKS
+ depends on CORESIGHT
help
This enables support for dynamic CoreSight replicator link driver.
The programmable ATB replicator allows independent filtering of the
@@ -104,7 +104,7 @@ config CORESIGHT_DYNAMIC_REPLICATOR
config CORESIGHT_STM
tristate "CoreSight System Trace Macrocell driver"
depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64
- depends on STM && CORESIGHT_LINKS_AND_SINKS
+ depends on STM
help
This driver provides support for hardware assisted software
instrumentation based tracing. This is primarily used for
--
2.17.0
^ permalink raw reply related
* [PATCH 2/2] soc: imx: add SCU power domains driver
From: Ulf Hansson @ 2018-05-08 19:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1524855063-14996-3-git-send-email-aisheng.dong@nxp.com>
[...]
> +
> +static int __init imx_sc_init_pm_domains(void)
> +{
> + struct generic_pm_domain *pd;
> + struct device_node *np;
> + sc_err_t sci_err;
> +
> + if (!of_machine_is_compatible("fsl,imx8qxp"))
> + return 0;
> +
> + sci_err = sc_ipc_get_handle(&pm_ipc_handle);
> + if (sci_err != SC_ERR_NONE) {
> + pr_err("imx_sc_pd: can't get sc ipc handle\n");
> + return -ENODEV;
> + }
> +
> + for_each_matching_node(np, imx_sc_pm_domain_of_match) {
> + pd = imx_sc_pm_add_one_domain(np, NULL);
> + if (!IS_ERR(pd))
> + imx_sc_pm_add_subdomains(np, pd);
> + }
Perhaps using of_genpd_add_subdomain() may help here and possibly
could avoid some open coding!?
> +
> + return 0;
> +}
> +early_initcall(imx_sc_init_pm_domains);
Otherwise this looks good to me!
Kind regards
Uffe
^ permalink raw reply
* [PATCHv2 3/3] arm64: dts: stratix10: add sdram ecc
From: Dinh Nguyen @ 2018-05-08 19:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508085330.GA12190@pd.tnic>
Hi Boris,
On Tue, May 8, 2018 at 3:53 AM, Borislav Petkov <bp@alien8.de> wrote:
> On Mon, May 07, 2018 at 04:10:01PM -0500, Dinh Nguyen wrote:
>> Do you mind if I take this patch through arm-soc?
>
> Sure, but you have to give me an immutable branch which I can merge into
> my tree so that the functionality in 2/3 can get used when it lands in
> linux-next and later in mainline.
>
> So please take it and give me the tag (I see you're using tags) which
> you're sending up.
>
Please this tag socfpga_updates_for_v4.18_part2 at :
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git
Thanks,
Dinh
^ permalink raw reply
* [PATCH 3/4] coresight: allow to build as modules
From: Randy Dunlap @ 2018-05-08 19:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508140650.c070e6aa0eb1a6690e6d9607@arm.com>
Hi,
On 05/08/2018 12:06 PM, Kim Phillips wrote:
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
> Signed-off-by: Kim Phillips <kim.phillips@arm.com>
> ---
> drivers/hwtracing/coresight/Kconfig | 63 +++++++++++++------
> drivers/hwtracing/coresight/Makefile | 28 ++++++---
> .../hwtracing/coresight/coresight-cpu-debug.c | 2 +
> .../coresight/coresight-dynamic-replicator.c | 30 ++++++++-
> drivers/hwtracing/coresight/coresight-etb10.c | 32 +++++++++-
> .../hwtracing/coresight/coresight-etm-cp14.c | 4 ++
> .../hwtracing/coresight/coresight-etm-perf.c | 13 +++-
> .../hwtracing/coresight/coresight-etm-perf.h | 2 +-
> .../coresight/coresight-etm3x-sysfs.c | 6 ++
> drivers/hwtracing/coresight/coresight-etm3x.c | 37 ++++++++++-
> .../coresight/coresight-etm4x-sysfs.c | 6 ++
> drivers/hwtracing/coresight/coresight-etm4x.c | 38 ++++++++++-
> .../hwtracing/coresight/coresight-funnel.c | 30 ++++++++-
> drivers/hwtracing/coresight/coresight-priv.h | 10 ++-
> .../coresight/coresight-replicator.c | 33 +++++++++-
> drivers/hwtracing/coresight/coresight-stm.c | 27 +++++++-
> .../hwtracing/coresight/coresight-tmc-etf.c | 2 +
> .../hwtracing/coresight/coresight-tmc-etr.c | 2 +
> drivers/hwtracing/coresight/coresight-tmc.c | 34 +++++++++-
> drivers/hwtracing/coresight/coresight-tpiu.c | 31 ++++++++-
> drivers/hwtracing/coresight/coresight.c | 49 ++++++++++++---
> include/linux/coresight.h | 23 +------
> 22 files changed, 418 insertions(+), 84 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
> index ef9cb3c164e1..09a682013ea2 100644
> --- a/drivers/hwtracing/coresight/Kconfig
> +++ b/drivers/hwtracing/coresight/Kconfig
> @@ -2,8 +2,8 @@
> # Coresight configuration
> #
> menuconfig CORESIGHT
> - bool "CoreSight Tracing Support"
> - select ARM_AMBA
> + tristate "CoreSight Tracing Support"
> + depends on ARM_AMBA
> select PERF_EVENTS
> help
> This framework provides a kernel interface for the CoreSight debug
> @@ -12,17 +12,24 @@ menuconfig CORESIGHT
> specification and configure the right series of components when a
> trace source gets enabled.
>
> + To compile this code as a module, choose M here: the
> + module will be called coresight-core.
> +
> if CORESIGHT
> config CORESIGHT_LINKS_AND_SINKS
> - bool "CoreSight Link and Sink drivers"
> + tristate "CoreSight Link and Sink drivers"
> + depends on CORESIGHT
The "if CORESIGHT" line serves as a "depends on CORESIGHT" for the entire "if"
block, so please don't repeat the "depends on" here.
> help
> This enables support for CoreSight link and sink drivers that are
> responsible for transporting and collecting the trace data
> respectively. Link and sinks are dynamically aggregated with a trace
> entity at run time to form a complete trace path.
>
> + To compile this code as modules, choose M here: the
> + modules will be called coresight-funnel and coresight-replicator.
> +
> config CORESIGHT_LINK_AND_SINK_TMC
> - bool "Coresight generic TMC driver"
> + tristate "Coresight generic TMC driver"
> depends on CORESIGHT_LINKS_AND_SINKS
> help
> This enables support for the Trace Memory Controller driver.
> @@ -31,8 +38,11 @@ config CORESIGHT_LINK_AND_SINK_TMC
> complies with the generic implementation of the component without
> special enhancement or added features.
>
> + To compile this code as a module, choose M here: the
> + module will be called coresight-tmc-core.
> +
> config CORESIGHT_SINK_TPIU
> - bool "Coresight generic TPIU driver"
> + tristate "Coresight generic TPIU driver"
> depends on CORESIGHT_LINKS_AND_SINKS
> help
> This enables support for the Trace Port Interface Unit driver,
> @@ -42,57 +52,71 @@ config CORESIGHT_SINK_TPIU
> connected to an external host for use case capturing more traces than
> the on-board coresight memory can handle.
>
> + To compile this code as a module, choose M here: the
> + module will be called coresight-tpiu.
> +
> config CORESIGHT_SINK_ETBV10
> - bool "Coresight ETBv1.0 driver"
> + tristate "Coresight ETBv1.0 driver"
> depends on CORESIGHT_LINKS_AND_SINKS
> help
> This enables support for the Embedded Trace Buffer version 1.0 driver
> that complies with the generic implementation of the component without
> special enhancement or added features.
>
> + To compile this code as a module, choose M here: the
> + module will be called coresight-etb10.
> +
> config CORESIGHT_SOURCE_ETM3X
> - bool "CoreSight Embedded Trace Macrocell 3.x driver"
> - depends on !ARM64
> - select CORESIGHT_LINKS_AND_SINKS
> + tristate "CoreSight Embedded Trace Macrocell 3.x driver"
> + depends on !ARM64 && CORESIGHT_LINKS_AND_SINKS
> help
> This driver provides support for processor ETM3.x and PTM1.x modules,
> which allows tracing the instructions that a processor is executing
> This is primarily useful for instruction level tracing. Depending
> the ETM version data tracing may also be available.
>
> + To compile this code as a module, choose M here: the
> + module will be called coresight-etm3x-core.
> +
> config CORESIGHT_SOURCE_ETM4X
> - bool "CoreSight Embedded Trace Macrocell 4.x driver"
> - depends on ARM64
> - select CORESIGHT_LINKS_AND_SINKS
> + tristate "CoreSight Embedded Trace Macrocell 4.x driver"
> + depends on ARM64 && CORESIGHT_LINKS_AND_SINKS
> help
> This driver provides support for the ETM4.x tracer module, tracing the
> instructions that a processor is executing. This is primarily useful
> for instruction level tracing. Depending on the implemented version
> data tracing may also be available.
>
> + To compile this code as a module, choose M here: the
> + module will be called coresight-etm4x-core.
> +
> config CORESIGHT_DYNAMIC_REPLICATOR
> - bool "CoreSight Programmable Replicator driver"
> + tristate "CoreSight Programmable Replicator driver"
> depends on CORESIGHT_LINKS_AND_SINKS
> help
> This enables support for dynamic CoreSight replicator link driver.
> The programmable ATB replicator allows independent filtering of the
> trace data based on the traceid.
>
> + To compile this code as a module, choose M here: the
> + module will be called coresight-dynamic-replicator.
> +
> config CORESIGHT_STM
> - bool "CoreSight System Trace Macrocell driver"
> + tristate "CoreSight System Trace Macrocell driver"
> depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64
> - select CORESIGHT_LINKS_AND_SINKS
> - select STM
> + depends on STM && CORESIGHT_LINKS_AND_SINKS
> help
> This driver provides support for hardware assisted software
> instrumentation based tracing. This is primarily used for
> logging useful software events or data coming from various entities
> in the system, possibly running different OSs
>
> + To compile this code as a module, choose M here: the
> + module will be called coresight-stm.
> +
> config CORESIGHT_CPU_DEBUG
> tristate "CoreSight CPU Debug driver"
> - depends on ARM || ARM64
> - depends on DEBUG_FS
> + depends on CORESIGHT && DEBUG_FS
"depends on CORESIGHT" is not needed if this is still inside the
if CORESIGHT/endif block. (I think it is but I can't tell from just looking
at the patch itself.)
> help
> This driver provides support for coresight debugging module. This
> is primarily used to dump sample-based profiling registers when
> @@ -103,4 +127,7 @@ config CORESIGHT_CPU_DEBUG
> properly, please refer Documentation/trace/coresight-cpu-debug.txt
> for detailed description and the example for usage.
>
> + To compile this code as a module, choose M here: the
> + module will be called coresight-cpu-debug.
> +
> endif
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h
> index 3ffc9feb2d64..8c49c7b82d84 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.h
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h
> @@ -54,7 +54,7 @@ struct etm_filters {
> };
>
>
> -#ifdef CONFIG_CORESIGHT
> +#if IS_ENABLED(CONFIG_CORESIGHT)
Have you found (observed) that this change (above) is necessary (and others
like it below)? I thought that they would be equivalent.
>From include/linux/kconfig.h:
/*
* IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y' or 'm',
* 0 otherwise.
*/
#define IS_ENABLED(option) __or(IS_BUILTIN(option), IS_MODULE(option))
> diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
> index f1d0e21d8cab..335bca44b42d 100644
> --- a/drivers/hwtracing/coresight/coresight-priv.h
> +++ b/drivers/hwtracing/coresight/coresight-priv.h
> @@ -143,7 +149,7 @@ struct list_head *coresight_build_path(struct coresight_device *csdev,
> struct coresight_device *sink);
> void coresight_release_path(struct list_head *path);
>
> -#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X
> +#if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X)
ditto.
> extern int etm_readl_cp14(u32 off, unsigned int *val);
> extern int etm_writel_cp14(u32 off, u32 val);
> #else
> diff --git a/include/linux/coresight.h b/include/linux/coresight.h
> index d950dad5056a..5863eb1a7335 100644
> --- a/include/linux/coresight.h
> +++ b/include/linux/coresight.h
> @@ -243,7 +243,7 @@ struct coresight_ops {
> const struct coresight_ops_source *source_ops;
> };
>
> -#ifdef CONFIG_CORESIGHT
> +#if IS_ENABLED(CONFIG_CORESIGHT)
ditto.
thanks,
--
~Randy
^ permalink raw reply
* [arm-platforms:irq/level-msi 5/13] kernel/irq/msi.c:88:26: error: 'IRQCHIP_SUPPORTS_LEVEL_MSI' undeclared
From: kbuild test robot @ 2018-05-08 19:33 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git irq/level-msi
head: 0861f66578097d276094bf0c83e25c7ac0a28d2a
commit: f91d97462a9a4b2034e09826c1b758ece59646f8 [5/13] genirq/msi: Allow level-triggered MSIs to be exposed by MSI providers
config: x86_64-randconfig-u0-05090156 (attached as .config)
compiler: gcc-5 (Debian 5.5.0-3) 5.4.1 20171010
reproduce:
git checkout f91d97462a9a4b2034e09826c1b758ece59646f8
# save the attached .config to linux build tree
make ARCH=x86_64
Note: the arm-platforms/irq/level-msi HEAD 0861f66578097d276094bf0c83e25c7ac0a28d2a builds fine.
It only hurts bisectibility.
All errors (new ones prefixed by >>):
In file included from arch/x86/include/asm/bug.h:83:0,
from include/linux/bug.h:5,
from include/linux/debug_locks.h:7,
from include/linux/lockdep.h:28,
from include/linux/spinlock_types.h:18,
from include/linux/mutex.h:16,
from include/linux/kernfs.h:13,
from include/linux/sysfs.h:16,
from include/linux/kobject.h:20,
from include/linux/device.h:16,
from kernel/irq/msi.c:12:
kernel/irq/msi.c: In function 'msi_check_level':
>> kernel/irq/msi.c:88:26: error: 'IRQCHIP_SUPPORTS_LEVEL_MSI' undeclared (first use in this function)
(info->chip->flags & IRQCHIP_SUPPORTS_LEVEL_MSI)) &&
^
include/asm-generic/bug.h:112:25: note: in definition of macro 'WARN_ON'
int __ret_warn_on = !!(condition); \
^
kernel/irq/msi.c:88:26: note: each undeclared identifier is reported only once for each function it appears in
(info->chip->flags & IRQCHIP_SUPPORTS_LEVEL_MSI)) &&
^
include/asm-generic/bug.h:112:25: note: in definition of macro 'WARN_ON'
int __ret_warn_on = !!(condition); \
^
vim +/IRQCHIP_SUPPORTS_LEVEL_MSI +88 kernel/irq/msi.c
> 12 #include <linux/device.h>
13 #include <linux/irq.h>
14 #include <linux/irqdomain.h>
15 #include <linux/msi.h>
16 #include <linux/slab.h>
17
18 #include "internals.h"
19
20 /**
21 * alloc_msi_entry - Allocate an initialize msi_entry
22 * @dev: Pointer to the device for which this is allocated
23 * @nvec: The number of vectors used in this entry
24 * @affinity: Optional pointer to an affinity mask array size of @nvec
25 *
26 * If @affinity is not NULL then a an affinity array[@nvec] is allocated
27 * and the affinity masks from @affinity are copied.
28 */
29 struct msi_desc *
30 alloc_msi_entry(struct device *dev, int nvec, const struct cpumask *affinity)
31 {
32 struct msi_desc *desc;
33
34 desc = kzalloc(sizeof(*desc), GFP_KERNEL);
35 if (!desc)
36 return NULL;
37
38 INIT_LIST_HEAD(&desc->list);
39 desc->dev = dev;
40 desc->nvec_used = nvec;
41 if (affinity) {
42 desc->affinity = kmemdup(affinity,
43 nvec * sizeof(*desc->affinity), GFP_KERNEL);
44 if (!desc->affinity) {
45 kfree(desc);
46 return NULL;
47 }
48 }
49
50 return desc;
51 }
52
53 void free_msi_entry(struct msi_desc *entry)
54 {
55 kfree(entry->affinity);
56 kfree(entry);
57 }
58
59 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
60 {
61 *msg = entry->msg;
62 }
63
64 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
65 {
66 struct msi_desc *entry = irq_get_msi_desc(irq);
67
68 __get_cached_msi_msg(entry, msg);
69 }
70 EXPORT_SYMBOL_GPL(get_cached_msi_msg);
71
72 #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
73 static inline void irq_chip_write_msi_msg(struct irq_data *data,
74 struct msi_msg *msg)
75 {
76 data->chip->irq_write_msi_msg(data, msg);
77 }
78
79 static void msi_check_level(struct irq_domain *domain, struct msi_msg *msg)
80 {
81 struct msi_domain_info *info = domain->host_data;
82
83 /*
84 * If the MSI provider has messed with the second message and
85 * not advertized that it is level-capable, signal the breakage.
86 */
87 WARN_ON(!((info->flags & MSI_FLAG_LEVEL_CAPABLE) &&
> 88 (info->chip->flags & IRQCHIP_SUPPORTS_LEVEL_MSI)) &&
89 (msg[1].address_lo || msg[1].address_hi || msg[1].data));
90 }
91
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH v3 1/3] leds: triggers: provide led_trigger_register_format()
From: Jacek Anaszewski @ 2018-05-08 19:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508100543.12559-2-u.kleine-koenig@pengutronix.de>
Hi Uwe,
Thank you for the patch. It looks fine, but please split
the drivers/net/can/led.c related changes into a separate one.
Best regards,
Jacek Anaszewski
On 05/08/2018 12:05 PM, Uwe Kleine-K?nig wrote:
> This allows one to simplify drivers that provide a trigger with a
> non-constant name (e.g. one trigger per device with the trigger name
> depending on the device's name).
>
> Internally the memory the name member of struct led_trigger points to
> now always allocated dynamically instead of just taken from the caller.
>
> The function led_trigger_rename_static() must be changed accordingly and
> was renamed to led_trigger_rename() for consistency, with the only user
> adapted.
>
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> ---
> drivers/leds/led-triggers.c | 84 +++++++++++++++++++++++++++----------
> drivers/net/can/led.c | 6 +--
> include/linux/leds.h | 30 +++++++------
> 3 files changed, 81 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/leds/led-triggers.c b/drivers/leds/led-triggers.c
> index 431123b048a2..5d8bb504b07b 100644
> --- a/drivers/leds/led-triggers.c
> +++ b/drivers/leds/led-triggers.c
> @@ -175,18 +175,34 @@ void led_trigger_set_default(struct led_classdev *led_cdev)
> }
> EXPORT_SYMBOL_GPL(led_trigger_set_default);
>
> -void led_trigger_rename_static(const char *name, struct led_trigger *trig)
> +int led_trigger_rename(struct led_trigger *trig, const char *fmt, ...)
> {
> - /* new name must be on a temporary string to prevent races */
> - BUG_ON(name == trig->name);
> + const char *prevname;
> + const char *newname;
> + va_list args;
> +
> + if (!trig)
> + return 0;
> +
> + va_start(args, fmt);
> + newname = kvasprintf_const(GFP_KERNEL, fmt, args);
> + va_end(args);
> +
> + if (!newname) {
> + pr_err("Failed to allocate new name for trigger %s\n", trig->name);
> + return -ENOMEM;
> + }
>
> down_write(&triggers_list_lock);
> - /* this assumes that trig->name was originaly allocated to
> - * non constant storage */
> - strcpy((char *)trig->name, name);
> + prevname = trig->name;
> + trig->name = newname;
> up_write(&triggers_list_lock);
> +
> + kfree_const(prevname);
> +
> + return 0;
> }
> -EXPORT_SYMBOL_GPL(led_trigger_rename_static);
> +EXPORT_SYMBOL_GPL(led_trigger_rename);
>
> /* LED Trigger Interface */
>
> @@ -333,34 +349,56 @@ void led_trigger_blink_oneshot(struct led_trigger *trig,
> }
> EXPORT_SYMBOL_GPL(led_trigger_blink_oneshot);
>
> -void led_trigger_register_simple(const char *name, struct led_trigger **tp)
> +int led_trigger_register_format(struct led_trigger **tp, const char *fmt, ...)
> {
> + va_list args;
> struct led_trigger *trig;
> - int err;
> + int err = -ENOMEM;
> + const char *name;
> +
> + va_start(args, fmt);
> + name = kvasprintf_const(GFP_KERNEL, fmt, args);
> + va_end(args);
>
> trig = kzalloc(sizeof(struct led_trigger), GFP_KERNEL);
>
> - if (trig) {
> - trig->name = name;
> - err = led_trigger_register(trig);
> - if (err < 0) {
> - kfree(trig);
> - trig = NULL;
> - pr_warn("LED trigger %s failed to register (%d)\n",
> - name, err);
> - }
> - } else {
> - pr_warn("LED trigger %s failed to register (no memory)\n",
> - name);
> - }
> + if (!name || !trig)
> + goto err;
> +
> + trig->name = name;
> +
> + err = led_trigger_register(trig);
> + if (err < 0)
> + goto err;
> +
> *tp = trig;
> +
> + return 0;
> +
> +err:
> + kfree(trig);
> + kfree_const(name);
> +
> + *tp = NULL;
> +
> + return err;
> +}
> +EXPORT_SYMBOL_GPL(led_trigger_register_format);
> +
> +void led_trigger_register_simple(const char *name, struct led_trigger **tp)
> +{
> + int ret = led_trigger_register_format(tp, "%s", name);
> + if (ret < 0)
> + pr_warn("LED trigger %s failed to register (%d)\n", name, ret);
> }
> EXPORT_SYMBOL_GPL(led_trigger_register_simple);
>
> void led_trigger_unregister_simple(struct led_trigger *trig)
> {
> - if (trig)
> + if (trig) {
> led_trigger_unregister(trig);
> + kfree_const(trig->name);
> + }
> kfree(trig);
> }
> EXPORT_SYMBOL_GPL(led_trigger_unregister_simple);
> diff --git a/drivers/net/can/led.c b/drivers/net/can/led.c
> index c1b667675fa1..2d7d1b0d20f9 100644
> --- a/drivers/net/can/led.c
> +++ b/drivers/net/can/led.c
> @@ -115,13 +115,13 @@ static int can_led_notifier(struct notifier_block *nb, unsigned long msg,
>
> if (msg == NETDEV_CHANGENAME) {
> snprintf(name, sizeof(name), "%s-tx", netdev->name);
> - led_trigger_rename_static(name, priv->tx_led_trig);
> + led_trigger_rename(priv->tx_led_trig, name);
>
> snprintf(name, sizeof(name), "%s-rx", netdev->name);
> - led_trigger_rename_static(name, priv->rx_led_trig);
> + led_trigger_rename(priv->rx_led_trig, name);
>
> snprintf(name, sizeof(name), "%s-rxtx", netdev->name);
> - led_trigger_rename_static(name, priv->rxtx_led_trig);
> + led_trigger_rename(priv->rxtx_led_trig, name);
> }
>
> return NOTIFY_DONE;
> diff --git a/include/linux/leds.h b/include/linux/leds.h
> index b7e82550e655..e706c28bb35b 100644
> --- a/include/linux/leds.h
> +++ b/include/linux/leds.h
> @@ -275,6 +275,8 @@ extern void led_trigger_unregister(struct led_trigger *trigger);
> extern int devm_led_trigger_register(struct device *dev,
> struct led_trigger *trigger);
>
> +extern int led_trigger_register_format(struct led_trigger **trigger,
> + const char *fmt, ...);
> extern void led_trigger_register_simple(const char *name,
> struct led_trigger **trigger);
> extern void led_trigger_unregister_simple(struct led_trigger *trigger);
> @@ -298,28 +300,25 @@ static inline void *led_get_trigger_data(struct led_classdev *led_cdev)
> }
>
> /**
> - * led_trigger_rename_static - rename a trigger
> - * @name: the new trigger name
> + * led_trigger_rename - rename a trigger
> * @trig: the LED trigger to rename
> + * @fmt: format string for new name
> *
> - * Change a LED trigger name by copying the string passed in
> - * name into current trigger name, which MUST be large
> - * enough for the new string.
> - *
> - * Note that name must NOT point to the same string used
> - * during LED registration, as that could lead to races.
> - *
> - * This is meant to be used on triggers with statically
> - * allocated name.
> + * rebaptize the given trigger.
> */
> -extern void led_trigger_rename_static(const char *name,
> - struct led_trigger *trig);
> +extern int led_trigger_rename(struct led_trigger *trig, const char *fmt, ...);
>
> #else
>
> /* Trigger has no members */
> struct led_trigger {};
>
> +static inline int led_trigger_register_format(struct led_trigger **trigger,
> + const char *fmt, ...)
> +{
> + return 0;
> +}
> +
> /* Trigger inline empty functions */
> static inline void led_trigger_register_simple(const char *name,
> struct led_trigger **trigger) {}
> @@ -342,6 +341,11 @@ static inline void *led_get_trigger_data(struct led_classdev *led_cdev)
> return NULL;
> }
>
> +static inline int led_trigger_rename(struct led_trigger *trig, const char *fmt, ...)
> +{
> + return 0;
> +}
> +
> #endif /* CONFIG_LEDS_TRIGGERS */
>
> /* Trigger specific functions */
>
^ permalink raw reply
* [PATCH v2 26/27] coresight: perf: Remove reset_buffer call back for sinks
From: Mathieu Poirier @ 2018-05-08 19:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525165857-11096-27-git-send-email-suzuki.poulose@arm.com>
On Tue, May 01, 2018 at 10:10:56AM +0100, Suzuki K Poulose wrote:
> Right now we issue an update_buffer() and reset_buffer() call backs
> in succession when we stop tracing an event. The update_buffer is
> supposed to check the status of the buffer and make sure the ring buffer
> is updated with the trace data. And we store information about the
> size of the data collected only to be consumed by the reset_buffer
> callback which always follows the update_buffer. This was originally
> designed for handling future IPs which could trigger a buffer overflow
> interrupt. This patch gets rid of the reset_buffer callback altogether
> and performs the actions in update_buffer, making it return the size
> collected. We can always add the support for handling the overflow
> interrupt case later.
>
> This removes some not-so pretty hack (storing the new head in the
> size field for snapshot mode) and cleans it up a little bit.
IPs with an overflow interrupts will be arriving shortly, so it is not like the
future is uncertain - they are coming. Right now the logic is there - I don't
see a real need to consolidate things only to split it again in the near future.
I agree the part about overloading buf->data_size with the head of the ring
buffer when operating in snapshot mode isn't pretty (though well documented).
If anything that can be improve, i.e add a buf->head and things will be clear.
Once again this could be part of another patchset.
>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> drivers/hwtracing/coresight/coresight-etb10.c | 56 +++++------------------
> drivers/hwtracing/coresight/coresight-etm-perf.c | 9 +---
> drivers/hwtracing/coresight/coresight-tmc-etf.c | 58 +++++-------------------
> include/linux/coresight.h | 5 +-
> 4 files changed, 26 insertions(+), 102 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c
> index d9c2f87..b13712a 100644
> --- a/drivers/hwtracing/coresight/coresight-etb10.c
> +++ b/drivers/hwtracing/coresight/coresight-etb10.c
> @@ -322,37 +322,7 @@ static int etb_set_buffer(struct coresight_device *csdev,
> return ret;
> }
>
> -static unsigned long etb_reset_buffer(struct coresight_device *csdev,
> - struct perf_output_handle *handle,
> - void *sink_config)
> -{
> - unsigned long size = 0;
> - struct cs_buffers *buf = sink_config;
> -
> - if (buf) {
> - /*
> - * In snapshot mode ->data_size holds the new address of the
> - * ring buffer's head. The size itself is the whole address
> - * range since we want the latest information.
> - */
> - if (buf->snapshot)
> - handle->head = local_xchg(&buf->data_size,
> - buf->nr_pages << PAGE_SHIFT);
> -
> - /*
> - * Tell the tracer PMU how much we got in this run and if
> - * something went wrong along the way. Nobody else can use
> - * this cs_buffers instance until we are done. As such
> - * resetting parameters here and squaring off with the ring
> - * buffer API in the tracer PMU is fine.
> - */
> - size = local_xchg(&buf->data_size, 0);
> - }
> -
> - return size;
> -}
> -
> -static void etb_update_buffer(struct coresight_device *csdev,
> +static unsigned long etb_update_buffer(struct coresight_device *csdev,
> struct perf_output_handle *handle,
> void *sink_config)
> {
> @@ -361,13 +331,13 @@ static void etb_update_buffer(struct coresight_device *csdev,
> u8 *buf_ptr;
> const u32 *barrier;
> u32 read_ptr, write_ptr, capacity;
> - u32 status, read_data, to_read;
> - unsigned long offset;
> + u32 status, read_data;
> + unsigned long offset, to_read;
> struct cs_buffers *buf = sink_config;
> struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
>
> if (!buf)
> - return;
> + return 0;
>
> capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS;
>
> @@ -472,18 +442,17 @@ static void etb_update_buffer(struct coresight_device *csdev,
> writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
>
> /*
> - * In snapshot mode all we have to do is communicate to
> - * perf_aux_output_end() the address of the current head. In full
> - * trace mode the same function expects a size to move rb->aux_head
> - * forward.
> + * In snapshot mode we have to update the handle->head to point
> + * to the new location.
> */
> - if (buf->snapshot)
> - local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
> - else
> - local_add(to_read, &buf->data_size);
> -
> + if (buf->snapshot) {
> + handle->head = (cur * PAGE_SIZE) + offset;
> + to_read = buf->nr_pages << PAGE_SHIFT;
> + }
> etb_enable_hw(drvdata);
> CS_LOCK(drvdata->base);
> +
> + return to_read;
> }
>
> static const struct coresight_ops_sink etb_sink_ops = {
> @@ -492,7 +461,6 @@ static const struct coresight_ops_sink etb_sink_ops = {
> .alloc_buffer = etb_alloc_buffer,
> .free_buffer = etb_free_buffer,
> .set_buffer = etb_set_buffer,
> - .reset_buffer = etb_reset_buffer,
> .update_buffer = etb_update_buffer,
> };
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> index 4e5ed65..5096def 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> @@ -342,15 +342,8 @@ static void etm_event_stop(struct perf_event *event, int mode)
> if (!sink_ops(sink)->update_buffer)
> return;
>
> - sink_ops(sink)->update_buffer(sink, handle,
> + size = sink_ops(sink)->update_buffer(sink, handle,
> event_data->snk_config);
> -
> - if (!sink_ops(sink)->reset_buffer)
> - return;
> -
> - size = sink_ops(sink)->reset_buffer(sink, handle,
> - event_data->snk_config);
> -
> perf_aux_output_end(handle, size);
> }
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> index 0a32734..75ef5c4 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> @@ -360,36 +360,7 @@ static int tmc_set_etf_buffer(struct coresight_device *csdev,
> return ret;
> }
>
> -static unsigned long tmc_reset_etf_buffer(struct coresight_device *csdev,
> - struct perf_output_handle *handle,
> - void *sink_config)
> -{
> - long size = 0;
> - struct cs_buffers *buf = sink_config;
> -
> - if (buf) {
> - /*
> - * In snapshot mode ->data_size holds the new address of the
> - * ring buffer's head. The size itself is the whole address
> - * range since we want the latest information.
> - */
> - if (buf->snapshot)
> - handle->head = local_xchg(&buf->data_size,
> - buf->nr_pages << PAGE_SHIFT);
> - /*
> - * Tell the tracer PMU how much we got in this run and if
> - * something went wrong along the way. Nobody else can use
> - * this cs_buffers instance until we are done. As such
> - * resetting parameters here and squaring off with the ring
> - * buffer API in the tracer PMU is fine.
> - */
> - size = local_xchg(&buf->data_size, 0);
> - }
> -
> - return size;
> -}
> -
> -static void tmc_update_etf_buffer(struct coresight_device *csdev,
> +static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev,
> struct perf_output_handle *handle,
> void *sink_config)
> {
> @@ -398,17 +369,17 @@ static void tmc_update_etf_buffer(struct coresight_device *csdev,
> const u32 *barrier;
> u32 *buf_ptr;
> u64 read_ptr, write_ptr;
> - u32 status, to_read;
> - unsigned long offset;
> + u32 status;
> + unsigned long offset, to_read;
> struct cs_buffers *buf = sink_config;
> struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
>
> if (!buf)
> - return;
> + return 0;
>
> /* This shouldn't happen */
> if (WARN_ON_ONCE(drvdata->mode != CS_MODE_PERF))
> - return;
> + return 0;
>
> CS_UNLOCK(drvdata->base);
>
> @@ -497,18 +468,14 @@ static void tmc_update_etf_buffer(struct coresight_device *csdev,
> }
> }
>
> - /*
> - * In snapshot mode all we have to do is communicate to
> - * perf_aux_output_end() the address of the current head. In full
> - * trace mode the same function expects a size to move rb->aux_head
> - * forward.
> - */
> - if (buf->snapshot)
> - local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
> - else
> - local_add(to_read, &buf->data_size);
> -
> + /* In snapshot mode we have to update the head */
> + if (buf->snapshot) {
> + handle->head = (cur * PAGE_SIZE) + offset;
> + to_read = buf->nr_pages << PAGE_SHIFT;
> + }
> CS_LOCK(drvdata->base);
> +
> + return to_read;
> }
>
> static const struct coresight_ops_sink tmc_etf_sink_ops = {
> @@ -517,7 +484,6 @@ static const struct coresight_ops_sink tmc_etf_sink_ops = {
> .alloc_buffer = tmc_alloc_etf_buffer,
> .free_buffer = tmc_free_etf_buffer,
> .set_buffer = tmc_set_etf_buffer,
> - .reset_buffer = tmc_reset_etf_buffer,
> .update_buffer = tmc_update_etf_buffer,
> };
>
> diff --git a/include/linux/coresight.h b/include/linux/coresight.h
> index c0e1568..41b3729 100644
> --- a/include/linux/coresight.h
> +++ b/include/linux/coresight.h
> @@ -212,10 +212,7 @@ struct coresight_ops_sink {
> int (*set_buffer)(struct coresight_device *csdev,
> struct perf_output_handle *handle,
> void *sink_config);
> - unsigned long (*reset_buffer)(struct coresight_device *csdev,
> - struct perf_output_handle *handle,
> - void *sink_config);
> - void (*update_buffer)(struct coresight_device *csdev,
> + unsigned long (*update_buffer)(struct coresight_device *csdev,
> struct perf_output_handle *handle,
> void *sink_config);
> };
> --
> 2.7.4
>
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