* [PATCH 6/8] serial: Add Tegra Combined UART driver
From: Andy Shevchenko @ 2018-05-13 14:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508114403.14499-7-mperttunen@nvidia.com>
On Tue, May 8, 2018 at 2:44 PM, Mikko Perttunen <mperttunen@nvidia.com> wrote:
> The Tegra Combined UART (TCU) is a mailbox-based mechanism that allows
> multiplexing multiple "virtual UARTs" into a single hardware serial
> port. The TCU is the primary serial port on Tegra194 devices.
>
> Add a TCU driver utilizing the mailbox framework, as the used mailboxes
> are part of Tegra HSP blocks that are already controlled by the Tegra
> HSP mailbox driver.
First question, can it be done utilizing SERDEV framework?
> +static void tegra_tcu_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
> +{
> + (void)port;
> + (void)mctrl;
Huh?
> +}
> +static void tegra_tcu_uart_stop_tx(struct uart_port *port)
> +{
> + (void)port;
> +}
Ditto.
> + if (written == 3) {
> + value |= 3 << 24;
> + value |= BIT(26);
> + mbox_send_message(tcu->tx, &value);
> + }
(1)
> + }
> +
> + if (written) {
> + value |= written << 24;
> + value |= BIT(26);
> + mbox_send_message(tcu->tx, &value);
> + }
(2)
These are code duplications.
> +static void tegra_tcu_uart_stop_rx(struct uart_port *port)
> +{
> + (void)port;
> +}
> +
> +static void tegra_tcu_uart_break_ctl(struct uart_port *port, int ctl)
> +{
> + (void)port;
> + (void)ctl;
> +}
> +
> +static int tegra_tcu_uart_startup(struct uart_port *port)
> +{
> + (void)port;
> +
> + return 0;
> +}
> +
> +static void tegra_tcu_uart_shutdown(struct uart_port *port)
> +{
> + (void)port;
> +}
> +
> +static void tegra_tcu_uart_set_termios(struct uart_port *port,
> + struct ktermios *new,
> + struct ktermios *old)
> +{
> + (void)port;
> + (void)new;
> + (void)old;
> +}
Remove those unused stub contents.
> + return uart_set_options(&tegra_tcu_uart_port, cons,
> + 115200, 'n', 8, 'n');
Can't it be one line?
> +static void tegra_tcu_receive(struct mbox_client *client, void *msg_p)
> +{
> + struct tty_port *port = &tegra_tcu_uart_port.state->port;
> + uint32_t msg = *(uint32_t *)msg_p;
Redundant casting.
> + unsigned int num_bytes;
> + int i;
> +
> + num_bytes = (msg >> 24) & 0x3;
Two magic numbers.
> + for (i = 0; i < num_bytes; i++)
> + tty_insert_flip_char(port, (msg >> (i*8)) & 0xff, TTY_NORMAL);
> +
> + tty_flip_buffer_push(port);
> +}
> +MODULE_AUTHOR("Mikko Perttunen <mperttunen@nvidia.com>");
> +MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("NVIDIA Tegra Combined UART driver");
> diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
> index dce5f9dae121..eaf3c303cba6 100644
> --- a/include/uapi/linux/serial_core.h
> +++ b/include/uapi/linux/serial_core.h
> @@ -281,4 +281,7 @@
> /* MediaTek BTIF */
> #define PORT_MTK_BTIF 117
>
> +/* NVIDIA Tegra Combined UART */
> +#define PORT_TEGRA_TCU 118
Check if there is an unused gap. IIRC we still have one near to 40ish.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH v3 3/3] tty: implement led triggers
From: Andy Shevchenko @ 2018-05-13 14:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508100543.12559-4-u.kleine-koenig@pengutronix.de>
On Tue, May 8, 2018 at 1:05 PM, Uwe Kleine-K?nig
<u.kleine-koenig@pengutronix.de> wrote:
> The rx trigger fires when data is pushed to the ldisc by the driver. This
> is a bit later than the actual receiving of data but has the nice benefit
> that it doesn't need adaption for each driver and isn't in the hot path.
>
> Similarly the tx trigger fires when data was copied from userspace and is
> given to the ldisc.
> #include <uapi/linux/tty.h>
> #include <linux/rwsem.h>
> #include <linux/llist.h>
> +#include <linux/leds.h>
Even for unordered lists of inclusions I would still try to put new
lines in "somehow" ordered positions.
For example here, I would rather put it before llist.h.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH v3 1/3] leds: triggers: provide led_trigger_register_format()
From: Andy Shevchenko @ 2018-05-13 14:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180510112229.GE6977@amd>
On Thu, May 10, 2018 at 2:22 PM, Pavel Machek <pavel@ucw.cz> wrote:
> On Thu 2018-05-10 13:21:01, Pavel Machek wrote:
>> I know this is not your fault, but if you have a space or "[]" in
>> netdev names, confusing things will happen.
>
> Hmm. If we are doing this we really should check trigger names for
> forbidden characters. At least "[] " should be forbidden.
So, string_escape_mem() is your helper here.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH v1 11/13] dt-bindings: power: add PX30 SoCs header for power-domain
From: Tao Huang @ 2018-05-13 15:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <508694354.7btLQf7nsA@phil>
Hi Heiko:
On 2018?05?12? 06:11, Heiko Stuebner wrote:
> Here I have a naming question. When looking at the vendor kernel
> it looks like the px30 is largely related to the rk3326.
> (rk3326.dtsi includeing the px30.dtsi)
>
> What is the reason for basing the naming on the px30 this time? And could
> we possibly keep to rkXXXX names for the basic things in the kernel, thus
> keeping the pxXX as second name, like with the other px-variants before?
>
PX30 and RK3326 are different chips. PX30 has more features. You can simply think that RK3326 is a subset of PX30. The RK3326 is more like a PX30 derivative chip. This is not the same as the previous chips.
So we use PX30 instead of RK3326 for name, and the opening document is only for PX30, we think this is more convenient for developers.
Best Regards,
Tao Huang
^ permalink raw reply
* [PATCH 6/8] serial: Add Tegra Combined UART driver
From: Jassi Brar @ 2018-05-13 15:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508114403.14499-7-mperttunen@nvidia.com>
On Tue, May 8, 2018 at 5:14 PM, Mikko Perttunen <mperttunen@nvidia.com> wrote:
....
>
> +config SERIAL_TEGRA_TCU
> + tristate "NVIDIA Tegra Combined UART"
> + depends on ARCH_TEGRA && MAILBOX
> + select SERIAL_CORE
> + help
> + Support for the mailbox-based TCU (Tegra Combined UART) serial port.
> + TCU is a virtual serial port that allows multiplexing multiple data
> + streams into a single hardware serial port.
> +
Maybe make it depend upon TEGRA_HSP_MBOX ?
......
> +
> +static void tegra_tcu_write(const char *s, unsigned int count)
> +{
> + struct tegra_tcu *tcu = tegra_tcu_uart_port.private_data;
> + unsigned int written = 0, i = 0;
> + bool insert_nl = false;
> + uint32_t value = 0;
> +
> + while (i < count) {
> + if (insert_nl) {
> + value |= '\n' << (written++ * 8);
> + insert_nl = false;
> + i++;
> + } else if (s[i] == '\n') {
> + value |= '\r' << (written++ * 8);
> + insert_nl = true;
> + } else {
> + value |= s[i++] << (written++ * 8);
> + }
> +
> + if (written == 3) {
> + value |= 3 << 24;
> + value |= BIT(26);
> + mbox_send_message(tcu->tx, &value);
>
How is this supposed to work? tegra_hsp_doorbell_send_data() ignores
the second argument.
^ permalink raw reply
* [GIT PULL 0/5] ARM: samsung/exynos: Stuff for v4.18
From: Krzysztof Kozlowski @ 2018-05-13 15:42 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Changes for v4.18. No dependencies, no specific order of pulls.
Support for Exynos5440 is removed step by step through different trees.
Best regards,
Krzysztof
^ permalink raw reply
* [GIT PULL 1/5] ARM: defconfig: Exynos for v4.18
From: Krzysztof Kozlowski @ 2018-05-13 15:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513154238.22508-1-krzk@kernel.org>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-defconfig-4.18
for you to fetch changes up to b0121046cacdbc99475871aceb2e9e57995c2ba1:
ARM: multi_v7_config: enable S6E63J0X03 panel driver (2018-04-16 20:22:28 +0200)
----------------------------------------------------------------
Samsung defconfig changes for v4.18
1. Enable Samsung S6E63J0X03 DSI panel.
----------------------------------------------------------------
Marek Szyprowski (2):
ARM: exynos_defconfig: enable S6E63J0X03 panel driver
ARM: multi_v7_config: enable S6E63J0X03 panel driver
arch/arm/configs/exynos_defconfig | 1 +
arch/arm/configs/multi_v7_defconfig | 1 +
2 files changed, 2 insertions(+)
^ permalink raw reply
* [GIT PULL 2/5] soc: samsung: Stuff for v4.18
From: Krzysztof Kozlowski @ 2018-05-13 15:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513154238.22508-1-krzk@kernel.org>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-drivers-4.18
for you to fetch changes up to b2b568c591ddbb20d597e256212579d70dbf3000:
soc: samsung: pm_domains: Deprecate support for clocks (2018-04-17 17:25:42 +0200)
----------------------------------------------------------------
Samsung soc drivers changes for v4.18
1. Clock operations during power domain on/off were moved to respective
clock driver so clean up obsolete code from power domain driver.
----------------------------------------------------------------
Marek Szyprowski (1):
soc: samsung: pm_domains: Deprecate support for clocks
.../devicetree/bindings/power/pd-samsung.txt | 20 +----
drivers/soc/samsung/pm_domains.c | 90 +---------------------
2 files changed, 5 insertions(+), 105 deletions(-)
^ permalink raw reply
* [GIT PULL 3/5] ARM: dts: exynos: Stuff for v4.18
From: Krzysztof Kozlowski @ 2018-05-13 15:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513154238.22508-1-krzk@kernel.org>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-dt-4.18
for you to fetch changes up to 83cb529b2ef4f3446e60e75522d76fdaaea4724c:
ARM: dts: exynos: Update x and y properties for mms114 touchscreen (2018-05-13 15:15:49 +0200)
----------------------------------------------------------------
Samsung DTS ARM changes for v4.18
1. Add support for USB OTG port on Origen board.
2. Allow earlycon on Rinato board.
3. Cleanup from obsolete properties.
4. Fix DTC warnings.
5. Remove Exynos5440 entirely.
6. Add mem-2-mem Scaler devices.
----------------------------------------------------------------
Andi Shyti (1):
ARM: dts: exynos: Update x and y properties for mms114 touchscreen
Andrzej Pietrasiewicz (1):
ARM: dts: exynos: Add mem-2-mem Scaler devices
Krzysztof Kozlowski (11):
ARM: dts: exynos: Move syscon poweroff and restart nodes under the PMU
ARM: dts: exynos: Fix invalid node referenced by i2c20 alias in Peach Pit and Pi
ARM: dts: exynos: Remove unnecessary address/size properties in Midas boards
ARM: dts: exynos: Remove unnecessary address/size properties in Origen
ARM: dts: exynos: Remove regulators node container in Origen and N710x
ARM: dts: exynos: Bring order in fixed-regulators naming in Midas boards
ARM: dts: exynos: Remove unnecessary address/size properties in dp-controller of Exynos5
ARM: dts: exynos: Remove Exynos5440
ARM: dts: s3c24xx: Remove skeleton.dtsi and fix DTC warning for /memory
ARM: dts: s3c24xx: Fix unnecessary address/size cells DTC warnings
ARM: dts: s3c64xx: Remove skeleton.dtsi and fix DTC warnings for /memory
Marek Szyprowski (3):
ARM: dts: exynos: Add support for USB OTG port on Origen board
ARM: dts: exynos: Add serial path for Rinato board to get earlycon support
ARM: dts: exynos: Remove obsolete clock properties from power domains
Mathieu Malaterre (1):
ARM: dts: exynos/s3c: Remove leading 0x and 0s from bindings notation
.../bindings/arm/samsung/samsung-boards.txt | 2 -
arch/arm/boot/dts/Makefile | 2 -
arch/arm/boot/dts/exynos-syscon-restart.dtsi | 28 +-
arch/arm/boot/dts/exynos3250-rinato.dts | 4 +
arch/arm/boot/dts/exynos3250.dtsi | 2 +-
arch/arm/boot/dts/exynos4.dtsi | 3 +-
arch/arm/boot/dts/exynos4210-origen.dts | 34 +-
arch/arm/boot/dts/exynos4210-trats.dts | 4 +-
arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi | 36 +--
arch/arm/boot/dts/exynos4412-midas.dtsi | 86 +++--
arch/arm/boot/dts/exynos4412-n710x.dts | 16 +-
arch/arm/boot/dts/exynos4412-origen.dts | 2 +-
arch/arm/boot/dts/exynos4412.dtsi | 2 +-
arch/arm/boot/dts/exynos5.dtsi | 3 -
arch/arm/boot/dts/exynos5250.dtsi | 7 +-
arch/arm/boot/dts/exynos5410.dtsi | 1 +
arch/arm/boot/dts/exynos5420-peach-pit.dts | 4 +-
arch/arm/boot/dts/exynos5420.dtsi | 87 +++--
arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 +-
arch/arm/boot/dts/exynos5440-sd5v1.dts | 42 ---
arch/arm/boot/dts/exynos5440-ssdk5440.dts | 81 -----
arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi | 20 --
arch/arm/boot/dts/exynos5440-trip-points.dtsi | 21 --
arch/arm/boot/dts/exynos5440.dtsi | 355 ---------------------
arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 +-
arch/arm/boot/dts/s3c2416-smdk2416.dts | 5 +-
arch/arm/boot/dts/s3c2416.dtsi | 11 +-
arch/arm/boot/dts/s3c24xx.dtsi | 4 +-
arch/arm/boot/dts/s3c6410-mini6410.dts | 3 +-
arch/arm/boot/dts/s3c6410-smdk6410.dts | 3 +-
arch/arm/boot/dts/s3c64xx.dtsi | 4 +-
31 files changed, 183 insertions(+), 695 deletions(-)
delete mode 100644 arch/arm/boot/dts/exynos5440-sd5v1.dts
delete mode 100644 arch/arm/boot/dts/exynos5440-ssdk5440.dts
delete mode 100644 arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
delete mode 100644 arch/arm/boot/dts/exynos5440-trip-points.dtsi
delete mode 100644 arch/arm/boot/dts/exynos5440.dtsi
^ permalink raw reply
* [GIT PULL 4/5] arm64: dts: exynos: Stuff for v4.18
From: Krzysztof Kozlowski @ 2018-05-13 15:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513154238.22508-1-krzk@kernel.org>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-dt64-4.18
for you to fetch changes up to 8dd6203f32f20cb83469eb859efded9e403b3e9f:
arm64: dts: exynos: Add mem-2-mem Scaler devices (2018-05-13 11:26:13 +0200)
----------------------------------------------------------------
Samsung DTS ARM64 changes for v4.18
1. Fix DTC warnings.
2. Add mem-2-mem Scaler devices.
----------------------------------------------------------------
Andrzej Pietrasiewicz (1):
arm64: dts: exynos: Add mem-2-mem Scaler devices
Krzysztof Kozlowski (2):
arm64: dts: exynos: Move syscon poweroff and restart nodes under the PMU
arm64: dts: exynos: Remove unneeded address space mapping for soc node
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 66 +++++++++++++++++++++++++-----
arch/arm64/boot/dts/exynos/exynos7.dtsi | 18 ++++----
2 files changed, 65 insertions(+), 19 deletions(-)
^ permalink raw reply
* [GIT PULL 5/5] ARM: exynos: mach/soc for v4.18
From: Krzysztof Kozlowski @ 2018-05-13 15:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513154238.22508-1-krzk@kernel.org>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-soc-4.18
for you to fetch changes up to 9ad9a2183bf51da7f8840f2e7087816c0fc8c91d:
ARM: exynos: Remove unused soc_is_exynos{4,5} (2018-05-13 14:07:03 +0200)
----------------------------------------------------------------
Samsung mach/soc changes for v4.18
1. Remove at24_platform_data in S3C2440.
2. Fix invalid SPDX identifier.
3. Remove Exynos5440 entirely.
4. Cleanups.
5. Remove static mapping of SCU SFR and rely on DTS.
----------------------------------------------------------------
Bartlomiej Zolnierkiewicz (1):
ARM: exynos: no need to select ARCH_HAS_BANDGAP any longer
Bartosz Golaszewski (1):
ARM: s3c24xx: mini2440: Use device properties for at24 eeprom
Krzysztof Kozlowski (1):
ARM: exynos: Remove support for Exynos5440
Pankaj Dubey (2):
ARM: exynos: Remove static mapping of SCU SFR
ARM: exynos: Remove unused soc_is_exynos{4,5}
Thomas Gleixner (1):
ARM: s3c24xx: Fix invalid SPDX identifier
Wolfram Sang (1):
ARM: samsung: simplify getting .drvdata
arch/arm/mach-exynos/Kconfig | 13 ----------
arch/arm/mach-exynos/common.h | 17 ++++---------
arch/arm/mach-exynos/exynos.c | 37 ++--------------------------
arch/arm/mach-exynos/include/mach/map.h | 2 --
arch/arm/mach-exynos/platsmp.c | 27 +++++++++++++++-----
arch/arm/mach-exynos/pm.c | 4 +--
arch/arm/mach-exynos/suspend.c | 4 +--
arch/arm/mach-s3c24xx/h1940-bluetooth.c | 2 +-
arch/arm/mach-s3c24xx/mach-mini2440.c | 10 ++++----
arch/arm/plat-samsung/adc.c | 3 +--
arch/arm/plat-samsung/include/plat/map-s5p.h | 4 ---
11 files changed, 37 insertions(+), 86 deletions(-)
^ permalink raw reply
* [GIT PULL 5/5] ARM: exynos: mach/soc for v4.18
From: Krzysztof Kozlowski @ 2018-05-13 15:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513154238.22508-6-krzk@kernel.org>
On Sun, May 13, 2018 at 5:42 PM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-soc-4.18
>
> for you to fetch changes up to 9ad9a2183bf51da7f8840f2e7087816c0fc8c91d:
>
> ARM: exynos: Remove unused soc_is_exynos{4,5} (2018-05-13 14:07:03 +0200)
>
> ----------------------------------------------------------------
> Samsung mach/soc changes for v4.18
>
> 1. Remove at24_platform_data in S3C2440.
> 2. Fix invalid SPDX identifier.
> 3. Remove Exynos5440 entirely.
> 4. Cleanups.
> 5. Remove static mapping of SCU SFR and rely on DTS.
>
> ----------------------------------------------------------------
> Bartlomiej Zolnierkiewicz (1):
> ARM: exynos: no need to select ARCH_HAS_BANDGAP any longer
>
> Bartosz Golaszewski (1):
> ARM: s3c24xx: mini2440: Use device properties for at24 eeprom
>
> Krzysztof Kozlowski (1):
> ARM: exynos: Remove support for Exynos5440
I forgot to mention here possible conflict with dma-mapping tree and
its commit 4965a68780c5 ("arch: define the ARCH_DMA_ADDR_T_64BIT
config symbol in lib/Kconfig"). Since Exynos5440 is going away,
conflict is easy to solve - just remove.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH] arm64: defconfig: Increase CMA size for VC4
From: Florian Fainelli @ 2018-05-13 16:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525296700-3588-1-git-send-email-stefan.wahren@i2se.com>
Le 05/02/18 ? 14:31, Stefan Wahren a ?crit?:
> The VC4 needs more memory than the default setting (16 MB):
>
> vc4-drm soc:gpu: swiotlb: coherent allocation failed, size=16777216
> [drm:vc4_bo_create [vc4]] *ERROR* Failed to allocate from CMA:
> vc4_v3d 3fc00000.v3d: Failed to allocate memory for tile binning: -12.
> You may need to enable CMA or give it more memory.
> vc4-drm soc:gpu: failed to bind 3fc00000.v3d (ops vc4_v3d_ops [vc4]): -12
> vc4-drm soc:gpu: master bind failed: -12
> vc4-drm: probe of soc:gpu failed with error -12
>
> So increase the value to 32 MB and fix this issue.
>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Applied to defconfig-arm64/next, thanks!
--
Florian
^ permalink raw reply
* [GIT PULL 2/5 v2] Broadcom defconfig-arm64 changes for 4.18
From: Florian Fainelli @ 2018-05-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180511214339.24139-2-f.fainelli@gmail.com>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
https://github.com/Broadcom/stblinux.git tags/arm-soc/for-4.18/defconfig-arm64
for you to fetch changes up to ebf089248dab2ef569e5e26a607f0977a71182b7:
arm64: defconfig: Increase CMA size for VC4 (2018-05-13 09:55:21 -0700)
----------------------------------------------------------------
This pull request contains Broadcom ARM64-based SoCs defconfig changes
for 4.18, please pull the following:
- Stefan provides a set of updates targeting the Raspberry Pi 3 B+
platform: LAN7515 USB Ethernet driver, Cypress CYW43455 Bluetooth when
using the Pi 3 B+ in AArch64 boot mode. He also updates the ARM64
defconfig to create a bigger default CMA region to let the VideoCore 4
driver initialize correctly.
----------------------------------------------------------------
Florian Fainelli (1):
Merge tag 'bcm2835-defconfig-64-next-2018-04-30' into defconfig-arm64/next
Stefan Wahren (2):
arm64: defconfig: Enable LAN and BT support for RPi 3 B+
arm64: defconfig: Increase CMA size for VC4
arch/arm64/configs/defconfig | 3 +++
1 file changed, 3 insertions(+)
^ permalink raw reply
* [GIT PULL 2/5] Broadcom defconfig-arm64 changes for 4.18
From: Florian Fainelli @ 2018-05-13 17:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180511214339.24139-2-f.fainelli@gmail.com>
Le 05/11/18 ? 14:43, Florian Fainelli a ?crit?:
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the git repository at:
>
> https://github.com/Broadcom/stblinux.git tags/arm-soc/for-4.18/defconfig-arm64
>
> for you to fetch changes up to dce4c94eedbd35cd63aa04ee9b022de6d23ee587:
>
> Merge tag 'bcm2835-defconfig-64-next-2018-04-30' into defconfig-arm64/next (2018-05-01 11:54:16 -0700)
>
> ----------------------------------------------------------------
> This pull request contains Broadcom ARM64-based SoCs defconfig changes
> for 4.18, please pull the following:
>
> - Stefan provides a set of updates targeting the Raspberry Pi 3 B+
> platform: LAN7515 USB Ethernet driver, Cypress CYW43455 Bluetooth when
> using the Pi 3 B+ in AArch64 boot mode.
>
> ----------------------------------------------------------------
> Florian Fainelli (1):
> Merge tag 'bcm2835-defconfig-64-next-2018-04-30' into defconfig-arm64/next
>
> Stefan Wahren (1):
> arm64: defconfig: Enable LAN and BT support for RPi 3 B+
Olof, Arnd, Kevin, please disregard this pull request (v1) and consider
this one instead:
https://www.spinics.net/lists/arm-kernel/msg652043.html
thank you!
--
Florian
^ permalink raw reply
* [PATCH] thermal: exynos: Reduce severity of too early temperature read
From: Krzysztof Kozlowski @ 2018-05-13 17:54 UTC (permalink / raw)
To: linux-arm-kernel
Thermal core tries to read temperature during sensor registering in
thermal_zone_of_sensor_register(). In that time Exynos TMU driver and
hardware are not yet initialized. Commit 0eb875d88aaa ("thermal:
exynos: Reading temperature makes sense only when TMU is turned on")
added a boolean flag to prevent reading bogus temperature in such
case but it exposed warning message during boot:
[ 3.864913] thermal thermal_zone0: failed to read out thermal zone (-22)
Return EAGAIN in such case to skip omitting such message because it
might mislead user.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
drivers/thermal/samsung/exynos_tmu.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index 3b20309789e3..c24969d740d1 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -666,8 +666,14 @@ static int exynos_get_temp(void *p, int *temp)
struct exynos_tmu_data *data = p;
int value, ret = 0;
- if (!data || !data->tmu_read || !data->enabled)
+ if (!data || !data->tmu_read)
return -EINVAL;
+ else if (!data->enabled)
+ /*
+ * Called too early, probably
+ * from thermal_zone_of_sensor_register().
+ */
+ return -EAGAIN;
mutex_lock(&data->lock);
clk_enable(data->clk);
--
2.14.1
^ permalink raw reply related
* [PATCH 6/8] serial: Add Tegra Combined UART driver
From: Mikko Perttunen @ 2018-05-13 18:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAHp75VfYF_u2bZ+temGbReEB9K-t3A75aUNYwffyv9-=zEi0Lw@mail.gmail.com>
On 05/13/2018 05:16 PM, Andy Shevchenko wrote:
> On Tue, May 8, 2018 at 2:44 PM, Mikko Perttunen <mperttunen@nvidia.com> wrote:
>> The Tegra Combined UART (TCU) is a mailbox-based mechanism that allows
>> multiplexing multiple "virtual UARTs" into a single hardware serial
>> port. The TCU is the primary serial port on Tegra194 devices.
>>
>> Add a TCU driver utilizing the mailbox framework, as the used mailboxes
>> are part of Tegra HSP blocks that are already controlled by the Tegra
>> HSP mailbox driver.
>
> First question, can it be done utilizing SERDEV framework?
Based on some brief research, the SERDEV framework is for devices that
are behind some UART interface. In this case, this driver implements the
UART interface itself, so by my understanding SERDEV is not appropriate.
Please correct me if I'm wrong.
>
>> +static void tegra_tcu_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
>> +{
>
>> + (void)port;
>> + (void)mctrl;
>
> Huh?
The serial core calls these callbacks without checking if they are set.
They don't make sense for this driver so they are stubbed out.
>
>> +}
>
>> +static void tegra_tcu_uart_stop_tx(struct uart_port *port)
>> +{
>> + (void)port;
>> +}
>
> Ditto.
>
>> + if (written == 3) {
>> + value |= 3 << 24;
>> + value |= BIT(26);
>> + mbox_send_message(tcu->tx, &value);
>
>> + }
>
> (1)
>
>> + }
>> +
>> + if (written) {
>> + value |= written << 24;
>> + value |= BIT(26);
>> + mbox_send_message(tcu->tx, &value);
>> + }
>
> (2)
>
> These are code duplications.
Indeed - the length of the duplicated code is so short, and the
instances are so close to each other, that I don't find it necessary (or
clearer) to have an extra function.
>
>> +static void tegra_tcu_uart_stop_rx(struct uart_port *port)
>> +{
>> + (void)port;
>> +}
>> +
>> +static void tegra_tcu_uart_break_ctl(struct uart_port *port, int ctl)
>> +{
>> + (void)port;
>> + (void)ctl;
>> +}
>> +
>> +static int tegra_tcu_uart_startup(struct uart_port *port)
>> +{
>> + (void)port;
>> +
>> + return 0;
>> +}
>> +
>> +static void tegra_tcu_uart_shutdown(struct uart_port *port)
>> +{
>> + (void)port;
>> +}
>> +
>> +static void tegra_tcu_uart_set_termios(struct uart_port *port,
>> + struct ktermios *new,
>> + struct ktermios *old)
>> +{
>> + (void)port;
>> + (void)new;
>> + (void)old;
>> +}
>
> Remove those unused stub contents.
Sure. I had these here so that we don't get unused parameter warnings,
but I can just as well remove the parameter names.
>
>> + return uart_set_options(&tegra_tcu_uart_port, cons,
>> + 115200, 'n', 8, 'n');
>
> Can't it be one line?
It would be a total of 81 characters in length on one line, so no.
>
>> +static void tegra_tcu_receive(struct mbox_client *client, void *msg_p)
>> +{
>> + struct tty_port *port = &tegra_tcu_uart_port.state->port;
>
>> + uint32_t msg = *(uint32_t *)msg_p;
>
> Redundant casting.
Will remove.
>
>> + unsigned int num_bytes;
>> + int i;
>> +
>
>> + num_bytes = (msg >> 24) & 0x3;
>
> Two magic numbers.
Sure, will add defines.
>
>> + for (i = 0; i < num_bytes; i++)
>> + tty_insert_flip_char(port, (msg >> (i*8)) & 0xff, TTY_NORMAL);
>> +
>> + tty_flip_buffer_push(port);
>> +}
>
>> +MODULE_AUTHOR("Mikko Perttunen <mperttunen@nvidia.com>");
>> +MODULE_LICENSE("GPL v2");
>> +MODULE_DESCRIPTION("NVIDIA Tegra Combined UART driver");
>> diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
>> index dce5f9dae121..eaf3c303cba6 100644
>> --- a/include/uapi/linux/serial_core.h
>> +++ b/include/uapi/linux/serial_core.h
>> @@ -281,4 +281,7 @@
>> /* MediaTek BTIF */
>> #define PORT_MTK_BTIF 117
>>
>> +/* NVIDIA Tegra Combined UART */
>> +#define PORT_TEGRA_TCU 118
>
> Check if there is an unused gap. IIRC we still have one near to 40ish.
>
Correct, looks like 41-43 are unused. I'll change this 41.
Thanks for reviewing!
Mikko
^ permalink raw reply
* [PATCH 6/8] serial: Add Tegra Combined UART driver
From: Mikko Perttunen @ 2018-05-13 18:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CABb+yY3snB9o4e14by4xui+o_Vhqpe2zh6Pp_e0t-DCTKvMHWA@mail.gmail.com>
On 05/13/2018 06:36 PM, Jassi Brar wrote:
> On Tue, May 8, 2018 at 5:14 PM, Mikko Perttunen <mperttunen@nvidia.com> wrote:
>
> ....
>>
>> +config SERIAL_TEGRA_TCU
>> + tristate "NVIDIA Tegra Combined UART"
>> + depends on ARCH_TEGRA && MAILBOX
>> + select SERIAL_CORE
>> + help
>> + Support for the mailbox-based TCU (Tegra Combined UART) serial port.
>> + TCU is a virtual serial port that allows multiplexing multiple data
>> + streams into a single hardware serial port.
>> +
> Maybe make it depend upon TEGRA_HSP_MBOX ?
Yeah, that probably makes more sense. MAILBOX is enough to build it but
it won't be of any use without TEGRA_HSP_MBOX.
>
> ......
>
>> +
>> +static void tegra_tcu_write(const char *s, unsigned int count)
>> +{
>> + struct tegra_tcu *tcu = tegra_tcu_uart_port.private_data;
>> + unsigned int written = 0, i = 0;
>> + bool insert_nl = false;
>> + uint32_t value = 0;
>> +
>> + while (i < count) {
>> + if (insert_nl) {
>> + value |= '\n' << (written++ * 8);
>> + insert_nl = false;
>> + i++;
>> + } else if (s[i] == '\n') {
>> + value |= '\r' << (written++ * 8);
>> + insert_nl = true;
>> + } else {
>> + value |= s[i++] << (written++ * 8);
>> + }
>> +
>> + if (written == 3) {
>> + value |= 3 << 24;
>> + value |= BIT(26);
>> + mbox_send_message(tcu->tx, &value);
>>
> How is this supposed to work? tegra_hsp_doorbell_send_data() ignores
> the second argument.
The previous patch in the series adds support for what are called
"shared mailboxes" to the tegra-hsp driver. For these the second
argument is used.
Thanks,
Mikko
> --
> To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* [PATCH 2/3] arm64: dts: renesas: r8a77995: Add VIN4
From: jacopo mondi @ 2018-05-13 18:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180511134516.omsv25i2wi4cxypc@verge.net.au>
Hi Simon,
On Fri, May 11, 2018 at 03:45:16PM +0200, Simon Horman wrote:
> On Fri, May 11, 2018 at 01:25:23PM +0200, Niklas S?derlund wrote:
> > Hi Jacopo,
> >
> > Thanks for your work.
> >
> > On 2018-05-11 12:00:01 +0200, Jacopo Mondi wrote:
> > > Describe VIN4 interface for R-Car D3 R8A77995 SoC.
> > >
> > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> >
> > Acked-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> >
> > > ---
> > > arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 +++++++++++
> > > 1 file changed, 11 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > index 82aed7e..bdf7017 100644
> > > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > @@ -783,6 +783,17 @@
> > > };
> > > };
> > > };
> > > +
> > > + vin4: video at e6ef4000 {
> > > + compatible = "renesas,vin-r8a77995";
> > > + reg = <0 0xe6ef4000 0 0x1000>;
> > > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> > > + clocks = <&cpg CPG_MOD 807>;
> > > + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> > > + resets = <&cpg 807>;
> > > + renesas,id = <4>;
> > > + status = "disabled";
> > > + };
> > > };
>
> Thanks, I have moved the new node to preserve sorting of nodes by bus
> address and applied the result. It is as follows:
Great, thanks for doing this, I should have take care of sorting nodes
opprtunely.
Thanks
j
>
> From: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Subject: [PATCH] arm64: dts: renesas: r8a77995: Add VIN4
>
> Describe VIN4 interface for R-Car D3 R8A77995 SoC.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Acked-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> [simon: sorted node by bus address]
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> index ba98865b0c9b..2506f46293e8 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -610,6 +610,17 @@
> status = "disabled";
> };
s
> + vin4: video at e6ef4000 {
> + compatible = "renesas,vin-r8a77995";
> + reg = <0 0xe6ef4000 0 0x1000>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 807>;
> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> + resets = <&cpg 807>;
> + renesas,id = <4>;
> + status = "disabled";
> + };
> +
> ohci0: usb at ee080000 {
> compatible = "generic-ohci";
> reg = <0 0xee080000 0 0x100>;
> --
> 2.11.0
>
^ permalink raw reply
* [PATCH] arm64: defconfig: Increase CMA size for VC4
From: Stefan Wahren @ 2018-05-13 19:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <968ffb1f-8a3a-00d6-996d-35d5db30d25b@gmail.com>
> Florian Fainelli <f.fainelli@gmail.com> hat am 13. Mai 2018 um 18:58 geschrieben:
>
>
> Le 05/02/18 ? 14:31, Stefan Wahren a ?crit?:
> > The VC4 needs more memory than the default setting (16 MB):
> >
> > vc4-drm soc:gpu: swiotlb: coherent allocation failed, size=16777216
> > [drm:vc4_bo_create [vc4]] *ERROR* Failed to allocate from CMA:
> > vc4_v3d 3fc00000.v3d: Failed to allocate memory for tile binning: -12.
> > You may need to enable CMA or give it more memory.
> > vc4-drm soc:gpu: failed to bind 3fc00000.v3d (ops vc4_v3d_ops [vc4]): -12
> > vc4-drm soc:gpu: master bind failed: -12
> > vc4-drm: probe of soc:gpu failed with error -12
> >
> > So increase the value to 32 MB and fix this issue.
> >
> > Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
>
> Applied to defconfig-arm64/next, thanks!
> --
> Florian
Thank you, i will add a note next time.
Stefan
^ permalink raw reply
* [PATCH RESEND net-next v2 0/8] net: stmmac: dwmac-sun8i: Support R40
From: Chen-Yu Tsai @ 2018-05-13 19:14 UTC (permalink / raw)
To: linux-arm-kernel
This is a resend of the patches for net-next split out from my R40
Ethernet support v2 series, as requested by David Miller. The arm-soc
bits will follow, once I rework the A64 system controller compatible.
Patches 1, 2, and 3 clean up the dwmac-sun8i binding.
Patch 4 adds device tree binding for Allwinner R40's Ethernet
controller.
Patch 5 converts regmap access of the syscon region in the dwmac-sun8i
driver to regmap_field, in anticipation of different field widths on
the R40.
Patch 6 introduces custom plumbing in the dwmac-sun8i driver to fetch
a regmap from another device, by looking up said device via a phandle,
then getting the regmap associated with that device.
Patch 7 adds support for different or absent TX/RX delay chain ranges
to the dwmac-sun8i driver.
Patch 8 adds support for the R40's ethernet controller.
Excerpt from original cover letter:
Changes since v1:
- Default to fetching regmap from device pointed to by syscon phandle,
and falling back to syscon API if that fails.
- Dropped .syscon_from_dev field in device data as a result of the
previous change.
- Added a large comment block explaining the first change.
- Simplified description of syscon property in sun8i-dwmac binding.
- Regmap now only exposes the EMAC/GMAC register, but retains the
offset within its address space.
- Added patches for A64, which reuse the same sun8i-dwmac changes.
This series adds support for the DWMAC based Ethernet controller found
on the Allwinner R40 SoC. The controller is either a DWMAC clone or
DWMAC core with its registers rearranged. This is already supported by
the dwmac-sun8i driver. The glue layer control registers, unlike other
sun8i family SoCs, is not in the system controller region, but in the
clock control unit, like with the older A20 and A31 SoCs.
While we reuse the bindings for dwmac-sun8i using a syscon phandle
reference, we need some custom plumbing for the clock driver to export
a regmap that only allows access to the GMAC register to the dwmac-sun8i
driver. An alternative would be to allow drivers to register custom
syscon devices with their own regmap and locking.
Please have a look.
Regards
ChenYu
Chen-Yu Tsai (8):
dt-bindings: net: dwmac-sun8i: Clean up clock delay chain descriptions
dt-bindings: net: dwmac-sun8i: Sort syscon compatibles by alphabetical
order
dt-bindings: net: dwmac-sun8i: simplify description of syscon property
dt-bindings: net: dwmac-sun8i: Add binding for GMAC on Allwinner R40
SoC
net: stmmac: dwmac-sun8i: Use regmap_field for syscon register access
net: stmmac: dwmac-sun8i: Allow getting syscon regmap from external
device
net: stmmac: dwmac-sun8i: Support different ranges for TX/RX delay
chains
net: stmmac: dwmac-sun8i: Add support for GMAC on Allwinner R40 SoC
.../devicetree/bindings/net/dwmac-sun8i.txt | 21 +--
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 139 +++++++++++++++---
2 files changed, 130 insertions(+), 30 deletions(-)
--
2.17.0
^ permalink raw reply
* [PATCH RESEND net-next v2 1/8] dt-bindings: net: dwmac-sun8i: Clean up clock delay chain descriptions
From: Chen-Yu Tsai @ 2018-05-13 19:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513191425.9801-1-wens@csie.org>
The clock delay chains found in the glue layer for dwmac-sun8i are only
used with RGMII PHYs. They are not intended for non-RGMII PHYs, such as
MII external PHYs or the internal PHY. Also, a recent SoC has a smaller
range of possible values for the delay chain.
This patch reformats the delay chain section of the device tree binding
to make it clear that the delay chains only apply to RGMII PHYs, and
make it easier to add the R40-specific bits later.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 3d6d5fa0c4d5..e04ce75e24a3 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -28,10 +28,13 @@ Required properties:
- allwinner,sun8i-a83t-system-controller
Optional properties:
-- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0)
-- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0)
-Both delay properties need to be a multiple of 100. They control the delay for
-external PHY.
+- allwinner,tx-delay-ps: TX clock delay chain value in ps.
+ Range is 0-700. Default is 0.
+- allwinner,rx-delay-ps: RX clock delay chain value in ps.
+ Range is 0-3100. Default is 0.
+Both delay properties need to be a multiple of 100. They control the
+clock delay for external RGMII PHY. They do not apply to the internal
+PHY or external non-RGMII PHYs.
Optional properties for the following compatibles:
- "allwinner,sun8i-h3-emac",
--
2.17.0
^ permalink raw reply related
* [PATCH RESEND net-next v2 2/8] dt-bindings: net: dwmac-sun8i: Sort syscon compatibles by alphabetical order
From: Chen-Yu Tsai @ 2018-05-13 19:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513191425.9801-1-wens@csie.org>
The A83T syscon compatible was appended to the syscon compatibles list,
instead of inserted in to preserve the ordering.
Move it to the proper place to keep the list sorted.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index e04ce75e24a3..1b8e33e71651 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -22,10 +22,10 @@ Required properties:
- #size-cells: shall be 0
- syscon: A phandle to the syscon of the SoC with one of the following
compatible string:
+ - allwinner,sun8i-a83t-system-controller
- allwinner,sun8i-h3-system-controller
- allwinner,sun8i-v3s-system-controller
- allwinner,sun50i-a64-system-controller
- - allwinner,sun8i-a83t-system-controller
Optional properties:
- allwinner,tx-delay-ps: TX clock delay chain value in ps.
--
2.17.0
^ permalink raw reply related
* [PATCH RESEND net-next v2 3/8] dt-bindings: net: dwmac-sun8i: simplify description of syscon property
From: Chen-Yu Tsai @ 2018-05-13 19:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513191425.9801-1-wens@csie.org>
The syscon property is used to point to the device that holds the glue
layer control register known as the "EMAC (or GMAC) clock register".
We do not need to explicitly list what compatible strings are needed, as
this information is readily available in the user manuals. Also the
"syscon" device type is more of an implementation detail. There are many
ways to access a register not in a device's address range, the syscon
interface being the most generic and unrestricted one.
Simplify the description so that it says what it is supposed to
describe.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 1b8e33e71651..1c0906a5c02b 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -20,12 +20,7 @@ Required properties:
- phy-handle: See ethernet.txt
- #address-cells: shall be 1
- #size-cells: shall be 0
-- syscon: A phandle to the syscon of the SoC with one of the following
- compatible string:
- - allwinner,sun8i-a83t-system-controller
- - allwinner,sun8i-h3-system-controller
- - allwinner,sun8i-v3s-system-controller
- - allwinner,sun50i-a64-system-controller
+- syscon: A phandle to the device containing the EMAC or GMAC clock register
Optional properties:
- allwinner,tx-delay-ps: TX clock delay chain value in ps.
--
2.17.0
^ permalink raw reply related
* [PATCH RESEND net-next v2 4/8] dt-bindings: net: dwmac-sun8i: Add binding for GMAC on Allwinner R40 SoC
From: Chen-Yu Tsai @ 2018-05-13 19:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513191425.9801-1-wens@csie.org>
The Allwinner R40 SoC has the EMAC controller supported by dwmac-sun8i.
It is named "GMAC", while EMAC refers to the 10/100 Mbps Ethernet
controller supported by sun4i-emac. The controller is the same, but
the R40 has the glue layer controls in the clock control unit (CCU),
with a reduced RX delay chain, and no TX delay chain.
This patch adds the R40 specific bits to the dwmac-sun8i binding.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 1c0906a5c02b..cfe724398a12 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -7,6 +7,7 @@ Required properties:
- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
+ "allwinner,sun8i-r40-gmac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
- reg: address and length of the register for the device.
@@ -25,8 +26,10 @@ Required properties:
Optional properties:
- allwinner,tx-delay-ps: TX clock delay chain value in ps.
Range is 0-700. Default is 0.
+ Unavailable for allwinner,sun8i-r40-gmac
- allwinner,rx-delay-ps: RX clock delay chain value in ps.
Range is 0-3100. Default is 0.
+ Range is 0-700 for allwinner,sun8i-r40-gmac
Both delay properties need to be a multiple of 100. They control the
clock delay for external RGMII PHY. They do not apply to the internal
PHY or external non-RGMII PHYs.
--
2.17.0
^ permalink raw reply related
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