* [PATCH] PM / Domains: Don't return -EEXIST at attach when PM domain exists
From: Rafael J. Wysocki @ 2018-05-15 8:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180515005342.GM98604@atomide.com>
On Tue, May 15, 2018 at 2:53 AM, Tony Lindgren <tony@atomide.com> wrote:
> * Ulf Hansson <ulf.hansson@linaro.org> [180514 14:55]:
>> As dev_pm_domain_attach() isn't the only way to assign PM domain pointers
>> to devices, clearly we must allow a device to have the pointer already
>> being assigned. For this reason, return 0 instead of -EEXIST.
>>
>> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> Cc: Marek Szyprowski <m.szyprowski@samsung.com>
>> Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
>> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
>> Tested-by: Tested-by: Krzysztof Kozlowski <krzk@kernel.org>
>
> Fixes the issue for me too:
>
> Tested-by: Tony Lindgren <tony@atomide.com>
I've applied the patch with the tag above, thanks!
^ permalink raw reply
* [PATCH 1/2] ARM: dts: imx51-babbage: Fix USB PHY duplicate unit-address
From: Shawn Guo @ 2018-05-15 8:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526322576-5838-1-git-send-email-festevam@gmail.com>
On Mon, May 14, 2018 at 03:29:35PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> Currently the following DTC warning is seen with W=1:
>
> arch/arm/boot/dts/imx51-babbage.dtb: Warning (unique_unit_address): /usbphy/usbphy at 0: duplicate unit-address (also used in node /usbphy/usbh1phy at 0)
>
> Fix it by moving the USB PHY node outside of simple-bus and drop the
> unneeded unit-address.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
> arch/arm/boot/dts/imx51-babbage.dts | 21 +++++++--------------
> 1 file changed, 7 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
> index b8ca73d..de46906 100644
> --- a/arch/arm/boot/dts/imx51-babbage.dts
> +++ b/arch/arm/boot/dts/imx51-babbage.dts
> @@ -170,20 +170,13 @@
> mux-ext-port = <3>;
> };
>
> - usbphy {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "simple-bus";
> -
> - usbh1phy: usbh1phy at 0 {
> - compatible = "usb-nop-xceiv";
> - reg = <0>;
> - clocks = <&clk_usb>;
> - clock-names = "main_clk";
> - reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
> - vcc-supply = <&vusb_reg>;
> - #phy-cells = <0>;
> - };
> + usbh1phy: usbphy1 {
> + compatible = "usb-nop-xceiv";
> + clocks = <&clk_usb>;
> + clock-names = "main_clk";
> + reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
> + vcc-supply = <&vusb_reg>;
> + #phy-cells = <0>;
This should be considered as a whole together with usbphy in imx51.dtsi.
Also, I would like to get some input from DT folks on how we should name
the node uniquely. @Rob.
Shawn
> };
> };
>
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH] ARM: dts: r8a7740: Add CEU1
From: Simon Horman @ 2018-05-15 8:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180515072132.GP5956@w540>
On Tue, May 15, 2018 at 09:21:32AM +0200, jacopo mondi wrote:
> Hi Simon,
>
> On Tue, May 15, 2018 at 09:10:06AM +0200, Simon Horman wrote:
> > On Mon, May 07, 2018 at 02:37:57PM +0200, Simon Horman wrote:
> > > Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
> > >
> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> >
> > Would anyone care to review this change?
>
> That would be me, as I've sent patches for CEU0 on R-Mobile A1, sorry
> about that.
No problem :)
> > > ---
> > > arch/arm/boot/dts/r8a7740.dtsi | 10 ++++++++++
> > > 1 file changed, 10 insertions(+)
> > >
> > > Depends and based on:
> > > "[PATCH v2 2/2] ARM: dts: r8a7740: Add CEU0"
> > >
> > > diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
> > > index 508d93440ee8..af4c071c9178 100644
> > > --- a/arch/arm/boot/dts/r8a7740.dtsi
> > > +++ b/arch/arm/boot/dts/r8a7740.dtsi
> > > @@ -77,6 +77,16 @@
> > > status = "disabled";
> > > };
> > >
> > > + ceu1: ceu at fe914000 {
> > > + reg = <0xfe910000 0x3000>;
>
> The reg property start address does not match the device node unit
> address (which is the correct one according to documentation).
Thanks, v2 posted.
^ permalink raw reply
* [PATCH 0/2] Revert explicit support for Renesas R-Car Gen 3 r8a779[56] SoCs
From: Rafael J. Wysocki @ 2018-05-15 8:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180515073553.372uzwx4gvj5qpk4@verge.net.au>
On Tue, May 15, 2018 at 9:35 AM, Simon Horman <horms@verge.net.au> wrote:
> On Thu, May 10, 2018 at 11:51:38AM +0200, Rafael J. Wysocki wrote:
>> On Wednesday, May 2, 2018 11:58:04 AM CEST Simon Horman wrote:
>> > Revert commits that added explicit support for Renesas R-Car Gen 3
>> > r8a779[56] SoCs to the generic cpufreq driver.
>> >
>> > This is no longer needed since the flowing commit and to the best of my
>> > knowledge is not relied on by any upstream DTS: edeec420de24 ("cpufreq:
>> > dt-platdev: Automatically create cpufreq device with OPP v2")
>> >
>> > Simon Horman (2):
>> > Revert "cpufreq: dt: Add r8a7796 support to to use generic cpufreq
>> > driver"
>> > Revert "cpufreq: rcar: Add support for R8A7795 SoC"
>> >
>> > drivers/cpufreq/cpufreq-dt-platdev.c | 2 --
>> > 1 file changed, 2 deletions(-)
>> >
>> >
>>
>> Am I expected to pick up this series?
>
> Hi Rafael,
>
> that would be ideal from my point of view.
OK, I'll queue them up, then.
Thanks!
^ permalink raw reply
* [PATCH v2] ARM: dts: r8a7740: Add CEU1
From: Simon Horman @ 2018-05-15 8:00 UTC (permalink / raw)
To: linux-arm-kernel
Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* Correct register range start address
Based on renesas-devel-20180514-v4.17-rc5
---
arch/arm/boot/dts/r8a7740.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 508d93440ee8..35e2fc957458 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -77,6 +77,16 @@
status = "disabled";
};
+ ceu1: ceu at fe914000 {
+ reg = <0xfe914000 0x3000>;
+ compatible = "renesas,r8a7740-ceu";
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp1_clks R8A7740_CLK_CEU21>;
+ clock-names = "ceu21";
+ power-domains = <&pd_a4r>;
+ status = "disabled";
+ };
+
cmt1: timer at e6138000 {
compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
reg = <0xe6138000 0x170>;
--
2.11.0
^ permalink raw reply related
* [PATCH v3 3/8] PCI: Rename device node parameter of of_pci_get_host_bridge_resources()
From: Vladimir Zapolskiy @ 2018-05-15 7:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4df503604897aebbcb6e7ab98ef5f24916c6d382.1526363896.git.jan.kiszka@siemens.com>
On 05/15/2018 08:58 AM, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@siemens.com>
>
> We will add a real device parameter to this function soon.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH v3 0/8] PCI: leak fixes, removable generic PCI host, assorted stuff
From: Vladimir Zapolskiy @ 2018-05-15 7:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526363896.git.jan.kiszka@siemens.com>
Hi Jan,
On 05/15/2018 08:58 AM, Jan Kiszka wrote:
> Changes in v3:
> - refactor series to be both bisectable and simpler while reworking
> of_pci_get_host_bridge_resources()
> - include of_pci_get_host_bridge_resources() removal
> - include devm_of_pci_get_host_bridge_resources() error path fixes
> - effectively, no functional changes to v2
while the previous version of the changeset plus the fixup found on Bjorn's
pci/resource branch is sufficient, I can't argue with the fact that this
series is way better.
In case if this series is accepted I'll review and test the fix of
of_pci_get_host_bridge_resources() memleak again, no worries.
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH v3 5/8] PCI: Replace pr_*() with dev_*() in of_pci_get_host_bridge_resources()
From: Vladimir Zapolskiy @ 2018-05-15 7:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <95f6ca417e2bc74d15f707e577b098e46b4b3ba4.1526363896.git.jan.kiszka@siemens.com>
On 05/15/2018 08:58 AM, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@siemens.com>
>
> Now that we have a device reference, make use of it for printing.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH] ARM: dts: imx: Switch NXP boards to SPDX identifier
From: Shawn Guo @ 2018-05-15 7:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526320727-29157-1-git-send-email-festevam@gmail.com>
On Mon, May 14, 2018 at 02:58:47PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> Adopt the SPDX license identifier headers to ease license compliance
> management.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
> arch/arm/boot/dts/imx23-evk.dts | 13 +++-------
> arch/arm/boot/dts/imx25-pdk.dts | 13 +++-------
> arch/arm/boot/dts/imx27-pdk.dts | 13 +++-------
> arch/arm/boot/dts/imx28-evk.dts | 13 +++-------
> arch/arm/boot/dts/imx35-pdk.dts | 15 +++--------
> arch/arm/boot/dts/imx50-evk.dts | 17 ++++--------
> arch/arm/boot/dts/imx51-babbage.dts | 15 +++--------
> arch/arm/boot/dts/imx53-qsb-common.dtsi | 15 +++--------
> arch/arm/boot/dts/imx53-qsb.dts | 15 +++--------
> arch/arm/boot/dts/imx53-qsrb.dts | 15 +++--------
> arch/arm/boot/dts/imx53-smd.dts | 17 ++++--------
> arch/arm/boot/dts/imx6dl-sabreauto.dts | 10 +++-----
> arch/arm/boot/dts/imx6dl-sabresd.dts | 10 +++-----
> arch/arm/boot/dts/imx6q-sabreauto.dts | 16 ++++--------
> arch/arm/boot/dts/imx6q-sabresd.dts | 15 +++--------
> arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 15 +++--------
> arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 15 +++--------
> arch/arm/boot/dts/imx6qp-sabreauto.dts | 44 +++-----------------------------
> arch/arm/boot/dts/imx6qp-sabresd.dts | 44 +++-----------------------------
> arch/arm/boot/dts/imx6sl-evk.dts | 10 +++-----
> arch/arm/boot/dts/imx6sx-sabreauto.dts | 10 +++-----
> arch/arm/boot/dts/imx6ul-14x14-evk.dts | 10 +++-----
> arch/arm/boot/dts/imx7d-sdb-sht11.dts | 44 +++-----------------------------
> arch/arm/boot/dts/imx7d-sdb.dts | 44 +++-----------------------------
> 24 files changed, 86 insertions(+), 362 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts
> index 9d92ece82..d3cdd3b 100644
> --- a/arch/arm/boot/dts/imx23-evk.dts
> +++ b/arch/arm/boot/dts/imx23-evk.dts
> @@ -1,13 +1,6 @@
> -/*
> - * Copyright 2012 Freescale Semiconductor, Inc.
> - *
> - * The code contained herein is licensed under the GNU General Public
> - * License. You may obtain a copy of the GNU General Public License
> - * Version 2 or later at the following locations:
> - *
> - * http://www.opensource.org/licenses/gpl-license.html
> - * http://www.gnu.org/copyleft/gpl.html
> - */
> +// SPDX-License-Identifier: GPL-2.0+
> +//
> +// Copyright 2012 Freescale Semiconductor, I/*
I/*? Should be Inc.
<snip>
> diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
> index 334b924..66f2728 100644
> --- a/arch/arm/boot/dts/imx6q-sabreauto.dts
> +++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
> @@ -1,14 +1,8 @@
> -/*
> - * Copyright 2012 Freescale Semiconductor, Inc.
> - * Copyright 2011 Linaro Ltd.
> - *
> - * The code contained herein is licensed under the GNU General Public
> - * License. You may obtain a copy of the GNU General Public License
> - * Version 2 or later at the following locations:
> - *
> - * http://www.opensource.org/licenses/gpl-license.html
> - * http://www.gnu.org/copyleft/gpl.html
> - */
> +// SPDX-License-Identifier: GPL-2.0+
> +//
> +// Copyright 2012 Freescale Semiconductor, Inc.
> +// Copyright 2011 Linaro Ltd.
> +
Unnecessary newline.
>
> /dts-v1/;
>
I fixed them up and applied the patch.
Shawn
^ permalink raw reply
* [PATCH v3 4/8] PCI: Replace dev_node parameter of of_pci_get_host_bridge_resources with device
From: Vladimir Zapolskiy @ 2018-05-15 7:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5f2226585c6af9920b266d0503e32042d4c9e440.1526363896.git.jan.kiszka@siemens.com>
Hi Jan,
On 05/15/2018 08:58 AM, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@siemens.com>
>
> Another step towards a managed version of
> of_pci_get_host_bridge_resources(): Feed in the underlying device,
> rather than just the OF node. This will allow to use managed resource
> allocation internally later on.
>
> CC: Jingoo Han <jingoohan1@gmail.com>
> CC: Joao Pinto <Joao.Pinto@synopsys.com>
> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
[snip]
> diff --git a/drivers/pci/of.c b/drivers/pci/of.c
> index 8d4778ef5806..ac97491ba377 100644
> --- a/drivers/pci/of.c
> +++ b/drivers/pci/of.c
> @@ -245,7 +245,7 @@ EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
> #if defined(CONFIG_OF_ADDRESS)
> /**
> * of_pci_get_host_bridge_resources - Parse PCI host bridge resources from DT
> - * @dev_node: device node of the host bridge having the range property
> + * @dev: host bridge device
> * @busno: bus number associated with the bridge root bus
> * @bus_max: maximum number of buses for this bridge
> * @resources: list where the range of resources will be added after DT parsing
> @@ -262,10 +262,11 @@ EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
> * It returns zero if the range parsing has been successful or a standard error
> * value if it failed.
> */
> -int of_pci_get_host_bridge_resources(struct device_node *dev_node,
> +int of_pci_get_host_bridge_resources(struct device *dev,
> unsigned char busno, unsigned char bus_max,
> struct list_head *resources, resource_size_t *io_base)
> {
> + struct device_node *dev_node = dev->of_node;
> struct resource_entry *window;
> struct resource *res;
> struct resource *bus_range;
> @@ -599,12 +600,12 @@ int pci_parse_request_of_pci_ranges(struct device *dev,
> struct resource **bus_range)
> {
> int err, res_valid = 0;
> - struct device_node *np = dev->of_node;
> resource_size_t iobase;
> struct resource_entry *win, *tmp;
>
> INIT_LIST_HEAD(resources);
> - err = of_pci_get_host_bridge_resources(np, 0, 0xff, resources, &iobase);
> + err = of_pci_get_host_bridge_resources(dev, 0, 0xff, resources,
> + &iobase);
just a note, it's a funny selected indentation style across this change
to avoid indentation issues in v3 6/8. It seems to be innocent though.
> if (err)
> return err;
>
> diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
> index 74eec1943ad2..e6684c68cb94 100644
> --- a/include/linux/of_pci.h
> +++ b/include/linux/of_pci.h
> @@ -71,11 +71,11 @@ of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
> #endif
>
> #if defined(CONFIG_OF_ADDRESS)
> -int of_pci_get_host_bridge_resources(struct device_node *dev_node,
> +int of_pci_get_host_bridge_resources(struct device *dev,
> unsigned char busno, unsigned char bus_max,
> struct list_head *resources, resource_size_t *io_base);
> #else
> -static inline int of_pci_get_host_bridge_resources(struct device_node *dev_node,
> +static inline int of_pci_get_host_bridge_resources(struct device *dev,
> unsigned char busno, unsigned char bus_max,
> struct list_head *resources, resource_size_t *io_base)
> {
>
Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH v3 6/8] PCI: Rework of_pci_get_host_bridge_resources() to devm_of_pci_get_host_bridge_resources()
From: Vladimir Zapolskiy @ 2018-05-15 7:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4ae78ed8c3d866446f8322c1df4a19c2ca4fef58.1526363896.git.jan.kiszka@siemens.com>
Hi Jan,
On 05/15/2018 08:58 AM, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@siemens.com>
>
> of_pci_get_host_bridge_resources() allocates the resource structures it
> fills dynamically, but none of its callers care to release them so far.
> Rather than requiring everyone to do this explicitly, convert the
> existing function to a managed version.
>
> CC: Jingoo Han <jingoohan1@gmail.com>
> CC: Joao Pinto <Joao.Pinto@synopsys.com>
> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
[snip]
> diff --git a/drivers/pci/of.c b/drivers/pci/of.c
> index 4f21514cb4e4..00f42389aa56 100644
> --- a/drivers/pci/of.c
> +++ b/drivers/pci/of.c
> @@ -244,7 +244,8 @@ EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
>
> #if defined(CONFIG_OF_ADDRESS)
> /**
> - * of_pci_get_host_bridge_resources - Parse PCI host bridge resources from DT
> + * devm_of_pci_get_host_bridge_resources() - Resource-managed parsing of PCI
> + * host bridge resources from DT
> * @dev: host bridge device
> * @busno: bus number associated with the bridge root bus
> * @bus_max: maximum number of buses for this bridge
> @@ -253,8 +254,6 @@ EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
> * address for the start of the I/O range. Can be NULL if the caller doesn't
> * expect I/O ranges to be present in the device tree.
> *
> - * It is the caller's job to free the @resources list.
> - *
> * This function will parse the "ranges" property of a PCI host bridge device
> * node and setup the resource mapping based on its content. It is expected
> * that the property conforms with the Power ePAPR document.
> @@ -262,12 +261,11 @@ EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
> * It returns zero if the range parsing has been successful or a standard error
> * value if it failed.
> */
> -int of_pci_get_host_bridge_resources(struct device *dev,
> +int devm_of_pci_get_host_bridge_resources(struct device *dev,
> unsigned char busno, unsigned char bus_max,
> struct list_head *resources, resource_size_t *io_base)
> {
> struct device_node *dev_node = dev->of_node;
> - struct resource_entry *window;
> struct resource *res;
> struct resource *bus_range;
> struct of_pci_range range;
> @@ -278,7 +276,7 @@ int of_pci_get_host_bridge_resources(struct device *dev,
> if (io_base)
> *io_base = (resource_size_t)OF_BAD_ADDR;
>
> - bus_range = kzalloc(sizeof(*bus_range), GFP_KERNEL);
> + bus_range = devm_kzalloc(dev, sizeof(*bus_range), GFP_KERNEL);
> if (!bus_range)
> return -ENOMEM;
>
> @@ -300,7 +298,7 @@ int of_pci_get_host_bridge_resources(struct device *dev,
> /* Check for ranges property */
> err = of_pci_range_parser_init(&parser, dev_node);
> if (err)
> - goto parse_failed;
> + return err;
In my opinion allocated by pci_add_resource() and pci_add_resource_offset()
resource entries are leaked on error paths, and pci_free_resource_list() should
be called.
>
> dev_dbg(dev, "Parsing ranges property...\n");
> for_each_of_pci_range(&parser, &range) {
> @@ -322,15 +320,13 @@ int of_pci_get_host_bridge_resources(struct device *dev,
> if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
> continue;
>
> - res = kzalloc(sizeof(struct resource), GFP_KERNEL);
> - if (!res) {
> - err = -ENOMEM;
> - goto parse_failed;
> - }
> + res = devm_kzalloc(dev, sizeof(struct resource), GFP_KERNEL);
> + if (!res)
> + return -ENOMEM;
Same as above.
>
> err = of_pci_range_to_resource(&range, dev_node, res);
> if (err) {
> - kfree(res);
> + devm_kfree(dev, res);
> continue;
> }
>
> @@ -339,8 +335,7 @@ int of_pci_get_host_bridge_resources(struct device *dev,
> dev_err(dev,
> "I/O range found for %pOF. Please provide an io_base pointer to save CPU base address\n",
> dev_node);
> - err = -EINVAL;
> - goto conversion_failed;
> + return -EINVAL;
Same as above.
> }
> if (*io_base != (resource_size_t)OF_BAD_ADDR)
> dev_warn(dev,
> @@ -353,16 +348,8 @@ int of_pci_get_host_bridge_resources(struct device *dev,
> }
>
> return 0;
> -
> -conversion_failed:
> - kfree(res);
> -parse_failed:
> - resource_list_for_each_entry(window, resources)
> - kfree(window->res);
> - pci_free_resource_list(resources);
> - return err;
> }
> -EXPORT_SYMBOL_GPL(of_pci_get_host_bridge_resources);
> +EXPORT_SYMBOL_GPL(devm_of_pci_get_host_bridge_resources);
> #endif /* CONFIG_OF_ADDRESS */
>
> /**
> @@ -606,7 +593,7 @@ int pci_parse_request_of_pci_ranges(struct device *dev,
> struct resource_entry *win, *tmp;
>
> INIT_LIST_HEAD(resources);
> - err = of_pci_get_host_bridge_resources(dev, 0, 0xff, resources,
> + err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, resources,
> &iobase);
> if (err)
> return err;
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH] media: dvb-frontends: add Socionext SC1501A ISDB-S/T demodulator driver
From: kbuild test robot @ 2018-05-15 7:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180515003749.9980-1-suzuki.katsuhiro@socionext.com>
Hi Katsuhiro,
I love your patch! Yet something to improve:
[auto build test ERROR on linuxtv-media/master]
[also build test ERROR on v4.17-rc5 next-20180514]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Katsuhiro-Suzuki/media-dvb-frontends-add-Socionext-SC1501A-ISDB-S-T-demodulator-driver/20180515-091453
base: git://linuxtv.org/media_tree.git master
config: i386-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/media/dvb-frontends/sc1501a.o: In function `sc1501a_set_frontend':
>> sc1501a.c:(.text+0xbe0): undefined reference to `__divdi3'
sc1501a.c:(.text+0xc01): undefined reference to `__divdi3'
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH v2] ARM: dts: imx6/7: Remove unit-address from anatop regulators
From: Shawn Guo @ 2018-05-15 7:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526304714-23821-1-git-send-email-festevam@gmail.com>
On Mon, May 14, 2018 at 10:31:54AM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> Remove unit-address and reg property from anatop regulators to fix
> the following DTC warnings with W=1:
>
> arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddcore at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddpu at 20c8140)
> arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddcore at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddsoc at 20c8140)
> arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddpu at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddsoc at 20c8140)
>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
> Changes since v1:
> - Send it is a standalone patch instead of a patch series.
>
> arch/arm/boot/dts/imx6qdl.dtsi | 20 ++++++--------------
> arch/arm/boot/dts/imx6sl.dtsi | 20 ++++++--------------
> arch/arm/boot/dts/imx6sx.dtsi | 20 ++++++--------------
> arch/arm/boot/dts/imx6ul.dtsi | 11 +++--------
I'm a bit confused. It looks that the change is just to revert commit
685e1321ba74 ("ARM: dts: imx6: Add unit address and reg for the anatop
nodes"). But what about the simple_bus_reg warning the commit was
fixing?
Shawn
> arch/arm/boot/dts/imx7s.dtsi | 8 ++------
> 5 files changed, 23 insertions(+), 56 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
> index 69648e2..22942dd 100644
> --- a/arch/arm/boot/dts/imx6qdl.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> @@ -692,11 +692,8 @@
> interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
> <0 54 IRQ_TYPE_LEVEL_HIGH>,
> <0 127 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
>
> - regulator-1p1 at 20c8110 {
> - reg = <0x20c8110>;
> + regulator-1p1 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd1p1";
> regulator-min-microvolt = <1000000>;
> @@ -711,8 +708,7 @@
> anatop-enable-bit = <0>;
> };
>
> - regulator-3p0 at 20c8120 {
> - reg = <0x20c8120>;
> + regulator-3p0 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd3p0";
> regulator-min-microvolt = <2800000>;
> @@ -727,8 +723,7 @@
> anatop-enable-bit = <0>;
> };
>
> - regulator-2p5 at 20c8130 {
> - reg = <0x20c8130>;
> + regulator-2p5 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd2p5";
> regulator-min-microvolt = <2250000>;
> @@ -743,8 +738,7 @@
> anatop-enable-bit = <0>;
> };
>
> - reg_arm: regulator-vddcore at 20c8140 {
> - reg = <0x20c8140>;
> + reg_arm: regulator-vddcore {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddarm";
> regulator-min-microvolt = <725000>;
> @@ -761,8 +755,7 @@
> anatop-max-voltage = <1450000>;
> };
>
> - reg_pu: regulator-vddpu at 20c8140 {
> - reg = <0x20c8140>;
> + reg_pu: regulator-vddpu {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddpu";
> regulator-min-microvolt = <725000>;
> @@ -779,8 +772,7 @@
> anatop-max-voltage = <1450000>;
> };
>
> - reg_soc: regulator-vddsoc at 20c8140 {
> - reg = <0x20c8140>;
> + reg_soc: regulator-vddsoc {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddsoc";
> regulator-min-microvolt = <725000>;
> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
> index 2002db2..8c838ba 100644
> --- a/arch/arm/boot/dts/imx6sl.dtsi
> +++ b/arch/arm/boot/dts/imx6sl.dtsi
> @@ -524,11 +524,8 @@
> interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
> <0 54 IRQ_TYPE_LEVEL_HIGH>,
> <0 127 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
>
> - regulator-1p1 at 20c8110 {
> - reg = <0x20c8110>;
> + regulator-1p1 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd1p1";
> regulator-min-microvolt = <800000>;
> @@ -543,8 +540,7 @@
> anatop-enable-bit = <0>;
> };
>
> - regulator-3p0 at 20c8120 {
> - reg = <0x20c8120>;
> + regulator-3p0 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd3p0";
> regulator-min-microvolt = <2800000>;
> @@ -559,8 +555,7 @@
> anatop-enable-bit = <0>;
> };
>
> - regulator-2p5 at 20c8130 {
> - reg = <0x20c8130>;
> + regulator-2p5 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd2p5";
> regulator-min-microvolt = <2100000>;
> @@ -575,8 +570,7 @@
> anatop-enable-bit = <0>;
> };
>
> - reg_arm: regulator-vddcore at 20c8140 {
> - reg = <0x20c8140>;
> + reg_arm: regulator-vddcore {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddarm";
> regulator-min-microvolt = <725000>;
> @@ -593,8 +587,7 @@
> anatop-max-voltage = <1450000>;
> };
>
> - reg_pu: regulator-vddpu at 20c8140 {
> - reg = <0x20c8140>;
> + reg_pu: regulator-vddpu {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddpu";
> regulator-min-microvolt = <725000>;
> @@ -611,8 +604,7 @@
> anatop-max-voltage = <1450000>;
> };
>
> - reg_soc: regulator-vddsoc at 20c8140 {
> - reg = <0x20c8140>;
> + reg_soc: regulator-vddsoc {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddsoc";
> regulator-min-microvolt = <725000>;
> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
> index 7e463d2..4a97513 100644
> --- a/arch/arm/boot/dts/imx6sx.dtsi
> +++ b/arch/arm/boot/dts/imx6sx.dtsi
> @@ -591,11 +591,8 @@
> interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
>
> - regulator-1p1 at 20c8110 {
> - reg = <0x20c8110>;
> + regulator-1p1 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd1p1";
> regulator-min-microvolt = <800000>;
> @@ -610,8 +607,7 @@
> anatop-enable-bit = <0>;
> };
>
> - regulator-3p0 at 20c8120 {
> - reg = <0x20c8120>;
> + regulator-3p0 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd3p0";
> regulator-min-microvolt = <2800000>;
> @@ -626,8 +622,7 @@
> anatop-enable-bit = <0>;
> };
>
> - regulator-2p5 at 20c8130 {
> - reg = <0x20c8130>;
> + regulator-2p5 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd2p5";
> regulator-min-microvolt = <2100000>;
> @@ -642,8 +637,7 @@
> anatop-enable-bit = <0>;
> };
>
> - reg_arm: regulator-vddcore at 20c8140 {
> - reg = <0x20c8140>;
> + reg_arm: regulator-vddcore {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddarm";
> regulator-min-microvolt = <725000>;
> @@ -660,8 +654,7 @@
> anatop-max-voltage = <1450000>;
> };
>
> - reg_pcie: regulator-vddpcie at 20c8140 {
> - reg = <0x20c8140>;
> + reg_pcie: regulator-vddpcie {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddpcie";
> regulator-min-microvolt = <725000>;
> @@ -677,8 +670,7 @@
> anatop-max-voltage = <1450000>;
> };
>
> - reg_soc: regulator-vddsoc at 20c8140 {
> - reg = <0x20c8140>;
> + reg_soc: regulator-vddsoc {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddsoc";
> regulator-min-microvolt = <725000>;
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index 2b854d1..1818b6c 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -551,11 +551,8 @@
> interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
>
> - reg_3p0: regulator-3p0 at 20c8110 {
> - reg = <0x20c8110>;
> + reg_3p0: regulator-3p0 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd3p0";
> regulator-min-microvolt = <2625000>;
> @@ -569,8 +566,7 @@
> anatop-enable-bit = <0>;
> };
>
> - reg_arm: regulator-vddcore at 20c8140 {
> - reg = <0x20c8140>;
> + reg_arm: regulator-vddcore {
> compatible = "fsl,anatop-regulator";
> regulator-name = "cpu";
> regulator-min-microvolt = <725000>;
> @@ -587,8 +583,7 @@
> anatop-max-voltage = <1450000>;
> };
>
> - reg_soc: regulator-vddsoc at 20c8140 {
> - reg = <0x20c8140>;
> + reg_soc: regulator-vddsoc {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vddsoc";
> regulator-min-microvolt = <725000>;
> diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
> index b416d2b..99f92ec 100644
> --- a/arch/arm/boot/dts/imx7s.dtsi
> +++ b/arch/arm/boot/dts/imx7s.dtsi
> @@ -557,11 +557,8 @@
> reg = <0x30360000 0x10000>;
> interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
>
> - reg_1p0d: regulator-vdd1p0d at 30360210 {
> - reg = <0x30360210>;
> + reg_1p0d: regulator-vdd1p0d {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd1p0d";
> regulator-min-microvolt = <800000>;
> @@ -575,8 +572,7 @@
> anatop-enable-bit = <0>;
> };
>
> - reg_1p2: regulator-vdd1p2 at 30360220 {
> - reg = <0x30360220>;
> + reg_1p2: regulator-vdd1p2 {
> compatible = "fsl,anatop-regulator";
> regulator-name = "vdd1p2";
> regulator-min-microvolt = <1100000>;
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH 0/2] Revert explicit support for Renesas R-Car Gen 3 r8a779[56] SoCs
From: Simon Horman @ 2018-05-15 7:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2473510.IAjYrYimeR@aspire.rjw.lan>
On Thu, May 10, 2018 at 11:51:38AM +0200, Rafael J. Wysocki wrote:
> On Wednesday, May 2, 2018 11:58:04 AM CEST Simon Horman wrote:
> > Revert commits that added explicit support for Renesas R-Car Gen 3
> > r8a779[56] SoCs to the generic cpufreq driver.
> >
> > This is no longer needed since the flowing commit and to the best of my
> > knowledge is not relied on by any upstream DTS: edeec420de24 ("cpufreq:
> > dt-platdev: Automatically create cpufreq device with OPP v2")
> >
> > Simon Horman (2):
> > Revert "cpufreq: dt: Add r8a7796 support to to use generic cpufreq
> > driver"
> > Revert "cpufreq: rcar: Add support for R8A7795 SoC"
> >
> > drivers/cpufreq/cpufreq-dt-platdev.c | 2 --
> > 1 file changed, 2 deletions(-)
> >
> >
>
> Am I expected to pick up this series?
Hi Rafael,
that would be ideal from my point of view.
^ permalink raw reply
* [PATCH] usb: gadget: composite: fill bcdUSB as 0x0320 for SuperSpeed or higher speeds
From: Felipe Balbi @ 2018-05-15 7:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525913200.32173.3.camel@mhfsdcap03>
Hi,
Chunfeng Yun <chunfeng.yun@mediatek.com> writes:
> On Wed, 2018-05-09 at 14:33 +0300, Felipe Balbi wrote:
>> Hi,
>>
>> Chunfeng Yun <chunfeng.yun@mediatek.com> writes:
>> > The USB3CV version 2.1.80 (March 26, 2018) requires all devices
>> > ( gen1, gen2, single lane, dual lane) to return the value of 0x0320
>> > in the bcdUSB field
>>
>> this sounds really odd. What happens when I get a USB 3.1 compliant
>> device off-the-shelf and run it through USB3CV? will it fail now?
> Yes, it will fail, the last version requires it 0x0310
>>
>> Care to share a screenshot or the raw html of the test result?
> A screenshot is attached
really odd. But I'll apply the patch.
thanks
--
balbi
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* [PATCH] ARM: dts: r8a7740: Add CEU1
From: jacopo mondi @ 2018-05-15 7:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180515071006.vmtxzwrppzrgekmf@verge.net.au>
Hi Simon,
On Tue, May 15, 2018 at 09:10:06AM +0200, Simon Horman wrote:
> On Mon, May 07, 2018 at 02:37:57PM +0200, Simon Horman wrote:
> > Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> Would anyone care to review this change?
That would be me, as I've sent patches for CEU0 on R-Mobile A1, sorry
about that.
>
> > ---
> > arch/arm/boot/dts/r8a7740.dtsi | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > Depends and based on:
> > "[PATCH v2 2/2] ARM: dts: r8a7740: Add CEU0"
> >
> > diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
> > index 508d93440ee8..af4c071c9178 100644
> > --- a/arch/arm/boot/dts/r8a7740.dtsi
> > +++ b/arch/arm/boot/dts/r8a7740.dtsi
> > @@ -77,6 +77,16 @@
> > status = "disabled";
> > };
> >
> > + ceu1: ceu at fe914000 {
> > + reg = <0xfe910000 0x3000>;
The reg property start address does not match the device node unit
address (which is the correct one according to documentation).
Thanks
j
> > + compatible = "renesas,r8a7740-ceu";
> > + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&mstp1_clks R8A7740_CLK_CEU21>;
> > + clock-names = "ceu21";
> > + power-domains = <&pd_a4r>;
> > + status = "disabled";
> > + };
> > +
> > cmt1: timer at e6138000 {
> > compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
> > reg = <0xe6138000 0x170>;
> > --
> > 2.11.0
> >
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* linux-next: Signed-off-by missing for commit in the arm-soc tree
From: Alexandre Torgue @ 2018-05-15 7:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180515072217.0a2ffe25@canb.auug.org.au>
On 05/14/2018 11:22 PM, Stephen Rothwell wrote:
> Hi all,
>
> Commit
>
> 949a0c0dec85 ("ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c")
>
> is missing a Signed-off-by from its committer.
>
My fault, I forgot it when I applied patch on my branch. Do we need an
update or it is just a reminder?
regards
alex
^ permalink raw reply
* [PATCH] arm64: dts: renesas: r8a77990: Add GPIO device nodes
From: Simon Horman @ 2018-05-15 7:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d232d79b-2d95-9938-bc1c-55b705c455c8@cogentembedded.com>
On Mon, May 14, 2018 at 06:57:04PM +0300, Sergei Shtylyov wrote:
> On 05/14/2018 05:30 PM, Simon Horman wrote:
>
> >>> The compat string renesas,gpio-rcar has been deprecated since v4.14,
> >>> the same release that r8a77990 SoC support was added. Thus
> >>> renesas,gpio-rcar can safely be removed without any risk of behaviour
> >>> changes between old and new mainline kernels and DTBs.
> >>
> >> This hardly matches the subject. :-)
> >
> > Indeed, I will resubmit.
>
> I'm seeing this patch merged on Sunday...
Yes, I saw that too. I dropped it yesterday.
^ permalink raw reply
* [PATCH] ARM: dts: imx6qdl-phytec-pfla02: Use IRQ_TYPE specifier
From: Shawn Guo @ 2018-05-15 7:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526254115-3999-1-git-send-email-hernan@vanguardiasur.com.ar>
On Sun, May 13, 2018 at 08:28:35PM -0300, Hern?n Gonzalez wrote:
> Replace magic number with the proper IRQ_TYPE specifier to improve DT
> readability.
>
> Signed-off-by: Hern?n Gonzalez <hernan@vanguardiasur.com.ar>
> ---
> arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
> index c58f344..1b79ee7 100644
> --- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
> @@ -115,7 +115,7 @@
> compatible = "dlg,da9063";
> reg = <0x58>;
> interrupt-parent = <&gpio2>;
> - interrupts = <9 0x8>; /* active-low GPIO2_9 */
> + interrupts = <9 IRQ_TYPE_LOW_LEVEL>; /* active-low GPIO2_9 */
It should be IRQ_TYPE_LEVEL_LOW. I fixed it up and applied the patch.
Shawn
>
> regulators {
> vddcore_reg: bcore1 {
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH] ARM: dts: imx53-voipac-dmm-668: Use IRQ_TYPE specifier
From: Shawn Guo @ 2018-05-15 7:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526254051-3929-1-git-send-email-hernan@vanguardiasur.com.ar>
On Sun, May 13, 2018 at 08:27:31PM -0300, Hern?n Gonzalez wrote:
> Replace magic number with the proper IRQ_TYPE specifier to improve DT
> readability.
>
> Signed-off-by: Hern?n Gonzalez <hernan@vanguardiasur.com.ar>
Applied, thanks.
^ permalink raw reply
* [PATCH] ARM: dts: imx53-qsb: Use IRQ_TYPE specifier
From: Shawn Guo @ 2018-05-15 7:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526253988-3848-1-git-send-email-hernan@vanguardiasur.com.ar>
On Sun, May 13, 2018 at 08:26:28PM -0300, Hern?n Gonzalez wrote:
> Replace magic number with the proper IRQ_TYPE specifier to improve DT
> readability.
>
> Signed-off-by: Hern?n Gonzalez <hernan@vanguardiasur.com.ar>
Applied, thanks.
^ permalink raw reply
* [PATCH] ARM: dts: vf-colibri-eval-v3.dtsi: Use IRQ_TYPE specifier
From: Shawn Guo @ 2018-05-15 7:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526253894-3709-1-git-send-email-hernan@vanguardiasur.com.ar>
On Sun, May 13, 2018 at 08:24:54PM -0300, Hern?n Gonzalez wrote:
> GPIO_ACTIVE_LOW was being used to specify an interrupt, use
> IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
>
> Signed-off-by: Hern?n Gonzalez <hernan@vanguardiasur.com.ar>
Applied, thanks.
^ permalink raw reply
* [PATCH] ARM: dts: r8a7740: Add CEU1
From: Simon Horman @ 2018-05-15 7:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180507123757.4708-1-horms+renesas@verge.net.au>
On Mon, May 07, 2018 at 02:37:57PM +0200, Simon Horman wrote:
> Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Would anyone care to review this change?
> ---
> arch/arm/boot/dts/r8a7740.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> Depends and based on:
> "[PATCH v2 2/2] ARM: dts: r8a7740: Add CEU0"
>
> diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
> index 508d93440ee8..af4c071c9178 100644
> --- a/arch/arm/boot/dts/r8a7740.dtsi
> +++ b/arch/arm/boot/dts/r8a7740.dtsi
> @@ -77,6 +77,16 @@
> status = "disabled";
> };
>
> + ceu1: ceu at fe914000 {
> + reg = <0xfe910000 0x3000>;
> + compatible = "renesas,r8a7740-ceu";
> + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&mstp1_clks R8A7740_CLK_CEU21>;
> + clock-names = "ceu21";
> + power-domains = <&pd_a4r>;
> + status = "disabled";
> + };
> +
> cmt1: timer at e6138000 {
> compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
> reg = <0xe6138000 0x170>;
> --
> 2.11.0
>
^ permalink raw reply
* [PATCH 0/3] arm64: dts: Draak: Enable HDMI input and VIN4
From: Simon Horman @ 2018-05-15 7:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMuHMdXdDZdbrpLTogyR=djwtQYMf1dgAA_z+8HaFZBG6R+e6g@mail.gmail.com>
On Mon, May 14, 2018 at 10:33:44PM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Fri, May 11, 2018 at 11:59 AM, Jacopo Mondi
> <jacopo+renesas@jmondi.org> wrote:
> > this series enables HDMI input and VIN4 on R-Car D3 Draak board.
> >
> > The Draak board has an HDMI input connected to an HDMI decoder that feeds
> > the VIN capture interface through its parallel video interface.
> >
> > The series requires the just sent:
> > [PATCH 0/5] rcar-vin: Add support for digital input on Gen3
> >
> > and enables image capture operations on D3 Draak board.
> >
> > The series has been developed on top of media-master tree but applies cleanly
> > on top of latest renesas-driver.
> >
> > Geert: would you like a topic branch for this series to be included in
> > renesas-drivers?
>
> It seems patch 2 has been applied by Simon already, but there is some
> discussion pending on patch 3?
Yes, that is correct.
Also, for extra fun, I moved the nodes when applying patch 2.
> > Patches for testing are available at:
> > git://jmondi.org/linux d3/media-master/driver
> > git://jmondi.org/linux d3/media-master/dts
> > git://jmondi.org/linux d3/media-master/test
> > git://jmondi.org/vin-tests d3
> >
> > Thanks
> > j
> >
> > Jacopo Mondi (3):
> > dt-bindings: media: rcar-vin: Add R8A77995 support
> > arm64: dts: renesas: r8a77995: Add VIN4
> > arm64: dts: renesas: draak: Describe HDMI input
> >
> > .../devicetree/bindings/media/rcar_vin.txt | 1 +
> > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 68 ++++++++++++++++++++++
> > arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 ++++
> > 3 files changed, 80 insertions(+)
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
>
^ permalink raw reply
* [PATCH 2/3] arm64: dts: renesas: r8a77995: Add VIN4
From: Simon Horman @ 2018-05-15 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3456643.qNU80MrgjU@avalon>
On Mon, May 14, 2018 at 05:36:41AM +0300, Laurent Pinchart wrote:
> Hello,
>
> On Friday, 11 May 2018 16:45:16 EEST Simon Horman wrote:
> > On Fri, May 11, 2018 at 01:25:23PM +0200, Niklas S?derlund wrote:
> > > Hi Jacopo,
> > >
> > > Thanks for your work.
> > >
> > > On 2018-05-11 12:00:01 +0200, Jacopo Mondi wrote:
> > > > Describe VIN4 interface for R-Car D3 R8A77995 SoC.
> > > >
> > > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> > >
> > > Acked-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> > >
> > >> ---
> > >>
> > >> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 +++++++++++
> > >> 1 file changed, 11 insertions(+)
> > >>
> > >> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > >> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 82aed7e..bdf7017
> > >> 100644
> > >> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > >> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > >> @@ -783,6 +783,17 @@
> > >> };
> > >> };
> > >> };
> > >> +
> > >> + vin4: video at e6ef4000 {
> > >> + compatible = "renesas,vin-r8a77995";
> > >> + reg = <0 0xe6ef4000 0 0x1000>;
> > >> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> > >> + clocks = <&cpg CPG_MOD 807>;
> > >> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> > >> + resets = <&cpg 807>;
> > >> + renesas,id = <4>;
> > >> + status = "disabled";
> > >> + };
> > >> };
> >
> > Thanks, I have moved the new node to preserve sorting of nodes by bus
> > address and applied the result. It is as follows:
> >
> > From: Jacopo Mondi <jacopo+renesas@jmondi.org>
> > Subject: [PATCH] arm64: dts: renesas: r8a77995: Add VIN4
> >
> > Describe VIN4 interface for R-Car D3 R8A77995 SoC.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> > Acked-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> > [simon: sorted node by bus address]
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thanks, tag added.
^ permalink raw reply
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