* [PATCH 63/69] ARM: dts: r8a7792: Add PMU device node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on R-Car V2H by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7792.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index d2cf8dd2d9b0..f44257dd86f6 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -85,6 +85,13 @@
clock-frequency = <0>;
};
+ pmu {
+ compatible = "arm,cortex-a15-pmu";
+ interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
+ };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related
* [PATCH 62/69] ARM: dts: r8a7791: Add PMU device node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on R-Car M2-W by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 570ca12422c5..828ad78c3337 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -126,6 +126,13 @@
clock-frequency = <0>;
};
+ pmu {
+ compatible = "arm,cortex-a15-pmu";
+ interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
+ };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related
* [PATCH 61/69] ARM: dts: r8a7790: Add PMU device nodes
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
and Cortex-A7 CPU cores on R-Car H2 by adding device nodes for the two
PMUs.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
hw perfevents: /pmu-1: failed to probe PMU!
hw perfevents: /pmu-1: failed to register PMU devices!
The last two lines are due to the Cortex-A7 CPU cores being described in
DT, but not enabled by the firmware.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 0a426548a212..ae97ec146260 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -202,6 +202,24 @@
clock-frequency = <0>;
};
+ pmu-0 {
+ compatible = "arm,cortex-a15-pmu";
+ interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
+ pmu-1 {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+ };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related
* [PATCH 60/69] ARM: dts: r7s72100: Add PMU device node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Enable support for the ARM Performance Monitor Units in the Cortex-A9
CPU core on RZ/A1H by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r7s72100.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index eb2e6f95a2e8..a54822e97bac 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -77,6 +77,11 @@
clock-div = <6>;
};
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts-extended = <&gic GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
rtc_x1_clk: rtc_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related
* [PATCH 59/69] ARM: dts: r7s72100: Correct RTC interrupt types
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the realtime clock interrupts are level not
edge interrupts.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r7s72100.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index c7b3dca6d81c..eb2e6f95a2e8 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -682,9 +682,9 @@
rtc: rtc at fcff1000 {
compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
reg = <0xfcff1000 0x2e>;
- interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING
- GIC_SPI 277 IRQ_TYPE_EDGE_RISING
- GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "alarm", "period", "carry";
clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
<&rtc_x3_clk>, <&extal_clk>;
--
2.11.0
^ permalink raw reply related
* [PATCH 58/69] ARM: dts: r7s72100: Correct watchdog timer interrupt type
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the watchdog timer interrupt is a level
interrupt.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r7s72100.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 4a1aade0e751..c7b3dca6d81c 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -387,7 +387,7 @@
wdt: watchdog at fcfe0000 {
compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
reg = <0xfcfe0000 0x6>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&p0_clk>;
};
--
2.11.0
^ permalink raw reply related
* [PATCH 57/69] ARM: dts: emev2: Add missing interrupt-affinity to PMU node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
The PMU node references two interrupts, but lacks the interrupt-affinity
property, which is required in that case:
hw perfevents: no interrupt-affinity property for /pmu, guessing.
Add the missing property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/emev2.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
index 42ea246e71cb..fec1241b858f 100644
--- a/arch/arm/boot/dts/emev2.dtsi
+++ b/arch/arm/boot/dts/emev2.dtsi
@@ -31,13 +31,13 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu at 0 {
+ cpu0: cpu at 0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
clock-frequency = <533000000>;
};
- cpu at 1 {
+ cpu1: cpu at 1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
@@ -57,6 +57,7 @@
compatible = "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
};
clocks at e0110000 {
--
2.11.0
^ permalink raw reply related
* [PATCH 56/69] ARM: dts: sh73a0: Add missing interrupt-affinity to PMU node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
The PMU node references two interrupts, but lacks the interrupt-affinity
property, which is required in that case:
hw perfevents: no interrupt-affinity property for /pmu, guessing.
Add the missing property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/sh73a0.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index 39cc58672bf4..c953648a5f41 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -22,7 +22,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu at 0 {
+ cpu0: cpu at 0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
@@ -31,7 +31,7 @@
power-domains = <&pd_a2sl>;
next-level-cache = <&L2>;
};
- cpu at 1 {
+ cpu1: cpu at 1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
@@ -91,6 +91,7 @@
compatible = "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
};
cmt1: timer at e6138000 {
--
2.11.0
^ permalink raw reply related
* [PATCH 55/69] ARM: dts: r8a73a4: Correct mask for GIC PPI interrupts
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
R-Mobile APE6 (r8a73a4) contains four Cortex-A15 and four Cortex-A7
cores, hence the second interrupt specifier cell for Private Peripheral
Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", so GIC interrupts are
delivered to all 8 processor cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a73a4.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 8e48090e4fdc..080d037f5733 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -57,10 +57,10 @@
timer {
compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
dbsc1: memory-controller at e6790000 {
@@ -464,7 +464,7 @@
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&mstp4_clks R8A73A4_CLK_INTC_SYS>;
clock-names = "clk";
power-domains = <&pd_c4>;
--
2.11.0
^ permalink raw reply related
* [PATCH 54/69] ARM: dts: r8a7790: Correct mask for GIC PPI interrupts
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
R-Car H2 (r8a7790) contains four Cortex-A15 and four Cortex-A7 cores,
hence the second interrupt specifier cell for Private Peripheral
Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", to make sure interrupts
can be delivered to all 8 processor cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index b64d99e3ad9d..0a426548a212 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1554,7 +1554,7 @@
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
@@ -1761,10 +1761,10 @@
timer {
compatible = "arm,armv7-timer";
- interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External USB clock - can be overridden by the board */
--
2.11.0
^ permalink raw reply related
* [PATCH 53/69] ARM: shmobile: r8a7794: alt: add EEPROM to DTS
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Same EEPROM as on Koelsch, et al.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794-alt.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index c210412f80ec..e17027532941 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -181,6 +181,12 @@
};
};
};
+
+ eeprom at 50 {
+ compatible = "renesas,r1ex24002", "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
};
/*
--
2.11.0
^ permalink raw reply related
* [PATCH 52/69] ARM: dts: kzm9d: Drop unnecessary address properties from gpio_keys node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
The gpio_keys node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/emev2-kzm9d.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm/boot/dts/emev2-kzm9d.dts | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
index c238407133bf..0af44b7eadb9 100644
--- a/arch/arm/boot/dts/emev2-kzm9d.dts
+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
@@ -34,9 +34,6 @@
gpio_keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
-
one {
debounce-interval = <50>;
wakeup-source;
--
2.11.0
^ permalink raw reply related
* [PATCH 51/69] ARM: dts: silk: Drop unnecessary address properties from vin port node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
The vin port node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7794-silk.dtb: Warning (avoid_unnecessary_addr_size): /soc/video at e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm/boot/dts/r8a7794-silk.dts | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index e2642d2c2eed..7808aaee6644 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -475,9 +475,6 @@
pinctrl-names = "default";
port {
- #address-cells = <1>;
- #size-cells = <0>;
-
vin0ep: endpoint {
remote-endpoint = <&adv7180>;
bus-width = <8>;
--
2.11.0
^ permalink raw reply related
* [PATCH 50/69] ARM: dts: alt: Drop unnecessary address properties from vin port node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
The vin port node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7794-alt.dtb: Warning (avoid_unnecessary_addr_size): /soc/video at e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm/boot/dts/r8a7794-alt.dts | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index 1ecc5b9135f3..c210412f80ec 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -380,9 +380,6 @@
pinctrl-names = "default";
port {
- #address-cells = <1>;
- #size-cells = <0>;
-
vin0ep: endpoint {
remote-endpoint = <&adv7180>;
bus-width = <8>;
--
2.11.0
^ permalink raw reply related
* [PATCH 49/69] ARM: dts: koelsch: Drop unnecessary address properties from port nodes
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
The vin port nodes does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7791-koelsch.dtb: Warning (avoid_unnecessary_addr_size): /soc/video at e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
arch/arm/boot/dts/r8a7791-koelsch.dtb: Warning (avoid_unnecessary_addr_size): /soc/video at e6ef1000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 6 ------
1 file changed, 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index fcdd0164142b..68e8272cb90e 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -849,9 +849,6 @@
pinctrl-names = "default";
port {
- #address-cells = <1>;
- #size-cells = <0>;
-
vin0ep2: endpoint {
remote-endpoint = <&adv7612_out>;
bus-width = <24>;
@@ -870,9 +867,6 @@
pinctrl-names = "default";
port {
- #address-cells = <1>;
- #size-cells = <0>;
-
vin1ep: endpoint {
remote-endpoint = <&adv7180>;
bus-width = <8>;
--
2.11.0
^ permalink raw reply related
* [PATCH 48/69] ARM: dts: gose: Drop unnecessary address properties from port nodes
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
The vin port nodes does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7793-gose.dtb: Warning (avoid_unnecessary_addr_size): /soc/video at e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
arch/arm/boot/dts/r8a7793-gose.dtb: Warning (avoid_unnecessary_addr_size): /soc/video at e6ef1000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm/boot/dts/r8a7793-gose.dts | 6 ------
1 file changed, 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 7a66d885e657..ec94e2402bdf 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -759,9 +759,6 @@
pinctrl-names = "default";
port {
- #address-cells = <1>;
- #size-cells = <0>;
-
vin0ep2: endpoint {
remote-endpoint = <&adv7612_out>;
bus-width = <24>;
@@ -781,9 +778,6 @@
status = "okay";
port {
- #address-cells = <1>;
- #size-cells = <0>;
-
vin1ep: endpoint {
remote-endpoint = <&adv7180_out>;
bus-width = <8>;
--
2.11.0
^ permalink raw reply related
* [PATCH 47/69] ARM: dts: porter: Drop unnecessary address properties from vin port node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
The vin port node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7791-porter.dtb: Warning (avoid_unnecessary_addr_size): /soc/video at e6ef0000/port: unnecessary #address-cells/#size-cells without
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm/boot/dts/r8a7791-porter.dts | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index 4dd5a5db2de8..876d38f46367 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -386,9 +386,6 @@
pinctrl-names = "default";
port {
- #address-cells = <1>;
- #size-cells = <0>;
-
vin0ep: endpoint {
remote-endpoint = <&adv7180>;
bus-width = <8>;
--
2.11.0
^ permalink raw reply related
* [PATCH 46/69] ARM: dts: lager: Drop unnecessary address properties from port node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
The vin port node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7790-lager.dtb: Warning (avoid_unnecessary_addr_size): /soc/video at e6ef1000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm/boot/dts/r8a7790-lager.dts | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 3c66366f7c55..d1e582b0ab66 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -890,9 +890,6 @@
status = "okay";
port {
- #address-cells = <1>;
- #size-cells = <0>;
-
vin1ep0: endpoint {
remote-endpoint = <&adv7180>;
bus-width = <8>;
--
2.11.0
^ permalink raw reply related
* [PATCH 45/69] ARM: dts: r8a7790: Fix sort order of VSP1/FDP1 nodes
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Commit 5d3b50d3c04d ("ARM: dts: renesas: r8a7790: Add FDP1 instances")
introduced the FDP1 for the r8a7790, but broke the sort ordering of the
device tree nodes.
Move the last VSP up to it's peers to correct the ordering.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 0f1948d560d7..b64d99e3ad9d 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1616,6 +1616,15 @@
resets = <&cpg 128>;
};
+ vsp at fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
+ };
+
fdp1 at fe940000 {
compatible = "renesas,fdp1";
reg = <0 0xfe940000 0 0x2400>;
@@ -1643,15 +1652,6 @@
resets = <&cpg 117>;
};
- vsp at fe938000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe938000 0 0x8000>;
- interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 127>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 127>;
- };
-
jpu: jpeg-codec at fe980000 {
compatible = "renesas,jpu-r8a7790",
"renesas,rcar-gen2-jpu";
--
2.11.0
^ permalink raw reply related
* [PATCH 44/69] ARM: dts: iwg23s-sbc: Add EtherAVB support
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Define the iW-RainboW-G23S board dependent part of the
EtherAVB device node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index d21baad9f0ad..e3585daafdd6 100644
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -12,11 +12,12 @@
compatible = "iwave,g23s", "renesas,r8a77470";
aliases {
+ ethernet0 = &avb;
serial1 = &scif1;
};
chosen {
- bootargs = "ignore_loglevel";
+ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = "serial1:115200n8";
};
@@ -26,6 +27,18 @@
};
};
+&avb {
+ phy-handle = <&phy3>;
+ phy-mode = "gmii";
+ renesas,no-ether-link;
+ status = "okay";
+
+ phy3: ethernet-phy at 3 {
+ reg = <3>;
+ micrel,led-mode = <1>;
+ };
+};
+
&extal_clk {
clock-frequency = <20000000>;
};
--
2.11.0
^ permalink raw reply related
* [PATCH 43/69] ARM: dts: r8a77470: Add EtherAVB support
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Define the generic R8A77470 part of the EtherAVB device node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a77470.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index baec3cae49d5..c85032f9605b 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -190,6 +190,19 @@
dma-channels = <15>;
};
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a77470",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
scif0: serial at e6e60000 {
compatible = "renesas,scif-r8a77470",
"renesas,rcar-gen2-scif", "renesas,scif";
--
2.11.0
^ permalink raw reply related
* [PATCH 42/69] ARM: dts: renesas: r8a7790: Add FDP1 instances
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
The r8a7790 has three FDP1 instances.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 7ba62b7aa0ba..0f1948d560d7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1616,6 +1616,33 @@
resets = <&cpg 128>;
};
+ fdp1 at fe940000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe940000 0 0x2400>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 119>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 119>;
+ };
+
+ fdp1 at fe944000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe944000 0 0x2400>;
+ interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 118>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 118>;
+ };
+
+ fdp1 at fe948000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe948000 0 0x2400>;
+ interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 117>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 117>;
+ };
+
vsp at fe938000 {
compatible = "renesas,vsp1";
reg = <0 0xfe938000 0 0x8000>;
--
2.11.0
^ permalink raw reply related
* [PATCH 41/69] ARM: dts: r8a77470: Add SCIF DMA support
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Add SCIF DMA support for R8A77470 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a77470.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 39549f28be85..baec3cae49d5 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -198,6 +198,9 @@
clocks = <&cpg CPG_MOD 721>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 721>;
status = "disabled";
@@ -211,6 +214,9 @@
clocks = <&cpg CPG_MOD 720>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 720>;
status = "disabled";
@@ -224,6 +230,9 @@
clocks = <&cpg CPG_MOD 719>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 719>;
status = "disabled";
@@ -237,6 +246,9 @@
clocks = <&cpg CPG_MOD 718>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 718>;
status = "disabled";
@@ -250,6 +262,9 @@
clocks = <&cpg CPG_MOD 715>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 715>;
status = "disabled";
@@ -263,6 +278,9 @@
clocks = <&cpg CPG_MOD 714>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 714>;
status = "disabled";
--
2.11.0
^ permalink raw reply related
* [PATCH 40/69] ARM: dts: r8a77470: Add SCIF support
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Describe SCIF ports in the R8A77470 device tree.
Also it fixes the CPG clock index ZS from 6 to 5.
Fixes: 6929dfc5918049 ("ARM: dts: r8a77470: Initial SoC device tree")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a77470.dtsi | 69 +++++++++++++++++++++++++++++++++++++++--
1 file changed, 67 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 2f89f33f5b88..39549f28be85 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -190,19 +190,84 @@
dma-channels = <15>;
};
+ scif0: serial at e6e60000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 0x40>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
+
scif1: serial at e6e68000 {
compatible = "renesas,scif-r8a77470",
"renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e68000 0 0x40>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>,
- <&cpg CPG_CORE 6>, <&scif_clk>;
+ clocks = <&cpg CPG_MOD 720>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc 32>;
resets = <&cpg 720>;
status = "disabled";
};
+ scif2: serial at e6e58000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 0x40>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 719>;
+ status = "disabled";
+ };
+
+ scif3: serial at e6ea8000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 0x40>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 718>;
+ status = "disabled";
+ };
+
+ scif4: serial at e6ee0000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 0x40>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
+
+ scif5: serial at e6ee8000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 0x40>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
+
gic: interrupt-controller at f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.11.0
^ permalink raw reply related
* [PATCH 39/69] ARM: dts: silk: Enable watchdog support
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Enable the watchdog, so the board can be restarted by a watchdog
timeout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794-silk.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 351cb3b3d966..e2642d2c2eed 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -540,6 +540,11 @@
};
};
+&rwdt {
+ timeout-sec = <60>;
+ status = "okay";
+};
+
&ssi1 {
shared-pin;
};
--
2.11.0
^ permalink raw reply related
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