* [PATCH 67/69] ARM: dts: r8a7745: Add PMU device node
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Enable support for the ARM Performance Monitor Units in the Cortex-A7
CPU cores on RZ/G1E by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 3de69cb66c44..1cb7a7ab0418 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -105,6 +105,13 @@
clock-frequency = <0>;
};
+ pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
+ };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related
* [PATCH 68/69] ARM: dts: r8a7740: Add CEU0
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
From: Jacopo Mondi <jacopo+renesas@jmondi.org>
Describe CEU0 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
Reported-by: Geert Uytterhoeven <geert@glider.be>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: dropped clock-names property]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7740.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index afd3bc5e6cf2..180eb9d2a390 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -67,6 +67,15 @@
power-domains = <&pd_d4>;
};
+ ceu0: ceu at fe910000 {
+ reg = <0xfe910000 0x3000>;
+ compatible = "renesas,r8a7740-ceu";
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp1_clks R8A7740_CLK_CEU20>;
+ power-domains = <&pd_a4r>;
+ status = "disabled";
+ };
+
cmt1: timer at e6138000 {
compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
reg = <0xe6138000 0x170>;
--
2.11.0
^ permalink raw reply related
* [PATCH 69/69] ARM: dts: r8a7740: Add CEU1
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526641667.git.horms+renesas@verge.net.au>
Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
arch/arm/boot/dts/r8a7740.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 180eb9d2a390..eb9a911deefb 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -76,6 +76,15 @@
status = "disabled";
};
+ ceu1: ceu at fe914000 {
+ reg = <0xfe914000 0x3000>;
+ compatible = "renesas,r8a7740-ceu";
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp1_clks R8A7740_CLK_CEU21>;
+ power-domains = <&pd_a4r>;
+ status = "disabled";
+ };
+
cmt1: timer at e6138000 {
compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
reg = <0xe6138000 0x170>;
--
2.11.0
^ permalink raw reply related
* [PATCH 01/14] soc: renesas: Identify RZ/G1C
From: Simon Horman @ 2018-05-18 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Add support for identifying the RZ/G1C (r8a77470) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/soc/renesas/renesas-soc.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index ea71c413c926..3912a71bd417 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -100,6 +100,11 @@ static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
.id = 0x4c,
};
+static const struct renesas_soc soc_rz_g1c __initconst __maybe_unused = {
+ .family = &fam_rzg,
+ .id = 0x53,
+};
+
static const struct renesas_soc soc_rcar_m1a __initconst __maybe_unused = {
.family = &fam_rcar_gen1,
};
@@ -192,6 +197,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
#ifdef CONFIG_ARCH_R8A7745
{ .compatible = "renesas,r8a7745", .data = &soc_rz_g1e },
#endif
+#ifdef CONFIG_ARCH_R8A77470
+ { .compatible = "renesas,r8a77470", .data = &soc_rz_g1c },
+#endif
#ifdef CONFIG_ARCH_R8A7778
{ .compatible = "renesas,r8a7778", .data = &soc_rcar_m1a },
#endif
--
2.11.0
^ permalink raw reply related
* [PATCH 02/14] soc: renesas: rcar-rst: Add support for RZ/G1C
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
Documentation/devicetree/bindings/reset/renesas,rst.txt | 1 +
drivers/soc/renesas/rcar-rst.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt
index 294a0dae106a..7be61efc3c8a 100644
--- a/Documentation/devicetree/bindings/reset/renesas,rst.txt
+++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
@@ -17,6 +17,7 @@ Required properties:
Examples with soctypes are:
- "renesas,r8a7743-rst" (RZ/G1M)
- "renesas,r8a7745-rst" (RZ/G1E)
+ - "renesas,r8a77470-rst" (RZ/G1C)
- "renesas,r8a7778-reset-wdt" (R-Car M1A)
- "renesas,r8a7779-reset-wdt" (R-Car H1)
- "renesas,r8a7790-rst" (R-Car H2)
diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index 8e9cb7996ab0..66d7dbac2ded 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++ b/drivers/soc/renesas/rcar-rst.c
@@ -44,6 +44,7 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
/* RZ/G is handled like R-Car Gen2 */
{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
+ { .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
/* R-Car Gen1 */
{ .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
{ .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
--
2.11.0
^ permalink raw reply related
* [PATCH 03/14] soc: renesas: rcar-sysc: Add r8a77470 support
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Add support for RZ/G1C (R8A77470) SoC power areas to the R-Car SYSC
driver.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../bindings/power/renesas,rcar-sysc.txt | 1 +
drivers/soc/renesas/Kconfig | 5 ++++
drivers/soc/renesas/Makefile | 1 +
drivers/soc/renesas/r8a77470-sysc.c | 29 ++++++++++++++++++++++
drivers/soc/renesas/rcar-sysc.c | 3 +++
drivers/soc/renesas/rcar-sysc.h | 1 +
include/dt-bindings/power/r8a77470-sysc.h | 22 ++++++++++++++++
7 files changed, 62 insertions(+)
create mode 100644 drivers/soc/renesas/r8a77470-sysc.c
create mode 100644 include/dt-bindings/power/r8a77470-sysc.h
diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
index ab399e559257..3e91d2032253 100644
--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
@@ -9,6 +9,7 @@ Required properties:
- compatible: Must contain exactly one of the following:
- "renesas,r8a7743-sysc" (RZ/G1M)
- "renesas,r8a7745-sysc" (RZ/G1E)
+ - "renesas,r8a77470-sysc" (RZ/G1C)
- "renesas,r8a7779-sysc" (R-Car H1)
- "renesas,r8a7790-sysc" (R-Car H2)
- "renesas,r8a7791-sysc" (R-Car M2-W)
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 3bbe6114a420..96dd93660359 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -7,6 +7,7 @@ config SOC_RENESAS
ARCH_R8A77970 || ARCH_R8A77980 || ARCH_R8A77995
select SYSC_R8A7743 if ARCH_R8A7743
select SYSC_R8A7745 if ARCH_R8A7745
+ select SYSC_R8A77470 if ARCH_R8A77470
select SYSC_R8A7779 if ARCH_R8A7779
select SYSC_R8A7790 if ARCH_R8A7790
select SYSC_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
@@ -30,6 +31,10 @@ config SYSC_R8A7745
bool "RZ/G1E System Controller support" if COMPILE_TEST
select SYSC_RCAR
+config SYSC_R8A77470
+ bool "RZ/G1C System Controller support" if COMPILE_TEST
+ select SYSC_RCAR
+
config SYSC_R8A7779
bool "R-Car H1 System Controller support" if COMPILE_TEST
select SYSC_RCAR
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index ccb5ec57a262..a86ece7b84d1 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_SOC_RENESAS) += renesas-soc.o
# SoC
obj-$(CONFIG_SYSC_R8A7743) += r8a7743-sysc.o
obj-$(CONFIG_SYSC_R8A7745) += r8a7745-sysc.o
+obj-$(CONFIG_SYSC_R8A77470) += r8a77470-sysc.o
obj-$(CONFIG_SYSC_R8A7779) += r8a7779-sysc.o
obj-$(CONFIG_SYSC_R8A7790) += r8a7790-sysc.o
obj-$(CONFIG_SYSC_R8A7791) += r8a7791-sysc.o
diff --git a/drivers/soc/renesas/r8a77470-sysc.c b/drivers/soc/renesas/r8a77470-sysc.c
new file mode 100644
index 000000000000..cfa015e208ef
--- /dev/null
+++ b/drivers/soc/renesas/r8a77470-sysc.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas RZ/G1C System Controller
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a77470-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a77470_areas[] __initconst = {
+ { "always-on", 0, 0, R8A77470_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+ { "ca7-scu", 0x100, 0, R8A77470_PD_CA7_SCU, R8A77470_PD_ALWAYS_ON,
+ PD_SCU },
+ { "ca7-cpu0", 0x1c0, 0, R8A77470_PD_CA7_CPU0, R8A77470_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "ca7-cpu1", 0x1c0, 1, R8A77470_PD_CA7_CPU1, R8A77470_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "sgx", 0xc0, 0, R8A77470_PD_SGX, R8A77470_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a77470_sysc_info __initconst = {
+ .areas = r8a77470_areas,
+ .num_areas = ARRAY_SIZE(r8a77470_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index faf20e719361..99203bdc333a 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -261,6 +261,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
#ifdef CONFIG_SYSC_R8A7745
{ .compatible = "renesas,r8a7745-sysc", .data = &r8a7745_sysc_info },
#endif
+#ifdef CONFIG_SYSC_R8A77470
+ { .compatible = "renesas,r8a77470-sysc", .data = &r8a77470_sysc_info },
+#endif
#ifdef CONFIG_SYSC_R8A7779
{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
#endif
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index dcdc9ec8eba7..9b24e3af288f 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -51,6 +51,7 @@ struct rcar_sysc_info {
extern const struct rcar_sysc_info r8a7743_sysc_info;
extern const struct rcar_sysc_info r8a7745_sysc_info;
+extern const struct rcar_sysc_info r8a77470_sysc_info;
extern const struct rcar_sysc_info r8a7779_sysc_info;
extern const struct rcar_sysc_info r8a7790_sysc_info;
extern const struct rcar_sysc_info r8a7791_sysc_info;
diff --git a/include/dt-bindings/power/r8a77470-sysc.h b/include/dt-bindings/power/r8a77470-sysc.h
new file mode 100644
index 000000000000..8bf4db187c31
--- /dev/null
+++ b/include/dt-bindings/power/r8a77470-sysc.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77470_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77470_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77470_PD_CA7_CPU0 5
+#define R8A77470_PD_CA7_CPU1 6
+#define R8A77470_PD_SGX 20
+#define R8A77470_PD_CA7_SCU 21
+
+/* Always-on power area */
+#define R8A77470_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A77470_SYSC_H__ */
--
2.11.0
^ permalink raw reply related
* [PATCH 04/14] ARM: shmobile: r8a77470: basic SoC support
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Add minimal support for the RZ/G1C (R8A77470) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
arch/arm/mach-shmobile/Kconfig | 4 ++++
arch/arm/mach-shmobile/setup-rcar-gen2.c | 2 ++
3 files changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
index d3d1df97834f..86ac320323a7 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -21,6 +21,8 @@ SoCs:
compatible = "renesas,r8a7744"
- RZ/G1E (R8A77450)
compatible = "renesas,r8a7745"
+ - RZ/G1C (R8A77470)
+ compatible = "renesas,r8a77470"
- R-Car M1A (R8A77781)
compatible = "renesas,r8a7778"
- R-Car H1 (R8A77790)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 280e7312a9e1..6b9111455a30 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -75,6 +75,10 @@ config ARCH_R8A7745
bool "RZ/G1E (R8A77450)"
select ARCH_RCAR_GEN2
+config ARCH_R8A77470
+ bool "RZ/G1C (R8A77470)"
+ select ARCH_RCAR_GEN2
+
config ARCH_R8A7778
bool "R-Car M1A (R8A77781)"
select ARCH_RCAR_GEN1
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 5561dbed7a33..80de6be912e1 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -73,6 +73,7 @@ void __init rcar_gen2_timer_init(void)
shmobile_init_cntvoff();
if (of_machine_is_compatible("renesas,r8a7745") ||
+ of_machine_is_compatible("renesas,r8a77470") ||
of_machine_is_compatible("renesas,r8a7792") ||
of_machine_is_compatible("renesas,r8a7794")) {
freq = 260000000 / 8; /* ZS / 8 */
@@ -205,6 +206,7 @@ MACHINE_END
static const char * const rz_g1_boards_compat_dt[] __initconst = {
"renesas,r8a7743",
"renesas,r8a7745",
+ "renesas,r8a77470",
NULL,
};
--
2.11.0
^ permalink raw reply related
* [PATCH 05/14] ARM: shmobile: Add the RZ/N1 arch to the shmobile Kconfig
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Michel Pollet <michel.pollet@bp.renesas.com>
Add the RZ/N1 Family (Part #R9A06G0xx) ARCH config to the rest of
the Renesas SoC collection.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/Kconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 6b9111455a30..96672da02f5f 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -114,6 +114,11 @@ config ARCH_R8A7794
bool "R-Car E2 (R8A77940)"
select ARCH_RCAR_GEN2
+config ARCH_RZN1
+ bool "RZ/N1 (R9A06G0xx) Family"
+ select ARM_AMBA
+ select CPU_V7
+
config ARCH_SH73A0
bool "SH-Mobile AG5 (R8A73A00)"
select ARCH_RMOBILE
--
2.11.0
^ permalink raw reply related
* [PATCH 06/14] ARM: debug-ll: Add support for r8a77470
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Enable low-level debugging support for RZ/G1C (r8a77470). RZ/G1C uses
SCIF1 for the debug console.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/Kconfig.debug | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 199ebc1c4538..693f84392f1b 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -942,6 +942,13 @@ choice
via SCIF0 on Renesas RZ/G1M (R8A7743), R-Car H2 (R8A7790),
M2-W (R8A7791), V2H (R8A7792), or M2-N (R8A7793).
+ config DEBUG_RCAR_GEN2_SCIF1
+ bool "Kernel low-level debugging messages via SCIF1 on R8A77470"
+ depends on ARCH_R8A77470
+ help
+ Say Y here if you want kernel low-level debugging support
+ via SCIF1 on Renesas RZ/G1C (R8A77470).
+
config DEBUG_RCAR_GEN2_SCIF2
bool "Kernel low-level debugging messages via SCIF2 on R8A7794"
depends on ARCH_R8A7794
@@ -1495,6 +1502,7 @@ config DEBUG_LL_INCLUDE
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN1_SCIF0
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN1_SCIF2
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF0
+ default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF1
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF2
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF4
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA0
@@ -1617,6 +1625,7 @@ config DEBUG_UART_PHYS
default 0xe6c80000 if DEBUG_RMOBILE_SCIFA4
default 0xe6e58000 if DEBUG_RCAR_GEN2_SCIF2
default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0
+ default 0xe6e68000 if DEBUG_RCAR_GEN2_SCIF1
default 0xe6ee0000 if DEBUG_RCAR_GEN2_SCIF4
default 0xe8008000 if DEBUG_R7S72100_SCIF2
default 0xf0000be0 if ARCH_EBSA110
@@ -1651,8 +1660,8 @@ config DEBUG_UART_PHYS
DEBUG_NETX_UART || \
DEBUG_QCOM_UARTDM || DEBUG_R7S72100_SCIF2 || \
DEBUG_RCAR_GEN1_SCIF0 || DEBUG_RCAR_GEN1_SCIF2 || \
- DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \
- DEBUG_RCAR_GEN2_SCIF4 || \
+ DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF1 || \
+ DEBUG_RCAR_GEN2_SCIF2 || DEBUG_RCAR_GEN2_SCIF4 || \
DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
DEBUG_S3C64XX_UART || \
--
2.11.0
^ permalink raw reply related
* [PATCH 07/14] soc: renesas: identify R-Car E3
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds support for identifying the R-Car E3 (R8A77990) SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/soc/renesas/renesas-soc.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index 3912a71bd417..d44d0e687ab8 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -164,6 +164,11 @@ static const struct renesas_soc soc_rcar_v3h __initconst __maybe_unused = {
.id = 0x56,
};
+static const struct renesas_soc soc_rcar_e3 __initconst __maybe_unused = {
+ .family = &fam_rcar_gen3,
+ .id = 0x57,
+};
+
static const struct renesas_soc soc_rcar_d3 __initconst __maybe_unused = {
.family = &fam_rcar_gen3,
.id = 0x58,
@@ -236,6 +241,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
#ifdef CONFIG_ARCH_R8A77980
{ .compatible = "renesas,r8a77980", .data = &soc_rcar_v3h },
#endif
+#ifdef CONFIG_ARCH_R8A77990
+ { .compatible = "renesas,r8a77990", .data = &soc_rcar_e3 },
+#endif
#ifdef CONFIG_ARCH_R8A77995
{ .compatible = "renesas,r8a77995", .data = &soc_rcar_d3 },
#endif
--
2.11.0
^ permalink raw reply related
* [PATCH 08/14] soc: renesas: Add r8a77990 SYSC PM Domain Binding Definitions
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds power domain indices for R-Car E3.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[shimoda: add commit log and SPDX-License-Identifier]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
include/dt-bindings/power/r8a77990-sysc.h | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
create mode 100644 include/dt-bindings/power/r8a77990-sysc.h
diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h
new file mode 100644
index 000000000000..944d85beec15
--- /dev/null
+++ b/include/dt-bindings/power/r8a77990-sysc.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77990_PD_CA53_CPU0 5
+#define R8A77990_PD_CA53_CPU1 6
+#define R8A77990_PD_CR7 13
+#define R8A77990_PD_A3VC 14
+#define R8A77990_PD_3DG_A 17
+#define R8A77990_PD_3DG_B 18
+#define R8A77990_PD_CA53_SCU 21
+#define R8A77990_PD_A2VC1 26
+
+/* Always-on power area */
+#define R8A77990_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */
--
2.11.0
^ permalink raw reply related
* [PATCH 09/14] soc: renesas: rcar-rst: Add support for R-Car E3
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Add support for R-Car E3 (R8A77990) to the R-Car RST driver.
This driver is needed for the clock driver to work.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[shimoda: rebase]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
Documentation/devicetree/bindings/reset/renesas,rst.txt | 1 +
drivers/soc/renesas/Kconfig | 3 ++-
drivers/soc/renesas/rcar-rst.c | 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt
index 7be61efc3c8a..67e83b02e10b 100644
--- a/Documentation/devicetree/bindings/reset/renesas,rst.txt
+++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
@@ -30,6 +30,7 @@ Required properties:
- "renesas,r8a77965-rst" (R-Car M3-N)
- "renesas,r8a77970-rst" (R-Car V3M)
- "renesas,r8a77980-rst" (R-Car V3H)
+ - "renesas,r8a77990-rst" (R-Car E3)
- "renesas,r8a77995-rst" (R-Car D3)
- reg: Address start and address range for the device.
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 96dd93660359..c0e0286a2360 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -4,7 +4,8 @@ config SOC_RENESAS
select SOC_BUS
select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 || \
ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77965 || \
- ARCH_R8A77970 || ARCH_R8A77980 || ARCH_R8A77995
+ ARCH_R8A77970 || ARCH_R8A77980 || ARCH_R8A77990 || \
+ ARCH_R8A77995
select SYSC_R8A7743 if ARCH_R8A7743
select SYSC_R8A7745 if ARCH_R8A7745
select SYSC_R8A77470 if ARCH_R8A77470
diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index 66d7dbac2ded..d9c1034e70e9 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++ b/drivers/soc/renesas/rcar-rst.c
@@ -60,6 +60,7 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
{ .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
{ .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
+ { .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
{ /* sentinel */ }
};
--
2.11.0
^ permalink raw reply related
* [PATCH 10/14] soc: renesas: r8a77995-sysc: Cleanups
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Minor cleanup of artefacts caused by deriving from r8a7795-sysc.c:
- Remove unused inclusion of <linux/sys_soc.h>,
- Make r8a77995_areas[] const.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/soc/renesas/r8a77995-sysc.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/soc/renesas/r8a77995-sysc.c b/drivers/soc/renesas/r8a77995-sysc.c
index f718429cab02..1b2ef415bbe1 100644
--- a/drivers/soc/renesas/r8a77995-sysc.c
+++ b/drivers/soc/renesas/r8a77995-sysc.c
@@ -10,13 +10,12 @@
#include <linux/bug.h>
#include <linux/kernel.h>
-#include <linux/sys_soc.h>
#include <dt-bindings/power/r8a77995-sysc.h>
#include "rcar-sysc.h"
-static struct rcar_sysc_area r8a77995_areas[] __initdata = {
+static const struct rcar_sysc_area r8a77995_areas[] __initconst = {
{ "always-on", 0, 0, R8A77995_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
{ "ca53-scu", 0x140, 0, R8A77995_PD_CA53_SCU, R8A77995_PD_ALWAYS_ON,
PD_SCU },
--
2.11.0
^ permalink raw reply related
* [PATCH 11/14] arm: shmobile: Change platform dependency to ARCH_RENESAS
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Since commit 9b5ba0df4ea4f940 ("ARM: shmobile: Introduce ARCH_RENESAS")
ARCH_RENESAS is a more appropriate platform dependency than the legacy
ARCH_SHMOBILE, hence use the former.
This will allow to drop ARCH_SHMOBILE on ARM in the near future.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/Kconfig | 2 +-
arch/arm/Makefile | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a7f8e7f4b88f..2d34c0a44877 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1467,7 +1467,7 @@ config ARM_PSCI
config ARCH_NR_GPIO
int
default 2048 if ARCH_SOCFPGA
- default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
+ default 1024 if ARCH_BRCMSTB || ARCH_RENESAS || ARCH_TEGRA || \
ARCH_ZYNQ
default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index e4e537f27339..a92f5a876d96 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -212,7 +212,7 @@ machine-$(CONFIG_ARCH_S3C24XX) += s3c24xx
machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx
machine-$(CONFIG_ARCH_S5PV210) += s5pv210
machine-$(CONFIG_ARCH_SA1100) += sa1100
-machine-$(CONFIG_ARCH_SHMOBILE) += shmobile
+machine-$(CONFIG_ARCH_RENESAS) += shmobile
machine-$(CONFIG_ARCH_SIRF) += prima2
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_STI) += sti
--
2.11.0
^ permalink raw reply related
* [PATCH 12/14] arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile Kconfig
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Michel Pollet <michel.pollet@bp.renesas.com>
Add the RZ/N1D SoC to the reset of the Renesas SoC Collection.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/Kconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 96672da02f5f..fcc273f127bf 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -114,6 +114,10 @@ config ARCH_R8A7794
bool "R-Car E2 (R8A77940)"
select ARCH_RCAR_GEN2
+config ARCH_R9A06G032
+ bool "RZ/N1D (R9A06G032)"
+ select ARCH_RZN1
+
config ARCH_RZN1
bool "RZ/N1 (R9A06G0xx) Family"
select ARM_AMBA
--
2.11.0
^ permalink raw reply related
* [GIT PULL] Renesas ARM Based SoC Updates for v4.18
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC updates for v4.18.
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-for-v4.18
for you to fetch changes up to 086b399965a7ee7e50c3b3c57f2dba30ff0334b0:
soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B} (2018-05-16 10:57:44 +0200)
----------------------------------------------------------------
Renesas ARM Based SoC Updates for v4.18
* SoC
- Change platform dependency to ARCH_RENESAS
Geert Uytterhoeven says "The Renesas Fine Display Processor driver is
used on Renesas R-Car SoCs only. Since commit 9b5ba0df4ea4f940 ("ARM:
shmobile: Introduce ARCH_RENESAS") is ARCH_RENESAS a more appropriate
platform dependency than the legacy ARCH_SHMOBILE, hence use the
former.
This will allow to drop ARCH_SHMOBILE on ARM and ARM64 in the near
future."
- Add the to Kconfig RZ/N1D (r9a06g032) SoC
In preparation for upstream support of this SoC
- Identify R-Car E3 (r8a77990) SoC
- Identify and add minimal support for RZ/G1C (r8a77470) SoC
* R-Car SYSC
- Add support for R-Car E3 (r8a77990) SoC
Shimoda-san says this adds:
+ "Cortex-A53 CPU{0,1}, Cortex-A53 SCU, Cortex-R7, A3VC,
A2VC1 and 3DG-{A,B} power domain areas..."
+ "workaround for 3DG-{A,B} of R-Car E3 ES1.0 because
the SoC has a restriction about the order."
- Remove unused inclusion of <linux/sys_soc.h>,
- Make r8a77995_areas[] const.
* R-Car Reset
- Add support for R-Car E3 (r8a77990) SoC
This driver is needed for the clock driver to work
* Debug-LL
- Add support for RZ/G1C (r8a77470) SoC
RZ/G1C uses SCIF1 for the debug console
----------------------------------------------------------------
Biju Das (5):
soc: renesas: Identify RZ/G1C
soc: renesas: rcar-rst: Add support for RZ/G1C
soc: renesas: rcar-sysc: Add r8a77470 support
ARM: shmobile: r8a77470: basic SoC support
ARM: debug-ll: Add support for r8a77470
Geert Uytterhoeven (2):
soc: renesas: r8a77995-sysc: Cleanups
arm: shmobile: Change platform dependency to ARCH_RENESAS
Michel Pollet (2):
ARM: shmobile: Add the RZ/N1 arch to the shmobile Kconfig
arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile Kconfig
Takeshi Kihara (4):
soc: renesas: identify R-Car E3
soc: renesas: Add r8a77990 SYSC PM Domain Binding Definitions
soc: renesas: rcar-rst: Add support for R-Car E3
soc: renesas: rcar-sysc: Add support for R-Car E3 power areas
Yoshihiro Shimoda (1):
soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}
Documentation/devicetree/bindings/arm/shmobile.txt | 2 +
.../bindings/power/renesas,rcar-sysc.txt | 2 +
.../devicetree/bindings/reset/renesas,rst.txt | 2 +
arch/arm/Kconfig | 2 +-
arch/arm/Kconfig.debug | 13 ++++-
arch/arm/Makefile | 2 +-
arch/arm/mach-shmobile/Kconfig | 13 +++++
arch/arm/mach-shmobile/setup-rcar-gen2.c | 2 +
drivers/soc/renesas/Kconfig | 13 ++++-
drivers/soc/renesas/Makefile | 2 +
drivers/soc/renesas/r8a77470-sysc.c | 29 +++++++++
drivers/soc/renesas/r8a77990-sysc.c | 68 ++++++++++++++++++++++
drivers/soc/renesas/r8a77995-sysc.c | 3 +-
drivers/soc/renesas/rcar-rst.c | 2 +
drivers/soc/renesas/rcar-sysc.c | 6 ++
drivers/soc/renesas/rcar-sysc.h | 2 +
drivers/soc/renesas/renesas-soc.c | 16 +++++
include/dt-bindings/power/r8a77470-sysc.h | 22 +++++++
include/dt-bindings/power/r8a77990-sysc.h | 26 +++++++++
19 files changed, 220 insertions(+), 7 deletions(-)
create mode 100644 drivers/soc/renesas/r8a77470-sysc.c
create mode 100644 drivers/soc/renesas/r8a77990-sysc.c
create mode 100644 include/dt-bindings/power/r8a77470-sysc.h
create mode 100644 include/dt-bindings/power/r8a77990-sysc.h
^ permalink raw reply
* [PATCH 13/14] soc: renesas: rcar-sysc: Add support for R-Car E3 power areas
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds Cortex-A53 CPU{0,1}, Cortex-A53 SCU, Cortex-R7, A3VC,
A2VC1 and 3DG-{A,B} power domain areas for the R8A77990 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[shimoda: fix 3DG-{A,B} and add SPDX-License-Identifier]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../bindings/power/renesas,rcar-sysc.txt | 1 +
drivers/soc/renesas/Kconfig | 5 ++++
drivers/soc/renesas/Makefile | 1 +
drivers/soc/renesas/r8a77990-sysc.c | 33 ++++++++++++++++++++++
drivers/soc/renesas/rcar-sysc.c | 3 ++
drivers/soc/renesas/rcar-sysc.h | 1 +
6 files changed, 44 insertions(+)
create mode 100644 drivers/soc/renesas/r8a77990-sysc.c
diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
index 3e91d2032253..180ae65be753 100644
--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
@@ -21,6 +21,7 @@ Required properties:
- "renesas,r8a77965-sysc" (R-Car M3-N)
- "renesas,r8a77970-sysc" (R-Car V3M)
- "renesas,r8a77980-sysc" (R-Car V3H)
+ - "renesas,r8a77990-sysc" (R-Car E3)
- "renesas,r8a77995-sysc" (R-Car D3)
- reg: Address start and address range for the device.
- #power-domain-cells: Must be 1.
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index c0e0286a2360..1d824cbd462d 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -19,6 +19,7 @@ config SOC_RENESAS
select SYSC_R8A77965 if ARCH_R8A77965
select SYSC_R8A77970 if ARCH_R8A77970
select SYSC_R8A77980 if ARCH_R8A77980
+ select SYSC_R8A77990 if ARCH_R8A77990
select SYSC_R8A77995 if ARCH_R8A77995
if SOC_RENESAS
@@ -76,6 +77,10 @@ config SYSC_R8A77980
bool "R-Car V3H System Controller support" if COMPILE_TEST
select SYSC_RCAR
+config SYSC_R8A77990
+ bool "R-Car E3 System Controller support" if COMPILE_TEST
+ select SYSC_RCAR
+
config SYSC_R8A77995
bool "R-Car D3 System Controller support" if COMPILE_TEST
select SYSC_RCAR
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index a86ece7b84d1..7dc0f20d7907 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_SYSC_R8A7796) += r8a7796-sysc.o
obj-$(CONFIG_SYSC_R8A77965) += r8a77965-sysc.o
obj-$(CONFIG_SYSC_R8A77970) += r8a77970-sysc.o
obj-$(CONFIG_SYSC_R8A77980) += r8a77980-sysc.o
+obj-$(CONFIG_SYSC_R8A77990) += r8a77990-sysc.o
obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o
# Family
diff --git a/drivers/soc/renesas/r8a77990-sysc.c b/drivers/soc/renesas/r8a77990-sysc.c
new file mode 100644
index 000000000000..a8c6417fcd2b
--- /dev/null
+++ b/drivers/soc/renesas/r8a77990-sysc.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas R-Car E3 System Controller
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a77990-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a77990_areas[] __initconst = {
+ { "always-on", 0, 0, R8A77990_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+ { "ca53-scu", 0x140, 0, R8A77990_PD_CA53_SCU, R8A77990_PD_ALWAYS_ON,
+ PD_SCU },
+ { "ca53-cpu0", 0x200, 0, R8A77990_PD_CA53_CPU0, R8A77990_PD_CA53_SCU,
+ PD_CPU_NOCR },
+ { "ca53-cpu1", 0x200, 1, R8A77990_PD_CA53_CPU1, R8A77990_PD_CA53_SCU,
+ PD_CPU_NOCR },
+ { "cr7", 0x240, 0, R8A77990_PD_CR7, R8A77990_PD_ALWAYS_ON },
+ { "a3vc", 0x380, 0, R8A77990_PD_A3VC, R8A77990_PD_ALWAYS_ON },
+ { "a2vc1", 0x3c0, 1, R8A77990_PD_A2VC1, R8A77990_PD_A3VC },
+ { "3dg-a", 0x100, 0, R8A77990_PD_3DG_A, R8A77990_PD_ALWAYS_ON },
+ { "3dg-b", 0x100, 1, R8A77990_PD_3DG_B, R8A77990_PD_3DG_A },
+};
+
+const struct rcar_sysc_info r8a77990_sysc_info __initconst = {
+ .areas = r8a77990_areas,
+ .num_areas = ARRAY_SIZE(r8a77990_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 99203bdc333a..95120acc4d80 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -296,6 +296,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
#ifdef CONFIG_SYSC_R8A77980
{ .compatible = "renesas,r8a77980-sysc", .data = &r8a77980_sysc_info },
#endif
+#ifdef CONFIG_SYSC_R8A77990
+ { .compatible = "renesas,r8a77990-sysc", .data = &r8a77990_sysc_info },
+#endif
#ifdef CONFIG_SYSC_R8A77995
{ .compatible = "renesas,r8a77995-sysc", .data = &r8a77995_sysc_info },
#endif
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index 9b24e3af288f..a22e7cf25e30 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -62,6 +62,7 @@ extern const struct rcar_sysc_info r8a7796_sysc_info;
extern const struct rcar_sysc_info r8a77965_sysc_info;
extern const struct rcar_sysc_info r8a77970_sysc_info;
extern const struct rcar_sysc_info r8a77980_sysc_info;
+extern const struct rcar_sysc_info r8a77990_sysc_info;
extern const struct rcar_sysc_info r8a77995_sysc_info;
--
2.11.0
^ permalink raw reply related
* [PATCH 14/14] soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A, B}
From: Simon Horman @ 2018-05-18 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526639075.git.horms+renesas@verge.net.au>
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds workaround for 3DG-{A,B} of R-Car E3 ES1.0 because
the SoC has a restriction about the order.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/soc/renesas/r8a77990-sysc.c | 37 ++++++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/renesas/r8a77990-sysc.c b/drivers/soc/renesas/r8a77990-sysc.c
index a8c6417fcd2b..15579ebc5ed2 100644
--- a/drivers/soc/renesas/r8a77990-sysc.c
+++ b/drivers/soc/renesas/r8a77990-sysc.c
@@ -7,12 +7,13 @@
#include <linux/bug.h>
#include <linux/kernel.h>
+#include <linux/sys_soc.h>
#include <dt-bindings/power/r8a77990-sysc.h>
#include "rcar-sysc.h"
-static const struct rcar_sysc_area r8a77990_areas[] __initconst = {
+static struct rcar_sysc_area r8a77990_areas[] __initdata = {
{ "always-on", 0, 0, R8A77990_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
{ "ca53-scu", 0x140, 0, R8A77990_PD_CA53_SCU, R8A77990_PD_ALWAYS_ON,
PD_SCU },
@@ -27,7 +28,41 @@ static const struct rcar_sysc_area r8a77990_areas[] __initconst = {
{ "3dg-b", 0x100, 1, R8A77990_PD_3DG_B, R8A77990_PD_3DG_A },
};
+static void __init rcar_sysc_fix_parent(struct rcar_sysc_area *areas,
+ unsigned int num_areas, u8 id,
+ int new_parent)
+{
+ unsigned int i;
+
+ for (i = 0; i < num_areas; i++)
+ if (areas[i].isr_bit == id) {
+ areas[i].parent = new_parent;
+ return;
+ }
+}
+
+/* Fixups for R-Car E3 ES1.0 revision */
+static const struct soc_device_attribute r8a77990[] __initconst = {
+ { .soc_id = "r8a77990", .revision = "ES1.0" },
+ { /* sentinel */ }
+};
+
+static int __init r8a77990_sysc_init(void)
+{
+ if (soc_device_match(r8a77990)) {
+ rcar_sysc_fix_parent(r8a77990_areas,
+ ARRAY_SIZE(r8a77990_areas),
+ R8A77990_PD_3DG_A, R8A77990_PD_3DG_B);
+ rcar_sysc_fix_parent(r8a77990_areas,
+ ARRAY_SIZE(r8a77990_areas),
+ R8A77990_PD_3DG_B, R8A77990_PD_ALWAYS_ON);
+ }
+
+ return 0;
+}
+
const struct rcar_sysc_info r8a77990_sysc_info __initconst = {
+ .init = r8a77990_sysc_init,
.areas = r8a77990_areas,
.num_areas = ARRAY_SIZE(r8a77990_areas),
};
--
2.11.0
^ permalink raw reply related
* [PATCH] EDAC, ghes: Make platform-based whitelisting x86-only
From: Borislav Petkov @ 2018-05-18 11:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180518111132.GC17285@pd.tnic>
From: Borislav Petkov <bp@suse.de>
ARM machines all have DMI tables so if they request hw error reporting
through GHES, then the driver should be able to detect DIMMs and report
errors successfully (famous last words :)).
Make the platform-based list x86-specific so that ghes_edac can load on
ARM.
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: James Morse <james.morse@arm.com>
Tested-by: James Morse <james.morse@arm.com>
Cc: Qiang Zheng <zhengqiang10@huawei.com>
Link: https://lkml.kernel.org/r/1526039543-180996-1-git-send-email-zhengqiang10 at huawei.com
---
drivers/edac/ghes_edac.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c
index 863fbf3db29f..473aeec4b1da 100644
--- a/drivers/edac/ghes_edac.c
+++ b/drivers/edac/ghes_edac.c
@@ -440,12 +440,16 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
struct mem_ctl_info *mci;
struct edac_mc_layer layers[1];
struct ghes_edac_dimm_fill dimm_fill;
- int idx;
+ int idx = -1;
- /* Check if safe to enable on this system */
- idx = acpi_match_platform_list(plat_list);
- if (!force_load && idx < 0)
- return -ENODEV;
+ if (IS_ENABLED(CONFIG_X86)) {
+ /* Check if safe to enable on this system */
+ idx = acpi_match_platform_list(plat_list);
+ if (!force_load && idx < 0)
+ return -ENODEV;
+ } else {
+ idx = 0;
+ }
/*
* We have only one logical memory controller to which all DIMMs belong.
--
2.17.0.391.g1f1cddd558b5
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
^ permalink raw reply related
* [PATCH v8 2/3] mtd: spi-nor: add rockchip serial flash controller driver
From: Boris Brezillon @ 2018-05-18 11:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1518092327-3827-1-git-send-email-andy.yan@rock-chips.com>
Hi Andy,
Sorry for the late reply.
On Thu, 8 Feb 2018 20:18:47 +0800
Andy Yan <andy.yan@rock-chips.com> wrote:
> From: Shawn Lin <shawn.lin@rock-chips.com>
Commit message please.
>
> Add Rockchip SFC(serial flash controller) driver.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
> Acked-by: Marek Vasut <marek.vasut@gmail.com>
>
> ---
>
> Changes in v8:
> - remove unused macro SFC_CMD_TRAN_BYTES_MASK
> - set max transfer length to 15.5KB
> - remove unnecessary buffer align check
> - remove the duplicate logic what spi-nor.c already does for spi_nor_write
> - add spi_nor_erase, as the SFC should get the erase address.
Would you mind sending a new version addressing the problem reported by
kbuild robots and the comments made by Ezequiel and Robin?
Also, maybe it's too much work, but it would be good to check if the
driver could use the spi_mem interface [1] so that you can move it to
drivers/spi/ and possibly get everything ready for SPI NANDs.
Thanks,
Boris
[1]https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/tree/include/linux/spi/spi-mem.h?h=for-4.18
^ permalink raw reply
* AArch64 memory
From: Robin Murphy @ 2018-05-18 11:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJ+vNU0RrmQMZ0P0LDWfLbryNSt02eDimKr4i6eWT7-ULMOUyg@mail.gmail.com>
Hi Tim,
On 17/05/18 16:58, Tim Harvey wrote:
> Greetings,
>
> I'm trying to understand some details of the AArch64 memory
> configuration in the kernel.
>
> I've looked at Documentation/arm64/memory.txt which describes the
> virtual memory layout used in terms of translation levels. This
> relates to CONFIG_ARM64_{4K,16K,64K}_PAGES and CONFIG_ARM64_VA_BITS*.
>
> My first question has to do with virtual memory layout: What are the
> advantages and disadvantages for a system with a fixed 2GB of DRAM
> when using using 4KB pages + 3 levels (CONFIG_ARM64_4K_PAGES=y
> CONFIG_ARM64_VA_BITS=39) resulting in 512GB user / 512GB kernel vs
> using 64KB pages + 3 levels (CONFIG_ARM64_64K_PAGES=y
> CONFIG_ARM64_VA_BITS=48)? The physical memory is far less than what
> any of the combinations would offer but I'm not clear if the number of
> levels affects any sort of performance or how fragmentation could play
> into performance.
There have been a number of discussions on the lists about the general
topic in the contexts of several architectures, and I'm sure the last
one I saw regarding arm64 actually had some measurements in it, although
it's proving remarkably tricky to actually dig up again this morning :/
I think the rough executive summary remains that for certain
memory-intensive workloads on AArch64, 64K pages *can* give a notable
performance benefit in terms of reduced TLB pressure (and potentially
also some for TLB miss overhead with 42-bit VA and 2-level tables). The
(major) tradeoff is that for most other workloads, including much of the
kernel itself, the increased allocation granularity leads to a
significant increase in wasted RAM.
My gut feeling is that if you have relatively limited RAM and don't know
otherwise, then 39-bit VA is probably the way to go - notably, there are
also still drivers/filesystems/etc. which don't play too well with
PAGE_SIZE != 4096 - but I'm by no means an expert in this area. If
you're targeting a particular application area (e.g. networking) and can
benchmark some representative workloads to look at performance vs. RAM
usage for different configs, that would probably help inform your
decision the most.
> My second question has to do with CMA and coherent_pool. I have
> understood CMA as being a chunk of physical memory carved out by the
> kernel for allocations from dma_alloc_coherent by drivers that need
> chunks of contiguous memory for DMA buffers. I believe that before CMA
> was introduced we had to do this by defining memory holes. I'm not
> understanding the difference between CMA and the coherent pool. I've
> noticed that if CONFIG_DMA_CMA=y then the coherent pool allocates from
> CMA. Is there some disadvantage of CONFIG_DMA_CMA=y other than if
> defined you need to make sure your CMA is larger than coherent_pool?
> What drivers/calls use coherent_pool vs cma?
coherent_pool is a special thing which exists for the sake of
non-hardware-coherent devices - normally for those we satisfy
DMA-coherent allocations by setting up a non-cacheable remap of the
allocated buffer - see dma_common_contiguous_remap(). However, drivers
may call dma_alloc_coherent(..., GFP_ATOMIC) from interrupt handlers, at
which point we can't call get_vm_area() to remap on demand, since that
might sleep, so we reserve a pool pre-mapped as non-cacheable to satisfy
such atomic allocations from. I'm not sure why its user-visible name is
"coherent pool" rather than the more descriptive "atomic pool" which
it's named internally, but there's probably some history there. If
you're lucky enough not to have any non-coherent DMA masters then you
can safely ignore the whole thing; otherwise it's still generally rare
that it should need adjusting.
CMA is, as you surmise, a much more general thing for providing large
physically-contiguous areas, which the arch code correspondingly uses to
get DMA-contiguous buffers. Unless all your DMA masters are behind
IOMMUs (such that we can make any motley collection of pages look
DMA-contiguous), you probably don't want to turn it off. None of these
details should be relevant as far as drivers are concerned, since from
their viewpoint it's all abstracted behind dma_alloc_coherent().
Robin.
^ permalink raw reply
* [PATCH V5] ARM: dts: da850-evm: Enable LCD and Backlight
From: Sekhar Nori @ 2018-05-18 12:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180518005935.29104-1-aford173@gmail.com>
Hi Adam,
On Friday 18 May 2018 06:29 AM, Adam Ford wrote:
> When using the board files the LCD works, but not with the DT.
> This adds enables the original da850-evm to work with the same
> LCD in device tree mode.
>
> The EVM has a gpio for the regulator and a PWM for dimming the
> backlight. The LCD and the vpif display pins are mutually
> exclusive, so if using the LCD, do not load the vpif driver.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
Looks good mostly, some comments below.
> ---
> V5: Resync against v4.18/dt
>
> V4: Move the backlight to PWM, so the driver can control the regulator allowing the
> regulator to power down and enabling the ability to change the brightness of the
> backlight
>
> V3: Fix errant GPIO, label GPIO pins, and rename the regulator to be more explict to
> backlight which better matches the schematic. Updated the description to explain
> that it cannot be used at the same time as the vpif driver.
>
> V2: Add regulator and GPIO enable pins. Remove PWM backlight and replace with GPIO
>
> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
> index 0e82bb988fde..5bf6ea513b12 100644
> --- a/arch/arm/boot/dts/da850-evm.dts
> +++ b/arch/arm/boot/dts/da850-evm.dts
> @@ -27,6 +27,58 @@
> spi0 = &spi1;
> };
>
> + backlight:backlight-pwm {
Leave a space after the ':' as is the norm.
> + pinctrl-names = "default";
> + pinctrl-0 = <&ecap2_pins>;
> + power-supply = <&backlight_reg>;
> + compatible = "pwm-backlight";
> + pwms = <&ecap2 0 50000 0>;
> + brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
> + default-brightness-level = <7>;
Are you able to notice some brightness change at each of these levels?
> + };
> +
> + panel {
> + compatible = "ti,tilcdc,panel";
> + pinctrl-names = "default";
> + pinctrl-0 = <&lcd_pins>;
> + /* The vpif and the LCD are mutually exclusive.
> + * To enable VPIF, change the status below to 'disabled' then
> + * then change the status of the vpif below to 'okay' */
Please follow the multi-line comment style described in
Documentation/process/coding-style.rst
> + status = "okay";
> + enable-gpios = <&gpio 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */
> +
> + panel-info {
> + ac-bias = <255>;
> + ac-bias-intrpt = <0>;
> + dma-burst-sz = <16>;
> + bpp = <16>;
> + fdd = <0x80>;
> + sync-edge = <0>;
> + sync-ctrl = <1>;
> + raster-order = <0>;
> + fifo-th = <0>;
> + };
> +
> + display-timings {
> + native-mode = <&timing0>;
> + timing0: 480x272 {
> + clock-frequency = <9000000>;
> + hactive = <480>;
> + vactive = <272>;
> + hfront-porch = <3>;
> + hback-porch = <2>;
> + hsync-len = <42>;
> + vback-porch = <3>;
> + vfront-porch = <4>;
> + vsync-len = <11>;
> + hsync-active = <0>;
> + vsync-active = <0>;
> + de-active = <1>;
> + pixelclk-active = <1>;
> + };
> + };
> + };
> +
> vbat: fixedregulator0 {
> compatible = "regulator-fixed";
> regulator-name = "vbat";
> @@ -35,6 +87,15 @@
> regulator-boot-on;
> };
>
> + backlight_reg: backlight-regulator {
"backlight_lcd:" perhaps?
> + compatible = "regulator-fixed";
> + regulator-name = "lcd_backlight_pwr";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio 47 GPIO_ACTIVE_HIGH>; /* lcd_backlight_pwr */
> + enable-active-high;
> + };
> +
> sound {
> compatible = "simple-audio-card";
> simple-audio-card,name = "DA850/OMAP-L138 EVM";
> @@ -63,6 +124,10 @@
> };
> };
>
> +&ecap2 {
> + status = "okay";
> +};
> +
> &pmx_core {
> status = "okay";
>
> @@ -109,6 +174,10 @@
> status = "okay";
> };
>
> +&lcdc {
> + status = "okay";
> +};
> +
> &i2c0 {
> status = "okay";
> clock-frequency = <100000>;
> @@ -336,5 +405,8 @@
> &vpif {
> pinctrl-names = "default";
> pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>;
> - status = "okay";
> + /* The vpif and the LCD are mutually exclusive.
> + * To enable VPIF, disable the ti,tilcdc,panel then
> + * changed the status below to 'okay' */
Here too, please follow the multi-line comment style.
> + status = "disabled";
Thanks,
Sekhar
^ permalink raw reply
* [PATCH] ARM: davinci_all_defconfig: set CONFIG_BACKLIGHT_PWM=m
From: Sekhar Nori @ 2018-05-18 12:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180518004331.28120-1-aford173@gmail.com>
On Friday 18 May 2018 06:13 AM, Adam Ford wrote:
> The da850-evm came with an LCD with a backlight tied to a pwm. This
> enables CONFIG_BACKLIGHT_PWM as a module so the PWM backlight can be
> used to maintain brightness control of the backlight.
>
> Note: make savedefconfig changed the order of one of the config options
Can you leave out that hunk instead? At some point I will do a
savedefconfig resync.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
Thanks,
Sekhar
^ permalink raw reply
* [PATCH RT] arm64: fpsimd: use a local_lock() in addition to local_bh_disable()
From: Dave Martin @ 2018-05-18 12:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180517181932.GW7753@e103592.cambridge.arm.com>
On Thu, May 17, 2018 at 07:19:43PM +0100, Dave Martin wrote:
[...]
> kernel_neon_begin() could then do
>
> local_fpsimd_context_lock();
>
> /* ... */
>
> preempt_disable();
> local_unlock(fpsimd_context_lock);
>
> ... with the following in kernel_neon_end():
>
> local_unlock(fpsimd_lock);
> preempt_enable();
>
>
> If kernel-mode NEON was considered harmful to RT due to the context
> switch overheads, then the above might be overkill. SVE will be worse
> in that regard, and also needs thinking about at some point -- I've not
> looked at if from the RT angle at all.
Hmmm, !KERNEL_MODE_NEON breaks EFI, so this probably does want looking
at. Ard's recent rework to enable voluntary preemption the crypto
backends for arm64 [1] should reduce the fpsimd_lock blackouts, but it
still depends on the backends playing nice.
Cheers
---Dave
[1] [PATCH resend 00/10] crypto: arm64 - play nice with CONFIG_PREEMPT
lists.infradead.org/pipermail/linux-arm-kernel/2018-April/574819.html
^ permalink raw reply
* [PATCH 0/5] ARM: shmobile: rcar-gen2: Remove legacy SMP fallback code
From: Geert Uytterhoeven @ 2018-05-18 12:48 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon, Magnus,
R-Car H2 and M2-W have been supporting SMP enablement from DT using the
"renesas,apmu" enable-method since v4.8. A legacy fallback was left in
place for backwards compatibility with old DTBs.
This patch series removes the legacy SMP fallbacks for R-Car H2 and
M2-W, and consolidates their support in the common R-Car Gen2 machine
definition.
For testing, this series is available in the
topic/rcar2-legacy-smp-removal-v1 branch of my renesas-drivers git
repository at
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
Thanks for applying!
Geert Uytterhoeven (5):
ARM: shmobile: r8a7790: Remove legacy SMP fallback code
ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definition
ARM: shmobile: r8a7791: Remove legacy SMP fallback code
ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition
ARM: shmobile: Remove unused shmobile_smp_init_fallback_ops()
arch/arm/mach-shmobile/Makefile | 4 --
arch/arm/mach-shmobile/common.h | 1 -
arch/arm/mach-shmobile/platsmp.c | 9 ----
arch/arm/mach-shmobile/r8a7790.h | 7 ----
arch/arm/mach-shmobile/r8a7791.h | 7 ----
arch/arm/mach-shmobile/setup-r8a7790.c | 38 -----------------
arch/arm/mach-shmobile/setup-r8a7791.c | 39 ------------------
arch/arm/mach-shmobile/setup-rcar-gen2.c | 6 +--
arch/arm/mach-shmobile/smp-r8a7790.c | 71 --------------------------------
arch/arm/mach-shmobile/smp-r8a7791.c | 53 ------------------------
10 files changed, 2 insertions(+), 233 deletions(-)
delete mode 100644 arch/arm/mach-shmobile/r8a7790.h
delete mode 100644 arch/arm/mach-shmobile/r8a7791.h
delete mode 100644 arch/arm/mach-shmobile/setup-r8a7790.c
delete mode 100644 arch/arm/mach-shmobile/setup-r8a7791.c
delete mode 100644 arch/arm/mach-shmobile/smp-r8a7790.c
delete mode 100644 arch/arm/mach-shmobile/smp-r8a7791.c
--
2.7.4
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
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