* [GIT PULL 5/5] i.MX defconfig updates for 4.18
From: Shawn Guo @ 2018-05-20 14:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526828281-14664-1-git-send-email-shawnguo@kernel.org>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-defconfig-4.18
for you to fetch changes up to 1049167999fc9a078c5914db9f341a275c2376cb:
ARM: imx_v6_v7_defconfig: Select CONFIG_GPIO_MAX732X by default (2018-05-04 17:03:20 +0800)
----------------------------------------------------------------
i.MX defconfig update for 4.18:
- Enable i.MX6SLL SoC support.
- Build in GPIO_MAX732X support as the GPIO expanders are used on
i.MX6 SabreAuto boards.
- Enable driver for RN5T618 PMIC and Marvell MWIFIEX support which
are found on i.MX6/7 Colibri boards.
- Build in OCOTP NVMEM driver for Vybrid (vf610) SoCs.
----------------------------------------------------------------
Anson Huang (1):
ARM: imx_v6_v7_defconfig: Select CONFIG_GPIO_MAX732X by default
Bai Ping (1):
ARM: imx_v6_v7_defconfig: enable imx6sll by default
Stefan Agner (3):
ARM: imx_v6_v7_defconfig: add RN5T618 PMIC family support
ARM: imx_v6_v7_defconfig: add mwifiex driver
ARM: imx_v6_v7_defconfig: enable Vybrid OCOTP driver
arch/arm/configs/imx_v6_v7_defconfig | 9 +++++++++
1 file changed, 9 insertions(+)
^ permalink raw reply
* [GIT PULL 4/5] Freescale arm64 device tree updates for 4.18
From: Shawn Guo @ 2018-05-20 14:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526828281-14664-1-git-send-email-shawnguo@kernel.org>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-dt64-4.18
for you to fetch changes up to 70ce60431e45ace2a1198d4cf339beaef1de9f8b:
arm64: dts: fsl-ls1012a: Fix DTC aliases warnings (2018-05-15 14:43:58 +0800)
----------------------------------------------------------------
Freescale arm64 device tree update for 4.18:
- Add unit address for ls208xa-rdb SPI flash node matching 'reg'
property to fix DTC warning unit_address_vs_reg.
- Use hypen instead of underscore in aliases name for fsl-ls1012a to
fix DTC warning alias_paths.
----------------------------------------------------------------
Fabio Estevam (2):
arm64: dts: ls208xa-rdb: Pass unit name to SPI flash node
arm64: dts: fsl-ls1012a: Fix DTC aliases warnings
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 10 +++++-----
arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
^ permalink raw reply
* [GIT PULL 3/5] i.MX device tree updates for 4.18
From: Shawn Guo @ 2018-05-20 14:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526828281-14664-1-git-send-email-shawnguo@kernel.org>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-dt-4.18
for you to fetch changes up to 204d9e32b7971ecd187068c3a40c48bac4656cb0:
ARM: dts: imx28/imx53: enable edt-ft5x06 wakeup source (2018-05-20 21:04:59 +0800)
----------------------------------------------------------------
i.MX device tree update for 4.18:
- New boards support: BTicino i.MX6DL Mamoj board, DHCOM iMX6 SoM and
PDK2 board, Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit,
Kieback & Peter GmbH iMX6Q TPC board.
- A series from Anson Huang to add a bunch of devices for i.MX6SX
SabreAuto board, PMIC, IO expanders, FEC, Watchdog, LED and Touch.
- Update i.MX7D for cpufreq support, using operating-points-v2
bindings, correcting cpu supply name for voltage scaling.
- Clean up unneeded 'codec-handle' property from imx25-pdk and
imx53-tx53 device tree.
- Switch SoC dtsi and NXP board dts files to use SPDX identifier.
- Remove unnecessary '#address-cells/#size-cells' to fix DTC warning
avoid_unnecessary_addr_size seen with W=1 switch.
- A series from Rob Herring to fix DTC warning graph_endpoint seen with
IPU OF graph when W=1 switch is on.
- Update a few boards to use symbol name instead of hard-coding the
input codes.
- Update a number of boards to use IRQ_TYPE specifier instead of the
raw value.
- A few updates for i.MX6 RDU2 board: bumping SoC/PU operating points,
adding assigned clocks for GPU, and enabling eGalax touchscreen.
- A couple of i.MX51 RDU1 updates: limiting usbh1 to full-speed, and
cleaning up eMMC device node.
- Convert Hummingboard audio bindings from imx-audio-sgtl5000 to
simple-audio-card, so that auxiliary audio devices such as external
amplifiers can be supported.
- Replace underscore with hyphen in aliases name to fix DTC warning
alias_paths with W=1 switch.
- A couple of updates on i.MX7D SAI and i.MX6ULL UART5 pin defines.
- Other random and small changes.
----------------------------------------------------------------
Anson Huang (13):
ARM: dts: imx7d-sdb: add gpio key support
ARM: dts: imx7s: add anatop vdd1p2 regulator
ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
ARM: dts: imx6sx-sabreauto: add PMIC support
ARM: dts: imx6sx-sabreauto: add max7322 IO expander support
ARM: dts: imx6sx-sabreauto: add IO expander max7310 support
ARM: dts: imx6sx-sabreauto: add fec support
ARM: dts: imx6sx-sabreauto: add wdog external reset
ARM: dts: imx6sx-sabreauto: add debug LED support
ARM: dts: imx6sx-sabreauto: add egalax touch screen support
ARM: dts: imx7d: correct cpu supply name for voltage scaling
ARM: dts: imx7s-warp: remove unnecessary cpu regulator supply
ARM: dts: imx7d: use operating-points-v2 for cpu
Daniel Mack (1):
ARM: dts: imx28/imx53: enable edt-ft5x06 wakeup source
Fabio Estevam (26):
ARM: dts: imx25-pdk: Remove unneeded 'codec-handle' property
ARM: dts: imx53-tx53: Remove unneeded 'codec-handle' property
ARM: dts: imx6qdl-wandboard: Let the codec control MCLK pinctrl
ARM: dts: imx7: Move tempmon node out of bus
ARM: dts: imx6qdl-tx6: Remove 'bus-format-override' property
ARM: dts: imx6ul: Add CAAM support
ARM: dts: imx6qdl: Remove #address/#size-cells from mipi_dsi
ARM: dts: imx: Remove #address/#size-cells from switch nodes
ARM: dts: imx: Remove #address/#size-cells from stmpe nodes
ARM: dts: imx6qdl-sabre: Remove #address/#size-cells from camera port nodes
ARM: dts: imx53-ppd: Remove unnecessary #address/#size-cells
ARM: dts: imx6dl-aristainetos2_4: Remove #address/#size-cells from display0
ARM: dts: imx6q-b850v3: Remove #address/#size-cells from stdp2690
ARM: dts: imx6q-utilite-pro: Remove #address/#size-cells from encoder
ARM: dts: imx6q-var-dt6customboard: Remove #address/#size-cells from gpio-keys
ARM: dts: imx6q-pistachio: Use 'uart-has-rtscts' property
ARM: dts: imx6qdl-wandboard: Switch to SPDX identifier
ARM: dts: imx6qdl-udoo: Switch to SPDX identifier
ARM: dts: imx28-cfa10049: Remove unnecessary #address/#size-cells
ARM: dts: imx28-duckbill-2-enocean: Remove unnecessary #address/#size-cells
ARM: dts: imx: Switch to SPDX identifier
ARM: dts: imx53-ard: Do not hardcode input codes
ARM: dts: imx53-smd: Do not hardcode input codes
ARM: dts: imx6q-gk802: Do not hardcode input codes
ARM: dts: imx: Switch NXP boards to SPDX identifier
ARM: dts: imx6/7: Remove unit-address from anatop regulators
Greg Ungerer (1):
ARM: dts: imx6ull: add UART5 input select register definitions
Hern?n Gonzalez (4):
ARM: dts: vf-colibri-eval-v3: Use IRQ_TYPE specifier
ARM: dts: imx53-qsb: Use IRQ_TYPE specifier
ARM: dts: imx53-voipac-dmm-668: Use IRQ_TYPE specifier
ARM: dts: imx6qdl-phytec-pfla02: Use IRQ_TYPE specifier
Jagan Teki (4):
dt-bindings: Add vendor prefix for Bticino
ARM: dts: i.MX6: Add BTicino i.MX6DL Mamoj initial support
ARM: dts: imx6q-icore-ofcap12: Switch LVDS timings from panel-simple
ARM: dts: imx6q: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support
Ken Lin (1):
ARM: dts: imx: ba16: add "mfg" Q7 SPI-NOR partition
Lucas Stach (3):
ARM: dts: imx6: RDU2: bump SoC/PU operating points by 25mV
ARM: dts: imx6: RDU2+: add assigned clocks for GPU 3D
ARM: dts: imx6: RDU2: add eGalax touchscreen
Lukasz Majewski (1):
ARM: dts: tpc: Device tree description of the iMX6Q TPC board
Marek Vasut (1):
ARM: dts: imx6q: Add support for the DHCOM iMX6 SoM and PDK2
Matt Porter (1):
ARM: dts: hummingboard: convert onboard audio to simple-audio-card
Nikita Yushchenko (3):
ARM: dts: imx51-zii-rdu1: limit usbh1 to full-speed
ARM: dts: vf610-zii-dev: enable vf610 builtin temp sensor
ARM: dts: imx51-zii-rdu1: cleanup eMMC node
Rob Herring (3):
ARM: dts: imx: fix IPU OF graph endpoint node names
ARM: dts: imx53: Fix LDB OF graph warning
ARM: dts: imx7: Fix error in coresight TPIU graph connection
Sebastian Reichel (1):
ARM: dts: imx53-ppd: Use IRQ_TYPE_* constants
Shawn Guo (7):
ARM: dts: imx6sx-sabreauto: drop 'regulators' container node
ARM: dts: imx6sx-sabreauto: drop board specific pinctrl container node
ARM: dts: imx: drop unnecessary #address-cells/#size-cells
ARM: dts: imx1: move clk32 clock into soc dtsi
ARM: dts: imx27: use label to override osc26m clock setting
ARM: dts: imx: drop 'clocks' container for board level clocks
ARM: dts: imx: replace underscore with hyphen in aliases name
Shengjiu Wang (1):
ARM: dts: imx7d-pinfunc: update sai select input value
Stefan Wahren (1):
ARM: dts: imx6ull: add UART5 RTS input select register
.../devicetree/bindings/vendor-prefixes.txt | 1 +
arch/arm/boot/dts/Makefile | 4 +
arch/arm/boot/dts/imx1-ads.dts | 11 -
arch/arm/boot/dts/imx1.dtsi | 21 +-
arch/arm/boot/dts/imx23-evk.dts | 13 +-
arch/arm/boot/dts/imx23.dtsi | 13 +-
arch/arm/boot/dts/imx25-pdk.dts | 14 +-
arch/arm/boot/dts/imx25.dtsi | 16 +-
arch/arm/boot/dts/imx27-apf27.dts | 13 +-
arch/arm/boot/dts/imx27-pdk.dts | 13 +-
arch/arm/boot/dts/imx27.dtsi | 18 +-
arch/arm/boot/dts/imx28-cfa10049.dts | 2 -
arch/arm/boot/dts/imx28-duckbill-2-enocean.dts | 2 -
arch/arm/boot/dts/imx28-evk.dts | 13 +-
arch/arm/boot/dts/imx28-tx28.dts | 14 +-
arch/arm/boot/dts/imx28.dtsi | 13 +-
arch/arm/boot/dts/imx31.dtsi | 13 +-
arch/arm/boot/dts/imx35-pdk.dts | 15 +-
arch/arm/boot/dts/imx35.dtsi | 14 +-
arch/arm/boot/dts/imx50-evk.dts | 17 +-
arch/arm/boot/dts/imx50.dtsi | 3 -
arch/arm/boot/dts/imx51-babbage.dts | 15 +-
arch/arm/boot/dts/imx51-zii-rdu1.dts | 6 +-
arch/arm/boot/dts/imx51.dtsi | 18 +-
arch/arm/boot/dts/imx53-ard.dts | 11 +-
arch/arm/boot/dts/imx53-m53.dtsi | 2 -
arch/arm/boot/dts/imx53-ppd.dts | 12 +-
arch/arm/boot/dts/imx53-qsb-common.dtsi | 15 +-
arch/arm/boot/dts/imx53-qsb.dts | 17 +-
arch/arm/boot/dts/imx53-qsrb.dts | 15 +-
arch/arm/boot/dts/imx53-smd.dts | 20 +-
arch/arm/boot/dts/imx53-tx53-x03x.dts | 1 +
arch/arm/boot/dts/imx53-tx53.dtsi | 14 +-
arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi | 2 +-
arch/arm/boot/dts/imx53.dtsi | 11 +-
arch/arm/boot/dts/imx6dl-aristainetos2_4.dts | 2 -
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 15 +-
arch/arm/boot/dts/imx6dl-mamoj.dts | 224 ++++++++++
arch/arm/boot/dts/imx6dl-sabreauto.dts | 10 +-
arch/arm/boot/dts/imx6dl-sabresd.dts | 10 +-
arch/arm/boot/dts/imx6dl-udoo.dts | 6 +-
arch/arm/boot/dts/imx6dl-wandboard-revb1.dts | 6 +-
arch/arm/boot/dts/imx6dl-wandboard-revd1.dts | 6 +-
arch/arm/boot/dts/imx6dl-wandboard.dts | 6 +-
arch/arm/boot/dts/imx6dl.dtsi | 12 +-
arch/arm/boot/dts/imx6q-b850v3.dts | 4 -
arch/arm/boot/dts/imx6q-ba16.dtsi | 7 +-
arch/arm/boot/dts/imx6q-bx50v3.dtsi | 13 +-
arch/arm/boot/dts/imx6q-dhcom-pdk2.dts | 151 +++++++
arch/arm/boot/dts/imx6q-dhcom-som.dtsi | 476 +++++++++++++++++++++
arch/arm/boot/dts/imx6q-gk802.dts | 3 +-
arch/arm/boot/dts/imx6q-icore-mipi.dts | 25 ++
arch/arm/boot/dts/imx6q-icore-ofcap12.dts | 31 +-
arch/arm/boot/dts/imx6q-kp-tpc.dts | 22 +
arch/arm/boot/dts/imx6q-kp.dtsi | 432 +++++++++++++++++++
arch/arm/boot/dts/imx6q-novena.dts | 2 -
arch/arm/boot/dts/imx6q-pistachio.dts | 2 +-
arch/arm/boot/dts/imx6q-sabreauto.dts | 15 +-
arch/arm/boot/dts/imx6q-sabresd.dts | 15 +-
arch/arm/boot/dts/imx6q-udoo.dts | 6 +-
arch/arm/boot/dts/imx6q-utilite-pro.dts | 2 -
arch/arm/boot/dts/imx6q-var-dt6customboard.dts | 2 -
arch/arm/boot/dts/imx6q-wandboard-revb1.dts | 6 +-
arch/arm/boot/dts/imx6q-wandboard-revd1.dts | 6 +-
arch/arm/boot/dts/imx6q-wandboard.dts | 6 +-
arch/arm/boot/dts/imx6q.dtsi | 39 +-
arch/arm/boot/dts/imx6qdl-apalis.dtsi | 2 -
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 2 -
arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 2 -
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 52 ++-
arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 47 +-
arch/arm/boot/dts/imx6qdl-icore.dtsi | 25 +-
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 2 +-
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 15 +-
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 3 -
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 18 +-
arch/arm/boot/dts/imx6qdl-tx6-lcd.dtsi | 1 -
arch/arm/boot/dts/imx6qdl-tx6-mb7.dtsi | 3 -
arch/arm/boot/dts/imx6qdl-tx6.dtsi | 6 +-
arch/arm/boot/dts/imx6qdl-udoo.dtsi | 6 +-
arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi | 1 -
arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi | 1 -
arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi | 1 -
arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 14 +-
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 24 +-
arch/arm/boot/dts/imx6qdl.dtsi | 70 ++-
arch/arm/boot/dts/imx6qp-sabreauto.dts | 44 +-
arch/arm/boot/dts/imx6qp-sabresd.dts | 44 +-
arch/arm/boot/dts/imx6qp-wandboard-revd1.dts | 6 +-
arch/arm/boot/dts/imx6qp-zii-rdu2.dts | 5 +
arch/arm/boot/dts/imx6qp.dtsi | 44 +-
arch/arm/boot/dts/imx6sl-evk.dts | 10 +-
arch/arm/boot/dts/imx6sl.dtsi | 34 +-
arch/arm/boot/dts/imx6sx-nitrogen6sx.dts | 4 +-
arch/arm/boot/dts/imx6sx-sabreauto.dts | 427 ++++++++++++++----
arch/arm/boot/dts/imx6sx.dtsi | 101 ++---
arch/arm/boot/dts/imx6ul-14x14-evk.dts | 10 +-
arch/arm/boot/dts/imx6ul-isiot.dtsi | 2 -
arch/arm/boot/dts/imx6ul-tx6ul-mainboard.dts | 2 +-
arch/arm/boot/dts/imx6ul-tx6ul.dtsi | 6 +-
arch/arm/boot/dts/imx6ul.dtsi | 51 ++-
arch/arm/boot/dts/imx6ull-pinfunc.h | 9 +
arch/arm/boot/dts/imx6ull.dtsi | 2 +
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 2 +-
arch/arm/boot/dts/imx7d-nitrogen7.dts | 6 +-
arch/arm/boot/dts/imx7d-pinfunc.h | 6 +-
arch/arm/boot/dts/imx7d-sdb-sht11.dts | 44 +-
arch/arm/boot/dts/imx7d-sdb.dts | 70 ++-
arch/arm/boot/dts/imx7d.dtsi | 71 ++-
arch/arm/boot/dts/imx7s-warp.dts | 4 -
arch/arm/boot/dts/imx7s.dtsi | 88 ++--
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 2 +-
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 6 -
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts | 4 -
arch/arm/boot/dts/vf610-zii-dev.dtsi | 4 +
arch/arm/boot/dts/vfxxx.dtsi | 2 +-
116 files changed, 2285 insertions(+), 1084 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6dl-mamoj.dts
create mode 100644 arch/arm/boot/dts/imx6q-dhcom-pdk2.dts
create mode 100644 arch/arm/boot/dts/imx6q-dhcom-som.dtsi
create mode 100644 arch/arm/boot/dts/imx6q-icore-mipi.dts
create mode 100644 arch/arm/boot/dts/imx6q-kp-tpc.dts
create mode 100644 arch/arm/boot/dts/imx6q-kp.dtsi
^ permalink raw reply
* [GIT PULL 2/5] i.MX SoC changes for 4.18
From: Shawn Guo @ 2018-05-20 14:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526828281-14664-1-git-send-email-shawnguo@kernel.org>
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-soc-4.18
for you to fetch changes up to 0e8d1c4b7613399494720e315f99d21793cacb8c:
ARM: imx: select imx6sll pinctrl when imx6sll enabled (2018-05-02 15:01:32 +0800)
----------------------------------------------------------------
i.MX SoC update for 4.18:
- A series from Bartosz to convert all i.MX plaform code using
at24_platform_data to use at24 eeprom generic device properties.
- Enable pinctrl driver support for i.MX6SLL SoC.
- Clean up i.MX platform code using spi_imx platform data on outdated
documentation and chip select array usage.
----------------------------------------------------------------
Bai Ping (1):
ARM: imx: select imx6sll pinctrl when imx6sll enabled
Bartosz Golaszewski (4):
ARM: imx: vpr200: drop at24_platform_data
ARM: imx: pcm043: use device properties for at24 eeprom
ARM: imx: pca100: use device properties for at24 eeprom
ARM: imx: pcm037: use device properties for at24 eeprom
Trent Piepho (1):
ARM: imx: Update spi_imx platform data to reflect current state
arch/arm/mach-imx/Kconfig | 1 +
arch/arm/mach-imx/mach-mx31_3ds.c | 18 ++----------------
arch/arm/mach-imx/mach-mx31lilly.c | 12 ++----------
arch/arm/mach-imx/mach-mx31lite.c | 16 ++--------------
arch/arm/mach-imx/mach-mx31moboard.c | 17 +++--------------
arch/arm/mach-imx/mach-pca100.c | 13 ++++++-------
arch/arm/mach-imx/mach-pcm037.c | 13 ++++++-------
arch/arm/mach-imx/mach-pcm037_eet.c | 5 +----
arch/arm/mach-imx/mach-pcm043.c | 13 ++++++-------
arch/arm/mach-imx/mach-vpr200.c | 9 +--------
include/linux/platform_data/spi-imx.h | 29 +++++++++++++++++------------
11 files changed, 47 insertions(+), 99 deletions(-)
^ permalink raw reply
* [GIT PULL 1/5] i.MX drivers updates for 4.18
From: Shawn Guo @ 2018-05-20 14:57 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-drivers-4.18
for you to fetch changes up to f54e714cfc53b9164d1206f9ee49042195532a51:
soc: imx: gpc: Do not pass static memory as platform data (2018-04-23 17:03:15 +0800)
----------------------------------------------------------------
i.MX drivers update for 4.18:
- Use platform_device_add_data() instead of a pointer to a static
memory in gpc/gpcv2 driver for platform data passing, so that we
can avoid a BUG() when calling platform_device_put().
----------------------------------------------------------------
Andrey Smirnov (2):
soc: imx: gpcv2: Do not pass static memory as platform data
soc: imx: gpc: Do not pass static memory as platform data
drivers/soc/imx/gpc.c | 18 +++++++++++++-----
drivers/soc/imx/gpcv2.c | 22 +++++++++++++++-------
2 files changed, 28 insertions(+), 12 deletions(-)
^ permalink raw reply
* [PATCH v1 1/5] ARM: trusted_foundations: Implement L2 cache initialization callback
From: Dmitry Osipenko @ 2018-05-20 14:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180520140805.GL17671@n2100.armlinux.org.uk>
On 20.05.2018 17:08, Russell King - ARM Linux wrote:
> On Sun, May 20, 2018 at 01:15:38PM +0300, Dmitry Osipenko wrote:
>> Implement L2 cache initialization firmware callback that should be invoked
>> early in boot to enable cache HW.
>>
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>> ---
>> arch/arm/firmware/trusted_foundations.c | 23 +++++++++++++++++++++++
>> 1 file changed, 23 insertions(+)
>>
>> diff --git a/arch/arm/firmware/trusted_foundations.c b/arch/arm/firmware/trusted_foundations.c
>> index 3fb1b5a1dce9..198ce5c75ca0 100644
>> --- a/arch/arm/firmware/trusted_foundations.c
>> +++ b/arch/arm/firmware/trusted_foundations.c
>> @@ -18,8 +18,13 @@
>> #include <linux/init.h>
>> #include <linux/of.h>
>> #include <asm/firmware.h>
>> +#include <asm/outercache.h>
>> #include <asm/trusted_foundations.h>
>>
>> +#define TF_CACHE_MAINT 0xfffff100
>> +
>> +#define TF_CACHE_INIT 1
>> +
>> #define TF_SET_CPU_BOOT_ADDR_SMC 0xfffff200
>>
>> #define TF_CPU_PM 0xfffffffc
>> @@ -63,9 +68,27 @@ static int tf_prepare_idle(void)
>> return 0;
>> }
>>
>> +#ifdef CONFIG_CACHE_L2X0
>> +static void tf_cache_write_sec(unsigned long val, unsigned int reg)
>> +{
>> + pr_warn("%s: Ignoring write [0x%x]: 0x%08lx\n", __func__, reg, val);
>
> Why at warning level? Is this some issue that the user needs to be
> warned about?
>
If cache-l2x0 code will be changed in the future in a way that it will try to do
something using the secure-registers, then user should be informed about that
incident as we are ignoring the accesses to secure-registers and this may lead
to an undesired consequences. If a such change in cache-l2x0 will happen, then
we will have to take some action by either fixing the invalid accesses or
silencing the warning message if will be appropriate. For now I'd prefer to have
verbosity in the KMSG to masking the potential problems.
^ permalink raw reply
* [PATCH 5/6] mtd: rawnand: ams-delta: use GPIO lookup table
From: Andy Shevchenko @ 2018-05-20 14:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5456625.lDWjtgZygK@z50>
On Sun, May 20, 2018 at 12:55 AM, Janusz Krzysztofik
<jmkrzyszt@gmail.com> wrote:
> On Saturday, May 19, 2018 8:00:38 PM CEST Andy Shevchenko wrote:
>> On Sat, May 19, 2018 at 2:15 AM, Janusz Krzysztofik <jmkrzyszt@gmail.com>
> wrote:
>> NULL check in practice discards the _optional part of gpiod_get(). So,
>> either you use non-optional variant and decide how to handle an
>> errors, or user _optional w/o NULL check.
>
> OK, I'm going to use something like the below while submitting v2:
>
> - gpiod_rdy = devm_gpiod_get_optional(&pdev->dev, "rdy", GPIOD_IN);
> - if (!IS_ERR_OR_NULL(gpiod_rdy)) {
> - this->dev_ready = ams_delta_nand_ready;
> - } else {
> - this->dev_ready = NULL;
> - pr_notice("Couldn't request gpio for Delta NAND ready.\n");
> + priv->gpiod_rdy = devm_gpiod_get_optional(&pdev->dev, "rdy",
> + GPIOD_IN);
> + if (IS_ERR(priv->gpiod_rdy)) {
> + err = PTR_ERR(priv->gpiod_nwp);
> + dev_warn(&pdev->dev, "RDY GPIO request failed (%d)\n", err);
> + goto err_gpiod;
> }
>
> + if (priv->gpiod_rdy)
> + this->dev_ready = ams_delta_nand_ready;
This makes sense.
Though, I completely dislike "rdy" name of GPIO. Where is it documented?
>> >> > +err_gpiod:
>> >> > + if (err == -ENODEV || err == -ENOENT)
>> >> > + err = -EPROBE_DEFER;
>> >>
>> >> Hmm...
>> >
>> > Amstrad Delta uses gpio-mmio driver. Unfortunatelty that driver is not
>> > availble before device init phase, unlike other crucial GPIO drivers which
>> > are initialized earlier, e.g. during the postcore or at latetst the
>> > subsys phase. Hence, devices which depend on GPIO pins provided by
>> > gpio-mmio must either be declared late or fail softly so they get another
>> > chance of being probed succesfully.
>> >
>> > I thought of replacing the gpio-mmio platform driver with bgpio functions
>> > it exports but for now I haven't implemented it, not even shared the
>> > idea.
>> >
>> > Does it really hurt to return -EPROBE_DEFER if a GPIO pin can't be
>> > obtained?
>> I'm only concerned if it would be an infinite defer in the case when
>> driver will never appear.
>> But I don't remember the details.
>
> Deferred probes are handled effectively during late_initcall, no risk of
> infinite defer, see drivers/base/dd.c for details.
Yes, but the code you provided in patch looks somehow suspicious. OK,
I let Linus decide whtat to do with that.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH v1 1/5] ARM: trusted_foundations: Implement L2 cache initialization callback
From: Russell King - ARM Linux @ 2018-05-20 14:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180520101542.12206-2-digetx@gmail.com>
On Sun, May 20, 2018 at 01:15:38PM +0300, Dmitry Osipenko wrote:
> Implement L2 cache initialization firmware callback that should be invoked
> early in boot to enable cache HW.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> arch/arm/firmware/trusted_foundations.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm/firmware/trusted_foundations.c b/arch/arm/firmware/trusted_foundations.c
> index 3fb1b5a1dce9..198ce5c75ca0 100644
> --- a/arch/arm/firmware/trusted_foundations.c
> +++ b/arch/arm/firmware/trusted_foundations.c
> @@ -18,8 +18,13 @@
> #include <linux/init.h>
> #include <linux/of.h>
> #include <asm/firmware.h>
> +#include <asm/outercache.h>
> #include <asm/trusted_foundations.h>
>
> +#define TF_CACHE_MAINT 0xfffff100
> +
> +#define TF_CACHE_INIT 1
> +
> #define TF_SET_CPU_BOOT_ADDR_SMC 0xfffff200
>
> #define TF_CPU_PM 0xfffffffc
> @@ -63,9 +68,27 @@ static int tf_prepare_idle(void)
> return 0;
> }
>
> +#ifdef CONFIG_CACHE_L2X0
> +static void tf_cache_write_sec(unsigned long val, unsigned int reg)
> +{
> + pr_warn("%s: Ignoring write [0x%x]: 0x%08lx\n", __func__, reg, val);
Why at warning level? Is this some issue that the user needs to be
warned about?
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
According to speedtest.net: 8.21Mbps down 510kbps up
^ permalink raw reply
* [PATCH 7/7 v5] arm64: dts: ls208xa: comply with the iommu map binding for fsl_mc
From: Nipun Gupta @ 2018-05-20 13:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526824191-7000-1-git-send-email-nipun.gupta@nxp.com>
fsl-mc bus support the new iommu-map property. Comply to this binding
for fsl_mc bus.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 137ef4d..6010505 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -184,6 +184,7 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
+ dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
clockgen: clocking at 1300000 {
compatible = "fsl,ls2080a-clockgen";
@@ -357,6 +358,8 @@
reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
msi-parent = <&its>;
+ iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
+ dma-coherent;
#address-cells = <3>;
#size-cells = <1>;
@@ -460,6 +463,8 @@
compatible = "arm,mmu-500";
reg = <0 0x5000000 0 0x800000>;
#global-interrupts = <12>;
+ #iommu-cells = <1>;
+ stream-match-mask = <0x7C00>;
interrupts = <0 13 4>, /* global secure fault */
<0 14 4>, /* combined secure interrupt */
<0 15 4>, /* global non-secure fault */
@@ -502,7 +507,6 @@
<0 204 4>, <0 205 4>,
<0 206 4>, <0 207 4>,
<0 208 4>, <0 209 4>;
- mmu-masters = <&fsl_mc 0x300 0>;
};
dspi: dspi at 2100000 {
--
1.9.1
^ permalink raw reply related
* [PATCH 6/7 v5] bus: fsl-mc: set coherent dma mask for devices on fsl-mc bus
From: Nipun Gupta @ 2018-05-20 13:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526824191-7000-1-git-send-email-nipun.gupta@nxp.com>
of_dma_configure() API expects coherent_dma_mask to be correctly
set in the devices. This patch does the needful.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
drivers/bus/fsl-mc/fsl-mc-bus.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c
index fa43c7d..624828b 100644
--- a/drivers/bus/fsl-mc/fsl-mc-bus.c
+++ b/drivers/bus/fsl-mc/fsl-mc-bus.c
@@ -627,6 +627,7 @@ int fsl_mc_device_add(struct fsl_mc_obj_desc *obj_desc,
mc_dev->icid = parent_mc_dev->icid;
mc_dev->dma_mask = FSL_MC_DEFAULT_DMA_MASK;
mc_dev->dev.dma_mask = &mc_dev->dma_mask;
+ mc_dev->dev.coherent_dma_mask = mc_dev->dma_mask;
dev_set_msi_domain(&mc_dev->dev,
dev_get_msi_domain(&parent_mc_dev->dev));
}
--
1.9.1
^ permalink raw reply related
* [PATCH 5/7 v5] bus: fsl-mc: support dma configure for devices on fsl-mc bus
From: Nipun Gupta @ 2018-05-20 13:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526824191-7000-1-git-send-email-nipun.gupta@nxp.com>
This patch adds support of dma configuration for devices on fsl-mc
bus using 'dma_configure' callback for busses. Also, directly calling
arch_setup_dma_ops is removed from the fsl-mc bus.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
drivers/bus/fsl-mc/fsl-mc-bus.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c
index 5d8266c..fa43c7d 100644
--- a/drivers/bus/fsl-mc/fsl-mc-bus.c
+++ b/drivers/bus/fsl-mc/fsl-mc-bus.c
@@ -127,6 +127,16 @@ static int fsl_mc_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
return 0;
}
+static int fsl_mc_dma_configure(struct device *dev)
+{
+ struct device *dma_dev = dev;
+
+ while (dev_is_fsl_mc(dma_dev))
+ dma_dev = dma_dev->parent;
+
+ return of_dma_configure(dev, dma_dev->of_node, 0);
+}
+
static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
@@ -148,6 +158,7 @@ struct bus_type fsl_mc_bus_type = {
.name = "fsl-mc",
.match = fsl_mc_bus_match,
.uevent = fsl_mc_bus_uevent,
+ .dma_configure = fsl_mc_dma_configure,
.dev_groups = fsl_mc_dev_groups,
};
EXPORT_SYMBOL_GPL(fsl_mc_bus_type);
@@ -633,10 +644,6 @@ int fsl_mc_device_add(struct fsl_mc_obj_desc *obj_desc,
goto error_cleanup_dev;
}
- /* Objects are coherent, unless 'no shareability' flag set. */
- if (!(obj_desc->flags & FSL_MC_OBJ_FLAG_NO_MEM_SHAREABILITY))
- arch_setup_dma_ops(&mc_dev->dev, 0, 0, NULL, true);
-
/*
* The device-specific probe callback will get invoked by device_add()
*/
--
1.9.1
^ permalink raw reply related
* [PATCH 4/7 v5] iommu: arm-smmu: Add support for the fsl-mc bus
From: Nipun Gupta @ 2018-05-20 13:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526824191-7000-1-git-send-email-nipun.gupta@nxp.com>
Implement bus specific support for the fsl-mc bus including
registering arm_smmu_ops and bus specific device add operations.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
drivers/iommu/arm-smmu.c | 7 +++++++
drivers/iommu/iommu.c | 21 +++++++++++++++++++++
include/linux/fsl/mc.h | 8 ++++++++
include/linux/iommu.h | 2 ++
4 files changed, 38 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 69e7c60..e1d5090 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -52,6 +52,7 @@
#include <linux/spinlock.h>
#include <linux/amba/bus.h>
+#include <linux/fsl/mc.h>
#include "io-pgtable.h"
#include "arm-smmu-regs.h"
@@ -1459,6 +1460,8 @@ static struct iommu_group *arm_smmu_device_group(struct device *dev)
if (dev_is_pci(dev))
group = pci_device_group(dev);
+ else if (dev_is_fsl_mc(dev))
+ group = fsl_mc_device_group(dev);
else
group = generic_device_group(dev);
@@ -2037,6 +2040,10 @@ static void arm_smmu_bus_init(void)
bus_set_iommu(&pci_bus_type, &arm_smmu_ops);
}
#endif
+#ifdef CONFIG_FSL_MC_BUS
+ if (!iommu_present(&fsl_mc_bus_type))
+ bus_set_iommu(&fsl_mc_bus_type, &arm_smmu_ops);
+#endif
}
static int arm_smmu_device_probe(struct platform_device *pdev)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index d2aa2320..6d4ce35 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -32,6 +32,7 @@
#include <linux/pci.h>
#include <linux/bitops.h>
#include <linux/property.h>
+#include <linux/fsl/mc.h>
#include <trace/events/iommu.h>
static struct kset *iommu_group_kset;
@@ -987,6 +988,26 @@ struct iommu_group *pci_device_group(struct device *dev)
return iommu_group_alloc();
}
+/* Get the IOMMU group for device on fsl-mc bus */
+struct iommu_group *fsl_mc_device_group(struct device *dev)
+{
+ struct device *cont_dev = fsl_mc_cont_dev(dev);
+ struct iommu_group *group;
+
+ /* Container device is responsible for creating the iommu group */
+ if (fsl_mc_is_cont_dev(dev)) {
+ group = iommu_group_alloc();
+ if (IS_ERR(group))
+ return NULL;
+ } else {
+ get_device(cont_dev);
+ group = iommu_group_get(cont_dev);
+ put_device(cont_dev);
+ }
+
+ return group;
+}
+
/**
* iommu_group_get_for_dev - Find or create the IOMMU group for a device
* @dev: target device
diff --git a/include/linux/fsl/mc.h b/include/linux/fsl/mc.h
index f27cb14..dddaca1 100644
--- a/include/linux/fsl/mc.h
+++ b/include/linux/fsl/mc.h
@@ -351,6 +351,14 @@ struct fsl_mc_io {
#define dev_is_fsl_mc(_dev) (0)
#endif
+/* Macro to check if a device is a container device */
+#define fsl_mc_is_cont_dev(_dev) (to_fsl_mc_device(_dev)->flags & \
+ FSL_MC_IS_DPRC)
+
+/* Macro to get the container device of a MC device */
+#define fsl_mc_cont_dev(_dev) (fsl_mc_is_cont_dev(_dev) ? \
+ (_dev) : (_dev)->parent)
+
/*
* module_fsl_mc_driver() - Helper macro for drivers that don't do
* anything special in module init/exit. This eliminates a lot of
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 19938ee..2981200 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -389,6 +389,8 @@ static inline size_t iommu_map_sg(struct iommu_domain *domain,
extern struct iommu_group *pci_device_group(struct device *dev);
/* Generic device grouping function */
extern struct iommu_group *generic_device_group(struct device *dev);
+/* FSL-MC device grouping function */
+struct iommu_group *fsl_mc_device_group(struct device *dev);
/**
* struct iommu_fwspec - per-device IOMMU instance data
--
1.9.1
^ permalink raw reply related
* [PATCH 3/7 v5] iommu: support iommu configuration for fsl-mc devices
From: Nipun Gupta @ 2018-05-20 13:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526824191-7000-1-git-send-email-nipun.gupta@nxp.com>
With of_pci_map_rid available for all the busses, use the function
for configuration of devices on fsl-mc bus
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
drivers/iommu/of_iommu.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
index 811e160..284474d 100644
--- a/drivers/iommu/of_iommu.c
+++ b/drivers/iommu/of_iommu.c
@@ -24,6 +24,7 @@
#include <linux/of_iommu.h>
#include <linux/of_pci.h>
#include <linux/slab.h>
+#include <linux/fsl/mc.h>
#define NO_IOMMU 1
@@ -159,6 +160,23 @@ static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
return err;
}
+static int of_fsl_mc_iommu_init(struct fsl_mc_device *mc_dev,
+ struct device_node *master_np)
+{
+ struct of_phandle_args iommu_spec = { .args_count = 1 };
+ int err;
+
+ err = of_map_rid(master_np, mc_dev->icid, "iommu-map",
+ "iommu-map-mask", &iommu_spec.np,
+ iommu_spec.args);
+ if (err)
+ return err == -ENODEV ? NO_IOMMU : err;
+
+ err = of_iommu_xlate(&mc_dev->dev, &iommu_spec);
+ of_node_put(iommu_spec.np);
+ return err;
+}
+
const struct iommu_ops *of_iommu_configure(struct device *dev,
struct device_node *master_np)
{
@@ -190,6 +208,8 @@ const struct iommu_ops *of_iommu_configure(struct device *dev,
err = pci_for_each_dma_alias(to_pci_dev(dev),
of_pci_iommu_init, &info);
+ } else if (dev_is_fsl_mc(dev)) {
+ err = of_fsl_mc_iommu_init(to_fsl_mc_device(dev), master_np);
} else {
struct of_phandle_args iommu_spec;
int idx = 0;
--
1.9.1
^ permalink raw reply related
* [PATCH 2/7 v5] iommu: of: make of_pci_map_rid() available for other devices too
From: Nipun Gupta @ 2018-05-20 13:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526824191-7000-1-git-send-email-nipun.gupta@nxp.com>
iommu-map property is also used by devices with fsl-mc. This
patch moves the of_pci_map_rid to generic location, so that it
can be used by other busses too.
'of_pci_map_rid' is renamed here to 'of_map_rid' and there is no
functional change done in the API.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/iommu/of_iommu.c | 5 +--
drivers/of/base.c | 102 +++++++++++++++++++++++++++++++++++++++++++++++
drivers/of/irq.c | 5 +--
drivers/pci/of.c | 101 ----------------------------------------------
include/linux/of.h | 11 +++++
include/linux/of_pci.h | 10 -----
6 files changed, 117 insertions(+), 117 deletions(-)
diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
index 5c36a8b..811e160 100644
--- a/drivers/iommu/of_iommu.c
+++ b/drivers/iommu/of_iommu.c
@@ -149,9 +149,8 @@ static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
struct of_phandle_args iommu_spec = { .args_count = 1 };
int err;
- err = of_pci_map_rid(info->np, alias, "iommu-map",
- "iommu-map-mask", &iommu_spec.np,
- iommu_spec.args);
+ err = of_map_rid(info->np, alias, "iommu-map", "iommu-map-mask",
+ &iommu_spec.np, iommu_spec.args);
if (err)
return err == -ENODEV ? NO_IOMMU : err;
diff --git a/drivers/of/base.c b/drivers/of/base.c
index 848f549..c7aac81 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1995,3 +1995,105 @@ int of_find_last_cache_level(unsigned int cpu)
return cache_level;
}
+
+/**
+ * of_map_rid - Translate a requester ID through a downstream mapping.
+ * @np: root complex device node.
+ * @rid: device requester ID to map.
+ * @map_name: property name of the map to use.
+ * @map_mask_name: optional property name of the mask to use.
+ * @target: optional pointer to a target device node.
+ * @id_out: optional pointer to receive the translated ID.
+ *
+ * Given a device requester ID, look up the appropriate implementation-defined
+ * platform ID and/or the target device which receives transactions on that
+ * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or
+ * @id_out may be NULL if only the other is required. If @target points to
+ * a non-NULL device node pointer, only entries targeting that node will be
+ * matched; if it points to a NULL value, it will receive the device node of
+ * the first matching target phandle, with a reference held.
+ *
+ * Return: 0 on success or a standard error code on failure.
+ */
+int of_map_rid(struct device_node *np, u32 rid,
+ const char *map_name, const char *map_mask_name,
+ struct device_node **target, u32 *id_out)
+{
+ u32 map_mask, masked_rid;
+ int map_len;
+ const __be32 *map = NULL;
+
+ if (!np || !map_name || (!target && !id_out))
+ return -EINVAL;
+
+ map = of_get_property(np, map_name, &map_len);
+ if (!map) {
+ if (target)
+ return -ENODEV;
+ /* Otherwise, no map implies no translation */
+ *id_out = rid;
+ return 0;
+ }
+
+ if (!map_len || map_len % (4 * sizeof(*map))) {
+ pr_err("%pOF: Error: Bad %s length: %d\n", np,
+ map_name, map_len);
+ return -EINVAL;
+ }
+
+ /* The default is to select all bits. */
+ map_mask = 0xffffffff;
+
+ /*
+ * Can be overridden by "{iommu,msi}-map-mask" property.
+ * If of_property_read_u32() fails, the default is used.
+ */
+ if (map_mask_name)
+ of_property_read_u32(np, map_mask_name, &map_mask);
+
+ masked_rid = map_mask & rid;
+ for ( ; map_len > 0; map_len -= 4 * sizeof(*map), map += 4) {
+ struct device_node *phandle_node;
+ u32 rid_base = be32_to_cpup(map + 0);
+ u32 phandle = be32_to_cpup(map + 1);
+ u32 out_base = be32_to_cpup(map + 2);
+ u32 rid_len = be32_to_cpup(map + 3);
+
+ if (rid_base & ~map_mask) {
+ pr_err("%pOF: Invalid %s translation - %s-mask (0x%x) ignores rid-base (0x%x)\n",
+ np, map_name, map_name,
+ map_mask, rid_base);
+ return -EFAULT;
+ }
+
+ if (masked_rid < rid_base || masked_rid >= rid_base + rid_len)
+ continue;
+
+ phandle_node = of_find_node_by_phandle(phandle);
+ if (!phandle_node)
+ return -ENODEV;
+
+ if (target) {
+ if (*target)
+ of_node_put(phandle_node);
+ else
+ *target = phandle_node;
+
+ if (*target != phandle_node)
+ continue;
+ }
+
+ if (id_out)
+ *id_out = masked_rid - rid_base + out_base;
+
+ pr_debug("%pOF: %s, using mask %08x, rid-base: %08x, out-base: %08x, length: %08x, rid: %08x -> %08x\n",
+ np, map_name, map_mask, rid_base, out_base,
+ rid_len, rid, masked_rid - rid_base + out_base);
+ return 0;
+ }
+
+ pr_err("%pOF: Invalid %s translation - no match for rid 0x%x on %pOF\n",
+ np, map_name, rid, target && *target ? *target : NULL);
+ return -EFAULT;
+}
+EXPORT_SYMBOL_GPL(of_map_rid);
diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index 02ad93a..e1f6f39 100644
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -22,7 +22,6 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
-#include <linux/of_pci.h>
#include <linux/string.h>
#include <linux/slab.h>
@@ -588,8 +587,8 @@ static u32 __of_msi_map_rid(struct device *dev, struct device_node **np,
* "msi-map" property.
*/
for (parent_dev = dev; parent_dev; parent_dev = parent_dev->parent)
- if (!of_pci_map_rid(parent_dev->of_node, rid_in, "msi-map",
- "msi-map-mask", np, &rid_out))
+ if (!of_map_rid(parent_dev->of_node, rid_in, "msi-map",
+ "msi-map-mask", np, &rid_out))
break;
return rid_out;
}
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index a28355c..d2cebbe 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -362,107 +362,6 @@ int of_pci_get_host_bridge_resources(struct device_node *dev,
EXPORT_SYMBOL_GPL(of_pci_get_host_bridge_resources);
#endif /* CONFIG_OF_ADDRESS */
-/**
- * of_pci_map_rid - Translate a requester ID through a downstream mapping.
- * @np: root complex device node.
- * @rid: PCI requester ID to map.
- * @map_name: property name of the map to use.
- * @map_mask_name: optional property name of the mask to use.
- * @target: optional pointer to a target device node.
- * @id_out: optional pointer to receive the translated ID.
- *
- * Given a PCI requester ID, look up the appropriate implementation-defined
- * platform ID and/or the target device which receives transactions on that
- * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or
- * @id_out may be NULL if only the other is required. If @target points to
- * a non-NULL device node pointer, only entries targeting that node will be
- * matched; if it points to a NULL value, it will receive the device node of
- * the first matching target phandle, with a reference held.
- *
- * Return: 0 on success or a standard error code on failure.
- */
-int of_pci_map_rid(struct device_node *np, u32 rid,
- const char *map_name, const char *map_mask_name,
- struct device_node **target, u32 *id_out)
-{
- u32 map_mask, masked_rid;
- int map_len;
- const __be32 *map = NULL;
-
- if (!np || !map_name || (!target && !id_out))
- return -EINVAL;
-
- map = of_get_property(np, map_name, &map_len);
- if (!map) {
- if (target)
- return -ENODEV;
- /* Otherwise, no map implies no translation */
- *id_out = rid;
- return 0;
- }
-
- if (!map_len || map_len % (4 * sizeof(*map))) {
- pr_err("%pOF: Error: Bad %s length: %d\n", np,
- map_name, map_len);
- return -EINVAL;
- }
-
- /* The default is to select all bits. */
- map_mask = 0xffffffff;
-
- /*
- * Can be overridden by "{iommu,msi}-map-mask" property.
- * If of_property_read_u32() fails, the default is used.
- */
- if (map_mask_name)
- of_property_read_u32(np, map_mask_name, &map_mask);
-
- masked_rid = map_mask & rid;
- for ( ; map_len > 0; map_len -= 4 * sizeof(*map), map += 4) {
- struct device_node *phandle_node;
- u32 rid_base = be32_to_cpup(map + 0);
- u32 phandle = be32_to_cpup(map + 1);
- u32 out_base = be32_to_cpup(map + 2);
- u32 rid_len = be32_to_cpup(map + 3);
-
- if (rid_base & ~map_mask) {
- pr_err("%pOF: Invalid %s translation - %s-mask (0x%x) ignores rid-base (0x%x)\n",
- np, map_name, map_name,
- map_mask, rid_base);
- return -EFAULT;
- }
-
- if (masked_rid < rid_base || masked_rid >= rid_base + rid_len)
- continue;
-
- phandle_node = of_find_node_by_phandle(phandle);
- if (!phandle_node)
- return -ENODEV;
-
- if (target) {
- if (*target)
- of_node_put(phandle_node);
- else
- *target = phandle_node;
-
- if (*target != phandle_node)
- continue;
- }
-
- if (id_out)
- *id_out = masked_rid - rid_base + out_base;
-
- pr_debug("%pOF: %s, using mask %08x, rid-base: %08x, out-base: %08x, length: %08x, rid: %08x -> %08x\n",
- np, map_name, map_mask, rid_base, out_base,
- rid_len, rid, masked_rid - rid_base + out_base);
- return 0;
- }
-
- pr_err("%pOF: Invalid %s translation - no match for rid 0x%x on %pOF\n",
- np, map_name, rid, target && *target ? *target : NULL);
- return -EFAULT;
-}
-
#if IS_ENABLED(CONFIG_OF_IRQ)
/**
* of_irq_parse_pci - Resolve the interrupt for a PCI device
diff --git a/include/linux/of.h b/include/linux/of.h
index 4d25e4f..f4251c3 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -545,6 +545,10 @@ const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur,
extern int of_cpu_node_to_id(struct device_node *np);
+int of_map_rid(struct device_node *np, u32 rid,
+ const char *map_name, const char *map_mask_name,
+ struct device_node **target, u32 *id_out);
+
#else /* CONFIG_OF */
static inline void of_core_init(void)
@@ -931,6 +935,13 @@ static inline int of_cpu_node_to_id(struct device_node *np)
return -ENODEV;
}
+static inline int of_map_rid(struct device_node *np, u32 rid,
+ const char *map_name, const char *map_mask_name,
+ struct device_node **target, u32 *id_out)
+{
+ return -EINVAL;
+}
+
#define of_match_ptr(_ptr) NULL
#define of_match_node(_matches, _node) NULL
#endif /* CONFIG_OF */
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
index 091033a..a23b44a 100644
--- a/include/linux/of_pci.h
+++ b/include/linux/of_pci.h
@@ -17,9 +17,6 @@ struct device_node *of_pci_find_child_device(struct device_node *parent,
int of_get_pci_domain_nr(struct device_node *node);
int of_pci_get_max_link_speed(struct device_node *node);
void of_pci_check_probe_only(void);
-int of_pci_map_rid(struct device_node *np, u32 rid,
- const char *map_name, const char *map_mask_name,
- struct device_node **target, u32 *id_out);
#else
static inline struct device_node *of_pci_find_child_device(struct device_node *parent,
unsigned int devfn)
@@ -44,13 +41,6 @@ static inline int of_pci_get_devfn(struct device_node *np)
return -1;
}
-static inline int of_pci_map_rid(struct device_node *np, u32 rid,
- const char *map_name, const char *map_mask_name,
- struct device_node **target, u32 *id_out)
-{
- return -EINVAL;
-}
-
static inline int
of_pci_get_max_link_speed(struct device_node *node)
{
--
1.9.1
^ permalink raw reply related
* [PATCH 1/7 v5] Docs: dt: add fsl-mc iommu-map device-tree binding
From: Nipun Gupta @ 2018-05-20 13:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526824191-7000-1-git-send-email-nipun.gupta@nxp.com>
The existing IOMMU bindings cannot be used to specify the relationship
between fsl-mc devices and IOMMUs. This patch adds a generic binding for
mapping fsl-mc devices to IOMMUs, using iommu-map property.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/misc/fsl,qoriq-mc.txt | 39 ++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt b/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
index 6611a7c..8cbed4f 100644
--- a/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
+++ b/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
@@ -9,6 +9,25 @@ blocks that can be used to create functional hardware objects/devices
such as network interfaces, crypto accelerator instances, L2 switches,
etc.
+For an overview of the DPAA2 architecture and fsl-mc bus see:
+drivers/staging/fsl-mc/README.txt
+
+As described in the above overview, all DPAA2 objects in a DPRC share the
+same hardware "isolation context" and a 10-bit value called an ICID
+(isolation context id) is expressed by the hardware to identify
+the requester.
+
+The generic 'iommus' property is insufficient to describe the relationship
+between ICIDs and IOMMUs, so an iommu-map property is used to define
+the set of possible ICIDs under a root DPRC and how they map to
+an IOMMU.
+
+For generic IOMMU bindings, see
+Documentation/devicetree/bindings/iommu/iommu.txt.
+
+For arm-smmu binding, see:
+Documentation/devicetree/bindings/iommu/arm,smmu.txt.
+
Required properties:
- compatible
@@ -88,14 +107,34 @@ Sub-nodes:
Value type: <phandle>
Definition: Specifies the phandle to the PHY device node associated
with the this dpmac.
+Optional properties:
+
+- iommu-map: Maps an ICID to an IOMMU and associated iommu-specifier
+ data.
+
+ The property is an arbitrary number of tuples of
+ (icid-base,iommu,iommu-base,length).
+
+ Any ICID i in the interval [icid-base, icid-base + length) is
+ associated with the listed IOMMU, with the iommu-specifier
+ (i - icid-base + iommu-base).
Example:
+ smmu: iommu at 5000000 {
+ compatible = "arm,mmu-500";
+ #iommu-cells = <2>;
+ stream-match-mask = <0x7C00>;
+ ...
+ };
+
fsl_mc: fsl-mc at 80c000000 {
compatible = "fsl,qoriq-mc";
reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
msi-parent = <&its>;
+ /* define map for ICIDs 23-64 */
+ iommu-map = <23 &smmu 23 41>;
#address-cells = <3>;
#size-cells = <1>;
--
1.9.1
^ permalink raw reply related
* [PATCH 0/7 v5] Support for fsl-mc bus and its devices in SMMU
From: Nipun Gupta @ 2018-05-20 13:49 UTC (permalink / raw)
To: linux-arm-kernel
This patchset defines IOMMU DT binding for fsl-mc bus and adds
support in SMMU for fsl-mc bus.
The patch series is based on top of dma-mapping tree (for-next branch):
http://git.infradead.org/users/hch/dma-mapping.git
These patches
- Define property 'iommu-map' for fsl-mc bus (patch 1)
- Integrates the fsl-mc bus with the SMMU using this
IOMMU binding (patch 2,3,4)
- Adds the dma configuration support for fsl-mc bus (patch 5, 6)
- Updates the fsl-mc device node with iommu/dma related changes (patch 7)
Changes in v2:
- use iommu-map property for fsl-mc bus
- rebase over patchset https://patchwork.kernel.org/patch/10317337/
and make corresponding changes for dma configuration of devices on
fsl-mc bus
Changes in v3:
- move of_map_rid in drivers/of/address.c
Changes in v4:
- move of_map_rid in drivers/of/base.c
Changes in v5:
- break patch 5 in two separate patches (now patch 5/7 and patch 6/7)
- add changelog text in patch 3/7 and patch 5/7
- typo fix
Nipun Gupta (7):
Docs: dt: add fsl-mc iommu-map device-tree binding
iommu: of: make of_pci_map_rid() available for other devices too
iommu: support iommu configuration for fsl-mc devices
iommu: arm-smmu: Add support for the fsl-mc bus
bus: fsl-mc: support dma configure for devices on fsl-mc bus
bus: fsl-mc: set coherent dma mask for devices on fsl-mc bus
arm64: dts: ls208xa: comply with the iommu map binding for fsl_mc
.../devicetree/bindings/misc/fsl,qoriq-mc.txt | 39 ++++++++
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 6 +-
drivers/bus/fsl-mc/fsl-mc-bus.c | 16 +++-
drivers/iommu/arm-smmu.c | 7 ++
drivers/iommu/iommu.c | 21 +++++
drivers/iommu/of_iommu.c | 25 ++++-
drivers/of/base.c | 102 +++++++++++++++++++++
drivers/of/irq.c | 5 +-
drivers/pci/of.c | 101 --------------------
include/linux/fsl/mc.h | 8 ++
include/linux/iommu.h | 2 +
include/linux/of.h | 11 +++
include/linux/of_pci.h | 10 --
13 files changed, 231 insertions(+), 122 deletions(-)
--
1.9.1
^ permalink raw reply
* [PULL v8] KVM: arm64: Optimise FPSIMD context switching
From: Marc Zyngier @ 2018-05-20 13:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180516104942.GS7753@e103592.cambridge.arm.com>
On Wed, 16 May 2018 11:49:42 +0100
Dave Martin <Dave.Martin@arm.com> wrote:
Hi Dave,
> Hi Marc,
>
> This is a trivial update to the previously posted v7 [1]. The only
> changes are a couple of minor cosmetic changes requested by reviewers,
> on-list and the addition of Acked-by/Reviewed-by tags received since the
> series was posted.
>
> Let me know if you need anything else on this.
So I've taken this, merged in Linus' top of tree, started a guest on a
dual A53 board, and immediately hit the following:
root at sy-borg:~# [ 287.226184] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[ 287.231672] Mem abort info:
[ 287.234537] ESR = 0x96000044
[ 287.237674] Exception class = DABT (current EL), IL = 32 bits
[ 287.243765] SET = 0, FnV = 0
[ 287.246900] EA = 0, S1PTW = 0
[ 287.250126] Data abort info:
[ 287.253083] ISV = 0, ISS = 0x00000044
[ 287.257025] CM = 0, WnR = 1
[ 287.260076] user pgtable: 4k pages, 48-bit VAs, pgdp = 00000000b8483f75
[ 287.266882] [0000000000000000] pgd=0000000000000000
[ 287.271903] Internal error: Oops: 96000044 [#1] PREEMPT SMP
[ 287.277636] Modules linked in:
[ 287.280776] CPU: 1 PID: 3098 Comm: kworker/u4:3 Not tainted 4.17.0-rc5-00166-gd84e81cca249 #136
[ 287.289730] Hardware name: Globalscale Marvell ESPRESSOBin Board (DT)
[ 287.296364] pstate: 40000085 (nZcv daIf -PAN -UAO)
[ 287.301301] pc : fpsimd_save_state+0x0/0x54
[ 287.305595] lr : fpsimd_save+0x50/0x100
[ 287.309531] sp : ffff00000dde3af0
[ 287.312936] x29: ffff00000dde3af0 x28: ffff000008cd565c
[ 287.318401] x27: ffff800078ee9c80 x26: ffff80007b207628
[ 287.323867] x25: ffff0000093f9000 x24: 0000000000000001
[ 287.329333] x23: ffff0000093d4000 x22: ffff80007b207000
[ 287.334798] x21: ffff80007efd7d80 x20: ffff80007b207000
[ 287.340264] x19: 0000000000000000 x18: 0000000000040f0b
[ 287.345729] x17: 0000ffffb70752b8 x16: 0000ffffb708e008
[ 287.351195] x15: 0000000000000000 x14: 0000000000000400
[ 287.356661] x13: 0000000000000001 x12: 0000000000000001
[ 287.362127] x11: 0000000000000001 x10: 0000000000000000
[ 287.367592] x9 : 0000000000000253 x8 : ffff80007b207200
[ 287.373057] x7 : ffff80007b207100 x6 : ffff80007c378f18
[ 287.378523] x5 : 00000042c2094c00 x4 : 0000000000000000
[ 287.383990] x3 : 00000042e0033450 x2 : 0000000000000000
[ 287.389454] x1 : 0000800075bf6000 x0 : 0000000000000000
[ 287.394922] Process kworker/u4:3 (pid: 3098, stack limit = 0x00000000ca0dd8c6)
[ 287.402358] Call trace:
[ 287.404873] fpsimd_save_state+0x0/0x54
[ 287.408813] fpsimd_thread_switch+0x28/0xa0
[ 287.413114] __switch_to+0x1c/0xd0
[ 287.416609] __schedule+0x1b8/0x730
[ 287.420191] preempt_schedule_common+0x24/0x48
[ 287.424760] preempt_schedule.part.23+0x1c/0x28
[ 287.429419] preempt_schedule+0x1c/0x28
[ 287.433363] _raw_spin_unlock+0x34/0x48
[ 287.437308] flush_old_exec+0x45c/0x6a0
[ 287.441250] load_elf_binary+0x324/0x1198
[ 287.445372] search_binary_handler+0xac/0x230
[ 287.449851] do_execveat_common.isra.14+0x508/0x6e0
[ 287.454867] do_execve+0x28/0x30
[ 287.458185] call_usermodehelper_exec_async+0xdc/0x140
[ 287.463468] ret_from_fork+0x10/0x18
[ 287.467143] Code: a9425bf5 a8c37bfd d65f03c0 d65f03c0 (ad000400)
[ 287.473414] ---[ end trace c4346b99cc877f8e ]---
It happened just after having loaded the guest kernel, so I presume
we're missing some kind of initialization. I couldn't subsequently
reproduce it on the same machine, and the same kernel is doing
absolutely fine on a Seattle box.
I can't immediately see how st would be NULL, unless we somehow are
missing some state tracking somewhere...
Any idea?
M.
--
Without deviation from the norm, progress is not possible.
^ permalink raw reply
* [PATCH v2 3/3] ARM: dts: imx28/imx53: enable edt-ft5x06 wakeup source
From: Shawn Guo @ 2018-05-20 13:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180517090552.5704-4-daniel@zonque.org>
On Thu, May 17, 2018 at 11:05:52AM +0200, Daniel Mack wrote:
> The touchscreen driver no longer configures the device as wakeup source by
> default. A "wakeup-source" property is needed.
>
> To avoid regressions, this patch changes the DTS files for the only two
> users of this driver that didn't have this property yet.
>
> Signed-off-by: Daniel Mack <daniel@zonque.org>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Rob Herring <robh+dt@kernel.org>
Applied this one, thanks.
^ permalink raw reply
* [PATCH] clk: imx6sl: correct ocram_podf clock type
From: Shawn Guo @ 2018-05-20 13:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526533248-21990-2-git-send-email-Anson.Huang@nxp.com>
On Thu, May 17, 2018 at 01:00:48PM +0800, Anson Huang wrote:
> IMX6SL_CLK_OCRAM_PODF is a busy divider, its name in
> CCM_CDHIPR register of Reference Manual CCM chapter
> is axi_podf_busy, correct its clock type.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
^ permalink raw reply
* [PATCH] clk: imx6sx: disable unnecessary clocks during clock initialization
From: Shawn Guo @ 2018-05-20 13:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526533248-21990-1-git-send-email-Anson.Huang@nxp.com>
On Thu, May 17, 2018 at 01:00:47PM +0800, Anson Huang wrote:
> Disable those unnecessary clocks during kernel boot up to save power,
> those modules clock should be managed by modules driver in runtime.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
^ permalink raw reply
* [PATCH] ARM: dts: imx51-zii-rdu1: cleanup eMMC node
From: Shawn Guo @ 2018-05-20 12:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180516065349.11160-1-nikita.yoush@cogentembedded.com>
On Wed, May 16, 2018 at 09:53:49AM +0300, Nikita Yushchenko wrote:
> On RDU1, sdhc1 is used for eMMC, and that is 3.3V only.
>
> Thus configure device node not to probe it as SD/SDIO and not try 1.8V.
>
> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Applied, thanks.
^ permalink raw reply
* [PATCH] ARM: dts: vf610-zii-dev: enable vf610 builtin temp sensor
From: Shawn Guo @ 2018-05-20 12:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180516063921.10406-1-nikita.yoush@cogentembedded.com>
On Wed, May 16, 2018 at 09:39:21AM +0300, Nikita Yushchenko wrote:
> Vybrid has single internal temperature sensor connected to both internal
> ADC modules.
>
> vf610-zii-dev already has ADC0 enabled. Now, to get temperature sensor
> captured by iio_hwmon driver, need to configure iio_hwmon node to use
> that ADC.
>
> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Applied, thanks.
^ permalink raw reply
* [PATCH] ARM: dts: imx7d: use operating-points-v2 for cpu
From: Shawn Guo @ 2018-05-20 12:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526446097-7111-1-git-send-email-Anson.Huang@nxp.com>
On Wed, May 16, 2018 at 12:48:17PM +0800, Anson Huang wrote:
> This patch uses "operating-points-v2" instead of
> "operating-points" to be more fit with cpufreq-dt
> driver.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> arch/arm/boot/dts/imx7d.dtsi | 24 +++++++++++++++++++-----
> 1 file changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
> index 4c9877e..28980c8 100644
> --- a/arch/arm/boot/dts/imx7d.dtsi
> +++ b/arch/arm/boot/dts/imx7d.dtsi
> @@ -9,12 +9,8 @@
> / {
> cpus {
> cpu0: cpu at 0 {
> - operating-points = <
> - /* KHz uV */
> - 996000 1075000
> - 792000 975000
> - >;
> clock-frequency = <996000000>;
> + operating-points-v2 = <&cpu0_opp_table>;
> };
>
> cpu1: cpu at 1 {
> @@ -22,6 +18,24 @@
> device_type = "cpu";
> reg = <1>;
> clock-frequency = <996000000>;
> + operating-points-v2 = <&cpu0_opp_table>;
> + };
> + };
> +
> + cpu0_opp_table: opp_table0 {
Hyphen is recommended in node name. Also the suffix 0 doesn't mean too
much here. That said, a better node name would be 'opp-table'.
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-792000000 {
> + opp-hz = /bits/ 64 <792000000>;
> + opp-microvolt = <975000>;
> + clock-latency-ns = <150000>;
> + };
We recommend to have a newline between nodes.
I fixed them all and applied the patch.
Shawn
> + opp-996000000 {
> + opp-hz = /bits/ 64 <996000000>;
> + opp-microvolt = <1075000>;
> + clock-latency-ns = <150000>;
> + opp-suspend;
> };
> };
>
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH] ARM: dts: imx7s-warp: remove unnecessary cpu regulator supply
From: Shawn Guo @ 2018-05-20 12:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526375895-23633-1-git-send-email-Anson.Huang@nxp.com>
On Tue, May 15, 2018 at 05:18:15PM +0800, Anson Huang wrote:
> i.MX7S does NOT support CPU frequency scaling, so no
> need to specify the CPU regulator supply.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Applied, thanks.
^ permalink raw reply
* [PATCH V2] ARM: dts: imx7d: correct cpu supply name for voltage scaling
From: Shawn Guo @ 2018-05-20 12:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526437548-32372-1-git-send-email-Anson.Huang@nxp.com>
On Wed, May 16, 2018 at 10:25:48AM +0800, Anson Huang wrote:
> Correct CPU supply name to meet cpufreq-dt driver's
> requirement for voltage scaling.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Applied, thanks.
^ permalink raw reply
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