* [PATCH v3 13/13] soc: rockchip: power-domain: add power domain support for px30
From: Heiko Stübner @ 2018-05-23 20:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527058412-10754-1-git-send-email-zhangqing@rock-chips.com>
Am Mittwoch, 23. Mai 2018, 08:53:32 CEST schrieb Elaine Zhang:
> From: Finley Xiao <finley.xiao@rock-chips.com>
>
> This driver is modified to support PX30 SoC.
>
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
applied for 4.18 (or later)
Thanks
Heiko
^ permalink raw reply
* v4.17-rc1: regressions on N900, N950
From: Pavel Machek @ 2018-05-23 20:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180523140615.GA27180@amd>
On Wed 2018-05-23 16:06:15, Pavel Machek wrote:
> On Wed 2018-05-23 00:56:38, Aaro Koskinen wrote:
> > Hi,
> >
> > On Tue, May 22, 2018 at 10:58:26PM +0200, Pavel Machek wrote:
> > > On Tue 2018-05-22 22:41:39, Aaro Koskinen wrote:
> > > > My device worked with v4.17-rc1 (haven't found time to test newer kernels),
> > > > but if you say the probe order is random then we must find some proper way
> > > > to express the dependency.
> > >
> > > I started bisect, but.. that will probably not be useful.
> > >
> > > If your device works ok in v4.17-rc1, it probably works in newer -rcs,
> > > too.
> >
> > Actually, my statement may be bogus... Now I tried again with -rc1
> > (and also -rc6) and it fails... But v4.16 works.
> >
> > > Thanks for the ordering hint, I'll try to figure out what is going on
> > > there.
> >
> > My bisection pointed to 6fa7324ac5489ad43c4b6351355b869bc5458bef which
> > doesn't seem to make any sense...?! So maybe there really is something
> > random stuff going on? :-(
>
> So... I did some experiments on v4.16.
>
> Swapping tsc2005 at 0 and lcd: acx565akm at 2 entries in the dts does break
> stuff.
>
> I thought it might be due to vio regulator, but it does not appear
> so... screen still works with tsc2005 driver disabled in .config. (so
> there's noone to enable vio regulator).
Deleting tsc2005 at 0 entry also breaks screen.
Replacing tsc2005 at 0 entry with
foobar at 0 {
compatible = "not really with anything";
spi-max-frequency = <6000000>;
reg = <0>;
};
still results in working touchscreen, removing any of the three fields
breaks it again.
Strange.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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^ permalink raw reply
* [PATCH v10 06/18] arm64: fpsimd: Generalise context saving for non-task contexts
From: Alex Bennée @ 2018-05-23 20:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527005119-6842-7-git-send-email-Dave.Martin@arm.com>
Dave Martin <Dave.Martin@arm.com> writes:
> In preparation for allowing non-task (i.e., KVM vcpu) FPSIMD
> contexts to be handled by the fpsimd common code, this patch adapts
> task_fpsimd_save() to save back the currently loaded context,
> removing the explicit dependency on current.
>
> The relevant storage to write back to in memory is now found by
> examining the fpsimd_last_state percpu struct.
>
> fpsimd_save() does nothing unless TIF_FOREIGN_FPSTATE is clear, and
> fpsimd_last_state is updated under local_bh_disable() or
> local_irq_disable() everywhere that TIF_FOREIGN_FPSTATE is cleared:
> thus, fpsimd_save() will write back to the correct storage for the
> loaded context.
>
> No functional change.
>
> Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
> ---
> arch/arm64/kernel/fpsimd.c | 25 +++++++++++++------------
> 1 file changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
> index 9d85373..3aa100a 100644
> --- a/arch/arm64/kernel/fpsimd.c
> +++ b/arch/arm64/kernel/fpsimd.c
> @@ -270,13 +270,15 @@ static void task_fpsimd_load(void)
> }
>
> /*
> - * Ensure current's FPSIMD/SVE storage in thread_struct is up to date
> - * with respect to the CPU registers.
> + * Ensure FPSIMD/SVE storage in memory for the loaded context is up to
> + * date with respect to the CPU registers.
> *
> * Softirqs (and preemption) must be disabled.
> */
> -static void task_fpsimd_save(void)
> +static void fpsimd_save(void)
> {
> + struct user_fpsimd_state *st = __this_cpu_read(fpsimd_last_state.st);
> +
I thought I was missing something but the only write I saw of this was:
__this_cpu_write(fpsimd_last_state.st, NULL);
which implied to me it is possible to have an invalid de-reference. I
did figure it out eventually as fpsimd_bind_state_to_cpu uses a more
indirect this_cpu_ptr idiom for tweaking this. I guess a reference to
fpsimd_bind_[task|state]_to_cpu in the comment would have helped my
confusion.
Anyway:
Reviewed-by: Alex Benn?e <alex.bennee@linaro.org>
> WARN_ON(!in_softirq() && !irqs_disabled());
>
> if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) {
> @@ -291,10 +293,9 @@ static void task_fpsimd_save(void)
> return;
> }
>
> - sve_save_state(sve_pffr(current),
> - ¤t->thread.uw.fpsimd_state.fpsr);
> + sve_save_state(sve_pffr(current), &st->fpsr);
> } else
> - fpsimd_save_state(¤t->thread.uw.fpsimd_state);
> + fpsimd_save_state(st);
> }
> }
>
> @@ -598,7 +599,7 @@ int sve_set_vector_length(struct task_struct *task,
> if (task == current) {
> local_bh_disable();
>
> - task_fpsimd_save();
> + fpsimd_save();
> set_thread_flag(TIF_FOREIGN_FPSTATE);
> }
>
> @@ -837,7 +838,7 @@ asmlinkage void do_sve_acc(unsigned int esr, struct pt_regs *regs)
>
> local_bh_disable();
>
> - task_fpsimd_save();
> + fpsimd_save();
> fpsimd_to_sve(current);
>
> /* Force ret_to_user to reload the registers: */
> @@ -898,7 +899,7 @@ void fpsimd_thread_switch(struct task_struct *next)
> * 'current'.
> */
> if (current->mm)
> - task_fpsimd_save();
> + fpsimd_save();
>
> if (next->mm) {
> /*
> @@ -980,7 +981,7 @@ void fpsimd_preserve_current_state(void)
> return;
>
> local_bh_disable();
> - task_fpsimd_save();
> + fpsimd_save();
> local_bh_enable();
> }
>
> @@ -1121,7 +1122,7 @@ void kernel_neon_begin(void)
>
> /* Save unsaved task fpsimd state, if any: */
> if (current->mm)
> - task_fpsimd_save();
> + fpsimd_save();
>
> /* Invalidate any task state remaining in the fpsimd regs: */
> fpsimd_flush_cpu_state();
> @@ -1244,7 +1245,7 @@ static int fpsimd_cpu_pm_notifier(struct notifier_block *self,
> switch (cmd) {
> case CPU_PM_ENTER:
> if (current->mm)
> - task_fpsimd_save();
> + fpsimd_save();
> fpsimd_flush_cpu_state();
> break;
> case CPU_PM_EXIT:
--
Alex Benn?e
^ permalink raw reply
* [PATCH v10 08/18] arm64/sve: Refactor user SVE trap maintenance for external use
From: Alex Bennée @ 2018-05-23 20:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527005119-6842-9-git-send-email-Dave.Martin@arm.com>
Dave Martin <Dave.Martin@arm.com> writes:
> In preparation for optimising the way KVM manages switching the
> guest and host FPSIMD state, it is necessary to provide a means for
> code outside arch/arm64/kernel/fpsimd.c to restore the user trap
> configuration for SVE correctly for the current task.
>
> Rather than requiring external code to duplicate the maintenance
> explicitly, this patch wraps moves the trap maintenenace to
> fpsimd_bind_to_cpu(), since it is logically part of the work of
> associating the current task with the cpu.
>
> Because fpsimd_bind_to_cpu() is rather a cryptic name to publish
> alongside fpsimd_bind_state_to_cpu(), the former function is
> renamed to fpsimd_bind_task_to_cpu() to make its purpose more
> explicit.
>
> This patch makes appropriate changes to ensure that
> fpsimd_bind_task_to_cpu() is always called alongside
> task_fpsimd_load(), so that the trap maintenance continues to be
> done in every situation where it was done prior to this patch.
>
> As a side-effect, the metadata updates done by
> fpsimd_bind_task_to_cpu() now change from conditional to
> unconditional in the "already bound" case of sigreturn. This is
> harmless, and a couple of extra stores on this slow path will not
> impact performance. I consider this a reasonable price to pay for
> a slightly cleaner interface.
>
> Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
In fact the comment I alluded to in 6/18 could be applied in this.
Reviewed-by: Alex Benn?e <alex.bennee@linaro.org>
> ---
> arch/arm64/kernel/fpsimd.c | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
> index 1222491..ba9e7df 100644
> --- a/arch/arm64/kernel/fpsimd.c
> +++ b/arch/arm64/kernel/fpsimd.c
> @@ -257,16 +257,6 @@ static void task_fpsimd_load(void)
> sve_vq_from_vl(current->thread.sve_vl) - 1);
> else
> fpsimd_load_state(¤t->thread.uw.fpsimd_state);
> -
> - if (system_supports_sve()) {
> - /* Toggle SVE trapping for userspace if needed */
> - if (test_thread_flag(TIF_SVE))
> - sve_user_enable();
> - else
> - sve_user_disable();
> -
> - /* Serialised by exception return to user */
> - }
> }
>
> /*
> @@ -991,7 +981,7 @@ void fpsimd_signal_preserve_current_state(void)
> * Associate current's FPSIMD context with this cpu
> * Preemption must be disabled when calling this function.
> */
> -static void fpsimd_bind_to_cpu(void)
> +static void fpsimd_bind_task_to_cpu(void)
> {
> struct fpsimd_last_state_struct *last =
> this_cpu_ptr(&fpsimd_last_state);
> @@ -999,6 +989,16 @@ static void fpsimd_bind_to_cpu(void)
> last->st = ¤t->thread.uw.fpsimd_state;
> last->sve_in_use = test_thread_flag(TIF_SVE);
> current->thread.fpsimd_cpu = smp_processor_id();
> +
> + if (system_supports_sve()) {
> + /* Toggle SVE trapping for userspace if needed */
> + if (test_thread_flag(TIF_SVE))
> + sve_user_enable();
> + else
> + sve_user_disable();
> +
> + /* Serialised by exception return to user */
> + }
> }
>
> /*
> @@ -1015,7 +1015,7 @@ void fpsimd_restore_current_state(void)
>
> if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) {
> task_fpsimd_load();
> - fpsimd_bind_to_cpu();
> + fpsimd_bind_task_to_cpu();
> }
>
> local_bh_enable();
> @@ -1038,9 +1038,9 @@ void fpsimd_update_current_state(struct user_fpsimd_state const *state)
> fpsimd_to_sve(current);
>
> task_fpsimd_load();
> + fpsimd_bind_task_to_cpu();
>
> - if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE))
> - fpsimd_bind_to_cpu();
> + clear_thread_flag(TIF_FOREIGN_FPSTATE);
>
> local_bh_enable();
> }
--
Alex Benn?e
^ permalink raw reply
* [PATCH] arm64: dts: stingray: Add otp device node
From: Scott Branden @ 2018-05-23 20:17 UTC (permalink / raw)
To: linux-arm-kernel
Add otp device node for Stingray SOC.
Fixes: 2fa9e9e29ea2 ("arm64: dts: Add GPIO DT nodes for Stingray SOC")
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
---
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 99aaff0..6013478 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -258,6 +258,13 @@
#include "stingray-clock.dtsi"
+ otp: otp at 1c400 {
+ compatible = "brcm,ocotp-v2";
+ reg = <0x0001c400 0x68>;
+ brcm,ocotp-size = <2048>;
+ status = "okay";
+ };
+
gpio_crmu: gpio at 24800 {
compatible = "brcm,iproc-gpio";
reg = <0x00024800 0x4c>;
--
2.5.0
^ permalink raw reply related
* [PATCH 08/11] coresight: Add generic TMC sg table framework
From: Mathieu Poirier @ 2018-05-23 20:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526661567-4578-9-git-send-email-suzuki.poulose@arm.com>
On Fri, May 18, 2018 at 05:39:24PM +0100, Suzuki K Poulose wrote:
> This patch introduces a generic sg table data structure and
> associated operations. An SG table can be used to map a set
> of Data pages where the trace data could be stored by the TMC
> ETR. The information about the data pages could be stored in
> different formats, depending on the type of the underlying
> SG mechanism (e.g, TMC ETR SG vs Coresight CATU). The generic
> structure provides book keeping of the pages used for the data
> as well as the table contents. The table should be filled by
> the user of the infrastructure.
>
> A table can be created by specifying the number of data pages
> as well as the number of table pages required to hold the
> pointers, where the latter could be different for different
> types of tables. The pages are mapped in the appropriate dma
> data direction mode (i.e, DMA_TO_DEVICE for table pages
> and DMA_FROM_DEVICE for data pages). The framework can optionally
> accept a set of allocated data pages (e.g, perf ring buffer) and
> map them accordingly. The table and data pages are vmap'ed to allow
> easier access by the drivers. The framework also provides helpers to
> sync the data written to the pages with appropriate directions.
>
> This will be later used by the TMC ETR SG unit and CATU.
>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> Changes since v1:
> - Address code style issues, more comments
> ---
> drivers/hwtracing/coresight/coresight-tmc-etr.c | 290 ++++++++++++++++++++++++
> drivers/hwtracing/coresight/coresight-tmc.h | 50 ++++
> 2 files changed, 340 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> index 9780798..1e844f8 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> @@ -17,9 +17,299 @@
>
> #include <linux/coresight.h>
> #include <linux/dma-mapping.h>
> +#include <linux/slab.h>
> #include "coresight-priv.h"
> #include "coresight-tmc.h"
>
> +/*
> + * tmc_pages_get_offset: Go through all the pages in the tmc_pages
> + * and map the device address @addr to an offset within the virtual
> + * contiguous buffer.
> + */
> +static long
> +tmc_pages_get_offset(struct tmc_pages *tmc_pages, dma_addr_t addr)
> +{
> + int i;
> + dma_addr_t page_start;
> +
> + for (i = 0; i < tmc_pages->nr_pages; i++) {
> + page_start = tmc_pages->daddrs[i];
> + if (addr >= page_start && addr < (page_start + PAGE_SIZE))
> + return i * PAGE_SIZE + (addr - page_start);
> + }
> +
> + return -EINVAL;
> +}
> +
> +/*
> + * tmc_pages_free : Unmap and free the pages used by tmc_pages.
> + * If the pages were not allocated in tmc_pages_alloc(), we would
> + * simply drop the refcount.
> + */
> +static void tmc_pages_free(struct tmc_pages *tmc_pages,
> + struct device *dev, enum dma_data_direction dir)
> +{
> + int i;
> +
> + for (i = 0; i < tmc_pages->nr_pages; i++) {
> + if (tmc_pages->daddrs && tmc_pages->daddrs[i])
> + dma_unmap_page(dev, tmc_pages->daddrs[i],
> + PAGE_SIZE, dir);
> + if (tmc_pages->pages && tmc_pages->pages[i])
> + __free_page(tmc_pages->pages[i]);
> + }
> +
> + kfree(tmc_pages->pages);
> + kfree(tmc_pages->daddrs);
> + tmc_pages->pages = NULL;
> + tmc_pages->daddrs = NULL;
> + tmc_pages->nr_pages = 0;
> +}
> +
> +/*
> + * tmc_pages_alloc : Allocate and map pages for a given @tmc_pages.
> + * If @pages is not NULL, the list of page virtual addresses are
> + * used as the data pages. The pages are then dma_map'ed for @dev
> + * with dma_direction @dir.
> + *
> + * Returns 0 upon success, else the error number.
> + */
> +static int tmc_pages_alloc(struct tmc_pages *tmc_pages,
> + struct device *dev, int node,
> + enum dma_data_direction dir, void **pages)
> +{
> + int i, nr_pages;
> + dma_addr_t paddr;
> + struct page *page;
> +
> + nr_pages = tmc_pages->nr_pages;
> + tmc_pages->daddrs = kcalloc(nr_pages, sizeof(*tmc_pages->daddrs),
> + GFP_KERNEL);
> + if (!tmc_pages->daddrs)
> + return -ENOMEM;
> + tmc_pages->pages = kcalloc(nr_pages, sizeof(*tmc_pages->pages),
> + GFP_KERNEL);
> + if (!tmc_pages->pages) {
> + kfree(tmc_pages->daddrs);
> + tmc_pages->daddrs = NULL;
> + return -ENOMEM;
> + }
> +
> + for (i = 0; i < nr_pages; i++) {
> + if (pages && pages[i]) {
> + page = virt_to_page(pages[i]);
> + /* Hold a refcount on the page */
> + get_page(page);
> + } else {
> + page = alloc_pages_node(node,
> + GFP_KERNEL | __GFP_ZERO, 0);
> + }
> + paddr = dma_map_page(dev, page, 0, PAGE_SIZE, dir);
> + if (dma_mapping_error(dev, paddr))
> + goto err;
> + tmc_pages->daddrs[i] = paddr;
> + tmc_pages->pages[i] = page;
> + }
> + return 0;
> +err:
> + tmc_pages_free(tmc_pages, dev, dir);
> + return -ENOMEM;
> +}
> +
> +static inline dma_addr_t tmc_sg_table_base_paddr(struct tmc_sg_table *sg_table)
> +{
> + if (WARN_ON(!sg_table->data_pages.pages[0]))
> + return 0;
> + return sg_table->table_daddr;
> +}
> +
> +static inline void *tmc_sg_table_base_vaddr(struct tmc_sg_table *sg_table)
> +{
> + if (WARN_ON(!sg_table->data_pages.pages[0]))
> + return NULL;
> + return sg_table->table_vaddr;
> +}
The above two functions deal with DMA'able and virtual addresses for the table
page buffer. Yet the test in the WARN_ON is done on the data page array.
Shouldn't this be sg_table->table_pages.pages[0] instead?
If not please add a comment justifying your position so that someone else
looking at the code does't end up thinking the same in a year from now.
> +
> +static inline void *
> +tmc_sg_table_data_vaddr(struct tmc_sg_table *sg_table)
> +{
> + if (WARN_ON(!sg_table->data_pages.nr_pages))
> + return 0;
> + return sg_table->data_vaddr;
> +}
I see that tmc_sg_table_base_vaddr() and tmc_sg_table_data_vaddr() are both
returning the virtual address of the contiguous buffer for table and data
respectively. Yet there is a discrepency in the naming convention. I would
have expected tmc_sg_table_base_vaddr() and tmc_sg_data_base_vaddr() so that
there is a little symmetry between them.
Otherwise looks good to me.
> +
> +static inline long
> +tmc_sg_get_data_page_offset(struct tmc_sg_table *sg_table, dma_addr_t addr)
> +{
> + return tmc_pages_get_offset(&sg_table->data_pages, addr);
> +}
> +
> +static inline void tmc_free_table_pages(struct tmc_sg_table *sg_table)
> +{
> + if (sg_table->table_vaddr)
> + vunmap(sg_table->table_vaddr);
> + tmc_pages_free(&sg_table->table_pages, sg_table->dev, DMA_TO_DEVICE);
> +}
> +
> +static void tmc_free_data_pages(struct tmc_sg_table *sg_table)
> +{
> + if (sg_table->data_vaddr)
> + vunmap(sg_table->data_vaddr);
> + tmc_pages_free(&sg_table->data_pages, sg_table->dev, DMA_FROM_DEVICE);
> +}
> +
> +void tmc_free_sg_table(struct tmc_sg_table *sg_table)
> +{
> + tmc_free_table_pages(sg_table);
> + tmc_free_data_pages(sg_table);
> +}
> +
> +/*
> + * Alloc pages for the table. Since this will be used by the device,
> + * allocate the pages closer to the device (i.e, dev_to_node(dev)
> + * rather than the CPU node).
> + */
> +static int tmc_alloc_table_pages(struct tmc_sg_table *sg_table)
> +{
> + int rc;
> + struct tmc_pages *table_pages = &sg_table->table_pages;
> +
> + rc = tmc_pages_alloc(table_pages, sg_table->dev,
> + dev_to_node(sg_table->dev),
> + DMA_TO_DEVICE, NULL);
> + if (rc)
> + return rc;
> + sg_table->table_vaddr = vmap(table_pages->pages,
> + table_pages->nr_pages,
> + VM_MAP,
> + PAGE_KERNEL);
> + if (!sg_table->table_vaddr)
> + rc = -ENOMEM;
> + else
> + sg_table->table_daddr = table_pages->daddrs[0];
> + return rc;
> +}
> +
> +static int tmc_alloc_data_pages(struct tmc_sg_table *sg_table, void **pages)
> +{
> + int rc;
> +
> + /* Allocate data pages on the node requested by the caller */
> + rc = tmc_pages_alloc(&sg_table->data_pages,
> + sg_table->dev, sg_table->node,
> + DMA_FROM_DEVICE, pages);
> + if (!rc) {
> + sg_table->data_vaddr = vmap(sg_table->data_pages.pages,
> + sg_table->data_pages.nr_pages,
> + VM_MAP,
> + PAGE_KERNEL);
> + if (!sg_table->data_vaddr)
> + rc = -ENOMEM;
> + }
> + return rc;
> +}
> +
> +/*
> + * tmc_alloc_sg_table: Allocate and setup dma pages for the TMC SG table
> + * and data buffers. TMC writes to the data buffers and reads from the SG
> + * Table pages.
> + *
> + * @dev - Device to which page should be DMA mapped.
> + * @node - Numa node for mem allocations
> + * @nr_tpages - Number of pages for the table entries.
> + * @nr_dpages - Number of pages for Data buffer.
> + * @pages - Optional list of virtual address of pages.
> + */
> +struct tmc_sg_table *tmc_alloc_sg_table(struct device *dev,
> + int node,
> + int nr_tpages,
> + int nr_dpages,
> + void **pages)
> +{
> + long rc;
> + struct tmc_sg_table *sg_table;
> +
> + sg_table = kzalloc(sizeof(*sg_table), GFP_KERNEL);
> + if (!sg_table)
> + return ERR_PTR(-ENOMEM);
> + sg_table->data_pages.nr_pages = nr_dpages;
> + sg_table->table_pages.nr_pages = nr_tpages;
> + sg_table->node = node;
> + sg_table->dev = dev;
> +
> + rc = tmc_alloc_data_pages(sg_table, pages);
> + if (!rc)
> + rc = tmc_alloc_table_pages(sg_table);
> + if (rc) {
> + tmc_free_sg_table(sg_table);
> + kfree(sg_table);
> + return ERR_PTR(rc);
> + }
> +
> + return sg_table;
> +}
> +
> +/*
> + * tmc_sg_table_sync_data_range: Sync the data buffer written
> + * by the device from @offset upto a @size bytes.
> + */
> +void tmc_sg_table_sync_data_range(struct tmc_sg_table *table,
> + u64 offset, u64 size)
> +{
> + int i, index, start;
> + int npages = DIV_ROUND_UP(size, PAGE_SIZE);
> + struct device *dev = table->dev;
> + struct tmc_pages *data = &table->data_pages;
> +
> + start = offset >> PAGE_SHIFT;
> + for (i = start; i < (start + npages); i++) {
> + index = i % data->nr_pages;
> + dma_sync_single_for_cpu(dev, data->daddrs[index],
> + PAGE_SIZE, DMA_FROM_DEVICE);
> + }
> +}
> +
> +/* tmc_sg_sync_table: Sync the page table */
> +void tmc_sg_table_sync_table(struct tmc_sg_table *sg_table)
> +{
> + int i;
> + struct device *dev = sg_table->dev;
> + struct tmc_pages *table_pages = &sg_table->table_pages;
> +
> + for (i = 0; i < table_pages->nr_pages; i++)
> + dma_sync_single_for_device(dev, table_pages->daddrs[i],
> + PAGE_SIZE, DMA_TO_DEVICE);
> +}
> +
> +/*
> + * tmc_sg_table_get_data: Get the buffer pointer for data @offset
> + * in the SG buffer. The @bufpp is updated to point to the buffer.
> + * Returns :
> + * the length of linear data available at @offset.
> + * or
> + * <= 0 if no data is available.
> + */
> +ssize_t tmc_sg_table_get_data(struct tmc_sg_table *sg_table,
> + u64 offset, size_t len, char **bufpp)
> +{
> + size_t size;
> + int pg_idx = offset >> PAGE_SHIFT;
> + int pg_offset = offset & (PAGE_SIZE - 1);
> + struct tmc_pages *data_pages = &sg_table->data_pages;
> +
> + size = tmc_sg_table_buf_size(sg_table);
> + if (offset >= size)
> + return -EINVAL;
> +
> + /* Make sure we don't go beyond the end */
> + len = (len < (size - offset)) ? len : size - offset;
> + /* Respect the page boundaries */
> + len = (len < (PAGE_SIZE - pg_offset)) ? len : (PAGE_SIZE - pg_offset);
> + if (len > 0)
> + *bufpp = page_address(data_pages->pages[pg_idx]) + pg_offset;
> + return len;
> +}
> +
> static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
> {
> u32 axictl, sts;
> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
> index 73f944d..19a765c 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.h
> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
> @@ -18,6 +18,7 @@
> #ifndef _CORESIGHT_TMC_H
> #define _CORESIGHT_TMC_H
>
> +#include <linux/dma-mapping.h>
> #include <linux/miscdevice.h>
>
> #define TMC_RSZ 0x004
> @@ -171,6 +172,38 @@ struct tmc_drvdata {
> u32 etr_caps;
> };
>
> +/**
> + * struct tmc_pages - Collection of pages used for SG.
> + * @nr_pages: Number of pages in the list.
> + * @daddrs: Array of DMA'able page address.
> + * @pages: Array pages for the buffer.
> + */
> +struct tmc_pages {
> + int nr_pages;
> + dma_addr_t *daddrs;
> + struct page **pages;
> +};
> +
> +/*
> + * struct tmc_sg_table - Generic SG table for TMC
> + * @dev: Device for DMA allocations
> + * @table_vaddr: Contiguous Virtual address for PageTable
> + * @data_vaddr: Contiguous Virtual address for Data Buffer
> + * @table_daddr: DMA address of the PageTable base
> + * @node: Node for Page allocations
> + * @table_pages: List of pages & dma address for Table
> + * @data_pages: List of pages & dma address for Data
> + */
> +struct tmc_sg_table {
> + struct device *dev;
> + void *table_vaddr;
> + void *data_vaddr;
> + dma_addr_t table_daddr;
> + int node;
> + struct tmc_pages table_pages;
> + struct tmc_pages data_pages;
> +};
> +
> /* Generic functions */
> void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata);
> void tmc_flush_and_stop(struct tmc_drvdata *drvdata);
> @@ -226,4 +259,21 @@ static inline bool tmc_etr_has_cap(struct tmc_drvdata *drvdata, u32 cap)
> return !!(drvdata->etr_caps & cap);
> }
>
> +struct tmc_sg_table *tmc_alloc_sg_table(struct device *dev,
> + int node,
> + int nr_tpages,
> + int nr_dpages,
> + void **pages);
> +void tmc_free_sg_table(struct tmc_sg_table *sg_table);
> +void tmc_sg_table_sync_table(struct tmc_sg_table *sg_table);
> +void tmc_sg_table_sync_data_range(struct tmc_sg_table *table,
> + u64 offset, u64 size);
> +ssize_t tmc_sg_table_get_data(struct tmc_sg_table *sg_table,
> + u64 offset, size_t len, char **bufpp);
> +static inline unsigned long
> +tmc_sg_table_buf_size(struct tmc_sg_table *sg_table)
> +{
> + return sg_table->data_pages.nr_pages << PAGE_SHIFT;
> +}
> +
> #endif
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH] arm64: dts: msm8916: fix Coresight ETF graph connections
From: Rob Herring @ 2018-05-23 20:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508150952.24562-3-robh@kernel.org>
On Tue, May 8, 2018 at 10:09 AM, Rob Herring <robh@kernel.org> wrote:
> The ETF input should be connected to the funnel output, and the ETF
> output should be connected to the replicator input. The labels are wrong
> and these got swapped:
>
> Warning (graph_endpoint): /soc/funnel at 821000/ports/port at 8/endpoint: graph connection to node '/soc/etf at 825000/ports/port at 1/endpoint' is not bidirectional
> Warning (graph_endpoint): /soc/replicator at 824000/ports/port at 2/endpoint: graph connection to node '/soc/etf at 825000/ports/port at 0/endpoint' is not bidirectional
>
> Fixes: 7c10da373698 ("arm64: dts: qcom: Add msm8916 CoreSight components")
> Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Cc: Andy Gross <andy.gross@linaro.org>
> Cc: David Brown <david.brown@linaro.org>
> Cc: linux-arm-msm at vger.kernel.org
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Ping. Still seeing warnings in -next for these.
Rob
^ permalink raw reply
* [PATCH] arm64: dts: sprd: fix typo in 'remote-endpoint'
From: Rob Herring @ 2018-05-23 20:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAAfSe-tgKJvzCN6eHCuUR94ECSE8ypAR1eRjhV-VJNztebK9Xw@mail.gmail.com>
On Tue, May 8, 2018 at 8:58 PM, Chunyan Zhang <zhang.lyra@gmail.com> wrote:
> Hi Rob,
>
> On 8 May 2018 at 23:09, Rob Herring <robh@kernel.org> wrote:
>> dtc now warns on incomplete OF graph endpoint connections:
>>
>> arch/arm64/boot/dts/sprd/sp9860g-1h10.dtb: Warning (graph_endpoint): /soc/stm at 10006000/port/endpoint: graph connection to node '/soc/funnel at 10001000/ports/port at 2/endpoint' is not bidirectional
>>
>> The cause is a typo in 'remote-endpoint'.
>
> Thanks for fixing this and,
>
> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Is someone going to apply this? Still seeing warnings in linux-next.
Rob
^ permalink raw reply
* [PATCH v2 0/6]Enhance support for the SP805 WDT
From: Ray Jui @ 2018-05-23 20:32 UTC (permalink / raw)
To: linux-arm-kernel
This patch series enhances the support for the SP805 watchdog timer.
First of all, 'timeout-sec' devicetree property is added. In addition,
support is also added to allow the driver to reset the watchdog if it
has been detected that watchdot has been started in the bootloader. In
this case, the driver will initiate the ping service from the kernel
watchdog subsystem, before a user mode daemon takes over. This series
also enables SP805 in the default ARM64 defconfig
This patch series is based off v4.17-rc5 and is available on GIHUB:
repo: https://github.com/Broadcom/arm64-linux.git
branch: sp805-wdt-v2
Changes since v1:
- Consolidate two duplicated SP805 binding documents into one
- Slight change of the wdt_is_running implementation per discussion
Ray Jui (6):
Documentation: DT: Consolidate SP805 binding docs
Documentation: DT: Add optional 'timeout-sec' property for sp805
watchdog: sp805: add 'timeout-sec' DT property support
watchdog: sp805: set WDOG_HW_RUNNING when appropriate
arm64: dt: set initial SR watchdog timeout to 60 seconds
arm64: defconfig: add CONFIG_ARM_SP805_WATCHDOG
.../devicetree/bindings/watchdog/arm,sp805.txt | 22 ++++++++++++---
.../devicetree/bindings/watchdog/sp805-wdt.txt | 31 ----------------------
.../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 1 +
arch/arm64/configs/defconfig | 1 +
drivers/watchdog/sp805_wdt.c | 28 ++++++++++++++++++-
5 files changed, 47 insertions(+), 36 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
--
2.1.4
^ permalink raw reply
* [PATCH v2 1/6] Documentation: DT: Consolidate SP805 binding docs
From: Ray Jui @ 2018-05-23 20:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527107527-8093-1-git-send-email-ray.jui@broadcom.com>
Consolidate two SP805 binding documents "arm,sp805.txt" and
"sp805-wdt.txt" into "arm,sp805.txt" that matches the naming of the
desired compatible string to be used
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
---
.../devicetree/bindings/watchdog/arm,sp805.txt | 20 +++++++++++---
.../devicetree/bindings/watchdog/sp805-wdt.txt | 31 ----------------------
2 files changed, 16 insertions(+), 35 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
index ca99d64..de93a4d 100644
--- a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
+++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
@@ -1,17 +1,29 @@
ARM AMBA Primecell SP805 Watchdog
+SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
+can be used to identify the peripheral type, vendor, and revision.
+This value can be used for driver matching.
+
+As SP805 WDT is a primecell IP, it follows the base bindings specified in
+'arm/primecell.txt'
+
Required properties:
- compatible: Should be "arm,sp805" & "arm,primecell"
- reg: Should contain location and length for watchdog timer register.
-- interrupts: Should contain the list of watchdog timer interrupts.
- clocks: clocks driving the watchdog timer hardware. This list should be 2
- clocks. With 2 clocks, the order is wdogclk clock, apb_pclk.
+ clocks. With 2 clocks, the order is wdog_clk, apb_pclk.
+ wdog_clk can be equal to or be a sub-multiple of the apb_pclk frequency
+- clock-names : Shall be "wdog_clk" for first clock and "apb_pclk" for the
+ second one.
+
+Optional properties:
+- interrupts : Should specify WDT interrupt number.
Example:
watchdog at 66090000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x66090000 0x1000>;
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb_pclk>,<&apb_pclk>;
- clock-names = "wdogclk", "apb_pclk";
+ clocks = <&wdt_clk>, <&apb_pclk>;
+ clock-names = "wdog_clk", "apb_pclk";
};
diff --git a/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt b/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
deleted file mode 100644
index edc4f0e..0000000
--- a/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-* ARM SP805 Watchdog Timer (WDT) Controller
-
-SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
-can be used to identify the peripheral type, vendor, and revision.
-This value can be used for driver matching.
-
-As SP805 WDT is a primecell IP, it follows the base bindings specified in
-'arm/primecell.txt'
-
-Required properties:
-- compatible : Should be "arm,sp805-wdt", "arm,primecell"
-- reg : Base address and size of the watchdog timer registers.
-- clocks : From common clock binding.
- First clock is PCLK and the second is WDOGCLK.
- WDOGCLK can be equal to or be a sub-multiple of the PCLK frequency.
-- clock-names : From common clock binding.
- Shall be "apb_pclk" for first clock and "wdog_clk" for the
- second one.
-
-Optional properties:
-- interrupts : Should specify WDT interrupt number.
-
-Examples:
-
- cluster1_core0_watchdog: wdt at c000000 {
- compatible = "arm,sp805-wdt", "arm,primecell";
- reg = <0x0 0xc000000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
- clock-names = "apb_pclk", "wdog_clk";
- };
-
--
2.1.4
^ permalink raw reply related
* [PATCH v2 2/6] Documentation: DT: Add optional 'timeout-sec' property for sp805
From: Ray Jui @ 2018-05-23 20:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527107527-8093-1-git-send-email-ray.jui@broadcom.com>
Update the SP805 binding document to add optional 'timeout-sec'
devicetree property
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
Documentation/devicetree/bindings/watchdog/arm,sp805.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
index de93a4d..9cd7470 100644
--- a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
+++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
@@ -18,6 +18,8 @@ Required properties:
Optional properties:
- interrupts : Should specify WDT interrupt number.
+timeout-sec : Should specify default WDT timeout in seconds. If unset, the
+ default timeout in the driver is 30 seconds
Example:
watchdog at 66090000 {
--
2.1.4
^ permalink raw reply related
* [PATCH v2 3/6] watchdog: sp805: add 'timeout-sec' DT property support
From: Ray Jui @ 2018-05-23 20:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527107527-8093-1-git-send-email-ray.jui@broadcom.com>
Add support for optional devicetree property 'timeout-sec'.
'timeout-sec' is used in the driver if specified in devicetree.
Otherwise, fall back to driver default, i.e., 60 seconds
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
drivers/watchdog/sp805_wdt.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index 03805bc..1484609 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -230,7 +230,14 @@ sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
spin_lock_init(&wdt->lock);
watchdog_set_nowayout(&wdt->wdd, nowayout);
watchdog_set_drvdata(&wdt->wdd, wdt);
- wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
+
+ /*
+ * If 'timeout-sec' devicetree property is specified, use that.
+ * Otherwise, use DEFAULT_TIMEOUT
+ */
+ wdt->wdd.timeout = DEFAULT_TIMEOUT;
+ watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
+ wdt_setload(&wdt->wdd, wdt->wdd.timeout);
ret = watchdog_register_device(&wdt->wdd);
if (ret) {
--
2.1.4
^ permalink raw reply related
* [PATCH v2 4/6] watchdog: sp805: set WDOG_HW_RUNNING when appropriate
From: Ray Jui @ 2018-05-23 20:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527107527-8093-1-git-send-email-ray.jui@broadcom.com>
If the watchdog hardware is already enabled during the boot process,
when the Linux watchdog driver loads, it should reset the watchdog and
tell the watchdog framework. As a result, ping can be generated from
the watchdog framework, until the userspace watchdog daemon takes over
control
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
---
drivers/watchdog/sp805_wdt.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index 1484609..d662a6f 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -42,6 +42,7 @@
/* control register masks */
#define INT_ENABLE (1 << 0)
#define RESET_ENABLE (1 << 1)
+ #define ENABLE_MASK (INT_ENABLE | RESET_ENABLE)
#define WDTINTCLR 0x00C
#define WDTRIS 0x010
#define WDTMIS 0x014
@@ -74,6 +75,15 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout,
"Set to 1 to keep watchdog running after device release");
+/* returns true if wdt is running; otherwise returns false */
+static bool wdt_is_running(struct watchdog_device *wdd)
+{
+ struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
+ u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);
+
+ return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK;
+}
+
/* This routine finds load value that will reset system in required timout */
static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
{
@@ -239,6 +249,15 @@ sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
wdt_setload(&wdt->wdd, wdt->wdd.timeout);
+ /*
+ * If HW is already running, enable/reset the wdt and set the running
+ * bit to tell the wdt subsystem
+ */
+ if (wdt_is_running(&wdt->wdd)) {
+ wdt_enable(&wdt->wdd);
+ set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
+ }
+
ret = watchdog_register_device(&wdt->wdd);
if (ret) {
dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
--
2.1.4
^ permalink raw reply related
* [PATCH v2 5/6] arm64: dt: set initial SR watchdog timeout to 60 seconds
From: Ray Jui @ 2018-05-23 20:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527107527-8093-1-git-send-email-ray.jui@broadcom.com>
Set initial Stingray watchdog timeout to 60 seconds
By the time when the userspace watchdog daemon is ready and taking
control over, the watchdog timeout will then be reset to what's
configured in the daemon
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
---
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 99aaff0..1e1cf49 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -420,6 +420,7 @@
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>;
clock-names = "wdogclk", "apb_pclk";
+ timeout-sec = <60>;
};
gpio_hsls: gpio at d0000 {
--
2.1.4
^ permalink raw reply related
* [PATCH v2 6/6] arm64: defconfig: add CONFIG_ARM_SP805_WATCHDOG
From: Ray Jui @ 2018-05-23 20:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527107527-8093-1-git-send-email-ray.jui@broadcom.com>
Enable the SP805 watchdog timer
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index ecf6137..3fe5eb5 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -351,6 +351,7 @@ CONFIG_ROCKCHIP_THERMAL=m
CONFIG_TEGRA_BPMP_THERMAL=m
CONFIG_UNIPHIER_THERMAL=y
CONFIG_WATCHDOG=y
+CONFIG_ARM_SP805_WATCHDOG=y
CONFIG_S3C2410_WATCHDOG=y
CONFIG_MESON_GXBB_WATCHDOG=m
CONFIG_MESON_WATCHDOG=m
--
2.1.4
^ permalink raw reply related
* [PATCH v2] OMAP: CLK: CLKSRC: Add suspend resume hooks
From: J, KEERTHY @ 2018-05-23 20:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180523184116.GS98604@atomide.com>
On 5/24/2018 12:11 AM, Tony Lindgren wrote:
> * Keerthy <j-keerthy@ti.com> [180522 11:24]:
>> Add the save and restore for clksrc as part of suspend and resume
>> so that it saves the counter value and restores. This is needed in
>> modes like rtc+ddr in self-refresh not doing this stalls the time.
> Can't we now do this all in drivers/clocksource/timer-ti-*.c?
arch/arm/boot/dts/am4372.dtsi has compatible ti,omap-counter32k
which is arch/arm/mach-omap2/timer.c compatible
IMHO clocksource suspend resume best fits under mach-omap2/timer.c
just like clockevent has suspend/resume.
>
>> @@ -490,6 +513,15 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
>> res = omap_dm_timer_init_one(&clksrc, fck_source, property,
>> &clocksource_gpt.name,
>> OMAP_TIMER_NONPOSTED);
>> +
>> + if (soc_is_am43xx()) {
>> + clocksource_gpt.suspend = omap2_gptimer_clksrc_suspend;
>> + clocksource_gpt.resume = omap2_gptimer_clksrc_resume;
>> +
>> + clocksource_gpt_hwmod =
>> + omap_hwmod_lookup(clocksource_gpt.name);
>> + }
>> +
> Then you can do this based on a quirk flag set by compatible.
>
> Regards,
>
> Tony
^ permalink raw reply
* [PATCHv2] arm64: Make sure permission updates happen for pmd/pud
From: Kees Cook @ 2018-05-23 20:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180523184346.487-1-labbott@redhat.com>
On Wed, May 23, 2018 at 11:43 AM, Laura Abbott <labbott@redhat.com> wrote:
> Commit 15122ee2c515 ("arm64: Enforce BBM for huge IO/VMAP mappings")
> disallowed block mappings for ioremap since that code does not honor
> break-before-make. The same APIs are also used for permission updating
> though and the extra checks prevent the permission updates from happening,
> even though this should be permitted. This results in read-only permissions
> not being fully applied. Visibly, this can occasionaly be seen as a failure
> on the built in rodata test when the test data ends up in a section or
> as an odd RW gap on the page table dump. Fix this by using
> pgattr_change_is_safe instead of p*d_present for determining if the
> change is permitted.
>
> Reported-by: Peter Robinson <pbrobinson@gmail.com>
> Fixes: 15122ee2c515 ("arm64: Enforce BBM for huge IO/VMAP mappings")
> Signed-off-by: Laura Abbott <labbott@redhat.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Thanks for fixing this!
-Kees
> ---
> v2: Switch to using pgattr_change_is_safe per suggestion of Will
> ---
> arch/arm64/mm/mmu.c | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
> index 2dbb2c9f1ec1..493ff75670ff 100644
> --- a/arch/arm64/mm/mmu.c
> +++ b/arch/arm64/mm/mmu.c
> @@ -933,13 +933,15 @@ int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot)
> {
> pgprot_t sect_prot = __pgprot(PUD_TYPE_SECT |
> pgprot_val(mk_sect_prot(prot)));
> + pud_t new_pud = pfn_pud(__phys_to_pfn(phys), sect_prot);
>
> - /* ioremap_page_range doesn't honour BBM */
> - if (pud_present(READ_ONCE(*pudp)))
> + /* Only allow permission changes for now */
> + if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)),
> + pud_val(new_pud)))
> return 0;
>
> BUG_ON(phys & ~PUD_MASK);
> - set_pud(pudp, pfn_pud(__phys_to_pfn(phys), sect_prot));
> + set_pud(pudp, new_pud);
> return 1;
> }
>
> @@ -947,13 +949,15 @@ int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot)
> {
> pgprot_t sect_prot = __pgprot(PMD_TYPE_SECT |
> pgprot_val(mk_sect_prot(prot)));
> + pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), sect_prot);
>
> - /* ioremap_page_range doesn't honour BBM */
> - if (pmd_present(READ_ONCE(*pmdp)))
> + /* Only allow permission changes for now */
> + if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)),
> + pmd_val(new_pmd)))
> return 0;
>
> BUG_ON(phys & ~PMD_MASK);
> - set_pmd(pmdp, pfn_pmd(__phys_to_pfn(phys), sect_prot));
> + set_pmd(pmdp, new_pmd);
> return 1;
> }
>
> --
> 2.17.0
>
--
Kees Cook
Pixel Security
^ permalink raw reply
* [PATCH v2] spi: bcm2835aux: ensure interrupts are enabled for shared handler
From: Rob Herring @ 2018-05-23 20:52 UTC (permalink / raw)
To: linux-arm-kernel
The BCM2835 AUX SPI has a shared interrupt line (with AUX UART).
Downstream fixes this with an AUX irqchip to demux the IRQ sources and a
DT change which breaks compatibility with older kernels. The AUX irqchip
was already rejected for upstream[1] and the DT change would break
working systems if the DTB is updated to a newer one. The latter issue
was brought to my attention by Alex Graf.
The root cause however is a bug in the shared handler. A shared handler
must correctly identify it actually handled an interrupt. The handler
here was processing data whether interrupts were enabled or not.
It would return IRQ_HANDLED if there was any data and not only when
there was an actual interrupt pending. The result is that another
device's IRQ could cause the SPI's IRQ handler to run and process data
when the the SPI driver working in polled mode. Fix this by adding a
check in the IRQ handler that the TXEMPTY or IDLE interrupts are enabled
and always return IRQ_NONE when they are not.
[1] https://patchwork.kernel.org/patch/9781221/
Cc: Alexander Graf <agraf@suse.de>
Cc: Mark Brown <broonie@kernel.org>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list at broadcom.com
Cc: linux-spi at vger.kernel.org
Cc: linux-rpi-kernel at lists.infradead.org
Cc: linux-arm-kernel at lists.infradead.org
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Rob Herring <robh@kernel.org>
---
Still hoping someone can test this as I have not.
v2:
- Expand commit message text about shared handler req. and how polled
mode causes the problem.
drivers/spi/spi-bcm2835aux.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c
index 1431cb98fe40..3094d818cf06 100644
--- a/drivers/spi/spi-bcm2835aux.c
+++ b/drivers/spi/spi-bcm2835aux.c
@@ -184,6 +184,11 @@ static irqreturn_t bcm2835aux_spi_interrupt(int irq, void *dev_id)
struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
irqreturn_t ret = IRQ_NONE;
+ /* IRQ may be shared, so return if our interrupts are disabled */
+ if (!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_CNTL1) &
+ (BCM2835_AUX_SPI_CNTL1_TXEMPTY | BCM2835_AUX_SPI_CNTL1_IDLE)))
+ return ret;
+
/* check if we have data to read */
while (bs->rx_len &&
(!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT) &
--
2.17.0
^ permalink raw reply related
* [PATCH v2] OMAP: CLK: CLKSRC: Add suspend resume hooks
From: Tony Lindgren @ 2018-05-23 21:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ea82b336-7e99-bc41-4b51-54fe208c5e55@ti.com>
* J, KEERTHY <j-keerthy@ti.com> [180523 20:40]:
>
>
> On 5/24/2018 12:11 AM, Tony Lindgren wrote:
> > * Keerthy <j-keerthy@ti.com> [180522 11:24]:
> > > Add the save and restore for clksrc as part of suspend and resume
> > > so that it saves the counter value and restores. This is needed in
> > > modes like rtc+ddr in self-refresh not doing this stalls the time.
> > Can't we now do this all in drivers/clocksource/timer-ti-*.c?
>
> arch/arm/boot/dts/am4372.dtsi has compatible ti,omap-counter32k
> which is arch/arm/mach-omap2/timer.c compatible
Oh OK.
> IMHO clocksource suspend resume best fits under mach-omap2/timer.c
> just like clockevent has suspend/resume.
Yup you're right. Applying into omap-for-v4.18/soc thanks.
No guarantees at this point it will get merged though.
Regards,
Tony
^ permalink raw reply
* [PATCH V2] PCI/portdrv: do not disable device on reboot/shutdown
From: Bjorn Helgaas @ 2018-05-23 21:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527043490-17268-1-git-send-email-okaya@codeaurora.org>
[-cc Gabriele (invalid email address)]
[+cc Don, esc.storagedev, linux-scsi since hpsa is involved]
Background for newcomers:
Ryan reported a panic on shutdown/reboot [1] on DL360 Gen9. I think
the problem is that the shutdown path clears PCI_COMMAND_MASTER on
the Root Port leading to an hpsa device, the hpsa device attempts a
DMA, the Root Port treats the DMA as an Unsupported Request (a fatal
error), and that leads to a panic.
This patch avoids the problem by changing the Root Port shutdown
path so it doesn't clear PCI_COMMAND_MASTER.
[1] https://bugzilla.kernel.org/show_bug.cgi?id=199779
On Tue, May 22, 2018 at 10:44:46PM -0400, Sinan Kaya wrote:
> 'Commit cc27b735ad3a ("PCI/portdrv: Turn off PCIe services during
> shutdown")' has been added to kernel to shutdown pending PCIe port
> service interrupts during reboot so that a newly started kexec kernel
> wouldn't observe pending interrupts.
>
> pcie_port_device_remove() is disabling the root port and switches by
> calling pci_disable_device() after all PCIe service drivers are shutdown.
It's interesting and annoying that pci_enable_device() and
pci_disable_device() sound like they should be inverses, or at least
related, but they really aren't.
pci_enable_device() basically turns on PCI_COMMAND_MEMORY and/or
PCI_COMMAND_IO so the device will respond to programmed I/O. But
pci_disable_device() leaves programmed I/O enabled and turns off
PCI_COMMAND_MASTER, which keeps the device from performing DMA or
forwarding transactions upstream (in the case of bridges).
Not an issue for this patch, just an observation :)
> pci_disable_device() has a much wider impact then port service itself and
> it prevents all inbound transactions to reach to the system and impacts
> the entire PCI traffic behind the bridge.
>
> Issue is that pcie_port_device_remove() doesn't maintain any coordination
> with the rest of the PCI device drivers in the system before clearing the
> bus master bit.
I am interested in this part because if there really isn't any
coordination, that's a good argument for getting rid of portdrv, which
I want to do anyway. But I haven't dug into this enough to verify it.
The portdrv does register as a regular PCI driver (pcie_portdriver),
and I'm pretty sure the driver core is smart enough to call the driver
entry points in a postorder traversal (children before parents), which
means the hpsa .shutdown() should be called before the portdrv
.shutdown().
The crash seems to indicate that the hpsa device attempted a DMA after
we cleared the Root Port's PCI_COMMAND_MASTER, which means
hpsa_shutdown() didn't stop DMA from the device (it looks like *most*
shutdown methods don't disable device DMA, so it's in good company).
> This has been found to cause crashes on HP DL360 Gen9 machines during
> reboot. Besides, kexec is already clearing the bus master bit in
> pci_device_shutdown() after all PCI drivers are removed.
The original path was:
pci_device_shutdown(hpsa)
drv->shutdown
hpsa_shutdown # hpsa_pci_driver.shutdown
...
pci_device_shutdown(RP) # root port
drv->shutdown
pcie_portdrv_remove # pcie_portdriver.shutdown
pcie_port_device_remove
pci_disable_device
do_pci_disable_device
# clear RP PCI_COMMAND_MASTER
if (kexec)
pci_clear_master(RP)
# clear RP PCI_COMMAND_MASTER
If I understand correctly, the new path after this patch is:
pci_device_shutdown(hpsa)
drv->shutdown
hpsa_shutdown # hpsa_pci_driver.shutdown
...
pci_device_shutdown(RP) # root port
drv->shutdown
pcie_portdrv_shutdown # pcie_portdriver.shutdown
__pcie_portdrv_remove(RP, false)
pcie_port_device_remove(RP, false)
# do NOT clear RP PCI_COMMAND_MASTER
if (kexec)
pci_clear_master(RP)
# clear RP PCI_COMMAND_MASTER
I guess this patch avoids the panic during reboot because we're not in
the kexec path, so we never clear PCI_COMMAND_MASTER for the Root
Port, so the hpsa device can DMA happily until the lights go out.
But DMA continuing for some random amount of time before the reboot or
shutdown happens makes me a little queasy. That doesn't sound safe.
The more I think about this, the more confused I get. What am I
missing?
> Just remove the extra clear in shutdown path by seperating the remove and
> shutdown APIs in the PORTDRV.
>
> Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=199779
> Fixes: cc27b735ad3a ("PCI/portdrv: Turn off PCIe services during shutdown")
> Cc: stable at vger.kernel.org
> Reported-by: Ryan Finnie <ryan@finnie.org>
> ---
> drivers/pci/pcie/portdrv.h | 2 +-
> drivers/pci/pcie/portdrv_core.c | 5 +++--
> drivers/pci/pcie/portdrv_pci.c | 16 +++++++++++++---
> 3 files changed, 17 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
> index d0c6783..f6e88fe 100644
> --- a/drivers/pci/pcie/portdrv.h
> +++ b/drivers/pci/pcie/portdrv.h
> @@ -86,7 +86,7 @@ int pcie_port_device_register(struct pci_dev *dev);
> int pcie_port_device_suspend(struct device *dev);
> int pcie_port_device_resume(struct device *dev);
> #endif
> -void pcie_port_device_remove(struct pci_dev *dev);
> +void pcie_port_device_remove(struct pci_dev *dev, bool disable);
> int __must_check pcie_port_bus_register(void);
> void pcie_port_bus_unregister(void);
>
> diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
> index c9c0663..f35341e 100644
> --- a/drivers/pci/pcie/portdrv_core.c
> +++ b/drivers/pci/pcie/portdrv_core.c
> @@ -405,11 +405,12 @@ static int remove_iter(struct device *dev, void *data)
> * Remove PCI Express port service devices associated with given port and
> * disable MSI-X or MSI for the port.
> */
> -void pcie_port_device_remove(struct pci_dev *dev)
> +void pcie_port_device_remove(struct pci_dev *dev, bool disable)
> {
> device_for_each_child(&dev->dev, NULL, remove_iter);
> pci_free_irq_vectors(dev);
> - pci_disable_device(dev);
> + if (disable)
> + pci_disable_device(dev);
> }
>
> /**
> diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
> index 973f1b8..29afaf3 100644
> --- a/drivers/pci/pcie/portdrv_pci.c
> +++ b/drivers/pci/pcie/portdrv_pci.c
> @@ -137,7 +137,7 @@ static int pcie_portdrv_probe(struct pci_dev *dev,
> return 0;
> }
>
> -static void pcie_portdrv_remove(struct pci_dev *dev)
> +static void __pcie_portdrv_remove(struct pci_dev *dev, bool disable)
> {
> if (pci_bridge_d3_possible(dev)) {
> pm_runtime_forbid(&dev->dev);
> @@ -145,7 +145,17 @@ static void pcie_portdrv_remove(struct pci_dev *dev)
> pm_runtime_dont_use_autosuspend(&dev->dev);
> }
>
> - pcie_port_device_remove(dev);
> + pcie_port_device_remove(dev, disable);
> +}
> +
> +static void pcie_portdrv_remove(struct pci_dev *dev)
> +{
> + return __pcie_portdrv_remove(dev, true);
> +}
> +
> +static void pcie_portdrv_shutdown(struct pci_dev *dev)
> +{
> + return __pcie_portdrv_remove(dev, false);
> }
>
> static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
> @@ -218,7 +228,7 @@ static struct pci_driver pcie_portdriver = {
>
> .probe = pcie_portdrv_probe,
> .remove = pcie_portdrv_remove,
> - .shutdown = pcie_portdrv_remove,
> + .shutdown = pcie_portdrv_shutdown,
What are the circumstances when we call .remove() vs .shutdown()?
I guess the main (maybe only) way to call .remove() is to hot-remove
the port? And .shutdown() is basically used in the reboot and kexec
paths?
> .err_handler = &pcie_portdrv_err_handler,
>
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH 05/15] mtd: nand: pxa3xx: remove the dmaengine compat need
From: Daniel Mack @ 2018-05-23 21:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a09d80dc-e8fd-1e9a-1878-8875ddc83134@zonque.org>
Hi Robert,
Please refer to the attached patch instead of the one I sent earlier. I
missed to also remove the platform_get_resource(IORESOURCE_DMA) call.
Thanks,
Daniel
On Friday, May 18, 2018 11:31 PM, Daniel Mack wrote:
> Hi Robert,
>
> Thanks for this series.
>
> On Monday, April 02, 2018 04:26 PM, Robert Jarzmik wrote:
>> From: Robert Jarzmik <robert.jarzmik@renault.com>
>>
>> As the pxa architecture switched towards the dmaengine slave map, the
>> old compatibility mechanism to acquire the dma requestor line number and
>> priority are not needed anymore.
>>
>> This patch simplifies the dma resource acquisition, using the more
>> generic function dma_request_slave_channel().
>>
>> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
>> ---
>> drivers/mtd/nand/pxa3xx_nand.c | 10 +---------
>
> This driver was replaced by drivers/mtd/nand/raw/marvell_nand.c
> recently, so this patch can be dropped. I attached a version for the new
> driver which you can pick instead.
>
>
> Thanks,
> Daniel
>
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^ permalink raw reply
* v4.17-rc1: regressions on N900, N950
From: Aaro Koskinen @ 2018-05-23 22:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180522215638.GC2299@darkstar.musicnaut.iki.fi>
On Wed, May 23, 2018 at 12:56:38AM +0300, Aaro Koskinen wrote:
> On Tue, May 22, 2018 at 10:58:26PM +0200, Pavel Machek wrote:
> > On Tue 2018-05-22 22:41:39, Aaro Koskinen wrote:
> > > My device worked with v4.17-rc1 (haven't found time to test newer kernels),
> > > but if you say the probe order is random then we must find some proper way
> > > to express the dependency.
> >
> > I started bisect, but.. that will probably not be useful.
> >
> > If your device works ok in v4.17-rc1, it probably works in newer -rcs,
> > too.
>
> Actually, my statement may be bogus... Now I tried again with -rc1
> (and also -rc6) and it fails... But v4.16 works.
I tried to investigate this today again, and I think the issue is omapdrm.
At commit 78230c46ec0a91dd4256c9e54934b3c7095a7ee3 ("Merge tag 'omapdrm-4.17'
of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next")
the boot hangs on omapdrm init:
[ 3.725891] input: TSC2005 touchscreen as /devices/platform/68000000.ocp/48098000.spi/spi_master/spi0/spi0.0/input/input3
[ 3.746368] omap_hsmmc 4809c000.mmc: Got CD GPIO
[ 3.826721] omapdrm omapdrm.0: DMM not available, disable DMM support
[ 3.834106] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 3.841064] [drm] No driver support for vblank timestamp query.
(THE DEVICE HANGS HERE)
Then I reverted the merge with "git revert
78230c46ec0a91dd4256c9e54934b3c7095a7ee3 -m 1":
Now the device boots fine with working display.
Then I tried bisection: b65bd40311565a58b12f400e95e8aa0a1e3a8878 good
and 78230c46ec0a91dd4256c9e54934b3c7095a7ee3 bad.
But turns out that omapdrm tree is unbisectable, as I get build failures such
as (commit 28d79f3e56b2c1d5ff0fd363da3229be0962cc85):
/home/aaro/git/devel/linux/drivers/gpu/drm/omapdrm/dss/dss.c:1473:52: error: undefined identifier 'dss_debug_dump_clocks'
/home/aaro/git/devel/linux/drivers/gpu/drm/omapdrm/dss/dss.c:1472:51: warning: callwith no type!
In file included from /home/aaro/git/devel/linux/drivers/gpu/drm/omapdrm/dss/core.c:28:0:
/home/aaro/git/devel/linux/drivers/gpu/drm/omapdrm/dss/dss.h:395:25: error: conflicting types for 'port'
struct device_node *port,
^~~~
etc. WTF?
So I gave up for today.
A.
^ permalink raw reply
* v4.17-rc1: regressions on N900, N950
From: Tony Lindgren @ 2018-05-23 22:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180523201208.GA31731@amd>
* Pavel Machek <pavel@ucw.cz> [180523 20:14]:
> On Wed 2018-05-23 16:06:15, Pavel Machek wrote:
> > On Wed 2018-05-23 00:56:38, Aaro Koskinen wrote:
> > > Hi,
> > >
> > > On Tue, May 22, 2018 at 10:58:26PM +0200, Pavel Machek wrote:
> > > > On Tue 2018-05-22 22:41:39, Aaro Koskinen wrote:
> > > > > My device worked with v4.17-rc1 (haven't found time to test newer kernels),
> > > > > but if you say the probe order is random then we must find some proper way
> > > > > to express the dependency.
> > > >
> > > > I started bisect, but.. that will probably not be useful.
> > > >
> > > > If your device works ok in v4.17-rc1, it probably works in newer -rcs,
> > > > too.
> > >
> > > Actually, my statement may be bogus... Now I tried again with -rc1
> > > (and also -rc6) and it fails... But v4.16 works.
> > >
> > > > Thanks for the ordering hint, I'll try to figure out what is going on
> > > > there.
> > >
> > > My bisection pointed to 6fa7324ac5489ad43c4b6351355b869bc5458bef which
> > > doesn't seem to make any sense...?! So maybe there really is something
> > > random stuff going on? :-(
> >
> > So... I did some experiments on v4.16.
> >
> > Swapping tsc2005 at 0 and lcd: acx565akm at 2 entries in the dts does break
> > stuff.
> >
> > I thought it might be due to vio regulator, but it does not appear
> > so... screen still works with tsc2005 driver disabled in .config. (so
> > there's noone to enable vio regulator).
>
> Deleting tsc2005 at 0 entry also breaks screen.
>
> Replacing tsc2005 at 0 entry with
>
> foobar at 0 {
> compatible = "not really with anything";
> spi-max-frequency = <6000000>;
> reg = <0>;
> };
>
> still results in working touchscreen, removing any of the three fields
> breaks it again.
I bisected one regression down, see "omapdrm regression in v4.17-rc series"
not sure if it covers all the issues being discussed here though.
Regards,
Tony
^ permalink raw reply
* [PATCH] ARM: DTS: imx53: Add support for imx53 HSC/DDC boards from K+P
From: Lukasz Majewski @ 2018-05-23 22:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOMZO5DoLwEmQz5BQHDLk8sBq7mDH_UxBjRA0RGKb+PunMYu-Q@mail.gmail.com>
Hi Fabio,
> Hi Lukasz,
>
> On Sat, May 19, 2018 at 9:02 AM, Lukasz Majewski <lukma@denx.de>
> wrote:
>
> > After removing imx53-kp-ddc and imx53-kp-common iomux subnodes I do
> > see following errors in the dmesg (v4.17-rc5):
> >
> > imx53-pinctrl 53fa8000.iomuxc: function 'iomuxc' not supported
> > imx53-pinctrl 53fa8000.iomuxc: invalid function iomuxc in map
> > table
>
> Could you please investigate this error?
>
Ok.
> I have just tried the following change on a imx53-qsb:
> http://code.bulix.org/ik01yu-339697
I've noticed that this is the "common" dtsi file:
imx53-qsb-common.dtsi
Is there any board inheriting it? Is it extending the iomux node with
its own code ?
>
> and it works as expected:
> # dmesg | grep iomux
> [ 0.100046] imx53-pinctrl 53fa8000.iomuxc: initialized IMX pinctrl
> driver
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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* [PATCH v2 2/6] Documentation: DT: Add optional 'timeout-sec' property for sp805
From: Guenter Roeck @ 2018-05-23 22:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527107527-8093-3-git-send-email-ray.jui@broadcom.com>
On Wed, May 23, 2018 at 01:32:03PM -0700, Ray Jui wrote:
> Update the SP805 binding document to add optional 'timeout-sec'
> devicetree property
>
> Signed-off-by: Ray Jui <ray.jui@broadcom.com>
> Reviewed-by: Scott Branden <scott.branden@broadcom.com>
> Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> Documentation/devicetree/bindings/watchdog/arm,sp805.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
> index de93a4d..9cd7470 100644
> --- a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
> +++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
> @@ -18,6 +18,8 @@ Required properties:
>
> Optional properties:
> - interrupts : Should specify WDT interrupt number.
> +timeout-sec : Should specify default WDT timeout in seconds. If unset, the
> + default timeout in the driver is 30 seconds
That looks odd, with the changed indentation and the missing '-'
in front of 'timeout-sec'.
Guenter
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