* [PATCH] media: mtk-vpu: fix spelling mistake: "Prosessor" -> "Processor"
From: Colin King @ 2018-05-26 13:45 UTC (permalink / raw)
To: linux-arm-kernel
From: Colin Ian King <colin.king@canonical.com>
Trivial fix to spelling mistake in module description text.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
drivers/media/platform/mtk-vpu/mtk_vpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platform/mtk-vpu/mtk_vpu.c b/drivers/media/platform/mtk-vpu/mtk_vpu.c
index 1ff6a93262b7..f8d35e3ac1dc 100644
--- a/drivers/media/platform/mtk-vpu/mtk_vpu.c
+++ b/drivers/media/platform/mtk-vpu/mtk_vpu.c
@@ -960,4 +960,4 @@ static struct platform_driver mtk_vpu_driver = {
module_platform_driver(mtk_vpu_driver);
MODULE_LICENSE("GPL v2");
-MODULE_DESCRIPTION("Mediatek Video Prosessor Unit driver");
+MODULE_DESCRIPTION("Mediatek Video Processor Unit driver");
--
2.17.0
^ permalink raw reply related
* Boot failures in -next on Jetson TK1
From: Mark Brown @ 2018-05-26 10:36 UTC (permalink / raw)
To: linux-arm-kernel
Currently -next is failing to boot on Jetson TK1. The problem looks to
be the Nouveau driver, during initialization it reports an address
decode error then starts printing error messages saying "nouveau
57000000.gpu: fifo: SCHED_ERROR 20 []" over and over again.
I've pasted the start of the errors below, you can see a full log and
more details at:
https://kernelci.org/boot/id/5b0882a259b514339779a881/
The warnings about Spectre are a separate issue and don't seem to affect
the boot.
[ 15.194484] nouveau 57000000.gpu: NVIDIA GK20A (0ea000a1)
[ 15.200109] udevd[109]: could not rename interface '3' from 'eth0' to 'enp1s0': Device or resource busy
[ 15.206399] nouveau 57000000.gpu: imem: using IOMMU
[ 15.315122] CPU2: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
[ 15.320021] nouveau 57000000.gpu: Direct firmware load for nvidia/gk20a/fecs_inst.bin failed with error -2
[ 15.384841] nouveau 57000000.gpu: Direct firmware load for nouveau/nvea_fuc409c failed with error -2
[ 15.393972] nouveau 57000000.gpu: Direct firmware load for nouveau/fuc409c failed with error -2
[ 15.402679] nouveau 57000000.gpu: gr: failed to load fuc409c
[ 15.409434] CPU1: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
[ 15.419398] CPU1: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
[ 15.482568] tegra-mc 70019000.memory-controller: gpusrd: read @0x00041200: EMEM address decode error (EMEM decode error)
[ 15.491232] [TTM] Zone kernel: Available graphics memory: 375202 kiB
[ 15.502768] [TTM] Zone highmem: Available graphics memory: 1030050 kiB
[ 15.509290] [TTM] Initializing pool allocator
[ 15.513658] nouveau 57000000.gpu: DRM: VRAM: 0 MiB
[ 15.518451] nouveau 57000000.gpu: DRM: GART: 1048576 MiB
[ 15.526546] CPU1: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
[ 15.527290] tegra-mc 70019000.memory-controller: gpusrd: read @0x00072000: EMEM address decode error (EMEM decode error)
[ 15.537050] CPU1: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
[ 15.546928] nouveau 57000000.gpu: fifo: SCHED_ERROR 20 []
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^ permalink raw reply
* [RESEND PATCH] dmaengine: pxa: add a default requestor policy
From: Robert Jarzmik @ 2018-05-26 9:54 UTC (permalink / raw)
To: linux-arm-kernel
As what former drcmr -1 value meant, add a this as a default to each
channel, ie. that by default no requestor line is used.
This is specifically used for network drivers smc91x and smc911x, and
needed for their port to slave maps.
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
drivers/dma/pxa_dma.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/dma/pxa_dma.c b/drivers/dma/pxa_dma.c
index 9505334f9c6e..604df1bdadf7 100644
--- a/drivers/dma/pxa_dma.c
+++ b/drivers/dma/pxa_dma.c
@@ -762,6 +762,8 @@ static void pxad_free_chan_resources(struct dma_chan *dchan)
dma_pool_destroy(chan->desc_pool);
chan->desc_pool = NULL;
+ chan->drcmr = (u32)-1;
+ chan->prio = PXAD_PRIO_LOWEST;
}
static void pxad_free_desc(struct virt_dma_desc *vd)
@@ -1386,6 +1388,9 @@ static int pxad_init_dmadev(struct platform_device *op,
c = devm_kzalloc(&op->dev, sizeof(*c), GFP_KERNEL);
if (!c)
return -ENOMEM;
+
+ c->drcmr = (u32)-1;
+ c->prio = PXAD_PRIO_LOWEST;
c->vc.desc_free = pxad_free_desc;
vchan_init(&c->vc, &pdev->slave);
init_waitqueue_head(&c->wq_state);
--
2.11.0
^ permalink raw reply related
* [PATCH] ARM: pxa: hx4700: fix the usb client
From: Robert Jarzmik @ 2018-05-26 9:38 UTC (permalink / raw)
To: linux-arm-kernel
The usb client of the hx4700 is not working because no platform data is
declared. Fix it by adding the missing call.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
arch/arm/mach-pxa/hx4700.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index e2e7f247a645..b79b757fdd41 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -54,6 +54,7 @@
#include "devices.h"
#include "generic.h"
+#include "udc.h"
/* Physical address space information */
@@ -594,6 +595,8 @@ static struct platform_device gpio_vbus = {
},
};
+static struct pxa2xx_udc_mach_info hx4700_udc_info;
+
/*
* Touchscreen - TSC2046 connected to SSP2
*/
@@ -891,6 +894,7 @@ static void __init hx4700_init(void)
gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);
mdelay(10);
+ pxa_set_udc_info(&hx4700_udc_info);
regulator_has_full_constraints();
}
--
2.11.0
^ permalink raw reply related
* [PATCH 1/6] arm64: dts: amlogic: Add missing cooling device properties for CPUs
From: Neil Armstrong @ 2018-05-26 8:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180525211025.c73zdcdtyuvlewng@localhost>
Hi,
On 25/05/2018 23:10, Olof Johansson wrote:
> On Fri, May 25, 2018 at 11:10:01AM +0530, Viresh Kumar wrote:
>> The cooling device properties, like "#cooling-cells" and
>> "dynamic-power-coefficient", should either be present for all the CPUs
>> of a cluster or none. If these are present only for a subset of CPUs of
>> a cluster then things will start falling apart as soon as the CPUs are
>> brought online in a different order. For example, this will happen
>> because the operating system looks for such properties in the CPU node
>> it is trying to bring up, so that it can register a cooling device.
>>
>> Add such missing properties.
>
> This seems awkward compared to just having one cooling-cells in the /cpus node
> instead.
>
> What's it used for? I don't see any properties in the device nodes on meson-gxm
> that have any cooling-foo cells in them? So why should #cooling-cells be
> needed?
There is no reason to have the cooling-cells on these other CPUs, the DVFS is
controlled on the first CPU of each cluster, here cpu0 and cpu4 and only
cpu0 and cpu4 are used as cooling-cells.
Neil
>
>
> -Olof
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
^ permalink raw reply
* qcom: add firmware file for Venus on SDM845
From: Vikash Garodia @ 2018-05-26 8:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CA+5PVA67tow+prVC55XF4=CbRGXJvPi2SuCMyhRyuw5qt8T6_Q@mail.gmail.com>
Hi Josh,
On 2018-05-25 17:34, Josh Boyer wrote:
> On Fri, May 25, 2018 at 7:03 AM Vikash Garodia
> <vgarodia@codeaurora.org>
> wrote:
>
>> This pull request adds firmware files for Venus h/w codec found on the
> Qualcomm SDM845 chipset.
>
>> The following changes since commit
> 2a9b2cf50fb32e36e4fc1586c2f6f1421913b553:
>
>> Merge branch 'for-upstreaming-v1.7.2' of
> https://github.com/felix-cavium/linux-firmware (2018-05-18 08:35:22
> -0400)
>
>> are available in the git repository at:
>
>
>> https://github.com/vgarodia/linux-firmware master
>
>> for you to fetch changes up to
>> d6088b9c9d7f49d3c6c43681190889eca0abdcce:
>
>> qcom: add venus firmware files for v5.2 (2018-05-25 15:16:43 +0530)
>
>> ----------------------------------------------------------------
>> Vikash Garodia (1):
>> qcom: add venus firmware files for v5.2
>
>> WHENCE | 9 +++++++++
>> qcom/venus-5.2/venus.b00 | Bin 0 -> 212 bytes
>> qcom/venus-5.2/venus.b01 | Bin 0 -> 6600 bytes
>> qcom/venus-5.2/venus.b02 | Bin 0 -> 819552 bytes
>> qcom/venus-5.2/venus.b03 | Bin 0 -> 33536 bytes
>> qcom/venus-5.2/venus.b04 | 1 +
>> qcom/venus-5.2/venus.mbn | Bin 0 -> 865408 bytes
>> qcom/venus-5.2/venus.mdt | Bin 0 -> 6812 bytes
>> 8 files changed, 10 insertions(+)
>> create mode 100644 qcom/venus-5.2/venus.b00
>> create mode 100644 qcom/venus-5.2/venus.b01
>> create mode 100644 qcom/venus-5.2/venus.b02
>> create mode 100644 qcom/venus-5.2/venus.b03
>> create mode 100644 qcom/venus-5.2/venus.b04
>> create mode 100644 qcom/venus-5.2/venus.mbn
>> create mode 100644 qcom/venus-5.2/venus.mdt
>
> The venus.mbn file isn't mentioned in WHENCE:
>
> [jwboyer at vader linux-firmware]$ ./check_whence.py
> E: qcom/venus-5.2/venus.mbn not listed in WHENCE
> [jwboyer at vader linux-firmware]$
>
> Can you fix that up and let me know when to re-pull?
I have fixed the error and is ready to be re-pulled from the same git
repository.
I have noted the process to run check_whence.py before uploading the
firmwares.
Do i need to resend the pull request as the end commit is now changed to
7602644358157e4b89960472b6d59ffcc040ca52 ?
-Vikash
^ permalink raw reply
* [PATCH 0/3] Dts nodes for Keystone2 hw_rng driver
From: santosh.shilimkar at oracle.com @ 2018-05-26 4:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527167538-29837-1-git-send-email-vitalya@ti.com>
On 5/24/18 6:12 AM, Vitaly Andrianov wrote:
> This series adds dts nodes for Keystone2 hw_rng driver
>
> Vitaly Andrianov (3):
> ARM: dts: k2hk: add dts node for k2hk hw_rng driver
> ARM: dts: k2l: add dts node for k2l hw_rng driver
> ARM: dts: k2e: add dts node for k2e hw_rng driver
>
Looks good. Will queue this up for 4.19. Thanks !!
Regards,
Santosh
^ permalink raw reply
* linux-next: Signed-off-by missing for commit in the arm-soc tree
From: Stephen Rothwell @ 2018-05-26 4:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <80df07c8-b89c-503e-ad25-9f235cb08038@st.com>
Hi Alexandre,
On Tue, 15 May 2018 09:15:23 +0200 Alexandre Torgue <alexandre.torgue@st.com> wrote:
>
> On 05/14/2018 11:22 PM, Stephen Rothwell wrote:
> >
> > Commit
> >
> > 949a0c0dec85 ("ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c")
> >
> > is missing a Signed-off-by from its committer.
>
> My fault, I forgot it when I applied patch on my branch. Do we need an
> update or it is just a reminder?
Some people rebase their tree to fix these up, some just take it as a
learning experience :-)
--
Cheers,
Stephen Rothwell
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^ permalink raw reply
* [PATCH v2 03/40] iommu/sva: Manage process address spaces
From: Kenneth Lee @ 2018-05-26 2:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180525093959.000040a7@huawei.com>
On Fri, May 25, 2018 at 09:39:59AM +0100, Jonathan Cameron wrote:
> Date: Fri, 25 May 2018 09:39:59 +0100
> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> To: Ilias Apalodimas <ilias.apalodimas@linaro.org>
> CC: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>,
> "xieyisheng1 at huawei.com" <xieyisheng1@huawei.com>, "kvm at vger.kernel.org"
> <kvm@vger.kernel.org>, "linux-pci at vger.kernel.org"
> <linux-pci@vger.kernel.org>, "xuzaibo at huawei.com" <xuzaibo@huawei.com>,
> Will Deacon <Will.Deacon@arm.com>, "okaya at codeaurora.org"
> <okaya@codeaurora.org>, "linux-mm at kvack.org" <linux-mm@kvack.org>,
> "yi.l.liu at intel.com" <yi.l.liu@intel.com>, "ashok.raj at intel.com"
> <ashok.raj@intel.com>, "tn at semihalf.com" <tn@semihalf.com>,
> "joro at 8bytes.org" <joro@8bytes.org>, "robdclark at gmail.com"
> <robdclark@gmail.com>, "bharatku at xilinx.com" <bharatku@xilinx.com>,
> "linux-acpi at vger.kernel.org" <linux-acpi@vger.kernel.org>,
> "liudongdong3 at huawei.com" <liudongdong3@huawei.com>, "rfranz at cavium.com"
> <rfranz@cavium.com>, "devicetree at vger.kernel.org"
> <devicetree@vger.kernel.org>, "kevin.tian at intel.com"
> <kevin.tian@intel.com>, Jacob Pan <jacob.jun.pan@linux.intel.com>,
> "alex.williamson at redhat.com" <alex.williamson@redhat.com>,
> "rgummal at xilinx.com" <rgummal@xilinx.com>, "thunder.leizhen at huawei.com"
> <thunder.leizhen@huawei.com>, "linux-arm-kernel at lists.infradead.org"
> <linux-arm-kernel@lists.infradead.org>, "shunyong.yang at hxt-semitech.com"
> <shunyong.yang@hxt-semitech.com>, "dwmw2 at infradead.org"
> <dwmw2@infradead.org>, "liubo95 at huawei.com" <liubo95@huawei.com>,
> "jcrouse at codeaurora.org" <jcrouse@codeaurora.org>,
> "iommu at lists.linux-foundation.org" <iommu@lists.linux-foundation.org>,
> Robin Murphy <Robin.Murphy@arm.com>, "christian.koenig at amd.com"
> <christian.koenig@amd.com>, "nwatters at codeaurora.org"
> <nwatters@codeaurora.org>, "baolu.lu at linux.intel.com"
> <baolu.lu@linux.intel.com>, liguozhu at hisilicon.com,
> kenneth-lee-2012 at foxmail.com
> Subject: Re: [PATCH v2 03/40] iommu/sva: Manage process address spaces
> Message-ID: <20180525093959.000040a7@huawei.com>
>
> +CC Kenneth Lee
>
> On Fri, 25 May 2018 09:33:11 +0300
> Ilias Apalodimas <ilias.apalodimas@linaro.org> wrote:
>
> > On Thu, May 24, 2018 at 04:04:39PM +0100, Jean-Philippe Brucker wrote:
> > > On 24/05/18 12:50, Ilias Apalodimas wrote:
> > > >> Interesting, I hadn't thought about this use-case before. At first I
> > > >> thought you were talking about mdev devices assigned to VMs, but I think
> > > >> you're referring to mdevs assigned to userspace drivers instead? Out of
> > > >> curiosity, is it only theoretical or does someone actually need this?
> > > >
> > > > There has been some non upstreamed efforts to have mdev and produce userspace
> > > > drivers. Huawei is using it on what they call "wrapdrive" for crypto devices and
> > > > we did a proof of concept for ethernet interfaces. At the time we choose not to
> > > > involve the IOMMU for the reason you mentioned, but having it there would be
> > > > good.
> > >
> > > I'm guessing there were good reasons to do it that way but I wonder, is
> > > it not simpler to just have the kernel driver create a /dev/foo, with a
> > > standard ioctl/mmap/poll interface? Here VFIO adds a layer of
> > > indirection, and since the mediating driver has to implement these
> > > operations already, what is gained?
> > The best reason i can come up with is "common code". You already have one API
> > doing that for you so we replicate it in a /dev file?
> > The mdev approach still needs extentions to support what we tried to do (i.e
> > mdev bus might need yo have access on iommu_ops), but as far as i undestand it's
> > a possible case.
Hi, Jean, Please allow me to share my understanding here:
https://zhuanlan.zhihu.com/p/35489035
The reason we do not use the /dev/foo scheme is that the devices to be
shared are programmable accelerators. We cannot fix up the kernel driver for them.
> > >
> > > Thanks,
> > > Jean
>
>
--
-Kenneth Lee (Hisilicon)
^ permalink raw reply
* [PATCH v2] ARM: dts: imx51-zii-rdu1: Make sure SD1_WP is low
From: Andrey Smirnov @ 2018-05-26 2:12 UTC (permalink / raw)
To: linux-arm-kernel
Make sure that MX51_PAD_GPIO1_1 does not remain configure as
ALT0/SD1_WP (it is out of reset). This is needed because of external
pull-up resistor attached to that pad that, when left unchanged, will
drive SD1_WP high preventing eSDHC1/eMMC from working correctly.
To fix that add a pinmux configuration line configureing the pad to
function as a GPIO. While we are at it, add a corresponding
output-high GPIO hog in an effort to minimize current consumption.
Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-kernel at lists.infradead.org
Cc: devicetree at vger.kernel.org
Cc: linux-kernel at vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
Changes since [v1]:
- Switched GPIO hog to be output-high
- Removed whitespace damage
[v1] lkml.kernel.org/r/20180525030153.15986-1-andrew.smirnov at gmail.com
arch/arm/boot/dts/imx51-zii-rdu1.dts | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/imx51-zii-rdu1.dts b/arch/arm/boot/dts/imx51-zii-rdu1.dts
index df9eca94d812..1e343f35a9d9 100644
--- a/arch/arm/boot/dts/imx51-zii-rdu1.dts
+++ b/arch/arm/boot/dts/imx51-zii-rdu1.dts
@@ -476,6 +476,17 @@
status = "okay";
};
+&gpio1 {
+ unused-sd3-wp-gpio {
+ /*
+ * See pinctrl_esdhc1 below for more details on this
+ */
+ gpio-hog;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
+};
+
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
@@ -660,6 +671,23 @@
MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
+ /*
+ * GPIO1_1 is not directly used by eSDHC1 in
+ * any capacity, but earlier versions of RDU1
+ * used that pin as WP GPIO for eSDHC3 and
+ * because of that that pad has an external
+ * pull-up resistor. This is problematic
+ * because out of reset the pad is configured
+ * as ALT0 which serves as SD1_WP, which, when
+ * pulled high by and external pull-up, will
+ * inhibit execution of any write request to
+ * attached eMMC device.
+ *
+ * To avoid this problem we configure the pad
+ * to ALT1/GPIO and avoid driving SD1_WP
+ * signal high.
+ */
+ MX51_PAD_GPIO1_1__GPIO1_1 0x0000
>;
};
--
2.17.0
^ permalink raw reply related
* [PATCH v2 07/40] iommu: Add a page fault handler
From: Jacob Pan @ 2018-05-26 0:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <bdf9f221-ab97-2168-d072-b7f6a0dba840@arm.com>
On Thu, 24 May 2018 12:44:38 +0100
Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:
> On 23/05/18 00:35, Jacob Pan wrote:
> >>>> + /* Insert *before* the last fault */
> >>>> + list_move(&fault->head, &group->faults);
> >>>> + }
> >>>> +
> >>> If you already sorted the group list with last fault at the end,
> >>> why do you need a separate entry to track the last fault?
> >>
> >> Not sure I understand your question, sorry. Do you mean why the
> >> iopf_group.last_fault? Just to avoid one more kzalloc.
> >>
> > kind of :) what i thought was that why can't the last_fault
> > naturally be the last entry in your group fault list? then there is
> > no need for special treatment in terms of allocation of the last
> > fault. just my preference.
>
> But we need a kzalloc for the last fault anyway, so I thought I'd just
> piggy-back on the group allocation. And if I don't add the last fault
> at the end of group->faults, then it's iopf_handle_group that requires
> special treatment. I'm still not sure I understood your question
> though, could you send me a patch that does it?
>
> >>>> +
> >>>> + queue->flush(queue->flush_arg, dev);
> >>>> +
> >>>> + /*
> >>>> + * No need to clear the partial list. All PRGs
> >>>> containing the PASID that
> >>>> + * needs to be decommissioned are whole (the device
> >>>> driver made sure of
> >>>> + * it before this function was called). They have been
> >>>> submitted to the
> >>>> + * queue by the above flush().
> >>>> + */
> >>> So you are saying device driver need to make sure LPIG PRQ is
> >>> submitted in the flush call above such that partial list is
> >>> cleared?
> >>
> >> Not exactly, it's the IOMMU driver that makes sure all LPIG in its
> >> queues are submitted by the above flush call. In more details the
> >> flow is:
> >>
> >> * Either device driver calls unbind()/sva_device_shutdown(), or the
> >> process exits.
> >> * If the device driver called, then it already told the device to
> >> stop using the PASID. Otherwise we use the mm_exit() callback to
> >> tell the device driver to stop using the PASID.
Sorry I still need more clarification. For the PASID termination
initiated by vfio unbind, I don't see device driver given a chance to
stop PASID. Seems just call __iommu_sva_unbind_device() which already
assume device stopped issuing DMA with the PASID.
So it is the vfio unbind caller responsible for doing driver callback
to stop DMA on a given PASID?
> >> * In either case, when receiving a stop request from the driver,
> >> the device sends the LPIGs to the IOMMU queue.
> >> * Then, the flush call above ensures that the IOMMU reports the
> >> LPIG with iommu_report_device_fault.
> >> * While submitting all LPIGs for this PASID to the work queue,
> >> ipof_queue_fault also picked up all partial faults, so the partial
> >> list is clean.
> >>
> >> Maybe I should improve this comment?
> >>
> > thanks for explaining. LPIG submission is done by device
> > asynchronously w.r.t. driver stopping/decommission PASID.
>
> Hmm, it should really be synchronous, otherwise there is no way to
> know when the PASID can be decommissioned. We need a guarantee such
> as the one in 6.20.1 of the PCIe spec, "Managing PASID TLP Prefix
> Usage":
>
> "When the stop request mechanism indicates completion, the Function
> has:
> * Completed all Non-Posted Requests associated with this PASID.
> * Flushed to the host all Posted Requests addressing host memory in
> all TCs that were used by the PASID."
>
> That's in combination with "The function shall [...] finish
> transmitting any multi-page Page Request Messages for this PASID
> (i.e. send the Page Request Message with the L bit Set)." from the
> ATS spec.
>
I am not contesting on the device side, what I meant was from the
host IOMMU driver perspective, LPIG is received via IOMMU host queue,
therefore asynchronous. Not sure about ARM, but on VT-d LPIG submission
could meet queue full condition. So per VT-d spec, iommu will generate a
successful auto response to the device. At this point, assume we
already stopped the given PASID on the device, there might not be
another LPIG sent for the device. Therefore, you could have a partial
list. I think we can just drop the requests in the partial list for
that PASID until the PASID gets re-allocated.
> (If I remember correctly a PRI Page Request is a Posted Request.) Only
> after this stop request completes can the driver call unbind(), or
> return from exit_mm(). Then we know that if there was a LPIG for that
> PASID, it is in the IOMMU's PRI queue (or already completed) once we
> call flush().
>
agreed.
> > so if we were to use this
> > flow on vt-d, which does not stall page request queue, then we
> > should use the iommu model specific flush() callback to ensure LPIG
> > is received? There could be queue full condition and retry. I am
> > just trying to understand how and where we can make sure LPIG is
> > received and all groups are whole.
>
> For SMMU in patch 30, the flush() callback waits until the PRI queue
> is empty or, when the PRI thread is running in parallel, until the
> thread has done a full circle (handled as many faults as the queue
> size). It's really unpleasant to implement because the flush()
> callback takes a lock to inspect the hardware state, but I don't
> think we have a choice.
>
yes, vt-d has similar situation in page request queue. one option is to
track queue head (SW update) to make sure one complete cycle when queue
tail(HW update) crosses. Or we(suggested by Ashok Raj) can take a
snapshot of the entire queue and process (drops PRQs belong to the
terminated PASID) without holding the queue.
Thanks,
Jacob
^ permalink raw reply
* [PATCH] perf tools: Fix indexing for decoder packet queue
From: Mathieu Poirier @ 2018-05-25 23:10 UTC (permalink / raw)
To: linux-arm-kernel
The tail of a queue is supposed to be pointing to the next available slot
in a queue. In this implementation the tail is incremented before it is
used and as such points to the last used element, something that has the
immense advantage of centralizing tail management at a single location
and eliminating a lot of redundant code.
But this needs to be taken into consideration on the dequeueing side where
the head also needs to be incremented before it is used, or the first
available element of the queue will be skipped.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
index c8b98fa22997..4d5fc374e730 100644
--- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
+++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
@@ -96,11 +96,19 @@ int cs_etm_decoder__get_packet(struct cs_etm_decoder *decoder,
/* Nothing to do, might as well just return */
if (decoder->packet_count == 0)
return 0;
+ /*
+ * The queueing process in function cs_etm_decoder__buffer_packet()
+ * increments the tail *before* using it. This is somewhat counter
+ * intuitive but it has the advantage of centralizing tail management
+ * at a single location. Because of that we need to follow the same
+ * heuristic with the head, i.e we increment it before using its
+ * value. Otherwise the first element of the packet queue is not
+ * used.
+ */
+ decoder->head = (decoder->head + 1) & (MAX_BUFFER - 1);
*packet = decoder->packet_buffer[decoder->head];
- decoder->head = (decoder->head + 1) & (MAX_BUFFER - 1);
-
decoder->packet_count--;
return 1;
--
2.7.4
^ permalink raw reply related
* [GIT PULL] ARM: at91: DT for 4.18
From: Alexandre Belloni @ 2018-05-25 22:50 UTC (permalink / raw)
To: linux-arm-kernel
Arnd, Olof,
I'm a bit late for this very small PR, as I had to extend the expiration
date for my GPG signature key.
Two small DT changes that have no functional impact.
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git tags/at91-ab-4.18-dt
for you to fetch changes up to a642693882ce417683012a211ca9d6e65bae1dc4:
ARM: dts: at91-sama5d2_xplained: Use IRQ_TYPE specifier (2018-05-14 15:29:52 +0200)
----------------------------------------------------------------
AT91 DT for 4.18:
- small DT improvements without functional changes
----------------------------------------------------------------
Dmitry Torokhov (1):
ARM: dts: at91: sama5d4ek: use canonical compatible for touchscreen
Hern?n Gonzalez (1):
ARM: dts: at91-sama5d2_xplained: Use IRQ_TYPE specifier
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 +-
arch/arm/boot/dts/at91-sama5d4ek.dts | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
--
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* [PATCH] arm64: dts: msm8916: fix Coresight ETF graph connections
From: Andy Gross @ 2018-05-25 22:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANLsYkz9tAH7mazz2LNCtoYsdH4f5bKfGWEnJHsgH0mK6vNMEg@mail.gmail.com>
On Thu, May 24, 2018 at 10:32:46AM -0600, Mathieu Poirier wrote:
<snip>
> >
> > Hi Rob,
> >
> > I no longer have access to this hardware and documentation.
> > I am sure that Mathieu and friends will take care for verification
> > of this patch :-)
>
> The code triggers on the "slave-mode" property rather than the labels,
> so this patch has no effect on how a path is established. I've tested
> this on a 410c and things look good.
>
> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Thanks for verifying this Matthew. I'll put this in for a fixes as I just sent
out my last set for 4.18.
Regards,
Andy
^ permalink raw reply
* [GIT PULL] Qualcomm Driver Fixes for 4.17-rc7
From: Andy Gross @ 2018-05-25 22:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180525220124.f3tv2bpkb54rga53@localhost>
On Fri, May 25, 2018 at 03:01:24PM -0700, Olof Johansson wrote:
> On Thu, May 24, 2018 at 10:55:09PM -0500, Andy Gross wrote:
> > The following changes since commit 771c577c23bac90597c685971d7297ea00f99d11:
> >
> > Linux 4.17-rc6 (2018-05-20 15:31:38 -0700)
>
> This is a newer -rc than I had for fixes, so I had to move forward. Feel
> free to use as old an rc as you can on these branches too.
Oops. I should have just used -rc1. Sorry for that.
Andy
^ permalink raw reply
* [GIT PULL] Qualcomm Device Tree updates for 4.18 - Part 2
From: Andy Gross @ 2018-05-25 22:41 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit 90ce62659994b87723ec6ba26815f9634c18e449:
ARM: dts: qcom-apq8064: use correct pci address for address translation (2018-05-14 15:22:28 -0500)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux.git tags/qcom-dts-for-4.18-2
for you to fetch changes up to 0e4c982096f873f893d0e7b59f5abb3ef234e667:
ARM: dts: ipq8074: Enable few peripherals for hk01 board (2018-05-25 15:40:21 -0500)
----------------------------------------------------------------
Qualcomm Device Tree Changes for v4.18 - Part 2
* Numerous updates for IPQ8074 and IPQ4019 based devices
* Add support for Sony Xperia Z1 Compact
----------------------------------------------------------------
Attila Sz?ll?si (1):
ARM: dts: qcom: msm8974: Add Sony Xperia Z1 Compact
Sricharan R (12):
ARM: dts: ipq4019: Add a default chosen node
ARM: dts: ipq4019: Add a few peripheral nodes
ARM: dts: ipq4019: Change the max opp frequency
ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi
ARM: dts: ipq4019: Add ipq4019-ap.dk04.1-c1 board file
ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk04.1-c3 board file
ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common data
ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c1 board file
ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2 board file
ARM: dts: ipq8074: Add peripheral nodes
ARM: dts: ipq8074: Add pcie nodes
ARM: dts: ipq8074: Enable few peripherals for hk01 board
arch/arm/boot/dts/Makefile | 5 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 10 +-
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts | 19 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts | 9 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 111 ++++++
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts | 64 +++
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts | 25 ++
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi | 75 ++++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 162 +++++++-
.../boot/dts/qcom-msm8974-sony-xperia-amami.dts | 436 +++++++++++++++++++++
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 62 ++-
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 313 ++++++++++++++-
12 files changed, 1264 insertions(+), 27 deletions(-)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
create mode 100644 arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dts
^ permalink raw reply
* [GIT PULL] Qualcomm ARM64 DT updates for 4.18 - Part 2
From: Andy Gross @ 2018-05-25 22:41 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit 57fc67ef0d35af11fbb1b928e359b370889994ae:
arm64: dts: qcom: msm8996: Add ufs related nodes (2018-05-22 23:29:03 -0500)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux.git tags/qcom-arm64-for-4.18-2
for you to fetch changes up to d8f8d467f53a192041193fc17176ceb013f4d041:
arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator (2018-05-25 16:21:05 -0500)
----------------------------------------------------------------
Qualcomm ARM64 Updates for v4.18 Part 2
* Fix UFS GDSC on msm8996
* Remove unused BT node regulator
* Correct WLAN PCIe regulator endpoint name
----------------------------------------------------------------
Bjorn Andersson (1):
arm64: dts: qcom: msm8996: Use UFS_GDSC for UFS
Niklas Cassel (1):
arm64: dts: fix regulator property name for wlan pcie endpoint
Thierry Escande (1):
arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator
arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi | 2 +-
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 16 +---------------
arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++--
3 files changed, 4 insertions(+), 18 deletions(-)
^ permalink raw reply
* [GIT PULL] Qualcomm ARM64 Defconfig updates for 4.18
From: Andy Gross @ 2018-05-25 22:34 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux.git tags/qcom-arm64-defconfig-for-4.18
for you to fetch changes up to b741377f1ff72a17e3b06e4b506b13f5c6158b1c:
arm64: defconfig: Enable PCIe on msm8996 and db820c (2018-05-25 15:49:12 -0500)
----------------------------------------------------------------
Qualcomm ARM64 Based defconfig Updates for v4.18
* Enable UFS and PCIe for Qualcomm msm8996/db820c
----------------------------------------------------------------
Bjorn Andersson (2):
arm64: defconfig: Enable UFS on msm8996
arm64: defconfig: Enable PCIe on msm8996 and db820c
arch/arm64/configs/defconfig | 10 ++++++++++
1 file changed, 10 insertions(+)
^ permalink raw reply
* [PATCH V2] PCI/portdrv: do not disable device on reboot/shutdown
From: okaya at codeaurora.org @ 2018-05-25 22:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180525221024.GC92995@bhelgaas-glaptop.roam.corp.google.com>
On 2018-05-25 15:10, Bjorn Helgaas wrote:
> On Fri, May 25, 2018 at 09:30:59AM -0400, Sinan Kaya wrote:
>> On 5/24/2018 2:35 PM, Bjorn Helgaas wrote:
>> > That sounds like a reasonable idea, and it is definitely another can
>> > of worms. I looked briefly at some of the .shutdown() cases:
>>
>> should we throw it into 4.18 and see what happens?
>
> It wouldn't solve this particular problem because hpsa *does* have a
> .shutdown() method. The problem is that it doesn't work -- it's
> supposed to stop DMA and interrupts but it apparently doesn't.
>
> I think we need to fix hpsa first.
Absolutely, the othet patch is a parallel issue.
^ permalink raw reply
* [GIT PULL] Qualcomm Driver updates for 4.18 - RESEND
From: Andy Gross @ 2018-05-25 22:33 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux.git tags/qcom-drivers-for-4.18
for you to fetch changes up to 6d361c1db7b69fddf5748cf212169ab57bb13a6e:
soc: qcom: smem: introduce qcom_smem_virt_to_phys() (2018-05-25 15:53:59 -0500)
----------------------------------------------------------------
Qualcomm ARM Based Driver Updates for v4.18
* Various SMEM updates/fixes
* Add qcom_smem_virt_to_phys SMEM API
* Update MAINTAINERS to include qcom_scm pattern
* Add Qualcomm Command DB driver
* Add Qualcomm SCM compatible for IPQ4019
* Add MSM8998 to smd-rpm compatible list
* Add Qualcomm GENI based QUP wrapper
* Fix Qualcomm QMI buffer sizing bug
----------------------------------------------------------------
Alex Elder (8):
soc: qcom: smem: fix first cache entry calculation
soc: qcom: smem: return proper type for cached entry functions
soc: qcom: smem: byte swap values properly
soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private()
soc: qcom: smem: fix qcom_smem_set_global_partition()
soc: qcom: smem: check sooner in qcom_smem_set_global_partition()
soc: qcom: qmi: fix a buffer sizing bug
soc: qcom: smem: introduce qcom_smem_virt_to_phys()
Bjorn Andersson (1):
soc: qcom: smd-rpm: Add msm8998 compatible
Guenter Roeck (1):
soc: Unconditionally include qcom Makefile
Karthikeyan Ramasubramanian (1):
soc: qcom: Add GENI based QUP Wrapper driver
Mahesh Sivasubramanian (1):
drivers: qcom: add command DB driver
Niklas Cassel (1):
MAINTAINERS: Update pattern for qcom_scm
Sricharan R (1):
firmware: qcom: scm: Add ipq4019 soc compatible
Stephen Boyd (1):
soc: qcom: cmd-db: Make endian-agnostic
.../devicetree/bindings/firmware/qcom,scm.txt | 3 +-
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 1 +
MAINTAINERS | 2 +-
drivers/firmware/qcom_scm.c | 3 +
drivers/of/platform.c | 1 +
drivers/soc/Makefile | 2 +-
drivers/soc/qcom/Kconfig | 18 +
drivers/soc/qcom/Makefile | 2 +
drivers/soc/qcom/cmd-db.c | 317 +++++++++
drivers/soc/qcom/qcom-geni-se.c | 748 +++++++++++++++++++++
drivers/soc/qcom/qmi_interface.c | 5 +-
drivers/soc/qcom/smd-rpm.c | 1 +
drivers/soc/qcom/smem.c | 77 ++-
include/linux/qcom-geni-se.h | 425 ++++++++++++
include/linux/soc/qcom/smem.h | 2 +
include/soc/qcom/cmd-db.h | 45 ++
16 files changed, 1625 insertions(+), 27 deletions(-)
create mode 100644 drivers/soc/qcom/cmd-db.c
create mode 100644 drivers/soc/qcom/qcom-geni-se.c
create mode 100644 include/linux/qcom-geni-se.h
create mode 100644 include/soc/qcom/cmd-db.h
^ permalink raw reply
* [PATCH 2/2] arm64: dts: Add the rtc enable clock for watchdog
From: Olof Johansson @ 2018-05-25 22:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <bc450ea82fe7fbec7e7f74c5cdc8a37d202fe526.1523846102.git.baolin.wang@linaro.org>
On Mon, Apr 16, 2018 at 10:40:04AM +0800, Baolin Wang wrote:
> Add the rtc enable clock for watchdog controller to make it work well.
>
> Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
APplied with "sprd: whale2:" added to the patch subject.
-Olof
^ permalink raw reply
* [PATCH 1/2] arm64: dts: Add GPIO and GPIO keys device nodes
From: Olof Johansson @ 2018-05-25 22:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <fcea1874b6e3d0243684c133c7b34f2384341a32.1523846102.git.baolin.wang@linaro.org>
On Mon, Apr 16, 2018 at 10:40:03AM +0800, Baolin Wang wrote:
> This patch adds device nodes to enable one GPIO controller located on
> digital chip, 2 EIC (external interrupt controller) controllers loacted
> on PMIC and digital chip for Spreadtrum SC9860 platform.
>
> Moreover this patch adds 3 GPIO keys relied on EIC controller to support
> power key and volume up/down keys.
>
> Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Applied with "sprd:" added to the subject.
-Olof
^ permalink raw reply
* [GIT PULL v3] arm64: defconfig: hisilicon config updates for v4.18
From: Olof Johansson @ 2018-05-25 22:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5B083857.6040401@hisilicon.com>
On Fri, May 25, 2018 at 05:22:47PM +0100, Wei Xu wrote:
> Hi Olof, Hi Arnd,
>
> Please help to pull the following changes.
> Thanks!
>
> Best Regards,
> Wei
>
> ---
>
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the Git repository at:
>
> git://github.com/hisilicon/linux-hisi.git tags/hisi-defconfig-for-4.18v3
>
> for you to fetch changes up to 30480a849820d728c409e90bd6715d11f4071416:
>
> arm64: defconfig: Enable HISILICON_LPC (2018-05-25 16:58:51 +0100)
>
> ----------------------------------------------------------------
> ARM64: hisilicon: defconfig updates for 4.18
>
> - Enable the support of ethernet, eMMC, Combo/INNO phy
> and PCIe for Hi3798CV200
> - Enable the LPC for hip06 and hip07
>
> ----------------------------------------------------------------
> John Garry (1):
> arm64: defconfig: Enable HISILICON_LPC
>
> Shawn Guo (1):
> arm64: defconfig: enable drivers for Poplar support
Merged, thanks!
-Olof
^ permalink raw reply
* [PATCH 1/2] ARM: stm32: Don't select DMA unconditionally on STM32MP157C
From: Olof Johansson @ 2018-05-25 22:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180525160926.150713-1-arnd@arndb.de>
On Fri, May 25, 2018 at 06:09:13PM +0200, Arnd Bergmann wrote:
> The patch that enabled these had no useful changelog that explains
> why it is done, and it causes a build warning:
>
> WARNING: unmet direct dependencies detected for STM32_DMA
> Depends on [n]: DMADEVICES [=n] && (ARCH_STM32 [=y] || COMPILE_TEST [=y])
> Selected by [y]:
> - MACH_STM32MP157 [=y] && ARCH_STM32 [=y] && ARCH_MULTI_V7 [=y]
>
> Generally, platforms should not select arbitrary drivers, so let's
> just revert that change.
>
> Fixes: de6037fa207f ("ARM: stm32: Select DMA, DMAMUX and MDMA support on STM32MP157C")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Applied to next/soc now.
-Olof
^ permalink raw reply
* [GIT PULL] late omap soc changes for v4.18 merge window
From: Olof Johansson @ 2018-05-25 22:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <pull-1527259829-686604@atomide.com>
On Fri, May 25, 2018 at 07:51:20AM -0700, Tony Lindgren wrote:
> From: "Tony Lindgren" <tony@atomide.com>
>
> The following changes since commit 3bb3799cd4233b7c24622ae8c41455fb27a55c0f:
>
> Merge branch 'omap-for-v4.18/soc-fixes' into omap-for-v4.18/soc (2018-05-21 10:34:17 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v4.18/soc-late-signed
>
> for you to fetch changes up to 759c27bdc77577aaecb6f31768e5951a858f97a9:
>
> OMAP: CLK: CLKSRC: Add suspend resume hooks (2018-05-23 14:16:26 -0700)
>
> ----------------------------------------------------------------
> Late omap soc changes for v4.18 merge window
>
> This series contains two omap1 ams-delta GPIO clean-up patches to get
> started with removal of hard-coded GPIO numbers from drivers. And then
> the removal of board mach includes from drivers. The second patch mostly
> touches the ams-delta audio driver but is included here because of the
> removal of the latch gpios and is acked by Mark Brown.
>
> And there are two more am437x related PM patches to save and restore
> control module and timer registers for RTC only suspend mode. Looks like
> the patch title for the timer changes is a bit misleading, not all the
> timer code is yet living under drivers/clocksource. But I had already
> pushed out the branch before I noticed this.
Merged, thanks!
-Olof
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