* [PATCH v4 4/8] PCI: Replace dev_node parameter of of_pci_get_host_bridge_resources with device
From: Bjorn Helgaas @ 2018-05-29 13:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <eb9b477a-33c9-db45-9e62-101e3606e8ff@siemens.com>
On Mon, May 28, 2018 at 12:46:35PM +0200, Jan Kiszka wrote:
> On 2018-05-28 12:00, Vladimir Zapolskiy wrote:
> > Hi Jan, Bjorn,
> >
> > On 05/15/2018 12:07 PM, Jan Kiszka wrote:
> >> From: Jan Kiszka <jan.kiszka@siemens.com>
> >>
> >> Another step towards a managed version of
> >> of_pci_get_host_bridge_resources(): Feed in the underlying device,
> >> rather than just the OF node. This will allow to use managed resource
> >> allocation internally later on.
> >>
> >> CC: Jingoo Han <jingoohan1@gmail.com>
> >> CC: Joao Pinto <Joao.Pinto@synopsys.com>
> >> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> >> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> >
> > [snip]
> >
> >> diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
> >> index a6af62e0256d..61802e55a00c 100644
> >> --- a/drivers/pci/host/pcie-altera.c
> >> +++ b/drivers/pci/host/pcie-altera.c
> >> @@ -488,11 +488,10 @@ static int altera_pcie_parse_request_of_pci_ranges(struct altera_pcie *pcie)
> >> {
> >> int err, res_valid = 0;
> >> struct device *dev = &pcie->pdev->dev;
> >> - struct device_node *np = dev->of_node;
> >> struct resource_entry *win;
> >>
> >> - err = of_pci_get_host_bridge_resources(np, 0, 0xff, &pcie->resources,
> >> - NULL);
> >> + err = of_pci_get_host_bridge_resources(dev, 0, 0xff
> >> + &pcie->resources, NULL);
> >> if (err)
> >> return err;
> >>
> >
> > In case if it is an undiscovered issue, a comma was mistakenly removed,
> > which will result it compilation error.
> >
> > The problem is also found in pci/next , see commit 88e3909aa125.
>
> Yes, that's known. We have a bisection breakage: The issue was fixed
> again by patch 6 in that series.
I updated 88e3909aa125 to fix the bisection issue. I'll rebuild
pci/next later today or tomorrow.
^ permalink raw reply
* [RFT v3 0/4] Perf script: Add python script for CoreSight trace disassembler
From: Arnaldo Carvalho de Melo @ 2018-05-29 13:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANLsYkzn5qyzjxMiCPQ1GxyNjhHJp-2H6Lds11HP9rG5xug0FA@mail.gmail.com>
Em Mon, May 28, 2018 at 03:53:42PM -0600, Mathieu Poirier escreveu:
> On 28 May 2018 at 14:03, Arnaldo Carvalho de Melo <acme@kernel.org> wrote:
> > Em Mon, May 28, 2018 at 04:44:59PM +0800, Leo Yan escreveu:
> >> This patch series is to support for using 'perf script' for CoreSight
> >> trace disassembler, for this purpose this patch series adds a new
> >> python script to parse CoreSight tracing event and use command 'objdump'
> >> for disassembled lines, finally this can generate readable program
> >> execution flow for reviewing tracing data.
> >>
> >> Patch 0001 is one fixing patch to generate samples for the start packet
> >> and exception packets.
> >>
> >> Patch 0002 is the prerequisite to add addr into sample dict, so this
> >> value can be used by python script to analyze instruction range.
> >>
> >> Patch 0003 is to add python script for trace disassembler.
> >>
> >> Patch 0004 is to add doc to explain python script usage and give
> >> example for it.
> >>
> >> This patch series has been rebased on acme git tree [1] with the commit
> >> 19422a9f2a3b ("perf tools: Fix kernel_start for PTI on x86") and tested
> >> on Hikey (ARM64 octa CA53 cores).
> >
> > Thanks, applied to perf/core.
>
> Please hold off on that Arnaldo - I'm currently reviewing the set and
> I think some things can be improved.
Ok, I dropped all but the one adding sample->addr to the python
dictionary, that is ok to cherry pick.
- Arnaldo
^ permalink raw reply
* [PATCH v2 08/17] arm64: ssbd: Restore mitigation status on CPU resume
From: Mark Rutland @ 2018-05-29 13:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529121121.24927-9-marc.zyngier@arm.com>
On Tue, May 29, 2018 at 01:11:12PM +0100, Marc Zyngier wrote:
> On a system where firmware can dynamically change the state of the
> mitigation, the CPU will always come up with the mitigation enabled,
> including when coming back from suspend.
>
> If the user has requested "no mitigation" via a command line option,
> let's enforce it by calling into the firmware again to disable it.
>
> Similarily, for a resume from hibernate, the mitigation could have
> been disabled by the boot kernel. Let's ensure that it is set
> back on in that case.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
With teh fixup in swsusp_arch_suspend(), this looks good to me. FWIW:
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Mark.
> ---
> arch/arm64/include/asm/cpufeature.h | 6 ++++++
> arch/arm64/kernel/cpu_errata.c | 2 +-
> arch/arm64/kernel/hibernate.c | 11 +++++++++++
> arch/arm64/kernel/suspend.c | 8 ++++++++
> 4 files changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index b0fc3224ce8a..55bc1f073bfb 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -553,6 +553,12 @@ static inline int arm64_get_ssbd_state(void)
> #endif
> }
>
> +#ifdef CONFIG_ARM64_SSBD
> +void arm64_set_ssbd_mitigation(bool state);
> +#else
> +static inline void arm64_set_ssbd_mitigation(bool state) {}
> +#endif
> +
> #endif /* __ASSEMBLY__ */
>
> #endif
> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
> index 2fef634e6953..2b9a31a6a16a 100644
> --- a/arch/arm64/kernel/cpu_errata.c
> +++ b/arch/arm64/kernel/cpu_errata.c
> @@ -303,7 +303,7 @@ void __init arm64_enable_wa2_handling(struct alt_instr *alt,
> *updptr = cpu_to_le32(aarch64_insn_gen_nop());
> }
>
> -static void arm64_set_ssbd_mitigation(bool state)
> +void arm64_set_ssbd_mitigation(bool state)
> {
> switch (psci_ops.conduit) {
> case PSCI_CONDUIT_HVC:
> diff --git a/arch/arm64/kernel/hibernate.c b/arch/arm64/kernel/hibernate.c
> index 1ec5f28c39fc..6b2686d54411 100644
> --- a/arch/arm64/kernel/hibernate.c
> +++ b/arch/arm64/kernel/hibernate.c
> @@ -313,6 +313,17 @@ int swsusp_arch_suspend(void)
>
> sleep_cpu = -EINVAL;
> __cpu_suspend_exit();
> +
> + /*
> + * Just in case the boot kernel did turn the SSBD
> + * mitigation off behind our back, let's set the state
> + * to what we expect it to be.
> + */
> + switch (arm64_get_ssbd_state()) {
> + case ARM64_SSBD_FORCE_ENABLE:
> + case ARM64_SSBD_KERNEL:
> + arm64_set_ssbd_mitigation(true);
> + }
> }
>
> local_daif_restore(flags);
> diff --git a/arch/arm64/kernel/suspend.c b/arch/arm64/kernel/suspend.c
> index a307b9e13392..70c283368b64 100644
> --- a/arch/arm64/kernel/suspend.c
> +++ b/arch/arm64/kernel/suspend.c
> @@ -62,6 +62,14 @@ void notrace __cpu_suspend_exit(void)
> */
> if (hw_breakpoint_restore)
> hw_breakpoint_restore(cpu);
> +
> + /*
> + * On resume, firmware implementing dynamic mitigation will
> + * have turned the mitigation on. If the user has forcefully
> + * disabled it, make sure their wishes are obeyed.
> + */
> + if (arm64_get_ssbd_state() == ARM64_SSBD_FORCE_DISABLE)
> + arm64_set_ssbd_mitigation(false);
> }
>
> /*
> --
> 2.14.2
>
^ permalink raw reply
* [PATCH 1/3] arm64:add missing CONFIG_STRICT_KERNEL_RWX for mark_rodata_ro
From: nixiaoming @ 2018-05-29 13:36 UTC (permalink / raw)
To: linux-arm-kernel
mark_rodata_ro is only called by the function mark_readonly when
CONFIG_STRICT_KERNEL_RWX=y,
if CONFIG_STRICT_KERNEL_RWX is not set
a compile warning may be triggered: unused function
Signed-off-by: nixiaoming <nixiaoming@huawei.com>
---
arch/arm64/mm/mmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 2dbb2c9..849f326 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -491,6 +491,7 @@ static void __init map_mem(pgd_t *pgdp)
#endif
}
+#ifdef CONFIG_STRICT_KERNEL_RWX
void mark_rodata_ro(void)
{
unsigned long section_size;
@@ -505,6 +506,7 @@ void mark_rodata_ro(void)
debug_checkwx();
}
+#endif
static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end,
pgprot_t prot, struct vm_struct *vma,
--
2.10.1
^ permalink raw reply related
* [PATCH 2/3] x86:add missing CONFIG_STRICT_KERNEL_RWX for mark_rodata_ro
From: nixiaoming @ 2018-05-29 13:36 UTC (permalink / raw)
To: linux-arm-kernel
mark_rodata_ro is only called by the function mark_readonly
when CONFIG_STRICT_KERNEL_RWX=y
if CONFIG_STRICT_KERNEL_RWX is not set
a compile warning may be triggered: unused function
Signed-off-by: nixiaoming <nixiaoming@huawei.com>
---
arch/x86/mm/init_32.c | 2 ++
arch/x86/mm/init_64.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index c893c6a..121c567 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -920,6 +920,7 @@ static void mark_nxdata_nx(void)
set_pages_nx(virt_to_page(start), size >> PAGE_SHIFT);
}
+#ifdef CONFIG_STRICT_KERNEL_RWX
void mark_rodata_ro(void)
{
unsigned long start = PFN_ALIGN(_text);
@@ -957,3 +958,4 @@ void mark_rodata_ro(void)
if (__supported_pte_mask & _PAGE_NX)
debug_checkwx();
}
+#endif /*end of CONFIG_STRICT_KERNEL_RWX*/
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 0a40060..1b7a1a7 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -1245,6 +1245,7 @@ void set_kernel_text_ro(void)
set_memory_ro(start, (end - start) >> PAGE_SHIFT);
}
+#ifdef CONFIG_STRICT_KERNEL_RWX
void mark_rodata_ro(void)
{
unsigned long start = PFN_ALIGN(_text);
@@ -1298,6 +1299,7 @@ void mark_rodata_ro(void)
*/
pti_clone_kernel_text();
}
+#endif
int kern_addr_valid(unsigned long addr)
{
--
2.10.1
^ permalink raw reply related
* [PATCH 3/3] s390:add missing CONFIG_STRICT_KERNEL_RWX for mark_rodata_ro
From: nixiaoming @ 2018-05-29 13:36 UTC (permalink / raw)
To: linux-arm-kernel
mark_rodata_ro is only called by the function mark_readonly
when CONFIG_STRICT_KERNEL_RWX=y
if CONFIG_STRICT_KERNEL_RWX is not set
a compile warning may be triggered: unused function
Signed-off-by: nixiaoming <nixiaoming@huawei.com>
---
arch/s390/mm/init.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index 3fa3e53..a96fc3f 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -116,6 +116,7 @@ void __init paging_init(void)
free_area_init_nodes(max_zone_pfns);
}
+#ifdef CONFIG_STRICT_KERNEL_RWX
void mark_rodata_ro(void)
{
unsigned long size = __end_ro_after_init - __start_ro_after_init;
@@ -123,6 +124,7 @@ void mark_rodata_ro(void)
set_memory_ro((unsigned long)__start_ro_after_init, size >> PAGE_SHIFT);
pr_info("Write protected read-only-after-init data: %luk\n", size >> 10);
}
+#endif
void __init mem_init(void)
{
--
2.10.1
^ permalink raw reply related
* [PATCH v2 04/17] arm64: Add ARCH_WORKAROUND_2 probing
From: Suzuki K Poulose @ 2018-05-29 13:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529121121.24927-5-marc.zyngier@arm.com>
On 29/05/18 13:11, Marc Zyngier wrote:
> As for Spectre variant-2, we rely on SMCCC 1.1 to provide the
> discovery mechanism for detecting the SSBD mitigation.
>
> A new capability is also allocated for that purpose, and a
> config option.
>
> Reviewed-by: Julien Grall <julien.grall@arm.com>
> Reviewed-by: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
^ permalink raw reply
* [GIT PULL] ARM: mediatek fixes for v4.17
From: Matthias Brugger @ 2018-05-29 13:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <b32962c3-2ede-b352-959d-cb0c5244307f@gmail.com>
On 29/05/18 13:29, Matthias Brugger wrote:
> Hi Olof, hi Arnd,
>
> We observe boot issues on mt7622 with v4.17
> The following fix addresses this. Could you please merge this so that we have
> working v4.17 on the mt7622 :)
Just FYI, I sent the very same commit via v4.17-next-defconfig pull request, but
it would be good if it could go into v4.17 already so we don't have to wait
until it is merged thorough the stable process.
Regards,
Matthias
>
> Thanks a lot,
> Matthias
>
> ---
>
> The following changes since commit b04e217704b7f879c6b91222b066983a44a7a09f:
>
> Linux 4.17-rc7 (2018-05-27 13:01:47 -0700)
>
> are available in the Git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/
> tags/v4.17-next-fixes
>
> for you to fetch changes up to eac2e79a02a2c92c09600162d02167d8dfb63d66:
>
> arm64: defconfig: Enable CONFIG_PINCTRL_MT7622 by default (2018-05-29 13:19:49
> +0200)
>
> ----------------------------------------------------------------
> mt7622 enable pinctrl driver in defconfig to fix boot issue
>
> ----------------------------------------------------------------
> Sean Wang (1):
> arm64: defconfig: Enable CONFIG_PINCTRL_MT7622 by default
>
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
^ permalink raw reply
* [PATCH] ARM: DTS: imx53: Add support for imx53 HSC/DDC boards from K+P
From: Lukasz Majewski @ 2018-05-29 13:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOMZO5DoLwEmQz5BQHDLk8sBq7mDH_UxBjRA0RGKb+PunMYu-Q@mail.gmail.com>
Hi Fabio,
> Hi Lukasz,
>
> On Sat, May 19, 2018 at 9:02 AM, Lukasz Majewski <lukma@denx.de>
> wrote:
>
> > After removing imx53-kp-ddc and imx53-kp-common iomux subnodes I do
> > see following errors in the dmesg (v4.17-rc5):
> >
> > imx53-pinctrl 53fa8000.iomuxc: function 'iomuxc' not supported
> > imx53-pinctrl 53fa8000.iomuxc: invalid function iomuxc in map
> > table
>
> Could you please investigate this error?
Sorry for "small" delay on this.
Ok, so I've investigated the issue:
1. The code, which you pasted:
http://code.bulix.org/ik01yu-339697
works correctly as imx53-qsb-common.dtsi directly includes "imx53.dtsi"
in which iomuxc label is defined.
In my case though,
2. I do include imx53-tqma53.dtsi [1], in which the iomuxc" label
is extended:
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx53-tqma53 {
pinctrl_hog: hoggrp {
.......
};
The imx53-tqma53.dtsi then includes imx53.dtsi.
Moreover, my file -> imx53-kp.dtsi as it includes [1], it extends
further the &iomuxc label:
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_kp_common>;
imx53-kp-common {
pinctrl_buzzer: buzzergrp {
.......
};
So, when I remove imx53-kp-common I will have mismatch with [1] iomuxc
structure.
The code works as expected when I do remove imx53-tqma53 in [1].
However, I would prefer to not touch this imx53-tqma53.dtsi file.
It is also included in: imx53-mba53.dts, which extends iomux in
following way:
&iomuxc {
lvds1 {
pinctrl_lvds1_1: lvds1-grp1 {
Here I would need to remove lvds1, disp1 and tve to make it working.
However, it will not break during build, but at run time.
Considering the above, I would prefer to leave the code in [1] as is
and use imx53-kp-common as well (as in v2 of this patch).
Fabio, what do you think?
[I'm using linux 4.17-rc7 (with included dtc 1.4.6)]
>
> I have just tried the following change on a imx53-qsb:
> http://code.bulix.org/ik01yu-339697
>
> and it works as expected:
> # dmesg | grep iomux
> [ 0.100046] imx53-pinctrl 53fa8000.iomuxc: initialized IMX pinctrl
> driver
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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* [PATCH] rtc: sun6i: Fix bit_idx value for clk_register_gate
From: Maxime Ripard @ 2018-05-29 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180528075032.6769-1-jagan@amarulasolutions.com>
Hi,
On Mon, May 28, 2018 at 01:20:32PM +0530, Jagan Teki wrote:
> From: Michael Trimarchi <michael@amarulasolutions.com>
>
> clk-gate core will take bit_idx through clk_register_gate
> and then do clk_gate_ops by using BIT(bit_idx), but rtc-sun6i
> is passing bit_idx as BIT(bit_idx) it becomes BIT(BIT(bit_idx)
> which is wrong and eventually external gate clock is not enabling.
>
> This patch fixed by passing bit index and the original change
> introduced from below commit.
> "rtc: sun6i: Add support for the external oscillator gate"
> (sha1: 17ecd246414b3a0fe0cb248c86977a8bda465b7b)
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Cc'ing to stable and adding a Fixes tag would be great.
> ---
> drivers/rtc/rtc-sun6i.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
> index 2e6fb275acc8..a66f40c96582 100644
> --- a/drivers/rtc/rtc-sun6i.c
> +++ b/drivers/rtc/rtc-sun6i.c
> @@ -74,7 +74,7 @@
> #define SUN6I_ALARM_CONFIG_WAKEUP BIT(0)
>
> #define SUN6I_LOSC_OUT_GATING 0x0060
> -#define SUN6I_LOSC_OUT_GATING_EN BIT(0)
> +#define SUN6I_LOSC_OUT_GATING_EN 0
All the other register definitions in that driver are the actual value
needed, and not the offset. Just to make it obvious that it shouldn't
be used as is, please add an _OFFSET at the end of the defined name
Thanks!
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* [PATCH] soc: imx: gpcv2: correct PGC offset
From: Leonard Crestez @ 2018-05-29 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527580944-10043-1-git-send-email-Anson.Huang@nxp.com>
On Tue, 2018-05-29 at 16:02 +0800, Anson Huang wrote:
> Correct MIPI/PCIe/USB_HSIC's PGC offset based on
> design RTL, the value on Reference Manual are incorrect.
>
> The correct offset should be as below:
>
> -#define PGC_MIPI 4
> -#define PGC_PCIE 5
> -#define PGC_USB_HSIC 8
> +#define PGC_MIPI 16
> +#define PGC_PCIE 17
> +#define PGC_USB_HSIC 20
> #define GPC_PGC_CTRL(n) (0x800 + (n) * 0x40)
> #define GPC_PGC_SR(n) (GPC_PGC_CTRL(n) + 0xc)
This gpcv2 driver is currently only used for PCI, it probably only
works because domains happen to be turned on by default?
On imx7d upstream platform suspend is not yet supported but even doing
device-level suspend causes a hang on resume somewhere in PCI on first
read. This patch fixes that immediate hang.
After suspend/resume lspci is broken (device doesn't properly resume),
that probably requires more imx pci patches and unrelated to pgc.
--
Regards,
Leonard
^ permalink raw reply
* [PATCH] rtc: sun6i: Fix bit_idx value for clk_register_gate
From: Michael Nazzareno Trimarchi @ 2018-05-29 14:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529140219.auat656qcl5jdru7@flea.home>
Hi
On Tue, May 29, 2018 at 4:02 PM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> Hi,
>
> On Mon, May 28, 2018 at 01:20:32PM +0530, Jagan Teki wrote:
>> From: Michael Trimarchi <michael@amarulasolutions.com>
>>
>> clk-gate core will take bit_idx through clk_register_gate
>> and then do clk_gate_ops by using BIT(bit_idx), but rtc-sun6i
>> is passing bit_idx as BIT(bit_idx) it becomes BIT(BIT(bit_idx)
>> which is wrong and eventually external gate clock is not enabling.
>>
>> This patch fixed by passing bit index and the original change
>> introduced from below commit.
>> "rtc: sun6i: Add support for the external oscillator gate"
>> (sha1: 17ecd246414b3a0fe0cb248c86977a8bda465b7b)
>>
>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>
> Cc'ing to stable and adding a Fixes tag would be great.
>
>> ---
>> drivers/rtc/rtc-sun6i.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
>> index 2e6fb275acc8..a66f40c96582 100644
>> --- a/drivers/rtc/rtc-sun6i.c
>> +++ b/drivers/rtc/rtc-sun6i.c
>> @@ -74,7 +74,7 @@
>> #define SUN6I_ALARM_CONFIG_WAKEUP BIT(0)
>>
>> #define SUN6I_LOSC_OUT_GATING 0x0060
>> -#define SUN6I_LOSC_OUT_GATING_EN BIT(0)
>> +#define SUN6I_LOSC_OUT_GATING_EN 0
>
> All the other register definitions in that driver are the actual value
> needed, and not the offset. Just to make it obvious that it shouldn't
> be used as is, please add an _OFFSET at the end of the defined name
>
Make sense
Michael
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply
* [PATCH] ARM: DTS: imx53: Add support for imx53 HSC/DDC boards from K+P
From: Fabio Estevam @ 2018-05-29 14:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529155736.275e27b1@jawa>
Hi Lukasz,
On Tue, May 29, 2018 at 10:58 AM, Lukasz Majewski <lukma@denx.de> wrote:
> Sorry for "small" delay on this.
>
> Ok, so I've investigated the issue:
>
> 1. The code, which you pasted:
> http://code.bulix.org/ik01yu-339697
>
> works correctly as imx53-qsb-common.dtsi directly includes "imx53.dtsi"
> in which iomuxc label is defined.
>
> In my case though,
>
> 2. I do include imx53-tqma53.dtsi [1], in which the iomuxc" label
> is extended:
>
> &iomuxc {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_hog>;
>
> imx53-tqma53 {
> pinctrl_hog: hoggrp {
>
> .......
>
> };
>
> The imx53-tqma53.dtsi then includes imx53.dtsi.
>
> Moreover, my file -> imx53-kp.dtsi as it includes [1], it extends
> further the &iomuxc label:
>
> &iomuxc {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_kp_common>;
>
> imx53-kp-common {
> pinctrl_buzzer: buzzergrp {
> .......
> };
>
> So, when I remove imx53-kp-common I will have mismatch with [1] iomuxc
> structure.
>
> The code works as expected when I do remove imx53-tqma53 in [1].
>
> However, I would prefer to not touch this imx53-tqma53.dtsi file.
> It is also included in: imx53-mba53.dts, which extends iomux in
> following way:
>
> &iomuxc {
> lvds1 {
> pinctrl_lvds1_1: lvds1-grp1 {
>
>
> Here I would need to remove lvds1, disp1 and tve to make it working.
> However, it will not break during build, but at run time.
>
> Considering the above, I would prefer to leave the code in [1] as is
> and use imx53-kp-common as well (as in v2 of this patch).
>
> Fabio, what do you think?
Ok, thanks for the clarification. I just wanted to make sure we did
not have some kind of iomux bug there.
I think your proposed patch is fine then.
Thanks
^ permalink raw reply
* [PATCH] KVM: arm64: VHE: Migrate _elx sysreg accessors to msr_s/mrs_s
From: Dave Martin @ 2018-05-29 14:20 UTC (permalink / raw)
To: linux-arm-kernel
Currently, the {read,write}_sysreg_el*() accessors for accessing
particular ELs' sysregs in the presence of VHE rely on some local
hacks and define their system register encodings in a way that is
inconsistent with the core definitions in <asm/sysreg.h>.
As a result, it is necessary to add duplicate definitions for any
system register that already needs a definition in sysreg.h for
other reasons.
This is a bit of a maintenance headache, and the reasons for the
_el*() accessors working the way they do is a bit historical.
This patch gets rid of the shadow sysreg definitions in
<asm/kvm_hyp.h>, converts the _el*() accessors to use the core
msr_s/mrs_s interface, and converts all call sites to use the
standard sysreg #define names (i.e., upper case, with SYS_ prefix).
This patch will conflict heavily anyway, so the opportunity taken
to clean up some bad whitespace in the context of the changes is
taken.
The change exposes a few system registers that have no sysreg.h
definition, due to msr_s/mrs_s being used in place of msr/mrs:
additions are made in order to fill in the gaps.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Christoffer Dall <christoffer.dall@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
---
Build-tested only, for now, and diffed the disassembly of vmlinux build
with defconfig. Not proposed for v4.18.
I can keep this in my branch for now, but if someone is interested in
picking it up, let me know. Due to the potential for conflicts, it may
be useful to get it into next sooner rather than later, though it may
be a bit premature just now.
Reviewers may want to look closely at the new additions to sysreg.h
which is the one significant part of this patch that is not
straightforwardly automatable.
The motivation for this is adding SVE support to KVM, where I would
have to add shadow ZCR_ELx definitions in kvm_hyp.h, which seems a bit
gross.
Otherwise, most of the changes were done with something like the
following elisp:
(let (case-fold-search case-replace)
(goto-char (point-min))
(while (re-search-forward (concat
"\\(read_sysreg_[a-z0-9]*[[:blank:]]*(\\|"
"write_sysreg_[a-z0-9]*[[:blank:]]*([^\n,]*,[[:blank:]]*\\)"
"\\([a-z][^\n)]*\\)" )
nil t )
(upcase-region (match-beginning 2) (match-end 2))
(save-excursion (goto-char (match-beginning 2)) (insert "SYS_")) ) )
---
arch/arm64/include/asm/kvm_emulate.h | 8 ++--
arch/arm64/include/asm/kvm_hyp.h | 36 +++-----------
arch/arm64/include/asm/sysreg.h | 39 ++++++++++++++-
arch/arm64/kvm/hyp/switch.c | 24 +++++-----
arch/arm64/kvm/hyp/sysreg-sr.c | 78 +++++++++++++++---------------
arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c | 2 +-
arch/arm64/kvm/regmap.c | 4 +-
arch/arm64/kvm/sys_regs.c | 82 ++++++++++++++------------------
virt/kvm/arm/arch_timer.c | 12 ++---
9 files changed, 143 insertions(+), 142 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index 1dab3a9..1fedfef 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -99,7 +99,7 @@ static inline unsigned long *__vcpu_elr_el1(const struct kvm_vcpu *vcpu)
static inline unsigned long vcpu_read_elr_el1(const struct kvm_vcpu *vcpu)
{
if (vcpu->arch.sysregs_loaded_on_cpu)
- return read_sysreg_el1(elr);
+ return read_sysreg_el1(SYS_ELR);
else
return *__vcpu_elr_el1(vcpu);
}
@@ -107,7 +107,7 @@ static inline unsigned long vcpu_read_elr_el1(const struct kvm_vcpu *vcpu)
static inline void vcpu_write_elr_el1(const struct kvm_vcpu *vcpu, unsigned long v)
{
if (vcpu->arch.sysregs_loaded_on_cpu)
- write_sysreg_el1(v, elr);
+ write_sysreg_el1(v, SYS_ELR);
else
*__vcpu_elr_el1(vcpu) = v;
}
@@ -167,7 +167,7 @@ static inline unsigned long vcpu_read_spsr(const struct kvm_vcpu *vcpu)
return vcpu_read_spsr32(vcpu);
if (vcpu->arch.sysregs_loaded_on_cpu)
- return read_sysreg_el1(spsr);
+ return read_sysreg_el1(SYS_SPSR);
else
return vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1];
}
@@ -180,7 +180,7 @@ static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v)
}
if (vcpu->arch.sysregs_loaded_on_cpu)
- write_sysreg_el1(v, spsr);
+ write_sysreg_el1(v, SYS_SPSR);
else
vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1] = v;
}
diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h
index 384c343..ac54dbe 100644
--- a/arch/arm64/include/asm/kvm_hyp.h
+++ b/arch/arm64/include/asm/kvm_hyp.h
@@ -27,7 +27,7 @@
#define read_sysreg_elx(r,nvh,vh) \
({ \
u64 reg; \
- asm volatile(ALTERNATIVE("mrs %0, " __stringify(r##nvh),\
+ asm volatile(ALTERNATIVE("mrs_s %0, " __stringify(r##nvh),\
"mrs_s %0, " __stringify(r##vh),\
ARM64_HAS_VIRT_HOST_EXTN) \
: "=r" (reg)); \
@@ -37,7 +37,7 @@
#define write_sysreg_elx(v,r,nvh,vh) \
do { \
u64 __val = (u64)(v); \
- asm volatile(ALTERNATIVE("msr " __stringify(r##nvh) ", %x0",\
+ asm volatile(ALTERNATIVE("msr_s " __stringify(r##nvh) ", %x0",\
"msr_s " __stringify(r##vh) ", %x0",\
ARM64_HAS_VIRT_HOST_EXTN) \
: : "rZ" (__val)); \
@@ -51,8 +51,8 @@
#define read_sysreg_el2(r) \
({ \
u64 reg; \
- asm volatile(ALTERNATIVE("mrs %0, " __stringify(r##_EL2),\
- "mrs %0, " __stringify(r##_EL1),\
+ asm volatile(ALTERNATIVE("mrs_s %0, " __stringify(r##_EL2),\
+ "mrs_s %0, " __stringify(r##_EL1),\
ARM64_HAS_VIRT_HOST_EXTN) \
: "=r" (reg)); \
reg; \
@@ -61,8 +61,8 @@
#define write_sysreg_el2(v,r) \
do { \
u64 __val = (u64)(v); \
- asm volatile(ALTERNATIVE("msr " __stringify(r##_EL2) ", %x0",\
- "msr " __stringify(r##_EL1) ", %x0",\
+ asm volatile(ALTERNATIVE("msr_s " __stringify(r##_EL2) ", %x0",\
+ "msr_s " __stringify(r##_EL1) ", %x0",\
ARM64_HAS_VIRT_HOST_EXTN) \
: : "rZ" (__val)); \
} while (0)
@@ -72,30 +72,6 @@
#define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12)
#define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12)
-/* The VHE specific system registers and their encoding */
-#define sctlr_EL12 sys_reg(3, 5, 1, 0, 0)
-#define cpacr_EL12 sys_reg(3, 5, 1, 0, 2)
-#define ttbr0_EL12 sys_reg(3, 5, 2, 0, 0)
-#define ttbr1_EL12 sys_reg(3, 5, 2, 0, 1)
-#define tcr_EL12 sys_reg(3, 5, 2, 0, 2)
-#define afsr0_EL12 sys_reg(3, 5, 5, 1, 0)
-#define afsr1_EL12 sys_reg(3, 5, 5, 1, 1)
-#define esr_EL12 sys_reg(3, 5, 5, 2, 0)
-#define far_EL12 sys_reg(3, 5, 6, 0, 0)
-#define mair_EL12 sys_reg(3, 5, 10, 2, 0)
-#define amair_EL12 sys_reg(3, 5, 10, 3, 0)
-#define vbar_EL12 sys_reg(3, 5, 12, 0, 0)
-#define contextidr_EL12 sys_reg(3, 5, 13, 0, 1)
-#define cntkctl_EL12 sys_reg(3, 5, 14, 1, 0)
-#define cntp_tval_EL02 sys_reg(3, 5, 14, 2, 0)
-#define cntp_ctl_EL02 sys_reg(3, 5, 14, 2, 1)
-#define cntp_cval_EL02 sys_reg(3, 5, 14, 2, 2)
-#define cntv_tval_EL02 sys_reg(3, 5, 14, 3, 0)
-#define cntv_ctl_EL02 sys_reg(3, 5, 14, 3, 1)
-#define cntv_cval_EL02 sys_reg(3, 5, 14, 3, 2)
-#define spsr_EL12 sys_reg(3, 5, 4, 0, 0)
-#define elr_EL12 sys_reg(3, 5, 4, 0, 1)
-
/**
* hyp_alternate_select - Generates patchable code sequences that are
* used to switch between two implementations of a function, depending
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 6171178..74fc3ca 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -171,6 +171,9 @@
#define SYS_TTBR1_EL1 sys_reg(3, 0, 2, 0, 1)
#define SYS_TCR_EL1 sys_reg(3, 0, 2, 0, 2)
+#define SYS_SPSR_EL1 sys_reg(3, 0, 4, 0, 0)
+#define SYS_ELR_EL1 sys_reg(3, 0, 4, 0, 1)
+
#define SYS_ICC_PMR_EL1 sys_reg(3, 0, 4, 6, 0)
#define SYS_AFSR0_EL1 sys_reg(3, 0, 5, 1, 0)
@@ -359,22 +362,30 @@
#define SYS_CNTP_CTL_EL0 sys_reg(3, 3, 14, 2, 1)
#define SYS_CNTP_CVAL_EL0 sys_reg(3, 3, 14, 2, 2)
+#define SYS_CNTV_CTL_EL0 sys_reg(3, 3, 14, 3, 1)
+#define SYS_CNTV_CVAL_EL0 sys_reg(3, 3, 14, 3, 2)
+
#define __PMEV_op2(n) ((n) & 0x7)
#define __CNTR_CRm(n) (0x8 | (((n) >> 3) & 0x3))
#define SYS_PMEVCNTRn_EL0(n) sys_reg(3, 3, 14, __CNTR_CRm(n), __PMEV_op2(n))
#define __TYPER_CRm(n) (0xc | (((n) >> 3) & 0x3))
#define SYS_PMEVTYPERn_EL0(n) sys_reg(3, 3, 14, __TYPER_CRm(n), __PMEV_op2(n))
-#define SYS_PMCCFILTR_EL0 sys_reg (3, 3, 14, 15, 7)
+#define SYS_PMCCFILTR_EL0 sys_reg(3, 3, 14, 15, 7)
#define SYS_ZCR_EL2 sys_reg(3, 4, 1, 2, 0)
+#define SYS_SPSR_EL2 sys_reg(3, 4, 4, 0, 0)
+#define SYS_ELR_EL2 sys_reg(3, 4, 4, 0, 1)
+
#define SYS_DACR32_EL2 sys_reg(3, 4, 3, 0, 0)
#define SYS_IFSR32_EL2 sys_reg(3, 4, 5, 0, 1)
+#define SYS_ESR_EL2 sys_reg(3, 4, 5, 2, 0)
#define SYS_VSESR_EL2 sys_reg(3, 4, 5, 2, 3)
#define SYS_FPEXC32_EL2 sys_reg(3, 4, 5, 3, 0)
+#define SYS_FAR_EL2 sys_reg(3, 4, 6, 0, 0)
-#define SYS_VDISR_EL2 sys_reg(3, 4, 12, 1, 1)
+#define SYS_VDISR_EL2 sys_reg(3, 4, 12, 1, 1)
#define __SYS__AP0Rx_EL2(x) sys_reg(3, 4, 12, 8, x)
#define SYS_ICH_AP0R0_EL2 __SYS__AP0Rx_EL2(0)
#define SYS_ICH_AP0R1_EL2 __SYS__AP0Rx_EL2(1)
@@ -416,6 +427,30 @@
#define SYS_ICH_LR14_EL2 __SYS__LR8_EL2(6)
#define SYS_ICH_LR15_EL2 __SYS__LR8_EL2(7)
+/* VHE encodings for architectural EL0/1 system registers */
+#define SYS_SCTLR_EL12 sys_reg(3, 5, 1, 0, 0)
+#define SYS_CPACR_EL12 sys_reg(3, 5, 1, 0, 2)
+#define SYS_TTBR0_EL12 sys_reg(3, 5, 2, 0, 0)
+#define SYS_TTBR1_EL12 sys_reg(3, 5, 2, 0, 1)
+#define SYS_TCR_EL12 sys_reg(3, 5, 2, 0, 2)
+#define SYS_AFSR0_EL12 sys_reg(3, 5, 5, 1, 0)
+#define SYS_AFSR1_EL12 sys_reg(3, 5, 5, 1, 1)
+#define SYS_ESR_EL12 sys_reg(3, 5, 5, 2, 0)
+#define SYS_FAR_EL12 sys_reg(3, 5, 6, 0, 0)
+#define SYS_MAIR_EL12 sys_reg(3, 5, 10, 2, 0)
+#define SYS_AMAIR_EL12 sys_reg(3, 5, 10, 3, 0)
+#define SYS_VBAR_EL12 sys_reg(3, 5, 12, 0, 0)
+#define SYS_CONTEXTIDR_EL12 sys_reg(3, 5, 13, 0, 1)
+#define SYS_CNTKCTL_EL12 sys_reg(3, 5, 14, 1, 0)
+#define SYS_CNTP_TVAL_EL02 sys_reg(3, 5, 14, 2, 0)
+#define SYS_CNTP_CTL_EL02 sys_reg(3, 5, 14, 2, 1)
+#define SYS_CNTP_CVAL_EL02 sys_reg(3, 5, 14, 2, 2)
+#define SYS_CNTV_TVAL_EL02 sys_reg(3, 5, 14, 3, 0)
+#define SYS_CNTV_CTL_EL02 sys_reg(3, 5, 14, 3, 1)
+#define SYS_CNTV_CVAL_EL02 sys_reg(3, 5, 14, 3, 2)
+#define SYS_SPSR_EL12 sys_reg(3, 5, 4, 0, 0)
+#define SYS_ELR_EL12 sys_reg(3, 5, 4, 0, 1)
+
/* Common SCTLR_ELx flags. */
#define SCTLR_ELx_EE (1 << 25)
#define SCTLR_ELx_IESB (1 << 21)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 2d45bd7..143a008 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -275,7 +275,7 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu)
if (ec != ESR_ELx_EC_DABT_LOW && ec != ESR_ELx_EC_IABT_LOW)
return true;
- far = read_sysreg_el2(far);
+ far = read_sysreg_el2(SYS_FAR);
/*
* The HPFAR can be invalid if the stage 2 fault did not
@@ -307,17 +307,17 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu)
*/
static bool __hyp_text __skip_instr(struct kvm_vcpu *vcpu)
{
- *vcpu_pc(vcpu) = read_sysreg_el2(elr);
+ *vcpu_pc(vcpu) = read_sysreg_el2(SYS_ELR);
if (vcpu_mode_is_32bit(vcpu)) {
- vcpu->arch.ctxt.gp_regs.regs.pstate = read_sysreg_el2(spsr);
+ vcpu->arch.ctxt.gp_regs.regs.pstate = read_sysreg_el2(SYS_SPSR);
kvm_skip_instr32(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
- write_sysreg_el2(vcpu->arch.ctxt.gp_regs.regs.pstate, spsr);
+ write_sysreg_el2(vcpu->arch.ctxt.gp_regs.regs.pstate, SYS_SPSR);
} else {
*vcpu_pc(vcpu) += 4;
}
- write_sysreg_el2(*vcpu_pc(vcpu), elr);
+ write_sysreg_el2(*vcpu_pc(vcpu), SYS_ELR);
if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
vcpu->arch.fault.esr_el2 =
@@ -380,7 +380,7 @@ static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu)
static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
{
if (ARM_EXCEPTION_CODE(*exit_code) != ARM_EXCEPTION_IRQ)
- vcpu->arch.fault.esr_el2 = read_sysreg_el2(esr);
+ vcpu->arch.fault.esr_el2 = read_sysreg_el2(SYS_ESR);
/*
* We're using the raw exception code in order to only process
@@ -572,8 +572,8 @@ static void __hyp_text __hyp_call_panic_nvhe(u64 spsr, u64 elr, u64 par,
asm volatile("ldr %0, =__hyp_panic_string" : "=r" (str_va));
__hyp_do_panic(str_va,
- spsr, elr,
- read_sysreg(esr_el2), read_sysreg_el2(far),
+ spsr, elr,
+ read_sysreg(esr_el2), read_sysreg_el2(SYS_FAR),
read_sysreg(hpfar_el2), par, vcpu);
}
@@ -587,15 +587,15 @@ static void __hyp_call_panic_vhe(u64 spsr, u64 elr, u64 par,
sysreg_restore_host_state_vhe(host_ctxt);
panic(__hyp_panic_string,
- spsr, elr,
- read_sysreg_el2(esr), read_sysreg_el2(far),
+ spsr, elr,
+ read_sysreg_el2(SYS_ESR), read_sysreg_el2(SYS_FAR),
read_sysreg(hpfar_el2), par, vcpu);
}
void __hyp_text __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt)
{
- u64 spsr = read_sysreg_el2(spsr);
- u64 elr = read_sysreg_el2(elr);
+ u64 spsr = read_sysreg_el2(SYS_SPSR);
+ u64 elr = read_sysreg_el2(SYS_ELR);
u64 par = read_sysreg(par_el1);
if (!has_vhe())
diff --git a/arch/arm64/kvm/hyp/sysreg-sr.c b/arch/arm64/kvm/hyp/sysreg-sr.c
index 35bc168..08e34a1 100644
--- a/arch/arm64/kvm/hyp/sysreg-sr.c
+++ b/arch/arm64/kvm/hyp/sysreg-sr.c
@@ -54,33 +54,33 @@ static void __hyp_text __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)
{
ctxt->sys_regs[MPIDR_EL1] = read_sysreg(vmpidr_el2);
ctxt->sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1);
- ctxt->sys_regs[SCTLR_EL1] = read_sysreg_el1(sctlr);
+ ctxt->sys_regs[SCTLR_EL1] = read_sysreg_el1(SYS_SCTLR);
ctxt->sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1);
- ctxt->sys_regs[CPACR_EL1] = read_sysreg_el1(cpacr);
- ctxt->sys_regs[TTBR0_EL1] = read_sysreg_el1(ttbr0);
- ctxt->sys_regs[TTBR1_EL1] = read_sysreg_el1(ttbr1);
- ctxt->sys_regs[TCR_EL1] = read_sysreg_el1(tcr);
- ctxt->sys_regs[ESR_EL1] = read_sysreg_el1(esr);
- ctxt->sys_regs[AFSR0_EL1] = read_sysreg_el1(afsr0);
- ctxt->sys_regs[AFSR1_EL1] = read_sysreg_el1(afsr1);
- ctxt->sys_regs[FAR_EL1] = read_sysreg_el1(far);
- ctxt->sys_regs[MAIR_EL1] = read_sysreg_el1(mair);
- ctxt->sys_regs[VBAR_EL1] = read_sysreg_el1(vbar);
- ctxt->sys_regs[CONTEXTIDR_EL1] = read_sysreg_el1(contextidr);
- ctxt->sys_regs[AMAIR_EL1] = read_sysreg_el1(amair);
- ctxt->sys_regs[CNTKCTL_EL1] = read_sysreg_el1(cntkctl);
+ ctxt->sys_regs[CPACR_EL1] = read_sysreg_el1(SYS_CPACR);
+ ctxt->sys_regs[TTBR0_EL1] = read_sysreg_el1(SYS_TTBR0);
+ ctxt->sys_regs[TTBR1_EL1] = read_sysreg_el1(SYS_TTBR1);
+ ctxt->sys_regs[TCR_EL1] = read_sysreg_el1(SYS_TCR);
+ ctxt->sys_regs[ESR_EL1] = read_sysreg_el1(SYS_ESR);
+ ctxt->sys_regs[AFSR0_EL1] = read_sysreg_el1(SYS_AFSR0);
+ ctxt->sys_regs[AFSR1_EL1] = read_sysreg_el1(SYS_AFSR1);
+ ctxt->sys_regs[FAR_EL1] = read_sysreg_el1(SYS_FAR);
+ ctxt->sys_regs[MAIR_EL1] = read_sysreg_el1(SYS_MAIR);
+ ctxt->sys_regs[VBAR_EL1] = read_sysreg_el1(SYS_VBAR);
+ ctxt->sys_regs[CONTEXTIDR_EL1] = read_sysreg_el1(SYS_CONTEXTIDR);
+ ctxt->sys_regs[AMAIR_EL1] = read_sysreg_el1(SYS_AMAIR);
+ ctxt->sys_regs[CNTKCTL_EL1] = read_sysreg_el1(SYS_CNTKCTL);
ctxt->sys_regs[PAR_EL1] = read_sysreg(par_el1);
ctxt->sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1);
ctxt->gp_regs.sp_el1 = read_sysreg(sp_el1);
- ctxt->gp_regs.elr_el1 = read_sysreg_el1(elr);
- ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(spsr);
+ ctxt->gp_regs.elr_el1 = read_sysreg_el1(SYS_ELR);
+ ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(SYS_SPSR);
}
static void __hyp_text __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt)
{
- ctxt->gp_regs.regs.pc = read_sysreg_el2(elr);
- ctxt->gp_regs.regs.pstate = read_sysreg_el2(spsr);
+ ctxt->gp_regs.regs.pc = read_sysreg_el2(SYS_ELR);
+ ctxt->gp_regs.regs.pstate = read_sysreg_el2(SYS_SPSR);
if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
ctxt->sys_regs[DISR_EL1] = read_sysreg_s(SYS_VDISR_EL2);
@@ -118,42 +118,42 @@ static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctx
static void __hyp_text __sysreg_restore_user_state(struct kvm_cpu_context *ctxt)
{
- write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0);
- write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0);
+ write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0);
+ write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0);
}
static void __hyp_text __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt)
{
write_sysreg(ctxt->sys_regs[MPIDR_EL1], vmpidr_el2);
write_sysreg(ctxt->sys_regs[CSSELR_EL1], csselr_el1);
- write_sysreg_el1(ctxt->sys_regs[SCTLR_EL1], sctlr);
- write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1);
- write_sysreg_el1(ctxt->sys_regs[CPACR_EL1], cpacr);
- write_sysreg_el1(ctxt->sys_regs[TTBR0_EL1], ttbr0);
- write_sysreg_el1(ctxt->sys_regs[TTBR1_EL1], ttbr1);
- write_sysreg_el1(ctxt->sys_regs[TCR_EL1], tcr);
- write_sysreg_el1(ctxt->sys_regs[ESR_EL1], esr);
- write_sysreg_el1(ctxt->sys_regs[AFSR0_EL1], afsr0);
- write_sysreg_el1(ctxt->sys_regs[AFSR1_EL1], afsr1);
- write_sysreg_el1(ctxt->sys_regs[FAR_EL1], far);
- write_sysreg_el1(ctxt->sys_regs[MAIR_EL1], mair);
- write_sysreg_el1(ctxt->sys_regs[VBAR_EL1], vbar);
- write_sysreg_el1(ctxt->sys_regs[CONTEXTIDR_EL1],contextidr);
- write_sysreg_el1(ctxt->sys_regs[AMAIR_EL1], amair);
- write_sysreg_el1(ctxt->sys_regs[CNTKCTL_EL1], cntkctl);
+ write_sysreg_el1(ctxt->sys_regs[SCTLR_EL1], SYS_SCTLR);
+ write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1);
+ write_sysreg_el1(ctxt->sys_regs[CPACR_EL1], SYS_CPACR);
+ write_sysreg_el1(ctxt->sys_regs[TTBR0_EL1], SYS_TTBR0);
+ write_sysreg_el1(ctxt->sys_regs[TTBR1_EL1], SYS_TTBR1);
+ write_sysreg_el1(ctxt->sys_regs[TCR_EL1], SYS_TCR);
+ write_sysreg_el1(ctxt->sys_regs[ESR_EL1], SYS_ESR);
+ write_sysreg_el1(ctxt->sys_regs[AFSR0_EL1], SYS_AFSR0);
+ write_sysreg_el1(ctxt->sys_regs[AFSR1_EL1], SYS_AFSR1);
+ write_sysreg_el1(ctxt->sys_regs[FAR_EL1], SYS_FAR);
+ write_sysreg_el1(ctxt->sys_regs[MAIR_EL1], SYS_MAIR);
+ write_sysreg_el1(ctxt->sys_regs[VBAR_EL1], SYS_VBAR);
+ write_sysreg_el1(ctxt->sys_regs[CONTEXTIDR_EL1],SYS_CONTEXTIDR);
+ write_sysreg_el1(ctxt->sys_regs[AMAIR_EL1], SYS_AMAIR);
+ write_sysreg_el1(ctxt->sys_regs[CNTKCTL_EL1], SYS_CNTKCTL);
write_sysreg(ctxt->sys_regs[PAR_EL1], par_el1);
write_sysreg(ctxt->sys_regs[TPIDR_EL1], tpidr_el1);
write_sysreg(ctxt->gp_regs.sp_el1, sp_el1);
- write_sysreg_el1(ctxt->gp_regs.elr_el1, elr);
- write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],spsr);
+ write_sysreg_el1(ctxt->gp_regs.elr_el1, SYS_ELR);
+ write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],SYS_SPSR);
}
static void __hyp_text
__sysreg_restore_el2_return_state(struct kvm_cpu_context *ctxt)
{
- write_sysreg_el2(ctxt->gp_regs.regs.pc, elr);
- write_sysreg_el2(ctxt->gp_regs.regs.pstate, spsr);
+ write_sysreg_el2(ctxt->gp_regs.regs.pc, SYS_ELR);
+ write_sysreg_el2(ctxt->gp_regs.regs.pstate, SYS_SPSR);
if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
write_sysreg_s(ctxt->sys_regs[DISR_EL1], SYS_VDISR_EL2);
diff --git a/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c b/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c
index 39be799..55f3724 100644
--- a/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c
+++ b/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c
@@ -27,7 +27,7 @@
static bool __hyp_text __is_be(struct kvm_vcpu *vcpu)
{
if (vcpu_mode_is_32bit(vcpu))
- return !!(read_sysreg_el2(spsr) & COMPAT_PSR_E_BIT);
+ return !!(read_sysreg_el2(SYS_SPSR) & COMPAT_PSR_E_BIT);
return !!(read_sysreg(SCTLR_EL1) & SCTLR_ELx_EE);
}
diff --git a/arch/arm64/kvm/regmap.c b/arch/arm64/kvm/regmap.c
index eefe403..6a295eb 100644
--- a/arch/arm64/kvm/regmap.c
+++ b/arch/arm64/kvm/regmap.c
@@ -163,7 +163,7 @@ unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu)
switch (spsr_idx) {
case KVM_SPSR_SVC:
- return read_sysreg_el1(spsr);
+ return read_sysreg_el1(SYS_SPSR);
case KVM_SPSR_ABT:
return read_sysreg(spsr_abt);
case KVM_SPSR_UND:
@@ -188,7 +188,7 @@ void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v)
switch (spsr_idx) {
case KVM_SPSR_SVC:
- write_sysreg_el1(v, spsr);
+ write_sysreg_el1(v, SYS_SPSR);
case KVM_SPSR_ABT:
write_sysreg(v, spsr_abt);
case KVM_SPSR_UND:
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index a436373..2a16999 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -76,6 +76,31 @@ static bool write_to_read_only(struct kvm_vcpu *vcpu,
return false;
}
+#define DO_SYSREGS(macro) \
+ macro(CSSELR, 1, 1) \
+ macro(SCTLR, 1, 12) \
+ macro(ACTLR, 1, 1) \
+ macro(CPACR, 1, 12) \
+ macro(TTBR0, 1, 12) \
+ macro(TTBR1, 1, 12) \
+ macro(TCR, 1, 12) \
+ macro(ESR, 1, 12) \
+ macro(AFSR0, 1, 12) \
+ macro(AFSR1, 1, 12) \
+ macro(FAR, 1, 12) \
+ macro(MAIR, 1, 12) \
+ macro(VBAR, 1, 12) \
+ macro(CONTEXTIDR, 1, 12) \
+ macro(TPIDR, 0, 0) \
+ macro(TPIDRRO, 0, 0) \
+ macro(TPIDR, 1, 1) \
+ macro(AMAIR, 1, 12) \
+ macro(CNTKCTL, 1, 12) \
+ macro(PAR, 1, 1) \
+ macro(DACR32, 2, 2) \
+ macro(IFSR32, 2, 2) \
+ macro(DBGVCR32, 2, 2)
+
u64 vcpu_read_sys_reg(struct kvm_vcpu *vcpu, int reg)
{
if (!vcpu->arch.sysregs_loaded_on_cpu)
@@ -90,30 +115,12 @@ u64 vcpu_read_sys_reg(struct kvm_vcpu *vcpu, int reg)
* own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's
* thread when emulating cross-VCPU communication.
*/
+#define READ_SYSREG(reg, guest_el, hyp_el) \
+ case reg##_EL##guest_el: \
+ return read_sysreg_s(SYS_##reg##_EL##hyp_el);
+
switch (reg) {
- case CSSELR_EL1: return read_sysreg_s(SYS_CSSELR_EL1);
- case SCTLR_EL1: return read_sysreg_s(sctlr_EL12);
- case ACTLR_EL1: return read_sysreg_s(SYS_ACTLR_EL1);
- case CPACR_EL1: return read_sysreg_s(cpacr_EL12);
- case TTBR0_EL1: return read_sysreg_s(ttbr0_EL12);
- case TTBR1_EL1: return read_sysreg_s(ttbr1_EL12);
- case TCR_EL1: return read_sysreg_s(tcr_EL12);
- case ESR_EL1: return read_sysreg_s(esr_EL12);
- case AFSR0_EL1: return read_sysreg_s(afsr0_EL12);
- case AFSR1_EL1: return read_sysreg_s(afsr1_EL12);
- case FAR_EL1: return read_sysreg_s(far_EL12);
- case MAIR_EL1: return read_sysreg_s(mair_EL12);
- case VBAR_EL1: return read_sysreg_s(vbar_EL12);
- case CONTEXTIDR_EL1: return read_sysreg_s(contextidr_EL12);
- case TPIDR_EL0: return read_sysreg_s(SYS_TPIDR_EL0);
- case TPIDRRO_EL0: return read_sysreg_s(SYS_TPIDRRO_EL0);
- case TPIDR_EL1: return read_sysreg_s(SYS_TPIDR_EL1);
- case AMAIR_EL1: return read_sysreg_s(amair_EL12);
- case CNTKCTL_EL1: return read_sysreg_s(cntkctl_EL12);
- case PAR_EL1: return read_sysreg_s(SYS_PAR_EL1);
- case DACR32_EL2: return read_sysreg_s(SYS_DACR32_EL2);
- case IFSR32_EL2: return read_sysreg_s(SYS_IFSR32_EL2);
- case DBGVCR32_EL2: return read_sysreg_s(SYS_DBGVCR32_EL2);
+ DO_SYSREGS(READ_SYSREG)
}
immediate_read:
@@ -133,30 +140,13 @@ void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg)
* should never be listed below, because the the MPIDR should only be
* set once, before running the VCPU, and never changed later.
*/
+#define WRITE_SYSREG(reg, guest_el, hyp_el) \
+ case reg##_EL##guest_el: \
+ write_sysreg_s(val, SYS_##reg##_EL##hyp_el); \
+ return;
+
switch (reg) {
- case CSSELR_EL1: write_sysreg_s(val, SYS_CSSELR_EL1); return;
- case SCTLR_EL1: write_sysreg_s(val, sctlr_EL12); return;
- case ACTLR_EL1: write_sysreg_s(val, SYS_ACTLR_EL1); return;
- case CPACR_EL1: write_sysreg_s(val, cpacr_EL12); return;
- case TTBR0_EL1: write_sysreg_s(val, ttbr0_EL12); return;
- case TTBR1_EL1: write_sysreg_s(val, ttbr1_EL12); return;
- case TCR_EL1: write_sysreg_s(val, tcr_EL12); return;
- case ESR_EL1: write_sysreg_s(val, esr_EL12); return;
- case AFSR0_EL1: write_sysreg_s(val, afsr0_EL12); return;
- case AFSR1_EL1: write_sysreg_s(val, afsr1_EL12); return;
- case FAR_EL1: write_sysreg_s(val, far_EL12); return;
- case MAIR_EL1: write_sysreg_s(val, mair_EL12); return;
- case VBAR_EL1: write_sysreg_s(val, vbar_EL12); return;
- case CONTEXTIDR_EL1: write_sysreg_s(val, contextidr_EL12); return;
- case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); return;
- case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); return;
- case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); return;
- case AMAIR_EL1: write_sysreg_s(val, amair_EL12); return;
- case CNTKCTL_EL1: write_sysreg_s(val, cntkctl_EL12); return;
- case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); return;
- case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); return;
- case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); return;
- case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); return;
+ DO_SYSREGS(WRITE_SYSREG)
}
immediate_write:
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index bd3d57f..ce5e90e 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_timer.c
@@ -226,7 +226,7 @@ static bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx)
u32 cnt_ctl;
/* Only the virtual timer can be loaded so far */
- cnt_ctl = read_sysreg_el0(cntv_ctl);
+ cnt_ctl = read_sysreg_el0(SYS_CNTV_CTL);
return (cnt_ctl & ARCH_TIMER_CTRL_ENABLE) &&
(cnt_ctl & ARCH_TIMER_CTRL_IT_STAT) &&
!(cnt_ctl & ARCH_TIMER_CTRL_IT_MASK);
@@ -350,12 +350,12 @@ static void vtimer_save_state(struct kvm_vcpu *vcpu)
goto out;
if (timer->enabled) {
- vtimer->cnt_ctl = read_sysreg_el0(cntv_ctl);
- vtimer->cnt_cval = read_sysreg_el0(cntv_cval);
+ vtimer->cnt_ctl = read_sysreg_el0(SYS_CNTV_CTL);
+ vtimer->cnt_cval = read_sysreg_el0(SYS_CNTV_CVAL);
}
/* Disable the virtual timer */
- write_sysreg_el0(0, cntv_ctl);
+ write_sysreg_el0(0, SYS_CNTV_CTL);
isb();
vtimer->loaded = false;
@@ -410,9 +410,9 @@ static void vtimer_restore_state(struct kvm_vcpu *vcpu)
goto out;
if (timer->enabled) {
- write_sysreg_el0(vtimer->cnt_cval, cntv_cval);
+ write_sysreg_el0(vtimer->cnt_cval, SYS_CNTV_CVAL);
isb();
- write_sysreg_el0(vtimer->cnt_ctl, cntv_ctl);
+ write_sysreg_el0(vtimer->cnt_ctl, SYS_CNTV_CTL);
}
vtimer->loaded = true;
--
2.1.4
^ permalink raw reply related
* [PATCH v4 5/6] spi: at91-usart: add driver for at91-usart as spi
From: Radu Pirea @ 2018-05-29 14:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAHp75Vc0e=+2YptoFAUuPSpAyxaCUJJqjQPPY5VZHV=MEMOqHQ@mail.gmail.com>
On 05/28/2018 11:21 AM, Andy Shevchenko wrote:
> On Fri, May 25, 2018 at 8:19 PM, Radu Pirea <radu.pirea@microchip.com> wrote:
>> This is the driver for at91-usart in spi mode. The USART IP can be configured
>> to work in many modes and one of them is SPI.
>>
>> The driver was tested on sama5d3-xplained and sama5d4-xplained boards with
>> enc28j60 ethernet controller as slave.
>
>> +#include <linux/of_gpio.h>
>
> What is the use of it?
I need of_gpio.h for of_gpio_named_count, of_get_named_gpio and
devm_gpio_request_one(found in gpio.h)
>
>> +#define US_INIT (US_MR_SPI_MASTER | US_MR_CHRL | US_MR_CLKO | \
>> + US_MR_WRDBT)
>
> Don't split lines like this, it's hard to read.
>
> #define FOO \
> (BAR1 | BAR2)
I'll fix it.
>
> I think I already told this to someone recently, maybe to you.
>
>> +/* Register access macros */
>> +#define spi_readl(port, reg) \
>> + readl_relaxed((port)->regs + US_##reg)
>> +#define spi_writel(port, reg, value) \
>> + writel_relaxed((value), (port)->regs + US_##reg)
>> +
>> +#define spi_readb(port, reg) \
>> + readb_relaxed((port)->regs + US_##reg)
>> +#define spi_writeb(port, reg, value) \
>> + writeb_relaxed((value), (port)->regs + US_##reg)
>
> Names are too generic. You better to use the same prefix as for the
> rest, i.e. at91_spi_
Good ideea. I will change the names.
>
>> + /*used in interrupt to protect data reading*/
>
> Comment style.
>
> You need to read some existing code, perhaps, to see how it's done.
Ok. I will add the comment.
>
>> +static inline void at91_usart_spi_tx(struct at91_usart_spi *aus)
>> +{
>> + unsigned int len = aus->current_transfer->len;
>> + unsigned int remaining = aus->current_tx_remaining_bytes;
>> + const u8 *tx_buf = aus->current_transfer->tx_buf;
>> +
>
>> + if (remaining)
>> + if (at91_usart_spi_tx_ready(aus)) {
>
> if (x) {
> if (y) {
> ...
> }
> }
>
> is equivalent to if (x && y) {}.
>
> Though, considering your intention here, I would rather go with better
> pattern, i.e.
>
> if (!remaining)
> return;
Thank for suggestion. I will change.
>
>> + spi_writeb(aus, THR, tx_buf[len - remaining]);
>> + aus->current_tx_remaining_bytes--;
>> + }
>> +}
>> +
>> +static inline void at91_usart_spi_rx(struct at91_usart_spi *aus)
>> +{
>
>> + if (remaining) {
>> + rx_buf[len - remaining] = spi_readb(aus, RHR);
>> + aus->current_rx_remaining_bytes--;
>> + }
>
> Ditto.
>
>> +}
>
>
>> +static int at91_usart_gpio_setup(struct platform_device *pdev)
>> +{
>
>> + struct device_node *np = pdev->dev.parent->of_node;
>
> Your driver is not OF specific as far as I can see. Drop all these
> device_node stuff and change API calls respectively.
Ok. What do you suggest to use instead of OF API to get the count of
cs-gpios and to read their values one by one?
>
>> + int i;
>
>> + int ret = 0;
>> + int nb = 0;
>
> What happened to indentation?
>
> Redundnant assignment for both.
>
>> + if (!np)
>> + return -EINVAL;
>> +
>> + nb = of_gpio_named_count(np, "cs-gpios");
>> + for (i = 0; i < nb; i++) {
>> + int cs_gpio = of_get_named_gpio(np, "cs-gpios", i);
>> +
>> + if (cs_gpio < 0)
>> + return cs_gpio;
>> +
>> + if (gpio_is_valid(cs_gpio)) {
>> + ret = devm_gpio_request_one(&pdev->dev, cs_gpio,
>> + GPIOF_DIR_OUT,
>> + dev_name(&pdev->dev));
>> + if (ret)
>> + return ret;
>> + }
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int at91_usart_spi_probe(struct platform_device *pdev)
>> +{
>
>> + regs = platform_get_resource(to_platform_device(pdev->dev.parent),
>> + IORESOURCE_MEM, 0);
>> + if (!regs)
>> + return -EINVAL;
>
> This looks weird. Supply resource to _this_ device in your MFD code.
I know weird, but is the safest way to pass the resource and the of_node.
>
>> + dev_info(&pdev->dev,
>> + "Atmel USART SPI Controller version 0x%x at 0x%08lx (irq %d)\n",
>> + spi_readl(aus, VERSION),
>> + (unsigned long)regs->start, irq);
>
> I think I already told you, don't use explicit casting when print.
> If it wasn't you, do you homework then. But above is no go. >
>> + return 0;
>
>> +static struct platform_driver at91_usart_spi_driver = {
>> + .driver = {
>> + .name = "at91_usart_spi",
>
>> + .of_match_table = of_match_ptr(at91_usart_spi_dt_ids),
>
> Drop of_match_ptr(). It's not needed.
>
>> + },
>> + .probe = at91_usart_spi_probe,
>
>> + .remove = at91_usart_spi_remove, };
>
> Already told ya, split lines correctly.
>
^ permalink raw reply
* [PATCH 04/13] staging: vc04_services: no need to check debugfs return values
From: Greg Kroah-Hartman @ 2018-05-29 14:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529142947.3250-1-gregkh@linuxfoundation.org>
When calling debugfs functions, there is no need to ever check the
return value. The function can work or not, but the code logic should
never do something different based on this.
Clean up the vchiq_arm code by not caring about the value of debugfs
calls. This ends up removing a number of lines of code that are not
needed.
Cc: Eric Anholt <eric@anholt.net>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Keerthi Reddy <keerthigd4990@gmail.com>
Cc: linux-rpi-kernel at lists.infradead.org
Cc: linux-arm-kernel at lists.infradead.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
.../interface/vchiq_arm/vchiq_arm.c | 13 +---
.../interface/vchiq_arm/vchiq_debugfs.c | 72 +++----------------
.../interface/vchiq_arm/vchiq_debugfs.h | 4 +-
3 files changed, 15 insertions(+), 74 deletions(-)
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
index aaa264f3b598..bc05c69383b8 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
@@ -2018,7 +2018,6 @@ vchiq_open(struct inode *inode, struct file *file)
vchiq_log_info(vchiq_arm_log_level, "vchiq_open");
switch (dev) {
case VCHIQ_MINOR: {
- int ret;
VCHIQ_STATE_T *state = vchiq_get_state();
VCHIQ_INSTANCE_T instance;
@@ -2035,11 +2034,7 @@ vchiq_open(struct inode *inode, struct file *file)
instance->state = state;
instance->pid = current->tgid;
- ret = vchiq_debugfs_add_instance(instance);
- if (ret != 0) {
- kfree(instance);
- return ret;
- }
+ vchiq_debugfs_add_instance(instance);
sema_init(&instance->insert_event, 0);
sema_init(&instance->remove_event, 0);
@@ -3630,9 +3625,7 @@ static int vchiq_probe(struct platform_device *pdev)
goto failed_device_create;
/* create debugfs entries */
- err = vchiq_debugfs_init();
- if (err != 0)
- goto failed_debugfs_init;
+ vchiq_debugfs_init();
vchiq_log_info(vchiq_arm_log_level,
"vchiq: initialised - version %d (min %d), device %d.%d",
@@ -3645,8 +3638,6 @@ static int vchiq_probe(struct platform_device *pdev)
return 0;
-failed_debugfs_init:
- device_destroy(vchiq_class, vchiq_devid);
failed_device_create:
class_destroy(vchiq_class);
failed_class_create:
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.c
index 766b4fe5f32c..103fec955e2c 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.c
@@ -158,15 +158,12 @@ static const struct file_operations debugfs_log_fops = {
};
/* create an entry under <debugfs>/vchiq/log for each log category */
-static int vchiq_debugfs_create_log_entries(struct dentry *top)
+static void vchiq_debugfs_create_log_entries(struct dentry *top)
{
struct dentry *dir;
size_t i;
- int ret = 0;
dir = debugfs_create_dir("log", vchiq_debugfs_top());
- if (!dir)
- return -ENOMEM;
debugfs_info.log_categories = dir;
for (i = 0; i < n_log_entries; i++) {
@@ -177,14 +174,8 @@ static int vchiq_debugfs_create_log_entries(struct dentry *top)
debugfs_info.log_categories,
levp,
&debugfs_log_fops);
- if (!dir) {
- ret = -ENOMEM;
- break;
- }
-
vchiq_debugfs_log_entries[i].dir = dir;
}
- return ret;
}
static int debugfs_usecount_show(struct seq_file *f, void *offset)
@@ -268,43 +259,22 @@ static const struct file_operations debugfs_trace_fops = {
};
/* add an instance (process) to the debugfs entries */
-int vchiq_debugfs_add_instance(VCHIQ_INSTANCE_T instance)
+void vchiq_debugfs_add_instance(VCHIQ_INSTANCE_T instance)
{
char pidstr[16];
- struct dentry *top, *use_count, *trace;
+ struct dentry *top;
struct dentry *clients = vchiq_clients_top();
snprintf(pidstr, sizeof(pidstr), "%d",
vchiq_instance_get_pid(instance));
top = debugfs_create_dir(pidstr, clients);
- if (!top)
- goto fail_top;
-
- use_count = debugfs_create_file("use_count",
- 0444, top,
- instance,
- &debugfs_usecount_fops);
- if (!use_count)
- goto fail_use_count;
-
- trace = debugfs_create_file("trace",
- 0644, top,
- instance,
- &debugfs_trace_fops);
- if (!trace)
- goto fail_trace;
-
- vchiq_instance_get_debugfs_node(instance)->dentry = top;
- return 0;
+ debugfs_create_file("use_count", 0444, top, instance,
+ &debugfs_usecount_fops);
+ debugfs_create_file("trace", 0644, top, instance, &debugfs_trace_fops);
-fail_trace:
- debugfs_remove(use_count);
-fail_use_count:
- debugfs_remove(top);
-fail_top:
- return -ENOMEM;
+ vchiq_instance_get_debugfs_node(instance)->dentry = top;
}
void vchiq_debugfs_remove_instance(VCHIQ_INSTANCE_T instance)
@@ -314,31 +284,13 @@ void vchiq_debugfs_remove_instance(VCHIQ_INSTANCE_T instance)
debugfs_remove_recursive(node->dentry);
}
-int vchiq_debugfs_init(void)
+void vchiq_debugfs_init(void)
{
- BUG_ON(debugfs_info.vchiq_cfg_dir != NULL);
-
debugfs_info.vchiq_cfg_dir = debugfs_create_dir("vchiq", NULL);
- if (debugfs_info.vchiq_cfg_dir == NULL)
- goto fail;
-
debugfs_info.clients = debugfs_create_dir("clients",
vchiq_debugfs_top());
- if (!debugfs_info.clients)
- goto fail;
- if (vchiq_debugfs_create_log_entries(vchiq_debugfs_top()) != 0)
- goto fail;
-
- return 0;
-
-fail:
- vchiq_debugfs_deinit();
- vchiq_log_error(vchiq_arm_log_level,
- "%s: failed to create debugfs directory",
- __func__);
-
- return -ENOMEM;
+ vchiq_debugfs_create_log_entries(vchiq_debugfs_top());
}
/* remove all the debugfs entries */
@@ -360,18 +312,16 @@ static struct dentry *vchiq_debugfs_top(void)
#else /* CONFIG_DEBUG_FS */
-int vchiq_debugfs_init(void)
+void vchiq_debugfs_init(void)
{
- return 0;
}
void vchiq_debugfs_deinit(void)
{
}
-int vchiq_debugfs_add_instance(VCHIQ_INSTANCE_T instance)
+void vchiq_debugfs_add_instance(VCHIQ_INSTANCE_T instance)
{
- return 0;
}
void vchiq_debugfs_remove_instance(VCHIQ_INSTANCE_T instance)
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.h
index 1d95e3d70621..3af6397ada19 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.h
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.h
@@ -40,11 +40,11 @@ typedef struct vchiq_debugfs_node_struct {
struct dentry *dentry;
} VCHIQ_DEBUGFS_NODE_T;
-int vchiq_debugfs_init(void);
+void vchiq_debugfs_init(void);
void vchiq_debugfs_deinit(void);
-int vchiq_debugfs_add_instance(VCHIQ_INSTANCE_T instance);
+void vchiq_debugfs_add_instance(VCHIQ_INSTANCE_T instance);
void vchiq_debugfs_remove_instance(VCHIQ_INSTANCE_T instance);
--
2.17.0
^ permalink raw reply related
* [PATCH v4 5/6] spi: at91-usart: add driver for at91-usart as spi
From: Nicolas Ferre @ 2018-05-29 14:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <110bb353-b131-348c-8e26-9863b074142d@microchip.com>
On 29/05/2018 at 16:28, Radu Pirea wrote:
>
>
> On 05/28/2018 11:21 AM, Andy Shevchenko wrote:
>> On Fri, May 25, 2018 at 8:19 PM, Radu Pirea <radu.pirea@microchip.com> wrote:
>>> This is the driver for at91-usart in spi mode. The USART IP can be configured
>>> to work in many modes and one of them is SPI.
[..]
>>> +static int at91_usart_gpio_setup(struct platform_device *pdev)
>>> +{
>>
>>> + struct device_node *np = pdev->dev.parent->of_node;
>>
>> Your driver is not OF specific as far as I can see. Drop all these
>> device_node stuff and change API calls respectively.
>
> Ok. What do you suggest to use instead of OF API to get the count of
> cs-gpios and to read their values one by one?
As Alexandre said, we can make this driver OF specific.
What could be interesting is to use the gpio descriptors API and not the
older one. This would allow us to have far more control over the gpio
that we use in our drivers (Ludovic is converting our drivers to only
use gpiod structures).
Regards,
Nicolas
>
>>
>>> + int i;
>>
>>> + int ret = 0;
>>> + int nb = 0;
>>
>> What happened to indentation?
>>
>> Redundnant assignment for both.
>>
>>> + if (!np)
>>> + return -EINVAL;
>>> +
>>> + nb = of_gpio_named_count(np, "cs-gpios");
>>> + for (i = 0; i < nb; i++) {
>>> + int cs_gpio = of_get_named_gpio(np, "cs-gpios", i);
>>> +
>>> + if (cs_gpio < 0)
>>> + return cs_gpio;
>>> +
>>> + if (gpio_is_valid(cs_gpio)) {
>>> + ret = devm_gpio_request_one(&pdev->dev, cs_gpio,
>>> + GPIOF_DIR_OUT,
>>> + dev_name(&pdev->dev));
>>> + if (ret)
>>> + return ret;
>>> + }
>>> + }
>>> +
>>> + return 0;
>>> +}
[..]
--
Nicolas Ferre
^ permalink raw reply
* [PATCH v4 5/6] spi: at91-usart: add driver for at91-usart as spi
From: Nicolas Ferre @ 2018-05-29 14:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <0c529082-722c-14d8-7a04-dfeb63d5de92@microchip.com>
On 29/05/2018 at 16:34, Nicolas Ferre wrote:
> On 29/05/2018 at 16:28, Radu Pirea wrote:
>>
>>
>> On 05/28/2018 11:21 AM, Andy Shevchenko wrote:
>>> On Fri, May 25, 2018 at 8:19 PM, Radu Pirea <radu.pirea@microchip.com> wrote:
>>>> This is the driver for at91-usart in spi mode. The USART IP can be configured
>>>> to work in many modes and one of them is SPI.
>
> [..]
>
>>>> +static int at91_usart_gpio_setup(struct platform_device *pdev)
>>>> +{
>>>
>>>> + struct device_node *np = pdev->dev.parent->of_node;
>>>
>>> Your driver is not OF specific as far as I can see. Drop all these
>>> device_node stuff and change API calls respectively.
>>
>> Ok. What do you suggest to use instead of OF API to get the count of
>> cs-gpios and to read their values one by one?
>
> As Alexandre said, we can make this driver OF specific.
>
> What could be interesting is to use the gpio descriptors API and not the
> older one. This would allow us to have far more control over the gpio
> that we use in our drivers (Ludovic is converting our drivers to only
> use gpiod structures).
Oh, but we already said that we cannot.
Disregard my comment then, sorry for the noise.
> Regards,
> Nicolas
>
>>
>>>
>>>> + int i;
>>>
>>>> + int ret = 0;
>>>> + int nb = 0;
>>>
>>> What happened to indentation?
>>>
>>> Redundnant assignment for both.
>>>
>>>> + if (!np)
>>>> + return -EINVAL;
>>>> +
>>>> + nb = of_gpio_named_count(np, "cs-gpios");
>>>> + for (i = 0; i < nb; i++) {
>>>> + int cs_gpio = of_get_named_gpio(np, "cs-gpios", i);
>>>> +
>>>> + if (cs_gpio < 0)
>>>> + return cs_gpio;
>>>> +
>>>> + if (gpio_is_valid(cs_gpio)) {
>>>> + ret = devm_gpio_request_one(&pdev->dev, cs_gpio,
>>>> + GPIOF_DIR_OUT,
>>>> + dev_name(&pdev->dev));
>>>> + if (ret)
>>>> + return ret;
>>>> + }
>>>> + }
>>>> +
>>>> + return 0;
>>>> +}
> [..]
>
--
Nicolas Ferre
^ permalink raw reply
* [PATCH v3 3/3] x86/mm: add TLB purge to free pmd/pte page interfaces
From: Joerg Roedel @ 2018-05-29 14:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180516233207.1580-4-toshi.kani@hpe.com>
On Wed, May 16, 2018 at 05:32:07PM -0600, Toshi Kani wrote:
> pmd = (pmd_t *)pud_page_vaddr(*pud);
> + pmd_sv = (pmd_t *)__get_free_page(GFP_KERNEL);
> + if (!pmd_sv)
> + return 0;
So your code still needs to allocate a full page where a simple
list_head on the stack would do the same job.
Ingo, Thomas, can you please just revert the original broken patch for
now until there is proper fix?
Thanks,
Joerg
^ permalink raw reply
* [PATCH v2 1/8] driver core: make deferring probe after init optional
From: Rob Herring @ 2018-05-29 14:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1765be22-4bd7-c870-926c-2956e46df1d9@gmail.com>
On Tue, May 29, 2018 at 12:12 AM, Frank Rowand <frowand.list@gmail.com> wrote:
> On 05/24/18 11:18, Mark Brown wrote:
>> On Thu, May 24, 2018 at 12:50:17PM -0500, Rob Herring wrote:
>>
>>> Subsystems or drivers may opt-in to this behavior by calling
>>> driver_deferred_probe_check_init_done() instead of just returning
>>> -EPROBE_DEFER. They may use additional information from DT or kernel's
>>> config to decide whether to continue to defer probe or not.
>>
>> Should userspace have some involvement in this decision? It knows if
>> it's got any intention of loading modules for example. Kernel config
>> checks might be good enough, though it's going to be a pain to work out
>> if the relevant driver is built as a module for example.
>>
>
> A parallel issue is that loading an overlay could provide the resource
> that will allow the deferred probe to complete. (That is, once we
> finish implementing the run time overlays feature.)
I'd like to see an actual example where that could happen. I agree you
could craft it, but would it really be a valid partitioning? For
example, SoC pinctrl, iommu, or power domains defined in an overlay
would not be something valid to apply during kernel boot or after boot
(though putting those into overlays is exactly what Alex wants to do).
Rob
^ permalink raw reply
* [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma
From: Boris Brezillon @ 2018-05-29 14:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <19d68279-072e-7646-6fdd-8649578229ea@microchip.com>
Hi Eugen,
On Tue, 29 May 2018 09:30:54 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> On 28.05.2018 13:10, Peter Rosin wrote:
> > On 2018-05-28 00:11, Peter Rosin wrote:
> >> On 2018-05-27 11:18, Peter Rosin wrote:
> >>> On 2018-05-25 16:51, Tudor Ambarus wrote:
> >>>> We think the best way is to keep LCD on DDR Ports 2 and 3 (8th and 9th
> >>>> slaves), to have maximum bandwidth and to use DMA on DDR port 1 for NAND
> >>>> (7th slave).
> >>>
> >>> Exactly how do I accomplish that?
> >>>
> >>> I can see how I can move the LCD between slave DDR port 2 and 3 by
> >>> selecting LCDC DMA master 8 or 9 (but according to the above it should
> >>> not matter). The big question is how I control what slave the NAND flash
> >>> is going to use? I find nothing in the datasheet, and the code is also
> >>> non-transparent enough for me to figure it out by myself without
> >>> throwing out this question first...
>
> >> [...]
>
> >> and the output is
> >>
> >> atmel-nand-controller 10000000.ebi:nand-controller: using dma0chan5 for DMA transfers
> >>
> >> So, DMA controller 0 is in use. I still don't know if IF0, IF1 or IF2 is used
> >> or how to find out. I guess IF2 is not in use since that does not allow any
> >> DDR2 port as slave...
>
> Hello Peter,
>
> Thank you for all the information, I will chip in to help a little bit.
> The Master/channel is described in the device tree. The channel has a
> controller, a mem/periph interface and a periph ID, plus a FIFO
> configuration.
>
> The dma chan number reported in the dmesg is just software. Here is an
> example from DT:
> dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
> <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
>
> you can match this with the help from
> Documentation/devicetree/bindings/dma/atmel-dma.txt:
>
> 1. A phandle pointing to the DMA controller.
>
> 2. The memory interface (16 most significant bits), the peripheral
> interface
> (16 less significant bits).
>
> 3. Parameters for the at91 DMA configuration register which are device
>
> dependent:
>
> - bit 7-0: peripheral identifier for the hardware handshaking
> interface. The
> identifier can be different for tx and rx.
>
> - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.
>
>
> So , what was Tudor asking for, is your DT for the ebi node (if you are
> using ebi), or, your NFC SRAM (Nand Flash Controller SRAM) DMA
> devicetree chunk, so, we can figure out which type of DMA are you using.
I think you're missing something here. We use the DMA engine in memcpy
mode (SRAM -> DRAM), not in device mode (dev -> DRAM or DRAM -> dev).
So there's no dmas prop defined in the DT and there should not be.
Regards,
Boris
>
> Normally, the ebi should be connected to both DMA0 and DMA1 on those
> interfaces specified in DT. Which ones you want to use, depends on your
> setup (and contention on the bus/accesses, like in your case, the HLCDC)
>
> Thats why we have multiple choices, to pick the right one for each case.
> In our vanilla DT sama5d3.dtsi we do not have DMA described for ebi
> interface.
>
> Eugen
>
> >> [...]
^ permalink raw reply
* Status of aspeed-bmc-opp-firestone (IBM S822LC)
From: Paul Menzel @ 2018-05-29 14:53 UTC (permalink / raw)
To: linux-arm-kernel
Dear Joel, dear Linux folks,
We have an IBM S822LC system (Firestone(?)). Building of OpenBMC
currently fails, as the not everything was ported from dev-4.10 to
dev-4.13 [1], and therefore a file cannot be found.
Looking at upstream Linux, there are BMCs for Power 8 systems, like
Palmetto, included.
```
$ ls arch/arm/boot/dts/aspeed-bmc-opp-*
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
```
Does somebody know, why Firestone was not upstreamed? Is somebody
working on upstreaming it? If not, do you have scripts to port such
work? Manually cherry-picking stuff in this case is hard, as there are a
lot of conflicts.
Kind regards,
Paul
[1]: https://github.com/openbmc/openbmc/issues/3206
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^ permalink raw reply
* [PATCH v5 00/15] ARM Spectre variant 2 fixes
From: Russell King - ARM Linux @ 2018-05-29 14:53 UTC (permalink / raw)
To: linux-arm-kernel
Sorry for another version so soon after the previous.
Fifth version:
- Really warn on the first discovery of an incorrect IBE bit, rather than
only checking the first time around.
arch/arm/include/asm/bugs.h | 6 +-
arch/arm/include/asm/cp15.h | 3 +
arch/arm/include/asm/cputype.h | 8 ++
arch/arm/include/asm/kvm_asm.h | 2 -
arch/arm/include/asm/kvm_host.h | 14 ++-
arch/arm/include/asm/kvm_mmu.h | 23 ++++-
arch/arm/include/asm/proc-fns.h | 4 +
arch/arm/include/asm/system_misc.h | 15 ++++
arch/arm/kernel/Makefile | 1 +
arch/arm/kernel/bugs.c | 18 ++++
arch/arm/kernel/smp.c | 4 +
arch/arm/kernel/suspend.c | 2 +
arch/arm/kvm/hyp/hyp-entry.S | 112 ++++++++++++++++++++++-
arch/arm/mm/Kconfig | 23 +++++
arch/arm/mm/Makefile | 2 +-
arch/arm/mm/fault.c | 3 +
arch/arm/mm/proc-macros.S | 3 +-
arch/arm/mm/proc-v7-2level.S | 6 --
arch/arm/mm/proc-v7-bugs.c | 176 +++++++++++++++++++++++++++++++++++++
arch/arm/mm/proc-v7.S | 154 +++++++++++++++++++++++++-------
20 files changed, 529 insertions(+), 50 deletions(-)
create mode 100644 arch/arm/kernel/bugs.c
create mode 100644 arch/arm/mm/proc-v7-bugs.c
On Tue, May 29, 2018 at 10:07:57AM +0100, Russell King - ARM Linux wrote:
> Fourth version:
> - Only warn once per CPU about incorrect IBE bit
> (this avoids spamming the kernel log on cpuidle implementations that
> use cpu_suspend() - spotted by Mark Brown.)
>
> arch/arm/include/asm/bugs.h | 6 +-
> arch/arm/include/asm/cp15.h | 3 +
> arch/arm/include/asm/cputype.h | 8 ++
> arch/arm/include/asm/kvm_asm.h | 2 -
> arch/arm/include/asm/kvm_host.h | 14 ++-
> arch/arm/include/asm/kvm_mmu.h | 23 ++++-
> arch/arm/include/asm/proc-fns.h | 4 +
> arch/arm/include/asm/system_misc.h | 15 ++++
> arch/arm/kernel/Makefile | 1 +
> arch/arm/kernel/bugs.c | 18 ++++
> arch/arm/kernel/smp.c | 4 +
> arch/arm/kernel/suspend.c | 2 +
> arch/arm/kvm/hyp/hyp-entry.S | 112 +++++++++++++++++++++++-
> arch/arm/mm/Kconfig | 23 +++++
> arch/arm/mm/Makefile | 2 +-
> arch/arm/mm/fault.c | 3 +
> arch/arm/mm/proc-macros.S | 3 +-
> arch/arm/mm/proc-v7-2level.S | 6 --
> arch/arm/mm/proc-v7-bugs.c | 173 +++++++++++++++++++++++++++++++++++++
> arch/arm/mm/proc-v7.S | 154 ++++++++++++++++++++++++++-------
> 20 files changed, 526 insertions(+), 50 deletions(-)
> create mode 100644 arch/arm/kernel/bugs.c
> create mode 100644 arch/arm/mm/proc-v7-bugs.c
>
> On Fri, May 25, 2018 at 02:59:39PM +0100, Russell King - ARM Linux wrote:
> > Third version:
> > - Remove "PSCI" from the SMC version of the workaround as well.
> > - Avoid reporting active workaround if the IBE bit is not set.
> > - Only probe for workaround_1 on Cortex A57 and A72, or non-ARM CPUs.
> > - Require features probe for workaround_1 to return zero.
> > - Validation that all CPUs in the system have the same workaround status.
> > - Avoid corrupting r12 in workaround_1 KVM hypervisor implementation.
> >
> > arch/arm/include/asm/bugs.h | 6 +-
> > arch/arm/include/asm/cp15.h | 3 +
> > arch/arm/include/asm/cputype.h | 8 ++
> > arch/arm/include/asm/kvm_asm.h | 2 -
> > arch/arm/include/asm/kvm_host.h | 14 ++-
> > arch/arm/include/asm/kvm_mmu.h | 23 ++++-
> > arch/arm/include/asm/proc-fns.h | 4 +
> > arch/arm/include/asm/system_misc.h | 15 ++++
> > arch/arm/kernel/Makefile | 1 +
> > arch/arm/kernel/bugs.c | 18 ++++
> > arch/arm/kernel/smp.c | 4 +
> > arch/arm/kernel/suspend.c | 2 +
> > arch/arm/kvm/hyp/hyp-entry.S | 112 +++++++++++++++++++++++-
> > arch/arm/mm/Kconfig | 23 +++++
> > arch/arm/mm/Makefile | 2 +-
> > arch/arm/mm/fault.c | 3 +
> > arch/arm/mm/proc-macros.S | 3 +-
> > arch/arm/mm/proc-v7-2level.S | 6 --
> > arch/arm/mm/proc-v7-bugs.c | 170 +++++++++++++++++++++++++++++++++++++
> > arch/arm/mm/proc-v7.S | 154 ++++++++++++++++++++++++++-------
> > 20 files changed, 523 insertions(+), 50 deletions(-)
> > create mode 100644 arch/arm/kernel/bugs.c
> > create mode 100644 arch/arm/mm/proc-v7-bugs.c
> >
> > On Mon, May 21, 2018 at 12:42:38PM +0100, Russell King - ARM Linux wrote:
> > > This is the second posting - the original cover note is below. Comments
> > > from previous series addresesd:
> > > - Drop R7 and R8 changes.
> > > - Remove "PSCI" from the hypervisor version of the workaround.
> > >
> > > arch/arm/include/asm/bugs.h | 6 +-
> > > arch/arm/include/asm/cp15.h | 3 +
> > > arch/arm/include/asm/cputype.h | 5 ++
> > > arch/arm/include/asm/kvm_asm.h | 2 -
> > > arch/arm/include/asm/kvm_host.h | 14 +++-
> > > arch/arm/include/asm/kvm_mmu.h | 23 +++++-
> > > arch/arm/include/asm/proc-fns.h | 4 +
> > > arch/arm/include/asm/system_misc.h | 8 ++
> > > arch/arm/kernel/Makefile | 1 +
> > > arch/arm/kernel/bugs.c | 18 +++++
> > > arch/arm/kernel/smp.c | 4 +
> > > arch/arm/kernel/suspend.c | 2 +
> > > arch/arm/kvm/hyp/hyp-entry.S | 108 +++++++++++++++++++++++++-
> > > arch/arm/mm/Kconfig | 23 ++++++
> > > arch/arm/mm/Makefile | 2 +-
> > > arch/arm/mm/fault.c | 3 +
> > > arch/arm/mm/proc-macros.S | 3 +-
> > > arch/arm/mm/proc-v7-2level.S | 6 --
> > > arch/arm/mm/proc-v7-bugs.c | 130 +++++++++++++++++++++++++++++++
> > > arch/arm/mm/proc-v7.S | 154 +++++++++++++++++++++++++++++--------
> > > 20 files changed, 469 insertions(+), 50 deletions(-)
> > > create mode 100644 arch/arm/kernel/bugs.c
> > > create mode 100644 arch/arm/mm/proc-v7-bugs.c
> > >
> > > On Wed, May 16, 2018 at 11:59:49AM +0100, Russell King - ARM Linux wrote:
> > > > This series addresses the Spectre variant 2 issues on ARM Cortex and
> > > > Broadcom Brahma B15 CPUs. Due to the complexity of the bug, it is not
> > > > possible to verify that this series fixes any of the bugs, since it
> > > > has not been able to reproduce these exact scenarios using test
> > > > programs.
> > > >
> > > > I believe that this covers the entire extent of the Spectre variant 2
> > > > issues, with the exception of Cortex A53 and Cortex A72 processors as
> > > > these require a substantially more complex solution (except where the
> > > > workaround is implemented in PSCI firmware.)
> > > >
> > > > Spectre variant 1 is not covered by this series.
> > > >
> > > > The patch series is based partly on Marc Zyngier's work from February -
> > > > two of the KVM patches are from Marc's work.
> > > >
> > > > The main differences are:
> > > > - Inclusion of more processors as per current ARM Ltd security update
> > > > documentation.
> > > > - Extension of "bugs" infrastructure to detect Cortex A8 and Cortex A15
> > > > CPUs missing out on the IBE bit being set on (re-)entry to the kernel
> > > > through all paths.
> > > > - Handle all suspect userspace-touching-kernelspace aborts irrespective
> > > > of mapping type.
> > > >
> > > > The first patch will trivially conflict with the Broadcom Brahma
> > > > updates already in arm-soc - it has been necessary to independently
> > > > add the ID definitions for the B15 CPU.
> > > >
> > > > Having worked through this series, I'm of the opinion that the
> > > > define_processor_functions macro in proc-v7 are probably more hassle
> > > > than they're worth - here, we don't need the global equivalent symbols,
> > > > because we never refer to them from the kernel code for any V7
> > > > processor (MULTI_CPU is always defined.)
> > > >
> > > > This series is currently in my "spectre" branch (along with some
> > > > Spectre variant 1 patches.)
> > > >
> > > > Please carefully review.
> > > >
> > > > arch/arm/include/asm/bugs.h | 6 +-
> > > > arch/arm/include/asm/cp15.h | 3 +
> > > > arch/arm/include/asm/cputype.h | 5 ++
> > > > arch/arm/include/asm/kvm_asm.h | 2 -
> > > > arch/arm/include/asm/kvm_host.h | 14 +++-
> > > > arch/arm/include/asm/kvm_mmu.h | 23 +++++-
> > > > arch/arm/include/asm/proc-fns.h | 4 +
> > > > arch/arm/include/asm/system_misc.h | 8 ++
> > > > arch/arm/kernel/Makefile | 1 +
> > > > arch/arm/kernel/bugs.c | 18 +++++
> > > > arch/arm/kernel/smp.c | 4 +
> > > > arch/arm/kernel/suspend.c | 2 +
> > > > arch/arm/kvm/hyp/hyp-entry.S | 108 ++++++++++++++++++++++++-
> > > > arch/arm/mm/Kconfig | 23 ++++++
> > > > arch/arm/mm/Makefile | 2 +-
> > > > arch/arm/mm/fault.c | 3 +
> > > > arch/arm/mm/proc-macros.S | 3 +-
> > > > arch/arm/mm/proc-v7-2level.S | 6 --
> > > > arch/arm/mm/proc-v7-bugs.c | 130 ++++++++++++++++++++++++++++++
> > > > arch/arm/mm/proc-v7.S | 158 +++++++++++++++++++++++++++++--------
> > > > 20 files changed, 471 insertions(+), 52 deletions(-)
> > > >
> > > > --
> > > > RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> > > > FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
> > > > According to speedtest.net: 8.21Mbps down 510kbps up
> > > >
> > > > _______________________________________________
> > > > linux-arm-kernel mailing list
> > > > linux-arm-kernel at lists.infradead.org
> > > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> > >
> > > --
> > > RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> > > FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
> > > According to speedtest.net: 8.21Mbps down 510kbps up
> > >
> > > _______________________________________________
> > > linux-arm-kernel mailing list
> > > linux-arm-kernel at lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >
> > --
> > RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> > FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
> > According to speedtest.net: 8.21Mbps down 510kbps up
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> --
> RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
> According to speedtest.net: 8.21Mbps down 510kbps up
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
According to speedtest.net: 8.21Mbps down 510kbps up
^ permalink raw reply
* [patch v25 0/4] JTAG driver introduction
From: Oleksandr Shamray @ 2018-05-29 14:53 UTC (permalink / raw)
To: linux-arm-kernel
When a need raise up to use JTAG interface for system's devices
programming or CPU debugging, usually the user layer
application implements jtag protocol by bit-bang or using a
proprietary connection to vendor hardware.
This method can be slow and not generic.
We propose to implement general JTAG interface and infrastructure
to communicate with user layer application. In such way, we can
have the standard JTAG interface core part and separation from
specific HW implementation.
This allow new capability to debug the CPU or program system's
device via BMC without additional devices nor cost.
This patch purpose is to add JTAG master core infrastructure by
defining new JTAG class and provide generic JTAG interface
to allow hardware specific drivers to connect this interface.
This will enable all JTAG drivers to use the common interface
part and will have separate for hardware implementation.
The JTAG (Joint Test Action Group) core driver provides minimal generic
JTAG interface, which can be used by hardware specific JTAG master
controllers. By providing common interface for the JTAG controllers,
user space device programing is hardware independent.
Modern SoC which in use for embedded system' equipped with
internal JTAG master interface.
This interface is used for programming and debugging system's
hardware components, like CPLD, FPGA, CPU, voltage and
industrial controllers.
Firmware for such devices can be upgraded through JTAG interface during
Runtime. The JTAG standard support for multiple devices programming,
is in case their lines are daisy-chained together.
For example, systems which equipped with host CPU, BMC SoC or/and
number of programmable devices are capable to connect a pin and
select system components dynamically for programming and debugging,
This is using by the BMC which is equipped with internal SoC master
controller.
For example:
BMC JTAG master --> pin selected to CPLDs chain for programming (filed
upgrade, production)
BMC JTAG master --> pin selected to voltage monitors for programming
(field upgrade, production)
BMC JTAG master --> pin selected to host CPU (on-site debugging
and developers debugging)
For example, we can have application in user space which using calls
to JTAG driver executes CPLD programming directly from SVF file
The JTAG standard (IEEE 1149.1) defines the next connector pins:
- TDI (Test Data In);
- TDO (Test Data Out);
- TCK (Test Clock);
- TMS (Test Mode Select);
- TRST (Test Reset) (Optional);
The SoC equipped with JTAG master controller, performs
device programming on command or vector level. For example
a file in a standard SVF (Serial Vector Format) that contains
boundary scan vectors, can be used by sending each vector
to the JTAG interface and the JTAG controller will execute
the programming.
Initial version provides the system calls set for:
- SIR (Scan Instruction Register, IEEE 1149.1 Instruction Register scan);
- SDR (Scan Data Register, IEEE 1149.1 Data Register scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Oleksandr Shamray (4):
drivers: jtag: Add JTAG core driver
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master
driver
Documentation: jtag: Add bindings for Aspeed SoC 24xx and 25xx
families JTAG master driver
Documentation: jtag: Add ABI documentation
Documentation/ABI/testing/gpio-cdev | 1 -
Documentation/ABI/testing/jtag-dev | 23 +
.../devicetree/bindings/jtag/aspeed-jtag.txt | 22 +
Documentation/ioctl/ioctl-number.txt | 2 +
Documentation/jtag/overview | 27 +
Documentation/jtag/transactions | 109 +++
MAINTAINERS | 10 +
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/jtag/Kconfig | 31 +
drivers/jtag/Makefile | 2 +
drivers/jtag/jtag-aspeed.c | 756 ++++++++++++++++++++
drivers/jtag/jtag.c | 274 +++++++
include/linux/jtag.h | 41 ++
include/uapi/linux/jtag.h | 109 +++
15 files changed, 1409 insertions(+), 1 deletions(-)
create mode 100644 Documentation/ABI/testing/jtag-dev
create mode 100644 Documentation/devicetree/bindings/jtag/aspeed-jtag.txt
create mode 100644 Documentation/jtag/overview
create mode 100644 Documentation/jtag/transactions
create mode 100644 drivers/jtag/Kconfig
create mode 100644 drivers/jtag/Makefile
create mode 100644 drivers/jtag/jtag-aspeed.c
create mode 100644 drivers/jtag/jtag.c
create mode 100644 include/linux/jtag.h
create mode 100644 include/uapi/linux/jtag.h
^ permalink raw reply
* [patch v25 1/4] drivers: jtag: Add JTAG core driver
From: Oleksandr Shamray @ 2018-05-29 14:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527605618-15705-1-git-send-email-oleksandrs@mellanox.com>
Initial patch for JTAG driver
JTAG class driver provide infrastructure to support hardware/software
JTAG platform drivers. It provide user layer API interface for flashing
and debugging external devices which equipped with JTAG interface
using standard transactions.
Driver exposes set of IOCTL to user space for:
- XFER:
- SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
- SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks).
- SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Acked-by: Philippe Ombredanne <pombredanne@nexb.com>
---
v24->v25
Comments pointed by Greg KH <gregkh@linuxfoundation.org>
- set values to enums in jtag.h
v23->v24
Notifications from kbuild test robot <lkp@intel.com>
- Add include types.h header to jtag.h
- remove unecessary jtag_release
v22->v23
Comments pointed by Greg KH <gregkh@linuxfoundation.org>
- remove restriction of allocated JTAG devs-
- add validation fo idle values
- remove unnecessary blank line
- change retcode for xfer
- remove unecessary jtag_release callback
- remove unecessary defined fron jtag.h
- align in one line define JTAG_IOCRUNTEST
v21->v22
Comments pointed by Andy Shevchenko <andy.shevchenko@gmail.com>
- Fix 0x0f -> 0x0F in ioctl-number.txt
- Add description to #define MAX_JTAG_NAME_LEN
- Remove unnecessary entry *dev from struct jtag
- Remove redundant parens
- Described mandatory callbacks and removed unnecessary
- Set JTAG_MAX_XFER_DATA_LEN to power of 2
- rework driver alloc/register to devm_ variant
- increasing line length up to 84 in order to improve readability.
Comments pointed by Randy Dunlap <rdunlap@infradead.org>
- fix spell in ABI doccumentation
v20->v21
Comments pointed by Randy Dunlap <rdunlap@infradead.org>
- Fix JTAG dirver help in Kconfig
v19->v20
Comments pointed by Randy Dunlap <rdunlap@infradead.org>
- Fix JTAG dirver help in Kconfig
Notifications from kbuild test robot <lkp@intel.com>
- fix incompatible type casts
v18->v19
Comments pointed by Julia Cartwright <juliac@eso.teric.us>
- Fix memory leak on jtag_alloc exit
v17->v18
Comments pointed by Julia Cartwright <juliac@eso.teric.us>
- Change to return -EOPNOTSUPP in case of error in JTAG_GIOCFREQ
- Add ops callbacks check to jtag_alloc
- Add err check for copy_to_user
- Move the kfree() above the if (err) in JTAG_IOCXFER
- remove unnecessary check for error after put_user
- add padding to struct jtag_xfer
v16->v17
Comments pointed by Julia Cartwright <juliac@eso.teric.us>
- Fix memory allocation on jtag alloc
- Move out unnecessary form lock on jtag open
- Rework jtag register behavior
v15->v16
Comments pointed by Florian Fainelli <f.fainelli@gmail.com>
- move check jtag->ops->* in ioctl before get_user()
- change error type -EINVAL --> -EBUSY on open already opened jtag
- remove unnecessary ARCH_DMA_MINALIGN flag from kzalloc
- remove define ARCH_DMA_MINALIGN
v14->v15
v13->v14
Comments pointed by Philippe Ombredanne <pombredanne@nexb.com>
- Change style of head block comment from /**/ to //
v12->v13
Comments pointed by Philippe Ombredanne <pombredanne@nexb.com>
- Change jtag.c licence type to
SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
and reorder line with license in description
v11->v12
Comments pointed by Greg KH <gregkh@linuxfoundation.org>
- Change jtag.h licence type to
SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
and reorder line with license in description
Comments pointed by Chip Bilbrey <chip@bilbrey.org>
- Remove Apeed reference from uapi jtag.h header
- Remove access mode from xfer and idle transactions
- Add new ioctl JTAG_SIOCMODE for set hw mode
- Add single open per device blocking
v10->v11
Notifications from kbuild test robot <lkp@intel.com>
- Add include types.h header to jtag.h
- fix incompatible type of xfer callback
- remove rdundant class defination
- Fix return order in case of xfer error
V9->v10
Comments pointed by Greg KH <gregkh@linuxfoundation.org>
- remove unnecessary alignment for pirv data
- move jtag_copy_to_user and jtag_copy_from_user code just to ioctl
- move int jtag_run_test_idle_op and jtag_xfer_op code
just to ioctl
- change return error codes to more applicable
- add missing error checks
- fix error check order in ioctl
- remove unnecessary blank lines
- add param validation to ioctl
- remove compat_ioctl
- remove only one open per JTAG port blocking.
User will care about this.
- Fix idr memory leak on jtag_exit
- change cdev device type to misc
V8->v9
Comments pointed by Arnd Bergmann <arnd@arndb.de>
- use get_user() instead of __get_user().
- change jtag->open type from int to atomic_t
- remove spinlock on jtg_open
- remove mutex on jtag_register
- add unregister_chrdev_region on jtag_init err
- add unregister_chrdev_region on jtag_exit
- remove unnecessary pointer casts
- add *data parameter to xfer function prototype
v7->v8
Comments pointed by Moritz Fischer <moritz.fischer@ettus.com>
- Fix misspelling s/friver/driver
v6->v7
Notifications from kbuild test robot <lkp@intel.com>
- Remove include asm/types.h from jtag.h
- Add include <linux/types.h> to jtag.c
v5->v6
v4->v5
v3->v4
Comments pointed by Arnd Bergmann <arnd@arndb.de>
- change transaction pointer tdio type to __u64
- change internal status type from enum to __u32
- reorder jtag_xfer members to avoid the implied padding
- add __packed attribute to jtag_xfer and jtag_run_test_idle
v2->v3
Notifications from kbuild test robot <lkp@intel.com>
- Change include path to <linux/types.h> in jtag.h
v1->v2
Comments pointed by Greg KH <gregkh@linuxfoundation.org>
- Change license type from GPLv2/BSD to GPLv2
- Change type of variables which crossed user/kernel to __type
- Remove "default n" from Kconfig
Comments pointed by Andrew Lunn <andrew@lunn.ch>
- Change list_add_tail in jtag_unregister to list_del
Comments pointed by Neil Armstrong <narmstrong@baylibre.com>
- Add SPDX-License-Identifier instead of license text
Comments pointed by Arnd Bergmann <arnd@arndb.de>
- Change __copy_to_user to memdup_user
- Change __put_user to put_user
- Change type of variables to __type for compatible 32 and 64-bit systems
- Add check for maximum xfer data size
- Change lookup data mechanism to get jtag data from inode
- Add .compat_ioctl to file ops
- Add mem alignment for jtag priv data
Comments pointed by Tobias Klauser <tklauser@distanz.ch>
- Change function names to avoid match with variable types
- Fix description for jtag_ru_test_idle in uapi jtag.h
- Fix misprints IDEL/IDLE, trough/through
---
Documentation/ioctl/ioctl-number.txt | 2 +
MAINTAINERS | 8 +
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/jtag/Kconfig | 17 ++
drivers/jtag/Makefile | 1 +
drivers/jtag/jtag.c | 274 ++++++++++++++++++++++++++++++++++
include/linux/jtag.h | 41 +++++
include/uapi/linux/jtag.h | 109 ++++++++++++++
9 files changed, 455 insertions(+), 0 deletions(-)
create mode 100644 drivers/jtag/Kconfig
create mode 100644 drivers/jtag/Makefile
create mode 100644 drivers/jtag/jtag.c
create mode 100644 include/linux/jtag.h
create mode 100644 include/uapi/linux/jtag.h
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 7f7413e..886e676 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -318,6 +318,8 @@ Code Seq#(hex) Include File Comments
0xB0 all RATIO devices in development:
<mailto:vgo@ratio.de>
0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
+0xB2 00-0F linux/jtag.h JTAG driver
+ <mailto:oleksandrs@mellanox.com>
0xB3 00 linux/mmc/ioctl.h
0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org>
0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org>
diff --git a/MAINTAINERS b/MAINTAINERS
index 79bb02f..e7b8b2c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7610,6 +7610,14 @@ L: linux-serial at vger.kernel.org
S: Maintained
F: drivers/tty/serial/jsm/
+JTAG SUBSYSTEM
+M: Oleksandr Shamray <oleksandrs@mellanox.com>
+M: Vadim Pasternak <vadimp@mellanox.com>
+S: Maintained
+F: include/linux/jtag.h
+F: include/uapi/linux/jtag.h
+F: drivers/jtag/
+
K10TEMP HARDWARE MONITORING DRIVER
M: Clemens Ladisch <clemens@ladisch.de>
L: linux-hwmon at vger.kernel.org
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 95b9ccc..bb71e48 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -217,4 +217,6 @@ source "drivers/siox/Kconfig"
source "drivers/slimbus/Kconfig"
+source "drivers/jtag/Kconfig"
+
endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index 24cd470..c92636b 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -185,3 +185,4 @@ obj-$(CONFIG_TEE) += tee/
obj-$(CONFIG_MULTIPLEXER) += mux/
obj-$(CONFIG_UNISYS_VISORBUS) += visorbus/
obj-$(CONFIG_SIOX) += siox/
+obj-$(CONFIG_JTAG) += jtag/
diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
new file mode 100644
index 0000000..47771fc
--- /dev/null
+++ b/drivers/jtag/Kconfig
@@ -0,0 +1,17 @@
+menuconfig JTAG
+ tristate "JTAG support"
+ help
+ This provides basic core functionality support for JTAG class devices.
+ Hardware that is equipped with a JTAG microcontroller can be
+ supported by using this driver's interfaces.
+ This driver exposes a set of IOCTLs to the user space for
+ the following commands:
+ SDR: Performs an IEEE 1149.1 Data Register scan
+ SIR: Performs an IEEE 1149.1 Instruction Register scan.
+ RUNTEST: Forces the IEEE 1149.1 bus to a run state for a specified
+ number of clocks or a specified time period.
+
+ If you want this support, you should say Y here.
+
+ To compile this driver as a module, choose M here: the module will
+ be called jtag.
diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
new file mode 100644
index 0000000..af37493
--- /dev/null
+++ b/drivers/jtag/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_JTAG) += jtag.o
diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c
new file mode 100644
index 0000000..6657b84
--- /dev/null
+++ b/drivers/jtag/jtag.c
@@ -0,0 +1,274 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// drivers/jtag/jtag.c
+//
+// Copyright (c) 2018 Mellanox Technologies. All rights reserved.
+// Copyright (c) 2018 Oleksandr Shamray <oleksandrs@mellanox.com>
+
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/jtag.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/miscdevice.h>
+#include <linux/module.h>
+#include <linux/rtnetlink.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <uapi/linux/jtag.h>
+
+struct jtag {
+ struct miscdevice miscdev;
+ const struct jtag_ops *ops;
+ int id;
+ unsigned long priv[0];
+};
+
+static DEFINE_IDA(jtag_ida);
+
+void *jtag_priv(struct jtag *jtag)
+{
+ return jtag->priv;
+}
+EXPORT_SYMBOL_GPL(jtag_priv);
+
+static long jtag_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ struct jtag *jtag = file->private_data;
+ struct jtag_run_test_idle idle;
+ struct jtag_xfer xfer;
+ u8 *xfer_data;
+ u32 data_size;
+ u32 value;
+ int err;
+
+ if (!arg)
+ return -EINVAL;
+
+ switch (cmd) {
+ case JTAG_GIOCFREQ:
+ if (!jtag->ops->freq_get)
+ return -EOPNOTSUPP;
+
+ err = jtag->ops->freq_get(jtag, &value);
+ if (err)
+ break;
+
+ if (put_user(value, (__u32 __user *)arg))
+ err = -EFAULT;
+ break;
+
+ case JTAG_SIOCFREQ:
+ if (!jtag->ops->freq_set)
+ return -EOPNOTSUPP;
+
+ if (get_user(value, (__u32 __user *)arg))
+ return -EFAULT;
+ if (value == 0)
+ return -EINVAL;
+
+ err = jtag->ops->freq_set(jtag, value);
+ break;
+
+ case JTAG_IOCRUNTEST:
+ if (copy_from_user(&idle, (const void __user *)arg,
+ sizeof(struct jtag_run_test_idle)))
+ return -EFAULT;
+
+ if (idle.endstate > JTAG_STATE_PAUSEDR)
+ return -EINVAL;
+
+ if (idle.reset > JTAG_FORCE_RESET)
+ return -EINVAL;
+
+ err = jtag->ops->idle(jtag, &idle);
+ break;
+
+ case JTAG_IOCXFER:
+ if (copy_from_user(&xfer, (const void __user *)arg,
+ sizeof(struct jtag_xfer)))
+ return -EFAULT;
+
+ if (xfer.length >= JTAG_MAX_XFER_DATA_LEN)
+ return -EINVAL;
+
+ if (xfer.type > JTAG_SDR_XFER)
+ return -EINVAL;
+
+ if (xfer.direction > JTAG_WRITE_XFER)
+ return -EINVAL;
+
+ if (xfer.endstate > JTAG_STATE_PAUSEDR)
+ return -EINVAL;
+
+ data_size = DIV_ROUND_UP(xfer.length, BITS_PER_BYTE);
+ xfer_data = memdup_user(u64_to_user_ptr(xfer.tdio), data_size);
+ if (IS_ERR(xfer_data))
+ return -EFAULT;
+
+ err = jtag->ops->xfer(jtag, &xfer, xfer_data);
+ if (err) {
+ kfree(xfer_data);
+ return err;
+ }
+
+ err = copy_to_user(u64_to_user_ptr(xfer.tdio),
+ (void *)xfer_data, data_size);
+ kfree(xfer_data);
+ if (err)
+ return -EFAULT;
+
+ if (copy_to_user((void __user *)arg, (void *)&xfer,
+ sizeof(struct jtag_xfer)))
+ return -EFAULT;
+ break;
+
+ case JTAG_GIOCSTATUS:
+ err = jtag->ops->status_get(jtag, &value);
+ if (err)
+ break;
+
+ err = put_user(value, (__u32 __user *)arg);
+ break;
+ case JTAG_SIOCMODE:
+ if (!jtag->ops->mode_set)
+ return -EOPNOTSUPP;
+
+ if (get_user(value, (__u32 __user *)arg))
+ return -EFAULT;
+ if (value == 0)
+ return -EINVAL;
+
+ err = jtag->ops->mode_set(jtag, value);
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ return err;
+}
+
+static int jtag_open(struct inode *inode, struct file *file)
+{
+ struct jtag *jtag = container_of(file->private_data, struct jtag, miscdev);
+
+ file->private_data = jtag;
+ return nonseekable_open(inode, file);
+}
+
+static const struct file_operations jtag_fops = {
+ .owner = THIS_MODULE,
+ .open = jtag_open,
+ .llseek = noop_llseek,
+ .unlocked_ioctl = jtag_ioctl,
+};
+
+struct jtag *jtag_alloc(struct device *host, size_t priv_size,
+ const struct jtag_ops *ops)
+{
+ struct jtag *jtag;
+
+ if (!host)
+ return NULL;
+
+ if (!ops)
+ return NULL;
+
+ if (!ops->idle || !ops->status_get || !ops->xfer)
+ return NULL;
+
+ jtag = kzalloc(sizeof(*jtag) + priv_size, GFP_KERNEL);
+ if (!jtag)
+ return NULL;
+
+ jtag->ops = ops;
+ jtag->miscdev.parent = host;
+
+ return jtag;
+}
+EXPORT_SYMBOL_GPL(jtag_alloc);
+
+void jtag_free(struct jtag *jtag)
+{
+ kfree(jtag);
+}
+EXPORT_SYMBOL_GPL(jtag_free);
+
+static int jtag_register(struct jtag *jtag)
+{
+ struct device *dev = jtag->miscdev.parent;
+ int err;
+ int id;
+
+ if (!dev)
+ return -ENODEV;
+
+ id = ida_simple_get(&jtag_ida, 0, 0, GFP_KERNEL);
+ if (id < 0)
+ return id;
+
+ jtag->id = id;
+
+ jtag->miscdev.fops = &jtag_fops;
+ jtag->miscdev.minor = MISC_DYNAMIC_MINOR;
+ jtag->miscdev.name = kasprintf(GFP_KERNEL, "jtag%d", id);
+ if (!jtag->miscdev.name) {
+ err = -ENOMEM;
+ goto err_jtag_alloc;
+ }
+
+ err = misc_register(&jtag->miscdev);
+ if (err) {
+ dev_err(jtag->miscdev.parent, "Unable to register device\n");
+ goto err_jtag_name;
+ }
+ return 0;
+
+err_jtag_name:
+ kfree(jtag->miscdev.name);
+err_jtag_alloc:
+ ida_simple_remove(&jtag_ida, id);
+ return err;
+}
+
+static void jtag_unregister(struct jtag *jtag)
+{
+ misc_deregister(&jtag->miscdev);
+ kfree(jtag->miscdev.name);
+ ida_simple_remove(&jtag_ida, jtag->id);
+}
+
+static void devm_jtag_unregister(struct device *dev, void *res)
+{
+ jtag_unregister(*(struct jtag **)res);
+}
+
+int devm_jtag_register(struct device *dev, struct jtag *jtag)
+{
+ struct jtag **ptr;
+ int ret;
+
+ ptr = devres_alloc(devm_jtag_unregister, sizeof(*ptr), GFP_KERNEL);
+ if (!ptr)
+ return -ENOMEM;
+
+ ret = jtag_register(jtag);
+ if (!ret) {
+ *ptr = jtag;
+ devres_add(dev, ptr);
+ } else {
+ devres_free(ptr);
+ }
+ return ret;
+}
+EXPORT_SYMBOL_GPL(devm_jtag_register);
+
+static void __exit jtag_exit(void)
+{
+ ida_destroy(&jtag_ida);
+}
+
+module_exit(jtag_exit);
+
+MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>");
+MODULE_DESCRIPTION("Generic jtag support");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/jtag.h b/include/linux/jtag.h
new file mode 100644
index 0000000..fd5dd79
--- /dev/null
+++ b/include/linux/jtag.h
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0
+// include/linux/jtag.h - JTAG class driver
+//
+// Copyright (c) 2018 Mellanox Technologies. All rights reserved.
+// Copyright (c) 2018 Oleksandr Shamray <oleksandrs@mellanox.com>
+
+#ifndef __JTAG_H
+#define __JTAG_H
+
+#include <linux/types.h>
+#include <uapi/linux/jtag.h>
+
+#define JTAG_MAX_XFER_DATA_LEN 65535
+
+struct jtag;
+/**
+ * struct jtag_ops - callbacks for JTAG control functions:
+ *
+ * @freq_get: get frequency function. Filled by dev driver
+ * @freq_set: set frequency function. Filled by dev driver
+ * @status_get: set status function. Mandatory func. Filled by dev driver
+ * @idle: set JTAG to idle state function. Mandatory func. Filled by dev driver
+ * @xfer: send JTAG xfer function. Mandatory func. Filled by dev driver
+ * @mode_set: set specific work mode for JTAG. Filled by dev driver
+ */
+struct jtag_ops {
+ int (*freq_get)(struct jtag *jtag, u32 *freq);
+ int (*freq_set)(struct jtag *jtag, u32 freq);
+ int (*status_get)(struct jtag *jtag, u32 *state);
+ int (*idle)(struct jtag *jtag, struct jtag_run_test_idle *idle);
+ int (*xfer)(struct jtag *jtag, struct jtag_xfer *xfer, u8 *xfer_data);
+ int (*mode_set)(struct jtag *jtag, u32 mode_mask);
+};
+
+void *jtag_priv(struct jtag *jtag);
+int devm_jtag_register(struct device *dev, struct jtag *jtag);
+struct jtag *jtag_alloc(struct device *host, size_t priv_size,
+ const struct jtag_ops *ops);
+void jtag_free(struct jtag *jtag);
+
+#endif /* __JTAG_H */
diff --git a/include/uapi/linux/jtag.h b/include/uapi/linux/jtag.h
new file mode 100644
index 0000000..4f521b8
--- /dev/null
+++ b/include/uapi/linux/jtag.h
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0
+// include/uapi/linux/jtag.h - JTAG class driver uapi
+//
+// Copyright (c) 2018 Mellanox Technologies. All rights reserved.
+// Copyright (c) 2018 Oleksandr Shamray <oleksandrs@mellanox.com>
+
+#ifndef __UAPI_LINUX_JTAG_H
+#define __UAPI_LINUX_JTAG_H
+
+/*
+ * JTAG_XFER_HW_MODE: JTAG hardware mode. Used to set HW drived or bitbang
+ * mode. This is bitmask param of ioctl JTAG_SIOCMODE command
+ */
+#define JTAG_XFER_HW_MODE 1
+
+/**
+ * enum jtag_endstate:
+ *
+ * @JTAG_STATE_IDLE: JTAG state machine IDLE state
+ * @JTAG_STATE_PAUSEIR: JTAG state machine PAUSE_IR state
+ * @JTAG_STATE_PAUSEDR: JTAG state machine PAUSE_DR state
+ */
+enum jtag_endstate {
+ JTAG_STATE_IDLE = 0,
+ JTAG_STATE_PAUSEIR = 1,
+ JTAG_STATE_PAUSEDR = 2,
+};
+
+/**
+ * enum jtag_reset:
+ *
+ * @JTAG_NO_RESET: JTAG run TAP from current state
+ * @JTAG_FORCE_RESET: JTAG force TAP to reset state
+ */
+enum jtag_reset {
+ JTAG_NO_RESET = 0,
+ JTAG_FORCE_RESET = 1,
+};
+
+/**
+ * enum jtag_xfer_type:
+ *
+ * @JTAG_SIR_XFER: SIR transfer
+ * @JTAG_SDR_XFER: SDR transfer
+ */
+enum jtag_xfer_type {
+ JTAG_SIR_XFER = 0,
+ JTAG_SDR_XFER = 1,
+};
+
+/**
+ * enum jtag_xfer_direction:
+ *
+ * @JTAG_READ_XFER: read transfer
+ * @JTAG_WRITE_XFER: write transfer
+ */
+enum jtag_xfer_direction {
+ JTAG_READ_XFER = 0,
+ JTAG_WRITE_XFER = 1,
+};
+
+/**
+ * struct jtag_run_test_idle - forces JTAG state machine to
+ * RUN_TEST/IDLE state
+ *
+ * @reset: 0 - run IDLE/PAUSE from current state
+ * 1 - go through TEST_LOGIC/RESET state before IDLE/PAUSE
+ * @end: completion flag
+ * @tck: clock counter
+ *
+ * Structure provide interface to JTAG device for JTAG IDLE execution.
+ */
+struct jtag_run_test_idle {
+ __u8 reset;
+ __u8 endstate;
+ __u8 tck;
+};
+
+/**
+ * struct jtag_xfer - jtag xfer:
+ *
+ * @type: transfer type
+ * @direction: xfer direction
+ * @length: xfer bits len
+ * @tdio : xfer data array
+ * @endir: xfer end state
+ *
+ * Structure provide interface to JTAG device for JTAG SDR/SIR xfer execution.
+ */
+struct jtag_xfer {
+ __u8 type;
+ __u8 direction;
+ __u8 endstate;
+ __u8 padding;
+ __u32 length;
+ __u64 tdio;
+};
+
+/* ioctl interface */
+#define __JTAG_IOCTL_MAGIC 0xb2
+
+#define JTAG_IOCRUNTEST _IOW(__JTAG_IOCTL_MAGIC, 0, struct jtag_run_test_idle)
+#define JTAG_SIOCFREQ _IOW(__JTAG_IOCTL_MAGIC, 1, unsigned int)
+#define JTAG_GIOCFREQ _IOR(__JTAG_IOCTL_MAGIC, 2, unsigned int)
+#define JTAG_IOCXFER _IOWR(__JTAG_IOCTL_MAGIC, 3, struct jtag_xfer)
+#define JTAG_GIOCSTATUS _IOWR(__JTAG_IOCTL_MAGIC, 4, enum jtag_endstate)
+#define JTAG_SIOCMODE _IOW(__JTAG_IOCTL_MAGIC, 5, unsigned int)
+
+#endif /* __UAPI_LINUX_JTAG_H */
--
1.7.1
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