* [PATCH] ARM: mcpm, perf/arm-cci: export mcpm_is_available
From: Russell King - ARM Linux @ 2018-05-29 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529153013.GH17159@arm.com>
On Tue, May 29, 2018 at 04:30:14PM +0100, Will Deacon wrote:
> Hi Arnd, Russell, [+Nico and Robin]
>
> On Mon, May 28, 2018 at 05:44:36PM +0200, Arnd Bergmann wrote:
> > Now that the ARM CCI PMU driver can be built as a loadable module,
> > we get a link failure when MCPM is enabled:
> >
> > ERROR: "mcpm_is_available" [drivers/perf/arm-cci.ko] undefined!
> >
> > The simplest fix is to export that helper function.
> >
> > Fixes: 8b0c93c20ef7 ("perf/arm-cci: Allow building as a module")
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> > ---
> > The patch that caused this is currently part of the arm-perf/for-next/perf
> > branch, it would be good to have the fix there as well.
> > ---
> > arch/arm/common/mcpm_entry.c | 2 ++
> > 1 file changed, 2 insertions(+)
>
> I'm happy to take this via the arm perf tree if others are ok with that.
> Alternatively, I can revert the offending commit if there are objections
> to exporting the symbol.
>
> Russell: do you any preference?
As it claims to fix 8b0c93c20ef7, which I don't have, I can't take this
patch. Do we know which tree has this?
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
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^ permalink raw reply
* [PATCH] ARM: mcpm, perf/arm-cci: export mcpm_is_available
From: Will Deacon @ 2018-05-29 15:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180528154448.2494709-1-arnd@arndb.de>
Hi Arnd, Russell, [+Nico and Robin]
On Mon, May 28, 2018 at 05:44:36PM +0200, Arnd Bergmann wrote:
> Now that the ARM CCI PMU driver can be built as a loadable module,
> we get a link failure when MCPM is enabled:
>
> ERROR: "mcpm_is_available" [drivers/perf/arm-cci.ko] undefined!
>
> The simplest fix is to export that helper function.
>
> Fixes: 8b0c93c20ef7 ("perf/arm-cci: Allow building as a module")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> The patch that caused this is currently part of the arm-perf/for-next/perf
> branch, it would be good to have the fix there as well.
> ---
> arch/arm/common/mcpm_entry.c | 2 ++
> 1 file changed, 2 insertions(+)
I'm happy to take this via the arm perf tree if others are ok with that.
Alternatively, I can revert the offending commit if there are objections
to exporting the symbol.
Russell: do you any preference?
Thanks,
Will
> diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c
> index ed9e87ddbb06..037a4479b8c3 100644
> --- a/arch/arm/common/mcpm_entry.c
> +++ b/arch/arm/common/mcpm_entry.c
> @@ -9,6 +9,7 @@
> * published by the Free Software Foundation.
> */
>
> +#include <linux/export.h>
> #include <linux/kernel.h>
> #include <linux/init.h>
> #include <linux/irqflags.h>
> @@ -174,6 +175,7 @@ bool mcpm_is_available(void)
> {
> return (platform_ops) ? true : false;
> }
> +EXPORT_SYMBOL_GPL(mcpm_is_available);
>
> /*
> * We can't use regular spinlocks. In the switcher case, it is possible
> --
> 2.9.0
>
^ permalink raw reply
* [PATCH v9 00/12] Support PPTT for ARM64
From: Jeremy Linton @ 2018-05-29 15:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <551905a6-eaa8-97df-06ec-1ceedfbc164f@arm.com>
Hi,
On 05/29/2018 08:18 AM, Sudeep Holla wrote:
>
>
> On 29/05/18 12:56, Geert Uytterhoeven wrote:
>> Hi Sudeep,
>>
>> On Tue, May 29, 2018 at 1:14 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
>>> On 29/05/18 11:48, Geert Uytterhoeven wrote:
>>>> On Thu, May 17, 2018 at 7:05 PM, Catalin Marinas
>>>> <catalin.marinas@arm.com> wrote:
>>>>> On Fri, May 11, 2018 at 06:57:55PM -0500, Jeremy Linton wrote:
>>>>>> Jeremy Linton (12):
>>>>>> drivers: base: cacheinfo: move cache_setup_of_node()
>>>>>> drivers: base: cacheinfo: setup DT cache properties early
>>>>>> cacheinfo: rename of_node to fw_token
>>>>>> arm64/acpi: Create arch specific cpu to acpi id helper
>>>>>> ACPI/PPTT: Add Processor Properties Topology Table parsing
>>>>>> ACPI: Enable PPTT support on ARM64
>>>>>> drivers: base cacheinfo: Add support for ACPI based firmware tables
>>>>>> arm64: Add support for ACPI based firmware tables
>>>>>> arm64: topology: rename cluster_id
>>>>>> arm64: topology: enable ACPI/PPTT based CPU topology
>>>>>> ACPI: Add PPTT to injectable table list
>>>>>> arm64: topology: divorce MC scheduling domain from core_siblings
>>>>>
>>>>> Queued for 4.18 (without Sudeep's latest property_read_u64 cacheinfo
>>>>> patch - http://lkml.kernel.org/r/20180517154701.GA20281 at e107155-lin; I
>>>>> can add it separately).
>>>>
>>>> This is now commit 37c3ec2d810f87ea ("arm64: topology: divorce MC
>>>> scheduling domain from core_siblings") in arm64/for-next/core, causing
>>>> system suspend on big.LITTLE systems to hang after shutting down the first
>>>> CPU:
>>>>
>>>> $ echo mem > /sys/power/state
>>>> PM: suspend entry (deep)
>>>> PM: Syncing filesystems ... done.
>>>> Freezing user space processes ... (elapsed 0.001 seconds) done.
>>>> OOM killer disabled.
>>>> Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>>>> Disabling non-boot CPUs ...
>>>> CPU1: shutdown
>>>> psci: CPU1 killed.
>>>>
>>>
>>> Is it OK to assume the suspend failed just after shutting down one CPU
>>> or it's failing during resume ? It depends on whether you had console
>>> disabled or not.
>>
>> I have no-console-suspend enabled.
>> It's failing during suspend, the next lines should be:
>>
>> CPU2: shutdown
>> psci: CPU2 killed.
>> ...
>>
>
> OK, I was hoping to be something during resume as this patch has nothing
> executed during suspend. Do you see any change in topology before and
> after this patch applied. I am interested in the output of:
>
> $ grep "" /sys/devices/system/cpu/cpu*/topology/*
>
>>>> For me, it fails on the following big.LITTLE systems:
>>>>
>>>> R-Car H3 ES2.0 (4xCA57 + 4xCA53)
>>>> R-Car M3-W (2xCA57 + 4xCA53)
>>>>
>>>
>>> Interesting, is it PSCI based system suspend ?
>>
>> Yes it is.
>>
>> Suspend-to-idle, which doesn't offline CPUs, still works.
>>
>
> From DT, I guess this platform doesn't have any idle states.
> Does this use genpd power domains ? I see power-domains in the DT, so
> asking to get more info. Do you have any out of tree patches especially
> if they are depending on some topology cpumasks ?
>
>>>> System supend still works fine on systems with big cores only:
>>>>
>>>> R-Car H3 ES1.0 (4xCA57 (4xCA53 disabled in firmware))
>>>> R-Car M3-N (2xCA57)
>>>>
>>>> Reverting this commit fixes the issue for me.
>>>
>>> I can't find anything that relates to system suspend in these patches
>>> unless they are messing with something during CPU hot plug-in back
>>> during resume.
>>
>> It's only the last patch that introduces the breakage.
>>
>
> As specified in the commit log, it won't change any behavior for DT
> systems if it's non-NUMA or single node system. So I am still wondering
> what could trigger this regression.
>
So, presumably the problem is that the numa mask is smaller than the
normal core_siblings...
I would verify that that there is a behavior change with something like
/proc/schedstat | cut -d ' ' -f-2
There might be something odd happening with whether you have CONFIG_NUMA
set (looking at that right now).
So, a couple quick todo's, see if the schedstat domains are changing
with/without the last patch, and also see if they are changing if you
enable/disable NUMA.
Why any of that matters for suspend isn't clear at the moment.
^ permalink raw reply
* [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma
From: Eugen Hristev @ 2018-05-29 15:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529171555.19dd723f@bbrezillon>
On 29.05.2018 18:15, Boris Brezillon wrote:
> On Tue, 29 May 2018 18:01:40 +0300
> Eugen Hristev <eugen.hristev@microchip.com> wrote:
>
>> [...]
>>
>>
>>>
>>> I think you're missing something here. We use the DMA engine in memcpy
>>> mode (SRAM -> DRAM), not in device mode (dev -> DRAM or DRAM -> dev).
>>> So there's no dmas prop defined in the DT and there should not be.
>>>
>>> Regards,
>>>
>>> Boris
>>>
>>
>> Ok, so the memcpy SRAM <-> DRAM will hog the transfer between DRAM and
>> LCD if my understanding is correct. That's the DMA that Peter wants to
>> disable with his patch ?
>>
>> Then we can then try to force NFC SRAM DMA channels to use just DDR port
>> 1 or 2 for memcpy ?
>
> You mean the dmaengine? According to "14.1.3 Master to Slave Access"
> that's already the case.
>
> Only DMAC0 can access the NFC SRAM and it's done through DMAC0:IF0,
> then access to DDR is going through port DDR port 1 (DMAC0:IF1) or 2
> (DMAC0:IF0).
If we can make NFC use port 1 only, then HLCDC could have two ports as
master 8 & 9, maybe a better bandwidth.
>
>>
>> I have also received a suggestion to try to increase the porches in
>> LCDC_LCDCFG3 .
>
> Yep, Nicolas suggested something similar. Peter, can you try that?
>
^ permalink raw reply
* [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma
From: Boris Brezillon @ 2018-05-29 15:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <e3c34fb7-4881-3f49-b43b-1b07a8ab865d@microchip.com>
On Tue, 29 May 2018 18:01:40 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> [...]
>
>
> >
> > I think you're missing something here. We use the DMA engine in memcpy
> > mode (SRAM -> DRAM), not in device mode (dev -> DRAM or DRAM -> dev).
> > So there's no dmas prop defined in the DT and there should not be.
> >
> > Regards,
> >
> > Boris
> >
>
> Ok, so the memcpy SRAM <-> DRAM will hog the transfer between DRAM and
> LCD if my understanding is correct. That's the DMA that Peter wants to
> disable with his patch ?
>
> Then we can then try to force NFC SRAM DMA channels to use just DDR port
> 1 or 2 for memcpy ?
You mean the dmaengine? According to "14.1.3 Master to Slave Access"
that's already the case.
Only DMAC0 can access the NFC SRAM and it's done through DMAC0:IF0,
then access to DDR is going through port DDR port 1 (DMAC0:IF1) or 2
(DMAC0:IF0).
>
> I have also received a suggestion to try to increase the porches in
> LCDC_LCDCFG3 .
Yep, Nicolas suggested something similar. Peter, can you try that?
^ permalink raw reply
* [PATCH v2] ARM: DTS: imx53: Add support for imx53 HSC/DDC boards from K+P
From: Fabio Estevam @ 2018-05-29 15:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180519121506.32344-1-lukma@denx.de>
On Sat, May 19, 2018 at 9:15 AM, Lukasz Majewski <lukma@denx.de> wrote:
> This commit provides support for HSC and DDC boards from
> Kieback&Peter GmbH vendor.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
^ permalink raw reply
* [PATCH] ARM: DTS: imx53: Add support for imx53 HSC/DDC boards from K+P
From: Lukasz Majewski @ 2018-05-29 15:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOMZO5AU8PDEErHeU1yb9mwgNLJUvWipTrDsY8csXSHiNro-7w@mail.gmail.com>
Hi Fabio,
> Hi Lukasz,
>
> On Tue, May 29, 2018 at 10:58 AM, Lukasz Majewski <lukma@denx.de>
> wrote:
>
> > Sorry for "small" delay on this.
> >
> > Ok, so I've investigated the issue:
> >
> > 1. The code, which you pasted:
> > http://code.bulix.org/ik01yu-339697
> >
> > works correctly as imx53-qsb-common.dtsi directly includes
> > "imx53.dtsi" in which iomuxc label is defined.
> >
> > In my case though,
> >
> > 2. I do include imx53-tqma53.dtsi [1], in which the iomuxc" label
> > is extended:
> >
> > &iomuxc {
> > pinctrl-names = "default";
> > pinctrl-0 = <&pinctrl_hog>;
> >
> > imx53-tqma53 {
> > pinctrl_hog: hoggrp {
> >
> > .......
> >
> > };
> >
> > The imx53-tqma53.dtsi then includes imx53.dtsi.
> >
> > Moreover, my file -> imx53-kp.dtsi as it includes [1], it extends
> > further the &iomuxc label:
> >
> > &iomuxc {
> > pinctrl-names = "default";
> > pinctrl-0 = <&pinctrl_kp_common>;
> >
> > imx53-kp-common {
> > pinctrl_buzzer: buzzergrp {
> > .......
> > };
> >
> > So, when I remove imx53-kp-common I will have mismatch with [1]
> > iomuxc structure.
> >
> > The code works as expected when I do remove imx53-tqma53 in [1].
> >
> > However, I would prefer to not touch this imx53-tqma53.dtsi file.
> > It is also included in: imx53-mba53.dts, which extends iomux in
> > following way:
> >
> > &iomuxc {
> > lvds1 {
> > pinctrl_lvds1_1: lvds1-grp1 {
> >
> >
> > Here I would need to remove lvds1, disp1 and tve to make it working.
> > However, it will not break during build, but at run time.
> >
> > Considering the above, I would prefer to leave the code in [1] as is
> > and use imx53-kp-common as well (as in v2 of this patch).
> >
> > Fabio, what do you think?
>
> Ok, thanks for the clarification. I just wanted to make sure we did
> not have some kind of iomux bug there.
>
> I think your proposed patch is fine then.
Would you be so kind and add your Reviwed-by or Acked-by tag to second
version of this patch?
[PATCH v2] ARM: DTS: imx53: Add support for imx53 HSC/DDC boards from
K+P
>
> Thanks
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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^ permalink raw reply
* [PATCH v9 00/12] Support PPTT for ARM64
From: Will Deacon @ 2018-05-29 15:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <551905a6-eaa8-97df-06ec-1ceedfbc164f@arm.com>
On Tue, May 29, 2018 at 02:18:40PM +0100, Sudeep Holla wrote:
> On 29/05/18 12:56, Geert Uytterhoeven wrote:
> > On Tue, May 29, 2018 at 1:14 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
> >> On 29/05/18 11:48, Geert Uytterhoeven wrote:
> >>> System supend still works fine on systems with big cores only:
> >>>
> >>> R-Car H3 ES1.0 (4xCA57 (4xCA53 disabled in firmware))
> >>> R-Car M3-N (2xCA57)
> >>>
> >>> Reverting this commit fixes the issue for me.
> >>
> >> I can't find anything that relates to system suspend in these patches
> >> unless they are messing with something during CPU hot plug-in back
> >> during resume.
> >
> > It's only the last patch that introduces the breakage.
> >
>
> As specified in the commit log, it won't change any behavior for DT
> systems if it's non-NUMA or single node system. So I am still wondering
> what could trigger this regression.
I wonder if we're somehow giving an uninitialised/invalid NUMA configuration
to the scheduler, although I can't see how this would happen.
Geert -- if you enable CONFIG_DEBUG_PER_CPU_MAPS=y and apply the diff below
do you see anything shouting in dmesg?
Will
--->8
diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
index dad128ba98bf..e3de033339b4 100644
--- a/arch/arm64/mm/numa.c
+++ b/arch/arm64/mm/numa.c
@@ -58,7 +58,7 @@ EXPORT_SYMBOL(node_to_cpumask_map);
*/
const struct cpumask *cpumask_of_node(int node)
{
- if (WARN_ON(node >= nr_node_ids))
+ if (WARN_ON((unsigned)node >= nr_node_ids))
return cpu_none_mask;
if (WARN_ON(node_to_cpumask_map[node] == NULL))
^ permalink raw reply related
* [PATCH v3 8/8] ARM: dts: rcar-gen2: Remove unused VIN properties
From: Jacopo Mondi @ 2018-05-29 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527606359-19261-1-git-send-email-jacopo+renesas@jmondi.org>
The 'bus-width' and 'pclk-sample' properties are not parsed by the VIN
driver and only confuse users. Remove them in all Gen2 SoC that use
them.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
v3:
- remove bus-width from dt-bindings example
---
Documentation/devicetree/bindings/media/rcar_vin.txt | 1 -
arch/arm/boot/dts/r8a7790-lager.dts | 3 ---
arch/arm/boot/dts/r8a7791-koelsch.dts | 3 ---
arch/arm/boot/dts/r8a7791-porter.dts | 1 -
arch/arm/boot/dts/r8a7793-gose.dts | 3 ---
arch/arm/boot/dts/r8a7794-alt.dts | 1 -
arch/arm/boot/dts/r8a7794-silk.dts | 1 -
7 files changed, 13 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/rcar_vin.txt b/Documentation/devicetree/bindings/media/rcar_vin.txt
index 024c109..c6d7f60 100644
--- a/Documentation/devicetree/bindings/media/rcar_vin.txt
+++ b/Documentation/devicetree/bindings/media/rcar_vin.txt
@@ -128,7 +128,6 @@ Board setup example for Gen2 platforms (vin1 composite video input)
vin1ep0: endpoint {
remote-endpoint = <&adv7180>;
- bus-width = <8>;
};
};
};
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 092610e..9cdabfcf 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -885,10 +885,8 @@
port {
vin0ep2: endpoint {
remote-endpoint = <&adv7612_out>;
- bus-width = <24>;
hsync-active = <0>;
vsync-active = <0>;
- pclk-sample = <1>;
data-active = <1>;
};
};
@@ -904,7 +902,6 @@
port {
vin1ep0: endpoint {
remote-endpoint = <&adv7180>;
- bus-width = <8>;
};
};
};
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 8ab793d..033c9e3 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -857,10 +857,8 @@
port {
vin0ep2: endpoint {
remote-endpoint = <&adv7612_out>;
- bus-width = <24>;
hsync-active = <0>;
vsync-active = <0>;
- pclk-sample = <1>;
data-active = <1>;
};
};
@@ -875,7 +873,6 @@
port {
vin1ep: endpoint {
remote-endpoint = <&adv7180>;
- bus-width = <8>;
};
};
};
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index a01101b..c16e870 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -388,7 +388,6 @@
port {
vin0ep: endpoint {
remote-endpoint = <&adv7180>;
- bus-width = <8>;
};
};
};
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index aa209f6..60aaddb 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -765,10 +765,8 @@
port {
vin0ep2: endpoint {
remote-endpoint = <&adv7612_out>;
- bus-width = <24>;
hsync-active = <0>;
vsync-active = <0>;
- pclk-sample = <1>;
data-active = <1>;
};
};
@@ -784,7 +782,6 @@
port {
vin1ep: endpoint {
remote-endpoint = <&adv7180_out>;
- bus-width = <8>;
};
};
};
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index e170275..8ed7a71 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -388,7 +388,6 @@
port {
vin0ep: endpoint {
remote-endpoint = <&adv7180>;
- bus-width = <8>;
};
};
};
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 7808aae..6adfcd6 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -477,7 +477,6 @@
port {
vin0ep: endpoint {
remote-endpoint = <&adv7180>;
- bus-width = <8>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH v3 7/8] media: rcar-vin: Handle 'hsync-as-de' property
From: Jacopo Mondi @ 2018-05-29 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527606359-19261-1-git-send-email-jacopo+renesas@jmondi.org>
Parse and handle 'hsync-as-de' custom property and set the CHS flag during
the VIN interface setup.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
v3:
- new patch
- use the new custom property to set the CHS bit
---
drivers/media/platform/rcar-vin/rcar-core.c | 6 ++++++
drivers/media/platform/rcar-vin/rcar-dma.c | 6 ++++++
drivers/media/platform/rcar-vin/rcar-vin.h | 2 ++
3 files changed, 14 insertions(+)
diff --git a/drivers/media/platform/rcar-vin/rcar-core.c b/drivers/media/platform/rcar-vin/rcar-core.c
index 3062171..71710b8 100644
--- a/drivers/media/platform/rcar-vin/rcar-core.c
+++ b/drivers/media/platform/rcar-vin/rcar-core.c
@@ -589,6 +589,7 @@ static int rvin_parallel_parse_v4l2(struct device *dev,
struct rvin_dev *vin = dev_get_drvdata(dev);
struct rvin_parallel_entity *rvpe =
container_of(asd, struct rvin_parallel_entity, asd);
+ const struct fwnode_handle *fwnode = vep->base.local_fwnode;
if (vep->base.port || vep->base.id)
return -ENOTCONN;
@@ -610,6 +611,11 @@ static int rvin_parallel_parse_v4l2(struct device *dev,
return -EINVAL;
}
+ if (fwnode_property_read_bool(fwnode, "renesas,hsync-as-de"))
+ vin->parallel->chs = true;
+ else
+ vin->parallel->chs = false;
+
return 0;
}
diff --git a/drivers/media/platform/rcar-vin/rcar-dma.c b/drivers/media/platform/rcar-vin/rcar-dma.c
index 9145b56..01d0737 100644
--- a/drivers/media/platform/rcar-vin/rcar-dma.c
+++ b/drivers/media/platform/rcar-vin/rcar-dma.c
@@ -124,6 +124,7 @@
#define VNDMR2_VPS (1 << 30)
#define VNDMR2_HPS (1 << 29)
#define VNDMR2_CES (1 << 28)
+#define VNDMR2_CHS (1 << 23)
#define VNDMR2_FTEV (1 << 17)
#define VNDMR2_VLV(n) ((n & 0xf) << 12)
@@ -703,6 +704,11 @@ static int rvin_setup(struct rvin_dev *vin)
/* Data Enable Polarity Select */
if (vin->parallel->mbus_flags & V4L2_MBUS_DATA_ENABLE_LOW)
dmr2 |= VNDMR2_CES;
+
+ /* Use HSYNC as data-enable signal */
+ if (vin->parallel->mbus_type == V4L2_MBUS_PARALLEL &&
+ vin->parallel->chs)
+ dmr2 |= VNDMR2_CHS;
}
/*
diff --git a/drivers/media/platform/rcar-vin/rcar-vin.h b/drivers/media/platform/rcar-vin/rcar-vin.h
index 8bc3704..846f978 100644
--- a/drivers/media/platform/rcar-vin/rcar-vin.h
+++ b/drivers/media/platform/rcar-vin/rcar-vin.h
@@ -78,6 +78,7 @@ struct rvin_video_format {
* @subdev: subdevice matched using async framework
* @mbus_type: media bus type
* @mbus_flags: media bus configuration flags
+ * @chs: use HSYNC as data-enable flag
* @source_pad: source pad of remote subdevice
* @sink_pad: sink pad of remote subdevice
*
@@ -88,6 +89,7 @@ struct rvin_parallel_entity {
enum v4l2_mbus_type mbus_type;
unsigned int mbus_flags;
+ bool chs;
unsigned int source_pad;
unsigned int sink_pad;
--
2.7.4
^ permalink raw reply related
* [PATCH v3 6/8] dt-bindings: rcar-vin: Add 'hsync-as-de' custom prop
From: Jacopo Mondi @ 2018-05-29 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527606359-19261-1-git-send-email-jacopo+renesas@jmondi.org>
Document the boolean custom property 'renesas,hsync-as-de' that indicates
that the HSYNC signal is internally used as data-enable, when the
CLKENB signal is not connected.
As this is a VIN specificity create a custom property specific to the R-Car
VIN driver.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
v3:
- new patch
---
Documentation/devicetree/bindings/media/rcar_vin.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/rcar_vin.txt b/Documentation/devicetree/bindings/media/rcar_vin.txt
index ff53226..024c109 100644
--- a/Documentation/devicetree/bindings/media/rcar_vin.txt
+++ b/Documentation/devicetree/bindings/media/rcar_vin.txt
@@ -60,6 +60,9 @@ from local SoC CSI-2 receivers (port1) depending on SoC.
- vsync-active: see [1] for description. Default is active high.
- data-enable-active: polarity of CLKENB signal, see [1] for
description. Default is active high.
+ - renesas,hsync-as-de: a boolean property to indicate that HSYNC signal
+ is internally used as data-enable when the CLKENB signal is
+ not available.
If both HSYNC and VSYNC polarities are not specified, embedded
synchronization is selected.
--
2.7.4
^ permalink raw reply related
* [PATCH v3 5/8] media: rcar-vin: Handle data-enable polarity
From: Jacopo Mondi @ 2018-05-29 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527606359-19261-1-git-send-email-jacopo+renesas@jmondi.org>
Handle data-enable signal polarity. If the polarity is not specifically
requested to be active low, use the active high default.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
v3:
- use new property to set the CES bit
---
drivers/media/platform/rcar-vin/rcar-dma.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/media/platform/rcar-vin/rcar-dma.c b/drivers/media/platform/rcar-vin/rcar-dma.c
index d2b7002..9145b56 100644
--- a/drivers/media/platform/rcar-vin/rcar-dma.c
+++ b/drivers/media/platform/rcar-vin/rcar-dma.c
@@ -123,6 +123,7 @@
/* Video n Data Mode Register 2 bits */
#define VNDMR2_VPS (1 << 30)
#define VNDMR2_HPS (1 << 29)
+#define VNDMR2_CES (1 << 28)
#define VNDMR2_FTEV (1 << 17)
#define VNDMR2_VLV(n) ((n & 0xf) << 12)
@@ -698,6 +699,10 @@ static int rvin_setup(struct rvin_dev *vin)
/* Vsync Signal Polarity Select */
if (!(vin->parallel->mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW))
dmr2 |= VNDMR2_VPS;
+
+ /* Data Enable Polarity Select */
+ if (vin->parallel->mbus_flags & V4L2_MBUS_DATA_ENABLE_LOW)
+ dmr2 |= VNDMR2_CES;
}
/*
--
2.7.4
^ permalink raw reply related
* [PATCH v3 4/8] dt-bindings: media: rcar-vin: Add 'data-enable-active'
From: Jacopo Mondi @ 2018-05-29 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527606359-19261-1-git-send-email-jacopo+renesas@jmondi.org>
Describe optional endpoint property 'data-enable-active' for R-Car VIN.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
v3:
- new patch
---
Documentation/devicetree/bindings/media/rcar_vin.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/rcar_vin.txt b/Documentation/devicetree/bindings/media/rcar_vin.txt
index 4d91a36..ff53226 100644
--- a/Documentation/devicetree/bindings/media/rcar_vin.txt
+++ b/Documentation/devicetree/bindings/media/rcar_vin.txt
@@ -58,6 +58,8 @@ from local SoC CSI-2 receivers (port1) depending on SoC.
- Optional properties for endpoint nodes of port at 0:
- hsync-active: see [1] for description. Default is active high.
- vsync-active: see [1] for description. Default is active high.
+ - data-enable-active: polarity of CLKENB signal, see [1] for
+ description. Default is active high.
If both HSYNC and VSYNC polarities are not specified, embedded
synchronization is selected.
--
2.7.4
^ permalink raw reply related
* [PATCH v3 3/8] media: v4l2-fwnode: parse 'data-enable-active' prop
From: Jacopo Mondi @ 2018-05-29 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527606359-19261-1-git-send-email-jacopo+renesas@jmondi.org>
Parse the newly defined 'data-enable-active' property in parallel endpoint
parsing function.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
v3:
- new patch
---
drivers/media/v4l2-core/v4l2-fwnode.c | 4 ++++
include/media/v4l2-mediabus.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c
index 3f77aa3..6105191 100644
--- a/drivers/media/v4l2-core/v4l2-fwnode.c
+++ b/drivers/media/v4l2-core/v4l2-fwnode.c
@@ -154,6 +154,10 @@ static void v4l2_fwnode_endpoint_parse_parallel_bus(
flags |= v ? V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH :
V4L2_MBUS_VIDEO_SOG_ACTIVE_LOW;
+ if (!fwnode_property_read_u32(fwnode, "data-enable-active", &v))
+ flags |= v ? V4L2_MBUS_DATA_ENABLE_HIGH :
+ V4L2_MBUS_DATA_ENABLE_LOW;
+
bus->flags = flags;
}
diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h
index 4d8626c..4bbb5f3 100644
--- a/include/media/v4l2-mediabus.h
+++ b/include/media/v4l2-mediabus.h
@@ -45,6 +45,8 @@
/* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */
#define V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH BIT(12)
#define V4L2_MBUS_VIDEO_SOG_ACTIVE_LOW BIT(13)
+#define V4L2_MBUS_DATA_ENABLE_HIGH BIT(14)
+#define V4L2_MBUS_DATA_ENABLE_LOW BIT(15)
/* Serial flags */
/* How many lanes the client can use */
--
2.7.4
^ permalink raw reply related
* [PATCH v3 2/8] dt-bindings: media: Document data-enable-active property
From: Jacopo Mondi @ 2018-05-29 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527606359-19261-1-git-send-email-jacopo+renesas@jmondi.org>
Add 'data-enable-active' property to endpoint node properties list.
The property allows to specify the polarity of the data-enable signal, which
when in active state determinates when data lanes have to sampled for valid
pixel data.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
v3:
- new patch
---
Documentation/devicetree/bindings/media/video-interfaces.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt
index 258b8df..9839d26 100644
--- a/Documentation/devicetree/bindings/media/video-interfaces.txt
+++ b/Documentation/devicetree/bindings/media/video-interfaces.txt
@@ -109,6 +109,8 @@ Optional endpoint properties
Note, that if HSYNC and VSYNC polarities are not specified, embedded
synchronization may be required, where supported.
- data-active: similar to HSYNC and VSYNC, specifies data line polarity.
+- data-enable-active: similar to HSYNC and VSYNC, specifies the data enable
+ signal polarity.
- field-even-active: field signal level during the even field data transmission.
- pclk-sample: sample data on rising (1) or falling (0) edge of the pixel clock
signal.
--
2.7.4
^ permalink raw reply related
* [PATCH v3 1/8] dt-bindings: media: rcar-vin: Describe optional ep properties
From: Jacopo Mondi @ 2018-05-29 15:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527606359-19261-1-git-send-email-jacopo+renesas@jmondi.org>
Describe the optional endpoint properties for endpoint nodes of port at 0
and port at 1 of the R-Car VIN driver device tree bindings documentation.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Acked-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
v2 -> v3:
- Do not repeat property description, just reference video-interfaces.txt
- Indent with spaces, not tabs as the rest of the document
- Do not remove (yet) the 'bus-width' property from example
---
Documentation/devicetree/bindings/media/rcar_vin.txt | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/rcar_vin.txt b/Documentation/devicetree/bindings/media/rcar_vin.txt
index 5c6f2a7..4d91a36 100644
--- a/Documentation/devicetree/bindings/media/rcar_vin.txt
+++ b/Documentation/devicetree/bindings/media/rcar_vin.txt
@@ -54,6 +54,14 @@ from local SoC CSI-2 receivers (port1) depending on SoC.
from external SoC pins described in video-interfaces.txt[1].
Describing more then one endpoint in port 0 is invalid. Only VIN
instances that are connected to external pins should have port 0.
+
+ - Optional properties for endpoint nodes of port at 0:
+ - hsync-active: see [1] for description. Default is active high.
+ - vsync-active: see [1] for description. Default is active high.
+
+ If both HSYNC and VSYNC polarities are not specified, embedded
+ synchronization is selected.
+
- port 1 - sub-nodes describing one or more endpoints connected to
the VIN from local SoC CSI-2 receivers. The endpoint numbers must
use the following schema.
@@ -63,6 +71,8 @@ from local SoC CSI-2 receivers (port1) depending on SoC.
- Endpoint 2 - sub-node describing the endpoint connected to CSI40
- Endpoint 3 - sub-node describing the endpoint connected to CSI41
+ Endpoint nodes of port at 1 do not support any optional endpoint property.
+
Device node example for Gen2 platforms
--------------------------------------
--
2.7.4
^ permalink raw reply related
* [PATCH v3 0/8] media: rcar-vin: Brush endpoint properties
From: Jacopo Mondi @ 2018-05-29 15:05 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
3rd version of VIN endpoint brushing series.
Slightly enlarged the linux-media receiver list, as this new version
introduces a common property in 'video-interfaces.txt'.
Quite some changes compared to v1/v2:
- First patch in the series changed to include Niklas' comments on using
spaces for indent over tabs in documentation and as suggested by Rob and
Laurent to refer to 'video-interfaces.txt' in property description.
- As suggested by Rob this series introduces a new property 'data-enable-active'
to describe data enable signal polarity instead of using 'data-active' which
refers to the data lanes polarity.
- Use this new property to control CLKENB pin polarity in VIN driver
- Introduce a new custom property to describe the 'use HSYNC as data-enable'
function provided by VIN. In previous iterations I used the presence of
'data-active' to enable/disable this functionality. That was confusing and
not correct as it used the wrong property. As this is a VIN specificity, I
thought a custom property is more suited.
- Last patch is still there and I know it is debated. My opinion is that it is
still needed, as the presence of those un-documented and un-parsed properties
confuses users which may expect changing those properties value to reflect on
the video interface configuration, which does not happens instead.
Individual changelog per patch when relevant.
Thanks
j
Jacopo Mondi (8):
dt-bindings: media: rcar-vin: Describe optional ep properties
dt-bindings: media: Document data-enable-active property
media: v4l2-fwnode: parse 'data-enable-active' prop
dt-bindings: media: rcar-vin: Add 'data-enable-active'
media: rcar-vin: Handle data-enable polarity
dt-bindings: rcar-vin: Add 'hsync-as-de' custom prop
media: rcar-vin: Handle 'hsync-as-de' property
ARM: dts: rcar-gen2: Remove unused VIN properties
Documentation/devicetree/bindings/media/rcar_vin.txt | 16 +++++++++++++++-
.../devicetree/bindings/media/video-interfaces.txt | 2 ++
arch/arm/boot/dts/r8a7790-lager.dts | 3 ---
arch/arm/boot/dts/r8a7791-koelsch.dts | 3 ---
arch/arm/boot/dts/r8a7791-porter.dts | 1 -
arch/arm/boot/dts/r8a7793-gose.dts | 3 ---
arch/arm/boot/dts/r8a7794-alt.dts | 1 -
arch/arm/boot/dts/r8a7794-silk.dts | 1 -
drivers/media/platform/rcar-vin/rcar-core.c | 6 ++++++
drivers/media/platform/rcar-vin/rcar-dma.c | 11 +++++++++++
drivers/media/platform/rcar-vin/rcar-vin.h | 2 ++
drivers/media/v4l2-core/v4l2-fwnode.c | 5 +++++
include/media/v4l2-mediabus.h | 2 ++
13 files changed, 43 insertions(+), 13 deletions(-)
--
2.7.4
^ permalink raw reply
* [RFC 2/6] dmaengine: xilinx_dma: Pass AXI4-Stream control words to netdev dma client
From: Peter Ujfalusi @ 2018-05-29 15:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <MWHPR02MB3293486390485A6FCCEA7DECC7910@MWHPR02MB3293.namprd02.prod.outlook.com>
Hi,
On 2018-05-17 09:39, Radhey Shyam Pandey wrote:
>> Well, let's see where this is going to go when I can send the patches
>> for review.
> Thanks all. @Peter: If we have metadata patchset ready may be good
> to send an RFC?
Sorry for the delay, I got distracted by this:
http://www.ti.com/lit/pdf/spruid7 Chapter 10.
I have given some tough to the metadata attach patches.
In my case the 'metadata' is more like private data section within the
DMA descriptor (10.1.2.2.1) which is used by the remote peripheral and
the driver for the given peripheral and it is optional.
I liked the idea of treating it as metadata as it gives more generic API
which can be adopted by other drivers if they need something similar.
Another issue I have with the attach metadata way is that it would
require one memcpy to copy the data to the DMA descriptor and in high
throughput case it is not acceptable.
For me probably a .get_private_area / .put_private_area like API would
be desirable where I can give the pointer of the 'metadata' are (and
size) to the user.
But these can co-exist in my opinion and DMA drivers can opt to
implement none, either or both of the callbacks.
In couple of days I can update the metadata patches I have atm and send
as RFC.
Is there anything from your side I should take into account when doing that?
- P?ter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply
* [PATCH v2] iommu/io-pgtable-arm: Make allocations NUMA-aware
From: Joerg Roedel @ 2018-05-29 15:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <b420b4733b5bc939931c11ee573bbb598f72e7b0.1526989635.git.robin.murphy@arm.com>
On Tue, May 22, 2018 at 12:50:09PM +0100, Robin Murphy wrote:
> Acked-by: Will Deacon <will.deacon@arm.com>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
>
> v2: Retain equivalent highmem check
>
> drivers/iommu/io-pgtable-arm.c | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
Applied, thanks.
^ permalink raw reply
* [PATCH v5 00/15] ARM Spectre variant 2 fixes
From: Russell King - ARM Linux @ 2018-05-29 15:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529145320.GJ17671@n2100.armlinux.org.uk>
FFS, yes, there's a build error in this. It's an obvious fix. I
won't be re-posting it for a third time today for such a trivial
change, but I'll fix up my local version.
On Tue, May 29, 2018 at 03:53:21PM +0100, Russell King - ARM Linux wrote:
> Sorry for another version so soon after the previous.
>
> Fifth version:
> - Really warn on the first discovery of an incorrect IBE bit, rather than
> only checking the first time around.
>
> arch/arm/include/asm/bugs.h | 6 +-
> arch/arm/include/asm/cp15.h | 3 +
> arch/arm/include/asm/cputype.h | 8 ++
> arch/arm/include/asm/kvm_asm.h | 2 -
> arch/arm/include/asm/kvm_host.h | 14 ++-
> arch/arm/include/asm/kvm_mmu.h | 23 ++++-
> arch/arm/include/asm/proc-fns.h | 4 +
> arch/arm/include/asm/system_misc.h | 15 ++++
> arch/arm/kernel/Makefile | 1 +
> arch/arm/kernel/bugs.c | 18 ++++
> arch/arm/kernel/smp.c | 4 +
> arch/arm/kernel/suspend.c | 2 +
> arch/arm/kvm/hyp/hyp-entry.S | 112 ++++++++++++++++++++++-
> arch/arm/mm/Kconfig | 23 +++++
> arch/arm/mm/Makefile | 2 +-
> arch/arm/mm/fault.c | 3 +
> arch/arm/mm/proc-macros.S | 3 +-
> arch/arm/mm/proc-v7-2level.S | 6 --
> arch/arm/mm/proc-v7-bugs.c | 176 +++++++++++++++++++++++++++++++++++++
> arch/arm/mm/proc-v7.S | 154 +++++++++++++++++++++++++-------
> 20 files changed, 529 insertions(+), 50 deletions(-)
> create mode 100644 arch/arm/kernel/bugs.c
> create mode 100644 arch/arm/mm/proc-v7-bugs.c
>
> On Tue, May 29, 2018 at 10:07:57AM +0100, Russell King - ARM Linux wrote:
> > Fourth version:
> > - Only warn once per CPU about incorrect IBE bit
> > (this avoids spamming the kernel log on cpuidle implementations that
> > use cpu_suspend() - spotted by Mark Brown.)
> >
> > arch/arm/include/asm/bugs.h | 6 +-
> > arch/arm/include/asm/cp15.h | 3 +
> > arch/arm/include/asm/cputype.h | 8 ++
> > arch/arm/include/asm/kvm_asm.h | 2 -
> > arch/arm/include/asm/kvm_host.h | 14 ++-
> > arch/arm/include/asm/kvm_mmu.h | 23 ++++-
> > arch/arm/include/asm/proc-fns.h | 4 +
> > arch/arm/include/asm/system_misc.h | 15 ++++
> > arch/arm/kernel/Makefile | 1 +
> > arch/arm/kernel/bugs.c | 18 ++++
> > arch/arm/kernel/smp.c | 4 +
> > arch/arm/kernel/suspend.c | 2 +
> > arch/arm/kvm/hyp/hyp-entry.S | 112 +++++++++++++++++++++++-
> > arch/arm/mm/Kconfig | 23 +++++
> > arch/arm/mm/Makefile | 2 +-
> > arch/arm/mm/fault.c | 3 +
> > arch/arm/mm/proc-macros.S | 3 +-
> > arch/arm/mm/proc-v7-2level.S | 6 --
> > arch/arm/mm/proc-v7-bugs.c | 173 +++++++++++++++++++++++++++++++++++++
> > arch/arm/mm/proc-v7.S | 154 ++++++++++++++++++++++++++-------
> > 20 files changed, 526 insertions(+), 50 deletions(-)
> > create mode 100644 arch/arm/kernel/bugs.c
> > create mode 100644 arch/arm/mm/proc-v7-bugs.c
> >
> > On Fri, May 25, 2018 at 02:59:39PM +0100, Russell King - ARM Linux wrote:
> > > Third version:
> > > - Remove "PSCI" from the SMC version of the workaround as well.
> > > - Avoid reporting active workaround if the IBE bit is not set.
> > > - Only probe for workaround_1 on Cortex A57 and A72, or non-ARM CPUs.
> > > - Require features probe for workaround_1 to return zero.
> > > - Validation that all CPUs in the system have the same workaround status.
> > > - Avoid corrupting r12 in workaround_1 KVM hypervisor implementation.
> > >
> > > arch/arm/include/asm/bugs.h | 6 +-
> > > arch/arm/include/asm/cp15.h | 3 +
> > > arch/arm/include/asm/cputype.h | 8 ++
> > > arch/arm/include/asm/kvm_asm.h | 2 -
> > > arch/arm/include/asm/kvm_host.h | 14 ++-
> > > arch/arm/include/asm/kvm_mmu.h | 23 ++++-
> > > arch/arm/include/asm/proc-fns.h | 4 +
> > > arch/arm/include/asm/system_misc.h | 15 ++++
> > > arch/arm/kernel/Makefile | 1 +
> > > arch/arm/kernel/bugs.c | 18 ++++
> > > arch/arm/kernel/smp.c | 4 +
> > > arch/arm/kernel/suspend.c | 2 +
> > > arch/arm/kvm/hyp/hyp-entry.S | 112 +++++++++++++++++++++++-
> > > arch/arm/mm/Kconfig | 23 +++++
> > > arch/arm/mm/Makefile | 2 +-
> > > arch/arm/mm/fault.c | 3 +
> > > arch/arm/mm/proc-macros.S | 3 +-
> > > arch/arm/mm/proc-v7-2level.S | 6 --
> > > arch/arm/mm/proc-v7-bugs.c | 170 +++++++++++++++++++++++++++++++++++++
> > > arch/arm/mm/proc-v7.S | 154 ++++++++++++++++++++++++++-------
> > > 20 files changed, 523 insertions(+), 50 deletions(-)
> > > create mode 100644 arch/arm/kernel/bugs.c
> > > create mode 100644 arch/arm/mm/proc-v7-bugs.c
> > >
> > > On Mon, May 21, 2018 at 12:42:38PM +0100, Russell King - ARM Linux wrote:
> > > > This is the second posting - the original cover note is below. Comments
> > > > from previous series addresesd:
> > > > - Drop R7 and R8 changes.
> > > > - Remove "PSCI" from the hypervisor version of the workaround.
> > > >
> > > > arch/arm/include/asm/bugs.h | 6 +-
> > > > arch/arm/include/asm/cp15.h | 3 +
> > > > arch/arm/include/asm/cputype.h | 5 ++
> > > > arch/arm/include/asm/kvm_asm.h | 2 -
> > > > arch/arm/include/asm/kvm_host.h | 14 +++-
> > > > arch/arm/include/asm/kvm_mmu.h | 23 +++++-
> > > > arch/arm/include/asm/proc-fns.h | 4 +
> > > > arch/arm/include/asm/system_misc.h | 8 ++
> > > > arch/arm/kernel/Makefile | 1 +
> > > > arch/arm/kernel/bugs.c | 18 +++++
> > > > arch/arm/kernel/smp.c | 4 +
> > > > arch/arm/kernel/suspend.c | 2 +
> > > > arch/arm/kvm/hyp/hyp-entry.S | 108 +++++++++++++++++++++++++-
> > > > arch/arm/mm/Kconfig | 23 ++++++
> > > > arch/arm/mm/Makefile | 2 +-
> > > > arch/arm/mm/fault.c | 3 +
> > > > arch/arm/mm/proc-macros.S | 3 +-
> > > > arch/arm/mm/proc-v7-2level.S | 6 --
> > > > arch/arm/mm/proc-v7-bugs.c | 130 +++++++++++++++++++++++++++++++
> > > > arch/arm/mm/proc-v7.S | 154 +++++++++++++++++++++++++++++--------
> > > > 20 files changed, 469 insertions(+), 50 deletions(-)
> > > > create mode 100644 arch/arm/kernel/bugs.c
> > > > create mode 100644 arch/arm/mm/proc-v7-bugs.c
> > > >
> > > > On Wed, May 16, 2018 at 11:59:49AM +0100, Russell King - ARM Linux wrote:
> > > > > This series addresses the Spectre variant 2 issues on ARM Cortex and
> > > > > Broadcom Brahma B15 CPUs. Due to the complexity of the bug, it is not
> > > > > possible to verify that this series fixes any of the bugs, since it
> > > > > has not been able to reproduce these exact scenarios using test
> > > > > programs.
> > > > >
> > > > > I believe that this covers the entire extent of the Spectre variant 2
> > > > > issues, with the exception of Cortex A53 and Cortex A72 processors as
> > > > > these require a substantially more complex solution (except where the
> > > > > workaround is implemented in PSCI firmware.)
> > > > >
> > > > > Spectre variant 1 is not covered by this series.
> > > > >
> > > > > The patch series is based partly on Marc Zyngier's work from February -
> > > > > two of the KVM patches are from Marc's work.
> > > > >
> > > > > The main differences are:
> > > > > - Inclusion of more processors as per current ARM Ltd security update
> > > > > documentation.
> > > > > - Extension of "bugs" infrastructure to detect Cortex A8 and Cortex A15
> > > > > CPUs missing out on the IBE bit being set on (re-)entry to the kernel
> > > > > through all paths.
> > > > > - Handle all suspect userspace-touching-kernelspace aborts irrespective
> > > > > of mapping type.
> > > > >
> > > > > The first patch will trivially conflict with the Broadcom Brahma
> > > > > updates already in arm-soc - it has been necessary to independently
> > > > > add the ID definitions for the B15 CPU.
> > > > >
> > > > > Having worked through this series, I'm of the opinion that the
> > > > > define_processor_functions macro in proc-v7 are probably more hassle
> > > > > than they're worth - here, we don't need the global equivalent symbols,
> > > > > because we never refer to them from the kernel code for any V7
> > > > > processor (MULTI_CPU is always defined.)
> > > > >
> > > > > This series is currently in my "spectre" branch (along with some
> > > > > Spectre variant 1 patches.)
> > > > >
> > > > > Please carefully review.
> > > > >
> > > > > arch/arm/include/asm/bugs.h | 6 +-
> > > > > arch/arm/include/asm/cp15.h | 3 +
> > > > > arch/arm/include/asm/cputype.h | 5 ++
> > > > > arch/arm/include/asm/kvm_asm.h | 2 -
> > > > > arch/arm/include/asm/kvm_host.h | 14 +++-
> > > > > arch/arm/include/asm/kvm_mmu.h | 23 +++++-
> > > > > arch/arm/include/asm/proc-fns.h | 4 +
> > > > > arch/arm/include/asm/system_misc.h | 8 ++
> > > > > arch/arm/kernel/Makefile | 1 +
> > > > > arch/arm/kernel/bugs.c | 18 +++++
> > > > > arch/arm/kernel/smp.c | 4 +
> > > > > arch/arm/kernel/suspend.c | 2 +
> > > > > arch/arm/kvm/hyp/hyp-entry.S | 108 ++++++++++++++++++++++++-
> > > > > arch/arm/mm/Kconfig | 23 ++++++
> > > > > arch/arm/mm/Makefile | 2 +-
> > > > > arch/arm/mm/fault.c | 3 +
> > > > > arch/arm/mm/proc-macros.S | 3 +-
> > > > > arch/arm/mm/proc-v7-2level.S | 6 --
> > > > > arch/arm/mm/proc-v7-bugs.c | 130 ++++++++++++++++++++++++++++++
> > > > > arch/arm/mm/proc-v7.S | 158 +++++++++++++++++++++++++++++--------
> > > > > 20 files changed, 471 insertions(+), 52 deletions(-)
> > > > >
> > > > > --
> > > > > RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> > > > > FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
> > > > > According to speedtest.net: 8.21Mbps down 510kbps up
> > > > >
> > > > > _______________________________________________
> > > > > linux-arm-kernel mailing list
> > > > > linux-arm-kernel at lists.infradead.org
> > > > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> > > >
> > > > --
> > > > RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> > > > FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
> > > > According to speedtest.net: 8.21Mbps down 510kbps up
> > > >
> > > > _______________________________________________
> > > > linux-arm-kernel mailing list
> > > > linux-arm-kernel at lists.infradead.org
> > > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> > >
> > > --
> > > RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> > > FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
> > > According to speedtest.net: 8.21Mbps down 510kbps up
> > >
> > > _______________________________________________
> > > linux-arm-kernel mailing list
> > > linux-arm-kernel at lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >
> > --
> > RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> > FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
> > According to speedtest.net: 8.21Mbps down 510kbps up
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> --
> RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
> According to speedtest.net: 8.21Mbps down 510kbps up
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
According to speedtest.net: 8.21Mbps down 510kbps up
^ permalink raw reply
* [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma
From: Eugen Hristev @ 2018-05-29 15:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529164911.29820e07@bbrezillon>
[...]
>
> I think you're missing something here. We use the DMA engine in memcpy
> mode (SRAM -> DRAM), not in device mode (dev -> DRAM or DRAM -> dev).
> So there's no dmas prop defined in the DT and there should not be.
>
> Regards,
>
> Boris
>
Ok, so the memcpy SRAM <-> DRAM will hog the transfer between DRAM and
LCD if my understanding is correct. That's the DMA that Peter wants to
disable with his patch ?
Then we can then try to force NFC SRAM DMA channels to use just DDR port
1 or 2 for memcpy ?
I have also received a suggestion to try to increase the porches in
LCDC_LCDCFG3 .
>>
>> >> [...]
>
>
^ permalink raw reply
* Boot failures in -next on Jetson TK1
From: Thierry Reding @ 2018-05-29 15:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180526103629.GB1564@sirena.org.uk>
On Sat, May 26, 2018 at 11:36:29AM +0100, Mark Brown wrote:
> Currently -next is failing to boot on Jetson TK1. The problem looks to
> be the Nouveau driver, during initialization it reports an address
> decode error then starts printing error messages saying "nouveau
> 57000000.gpu: fifo: SCHED_ERROR 20 []" over and over again.
>
> I've pasted the start of the errors below, you can see a full log and
> more details at:
>
> https://kernelci.org/boot/id/5b0882a259b514339779a881/
>
> The warnings about Spectre are a separate issue and don't seem to affect
> the boot.
>
> [ 15.194484] nouveau 57000000.gpu: NVIDIA GK20A (0ea000a1)
> [ 15.200109] udevd[109]: could not rename interface '3' from 'eth0' to 'enp1s0': Device or resource busy
> [ 15.206399] nouveau 57000000.gpu: imem: using IOMMU
> [ 15.315122] CPU2: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
> [ 15.320021] nouveau 57000000.gpu: Direct firmware load for nvidia/gk20a/fecs_inst.bin failed with error -2
> [ 15.384841] nouveau 57000000.gpu: Direct firmware load for nouveau/nvea_fuc409c failed with error -2
> [ 15.393972] nouveau 57000000.gpu: Direct firmware load for nouveau/fuc409c failed with error -2
> [ 15.402679] nouveau 57000000.gpu: gr: failed to load fuc409c
> [ 15.409434] CPU1: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
> [ 15.419398] CPU1: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
> [ 15.482568] tegra-mc 70019000.memory-controller: gpusrd: read @0x00041200: EMEM address decode error (EMEM decode error)
> [ 15.491232] [TTM] Zone kernel: Available graphics memory: 375202 kiB
> [ 15.502768] [TTM] Zone highmem: Available graphics memory: 1030050 kiB
> [ 15.509290] [TTM] Initializing pool allocator
> [ 15.513658] nouveau 57000000.gpu: DRM: VRAM: 0 MiB
> [ 15.518451] nouveau 57000000.gpu: DRM: GART: 1048576 MiB
> [ 15.526546] CPU1: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
> [ 15.527290] tegra-mc 70019000.memory-controller: gpusrd: read @0x00072000: EMEM address decode error (EMEM decode error)
> [ 15.537050] CPU1: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
> [ 15.546928] nouveau 57000000.gpu: fifo: SCHED_ERROR 20 []
This is a known issue that was introduced in v4.16 by a combination of
the 32-bit ARM DMA/IOMMU glue and an Tegra SMMU driver change.
There is a fix here:
http://patchwork.ozlabs.org/patch/902830/
Which got remotely NAK'ed by the DMA API maintainer. I then came up with
this, based on feedback from Christoph:
http://patchwork.ozlabs.org/project/linux-tegra/list/?series=40853
But that's kind of blocked right now, awaiting feedback. I'll send out
another version, which will hopefully strike the right balance.
Thierry
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^ permalink raw reply
* Applied "ASoC: qdsp6: dt-bindings: Add q6afe tdm dt binding" to the asoc tree
From: Mark Brown @ 2018-05-29 14:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529101833.30489-2-srinivas.kandagatla@linaro.org>
The patch
ASoC: qdsp6: dt-bindings: Add q6afe tdm dt binding
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From ad7a9b34fa532b95a7eae1a1708408a4e435a71c Mon Sep 17 00:00:00 2001
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Tue, 29 May 2018 11:18:28 +0100
Subject: [PATCH] ASoC: qdsp6: dt-bindings: Add q6afe tdm dt binding
This patch adds bindings required for TDM ports on AFE.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
.../devicetree/bindings/sound/qcom,q6afe.txt | 68 ++++++++++++++++
include/dt-bindings/sound/qcom,q6afe.h | 80 +++++++++++++++++++
2 files changed, 148 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/qcom,q6afe.txt b/Documentation/devicetree/bindings/sound/qcom,q6afe.txt
index 14335a08b963..bdbf87df8c0b 100644
--- a/Documentation/devicetree/bindings/sound/qcom,q6afe.txt
+++ b/Documentation/devicetree/bindings/sound/qcom,q6afe.txt
@@ -46,6 +46,53 @@ configuration of each dai. Must contain the following properties.
Definition: Must be list of serial data lines used by this dai.
should be one or more of the 1-4 sd lines.
+ - qcom,tdm-sync-mode:
+ Usage: required for tdm interface
+ Value type: <prop-encoded-array>
+ Definition: Synchronization mode.
+ 0 - Short sync bit mode
+ 1 - Long sync mode
+ 2 - Short sync slot mode
+
+ - qcom,tdm-sync-src:
+ Usage: required for tdm interface
+ Value type: <prop-encoded-array>
+ Definition: Synchronization source.
+ 0 - External source
+ 1 - Internal source
+
+ - qcom,tdm-data-out:
+ Usage: required for tdm interface
+ Value type: <prop-encoded-array>
+ Definition: Data out signal to drive with other masters.
+ 0 - Disable
+ 1 - Enable
+
+ - qcom,tdm-invert-sync:
+ Usage: required for tdm interface
+ Value type: <prop-encoded-array>
+ Definition: Invert the sync.
+ 0 - Normal
+ 1 - Invert
+
+ - qcom,tdm-data-delay:
+ Usage: required for tdm interface
+ Value type: <prop-encoded-array>
+ Definition: Number of bit clock to delay data
+ with respect to sync edge.
+ 0 - 0 bit clock cycle
+ 1 - 1 bit clock cycle
+ 2 - 2 bit clock cycle
+
+ - qcom,tdm-data-align:
+ Usage: required for tdm interface
+ Value type: <prop-encoded-array>
+ Definition: Indicate how data is packed
+ within the slot. For example, 32 slot width in case of
+ sample bit width is 24.
+ 0 - MSB
+ 1 - LSB
+
= EXAMPLE
q6afe at 4 {
@@ -61,6 +108,27 @@ q6afe at 4 {
reg = <1>;
};
+ tdm at 24 {
+ reg = <24>;
+ qcom,tdm-sync-mode = <1>:
+ qcom,tdm-sync-src = <1>;
+ qcom,tdm-data-out = <0>;
+ qcom,tdm-invert-sync = <1>;
+ qcom,tdm-data-delay = <1>;
+ qcom,tdm-data-align = <0>;
+
+ };
+
+ tdm at 25 {
+ reg = <25>;
+ qcom,tdm-sync-mode = <1>:
+ qcom,tdm-sync-src = <1>;
+ qcom,tdm-data-out = <0>;
+ qcom,tdm-invert-sync = <1>;
+ qcom,tdm-data-delay <1>:
+ qcom,tdm-data-align = <0>;
+ };
+
prim-mi2s-rx at 16 {
reg = <16>;
qcom,sd-lines = <1 3>;
diff --git a/include/dt-bindings/sound/qcom,q6afe.h b/include/dt-bindings/sound/qcom,q6afe.h
index e162045f5dc9..e2d3892240b8 100644
--- a/include/dt-bindings/sound/qcom,q6afe.h
+++ b/include/dt-bindings/sound/qcom,q6afe.h
@@ -26,6 +26,86 @@
#define TERTIARY_MI2S_TX 21
#define QUATERNARY_MI2S_RX 22
#define QUATERNARY_MI2S_TX 23
+#define PRIMARY_TDM_RX_0 24
+#define PRIMARY_TDM_TX_0 25
+#define PRIMARY_TDM_RX_1 26
+#define PRIMARY_TDM_TX_1 27
+#define PRIMARY_TDM_RX_2 28
+#define PRIMARY_TDM_TX_2 29
+#define PRIMARY_TDM_RX_3 30
+#define PRIMARY_TDM_TX_3 31
+#define PRIMARY_TDM_RX_4 32
+#define PRIMARY_TDM_TX_4 33
+#define PRIMARY_TDM_RX_5 34
+#define PRIMARY_TDM_TX_5 35
+#define PRIMARY_TDM_RX_6 36
+#define PRIMARY_TDM_TX_6 37
+#define PRIMARY_TDM_RX_7 38
+#define PRIMARY_TDM_TX_7 39
+#define SECONDARY_TDM_RX_0 40
+#define SECONDARY_TDM_TX_0 41
+#define SECONDARY_TDM_RX_1 42
+#define SECONDARY_TDM_TX_1 43
+#define SECONDARY_TDM_RX_2 44
+#define SECONDARY_TDM_TX_2 45
+#define SECONDARY_TDM_RX_3 46
+#define SECONDARY_TDM_TX_3 47
+#define SECONDARY_TDM_RX_4 48
+#define SECONDARY_TDM_TX_4 49
+#define SECONDARY_TDM_RX_5 50
+#define SECONDARY_TDM_TX_5 51
+#define SECONDARY_TDM_RX_6 52
+#define SECONDARY_TDM_TX_6 53
+#define SECONDARY_TDM_RX_7 54
+#define SECONDARY_TDM_TX_7 55
+#define TERTIARY_TDM_RX_0 56
+#define TERTIARY_TDM_TX_0 57
+#define TERTIARY_TDM_RX_1 58
+#define TERTIARY_TDM_TX_1 59
+#define TERTIARY_TDM_RX_2 60
+#define TERTIARY_TDM_TX_2 61
+#define TERTIARY_TDM_RX_3 62
+#define TERTIARY_TDM_TX_3 63
+#define TERTIARY_TDM_RX_4 64
+#define TERTIARY_TDM_TX_4 65
+#define TERTIARY_TDM_RX_5 66
+#define TERTIARY_TDM_TX_5 67
+#define TERTIARY_TDM_RX_6 68
+#define TERTIARY_TDM_TX_6 69
+#define TERTIARY_TDM_RX_7 70
+#define TERTIARY_TDM_TX_7 71
+#define QUATERNARY_TDM_RX_0 72
+#define QUATERNARY_TDM_TX_0 73
+#define QUATERNARY_TDM_RX_1 74
+#define QUATERNARY_TDM_TX_1 75
+#define QUATERNARY_TDM_RX_2 76
+#define QUATERNARY_TDM_TX_2 77
+#define QUATERNARY_TDM_RX_3 78
+#define QUATERNARY_TDM_TX_3 79
+#define QUATERNARY_TDM_RX_4 80
+#define QUATERNARY_TDM_TX_4 81
+#define QUATERNARY_TDM_RX_5 82
+#define QUATERNARY_TDM_TX_5 83
+#define QUATERNARY_TDM_RX_6 84
+#define QUATERNARY_TDM_TX_6 85
+#define QUATERNARY_TDM_RX_7 86
+#define QUATERNARY_TDM_TX_7 87
+#define QUINARY_TDM_RX_0 88
+#define QUINARY_TDM_TX_0 89
+#define QUINARY_TDM_RX_1 90
+#define QUINARY_TDM_TX_1 91
+#define QUINARY_TDM_RX_2 92
+#define QUINARY_TDM_TX_2 93
+#define QUINARY_TDM_RX_3 94
+#define QUINARY_TDM_TX_3 95
+#define QUINARY_TDM_RX_4 96
+#define QUINARY_TDM_TX_4 97
+#define QUINARY_TDM_RX_5 98
+#define QUINARY_TDM_TX_5 99
+#define QUINARY_TDM_RX_6 100
+#define QUINARY_TDM_TX_6 101
+#define QUINARY_TDM_RX_7 102
+#define QUINARY_TDM_TX_7 103
#endif /* __DT_BINDINGS_Q6_AFE_H__ */
--
2.17.0
^ permalink raw reply related
* Applied "ASoC: qdsp6: qdafe: add support to tdm ports" to the asoc tree
From: Mark Brown @ 2018-05-29 14:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529101833.30489-3-srinivas.kandagatla@linaro.org>
The patch
ASoC: qdsp6: qdafe: add support to tdm ports
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From dea1ffbeea60f57d123647c301ad3f0fe77392ee Mon Sep 17 00:00:00 2001
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Tue, 29 May 2018 11:18:29 +0100
Subject: [PATCH] ASoC: qdsp6: qdafe: add support to tdm ports
This patch adds support to tdm ports in AFE.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
sound/soc/qcom/qdsp6/q6afe.c | 429 ++++++++++++++++++++++++++++++++++-
sound/soc/qcom/qdsp6/q6afe.h | 20 +-
2 files changed, 447 insertions(+), 2 deletions(-)
diff --git a/sound/soc/qcom/qdsp6/q6afe.c b/sound/soc/qcom/qdsp6/q6afe.c
index de0030068ecb..01f43218984b 100644
--- a/sound/soc/qcom/qdsp6/q6afe.c
+++ b/sound/soc/qcom/qdsp6/q6afe.c
@@ -31,6 +31,7 @@
#define AFE_PORT_CMDRSP_GET_PARAM_V2 0x00010106
#define AFE_PARAM_ID_HDMI_CONFIG 0x00010210
#define AFE_MODULE_AUDIO_DEV_INTERFACE 0x0001020C
+#define AFE_MODULE_TDM 0x0001028A
#define AFE_PARAM_ID_CDC_SLIMBUS_SLAVE_CFG 0x00010235
@@ -39,6 +40,8 @@
#define AFE_PARAM_ID_SLIMBUS_CONFIG 0x00010212
#define AFE_PARAM_ID_I2S_CONFIG 0x0001020D
+#define AFE_PARAM_ID_TDM_CONFIG 0x0001029D
+#define AFE_PARAM_ID_PORT_SLOT_MAPPING_CONFIG 0x00010297
/* I2S config specific */
#define AFE_API_VERSION_I2S_CONFIG 0x1
@@ -113,10 +116,194 @@
#define AFE_PORT_ID_QUATERNARY_MI2S_RX 0x1006
#define AFE_PORT_ID_QUATERNARY_MI2S_TX 0x1007
+/* Start of the range of port IDs for TDM devices. */
+#define AFE_PORT_ID_TDM_PORT_RANGE_START 0x9000
+
+/* End of the range of port IDs for TDM devices. */
+#define AFE_PORT_ID_TDM_PORT_RANGE_END \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START+0x50-1)
+
+/* Size of the range of port IDs for TDM ports. */
+#define AFE_PORT_ID_TDM_PORT_RANGE_SIZE \
+ (AFE_PORT_ID_TDM_PORT_RANGE_END - \
+ AFE_PORT_ID_TDM_PORT_RANGE_START+1)
+
+#define AFE_PORT_ID_PRIMARY_TDM_RX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x00)
+#define AFE_PORT_ID_PRIMARY_TDM_RX_1 \
+ (AFE_PORT_ID_PRIMARY_TDM_RX + 0x02)
+#define AFE_PORT_ID_PRIMARY_TDM_RX_2 \
+ (AFE_PORT_ID_PRIMARY_TDM_RX + 0x04)
+#define AFE_PORT_ID_PRIMARY_TDM_RX_3 \
+ (AFE_PORT_ID_PRIMARY_TDM_RX + 0x06)
+#define AFE_PORT_ID_PRIMARY_TDM_RX_4 \
+ (AFE_PORT_ID_PRIMARY_TDM_RX + 0x08)
+#define AFE_PORT_ID_PRIMARY_TDM_RX_5 \
+ (AFE_PORT_ID_PRIMARY_TDM_RX + 0x0A)
+#define AFE_PORT_ID_PRIMARY_TDM_RX_6 \
+ (AFE_PORT_ID_PRIMARY_TDM_RX + 0x0C)
+#define AFE_PORT_ID_PRIMARY_TDM_RX_7 \
+ (AFE_PORT_ID_PRIMARY_TDM_RX + 0x0E)
+
+#define AFE_PORT_ID_PRIMARY_TDM_TX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x01)
+#define AFE_PORT_ID_PRIMARY_TDM_TX_1 \
+ (AFE_PORT_ID_PRIMARY_TDM_TX + 0x02)
+#define AFE_PORT_ID_PRIMARY_TDM_TX_2 \
+ (AFE_PORT_ID_PRIMARY_TDM_TX + 0x04)
+#define AFE_PORT_ID_PRIMARY_TDM_TX_3 \
+ (AFE_PORT_ID_PRIMARY_TDM_TX + 0x06)
+#define AFE_PORT_ID_PRIMARY_TDM_TX_4 \
+ (AFE_PORT_ID_PRIMARY_TDM_TX + 0x08)
+#define AFE_PORT_ID_PRIMARY_TDM_TX_5 \
+ (AFE_PORT_ID_PRIMARY_TDM_TX + 0x0A)
+#define AFE_PORT_ID_PRIMARY_TDM_TX_6 \
+ (AFE_PORT_ID_PRIMARY_TDM_TX + 0x0C)
+#define AFE_PORT_ID_PRIMARY_TDM_TX_7 \
+ (AFE_PORT_ID_PRIMARY_TDM_TX + 0x0E)
+
+#define AFE_PORT_ID_SECONDARY_TDM_RX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x10)
+#define AFE_PORT_ID_SECONDARY_TDM_RX_1 \
+ (AFE_PORT_ID_SECONDARY_TDM_RX + 0x02)
+#define AFE_PORT_ID_SECONDARY_TDM_RX_2 \
+ (AFE_PORT_ID_SECONDARY_TDM_RX + 0x04)
+#define AFE_PORT_ID_SECONDARY_TDM_RX_3 \
+ (AFE_PORT_ID_SECONDARY_TDM_RX + 0x06)
+#define AFE_PORT_ID_SECONDARY_TDM_RX_4 \
+ (AFE_PORT_ID_SECONDARY_TDM_RX + 0x08)
+#define AFE_PORT_ID_SECONDARY_TDM_RX_5 \
+ (AFE_PORT_ID_SECONDARY_TDM_RX + 0x0A)
+#define AFE_PORT_ID_SECONDARY_TDM_RX_6 \
+ (AFE_PORT_ID_SECONDARY_TDM_RX + 0x0C)
+#define AFE_PORT_ID_SECONDARY_TDM_RX_7 \
+ (AFE_PORT_ID_SECONDARY_TDM_RX + 0x0E)
+
+#define AFE_PORT_ID_SECONDARY_TDM_TX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x11)
+#define AFE_PORT_ID_SECONDARY_TDM_TX_1 \
+ (AFE_PORT_ID_SECONDARY_TDM_TX + 0x02)
+#define AFE_PORT_ID_SECONDARY_TDM_TX_2 \
+ (AFE_PORT_ID_SECONDARY_TDM_TX + 0x04)
+#define AFE_PORT_ID_SECONDARY_TDM_TX_3 \
+ (AFE_PORT_ID_SECONDARY_TDM_TX + 0x06)
+#define AFE_PORT_ID_SECONDARY_TDM_TX_4 \
+ (AFE_PORT_ID_SECONDARY_TDM_TX + 0x08)
+#define AFE_PORT_ID_SECONDARY_TDM_TX_5 \
+ (AFE_PORT_ID_SECONDARY_TDM_TX + 0x0A)
+#define AFE_PORT_ID_SECONDARY_TDM_TX_6 \
+ (AFE_PORT_ID_SECONDARY_TDM_TX + 0x0C)
+#define AFE_PORT_ID_SECONDARY_TDM_TX_7 \
+ (AFE_PORT_ID_SECONDARY_TDM_TX + 0x0E)
+
+#define AFE_PORT_ID_TERTIARY_TDM_RX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x20)
+#define AFE_PORT_ID_TERTIARY_TDM_RX_1 \
+ (AFE_PORT_ID_TERTIARY_TDM_RX + 0x02)
+#define AFE_PORT_ID_TERTIARY_TDM_RX_2 \
+ (AFE_PORT_ID_TERTIARY_TDM_RX + 0x04)
+#define AFE_PORT_ID_TERTIARY_TDM_RX_3 \
+ (AFE_PORT_ID_TERTIARY_TDM_RX + 0x06)
+#define AFE_PORT_ID_TERTIARY_TDM_RX_4 \
+ (AFE_PORT_ID_TERTIARY_TDM_RX + 0x08)
+#define AFE_PORT_ID_TERTIARY_TDM_RX_5 \
+ (AFE_PORT_ID_TERTIARY_TDM_RX + 0x0A)
+#define AFE_PORT_ID_TERTIARY_TDM_RX_6 \
+ (AFE_PORT_ID_TERTIARY_TDM_RX + 0x0C)
+#define AFE_PORT_ID_TERTIARY_TDM_RX_7 \
+ (AFE_PORT_ID_TERTIARY_TDM_RX + 0x0E)
+
+#define AFE_PORT_ID_TERTIARY_TDM_TX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x21)
+#define AFE_PORT_ID_TERTIARY_TDM_TX_1 \
+ (AFE_PORT_ID_TERTIARY_TDM_TX + 0x02)
+#define AFE_PORT_ID_TERTIARY_TDM_TX_2 \
+ (AFE_PORT_ID_TERTIARY_TDM_TX + 0x04)
+#define AFE_PORT_ID_TERTIARY_TDM_TX_3 \
+ (AFE_PORT_ID_TERTIARY_TDM_TX + 0x06)
+#define AFE_PORT_ID_TERTIARY_TDM_TX_4 \
+ (AFE_PORT_ID_TERTIARY_TDM_TX + 0x08)
+#define AFE_PORT_ID_TERTIARY_TDM_TX_5 \
+ (AFE_PORT_ID_TERTIARY_TDM_TX + 0x0A)
+#define AFE_PORT_ID_TERTIARY_TDM_TX_6 \
+ (AFE_PORT_ID_TERTIARY_TDM_TX + 0x0C)
+#define AFE_PORT_ID_TERTIARY_TDM_TX_7 \
+ (AFE_PORT_ID_TERTIARY_TDM_TX + 0x0E)
+
+#define AFE_PORT_ID_QUATERNARY_TDM_RX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x30)
+#define AFE_PORT_ID_QUATERNARY_TDM_RX_1 \
+ (AFE_PORT_ID_QUATERNARY_TDM_RX + 0x02)
+#define AFE_PORT_ID_QUATERNARY_TDM_RX_2 \
+ (AFE_PORT_ID_QUATERNARY_TDM_RX + 0x04)
+#define AFE_PORT_ID_QUATERNARY_TDM_RX_3 \
+ (AFE_PORT_ID_QUATERNARY_TDM_RX + 0x06)
+#define AFE_PORT_ID_QUATERNARY_TDM_RX_4 \
+ (AFE_PORT_ID_QUATERNARY_TDM_RX + 0x08)
+#define AFE_PORT_ID_QUATERNARY_TDM_RX_5 \
+ (AFE_PORT_ID_QUATERNARY_TDM_RX + 0x0A)
+#define AFE_PORT_ID_QUATERNARY_TDM_RX_6 \
+ (AFE_PORT_ID_QUATERNARY_TDM_RX + 0x0C)
+#define AFE_PORT_ID_QUATERNARY_TDM_RX_7 \
+ (AFE_PORT_ID_QUATERNARY_TDM_RX + 0x0E)
+
+#define AFE_PORT_ID_QUATERNARY_TDM_TX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x31)
+#define AFE_PORT_ID_QUATERNARY_TDM_TX_1 \
+ (AFE_PORT_ID_QUATERNARY_TDM_TX + 0x02)
+#define AFE_PORT_ID_QUATERNARY_TDM_TX_2 \
+ (AFE_PORT_ID_QUATERNARY_TDM_TX + 0x04)
+#define AFE_PORT_ID_QUATERNARY_TDM_TX_3 \
+ (AFE_PORT_ID_QUATERNARY_TDM_TX + 0x06)
+#define AFE_PORT_ID_QUATERNARY_TDM_TX_4 \
+ (AFE_PORT_ID_QUATERNARY_TDM_TX + 0x08)
+#define AFE_PORT_ID_QUATERNARY_TDM_TX_5 \
+ (AFE_PORT_ID_QUATERNARY_TDM_TX + 0x0A)
+#define AFE_PORT_ID_QUATERNARY_TDM_TX_6 \
+ (AFE_PORT_ID_QUATERNARY_TDM_TX + 0x0C)
+#define AFE_PORT_ID_QUATERNARY_TDM_TX_7 \
+ (AFE_PORT_ID_QUATERNARY_TDM_TX + 0x0E)
+
+#define AFE_PORT_ID_QUINARY_TDM_RX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x40)
+#define AFE_PORT_ID_QUINARY_TDM_RX_1 \
+ (AFE_PORT_ID_QUINARY_TDM_RX + 0x02)
+#define AFE_PORT_ID_QUINARY_TDM_RX_2 \
+ (AFE_PORT_ID_QUINARY_TDM_RX + 0x04)
+#define AFE_PORT_ID_QUINARY_TDM_RX_3 \
+ (AFE_PORT_ID_QUINARY_TDM_RX + 0x06)
+#define AFE_PORT_ID_QUINARY_TDM_RX_4 \
+ (AFE_PORT_ID_QUINARY_TDM_RX + 0x08)
+#define AFE_PORT_ID_QUINARY_TDM_RX_5 \
+ (AFE_PORT_ID_QUINARY_TDM_RX + 0x0A)
+#define AFE_PORT_ID_QUINARY_TDM_RX_6 \
+ (AFE_PORT_ID_QUINARY_TDM_RX + 0x0C)
+#define AFE_PORT_ID_QUINARY_TDM_RX_7 \
+ (AFE_PORT_ID_QUINARY_TDM_RX + 0x0E)
+
+#define AFE_PORT_ID_QUINARY_TDM_TX \
+ (AFE_PORT_ID_TDM_PORT_RANGE_START + 0x41)
+#define AFE_PORT_ID_QUINARY_TDM_TX_1 \
+ (AFE_PORT_ID_QUINARY_TDM_TX + 0x02)
+#define AFE_PORT_ID_QUINARY_TDM_TX_2 \
+ (AFE_PORT_ID_QUINARY_TDM_TX + 0x04)
+#define AFE_PORT_ID_QUINARY_TDM_TX_3 \
+ (AFE_PORT_ID_QUINARY_TDM_TX + 0x06)
+#define AFE_PORT_ID_QUINARY_TDM_TX_4 \
+ (AFE_PORT_ID_QUINARY_TDM_TX + 0x08)
+#define AFE_PORT_ID_QUINARY_TDM_TX_5 \
+ (AFE_PORT_ID_QUINARY_TDM_TX + 0x0A)
+#define AFE_PORT_ID_QUINARY_TDM_TX_6 \
+ (AFE_PORT_ID_QUINARY_TDM_TX + 0x0C)
+#define AFE_PORT_ID_QUINARY_TDM_TX_7 \
+ (AFE_PORT_ID_QUINARY_TDM_TX + 0x0E)
+
#define Q6AFE_LPASS_MODE_CLK1_VALID 1
#define Q6AFE_LPASS_MODE_CLK2_VALID 2
#define Q6AFE_LPASS_CLK_SRC_INTERNAL 1
#define Q6AFE_LPASS_CLK_ROOT_DEFAULT 0
+#define AFE_API_VERSION_TDM_CONFIG 1
+#define AFE_API_VERSION_SLOT_MAPPING_CONFIG 1
#define TIMEOUT_MS 1000
#define AFE_CMD_RESP_AVAIL 0
@@ -245,10 +432,27 @@ struct afe_param_id_i2s_cfg {
u16 reserved;
} __packed;
+struct afe_param_id_tdm_cfg {
+ u32 tdm_cfg_minor_version;
+ u32 num_channels;
+ u32 sample_rate;
+ u32 bit_width;
+ u16 data_format;
+ u16 sync_mode;
+ u16 sync_src;
+ u16 nslots_per_frame;
+ u16 ctrl_data_out_enable;
+ u16 ctrl_invert_sync_pulse;
+ u16 ctrl_sync_data_delay;
+ u16 slot_width;
+ u32 slot_mask;
+} __packed;
+
union afe_port_config {
struct afe_param_id_hdmi_multi_chan_audio_cfg hdmi_multi_ch;
struct afe_param_id_slimbus_cfg slim_cfg;
struct afe_param_id_i2s_cfg i2s_cfg;
+ struct afe_param_id_tdm_cfg tdm_cfg;
} __packed;
@@ -261,9 +465,18 @@ struct afe_clk_set {
uint32_t enable;
};
+struct afe_param_id_slot_mapping_cfg {
+ u32 minor_version;
+ u16 num_channels;
+ u16 bitwidth;
+ u32 data_align_type;
+ u16 ch_mapping[AFE_PORT_MAX_AUDIO_CHAN_CNT];
+} __packed;
+
struct q6afe_port {
wait_queue_head_t wait;
union afe_port_config port_cfg;
+ struct afe_param_id_slot_mapping_cfg *scfg;
struct aprv2_ibasic_rsp_result_t result;
int token;
int id;
@@ -318,6 +531,166 @@ static struct afe_port_map port_maps[AFE_PORT_MAX] = {
QUATERNARY_MI2S_RX, 1, 1},
[QUATERNARY_MI2S_TX] = { AFE_PORT_ID_QUATERNARY_MI2S_TX,
QUATERNARY_MI2S_TX, 0, 1},
+ [PRIMARY_TDM_RX_0] = { AFE_PORT_ID_PRIMARY_TDM_RX,
+ PRIMARY_TDM_RX_0, 1, 1},
+ [PRIMARY_TDM_TX_0] = { AFE_PORT_ID_PRIMARY_TDM_TX,
+ PRIMARY_TDM_TX_0, 0, 1},
+ [PRIMARY_TDM_RX_1] = { AFE_PORT_ID_PRIMARY_TDM_RX_1,
+ PRIMARY_TDM_RX_1, 1, 1},
+ [PRIMARY_TDM_TX_1] = { AFE_PORT_ID_PRIMARY_TDM_TX_1,
+ PRIMARY_TDM_TX_1, 0, 1},
+ [PRIMARY_TDM_RX_2] = { AFE_PORT_ID_PRIMARY_TDM_RX_2,
+ PRIMARY_TDM_RX_2, 1, 1},
+ [PRIMARY_TDM_TX_2] = { AFE_PORT_ID_PRIMARY_TDM_TX_2,
+ PRIMARY_TDM_TX_2, 0, 1},
+ [PRIMARY_TDM_RX_3] = { AFE_PORT_ID_PRIMARY_TDM_RX_3,
+ PRIMARY_TDM_RX_3, 1, 1},
+ [PRIMARY_TDM_TX_3] = { AFE_PORT_ID_PRIMARY_TDM_TX_3,
+ PRIMARY_TDM_TX_3, 0, 1},
+ [PRIMARY_TDM_RX_4] = { AFE_PORT_ID_PRIMARY_TDM_RX_4,
+ PRIMARY_TDM_RX_4, 1, 1},
+ [PRIMARY_TDM_TX_4] = { AFE_PORT_ID_PRIMARY_TDM_TX_4,
+ PRIMARY_TDM_TX_4, 0, 1},
+ [PRIMARY_TDM_RX_5] = { AFE_PORT_ID_PRIMARY_TDM_RX_5,
+ PRIMARY_TDM_RX_5, 1, 1},
+ [PRIMARY_TDM_TX_5] = { AFE_PORT_ID_PRIMARY_TDM_TX_5,
+ PRIMARY_TDM_TX_5, 0, 1},
+ [PRIMARY_TDM_RX_6] = { AFE_PORT_ID_PRIMARY_TDM_RX_6,
+ PRIMARY_TDM_RX_6, 1, 1},
+ [PRIMARY_TDM_TX_6] = { AFE_PORT_ID_PRIMARY_TDM_TX_6,
+ PRIMARY_TDM_TX_6, 0, 1},
+ [PRIMARY_TDM_RX_7] = { AFE_PORT_ID_PRIMARY_TDM_RX_7,
+ PRIMARY_TDM_RX_7, 1, 1},
+ [PRIMARY_TDM_TX_7] = { AFE_PORT_ID_PRIMARY_TDM_TX_7,
+ PRIMARY_TDM_TX_7, 0, 1},
+ [SECONDARY_TDM_RX_0] = { AFE_PORT_ID_SECONDARY_TDM_RX,
+ SECONDARY_TDM_RX_0, 1, 1},
+ [SECONDARY_TDM_TX_0] = { AFE_PORT_ID_SECONDARY_TDM_TX,
+ SECONDARY_TDM_TX_0, 0, 1},
+ [SECONDARY_TDM_RX_1] = { AFE_PORT_ID_SECONDARY_TDM_RX_1,
+ SECONDARY_TDM_RX_1, 1, 1},
+ [SECONDARY_TDM_TX_1] = { AFE_PORT_ID_SECONDARY_TDM_TX_1,
+ SECONDARY_TDM_TX_1, 0, 1},
+ [SECONDARY_TDM_RX_2] = { AFE_PORT_ID_SECONDARY_TDM_RX_2,
+ SECONDARY_TDM_RX_2, 1, 1},
+ [SECONDARY_TDM_TX_2] = { AFE_PORT_ID_SECONDARY_TDM_TX_2,
+ SECONDARY_TDM_TX_2, 0, 1},
+ [SECONDARY_TDM_RX_3] = { AFE_PORT_ID_SECONDARY_TDM_RX_3,
+ SECONDARY_TDM_RX_3, 1, 1},
+ [SECONDARY_TDM_TX_3] = { AFE_PORT_ID_SECONDARY_TDM_TX_3,
+ SECONDARY_TDM_TX_3, 0, 1},
+ [SECONDARY_TDM_RX_4] = { AFE_PORT_ID_SECONDARY_TDM_RX_4,
+ SECONDARY_TDM_RX_4, 1, 1},
+ [SECONDARY_TDM_TX_4] = { AFE_PORT_ID_SECONDARY_TDM_TX_4,
+ SECONDARY_TDM_TX_4, 0, 1},
+ [SECONDARY_TDM_RX_5] = { AFE_PORT_ID_SECONDARY_TDM_RX_5,
+ SECONDARY_TDM_RX_5, 1, 1},
+ [SECONDARY_TDM_TX_5] = { AFE_PORT_ID_SECONDARY_TDM_TX_5,
+ SECONDARY_TDM_TX_5, 0, 1},
+ [SECONDARY_TDM_RX_6] = { AFE_PORT_ID_SECONDARY_TDM_RX_6,
+ SECONDARY_TDM_RX_6, 1, 1},
+ [SECONDARY_TDM_TX_6] = { AFE_PORT_ID_SECONDARY_TDM_TX_6,
+ SECONDARY_TDM_TX_6, 0, 1},
+ [SECONDARY_TDM_RX_7] = { AFE_PORT_ID_SECONDARY_TDM_RX_7,
+ SECONDARY_TDM_RX_7, 1, 1},
+ [SECONDARY_TDM_TX_7] = { AFE_PORT_ID_SECONDARY_TDM_TX_7,
+ SECONDARY_TDM_TX_7, 0, 1},
+ [TERTIARY_TDM_RX_0] = { AFE_PORT_ID_TERTIARY_TDM_RX,
+ TERTIARY_TDM_RX_0, 1, 1},
+ [TERTIARY_TDM_TX_0] = { AFE_PORT_ID_TERTIARY_TDM_TX,
+ TERTIARY_TDM_TX_0, 0, 1},
+ [TERTIARY_TDM_RX_1] = { AFE_PORT_ID_TERTIARY_TDM_RX_1,
+ TERTIARY_TDM_RX_1, 1, 1},
+ [TERTIARY_TDM_TX_1] = { AFE_PORT_ID_TERTIARY_TDM_TX_1,
+ TERTIARY_TDM_TX_1, 0, 1},
+ [TERTIARY_TDM_RX_2] = { AFE_PORT_ID_TERTIARY_TDM_RX_2,
+ TERTIARY_TDM_RX_2, 1, 1},
+ [TERTIARY_TDM_TX_2] = { AFE_PORT_ID_TERTIARY_TDM_TX_2,
+ TERTIARY_TDM_TX_2, 0, 1},
+ [TERTIARY_TDM_RX_3] = { AFE_PORT_ID_TERTIARY_TDM_RX_3,
+ TERTIARY_TDM_RX_3, 1, 1},
+ [TERTIARY_TDM_TX_3] = { AFE_PORT_ID_TERTIARY_TDM_TX_3,
+ TERTIARY_TDM_TX_3, 0, 1},
+ [TERTIARY_TDM_RX_4] = { AFE_PORT_ID_TERTIARY_TDM_RX_4,
+ TERTIARY_TDM_RX_4, 1, 1},
+ [TERTIARY_TDM_TX_4] = { AFE_PORT_ID_TERTIARY_TDM_TX_4,
+ TERTIARY_TDM_TX_4, 0, 1},
+ [TERTIARY_TDM_RX_5] = { AFE_PORT_ID_TERTIARY_TDM_RX_5,
+ TERTIARY_TDM_RX_5, 1, 1},
+ [TERTIARY_TDM_TX_5] = { AFE_PORT_ID_TERTIARY_TDM_TX_5,
+ TERTIARY_TDM_TX_5, 0, 1},
+ [TERTIARY_TDM_RX_6] = { AFE_PORT_ID_TERTIARY_TDM_RX_6,
+ TERTIARY_TDM_RX_6, 1, 1},
+ [TERTIARY_TDM_TX_6] = { AFE_PORT_ID_TERTIARY_TDM_TX_6,
+ TERTIARY_TDM_TX_6, 0, 1},
+ [TERTIARY_TDM_RX_7] = { AFE_PORT_ID_TERTIARY_TDM_RX_7,
+ TERTIARY_TDM_RX_7, 1, 1},
+ [TERTIARY_TDM_TX_7] = { AFE_PORT_ID_TERTIARY_TDM_TX_7,
+ TERTIARY_TDM_TX_7, 0, 1},
+ [QUATERNARY_TDM_RX_0] = { AFE_PORT_ID_QUATERNARY_TDM_RX,
+ QUATERNARY_TDM_RX_0, 1, 1},
+ [QUATERNARY_TDM_TX_0] = { AFE_PORT_ID_QUATERNARY_TDM_TX,
+ QUATERNARY_TDM_TX_0, 0, 1},
+ [QUATERNARY_TDM_RX_1] = { AFE_PORT_ID_QUATERNARY_TDM_RX_1,
+ QUATERNARY_TDM_RX_1, 1, 1},
+ [QUATERNARY_TDM_TX_1] = { AFE_PORT_ID_QUATERNARY_TDM_TX_1,
+ QUATERNARY_TDM_TX_1, 0, 1},
+ [QUATERNARY_TDM_RX_2] = { AFE_PORT_ID_QUATERNARY_TDM_RX_2,
+ QUATERNARY_TDM_RX_2, 1, 1},
+ [QUATERNARY_TDM_TX_2] = { AFE_PORT_ID_QUATERNARY_TDM_TX_2,
+ QUATERNARY_TDM_TX_2, 0, 1},
+ [QUATERNARY_TDM_RX_3] = { AFE_PORT_ID_QUATERNARY_TDM_RX_3,
+ QUATERNARY_TDM_RX_3, 1, 1},
+ [QUATERNARY_TDM_TX_3] = { AFE_PORT_ID_QUATERNARY_TDM_TX_3,
+ QUATERNARY_TDM_TX_3, 0, 1},
+ [QUATERNARY_TDM_RX_4] = { AFE_PORT_ID_QUATERNARY_TDM_RX_4,
+ QUATERNARY_TDM_RX_4, 1, 1},
+ [QUATERNARY_TDM_TX_4] = { AFE_PORT_ID_QUATERNARY_TDM_TX_4,
+ QUATERNARY_TDM_TX_4, 0, 1},
+ [QUATERNARY_TDM_RX_5] = { AFE_PORT_ID_QUATERNARY_TDM_RX_5,
+ QUATERNARY_TDM_RX_5, 1, 1},
+ [QUATERNARY_TDM_TX_5] = { AFE_PORT_ID_QUATERNARY_TDM_TX_5,
+ QUATERNARY_TDM_TX_5, 0, 1},
+ [QUATERNARY_TDM_RX_6] = { AFE_PORT_ID_QUATERNARY_TDM_RX_6,
+ QUATERNARY_TDM_RX_6, 1, 1},
+ [QUATERNARY_TDM_TX_6] = { AFE_PORT_ID_QUATERNARY_TDM_TX_6,
+ QUATERNARY_TDM_TX_6, 0, 1},
+ [QUATERNARY_TDM_RX_7] = { AFE_PORT_ID_QUATERNARY_TDM_RX_7,
+ QUATERNARY_TDM_RX_7, 1, 1},
+ [QUATERNARY_TDM_TX_7] = { AFE_PORT_ID_QUATERNARY_TDM_TX_7,
+ QUATERNARY_TDM_TX_7, 0, 1},
+ [QUINARY_TDM_RX_0] = { AFE_PORT_ID_QUINARY_TDM_RX,
+ QUINARY_TDM_RX_0, 1, 1},
+ [QUINARY_TDM_TX_0] = { AFE_PORT_ID_QUINARY_TDM_TX,
+ QUINARY_TDM_TX_0, 0, 1},
+ [QUINARY_TDM_RX_1] = { AFE_PORT_ID_QUINARY_TDM_RX_1,
+ QUINARY_TDM_RX_1, 1, 1},
+ [QUINARY_TDM_TX_1] = { AFE_PORT_ID_QUINARY_TDM_TX_1,
+ QUINARY_TDM_TX_1, 0, 1},
+ [QUINARY_TDM_RX_2] = { AFE_PORT_ID_QUINARY_TDM_RX_2,
+ QUINARY_TDM_RX_2, 1, 1},
+ [QUINARY_TDM_TX_2] = { AFE_PORT_ID_QUINARY_TDM_TX_2,
+ QUINARY_TDM_TX_2, 0, 1},
+ [QUINARY_TDM_RX_3] = { AFE_PORT_ID_QUINARY_TDM_RX_3,
+ QUINARY_TDM_RX_3, 1, 1},
+ [QUINARY_TDM_TX_3] = { AFE_PORT_ID_QUINARY_TDM_TX_3,
+ QUINARY_TDM_TX_3, 0, 1},
+ [QUINARY_TDM_RX_4] = { AFE_PORT_ID_QUINARY_TDM_RX_4,
+ QUINARY_TDM_RX_4, 1, 1},
+ [QUINARY_TDM_TX_4] = { AFE_PORT_ID_QUINARY_TDM_TX_4,
+ QUINARY_TDM_TX_4, 0, 1},
+ [QUINARY_TDM_RX_5] = { AFE_PORT_ID_QUINARY_TDM_RX_5,
+ QUINARY_TDM_RX_5, 1, 1},
+ [QUINARY_TDM_TX_5] = { AFE_PORT_ID_QUINARY_TDM_TX_5,
+ QUINARY_TDM_TX_5, 0, 1},
+ [QUINARY_TDM_RX_6] = { AFE_PORT_ID_QUINARY_TDM_RX_6,
+ QUINARY_TDM_RX_6, 1, 1},
+ [QUINARY_TDM_TX_6] = { AFE_PORT_ID_QUINARY_TDM_TX_6,
+ QUINARY_TDM_TX_6, 0, 1},
+ [QUINARY_TDM_RX_7] = { AFE_PORT_ID_QUINARY_TDM_RX_7,
+ QUINARY_TDM_RX_7, 1, 1},
+ [QUINARY_TDM_TX_7] = { AFE_PORT_ID_QUINARY_TDM_TX_7,
+ QUINARY_TDM_TX_7, 0, 1},
};
static void q6afe_port_free(struct kref *ref)
@@ -331,6 +704,7 @@ static void q6afe_port_free(struct kref *ref)
spin_lock_irqsave(&afe->port_list_lock, flags);
list_del(&port->node);
spin_unlock_irqrestore(&afe->port_list_lock, flags);
+ kfree(port->scfg);
kfree(port);
}
@@ -601,7 +975,9 @@ int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id,
ccfg.clk_set_mode = Q6AFE_LPASS_MODE_CLK2_VALID;
ret = q6afe_set_lpass_clock(port, &ccfg);
break;
- case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
+ case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
+ case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
+ case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT:
cset.clk_set_minor_version = AFE_API_VERSION_CLOCK_SET;
cset.clk_id = clk_id;
cset.clk_freq_in_hz = freq;
@@ -696,6 +1072,42 @@ void q6afe_slim_port_prepare(struct q6afe_port *port,
}
EXPORT_SYMBOL_GPL(q6afe_slim_port_prepare);
+/**
+ * q6afe_tdm_port_prepare() - Prepare tdm afe port.
+ *
+ * @port: Instance of afe port
+ * @cfg: TDM configuration for the afe port
+ *
+ */
+void q6afe_tdm_port_prepare(struct q6afe_port *port,
+ struct q6afe_tdm_cfg *cfg)
+{
+ union afe_port_config *pcfg = &port->port_cfg;
+
+ pcfg->tdm_cfg.tdm_cfg_minor_version = AFE_API_VERSION_TDM_CONFIG;
+ pcfg->tdm_cfg.num_channels = cfg->num_channels;
+ pcfg->tdm_cfg.sample_rate = cfg->sample_rate;
+ pcfg->tdm_cfg.bit_width = cfg->bit_width;
+ pcfg->tdm_cfg.data_format = cfg->data_format;
+ pcfg->tdm_cfg.sync_mode = cfg->sync_mode;
+ pcfg->tdm_cfg.sync_src = cfg->sync_src;
+ pcfg->tdm_cfg.nslots_per_frame = cfg->nslots_per_frame;
+
+ pcfg->tdm_cfg.slot_width = cfg->slot_width;
+ pcfg->tdm_cfg.slot_mask = cfg->slot_mask;
+ port->scfg = kzalloc(sizeof(*port->scfg), GFP_KERNEL);
+ if (!port->scfg)
+ return;
+
+ port->scfg->minor_version = AFE_API_VERSION_SLOT_MAPPING_CONFIG;
+ port->scfg->num_channels = cfg->num_channels;
+ port->scfg->bitwidth = cfg->bit_width;
+ port->scfg->data_align_type = cfg->data_align_type;
+ memcpy(port->scfg->ch_mapping, cfg->ch_mapping,
+ sizeof(u16) * AFE_PORT_MAX_AUDIO_CHAN_CNT);
+}
+EXPORT_SYMBOL_GPL(q6afe_tdm_port_prepare);
+
/**
* q6afe_hdmi_port_prepare() - Prepare hdmi afe port.
*
@@ -886,6 +1298,17 @@ int q6afe_port_start(struct q6afe_port *port)
return ret;
}
+ if (port->scfg) {
+ ret = q6afe_port_set_param_v2(port, port->scfg,
+ AFE_PARAM_ID_PORT_SLOT_MAPPING_CONFIG,
+ AFE_MODULE_TDM, sizeof(*port->scfg));
+ if (ret) {
+ dev_err(afe->dev, "AFE enable for port 0x%x failed %d\n",
+ port_id, ret);
+ return ret;
+ }
+ }
+
pkt_size = APR_HDR_SIZE + sizeof(*start);
p = kzalloc(pkt_size, GFP_KERNEL);
if (!p)
@@ -970,6 +1393,10 @@ struct q6afe_port *q6afe_port_get_from_id(struct device *dev, int id)
case AFE_PORT_ID_QUATERNARY_MI2S_TX:
cfg_type = AFE_PARAM_ID_I2S_CONFIG;
break;
+ case AFE_PORT_ID_PRIMARY_TDM_RX ... AFE_PORT_ID_QUINARY_TDM_TX_7:
+ cfg_type = AFE_PARAM_ID_TDM_CONFIG;
+ break;
+
default:
dev_err(dev, "Invalid port id 0x%x\n", port_id);
return ERR_PTR(-EINVAL);
diff --git a/sound/soc/qcom/qdsp6/q6afe.h b/sound/soc/qcom/qdsp6/q6afe.h
index 5ca54a9bdfd5..c7ed5422baff 100644
--- a/sound/soc/qcom/qdsp6/q6afe.h
+++ b/sound/soc/qcom/qdsp6/q6afe.h
@@ -5,7 +5,7 @@
#include <dt-bindings/sound/qcom,q6afe.h>
-#define AFE_PORT_MAX 48
+#define AFE_PORT_MAX 105
#define MSM_AFE_PORT_TYPE_RX 0
#define MSM_AFE_PORT_TYPE_TX 1
@@ -144,6 +144,8 @@
/* Clock attribute for invert and no couple case */
#define Q6AFE_LPASS_CLK_ATTRIBUTE_INVERT_COUPLE_NO 0x4
+#define Q6AFE_CMAP_INVALID 0xFFFF
+
struct q6afe_hdmi_cfg {
u16 datatype;
u16 channel_allocation;
@@ -168,10 +170,25 @@ struct q6afe_i2s_cfg {
int fmt;
};
+struct q6afe_tdm_cfg {
+ u16 num_channels;
+ u32 sample_rate;
+ u16 bit_width;
+ u16 data_format;
+ u16 sync_mode;
+ u16 sync_src;
+ u16 nslots_per_frame;
+ u16 slot_width;
+ u16 slot_mask;
+ u32 data_align_type;
+ u16 ch_mapping[AFE_MAX_CHAN_COUNT];
+};
+
struct q6afe_port_config {
struct q6afe_hdmi_cfg hdmi;
struct q6afe_slim_cfg slim;
struct q6afe_i2s_cfg i2s_cfg;
+ struct q6afe_tdm_cfg tdm;
};
struct q6afe_port;
@@ -186,6 +203,7 @@ void q6afe_hdmi_port_prepare(struct q6afe_port *port,
void q6afe_slim_port_prepare(struct q6afe_port *port,
struct q6afe_slim_cfg *cfg);
int q6afe_i2s_port_prepare(struct q6afe_port *port, struct q6afe_i2s_cfg *cfg);
+void q6afe_tdm_port_prepare(struct q6afe_port *port, struct q6afe_tdm_cfg *cfg);
int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id,
int clk_src, int clk_root,
--
2.17.0
^ permalink raw reply related
* Applied "ASoC: qdsp6: q6afe-dai: use q6afe_dai_prepare() for MI2S" to the asoc tree
From: Mark Brown @ 2018-05-29 14:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529101833.30489-4-srinivas.kandagatla@linaro.org>
The patch
ASoC: qdsp6: q6afe-dai: use q6afe_dai_prepare() for MI2S
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From b916449c5e0129858320e313bbcfff05ae4cde6d Mon Sep 17 00:00:00 2001
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Tue, 29 May 2018 11:18:30 +0100
Subject: [PATCH] ASoC: qdsp6: q6afe-dai: use q6afe_dai_prepare() for MI2S
Use common q6afe_dai_prepare() for MI2S dais, this will remove
some code duplication. Also make the if statement to switch to
make the code look neater.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
sound/soc/qcom/qdsp6/q6afe-dai.c | 53 +++++++++++---------------------
1 file changed, 18 insertions(+), 35 deletions(-)
diff --git a/sound/soc/qcom/qdsp6/q6afe-dai.c b/sound/soc/qcom/qdsp6/q6afe-dai.c
index 4378e29a95c5..e529edfd8001 100644
--- a/sound/soc/qcom/qdsp6/q6afe-dai.c
+++ b/sound/soc/qcom/qdsp6/q6afe-dai.c
@@ -144,38 +144,6 @@ static void q6afe_dai_shutdown(struct snd_pcm_substream *substream,
}
-static int q6afe_mi2s_prepare(struct snd_pcm_substream *substream,
- struct snd_soc_dai *dai)
-{
- struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
- int rc;
-
- if (dai_data->is_port_started[dai->id]) {
- /* stop the port and restart with new port config */
- rc = q6afe_port_stop(dai_data->port[dai->id]);
- if (rc < 0) {
- dev_err(dai->dev, "fail to close AFE port (%d)\n", rc);
- return rc;
- }
- }
-
- rc = q6afe_i2s_port_prepare(dai_data->port[dai->id],
- &dai_data->port_config[dai->id].i2s_cfg);
- if (rc < 0) {
- dev_err(dai->dev, "fail to prepare AFE port %x\n", dai->id);
- return rc;
- }
-
- rc = q6afe_port_start(dai_data->port[dai->id]);
- if (rc < 0) {
- dev_err(dai->dev, "fail to start AFE port %x\n", dai->id);
- return rc;
- }
- dai_data->is_port_started[dai->id] = true;
-
- return 0;
-}
-
static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
@@ -191,12 +159,27 @@ static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
}
}
- if (dai->id == HDMI_RX)
+ switch (dai->id) {
+ case HDMI_RX:
q6afe_hdmi_port_prepare(dai_data->port[dai->id],
&dai_data->port_config[dai->id].hdmi);
- else if (dai->id >= SLIMBUS_0_RX && dai->id <= SLIMBUS_6_TX)
+ break;
+ case SLIMBUS_0_RX ... SLIMBUS_6_TX:
q6afe_slim_port_prepare(dai_data->port[dai->id],
&dai_data->port_config[dai->id].slim);
+ break;
+ case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
+ rc = q6afe_i2s_port_prepare(dai_data->port[dai->id],
+ &dai_data->port_config[dai->id].i2s_cfg);
+ if (rc < 0) {
+ dev_err(dai->dev, "fail to prepare AFE port %x\n",
+ dai->id);
+ return rc;
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
rc = q6afe_port_start(dai_data->port[dai->id]);
if (rc < 0) {
@@ -289,7 +272,7 @@ static struct snd_soc_dai_ops q6hdmi_ops = {
};
static struct snd_soc_dai_ops q6i2s_ops = {
- .prepare = q6afe_mi2s_prepare,
+ .prepare = q6afe_dai_prepare,
.hw_params = q6i2s_hw_params,
.set_fmt = q6i2s_set_fmt,
.shutdown = q6afe_dai_shutdown,
--
2.17.0
^ permalink raw reply related
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