* [PATCH] ARM: debug: enable UART1 for socfpga Cyclone5
From: Clément Péron @ 2018-05-30 12:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJiuCccyY5B-cXB1fUBAm5JqY796jyE0KZqSSv23h3WAe4zqOA@mail.gmail.com>
Hi Dinh,
On Thu, 3 May 2018 at 16:49, Cl?ment P?ron <peron.clem@gmail.com> wrote:
> Hi Dinh,
> On Thu, 3 May 2018 at 16:32, Dinh Nguyen <dinguyen@kernel.org> wrote:
> > Do you have a Cyclone5/Arria5 board that is using UART1 for the debug
> port?
> > Dinh
> Yes I have a Cyclone5 board where the debug serial port used is UART1,
> Clement
Does it looks like good to you ?
Regards,
Clement
^ permalink raw reply
* [PATCH v4 5/5] ARM: dts: imx6qdl: add missing compatible and clock properties for EPIT
From: Clément Péron @ 2018-05-30 12:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530120327.27681-1-peron.clem@gmail.com>
From: Colin Didier <colin.didier@devialet.com>
Add missing compatible and clock properties for EPIT node.
Signed-off-by: Colin Didier <colin.didier@devialet.com>
Signed-off-by: Cl?ment Peron <clement.peron@devialet.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
arch/arm/boot/dts/imx6qdl.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index c003e62bf290..0feec516847a 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -844,13 +844,23 @@
};
epit1: epit at 20d0000 { /* EPIT1 */
+ compatible = "fsl,imx6q-epit", "fsl,imx31-epit";
reg = <0x020d0000 0x4000>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6QDL_CLK_IPG_PER>,
+ <&clks IMX6QDL_CLK_EPIT1>;
+ clock-names = "ipg", "per";
+ status = "disabled";
};
epit2: epit at 20d4000 { /* EPIT2 */
+ compatible = "fsl,imx6q-epit", "fsl,imx31-epit";
reg = <0x020d4000 0x4000>;
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6QDL_CLK_IPG_PER>,
+ <&clks IMX6QDL_CLK_EPIT2>;
+ clock-names = "ipg", "per";
+ status = "disabled";
};
src: src at 20d8000 {
--
2.17.0
^ permalink raw reply related
* [PATCH v4 4/5] clocksource: add driver for i.MX EPIT timer
From: Clément Péron @ 2018-05-30 12:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530120327.27681-1-peron.clem@gmail.com>
From: Colin Didier <colin.didier@devialet.com>
Add driver for NXP's EPIT timer used in i.MX 6 family of SoC.
Signed-off-by: Colin Didier <colin.didier@devialet.com>
Signed-off-by: Cl?ment Peron <clement.peron@devialet.com>
---
drivers/clocksource/Kconfig | 11 ++
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-imx-epit.c | 281 +++++++++++++++++++++++++++
3 files changed, 293 insertions(+)
create mode 100644 drivers/clocksource/timer-imx-epit.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 8e8a09755d10..790478afd02c 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -576,6 +576,17 @@ config H8300_TPU
This enables the clocksource for the H8300 platform with the
H8S2678 cpu.
+config CLKSRC_IMX_EPIT
+ bool "Clocksource using i.MX EPIT"
+ depends on CLKDEV_LOOKUP && (ARCH_MXC || COMPILE_TEST)
+ select CLKSRC_MMIO
+ help
+ This enables EPIT support available on some i.MX platforms.
+ Normally you don't have a reason to do so as the EPIT has
+ the same features and uses the same clocks as the GPT.
+ Anyway, on some systems the GPT may be in use for other
+ purposes.
+
config CLKSRC_IMX_GPT
bool "Clocksource using i.MX GPT" if COMPILE_TEST
depends on ARM && CLKDEV_LOOKUP
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 00caf37e52f9..d9426f69ec69 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_INTEGRATOR_AP_TIMER) += timer-integrator-ap.o
obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o
obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o
obj-$(CONFIG_CLKSRC_TANGO_XTAL) += tango_xtal.o
+obj-$(CONFIG_CLKSRC_IMX_EPIT) += timer-imx-epit.o
obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o
obj-$(CONFIG_CLKSRC_IMX_TPM) += timer-imx-tpm.o
obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o
diff --git a/drivers/clocksource/timer-imx-epit.c b/drivers/clocksource/timer-imx-epit.c
new file mode 100644
index 000000000000..7e92fcab10d3
--- /dev/null
+++ b/drivers/clocksource/timer-imx-epit.c
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * i.MX EPIT Timer
+ *
+ * Copyright (C) 2010 Sascha Hauer <s.hauer@pengutronix.de>
+ * Copyright (C) 2018 Colin Didier <colin.didier@devialet.com>
+ * Copyright (C) 2018 Cl?ment P?ron <clement.peron@devialet.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/sched_clock.h>
+#include <linux/slab.h>
+
+#define EPITCR 0x00
+#define EPITSR 0x04
+#define EPITLR 0x08
+#define EPITCMPR 0x0c
+#define EPITCNR 0x10
+
+#define EPITCR_EN BIT(0)
+#define EPITCR_ENMOD BIT(1)
+#define EPITCR_OCIEN BIT(2)
+#define EPITCR_RLD BIT(3)
+#define EPITCR_PRESC(x) (((x) & 0xfff) << 4)
+#define EPITCR_SWR BIT(16)
+#define EPITCR_IOVW BIT(17)
+#define EPITCR_DBGEN BIT(18)
+#define EPITCR_WAITEN BIT(19)
+#define EPITCR_RES BIT(20)
+#define EPITCR_STOPEN BIT(21)
+#define EPITCR_OM_DISCON (0 << 22)
+#define EPITCR_OM_TOGGLE (1 << 22)
+#define EPITCR_OM_CLEAR (2 << 22)
+#define EPITCR_OM_SET (3 << 22)
+#define EPITCR_CLKSRC_OFF (0 << 24)
+#define EPITCR_CLKSRC_PERIPHERAL (1 << 24)
+#define EPITCR_CLKSRC_REF_HIGH (2 << 24)
+#define EPITCR_CLKSRC_REF_LOW (3 << 24)
+
+#define EPITSR_OCIF BIT(0)
+
+struct epit_timer {
+ void __iomem *base;
+ int irq;
+ struct clk *clk_per;
+ struct clock_event_device ced;
+ struct irqaction act;
+};
+
+static void __iomem *sched_clock_reg;
+
+static inline struct epit_timer *to_epit_timer(struct clock_event_device *ced)
+{
+ return container_of(ced, struct epit_timer, ced);
+}
+
+static inline void epit_irq_disable(struct epit_timer *epittm)
+{
+ u32 val;
+
+ val = readl_relaxed(epittm->base + EPITCR);
+ writel_relaxed(val & ~EPITCR_OCIEN, epittm->base + EPITCR);
+}
+
+static inline void epit_irq_enable(struct epit_timer *epittm)
+{
+ u32 val;
+
+ val = readl_relaxed(epittm->base + EPITCR);
+ writel_relaxed(val | EPITCR_OCIEN, epittm->base + EPITCR);
+}
+
+static void epit_irq_acknowledge(struct epit_timer *epittm)
+{
+ writel_relaxed(EPITSR_OCIF, epittm->base + EPITSR);
+}
+
+static u64 notrace epit_read_sched_clock(void)
+{
+ return ~readl_relaxed(sched_clock_reg);
+}
+
+static int epit_set_next_event(unsigned long cycles,
+ struct clock_event_device *ced)
+{
+ struct epit_timer *epittm = to_epit_timer(ced);
+ unsigned long tcmp;
+
+ tcmp = readl_relaxed(epittm->base + EPITCNR) - cycles;
+ writel_relaxed(tcmp, epittm->base + EPITCMPR);
+
+ return 0;
+}
+
+/* Left event sources disabled, no more interrupts appear */
+static int epit_shutdown(struct clock_event_device *ced)
+{
+ struct epit_timer *epittm = to_epit_timer(ced);
+ unsigned long flags;
+
+ /*
+ * The timer interrupt generation is disabled at least
+ * for enough time to call epit_set_next_event()
+ */
+ local_irq_save(flags);
+
+ /* Disable interrupt in EPIT module */
+ epit_irq_disable(epittm);
+
+ /* Clear pending interrupt */
+ epit_irq_acknowledge(epittm);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+static int epit_set_oneshot(struct clock_event_device *ced)
+{
+ struct epit_timer *epittm = to_epit_timer(ced);
+ unsigned long flags;
+
+ /*
+ * The timer interrupt generation is disabled at least
+ * for enough time to call epit_set_next_event()
+ */
+ local_irq_save(flags);
+
+ /* Disable interrupt in EPIT module */
+ epit_irq_disable(epittm);
+
+ /* Clear pending interrupt, only while switching mode */
+ if (!clockevent_state_oneshot(ced))
+ epit_irq_acknowledge(epittm);
+
+ /*
+ * Do not put overhead of interrupt enable/disable into
+ * epit_set_next_event(), the core has about 4 minutes
+ * to call epit_set_next_event() or shutdown clock after
+ * mode switching
+ */
+ epit_irq_enable(epittm);
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+static irqreturn_t epit_timer_interrupt(int irq, void *dev_id)
+{
+ struct clock_event_device *ced = dev_id;
+ struct epit_timer *epittm = to_epit_timer(ced);
+
+ epit_irq_acknowledge(epittm);
+
+ ced->event_handler(ced);
+
+ return IRQ_HANDLED;
+}
+
+static int __init epit_clocksource_init(struct epit_timer *epittm)
+{
+ unsigned int c = clk_get_rate(epittm->clk_per);
+
+ sched_clock_reg = epittm->base + EPITCNR;
+ sched_clock_register(epit_read_sched_clock, 32, c);
+
+ return clocksource_mmio_init(epittm->base + EPITCNR, "epit", c, 200, 32,
+ clocksource_mmio_readl_down);
+}
+
+static int __init epit_clockevent_init(struct epit_timer *epittm)
+{
+ struct clock_event_device *ced = &epittm->ced;
+ struct irqaction *act = &epittm->act;
+
+ ced->name = "epit";
+ ced->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_DYNIRQ;
+ ced->set_state_shutdown = epit_shutdown;
+ ced->tick_resume = epit_shutdown;
+ ced->set_state_oneshot = epit_set_oneshot;
+ ced->set_next_event = epit_set_next_event;
+ ced->rating = 200;
+ ced->cpumask = cpumask_of(0);
+ ced->irq = epittm->irq;
+ clockevents_config_and_register(ced, clk_get_rate(epittm->clk_per),
+ 0xff, 0xfffffffe);
+
+ act->name = "i.MX EPIT Timer Tick",
+ act->flags = IRQF_TIMER | IRQF_IRQPOLL;
+ act->handler = epit_timer_interrupt;
+ act->dev_id = ced;
+
+ /* Make irqs happen */
+ return setup_irq(epittm->irq, act);
+}
+
+static int __init epit_timer_init(struct device_node *np)
+{
+ struct epit_timer *epittm;
+ struct clk *clk_ipg;
+ int ret;
+
+ epittm = kzalloc(sizeof(*epittm), GFP_KERNEL);
+ if (!epittm)
+ return -ENOMEM;
+
+ epittm->base = of_iomap(np, 0);
+ if (!epittm->base) {
+ ret = -ENXIO;
+ goto out_kfree;
+ }
+
+ epittm->irq = irq_of_parse_and_map(np, 0);
+ if (!epittm->irq) {
+ ret = -EINVAL;
+ goto out_iounmap;
+ }
+
+ clk_ipg = of_clk_get_by_name(np, "ipg");
+ if (IS_ERR(clk_ipg)) {
+ pr_err("i.MX EPIT: unable to get clk_ipg\n");
+ ret = PTR_ERR(clk_ipg);
+ goto out_iounmap;
+ }
+
+ ret = clk_prepare_enable(clk_ipg);
+ if (ret) {
+ pr_err("i.MX EPIT: unable to prepare+enable clk_ipg\n");
+ goto out_iounmap;
+ }
+
+ epittm->clk_per = of_clk_get_by_name(np, "per");
+ if (IS_ERR(epittm->clk_per)) {
+ pr_err("i.MX EPIT: unable to get clk_per\n");
+ ret = PTR_ERR(epittm->clk_per);
+ goto out_clk_ipg_disable;
+ }
+
+ ret = clk_prepare_enable(epittm->clk_per);
+ if (ret) {
+ pr_err("i.MX EPIT: unable to prepare+enable clk_per\n");
+ goto out_clk_ipg_disable;
+ }
+
+ /* Initialise to a known state (all timers off, and timing reset) */
+ writel_relaxed(0x0, epittm->base + EPITCR);
+ writel_relaxed(0xffffffff, epittm->base + EPITLR);
+ writel_relaxed(EPITCR_EN | EPITCR_CLKSRC_REF_HIGH | EPITCR_WAITEN,
+ epittm->base + EPITCR);
+
+ ret = epit_clocksource_init(epittm);
+ if (ret) {
+ pr_err("i.MX EPIT: failed to init clocksource\n");
+ goto out_clk_per_disable;
+ }
+
+ ret = epit_clockevent_init(epittm);
+ if (ret) {
+ pr_err("i.MX EPIT: failed to init clockevent\n");
+ goto out_clk_per_disable;
+ }
+
+ return 0;
+
+out_clk_per_disable:
+ clk_disable_unprepare(epittm->clk_per);
+out_clk_ipg_disable:
+ clk_disable_unprepare(clk_ipg);
+out_iounmap:
+ iounmap(epittm->base);
+out_kfree:
+ kfree(epittm);
+
+ return ret;
+}
+TIMER_OF_DECLARE(epit_timer, "fsl,imx31-epit", epit_timer_init);
--
2.17.0
^ permalink raw reply related
* [PATCH v4 3/5] Documentation: DT: add i.MX EPIT timer binding
From: Clément Péron @ 2018-05-30 12:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530120327.27681-1-peron.clem@gmail.com>
From: Cl?ment Peron <clement.peron@devialet.com>
Add devicetree binding document for NXP's i.MX SoC specific
EPIT timer driver.
Signed-off-by: Cl?ment Peron <clement.peron@devialet.com>
---
.../devicetree/bindings/timer/fsl,imxepit.txt | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt
diff --git a/Documentation/devicetree/bindings/timer/fsl,imxepit.txt b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt
new file mode 100644
index 000000000000..90112d58af10
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt
@@ -0,0 +1,24 @@
+Binding for the i.MX EPIT timer
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible: should be "fsl,imx31-epit"
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- interrupts: Should contain EPIT controller interrupt
+- clocks: list of clock specifiers, must contain an entry for each required
+ entry in clock-names
+- clock-names : should include entries "ipg", "per"
+
+Example for i.MX6QDL:
+ epit1: epit at 20d0000 {
+ compatible = "fsl,imx6q-epit", "fsl,imx31-epit";
+ reg = <0x020d0000 0x4000>;
+ interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6QDL_CLK_IPG_PER>,
+ <&clks IMX6QDL_CLK_EPIT1>;
+ clock-names = "ipg", "per";
+ };
--
2.17.0
^ permalink raw reply related
* [PATCH v4 2/5] clk: imx6: add EPIT clock support
From: Clément Péron @ 2018-05-30 12:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530120327.27681-1-peron.clem@gmail.com>
From: Colin Didier <colin.didier@devialet.com>
Add EPIT clock support to the i.MX6Q clocking infrastructure.
Signed-off-by: Colin Didier <colin.didier@devialet.com>
Signed-off-by: Cl?ment Peron <clement.peron@devialet.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
drivers/clk/imx/clk-imx6q.c | 2 ++
include/dt-bindings/clock/imx6qdl-clock.h | 4 +++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 8d518ad5dc13..b9ea7037e193 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -753,6 +753,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
else
clk[IMX6Q_CLK_ECSPI5] = imx_clk_gate2("ecspi5", "ecspi_root", base + 0x6c, 8);
clk[IMX6QDL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
+ clk[IMX6QDL_CLK_EPIT1] = imx_clk_gate2("epit1", "ipg", base + 0x6c, 12);
+ clk[IMX6QDL_CLK_EPIT2] = imx_clk_gate2("epit2", "ipg", base + 0x6c, 14);
clk[IMX6QDL_CLK_ESAI_EXTAL] = imx_clk_gate2_shared("esai_extal", "esai_podf", base + 0x6c, 16, &share_count_esai);
clk[IMX6QDL_CLK_ESAI_IPG] = imx_clk_gate2_shared("esai_ipg", "ahb", base + 0x6c, 16, &share_count_esai);
clk[IMX6QDL_CLK_ESAI_MEM] = imx_clk_gate2_shared("esai_mem", "ahb", base + 0x6c, 16, &share_count_esai);
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
index da59fd9cdb5e..7ad171b8f3bf 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -271,6 +271,8 @@
#define IMX6QDL_CLK_PRE_AXI 258
#define IMX6QDL_CLK_MLB_SEL 259
#define IMX6QDL_CLK_MLB_PODF 260
-#define IMX6QDL_CLK_END 261
+#define IMX6QDL_CLK_EPIT1 261
+#define IMX6QDL_CLK_EPIT2 262
+#define IMX6QDL_CLK_END 263
#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */
--
2.17.0
^ permalink raw reply related
* [PATCH v4 1/5] ARM: imx: remove inexistant EPIT timer init
From: Clément Péron @ 2018-05-30 12:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530120327.27681-1-peron.clem@gmail.com>
From: Cl?ment Peron <clement.peron@devialet.com>
i.MX EPIT timer has been removed but not the init function declaration.
Signed-off-by: Cl?ment Peron <clement.peron@devialet.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
arch/arm/mach-imx/common.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index c8d68e918b2f..18aae76fa2da 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -38,7 +38,6 @@ void imx21_soc_init(void);
void imx27_soc_init(void);
void imx31_soc_init(void);
void imx35_soc_init(void);
-void epit_timer_init(void __iomem *base, int irq);
int mx21_clocks_init(unsigned long lref, unsigned long fref);
int mx27_clocks_init(unsigned long fref);
int mx31_clocks_init(unsigned long fref);
--
2.17.0
^ permalink raw reply related
* [PATCH v4 0/5] Reintroduce i.MX EPIT Timer
From: Clément Péron @ 2018-05-30 12:03 UTC (permalink / raw)
To: linux-arm-kernel
From: Cl?ment Peron <clement.peron@devialet.com>
As suggested in the commit message we have added the device tree support,
proper bindings and we moved the driver into the correct folder.
Moreover we made some changes like use of relaxed IO accesor,
implement sched_clock, delay_timer and reduce the clockevents min_delta.
Changes since v3:
- Clean Kconfig
- Rename imx6q-epit to imx31-epit
- Update doc and bindings
- Indent and fix
Changes since v2 (Thanks Fabio Estevam):
- Removed unused ckil clock
- Add out_iounmap
- Check and handle if clk_prepare_enable failed
- Fix comment typo
Changes since v1 (Thanks Vladimir Zapolskiy):
- Add OF dependency in Kconfig
- Sort header
- Use BIT macro
- Remove useless comments
- Fix incorrect indent
- Fix memory leak
- Add check and handle possible returned error
Cl?ment Peron (2):
ARM: imx: remove inexistant EPIT timer init
Documentation: DT: add i.MX EPIT timer binding
Colin Didier (3):
clk: imx6: add EPIT clock support
clocksource: add driver for i.MX EPIT timer
ARM: dts: imx6qdl: add missing compatible and clock properties for
EPIT
.../devicetree/bindings/timer/fsl,imxepit.txt | 24 ++
arch/arm/boot/dts/imx6qdl.dtsi | 10 +
arch/arm/mach-imx/common.h | 1 -
drivers/clk/imx/clk-imx6q.c | 2 +
drivers/clocksource/Kconfig | 11 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-imx-epit.c | 281 ++++++++++++++++++
include/dt-bindings/clock/imx6qdl-clock.h | 4 +-
8 files changed, 332 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt
create mode 100644 drivers/clocksource/timer-imx-epit.c
--
2.17.0
^ permalink raw reply
* [PATCH v2 0/9] PM / Domains: Add support for multi PM domains per device
From: Ulf Hansson @ 2018-05-30 11:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJZ5v0iOP-gcdXcaOjuWy6p+k+hSkHuapDuYYFeS+6gDrxev3w@mail.gmail.com>
On 30 May 2018 at 11:30, Rafael J. Wysocki <rafael@kernel.org> wrote:
> On Tue, May 29, 2018 at 12:04 PM, Ulf Hansson <ulf.hansson@linaro.org> wrote:
>> Changes in v2:
>> - Addressed comments from Geert around DT doc.
>> - Addressed comments from Jon around clarification of how to use this
>> and changes to returned error codes.
>> - Fixed build error in case CONFIG_PM was unset.
>>
>> There are devices that are partitioned across multiple PM domains. Currently
>> these can't be supported well by the available PM infrastructures we have in
>> the kernel. This series is an attempt to address this.
>>
>> The interesting parts happens from patch 5 an onwards, including a minor DT
>> update to the existing power-domain bindings, the 4 earlier are just trivial
>> clean-ups of some related code in genpd, which I happened to stumble over.
>>
>> Some additional background:
>>
>> One existing case where devices are partitioned across multiple PM domains, is
>> the Nvida Tegra 124/210 X-USB subsystem. A while ago Jon Hunter (Nvidia) sent a
>> series, trying to address these issues, however this is a new approach, while
>> it re-uses the same concepts from DT point of view.
>>
>> The Tegra 124/210 X-USB subsystem contains of a host controller and a device
>> controller. Each controller have its own independent PM domain, but are being
>> partitioned across another shared PM domain for the USB super-speed logic.
>>
>> Currently to make the drivers work, either the related PM domains needs to stay
>> powered on always or the PM domain topology needs to be in-correctly modelled
>> through sub-domains. In both cases PM domains may be powered on while they
>> don't need to be, so in the end this means - wasting power -.
>>
>> As stated above, this series intends to address these problem from a PM
>> infrastructure point of view. More details are available in each changelog.
>>
>> It should be noted that this series has been tested on HW, however only by using
>> a home-cooked test PM domain driver for genpd and together with a test driver.
>> This allowed me to play with PM domain (genpd), runtime PM and device links.
>>
>> Any further deployment for real use cases are greatly appreciated. I am happy to
>> to help, if needed!
>>
>> Kind regards
>> Ulf Hansson
>>
>>
>> Ulf Hansson (9):
>> PM / Domains: Drop extern declarations of functions in pm_domain.h
>> PM / Domains: Drop __pm_genpd_add_device()
>> PM / Domains: Drop genpd as in-param for pm_genpd_remove_device()
>> PM / Domains: Drop unused parameter in genpd_allocate_dev_data()
>> PM / Domains: dt: Allow power-domain property to be a list of
>> specifiers
>> PM / Domains: Don't attach devices in genpd with multi PM domains
>> PM / Domains: Split genpd_dev_pm_attach()
>> PM / Domains: Add support for multi PM domains per device to genpd
>> PM / Domains: Add dev_pm_domain_attach_by_id() to manage multi PM
>> domains
>>
>> .../bindings/power/power_domain.txt | 19 ++-
>> drivers/base/power/common.c | 39 ++++-
>> drivers/base/power/domain.c | 155 ++++++++++++++----
>> drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 2 +-
>> include/linux/pm_domain.h | 79 ++++-----
>> 5 files changed, 216 insertions(+), 78 deletions(-)
>
> I can take patches [1-4/9] from this series for 4.18.
Thanks!
>
> I need an ACK from Rob on the bindings change.
Yes, of course!
>
> The rest of the series doesn't seem to be ready yet.
It's getting reviewed and tested, so let's give it some more time.
BTW, from an overall design point of view, you seems okay with it?
Kind regards
Uffe
^ permalink raw reply
* [PATCH v2 9/9] PM / Domains: Add dev_pm_domain_attach_by_id() to manage multi PM domains
From: Ulf Hansson @ 2018-05-30 11:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cc6f36ce-32b7-4b69-f9a9-98cf0b12a9d1@nvidia.com>
On 30 May 2018 at 11:19, Jon Hunter <jonathanh@nvidia.com> wrote:
> Hi Ulf,
>
> On 29/05/18 11:04, Ulf Hansson wrote:
>> The existing dev_pm_domain_attach() function, allows a single PM domain to
>> be attached per device. To be able to support devices that are partitioned
>> across multiple PM domains, let's introduce a new interface,
>> dev_pm_domain_attach_by_id().
>>
>> The dev_pm_domain_attach_by_id() returns a new allocated struct device with
>> the corresponding attached PM domain. This enables for example a driver to
>> operate on the new device from a power management point of view. The driver
>> may then also benefit from using the received device, to set up so called
>> device-links towards its original device. Depending on the situation, these
>> links may then be dynamically changed.
>
> I have given this series a go with Tegra updating the XHCI driver to make
> use of these new APIs. Good news it does appear to work fine for Tegra,
> however, initially when looking at the device_link_add() API ...
>
> /**
> * device_link_add - Create a link between two devices.
> * @consumer: Consumer end of the link.
> * @supplier: Supplier end of the link.
> * @flags: Link flags.
>
> ... I had assumed that the 'consumer' device would be the actual XHCI
> device (in the case of Tegra) and the 'supplier' device would be the new
> genpd device. However, this did not work and I got the following WARN on
> boot ...
>
> [ 2.050929] ---[ end trace eff0b5265e530c92 ]---
> [ 2.055567] WARNING: CPU: 2 PID: 1 at drivers/base/core.c:446 device_links_driver_bound+0xc0/0xd0
> [ 2.064422] Modules linked in:
> [ 2.067471] CPU: 2 PID: 1 Comm: swapper/0 Tainted: G W 4.17.0-rc7-next-20180529-00011-g4faf0dc0ebf3-dirty #32
> [ 2.078667] Hardware name: Google Pixel C (DT)
> [ 2.083101] pstate: 80000005 (Nzcv daif -PAN -UAO)
> [ 2.087881] pc : device_links_driver_bound+0xc0/0xd0
> [ 2.092832] lr : device_links_driver_bound+0x20/0xd0
>
> Switching the Tegra XHCI device to be the 'supplier' and genpd device to
> be the 'consumer' does work, but is this correct? Seems to be opposite to
It shall be the opposite. The Tegra XHCI device shall be the consumer.
> what I expected. Maybe I am missing something?
The problem you get is because the device returned from
dev_pm_domain_attach_by_id(), let's call it genpd_dev, doesn't have
the a driver.
You need to use a couple of device links flag, something like this:
link = device_link_add(dev, genpd_dev, DL_FLAG_STATELESS |
DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
Moreover, you also need these commits, depending if you are running on
something else than Rafael's tree.
a0504aecba76 PM / runtime: Drop usage count for suppliers at device link removal
1e8378619841 PM / runtime: Fixup reference counting of device link
suppliers at probe
>
>> The new interface is typically called by drivers during their probe phase,
>> in case they manages devices which uses multiple PM domains. If that is the
>> case, the driver also becomes responsible of managing the detaching of the
>> PM domains, which typically should be done at the remove phase. Detaching
>> is done by calling the existing dev_pm_domain_detach() function and for
>> each of the received devices from dev_pm_domain_attach_by_id().
>>
>> Note, currently its only genpd that supports multiple PM domains per
>> device, but dev_pm_domain_attach_by_id() can easily by extended to cover
>> other PM domain types, if/when needed.
>>
>> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
>> ---
>>
>> Changes in v2:
>> - Fixed comments from Jon. Clarified function descriptions/changelog and
>> return ERR_PTR(-EEXIST) in case a PM domain is already assigned.
>> - Fix build error when CONFIG_PM is unset.
>>
>> ---
>> drivers/base/power/common.c | 43 ++++++++++++++++++++++++++++++++++---
>> include/linux/pm_domain.h | 7 ++++++
>> 2 files changed, 47 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/base/power/common.c b/drivers/base/power/common.c
>> index 7ae62b6355b8..5e5ea0c239de 100644
>> --- a/drivers/base/power/common.c
>> +++ b/drivers/base/power/common.c
>> @@ -116,14 +116,51 @@ int dev_pm_domain_attach(struct device *dev, bool power_on)
>> }
>> EXPORT_SYMBOL_GPL(dev_pm_domain_attach);
>>
>> +/**
>> + * dev_pm_domain_attach_by_id - Attach a device to one of its PM domains.
>> + * @dev: Device to attach.
>
> Nit ... I still don't think this is the device we are attaching to, but the
> device the PM domains are associated with. IOW we are using this device to
> lookup the PM domains.
Right. I forgot to update that part of the description.
What about:
dev_pm_domain_attach_by_id - Associate a device with one of its PM domains.
@dev: The device used to lookup the PM domain.
>
>> + * @index: The index of the PM domain.
>> + *
>> + * As @dev may only be attached to a single PM domain, the backend PM domain
>> + * provider creates a virtual device to attach instead. If attachment succeeds,
>> + * the ->detach() callback in the struct dev_pm_domain are assigned by the
>> + * corresponding backend attach function, as to deal with detaching of the
>> + * created virtual device.
>> + *
>> + * This function should typically be invoked by a driver during the probe phase,
>> + * in case its device requires power management through multiple PM domains. The
>> + * driver may benefit from using the received device, to configure device-links
>> + * towards its original device. Depending on the use-case and if needed, the
>> + * links may be dynamically changed by the driver, which allows it to control
>> + * the power to the PM domains independently from each other.
>> + *
>> + * Callers must ensure proper synchronization of this function with power
>> + * management callbacks.
>> + *
>> + * Returns the virtual created device when successfully attached to its PM
>> + * domain, NULL in case @dev don't need a PM domain, else an ERR_PTR().
>> + * Note that, to detach the returned virtual device, the driver shall call
>> + * dev_pm_domain_detach() on it, typically during the remove phase.
>> + */
>> +struct device *dev_pm_domain_attach_by_id(struct device *dev,
>> + unsigned int index)
>> +{
>> + if (dev->pm_domain)
>> + return ERR_PTR(-EEXIST);
>> +
>> + return genpd_dev_pm_attach_by_id(dev, index);
>> +}
>> +EXPORT_SYMBOL_GPL(dev_pm_domain_attach_by_id);
>> +
>> /**
>> * dev_pm_domain_detach - Detach a device from its PM domain.
>> * @dev: Device to detach.
>> * @power_off: Used to indicate whether we should power off the device.
>> *
>> - * This functions will reverse the actions from dev_pm_domain_attach() and thus
>> - * try to detach the @dev from its PM domain. Typically it should be invoked
>> - * from subsystem level code during the remove phase.
>> + * This functions will reverse the actions from dev_pm_domain_attach() and
>> + * dev_pm_domain_attach_by_id(), thus it detaches @dev from its PM domain.
>> + * Typically it should be invoked during the remove phase, either from
>> + * subsystem level code or from drivers.
>> *
>> * Callers must ensure proper synchronization of this function with power
>> * management callbacks.
>> diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
>> index 82458e8e2e01..9206a4fef9ac 100644
>> --- a/include/linux/pm_domain.h
>> +++ b/include/linux/pm_domain.h
>> @@ -299,6 +299,8 @@ struct generic_pm_domain *of_genpd_remove_last(struct device_node *np)
>>
>> #ifdef CONFIG_PM
>> int dev_pm_domain_attach(struct device *dev, bool power_on);
>> +struct device *dev_pm_domain_attach_by_id(struct device *dev,
>> + unsigned int index);
>> void dev_pm_domain_detach(struct device *dev, bool power_off);
>> void dev_pm_domain_set(struct device *dev, struct dev_pm_domain *pd);
>> #else
>> @@ -306,6 +308,11 @@ static inline int dev_pm_domain_attach(struct device *dev, bool power_on)
>> {
>> return 0;
>> }
>> +static inline struct device *dev_pm_domain_attach_by_id(struct device *dev,
>> + unsigned int index)
>> +{
>> + return NULL;
>> +}
>> static inline void dev_pm_domain_detach(struct device *dev, bool power_off) {}
>> static inline void dev_pm_domain_set(struct device *dev,
>> struct dev_pm_domain *pd) {}
>>
>
> My only other comments on this series are ...
>
> 1. I think it would be nice to have an dev_pm_domain_attach_by_name() and
> that the DT binding has a 'power-domain-names' property.
I think it makes sense, but my plan was to do that as second step on
top. Are you okay with that as well?
> 2. I am wondering if there could be value in having a
> dev_pm_domain_attach_link_all() helper which would attach and link all
> PM domains at once.
Perhaps it can be useful, yes! However, maybe we can postpone that to
after this series. I want to keep the series as simple as possible,
then we can build upon it.
Kind regards
Uffe
^ permalink raw reply
* [PATCH v5 2/2] arm64: signal: Report signal frame size to userspace via auxv
From: Dave Martin @ 2018-05-30 10:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180529204230.GG591@arm.com>
On Tue, May 29, 2018 at 09:42:31PM +0100, Will Deacon wrote:
> Hi Dave,
>
> Cheers for respinning this. Just one observation below, which I only just
> thought about.
>
> On Fri, May 25, 2018 at 04:17:08PM +0100, Dave Martin wrote:
> > Stateful CPU architecture extensions may require the signal frame
> > to grow to a size that exceeds the arch's MINSIGSTKSZ #define.
> > However, changing this #define is an ABI break.
> >
> > To allow userspace the option of determining the signal frame size
> > in a more forwards-compatible way, this patch adds a new auxv entry
> > tagged with AT_MINSIGSTKSZ, which provides the maximum signal frame
> > size that the process can observe during its lifetime.
> >
> > If AT_MINSIGSTKSZ is absent from the aux vector, the caller can
> > assume that the MINSIGSTKSZ #define is sufficient. This allows for
> > a consistent interface with older kernels that do not provide
> > AT_MINSIGSTKSZ.
> >
> > The idea is that libc could expose this via sysconf() or some
> > similar mechanism.
> >
> > There is deliberately no AT_SIGSTKSZ. The kernel knows nothing
> > about userspace's own stack overheads and should not pretend to
> > know.
>
> [...]
>
> > diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
> > index fac1c4d..8cf112b 100644
> > --- a/arch/arm64/include/asm/elf.h
> > +++ b/arch/arm64/include/asm/elf.h
> > @@ -121,6 +121,9 @@
> >
> > #ifndef __ASSEMBLY__
> >
> > +#include <linux/bug.h>
> > +#include <asm/processor.h> /* for signal_minsigstksz, used by ARCH_DLINFO */
> > +
> > typedef unsigned long elf_greg_t;
> >
> > #define ELF_NGREG (sizeof(struct user_pt_regs) / sizeof(elf_greg_t))
> > @@ -148,6 +151,14 @@ typedef struct user_fpsimd_state elf_fpregset_t;
> > do { \
> > NEW_AUX_ENT(AT_SYSINFO_EHDR, \
> > (elf_addr_t)current->mm->context.vdso); \
> > + \
> > + /* \
> > + * Should always be nonzero unless there's a kernel bug. \
> > + * If we haven't determined a sensible value to give to \
> > + * userspace, omit the entry: \
> > + */ \
> > + if (likely(signal_minsigstksz)) \
> > + NEW_AUX_ENT(AT_MINSIGSTKSZ, signal_minsigstksz); \
> > } while (0)
>
> I think this is the desired behaviour, but now I'm worried that we're forced
> to have AT_VECTOR_SIZE_ARCH defined as 2 and, whilst you're correct that the
> ELF loader deals with this gracefuly, the FDPIC loader looks a lot less
> robust (in particular, my reading is that it decrements the stack pointer
> and then pushes these entries in reverse order by overloading NEW_AUX_ENT).
config BINFMT_ELF_FDPIC
/* ... */
depends on (ARM || (SUPERH32 & !MMU) || C6X)
The FDPIC loader seems to assume it's 32-bit only and also looks broken
with regard to auxv:
/* force 16 byte _final_ alignment here for generality */
#define DLINFO_ITEMS 15
/* ... */
nr = 0;
csp -= 2 * sizeof(unsigned long);
NEW_AUX_ENT(AT_EXECFD, ...);
}
/* ... */
csp -= DLINFO_ITEMS * 2 * sizeof(unsigned long);
NEW_AUX_ENT(AT_HWCAP, ELF_HWCAP);
#ifdef ELF_HWCAP2
NEW_AUX_ENT(AT_HWCAP2, ELF_HWCAP2);
#endif
/* 14 more NEW_AUX_ENT() */
Looks like commit 2171364d1a92 ("powerpc: Add HWCAP2 aux entry") added
HWCAP2 without ensuring that space is reserved.
I can try to draft a patch to handle the auxv in a more sane way for
FDPIC, but either way I don't see that it should be relevant to arm64.
AT_IGNORE feels like a bit of a fig leaf, but it's harmless enough. I'm
happy to add it if you prefer.
Cheers
---Dave
^ permalink raw reply
* [PATCH v4 1/2] regulator: dt-bindings: add QCOM RPMh regulator bindings
From: Mark Brown @ 2018-05-30 10:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAD=FV=VH0bTxPOmRr+jUyV0cGNQHLcwQTV9L-t0bxZOqD8FnHA@mail.gmail.com>
On Tue, May 29, 2018 at 10:23:20PM -0700, Doug Anderson wrote:
> > + qcom,drms-mode-max-microamps = <10000 1000000>;
> Things look pretty good to me now. I'm still hesitant about the whole
> need to list the modes twice (once using the unordered
> "regulator-allowed-modes" and once to match up against the ordered
> "qcom,drms-mode-max-microamps"). I'm also still of the opinion that
> the whole "drms-mode-max-microamps" ought to be a standard property
> (not a qcom specific one) and handled in the regulator core.
I'm confused as to why we are specifying the maximum current the device
can deliver in a given mode in the DT - surely that's a fixed property
of the hardware?
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^ permalink raw reply
* [PATCH v3 2/2] drm/nouveau: tegra: Detach from ARM DMA/IOMMU mapping
From: Robin Murphy @ 2018-05-30 10:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530080345.2353-3-thierry.reding@gmail.com>
On 30/05/18 09:03, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Depending on the kernel configuration, early ARM architecture setup code
> may have attached the GPU to a DMA/IOMMU mapping that transparently uses
> the IOMMU to back the DMA API. Tegra requires special handling for IOMMU
> backed buffers (a special bit in the GPU's MMU page tables indicates the
> memory path to take: via the SMMU or directly to the memory controller).
> Transparently backing DMA memory with an IOMMU prevents Nouveau from
> properly handling such memory accesses and causes memory access faults.
>
> As a side-note: buffers other than those allocated in instance memory
> don't need to be physically contiguous from the GPU's perspective since
> the GPU can map them into contiguous buffers using its own MMU. Mapping
> these buffers through the IOMMU is unnecessary and will even lead to
> performance degradation because of the additional translation. One
> exception to this are compressible buffers which need large pages. In
> order to enable these large pages, multiple small pages will have to be
> combined into one large (I/O virtually contiguous) mapping via the
> IOMMU. However, that is a topic outside the scope of this fix and isn't
> currently supported. An implementation will want to explicitly create
> these large pages in the Nouveau driver, so detaching from a DMA/IOMMU
> mapping would still be required.
I wonder if it might make sense to have a hook in iommu_attach_device()
to notify the arch DMA API code when moving devices between unmanaged
and DMA ops domains? That seems like it might be the most low-impact way
to address the overall problem long-term.
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Changes in v3:
> - clarify the use of IOMMU mapping for compressible buffers
> - squash multiple patches into this
>
> drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
> index 78597da6313a..d0538af1b967 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
> @@ -105,6 +105,11 @@ nvkm_device_tegra_probe_iommu(struct nvkm_device_tegra *tdev)
> unsigned long pgsize_bitmap;
> int ret;
>
> +#if IS_ENABLED(CONFIG_ARM)
Wouldn't CONFIG_ARM_DMA_USE_IOMMU be even more appropriate?
> + /* make sure we can use the IOMMU exclusively */
> + arm_dma_iommu_detach_device(dev);
As before, I would just use the existing infrastructure the same way the
Exynos DRM driver currently does in __exynos_iommu_attach() (albeit
without then reattaching to another DMA ops mapping).
Robin.
> +#endif
> +
> if (!tdev->func->iommu_bit)
> return;
>
>
^ permalink raw reply
* [RESEND PATCH] dmaengine: pxa: add a default requestor policy
From: Vinod @ 2018-05-30 10:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <874liqtgul.fsf@belgarion.home>
On 29-05-18, 21:13, Robert Jarzmik wrote:
> Vinod <vkoul@kernel.org> writes:
>
> > On 26-05-18, 11:54, Robert Jarzmik wrote:
> >> @@ -762,6 +762,8 @@ static void pxad_free_chan_resources(struct dma_chan *dchan)
> >> dma_pool_destroy(chan->desc_pool);
> >> chan->desc_pool = NULL;
> >>
> >> + chan->drcmr = (u32)-1;
> >
> > why not use U32_MAX for this?
> But of course, anything else you see ?
Nope that was the only one :)
--
~Vinod
^ permalink raw reply
* [PATCH 6/9] ARM: dts: wheat: Drop MTD partitioning from DT
From: Marek Vasut @ 2018-05-30 10:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180528093602.eb36j34bbfzmpmw2@verge.net.au>
On 05/28/2018 11:36 AM, Simon Horman wrote:
> On Mon, May 28, 2018 at 10:54:57AM +0200, Geert Uytterhoeven wrote:
>> Hi Simon,
>>
>> On Mon, May 28, 2018 at 10:41 AM, Simon Horman <horms@verge.net.au> wrote:
>>> On Thu, May 24, 2018 at 04:52:59PM +0200, Marek Vasut wrote:
>>>> On 05/23/2018 08:25 AM, Geert Uytterhoeven wrote:
>>>>> On Wed, May 23, 2018 at 12:01 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
>>>>>> On 05/22/2018 04:43 PM, Geert Uytterhoeven wrote:
>>>>>>> On Tue, May 22, 2018 at 2:02 PM, Marek Vasut <marek.vasut@gmail.com> wrote:
>>>>>>>> Drop the MTD partitioning from DT, since it does not describe HW
>>>>>>>> and to give way to a more flexible kernel command line partition
>>>>>>>> passing.
>>>>>>>>
>>>>>>>> To retain the original partitioning, assure you have enabled
>>>>>>>> CONFIG_MTD_CMDLINE_PARTS in your kernel config and add the
>>>>>>>> following to your kernel command line:
>>>>>>>>
>>>>>>>> mtdparts=spi0.0:256k at 0(loader),4096k(user),-(flash)
>>>>>>>
>>>>>>> I think the "@0" can be dropped, as it's optional?
>>>>>>> 4m?
>>>>>>
>>>>>> My take on this is that the loader is actually at offset 0x0 of the MTD
>>>>>> device and we explicitly state that in the mtdparts to anchor the first
>>>>>> partition within the MTD device and all the other partitions are at
>>>>>> offset +(sum of the sizes of all partitions listed before the current
>>>>>> one) relative to that first partition.
>>>>>
>>>>> Where is this explicitly states for the first partition?
>>>>>
>>>>>> Removing the @0 feels fragile at best and it seems to depend on the
>>>>>> current behavior of the code.
>>>>>
>>>>> Better, it also depends on the documented behavior:
>>>>>
>>>>> Documentation/admin-guide/kernel-parameters.txt refers to
>>>>> drivers/mtd/cmdlinepart.c, which states:
>>>>>
>>>>> * <offset> := standard linux memsize
>>>>> * if omitted the part will immediately follow the previous part
>>>>> * or 0 if the first part
>>>>>
>>>>> None of the examples listed there or under the MTD_CMDLINE_PARTS Kconfig
>>>>> help text, or in a defconfig bundled with the kernel, use @0 for the first
>>>>> partition.
>>>>
>>>> I think this is exceptionally fragile and dangerous to depend on this,
>>>> but so be it.
>>>
>>> Could you respin with this change?
>>>
>>> I would also like to ask for another change, in light of recent
>>> feedback from Olof Johansson ("Re: [GIT PULL] Renesas ARM64 Based SoC DT
>>> Updates for v4.18").
>>>
>>> Please consolidate the dts patches into a single patch?
>>
>> I think it's better to keep them split, as each commit description mentions
>> what needs to be passed on the kernel command line for the corresponding
>> board.
>>
>> Combining it in a single patch makes it much harder to extract this information.
>> Unless you're fine with a list:
>>
>> koelsch: ...
>> wheat: mtdparts=spi0.0:256k at 0(loader),4096k(user),-(flash)
>
> Lets try a list.
Reposted with a list, twice :/
--
Best regards,
Marek Vasut
^ permalink raw reply
* [PATCH V4] ARM: dts: rmobile: Drop MTD partitioning from DT
From: Marek Vasut @ 2018-05-30 10:12 UTC (permalink / raw)
To: linux-arm-kernel
Drop the MTD partitioning from DT, since it does not describe HW
and to give way to a more flexible kernel command line partition
passing.
To retain the original partitioning, assure you have enabled
CONFIG_MTD_CMDLINE_PARTS in your kernel config and add the
following to your kernel command line:
lager: mtdparts=spi0.0:256k(loader),4m(user),-(flash)
stout: mtdparts=spi0.0:512k(loader),256k(uboot),256k(uboot-env),-(flash)
koelsch: mtdparts=spi0.0:512k(loader),5632k(user),-(flash)
porter: mtdparts=spi0.0:256k(loader_prg),4m(user_prg),-(flash_fs)
wheat: mtdparts=spi0.0:256k(loader),4m(user),-(flash)
gose: mtdparts=spi0.0:256k(loader),4m(user),-(flash)
alt: mtdparts=spi0.0:256k(loader),256k(system),-(user)
silk: mtdparts=spi0.0:256k(loader),4m(user),-(flash)
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> on Koelsch
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Simon Horman <horms+renesas@verge.net.au>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: linux-renesas-soc at vger.kernel.org
---
V2: Drop the @0 anchor from the commit message, use 4m
V3: Squash the patches into one as requested by the higher ups
V4: Add this missing Vx to PATCH Vx in subject
---
arch/arm/boot/dts/r8a7790-lager.dts | 21 ---------------------
arch/arm/boot/dts/r8a7790-stout.dts | 26 --------------------------
arch/arm/boot/dts/r8a7791-koelsch.dts | 21 ---------------------
arch/arm/boot/dts/r8a7791-porter.dts | 21 ---------------------
arch/arm/boot/dts/r8a7792-wheat.dts | 21 ---------------------
arch/arm/boot/dts/r8a7793-gose.dts | 21 ---------------------
arch/arm/boot/dts/r8a7794-alt.dts | 21 ---------------------
arch/arm/boot/dts/r8a7794-silk.dts | 21 ---------------------
8 files changed, 173 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 092610e3f953..7c95e62efd46 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -710,27 +710,6 @@
spi-cpha;
spi-cpol;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7790-stout.dts b/arch/arm/boot/dts/r8a7790-stout.dts
index a13a92c26645..dc65519d53ab 100644
--- a/arch/arm/boot/dts/r8a7790-stout.dts
+++ b/arch/arm/boot/dts/r8a7790-stout.dts
@@ -211,32 +211,6 @@
spi-cpha;
spi-cpol;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00080000>;
- read-only;
- };
- partition at 80000 {
- label = "uboot";
- reg = <0x00080000 0x00040000>;
- read-only;
- };
- partition at c0000 {
- label = "uboot-env";
- reg = <0x000c0000 0x00040000>;
- read-only;
- };
- partition at 100000 {
- label = "flash";
- reg = <0x00100000 0x03f00000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 8ab793d8b2fd..406d5d29e29c 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -724,27 +724,6 @@
spi-cpha;
spi-cpol;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00080000>;
- read-only;
- };
- partition at 80000 {
- label = "user";
- reg = <0x00080000 0x00580000>;
- read-only;
- };
- partition at 600000 {
- label = "flash";
- reg = <0x00600000 0x03a00000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index a01101b49d99..45d89e064407 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -344,27 +344,6 @@
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader_prg";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user_prg";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash_fs";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts b/arch/arm/boot/dts/r8a7792-wheat.dts
index db01de7a3811..93f78716225a 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -217,27 +217,6 @@
spi-cpol;
spi-cpha;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index aa209f6e5d71..b2dd54fbe40c 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -676,27 +676,6 @@
spi-cpol;
spi-cpha;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index e17027532941..1d044ed598f3 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -419,26 +419,5 @@
spi-cpol;
spi-cpha;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "system";
- reg = <0x00040000 0x00040000>;
- read-only;
- };
- partition at 80000 {
- label = "user";
- reg = <0x00080000 0x03f80000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 7808aaee6644..b8163a0e2190 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -444,27 +444,6 @@
spi-cpol;
spi-cpha;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
--
2.17.0
^ permalink raw reply related
* [PATCH] ARM: dts: rmobile: Drop MTD partitioning from DT
From: Marek Vasut @ 2018-05-30 10:11 UTC (permalink / raw)
To: linux-arm-kernel
Drop the MTD partitioning from DT, since it does not describe HW
and to give way to a more flexible kernel command line partition
passing.
To retain the original partitioning, assure you have enabled
CONFIG_MTD_CMDLINE_PARTS in your kernel config and add the
following to your kernel command line:
lager: mtdparts=spi0.0:256k(loader),4m(user),-(flash)
stout: mtdparts=spi0.0:512k(loader),256k(uboot),256k(uboot-env),-(flash)
koelsch: mtdparts=spi0.0:512k(loader),5632k(user),-(flash)
porter: mtdparts=spi0.0:256k(loader_prg),4m(user_prg),-(flash_fs)
wheat: mtdparts=spi0.0:256k(loader),4m(user),-(flash)
gose: mtdparts=spi0.0:256k(loader),4m(user),-(flash)
alt: mtdparts=spi0.0:256k(loader),256k(system),-(user)
silk: mtdparts=spi0.0:256k(loader),4m(user),-(flash)
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> on Koelsch
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Simon Horman <horms+renesas@verge.net.au>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: linux-renesas-soc at vger.kernel.org
---
V2: Drop the @0 anchor from the commit message, use 4m
V3: Squash the patches into one as requested by the higher ups
---
arch/arm/boot/dts/r8a7790-lager.dts | 21 ---------------------
arch/arm/boot/dts/r8a7790-stout.dts | 26 --------------------------
arch/arm/boot/dts/r8a7791-koelsch.dts | 21 ---------------------
arch/arm/boot/dts/r8a7791-porter.dts | 21 ---------------------
arch/arm/boot/dts/r8a7792-wheat.dts | 21 ---------------------
arch/arm/boot/dts/r8a7793-gose.dts | 21 ---------------------
arch/arm/boot/dts/r8a7794-alt.dts | 21 ---------------------
arch/arm/boot/dts/r8a7794-silk.dts | 21 ---------------------
8 files changed, 173 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 092610e3f953..7c95e62efd46 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -710,27 +710,6 @@
spi-cpha;
spi-cpol;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7790-stout.dts b/arch/arm/boot/dts/r8a7790-stout.dts
index a13a92c26645..dc65519d53ab 100644
--- a/arch/arm/boot/dts/r8a7790-stout.dts
+++ b/arch/arm/boot/dts/r8a7790-stout.dts
@@ -211,32 +211,6 @@
spi-cpha;
spi-cpol;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00080000>;
- read-only;
- };
- partition at 80000 {
- label = "uboot";
- reg = <0x00080000 0x00040000>;
- read-only;
- };
- partition at c0000 {
- label = "uboot-env";
- reg = <0x000c0000 0x00040000>;
- read-only;
- };
- partition at 100000 {
- label = "flash";
- reg = <0x00100000 0x03f00000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 8ab793d8b2fd..406d5d29e29c 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -724,27 +724,6 @@
spi-cpha;
spi-cpol;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00080000>;
- read-only;
- };
- partition at 80000 {
- label = "user";
- reg = <0x00080000 0x00580000>;
- read-only;
- };
- partition at 600000 {
- label = "flash";
- reg = <0x00600000 0x03a00000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index a01101b49d99..45d89e064407 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -344,27 +344,6 @@
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader_prg";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user_prg";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash_fs";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts b/arch/arm/boot/dts/r8a7792-wheat.dts
index db01de7a3811..93f78716225a 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -217,27 +217,6 @@
spi-cpol;
spi-cpha;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index aa209f6e5d71..b2dd54fbe40c 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -676,27 +676,6 @@
spi-cpol;
spi-cpha;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index e17027532941..1d044ed598f3 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -419,26 +419,5 @@
spi-cpol;
spi-cpha;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "system";
- reg = <0x00040000 0x00040000>;
- read-only;
- };
- partition at 80000 {
- label = "user";
- reg = <0x00080000 0x03f80000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 7808aaee6644..b8163a0e2190 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -444,27 +444,6 @@
spi-cpol;
spi-cpha;
m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "loader";
- reg = <0x00000000 0x00040000>;
- read-only;
- };
- partition at 40000 {
- label = "user";
- reg = <0x00040000 0x00400000>;
- read-only;
- };
- partition at 440000 {
- label = "flash";
- reg = <0x00440000 0x03bc0000>;
- };
- };
};
};
--
2.17.0
^ permalink raw reply related
* [PATCH v3 1/2] ARM: dma-mapping: Implement arm_dma_iommu_detach_device()
From: Robin Murphy @ 2018-05-30 9:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530080345.2353-2-thierry.reding@gmail.com>
On 30/05/18 09:03, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Implement this function to enable drivers from detaching from any IOMMU
> domains that architecture code might have attached them to so that they
> can take exclusive control of the IOMMU via the IOMMU API.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Changes in v3:
> - make API 32-bit ARM specific
> - avoid extra local variable
>
> Changes in v2:
> - fix compilation
>
> arch/arm/include/asm/dma-mapping.h | 3 +++
> arch/arm/mm/dma-mapping-nommu.c | 4 ++++
> arch/arm/mm/dma-mapping.c | 16 ++++++++++++++++
> 3 files changed, 23 insertions(+)
>
> diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
> index 8436f6ade57d..5960e9f3a9d0 100644
> --- a/arch/arm/include/asm/dma-mapping.h
> +++ b/arch/arm/include/asm/dma-mapping.h
> @@ -103,6 +103,9 @@ extern void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
> #define arch_teardown_dma_ops arch_teardown_dma_ops
> extern void arch_teardown_dma_ops(struct device *dev);
>
> +#define arm_dma_iommu_detach_device arm_dma_iommu_detach_device
> +extern void arm_dma_iommu_detach_device(struct device *dev);
> +
> /* do not use this function in a driver */
> static inline bool is_device_dma_coherent(struct device *dev)
> {
> diff --git a/arch/arm/mm/dma-mapping-nommu.c b/arch/arm/mm/dma-mapping-nommu.c
> index f448a0663b10..eb781369377b 100644
> --- a/arch/arm/mm/dma-mapping-nommu.c
> +++ b/arch/arm/mm/dma-mapping-nommu.c
> @@ -241,3 +241,7 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
> void arch_teardown_dma_ops(struct device *dev)
> {
> }
> +
> +void arm_dma_iommu_detach_device(struct device *dev)
> +{
> +}
> diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
> index af27f1c22d93..6d8af08b3e7d 100644
> --- a/arch/arm/mm/dma-mapping.c
> +++ b/arch/arm/mm/dma-mapping.c
> @@ -2400,3 +2400,19 @@ void arch_teardown_dma_ops(struct device *dev)
>
> arm_teardown_iommu_dma_ops(dev);
> }
> +
> +void arm_dma_iommu_detach_device(struct device *dev)
> +{
> +#ifdef CONFIG_ARM_DMA_USE_IOMMU
> + struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
> +
> + if (!mapping)
> + return;
> +
> + arm_iommu_release_mapping(mapping);
Potentially freeing the mapping before you try to operate on it is never
the best idea. Plus arm_iommu_detach_device() already releases a
reference appropriately anyway, so it's a double-free.
> + arm_iommu_detach_device(dev);
> +
> + set_dma_ops(dev, arm_get_dma_map_ops(dev->archdata.dma_coherent));
> +#endif
> +}
> +EXPORT_SYMBOL(arm_dma_iommu_detach_device);
I really don't see why we need an extra function that essentially just
duplicates arm_iommu_detach_device(). The only real difference here is
that here you reset the DMA ops more appropriately, but I think the
existing function should be fixed to do that anyway, since
set_dma_ops(dev, NULL) now just behaves as an unconditional fallback to
the noncoherent arm_dma_ops, which clearly isn't always right.
Robin.
^ permalink raw reply
* [PATCH 07/12] dt-bindings: tc358754: add DT bindings
From: Andrzej Hajda @ 2018-05-30 9:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2275901.CJI6BsfBlP@avalon>
On 28.05.2018 12:18, Laurent Pinchart wrote:
> Hi Maciej,
>
> Thank you for the patch.
>
> On Monday, 28 May 2018 12:47:11 EEST Maciej Purski wrote:
>> The patch adds bindings to Toshiba DSI/LVDS bridge TC358764.
>> Bindings describe power supplies, reset gpio and video interfaces.
>>
>> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
>> Signed-off-by: Maciej Purski <m.purski@samsung.com>
>> ---
>> .../bindings/display/bridge/toshiba,tc358764.txt | 42 +++++++++++++++++++
>> 1 file changed, 42 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt
>>
>> diff --git
>> a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt
>> b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt new
>> file mode 100644
>> index 0000000..d09bdc2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt
>> @@ -0,0 +1,42 @@
>> +TC358764 MIPI-DSI to LVDS panel bridge
>> +
>> +Required properties:
>> + - compatible: "toshiba,tc358764"
>> + - reg: the virtual channel number of a DSI peripheral
>> + - vddc-supply: core voltage supply
>> + - vddio-supply: I/O voltage supply
>> + - vddmipi-supply: MIPI voltage supply
>> + - vddlvds133-supply: LVDS1 3.3V voltage supply
>> + - vddlvds112-supply: LVDS1 1.2V voltage supply
> That's a lot of power supplies. Could some of them be merged together ? See
> https://patchwork.freedesktop.org/patch/216058/ for an earlier discussion on
> the same subject.
Specs says about 3 supply voltage values:
- 1.2V - digital core, DSI-RX PHY
- 1.8-3.3V - digital I/O
- 3.3V - LVDS-TX PHY
So I guess it should be minimal number of supplies. Natural candidates:
- vddc-supply: core voltage supply, 1.2V
- vddio-supply: I/O voltage supply, 1.8V or 3.3V
- vddlvds-supply: LVDS1/2 voltage supply, 3.3V
I have changed name of the latest supply to be more consistent with
other supplies, and changed 1.8-3.3 (which incorrectly suggest voltage
range), to more precise voltage alternative.
>
>> + - reset-gpios: a GPIO spec for the reset pin
>> +
>> +The device node can contain zero to two 'port' child nodes, each with one
>> +child
>> +'endpoint' node, according to the bindings defined in [1].
>> +The following are properties specific to those nodes.
>> +
>> +port:
>> + - reg: (required) can be 0 for DSI port or 1 for LVDS port;
> This seems pretty vague to me. It could be read as meaning that ports are
> completely optional, and that the port number you list can be used, but that
> something else could be used to.
>
> Let's make the port nodes mandatory. I propose the following.
>
> Required nodes:
>
> The TC358764 has DSI and LVDS ports whose connections are described using the
> OF graph bindings defined in Documentation/devicetree/bindings/graph.txt. The
> device node must contain one 'port' child node per DSI and LVDS port. The port
> nodes are numbered as follows.
>
> Port Number
> -------------------------------------------------------------------
> DSI Input 0
> LVDS Output 1
>
> Each port node must contain endpoint nodes describing the hardware
> connections.
Since the bridge is controlled via DSI bus, DSI input port is not necessary.
Regards
Andrzej
>
>> +[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
>> +
>> +Example:
>> +
>> + bridge at 0 {
>> + reg = <0>;
>> + compatible = "toshiba,tc358764";
>> + vddc-supply = <&vcc_1v2_reg>;
>> + vddio-supply = <&vcc_1v8_reg>;
>> + vddmipi-supply = <&vcc_1v2_reg>;
>> + vddlvds133-supply = <&vcc_3v3_reg>;
>> + vddlvds112-supply = <&vcc_1v2_reg>;
>> + reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + port at 1 {
>> + reg = <1>;
>> + lvds_ep: endpoint {
>> + remote-endpoint = <&panel_ep>;
>> + };
>> + };
>> + };
^ permalink raw reply
* [PATCH v3 4/5] clocksource: add driver for i.MX EPIT timer
From: Clément PERON @ 2018-05-30 9:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <e2e8bbe6-5957-a8fa-af3c-816f0ad80e32@mentor.com>
Hi Vladimir,
Le mer. 30 mai 2018 ? 08:56, Vladimir Zapolskiy <
vladimir_zapolskiy@mentor.com> a ?crit :
> Hi Cl?ment,
> please find some more review comments.
> On 05/29/2018 08:04 PM, Cl?ment P?ron wrote:
> > From: Colin Didier <colin.didier@devialet.com>
> >
> > Add driver for NXP's EPIT timer used in i.MX 6 family of SoC.
> >
> > Signed-off-by: Colin Didier <colin.didier@devialet.com>
> > Signed-off-by: Cl?ment Peron <clement.peron@devialet.com>
> > ---
> > drivers/clocksource/Kconfig | 12 ++
> > drivers/clocksource/Makefile | 1 +
> > drivers/clocksource/timer-imx-epit.c | 283 +++++++++++++++++++++++++++
> > 3 files changed, 296 insertions(+)
> > create mode 100644 drivers/clocksource/timer-imx-epit.c
> >
> > diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> > index 8e8a09755d10..920a0874f3a4 100644
> > --- a/drivers/clocksource/Kconfig
> > +++ b/drivers/clocksource/Kconfig
> > @@ -576,6 +576,18 @@ config H8300_TPU
> > This enables the clocksource for the H8300 platform with the
> > H8S2678 cpu.
> >
> > +config CLKSRC_IMX_EPIT
> > + bool "Clocksource using i.MX EPIT"
> > + depends on ARM && CLKDEV_LOOKUP && OF && (ARCH_MXC ||
COMPILE_TEST)
> Here 'depends on ARM' can be removed, because ARCH_MXC implies it.
> Also ARCH_MXC implies ARCH_MULTIPLATFORM, which implies USE_OF in turn,
> so I would say that the following line is correct, sorry about a previous
> comment asking to add an explicit OF dependency:
> depends on CLKDEV_LOOKUP && (ARCH_MXC || COMPILE_TEST)
> However most of the clocksource drivers follow 'bool "..." if
COMPILE_TEST'
> pattern, and it might be preferable to maintainers.
Usually, the timer driver are selected in the arch Kconfig. But in this
case,
we want to keep the i.MX GPT except if the user explicitly select the i.MX
EPIT.
With the "if COMPILE_TEST" the user can't choose it.
> > + select TIMER_OF
> The driver does not have this dependency.
> > + select CLKSRC_MMIO
> > + help
> > + This enables EPIT support available on some i.MX platforms.
> > + Normally you don't have a reason to do so as the EPIT has
> > + the same features and uses the same clocks as the GPT.
> > + Anyway, on some systems the GPT may be in use for other
> > + purposes.
> > +
> > config CLKSRC_IMX_GPT
> > bool "Clocksource using i.MX GPT" if COMPILE_TEST
> > depends on ARM && CLKDEV_LOOKUP
> > diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> > index 00caf37e52f9..d9426f69ec69 100644
> > --- a/drivers/clocksource/Makefile
> > +++ b/drivers/clocksource/Makefile
> > @@ -69,6 +69,7 @@ obj-$(CONFIG_INTEGRATOR_AP_TIMER) +=
timer-integrator-ap.o
> > obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o
> > obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o
> > obj-$(CONFIG_CLKSRC_TANGO_XTAL) += tango_xtal.o
> > +obj-$(CONFIG_CLKSRC_IMX_EPIT) += timer-imx-epit.o
> > obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o
> > obj-$(CONFIG_CLKSRC_IMX_TPM) += timer-imx-tpm.o
> > obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o
> > diff --git a/drivers/clocksource/timer-imx-epit.c
b/drivers/clocksource/timer-imx-epit.c
> > new file mode 100644
> > index 000000000000..87025d5f3a97
> > --- /dev/null
> > +++ b/drivers/clocksource/timer-imx-epit.c
> > @@ -0,0 +1,283 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * i.MX EPIT Timer
> > + *
> > + * Copyright (C) 2010 Sascha Hauer <s.hauer@pengutronix.de>
> > + * Copyright (C) 2018 Colin Didier <colin.didier@devialet.com>
> > + * Copyright (C) 2018 Cl?ment P?ron <clement.peron@devialet.com>
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/clockchips.h>
> > +#include <linux/err.h>
> The include above can be dropped.
> > +#include <linux/interrupt.h>
> > +#include <linux/irq.h>
> The include above can be dropped.
> > +#include <linux/of_address.h>
> > +#include <linux/of_irq.h>
> > +#include <linux/of.h>
> The include above can be dropped.
> > +#include <linux/sched_clock.h>
> > +#include <linux/slab.h>
> > +
> > +#define EPITCR 0x00
> > +#define EPITSR 0x04
> > +#define EPITLR 0x08
> > +#define EPITCMPR 0x0c
> > +#define EPITCNR 0x10
> > +
> > +#define EPITCR_EN BIT(0)
> > +#define EPITCR_ENMOD BIT(1)
> > +#define EPITCR_OCIEN BIT(2)
> > +#define EPITCR_RLD BIT(3)
> > +#define EPITCR_PRESC(x) (((x) & 0xfff) << 4)
> > +#define EPITCR_SWR BIT(16)
> > +#define EPITCR_IOVW BIT(17)
> > +#define EPITCR_DBGEN BIT(18)
> > +#define EPITCR_WAITEN BIT(19)
> > +#define EPITCR_RES BIT(20)
> > +#define EPITCR_STOPEN BIT(21)
> > +#define EPITCR_OM_DISCON (0 << 22)
> > +#define EPITCR_OM_TOGGLE (1 << 22)
> > +#define EPITCR_OM_CLEAR (2 << 22)
> > +#define EPITCR_OM_SET (3 << 22)
> > +#define EPITCR_CLKSRC_OFF (0 << 24)
> > +#define EPITCR_CLKSRC_PERIPHERAL (1 << 24)
> > +#define EPITCR_CLKSRC_REF_HIGH (2 << 24)
> > +#define EPITCR_CLKSRC_REF_LOW (3 << 24)
> > +
> > +#define EPITSR_OCIF BIT(0)
> > +
> > +struct epit_timer {
> > + void __iomem *base;
> > + int irq;
> > + struct clk *clk_per;
> > + struct clock_event_device ced;
> > + struct irqaction act;
> > +};
> > +
> > +static void __iomem *sched_clock_reg;
> > +
> > +static inline struct epit_timer *to_epit_timer(struct
clock_event_device *ced)
> > +{
> > + return container_of(ced, struct epit_timer, ced);
> > +}
> > +
> > +static inline void epit_irq_disable(struct epit_timer *epittm)
> > +{
> > + u32 val;
> > +
> > + val = readl_relaxed(epittm->base + EPITCR);
> > + writel_relaxed(val & ~EPITCR_OCIEN, epittm->base + EPITCR);
> > +}
> > +
> > +static inline void epit_irq_enable(struct epit_timer *epittm)
> > +{
> > + u32 val;
> > +
> > + val = readl_relaxed(epittm->base + EPITCR);
> > + writel_relaxed(val | EPITCR_OCIEN, epittm->base + EPITCR);
> > +}
> > +
> > +static void epit_irq_acknowledge(struct epit_timer *epittm)
> > +{
> > + writel_relaxed(EPITSR_OCIF, epittm->base + EPITSR);
> > +}
> > +
> > +static u64 notrace epit_read_sched_clock(void)
> > +{
> > + return ~readl_relaxed(sched_clock_reg);
> > +}
> > +
> > +static int __init epit_clocksource_init(struct epit_timer *epittm)
> > +{
> > + unsigned int c = clk_get_rate(epittm->clk_per);
> > +
> > + sched_clock_reg = epittm->base + EPITCNR;
> > + sched_clock_register(epit_read_sched_clock, 32, c);
> > +
> > + return clocksource_mmio_init(epittm->base + EPITCNR, "epit", c,
200, 32,
> > + clocksource_mmio_readl_down);
> > +}
> > +
> I would suggest to place epit_clocksource_init() function right before
> epit_timer_init().
> > +static int epit_set_next_event(unsigned long cycles,
> > + struct clock_event_device *ced)
> > +{
> > + struct epit_timer *epittm = to_epit_timer(ced);
> > + unsigned long tcmp;
> > +
> > + tcmp = readl_relaxed(epittm->base + EPITCNR) - cycles;
> > + writel_relaxed(tcmp, epittm->base + EPITCMPR);
> > +
> > + return 0;
> > +}
> > +
> > +/* Left event sources disabled, no more interrupts appear */
> > +static int epit_shutdown(struct clock_event_device *ced)
> > +{
> > + struct epit_timer *epittm = to_epit_timer(ced);
> > + unsigned long flags;
> > +
> > + /*
> > + * The timer interrupt generation is disabled at least
> > + * for enough time to call epit_set_next_event()
> > + */
> > + local_irq_save(flags);
> > +
> > + /* Disable interrupt in EPIT module */
> > + epit_irq_disable(epittm);
> > +
> > + /* Clear pending interrupt */
> > + epit_irq_acknowledge(epittm);
> > +
> > + local_irq_restore(flags);
> > +
> > + return 0;
> > +}
> > +
> > +static int epit_set_oneshot(struct clock_event_device *ced)
> > +{
> > + struct epit_timer *epittm = to_epit_timer(ced);
> > + unsigned long flags;
> > +
> > + /*
> > + * The timer interrupt generation is disabled at least
> > + * for enough time to call epit_set_next_event()
> > + */
> > + local_irq_save(flags);
> > +
> > + /* Disable interrupt in EPIT module */
> > + epit_irq_disable(epittm);
> > +
> > + /* Clear pending interrupt, only while switching mode */
> > + if (!clockevent_state_oneshot(ced))
> > + epit_irq_acknowledge(epittm);
> > +
> > + /*
> > + * Do not put overhead of interrupt enable/disable into
> > + * epit_set_next_event(), the core has about 4 minutes
> > + * to call epit_set_next_event() or shutdown clock after
> > + * mode switching
> > + */
> > + epit_irq_enable(epittm);
> > + local_irq_restore(flags);
> > +
> > + return 0;
> > +}
> > +
> > +static irqreturn_t epit_timer_interrupt(int irq, void *dev_id)
> > +{
> > + struct clock_event_device *ced = dev_id;
> > + struct epit_timer *epittm = to_epit_timer(ced);
> > +
> > + epit_irq_acknowledge(epittm);
> > +
> > + ced->event_handler(ced);
> > +
> > + return IRQ_HANDLED;
> > +}
> > +
> > +static int __init epit_clockevent_init(struct epit_timer *epittm)
> > +{
> > + struct clock_event_device *ced = &epittm->ced;
> > + struct irqaction *act = &epittm->act;
> > +
> > + ced->name = "epit";
> > + ced->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_DYNIRQ;
> > + ced->set_state_shutdown = epit_shutdown;
> > + ced->tick_resume = epit_shutdown;
> > + ced->set_state_oneshot = epit_set_oneshot;
> > + ced->set_next_event = epit_set_next_event;
> > + ced->rating = 200;
> > + ced->cpumask = cpumask_of(0);
> > + ced->irq = epittm->irq;
> > + clockevents_config_and_register(ced,
clk_get_rate(epittm->clk_per),
> > + 0xff, 0xfffffffe);
> Please indent the wrapped line.
> > +
> > + act->name = "i.MX EPIT Timer Tick",
> > + act->flags = IRQF_TIMER | IRQF_IRQPOLL;
> > + act->handler = epit_timer_interrupt;
> > + act->dev_id = ced;
> > +
> > + /* Make irqs happen */
> > + return setup_irq(epittm->irq, act);
> > +}
> > +
> > +static int __init epit_timer_init(struct device_node *np)
> > +{
> > + struct epit_timer *epittm;
> > + struct clk *clk_ipg;
> > + int ret;
> > +
> > + epittm = kzalloc(sizeof(*epittm), GFP_KERNEL);
> > + if (!epittm)
> > + return -ENOMEM;
> > +
> > + epittm->base = of_iomap(np, 0);
> > + if (!epittm->base) {
> > + ret = -ENXIO;
> > + goto out_kfree;
> > + }
> > +
> > + epittm->irq = irq_of_parse_and_map(np, 0);
> > + if (!epittm->irq) {
> > + ret = -EINVAL;
> > + goto out_iounmap;
> > + }
> > +
> > + clk_ipg = of_clk_get_by_name(np, "ipg");
> > + if (IS_ERR(clk_ipg)) {
> > + pr_err("i.MX EPIT: unable to get clk_ipg\n");
> > + ret = PTR_ERR(clk_ipg);
> > + goto out_iounmap;
> > + }
> > +
> > + ret = clk_prepare_enable(clk_ipg);
> > + if (ret) {
> > + pr_err("i.MX EPIT: unable to prepare+enable clk_ipg\n");
> > + goto out_clk_ipg_disable;
> > + }
> > +
> > + epittm->clk_per = of_clk_get_by_name(np, "per");
> > + if (IS_ERR(epittm->clk_per)) {
> > + pr_err("i.MX EPIT: unable to get clk_per\n");
> > + ret = PTR_ERR(epittm->clk_per);
> > + goto out_clk_ipg_disable;
> > + }
> > +
> > + ret = clk_prepare_enable(epittm->clk_per);
> > + if (ret) {
> > + pr_err("i.MX EPIT: unable to prepare+enable clk_per\n");
> > + goto out_clk_ipg_disable;
> > + }
> > +
> > + /* Initialise to a known state (all timers off, and timing reset)
*/
> > + writel_relaxed(0x0, epittm->base + EPITCR);
> > + writel_relaxed(0xffffffff, epittm->base + EPITLR);
> > + writel_relaxed(EPITCR_EN | EPITCR_CLKSRC_REF_HIGH | EPITCR_WAITEN,
> > + epittm->base + EPITCR);
> > +
> > + ret = epit_clocksource_init(epittm);
> > + if(ret) {
> Add a space before left parenthesis.
> > + pr_err("i.MX EPIT: failed to init clocksource\n");
> > + goto out_clk_per_disable;
> > + }
> > +
> > + ret = epit_clockevent_init(epittm);
> > + if(ret) {
> Add a space before left parenthesis.
> > + pr_err("i.MX EPIT: failed to init clockevent\n");
> > + goto out_clk_per_disable;
> > + }
> > +
> > + return 0;
> > +
> > +out_clk_per_disable:
> > + clk_disable_unprepare(epittm->clk_per);
> > +out_clk_ipg_disable:
> > + clk_disable_unprepare(clk_ipg);
> > +out_iounmap:
> > + iounmap(epittm->base);
> > +out_kfree:
> > + kfree(epittm);
> > +
> > + return ret;
> > +}
> > +TIMER_OF_DECLARE(mx6q_timer, "fsl,imx6q-epit", epit_timer_init);
> >
> Here "fsl,imx31-epit" would be way better than "fsl,imx6q-epit", please
> fix it in the documentation as well.
> --
> With best wishes,
> Vladimir
Thanks for your review,
Clement
--
https://www.devialet.com/buy-phantom <https://www.devialet.com/buy-phantom>
- Confidential -
^ permalink raw reply
* [PATCH] arm64: mm: mark tramp_pg_dir read-only
From: Ard Biesheuvel @ 2018-05-30 9:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530091457.GB2452@arm.com>
On 30 May 2018 at 11:14, Will Deacon <will.deacon@arm.com> wrote:
> On Wed, May 30, 2018 at 12:48:06PM +0800, YaoJun wrote:
>> To protect against KSMA(Kernel Space Mirroring Attack), make
>> tramp_pg_dir read-only. The principle of KSMA is to insert a
>> carefully constructed PGD entry into the translation table.
>> The type of this entry is block, which maps the kernel text
>> and its access permissions bits are 01. The user process can
>> then modify kernel text directly through this mapping. In this
>> way, an arbitrary write can be converted to multiple arbitrary
>> writes.
>>
>> Signed-off-by: YaoJun <yaojun8558363@gmail.com>
>> ---
>> arch/arm64/mm/mmu.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
>> index 2dbb2c9f1ec1..ac4b22c7e435 100644
>> --- a/arch/arm64/mm/mmu.c
>> +++ b/arch/arm64/mm/mmu.c
>> @@ -551,6 +551,10 @@ static int __init map_entry_trampoline(void)
>> __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE,
>> prot, pgd_pgtable_alloc, 0);
>>
>> + update_mapping_prot(__pa_symbol(tramp_pg_dir),
>> + (unsigned long)tramp_pg_dir,
>> + PGD_SIZE, PAGE_KERNEL_RO);
>
> Hmm, I like the idea but is there a risk that the page table has been mapped
> as part of a block entry, which we can't safely split at this point (i.e.
> we'll run into one of the BUG_ONs in the mapping code)?
>
We'd need to create a separate segment for it initially so the mapping
is already at the right granularity.
^ permalink raw reply
* [xlnx:xlnx_rebase_v4.14 471/940] drivers/usb/dwc3/core.h:1242: multiple definition of `dwc3_set_usb_core_power'
From: kbuild test robot @ 2018-05-30 9:48 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v4.14
head: 7a6053b3d256fa5bc23f28a9d9a23d7a2004c5b7
commit: b5ef7eccd876aba79c9f4eca712f0d4a89c50363 [471/940] dwc3: Add code for supporting entering into D3 state during suspend
config: i386-randconfig-s0-201821 (attached as .config)
compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026
reproduce:
git checkout b5ef7eccd876aba79c9f4eca712f0d4a89c50363
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/usb/dwc3/trace.o: In function `dwc3_simple_wakeup_capable':
drivers/usb/dwc3/core.h:1236: multiple definition of `dwc3_simple_wakeup_capable'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1236: first defined here
drivers/usb/dwc3/trace.o: In function `dwc3_set_simple_data':
drivers/usb/dwc3/core.h:1236: multiple definition of `dwc3_set_simple_data'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1236: first defined here
drivers/usb/dwc3/trace.o: In function `dwc3_simple_check_quirks':
drivers/usb/dwc3/core.h:1240: multiple definition of `dwc3_simple_check_quirks'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1240: first defined here
drivers/usb/dwc3/trace.o: In function `dwc3_set_usb_core_power':
>> drivers/usb/dwc3/core.h:1242: multiple definition of `dwc3_set_usb_core_power'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1242: first defined here
drivers/usb/dwc3/host.o: In function `dwc3_simple_wakeup_capable':
include/linux/device.h:984: multiple definition of `dwc3_simple_wakeup_capable'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1236: first defined here
drivers/usb/dwc3/host.o: In function `dwc3_set_simple_data':
include/linux/device.h:984: multiple definition of `dwc3_set_simple_data'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1236: first defined here
drivers/usb/dwc3/host.o: In function `dwc3_simple_check_quirks':
drivers/usb/dwc3/core.h:1240: multiple definition of `dwc3_simple_check_quirks'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1240: first defined here
drivers/usb/dwc3/host.o: In function `dwc3_set_usb_core_power':
>> drivers/usb/dwc3/core.h:1242: multiple definition of `dwc3_set_usb_core_power'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1242: first defined here
drivers/usb/dwc3/ulpi.o: In function `dwc3_simple_wakeup_capable':
drivers/usb/dwc3/core.h:1236: multiple definition of `dwc3_simple_wakeup_capable'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1236: first defined here
drivers/usb/dwc3/ulpi.o: In function `dwc3_set_simple_data':
drivers/usb/dwc3/core.h:1236: multiple definition of `dwc3_set_simple_data'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1236: first defined here
drivers/usb/dwc3/ulpi.o: In function `dwc3_simple_check_quirks':
drivers/usb/dwc3/core.h:1240: multiple definition of `dwc3_simple_check_quirks'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1240: first defined here
drivers/usb/dwc3/ulpi.o: In function `dwc3_set_usb_core_power':
>> drivers/usb/dwc3/core.h:1242: multiple definition of `dwc3_set_usb_core_power'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1242: first defined here
drivers/usb/dwc3/debugfs.o: In function `dwc3_simple_wakeup_capable':
drivers/usb/dwc3/core.h:1236: multiple definition of `dwc3_simple_wakeup_capable'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1236: first defined here
drivers/usb/dwc3/debugfs.o: In function `dwc3_set_simple_data':
drivers/usb/dwc3/core.h:1236: multiple definition of `dwc3_set_simple_data'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1236: first defined here
drivers/usb/dwc3/debugfs.o: In function `dwc3_simple_check_quirks':
drivers/usb/dwc3/core.h:1240: multiple definition of `dwc3_simple_check_quirks'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1240: first defined here
drivers/usb/dwc3/debugfs.o: In function `dwc3_set_usb_core_power':
>> drivers/usb/dwc3/core.h:1242: multiple definition of `dwc3_set_usb_core_power'
drivers/usb/dwc3/core.o:drivers/usb/dwc3/core.h:1242: first defined here
vim +1242 drivers/usb/dwc3/core.h
1222
1223 #if IS_ENABLED(CONFIG_USB_DWC3_OF_SIMPLE)
1224 int dwc3_enable_hw_coherency(struct device *dev);
1225 void dwc3_set_phydata(struct device *dev, struct phy *phy);
1226 void dwc3_simple_wakeup_capable(struct device *dev, bool wakeup);
1227 void dwc3_set_simple_data(struct dwc3 *dwc);
1228 void dwc3_simple_check_quirks(struct dwc3 *dwc);
1229 int dwc3_set_usb_core_power(struct dwc3 *dwc, bool on);
1230 #else
1231 static inline int dwc3_enable_hw_coherency(struct device *dev)
1232 { return 1; }
1233 static inline void dwc3_set_phydata(struct device *dev, struct phy *phy)
1234 { ; }
1235 void dwc3_simple_wakeup_capable(struct device *dev, bool wakeup)
> 1236 { ; }
1237 void dwc3_set_simple_data(struct dwc3 *dwc)
1238 { ; }
1239 void dwc3_simple_check_quirks(struct dwc3 *dwc)
1240 { ; }
1241 int dwc3_set_usb_core_power(struct dwc3 *dwc, bool on)
> 1242 { ; }
1243 #endif
1244
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH 1/4] arm64/mm: migrate swapper_pg_dir
From: Greg KH @ 2018-05-30 9:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530091259.9386-2-yaojun8558363@gmail.com>
On Wed, May 30, 2018 at 05:12:56PM +0800, YaoJun wrote:
> Introduce __pa_swapper_pg_dir to save physical address
> of swapper_pg_dir. And pass it as an argument to
> __enable_mmu().
>
> Signed-off-by: YaoJun <yaojun8558363@gmail.com>
This is better, but your subject line is still identical for all 4
patches (which doesn't make sense as they do different things), and I
think you need to put a space in your name somewhere, right?
thanks,
greg k-h
^ permalink raw reply
* [RFT v3 1/4] perf cs-etm: Generate branch sample for missed packets
From: Robert Walker @ 2018-05-30 9:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180528221347.GA4109@xps15>
On 28/05/18 23:13, Mathieu Poirier wrote:
> Leo and/or Robert,
>
> On Mon, May 28, 2018 at 04:45:00PM +0800, Leo Yan wrote:
>> Commit e573e978fb12 ("perf cs-etm: Inject capabilitity for CoreSight
>> traces") reworks the samples generation flow from CoreSight trace to
>> match the correct format so Perf report tool can display the samples
>> properly.
>>
>> But the change has side effect for branch packet handling, it only
>> generate branch samples by checking previous packet flag
>> 'last_instr_taken_branch' is true, this results in below three kinds
>> packets are missed to generate branch samples:
>>
>> - The start tracing packet at the beginning of tracing data;
>> - The exception handling packet;
>> - If one CS_ETM_TRACE_ON packet is inserted, we also miss to handle it
>> for branch samples. CS_ETM_TRACE_ON packet itself can give the info
>> that there have a discontinuity in the trace, on the other hand we
>> also miss to generate proper branch sample for packets before and
>> after CS_ETM_TRACE_ON packet.
>>
>> This patch is to add branch sample handling for up three kinds packets:
>>
>> - In function cs_etm__sample(), check if 'prev_packet->sample_type' is
>> zero and in this case it generates branch sample for the start tracing
>> packet; furthermore, we also need to handle the condition for
>> prev_packet::end_addr is zero in the cs_etm__last_executed_instr();
>>
>> - In function cs_etm__sample(), check if 'prev_packet->exc' is true and
>> generate branch sample for exception handling packet;
>>
>> - If there has one CS_ETM_TRACE_ON packet is coming, we firstly generate
>> branch sample in the function cs_etm__flush(), this can save complete
>> info for the previous CS_ETM_RANGE packet just before CS_ETM_TRACE_ON
>> packet. We also generate branch sample for the new CS_ETM_RANGE
>> packet after CS_ETM_TRACE_ON packet, this have two purposes, the
>> first one purpose is to save the info for the new CS_ETM_RANGE packet,
>> the second purpose is to save CS_ETM_TRACE_ON packet info so we can
>> have hint for a discontinuity in the trace.
>>
>> For CS_ETM_TRACE_ON packet, its fields 'packet->start_addr' and
>> 'packet->end_addr' equal to 0xdeadbeefdeadbeefUL which are emitted in
>> the decoder layer as dummy value. This patch is to convert these
>> values to zeros for more readable; this is accomplished by functions
>> cs_etm__last_executed_instr() and cs_etm__first_executed_instr(). The
>> later one is a new function introduced by this patch.
>>
>> Reviewed-by: Robert Walker <robert.walker@arm.com>
>> Fixes: e573e978fb12 ("perf cs-etm: Inject capabilitity for CoreSight traces")
>> Signed-off-by: Leo Yan <leo.yan@linaro.org>
>> ---
>> tools/perf/util/cs-etm.c | 93 +++++++++++++++++++++++++++++++++++++-----------
>> 1 file changed, 73 insertions(+), 20 deletions(-)
>>
>> diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
>> index 822ba91..8418173 100644
>> --- a/tools/perf/util/cs-etm.c
>> +++ b/tools/perf/util/cs-etm.c
>> @@ -495,6 +495,20 @@ static inline void cs_etm__reset_last_branch_rb(struct cs_etm_queue *etmq)
>> static inline u64 cs_etm__last_executed_instr(struct cs_etm_packet *packet)
>> {
>> /*
>> + * The packet is the start tracing packet if the end_addr is zero,
>> + * returns 0 for this case.
>> + */
>> + if (!packet->end_addr)
>> + return 0;
>
> What is considered to be the "start tracing packet"? Right now the only two
> kind of packets inserted in the decoder packet buffer queue are INST_RANGE and
> TRACE_ON. How can we hit a condition where packet->end-addr == 0?
>
>
>> +
>> + /*
>> + * The packet is the CS_ETM_TRACE_ON packet if the end_addr is
>> + * magic number 0xdeadbeefdeadbeefUL, returns 0 for this case.
>> + */
>> + if (packet->end_addr == 0xdeadbeefdeadbeefUL)
>> + return 0;
>
> As it is with the above, I find triggering on addresses to be brittle and hard
> to maintain on the long run. Packets all have a sample_type field that should
> be used in cases like this one. That way we know exactly the condition that is
> targeted.
>
> While working on this set, please spin-off another patch that defines
> CS_ETM_INVAL_ADDR 0xdeadbeefdeadbeefUL and replace all the cases where the
> numeral is used. That way we stop using the hard coded value.
>
>> +
>> + /*
>> * The packet records the execution range with an exclusive end address
>> *
>> * A64 instructions are constant size, so the last executed
>> @@ -505,6 +519,18 @@ static inline u64 cs_etm__last_executed_instr(struct cs_etm_packet *packet)
>> return packet->end_addr - A64_INSTR_SIZE;
>> }
>>
>> +static inline u64 cs_etm__first_executed_instr(struct cs_etm_packet *packet)
>> +{
>> + /*
>> + * The packet is the CS_ETM_TRACE_ON packet if the start_addr is
>> + * magic number 0xdeadbeefdeadbeefUL, returns 0 for this case.
>> + */
>> + if (packet->start_addr == 0xdeadbeefdeadbeefUL)
>> + return 0;
>
> Same comment as above.
>
>> +
>> + return packet->start_addr;
>> +}
>> +
>> static inline u64 cs_etm__instr_count(const struct cs_etm_packet *packet)
>> {
>> /*
>> @@ -546,7 +572,7 @@ static void cs_etm__update_last_branch_rb(struct cs_etm_queue *etmq)
>>
>> be = &bs->entries[etmq->last_branch_pos];
>> be->from = cs_etm__last_executed_instr(etmq->prev_packet);
>> - be->to = etmq->packet->start_addr;
>> + be->to = cs_etm__first_executed_instr(etmq->packet);
>> /* No support for mispredict */
>> be->flags.mispred = 0;
>> be->flags.predicted = 1;
>> @@ -701,7 +727,7 @@ static int cs_etm__synth_branch_sample(struct cs_etm_queue *etmq)
>> sample.ip = cs_etm__last_executed_instr(etmq->prev_packet);
>> sample.pid = etmq->pid;
>> sample.tid = etmq->tid;
>> - sample.addr = etmq->packet->start_addr;
>> + sample.addr = cs_etm__first_executed_instr(etmq->packet);
>> sample.id = etmq->etm->branches_id;
>> sample.stream_id = etmq->etm->branches_id;
>> sample.period = 1;
>> @@ -897,13 +923,28 @@ static int cs_etm__sample(struct cs_etm_queue *etmq)
>> etmq->period_instructions = instrs_over;
>> }
>>
>> - if (etm->sample_branches &&
>> - etmq->prev_packet &&
>> - etmq->prev_packet->sample_type == CS_ETM_RANGE &&
>> - etmq->prev_packet->last_instr_taken_branch) {
>> - ret = cs_etm__synth_branch_sample(etmq);
>> - if (ret)
>> - return ret;
>> + if (etm->sample_branches && etmq->prev_packet) {
>> + bool generate_sample = false;
>> +
>> + /* Generate sample for start tracing packet */
>> + if (etmq->prev_packet->sample_type == 0 ||
>
> What kind of packet is sample_type == 0 ?
>
>> + etmq->prev_packet->sample_type == CS_ETM_TRACE_ON)
>> + generate_sample = true;
>> +
>> + /* Generate sample for exception packet */
>> + if (etmq->prev_packet->exc == true)
>> + generate_sample = true;
>
> Please don't do that. Exception packets have a type of their own and can be
> added to the decoder packet queue the same way INST_RANGE and TRACE_ON packets
> are. Moreover exception packet containt an address that, if I'm reading the
> documenation properly, can be used to keep track of instructions that were
> executed between the last address of the previous range packet and the address
> executed just before the exception occurred. Mike and Rob will have to confirm
> this as the decoder may be doing all that hard work for us.
>
>> +
>> + /* Generate sample for normal branch packet */
>> + if (etmq->prev_packet->sample_type == CS_ETM_RANGE &&
>> + etmq->prev_packet->last_instr_taken_branch)
>> + generate_sample = true;
>> +
>> + if (generate_sample) {
>> + ret = cs_etm__synth_branch_sample(etmq);
>> + if (ret)
>> + return ret;
>> + }
>> }
>>
>> if (etm->sample_branches || etm->synth_opts.last_branch) {
>> @@ -922,11 +963,16 @@ static int cs_etm__sample(struct cs_etm_queue *etmq)
>> static int cs_etm__flush(struct cs_etm_queue *etmq)
>> {
>> int err = 0;
>> + struct cs_etm_auxtrace *etm = etmq->etm;
>> struct cs_etm_packet *tmp;
>>
>> - if (etmq->etm->synth_opts.last_branch &&
>> - etmq->prev_packet &&
>> - etmq->prev_packet->sample_type == CS_ETM_RANGE) {
>> + if (!etmq->prev_packet)
>> + return 0;
>> +
>> + if (etmq->prev_packet->sample_type != CS_ETM_RANGE)
>> + return 0;
>> +
>> + if (etmq->etm->synth_opts.last_branch) {
>
> If you add:
>
> if (!etmq->etm->synth_opts.last_branch)
> return 0;
>
> You can avoid indenting the whole block.
>
>> /*
>> * Generate a last branch event for the branches left in the
>> * circular buffer at the end of the trace.
>> @@ -939,18 +985,25 @@ static int cs_etm__flush(struct cs_etm_queue *etmq)
>> err = cs_etm__synth_instruction_sample(
>> etmq, addr,
>> etmq->period_instructions);
>> + if (err)
>> + return err;
>> etmq->period_instructions = 0;
>> + }
>>
>> - /*
>> - * Swap PACKET with PREV_PACKET: PACKET becomes PREV_PACKET for
>> - * the next incoming packet.
>> - */
>> - tmp = etmq->packet;
>> - etmq->packet = etmq->prev_packet;
>> - etmq->prev_packet = tmp;
>> + if (etm->sample_branches) {
>> + err = cs_etm__synth_branch_sample(etmq);
>> + if (err)
>> + return err;
>> }
>>
>> - return err;
>> + /*
>> + * Swap PACKET with PREV_PACKET: PACKET becomes PREV_PACKET for
>> + * the next incoming packet.
>> + */
>> + tmp = etmq->packet;
>> + etmq->packet = etmq->prev_packet;
>> + etmq->prev_packet = tmp;
>
> Robert, I remember noticing that when you first submitted the code but forgot to
> go back to it. What is the point of swapping the packets? I understand
>
> etmq->prev_packet = etmq->packet;
>
> But not
>
> etmq->packet = tmp;
>
> After all etmq->packet will be clobbered as soon as cs_etm_decoder__get_packet()
> is called, which is alwasy right after either cs_etm__sample() or
> cs_etm__flush().
>
This is code I inherited from the original versions of these patches,
but it works because:
- etmq->packet and etmq->prev_packet are pointers to struct
cs_etm_packet allocated by zalloc() in cs_etm__alloc_queue()
- cs_etm_decoder__get_packet() takes a pointer to struct cs_etm_packet
and copies the contents of the first packet from the queue into the
passed location with:
*packet = decoder->packet_buffer[decoder->head]
So the swap code is only swapping the pointers over, not the contents of
the packets.
Regards
Rob
> Thanks,
> Mathieu
>
>
>
>> + return 0;
>> }
>>
>> static int cs_etm__run_decoder(struct cs_etm_queue *etmq)
>> --
>> 2.7.4
>>
^ permalink raw reply
* [PATCH] drm/bridge/synopsys: dw-hdmi: fix dw_hdmi_setup_rx_sense
From: Neil Armstrong @ 2018-05-30 9:43 UTC (permalink / raw)
To: linux-arm-kernel
The dw_hdmi_setup_rx_sense exported function should not use struct device
to recover the dw-hdmi context using drvdata, but take struct dw_hdmi
directly like other exported functions.
This caused a regression using Meson DRM on S905X since v4.17-rc1 :
Internal error: Oops: 96000007 [#1] PREEMPT SMP
[...]
CPU: 0 PID: 124 Comm: irq/32-dw_hdmi_ Not tainted 4.17.0-rc7 #2
Hardware name: Libre Technology CC (DT)
[...]
pc : osq_lock+0x54/0x188
lr : __mutex_lock.isra.0+0x74/0x530
[...]
Process irq/32-dw_hdmi_ (pid: 124, stack limit = 0x00000000adf418cb)
Call trace:
osq_lock+0x54/0x188
__mutex_lock_slowpath+0x10/0x18
mutex_lock+0x30/0x38
__dw_hdmi_setup_rx_sense+0x28/0x98
dw_hdmi_setup_rx_sense+0x10/0x18
dw_hdmi_top_thread_irq+0x2c/0x50
irq_thread_fn+0x28/0x68
irq_thread+0x10c/0x1a0
kthread+0x128/0x130
ret_from_fork+0x10/0x18
Code: 34000964 d00050a2 51000484 9135c042 (f864d844)
---[ end trace 945641e1fbbc07da ]---
note: irq/32-dw_hdmi_[124] exited with preempt_count 1
genirq: exiting task "irq/32-dw_hdmi_" (124) is an active IRQ thread (irq 32)
Fixes: eea034af90c6 ("drm/bridge/synopsys: dw-hdmi: don't clobber drvdata")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Koen Kooi <koen@dominion.thruhere.net>
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 15 ++++-----------
drivers/gpu/drm/meson/meson_dw_hdmi.c | 2 +-
include/drm/bridge/dw_hdmi.h | 2 +-
3 files changed, 6 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index ec8d000..3c136f2b 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -2077,7 +2077,7 @@ static irqreturn_t dw_hdmi_hardirq(int irq, void *dev_id)
return ret;
}
-void __dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense)
+void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense)
{
mutex_lock(&hdmi->mutex);
@@ -2103,13 +2103,6 @@ void __dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense)
}
mutex_unlock(&hdmi->mutex);
}
-
-void dw_hdmi_setup_rx_sense(struct device *dev, bool hpd, bool rx_sense)
-{
- struct dw_hdmi *hdmi = dev_get_drvdata(dev);
-
- __dw_hdmi_setup_rx_sense(hdmi, hpd, rx_sense);
-}
EXPORT_SYMBOL_GPL(dw_hdmi_setup_rx_sense);
static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
@@ -2145,9 +2138,9 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
*/
if (intr_stat &
(HDMI_IH_PHY_STAT0_RX_SENSE | HDMI_IH_PHY_STAT0_HPD)) {
- __dw_hdmi_setup_rx_sense(hdmi,
- phy_stat & HDMI_PHY_HPD,
- phy_stat & HDMI_PHY_RX_SENSE);
+ dw_hdmi_setup_rx_sense(hdmi,
+ phy_stat & HDMI_PHY_HPD,
+ phy_stat & HDMI_PHY_RX_SENSE);
if ((phy_stat & (HDMI_PHY_RX_SENSE | HDMI_PHY_HPD)) == 0)
cec_notifier_set_phys_addr(hdmi->cec_notifier,
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index a393095..c9ad456 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -529,7 +529,7 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id)
if (stat & HDMITX_TOP_INTR_HPD_RISE)
hpd_connected = true;
- dw_hdmi_setup_rx_sense(dw_hdmi->dev, hpd_connected,
+ dw_hdmi_setup_rx_sense(dw_hdmi->hdmi, hpd_connected,
hpd_connected);
drm_helper_hpd_irq_event(dw_hdmi->encoder.dev);
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index dd2a8cf..ccb5aa8 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -151,7 +151,7 @@ struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev,
struct drm_encoder *encoder,
const struct dw_hdmi_plat_data *plat_data);
-void dw_hdmi_setup_rx_sense(struct device *dev, bool hpd, bool rx_sense);
+void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);
void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
--
2.7.4
^ permalink raw reply related
* [PATCH v4 9/9] drm/mediatek: Add support for mediatek SOC MT2712
From: kbuild test robot @ 2018-05-30 9:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527489507-24453-10-git-send-email-stu.hsieh@mediatek.com>
Hi Stu,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.17-rc7 next-20180529]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Stu-Hsieh/Add-support-for-mediatek-SOC-MT2712/20180530-032344
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm
All errors (new ones prefixed by >>):
>> drivers/gpu//drm/mediatek/mtk_drm_drv.c:165:2: error: 'DDP_COMPONENT_DPI1' undeclared here (not in a function); did you mean 'DDP_COMPONENT_DSI1'?
DDP_COMPONENT_DPI1,
^~~~~~~~~~~~~~~~~~
DDP_COMPONENT_DSI1
>> drivers/gpu//drm/mediatek/mtk_drm_drv.c:171:2: error: 'DDP_COMPONENT_DSI2' undeclared here (not in a function); did you mean 'DDP_COMPONENT_DSI1'?
DDP_COMPONENT_DSI2,
^~~~~~~~~~~~~~~~~~
DDP_COMPONENT_DSI1
>> drivers/gpu//drm/mediatek/mtk_drm_drv.c:171:2: error: incompatible types when initializing type 'enum mtk_ddp_comp_id' using type 'const enum mtk_ddp_comp_id *'
vim +165 drivers/gpu//drm/mediatek/mtk_drm_drv.c
158
159 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
160 DDP_COMPONENT_OVL1,
161 DDP_COMPONENT_COLOR1,
162 DDP_COMPONENT_AAL1,
163 DDP_COMPONENT_OD1,
164 DDP_COMPONENT_RDMA1,
> 165 DDP_COMPONENT_DPI1,
166 DDP_COMPONENT_PWM1,
167 };
168
169 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
170 DDP_COMPONENT_RDMA2,
> 171 DDP_COMPONENT_DSI2,
172 DDP_COMPONENT_PWM2,
173 };
174
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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